[linux] porting cvitek asic chips.
1. update cv182x/cv183x configuration file 2. update cv181x/cv180x configuration file 3. update clk driver for cvitek 4. update dma driver for cvitek 5. update soc driver for cvitek 6. porting cvitek ion driver from kernel-4.19 7. compatible with riscv Change-Id: Icff9fafe0ebe7d6bab824bbadb952e08bdc66c19
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sam.xiang
parent
4bc998a131
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4f810186ab
@ -383,7 +383,7 @@ __SYSCALL(__NR_syslog, sys_syslog)
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/* kernel/ptrace.c */
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#define __NR_ptrace 117
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__SYSCALL(__NR_ptrace, sys_ptrace)
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__SC_COMP(__NR_ptrace, sys_ptrace, compat_sys_ptrace)
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/* kernel/sched/core.c */
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#define __NR_sched_setparam 118
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@ -779,7 +779,7 @@ __SYSCALL(__NR_rseq, sys_rseq)
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#define __NR_kexec_file_load 294
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__SYSCALL(__NR_kexec_file_load, sys_kexec_file_load)
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/* 295 through 402 are unassigned to sync up with generic numbers, don't use */
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#if __BITS_PER_LONG == 32
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#if defined(__SYSCALL_COMPAT) || __BITS_PER_LONG == 32
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#define __NR_clock_gettime64 403
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__SYSCALL(__NR_clock_gettime64, sys_clock_gettime)
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#define __NR_clock_settime64 404
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