linux-5.10: version release v4.1.0.3
0debf7abc [dma] When using DMA, if the DMA addr spans 128MB boundary we have to split the DMA transfer into two so that each one doesn't exceed the boundary. 4f7ed7449 Merge "[eth] change rxterm and vcm to link DianXin router" into v4.1.0 feb60bba5 Merge "[audio][lt9611]add drivers" into v4.1.0 a3dde371c [eth] change rxterm and vcm to link DianXin router e615d3a43 [audio][lt9611]add drivers Change-Id: If4fdcbc32df6aeaed04da0efbd23455376e2a53c
This commit is contained in:
forum_service
carbon
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CSKY_ATOMIC_H
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#define __ASM_CSKY_ATOMIC_H
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#include <linux/version.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#ifdef CONFIG_CPU_HAS_LDSTEX
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#define __atomic_add_unless __atomic_add_unless
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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unsigned long tmp, ret;
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smp_mb();
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asm volatile (
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"1: ldex.w %0, (%3) \n"
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" mov %1, %0 \n"
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" cmpne %0, %4 \n"
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" bf 2f \n"
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" add %0, %2 \n"
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" stex.w %0, (%3) \n"
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" bez %0, 1b \n"
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"2: \n"
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: "=&r" (tmp), "=&r" (ret)
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: "r" (a), "r"(&v->counter), "r"(u)
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: "memory");
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if (ret != u)
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smp_mb();
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return ret;
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}
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#define ATOMIC_OP(op, c_op) \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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unsigned long tmp; \
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\
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asm volatile ( \
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"1: ldex.w %0, (%2) \n" \
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" " #op " %0, %1 \n" \
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" stex.w %0, (%2) \n" \
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" bez %0, 1b \n" \
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: "=&r" (tmp) \
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: "r" (i), "r"(&v->counter) \
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: "memory"); \
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}
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#define ATOMIC_OP_RETURN(op, c_op) \
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static inline int atomic_##op##_return(int i, atomic_t *v) \
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{ \
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unsigned long tmp, ret; \
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\
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smp_mb(); \
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asm volatile ( \
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"1: ldex.w %0, (%3) \n" \
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" " #op " %0, %2 \n" \
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" mov %1, %0 \n" \
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" stex.w %0, (%3) \n" \
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" bez %0, 1b \n" \
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: "=&r" (tmp), "=&r" (ret) \
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: "r" (i), "r"(&v->counter) \
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: "memory"); \
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smp_mb(); \
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\
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return ret; \
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}
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#define ATOMIC_FETCH_OP(op, c_op) \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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unsigned long tmp, ret; \
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\
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smp_mb(); \
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asm volatile ( \
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"1: ldex.w %0, (%3) \n" \
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" mov %1, %0 \n" \
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" " #op " %0, %2 \n" \
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" stex.w %0, (%3) \n" \
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" bez %0, 1b \n" \
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: "=&r" (tmp), "=&r" (ret) \
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: "r" (i), "r"(&v->counter) \
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: "memory"); \
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smp_mb(); \
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\
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return ret; \
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}
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#else /* CONFIG_CPU_HAS_LDSTEX */
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#include <linux/irqflags.h>
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#define __atomic_add_unless __atomic_add_unless
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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unsigned long tmp, ret, flags;
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raw_local_irq_save(flags);
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asm volatile (
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" ldw %0, (%3) \n"
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" mov %1, %0 \n"
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" cmpne %0, %4 \n"
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" bf 2f \n"
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" add %0, %2 \n"
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" stw %0, (%3) \n"
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"2: \n"
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: "=&r" (tmp), "=&r" (ret)
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: "r" (a), "r"(&v->counter), "r"(u)
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: "memory");
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raw_local_irq_restore(flags);
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return ret;
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}
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#define ATOMIC_OP(op, c_op) \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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unsigned long tmp, flags; \
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\
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raw_local_irq_save(flags); \
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\
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asm volatile ( \
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" ldw %0, (%2) \n" \
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" " #op " %0, %1 \n" \
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" stw %0, (%2) \n" \
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: "=&r" (tmp) \
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: "r" (i), "r"(&v->counter) \
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: "memory"); \
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\
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raw_local_irq_restore(flags); \
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}
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#define ATOMIC_OP_RETURN(op, c_op) \
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static inline int atomic_##op##_return(int i, atomic_t *v) \
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{ \
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unsigned long tmp, ret, flags; \
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\
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raw_local_irq_save(flags); \
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\
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asm volatile ( \
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" ldw %0, (%3) \n" \
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" " #op " %0, %2 \n" \
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" stw %0, (%3) \n" \
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" mov %1, %0 \n" \
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: "=&r" (tmp), "=&r" (ret) \
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: "r" (i), "r"(&v->counter) \
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: "memory"); \
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\
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raw_local_irq_restore(flags); \
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\
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return ret; \
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}
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#define ATOMIC_FETCH_OP(op, c_op) \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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unsigned long tmp, ret, flags; \
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\
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raw_local_irq_save(flags); \
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\
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asm volatile ( \
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" ldw %0, (%3) \n" \
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" mov %1, %0 \n" \
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" " #op " %0, %2 \n" \
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" stw %0, (%3) \n" \
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: "=&r" (tmp), "=&r" (ret) \
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: "r" (i), "r"(&v->counter) \
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: "memory"); \
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\
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raw_local_irq_restore(flags); \
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\
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return ret; \
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}
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#endif /* CONFIG_CPU_HAS_LDSTEX */
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#define atomic_add_return atomic_add_return
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ATOMIC_OP_RETURN(add, +)
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#define atomic_sub_return atomic_sub_return
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ATOMIC_OP_RETURN(sub, -)
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#define atomic_fetch_add atomic_fetch_add
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ATOMIC_FETCH_OP(add, +)
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#define atomic_fetch_sub atomic_fetch_sub
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ATOMIC_FETCH_OP(sub, -)
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#define atomic_fetch_and atomic_fetch_and
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ATOMIC_FETCH_OP(and, &)
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#define atomic_fetch_or atomic_fetch_or
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ATOMIC_FETCH_OP(or, |)
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#define atomic_fetch_xor atomic_fetch_xor
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ATOMIC_FETCH_OP(xor, ^)
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#define atomic_and atomic_and
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ATOMIC_OP(and, &)
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#define atomic_or atomic_or
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ATOMIC_OP(or, |)
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#define atomic_xor atomic_xor
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ATOMIC_OP(xor, ^)
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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#include <asm-generic/atomic.h>
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#endif /* __ASM_CSKY_ATOMIC_H */
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