[opensbi] create opensbi from T-Head official:
repo: https://github.com/T-head-Semi/opensbi commit: 89182b257c8798e15e4c685c1af0c2862d528d2a Change-Id: I7b39d66729e0108661a6f4c9e28acbdb303684ea
This commit is contained in:
sam.xiang
530
opensbi/lib/sbi/sbi_init.c
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530
opensbi/lib/sbi/sbi_init.c
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@ -0,0 +1,530 @@
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_barrier.h>
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#include <sbi/riscv_locks.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_ecall.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_hartmask.h>
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#include <sbi/sbi_hsm.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_system.h>
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#include <sbi/sbi_string.h>
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#include <sbi/sbi_timer.h>
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#include <sbi/sbi_tlb.h>
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#include <sbi/sbi_version.h>
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#define BANNER \
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" ____ _____ ____ _____\n" \
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" / __ \\ / ____| _ \\_ _|\n" \
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" | | | |_ __ ___ _ __ | (___ | |_) || |\n" \
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" | | | | '_ \\ / _ \\ '_ \\ \\___ \\| _ < | |\n" \
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" | |__| | |_) | __/ | | |____) | |_) || |_\n" \
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" \\____/| .__/ \\___|_| |_|_____/|____/_____|\n" \
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" | |\n" \
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" |_|\n\n"
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static void sbi_boot_print_banner(struct sbi_scratch *scratch)
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{
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if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
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return;
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#ifdef OPENSBI_VERSION_GIT
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sbi_printf("\nOpenSBI %s\n", OPENSBI_VERSION_GIT);
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#else
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sbi_printf("\nOpenSBI v%d.%d\n", OPENSBI_VERSION_MAJOR,
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OPENSBI_VERSION_MINOR);
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#endif
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sbi_printf(BANNER);
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}
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static void sbi_boot_print_general(struct sbi_scratch *scratch)
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{
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char str[128];
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const struct sbi_hsm_device *hdev;
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const struct sbi_ipi_device *idev;
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const struct sbi_timer_device *tdev;
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const struct sbi_console_device *cdev;
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const struct sbi_system_reset_device *srdev;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
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return;
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/* Platform details */
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sbi_printf("Platform Name : %s\n",
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sbi_platform_name(plat));
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sbi_platform_get_features_str(plat, str, sizeof(str));
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sbi_printf("Platform Features : %s\n", str);
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sbi_printf("Platform HART Count : %u\n",
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sbi_platform_hart_count(plat));
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idev = sbi_ipi_get_device();
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sbi_printf("Platform IPI Device : %s\n",
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(idev) ? idev->name : "---");
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tdev = sbi_timer_get_device();
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sbi_printf("Platform Timer Device : %s\n",
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(tdev) ? tdev->name : "---");
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cdev = sbi_console_get_device();
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sbi_printf("Platform Console Device : %s\n",
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(cdev) ? cdev->name : "---");
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hdev = sbi_hsm_get_device();
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sbi_printf("Platform HSM Device : %s\n",
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(hdev) ? hdev->name : "---");
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srdev = sbi_system_reset_get_device();
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sbi_printf("Platform SysReset Device : %s\n",
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(srdev) ? srdev->name : "---");
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/* Firmware details */
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sbi_printf("Firmware Base : 0x%lx\n", scratch->fw_start);
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sbi_printf("Firmware Size : %d KB\n",
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(u32)(scratch->fw_size / 1024));
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/* SBI details */
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sbi_printf("Runtime SBI Version : %d.%d\n",
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sbi_ecall_version_major(), sbi_ecall_version_minor());
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sbi_printf("\n");
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}
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static void sbi_boot_print_domains(struct sbi_scratch *scratch)
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{
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if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
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return;
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/* Domain details */
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sbi_domain_dump_all(" ");
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}
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static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
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{
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int xlen;
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char str[128];
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const struct sbi_domain *dom = sbi_domain_thishart_ptr();
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if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
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return;
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/* Determine MISA XLEN and MISA string */
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xlen = misa_xlen();
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if (xlen < 1) {
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sbi_printf("Error %d getting MISA XLEN\n", xlen);
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sbi_hart_hang();
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}
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/* Boot HART details */
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sbi_printf("Boot HART ID : %u\n", hartid);
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sbi_printf("Boot HART Domain : %s\n", dom->name);
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misa_string(xlen, str, sizeof(str));
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sbi_printf("Boot HART ISA : %s\n", str);
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sbi_hart_get_features_str(scratch, str, sizeof(str));
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sbi_printf("Boot HART Features : %s\n", str);
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sbi_printf("Boot HART PMP Count : %d\n",
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sbi_hart_pmp_count(scratch));
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sbi_printf("Boot HART PMP Granularity : %lu\n",
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sbi_hart_pmp_granularity(scratch));
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sbi_printf("Boot HART PMP Address Bits: %d\n",
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sbi_hart_pmp_addrbits(scratch));
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sbi_printf("Boot HART MHPM Count : %d\n",
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sbi_hart_mhpm_count(scratch));
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sbi_printf("Boot HART MHPM Count : %d\n",
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sbi_hart_mhpm_count(scratch));
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sbi_hart_delegation_dump(scratch, "Boot HART ", " ");
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}
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static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
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static struct sbi_hartmask coldboot_wait_hmask = { 0 };
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static unsigned long coldboot_done;
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static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
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{
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unsigned long saved_mie, cmip;
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/* Save MIE CSR */
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saved_mie = csr_read(CSR_MIE);
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/* Set MSIE bit to receive IPI */
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csr_set(CSR_MIE, MIP_MSIP);
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/* Acquire coldboot lock */
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spin_lock(&coldboot_lock);
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/* Mark current HART as waiting */
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sbi_hartmask_set_hart(hartid, &coldboot_wait_hmask);
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/* Release coldboot lock */
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spin_unlock(&coldboot_lock);
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/* Wait for coldboot to finish using WFI */
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while (!__smp_load_acquire(&coldboot_done)) {
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do {
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wfi();
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cmip = csr_read(CSR_MIP);
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} while (!(cmip & MIP_MSIP));
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};
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/* Acquire coldboot lock */
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spin_lock(&coldboot_lock);
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/* Unmark current HART as waiting */
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sbi_hartmask_clear_hart(hartid, &coldboot_wait_hmask);
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/* Release coldboot lock */
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spin_unlock(&coldboot_lock);
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/* Restore MIE CSR */
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csr_write(CSR_MIE, saved_mie);
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/*
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* The wait for coldboot is common for both warm startup and
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* warm resume path so clearing IPI here would result in losing
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* an IPI in warm resume path.
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*
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* Also, the sbi_platform_ipi_init() called from sbi_ipi_init()
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* will automatically clear IPI for current HART.
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*/
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}
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static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
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{
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/* Mark coldboot done */
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__smp_store_release(&coldboot_done, 1);
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/* Acquire coldboot lock */
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spin_lock(&coldboot_lock);
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/* Send an IPI to all HARTs waiting for coldboot */
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for (int i = 0; i <= sbi_scratch_last_hartid(); i++) {
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if ((i != hartid) &&
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sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
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sbi_ipi_raw_send(i);
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}
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/* Release coldboot lock */
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spin_unlock(&coldboot_lock);
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}
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static unsigned long init_count_offset;
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static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
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{
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int rc;
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unsigned long *init_count;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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/* Note: This has to be first thing in coldboot init sequence */
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rc = sbi_scratch_init(scratch);
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if (rc)
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sbi_hart_hang();
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/* Note: This has to be second thing in coldboot init sequence */
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rc = sbi_domain_init(scratch, hartid);
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if (rc)
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sbi_hart_hang();
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init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
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"INIT_COUNT");
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if (!init_count_offset)
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sbi_hart_hang();
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rc = sbi_hsm_init(scratch, hartid, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_early_init(plat, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_hart_init(scratch, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_console_init(scratch);
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if (rc)
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sbi_hart_hang();
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sbi_boot_print_banner(scratch);
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rc = sbi_platform_irqchip_init(plat, TRUE);
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if (rc) {
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sbi_printf("%s: platform irqchip init failed (error %d)\n",
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__func__, rc);
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sbi_hart_hang();
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}
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rc = sbi_ipi_init(scratch, TRUE);
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if (rc) {
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sbi_printf("%s: ipi init failed (error %d)\n", __func__, rc);
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sbi_hart_hang();
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}
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rc = sbi_tlb_init(scratch, TRUE);
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if (rc) {
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sbi_printf("%s: tlb init failed (error %d)\n", __func__, rc);
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sbi_hart_hang();
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}
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rc = sbi_timer_init(scratch, TRUE);
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if (rc) {
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sbi_printf("%s: timer init failed (error %d)\n", __func__, rc);
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sbi_hart_hang();
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}
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rc = sbi_ecall_init();
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if (rc) {
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sbi_printf("%s: ecall init failed (error %d)\n", __func__, rc);
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sbi_hart_hang();
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}
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sbi_boot_print_general(scratch);
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/*
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* Note: Finalize domains after HSM initialization so that we
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* can startup non-root domains.
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* Note: Finalize domains before HART PMP configuration so
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* that we use correct domain for configuring PMP.
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*/
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rc = sbi_domain_finalize(scratch, hartid);
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if (rc) {
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sbi_printf("%s: domain finalize failed (error %d)\n",
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__func__, rc);
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sbi_hart_hang();
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}
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sbi_boot_print_domains(scratch);
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rc = sbi_hart_pmp_configure(scratch);
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if (rc) {
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sbi_printf("%s: PMP configure failed (error %d)\n",
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__func__, rc);
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sbi_hart_hang();
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}
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/*
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* Note: Platform final initialization should be last so that
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* it sees correct domain assignment and PMP configuration.
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*/
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rc = sbi_platform_final_init(plat, TRUE);
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if (rc) {
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sbi_printf("%s: platform final init failed (error %d)\n",
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__func__, rc);
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sbi_hart_hang();
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}
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sbi_boot_print_hart(scratch, hartid);
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wake_coldboot_harts(scratch, hartid);
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init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
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(*init_count)++;
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sbi_hsm_prepare_next_jump(scratch, hartid);
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sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
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scratch->next_mode, FALSE);
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}
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static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
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{
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int rc;
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unsigned long *init_count;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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if (!init_count_offset)
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sbi_hart_hang();
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rc = sbi_hsm_init(scratch, hartid, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_early_init(plat, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_hart_init(scratch, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_irqchip_init(plat, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_ipi_init(scratch, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_tlb_init(scratch, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_timer_init(scratch, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_hart_pmp_configure(scratch);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_final_init(plat, FALSE);
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if (rc)
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sbi_hart_hang();
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init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
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(*init_count)++;
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sbi_hsm_prepare_next_jump(scratch, hartid);
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}
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static void init_warm_resume(struct sbi_scratch *scratch)
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{
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int rc;
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sbi_hsm_hart_resume_start(scratch);
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rc = sbi_hart_reinit(scratch);
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if (rc)
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sbi_hart_hang();
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rc = sbi_hart_pmp_configure(scratch);
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if (rc)
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sbi_hart_hang();
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sbi_hsm_hart_resume_finish(scratch);
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}
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static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
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{
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int hstate;
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wait_for_coldboot(scratch, hartid);
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hstate = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(), hartid);
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if (hstate < 0)
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sbi_hart_hang();
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if (hstate == SBI_HSM_STATE_SUSPENDED)
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init_warm_resume(scratch);
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else
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init_warm_startup(scratch, hartid);
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sbi_hart_switch_mode(hartid, scratch->next_arg1,
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scratch->next_addr,
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scratch->next_mode, FALSE);
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}
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static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
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/**
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||||
* Initialize OpenSBI library for current HART and jump to next
|
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* booting stage.
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*
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* The function expects following:
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* 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
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* 2. Stack pointer (SP) is setup for current HART
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* 3. Interrupts are disabled in MSTATUS CSR
|
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* 4. All interrupts are disabled in MIE CSR
|
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*
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||||
* @param scratch pointer to sbi_scratch of current HART
|
||||
*/
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void __noreturn sbi_init(struct sbi_scratch *scratch)
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||||
{
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||||
bool next_mode_supported = FALSE;
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bool coldboot = FALSE;
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||||
u32 hartid = current_hartid();
|
||||
const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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||||
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||||
if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
|
||||
sbi_platform_hart_invalid(plat, hartid))
|
||||
sbi_hart_hang();
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||||
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||||
switch (scratch->next_mode) {
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||||
case PRV_M:
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||||
next_mode_supported = TRUE;
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||||
break;
|
||||
case PRV_S:
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||||
if (misa_extension('S'))
|
||||
next_mode_supported = TRUE;
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||||
break;
|
||||
case PRV_U:
|
||||
if (misa_extension('U'))
|
||||
next_mode_supported = TRUE;
|
||||
break;
|
||||
default:
|
||||
sbi_hart_hang();
|
||||
}
|
||||
|
||||
/*
|
||||
* Only the HART supporting privilege mode specified in the
|
||||
* scratch->next_mode should be allowed to become the coldboot
|
||||
* HART because the coldboot HART will be directly jumping to
|
||||
* the next booting stage.
|
||||
*
|
||||
* We use a lottery mechanism to select coldboot HART among
|
||||
* HARTs which satisfy above condition.
|
||||
*/
|
||||
|
||||
if (next_mode_supported && atomic_xchg(&coldboot_lottery, 1) == 0)
|
||||
coldboot = TRUE;
|
||||
|
||||
if (coldboot)
|
||||
init_coldboot(scratch, hartid);
|
||||
else
|
||||
init_warmboot(scratch, hartid);
|
||||
}
|
||||
|
||||
unsigned long sbi_init_count(u32 hartid)
|
||||
{
|
||||
struct sbi_scratch *scratch;
|
||||
unsigned long *init_count;
|
||||
|
||||
if (!init_count_offset)
|
||||
return 0;
|
||||
|
||||
scratch = sbi_hartid_to_scratch(hartid);
|
||||
if (!scratch)
|
||||
return 0;
|
||||
|
||||
init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
|
||||
|
||||
return *init_count;
|
||||
}
|
||||
|
||||
/**
|
||||
* Exit OpenSBI library for current HART and stop HART
|
||||
*
|
||||
* The function expects following:
|
||||
* 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
|
||||
* 2. Stack pointer (SP) is setup for current HART
|
||||
*
|
||||
* @param scratch pointer to sbi_scratch of current HART
|
||||
*/
|
||||
void __noreturn sbi_exit(struct sbi_scratch *scratch)
|
||||
{
|
||||
u32 hartid = current_hartid();
|
||||
const struct sbi_platform *plat = sbi_platform_ptr(scratch);
|
||||
|
||||
if (sbi_platform_hart_invalid(plat, hartid))
|
||||
sbi_hart_hang();
|
||||
|
||||
sbi_platform_early_exit(plat);
|
||||
|
||||
sbi_timer_exit(scratch);
|
||||
|
||||
sbi_ipi_exit(scratch);
|
||||
|
||||
sbi_platform_irqchip_exit(plat);
|
||||
|
||||
sbi_platform_final_exit(plat);
|
||||
|
||||
sbi_hsm_exit(scratch);
|
||||
}
|
||||
Reference in New Issue
Block a user