diff --git a/middleware/v2/component/isp/sensor.mk b/middleware/v2/component/isp/sensor.mk
index 4edf198b0..bb076660b 100644
--- a/middleware/v2/component/isp/sensor.mk
+++ b/middleware/v2/component/isp/sensor.mk
@@ -48,6 +48,7 @@ sensor-$(CONFIG_SENSOR_TECHPOINT_TP2850)     += techpoint_tp2850
 sensor-$(CONFIG_SENSOR_VIVO_MCS369)          += vivo_mcs369
 sensor-$(CONFIG_SENSOR_VIVO_MCS369Q)         += vivo_mcs369q
 sensor-$(CONFIG_SENSOR_VIVO_MM308M2)         += vivo_mm308m2
+sensor-$(CONFIG_SENSOR_TECHPOINT_TP2825)     += techpoint_tp2825
 else ifeq ($(CHIP_ARCH), $(filter $(CHIP_ARCH),  CV180X CV181X CV182X))
 sensor-$(CONFIG_SENSOR_BRIGATES_BG0808)      += brigates_bg0808
 sensor-$(CONFIG_SENSOR_GCORE_GC02M1)         += gcore_gc02m1
@@ -65,6 +66,7 @@ sensor-$(CONFIG_SENSOR_OV_OS04A10)           += ov_os04a10
 sensor-$(CONFIG_SENSOR_OV_OS04C10)           += ov_os04c10
 sensor-$(CONFIG_SENSOR_OV_OS08A20)           += ov_os08a20
 sensor-$(CONFIG_SENSOR_OV_OV4689)            += ov_ov4689
+sensor-$(CONFIG_SENSOR_OV_OV5647)            += ov_ov5647
 sensor-$(CONFIG_SENSOR_OV_OV6211)            += ov_ov6211
 sensor-$(CONFIG_SENSOR_OV_OV7251)            += ov_ov7251
 sensor-$(CONFIG_SENSOR_PIXELPLUS_PR2020)     += pixelplus_pr2020
@@ -100,6 +102,7 @@ sensor-$(CONFIG_SENSOR_SONY_IMX327_2L)       += sony_imx327_2L
 sensor-$(CONFIG_SENSOR_SONY_IMX327_FPGA)     += sony_imx327_fpga
 sensor-$(CONFIG_SENSOR_SONY_IMX327_SUBLVDS)  += sony_imx327_sublvds
 sensor-$(CONFIG_SENSOR_SONY_IMX335)          += sony_imx335
+sensor-$(CONFIG_SENSOR_TECHPOINT_TP2825)     += techpoint_tp2825
 else
 $(error not supported chip arch cv180x/cv181x/cv182x/cv183x)
 endif
diff --git a/middleware/v2/component/isp/sensor/cv180x/Makefile b/middleware/v2/component/isp/sensor/cv180x/Makefile
index 08954a6b3..df18c95bc 100644
--- a/middleware/v2/component/isp/sensor/cv180x/Makefile
+++ b/middleware/v2/component/isp/sensor/cv180x/Makefile
@@ -71,6 +71,9 @@ ov_os08a20:
 ov_ov4689:
 	$(call MAKE_SENSOR, ${@})
 
+ov_ov5647:
+	$(call MAKE_SENSOR, ${@})
+
 ov_ov6211:
 	$(call MAKE_SENSOR, ${@})
 
@@ -176,6 +179,9 @@ sony_imx327_sublvds:
 sony_imx335:
 	$(call MAKE_SENSOR, ${@})
 
+techpoint_tp2825:
+	$(call MAKE_SENSOR, ${@})
+
 all_sensor:
 	@$(MAKE) -f Makefile_full || exit 1;
 
diff --git a/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/Makefile b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/Makefile
new file mode 100644
index 000000000..7ae38111f
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/Makefile
@@ -0,0 +1,37 @@
+SHELL = /bin/bash
+ifeq ($(PARAM_FILE), )
+	PARAM_FILE=../../../../../../$(shell echo $(MW_VER))/Makefile.param
+	include $(PARAM_FILE)
+endif
+
+SDIR = $(PWD)
+SRCS = $(wildcard $(SDIR)/*.c)
+INCS = -I$(MW_INC) -I$(ISP_INC) -I$(KERNEL_INC) -I./include
+OBJS = $(SRCS:.c=.o)
+DEPS = $(SRCS:.c=.d)
+TARGET_A = $(MW_LIB)/libsns_ov5647.a
+TARGET_SO = $(MW_LIB)/libsns_ov5647.so
+
+EXTRA_CFLAGS = $(INCS) $(PROJ_CFLAGS)
+EXTRA_LDFLAGS =
+
+.PHONY : clean all
+all : $(TARGET_A) $(TARGET_SO)
+
+$(SDIR)/%.o: $(SDIR)/%.c
+	@$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
+	@echo [$(notdir $(CC))] $(notdir $@)
+
+$(TARGET_A): $(OBJS)
+	@$(AR) $(ARFLAGS) $@ $(OBJS)
+	@echo -e $(YELLOW)[LINK]$(END)[$(notdir $(AR))] $(notdir $@)
+
+$(TARGET_SO): $(OBJS)
+	@$(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -o $@ --start-group $(OBJS) --end-group
+	@echo -e $(GREEN)[LINK]$(END)[$(notdir $(LD))] $(notdir $@)
+
+clean:
+	@rm -f $(OBJS) $(DEPS) $(TARGET_A) $(TARGET_SO)
+
+-include $(DEPS)
+
diff --git a/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos.c b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos.c
new file mode 100644
index 000000000..b7cc52d2b
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos.c
@@ -0,0 +1,893 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <syslog.h>
+#include <errno.h>
+#ifdef ARCH_CV182X
+#include "cvi_type.h"
+#include "cvi_comm_video.h"
+#include <linux/cvi_vip_snsr.h>
+#else
+#include <linux/cvi_type.h>
+#include <linux/cvi_comm_video.h>
+#include <linux/vi_snsr.h>
+#endif
+#include "cvi_debug.h"
+#include "cvi_comm_sns.h"
+#include "cvi_sns_ctrl.h"
+#include "cvi_ae_comm.h"
+#include "cvi_awb_comm.h"
+#include "cvi_ae.h"
+#include "cvi_awb.h"
+#include "cvi_isp.h"
+
+#include "ov5647_cmos_ex.h"
+#include "ov5647_cmos_param.h"
+
+#define DIV_0_TO_1(a)   ((0 == (a)) ? 1 : (a))
+#define DIV_0_TO_1_FLOAT(a) ((((a) < 1E-10) && ((a) > -1E-10)) ? 1 : (a))
+#define OV5647_ID 0x5647
+#define OV5647_I2C_ADDR_1 0x36
+#define OV5647_I2C_ADDR_2 0x10
+#define OV5647_I2C_ADDR_IS_VALID(addr)	\
+		((addr) == OV5647_I2C_ADDR_1 || (addr) == OV5647_I2C_ADDR_2)
+/****************************************************************************
+ * global variables                                                            *
+ ****************************************************************************/
+
+ISP_SNS_STATE_S *g_pastOv5647[VI_MAX_PIPE_NUM] = {CVI_NULL};
+
+#define OV5647_SENSOR_GET_CTX(dev, pstCtx)   (pstCtx = g_pastOv5647[dev])
+#define OV5647_SENSOR_SET_CTX(dev, pstCtx)   (g_pastOv5647[dev] = pstCtx)
+#define OV5647_SENSOR_RESET_CTX(dev)         (g_pastOv5647[dev] = CVI_NULL)
+
+ISP_SNS_COMMBUS_U g_aunOv5647_BusInfo[VI_MAX_PIPE_NUM] = {
+	[0] = { .s8I2cDev = 0},
+	[1 ... VI_MAX_PIPE_NUM - 1] = { .s8I2cDev = -1}
+};
+
+CVI_U16 g_au16Ov5647_GainMode[VI_MAX_PIPE_NUM] = {0};
+CVI_U16 g_au16Ov5647_UseHwSync[VI_MAX_PIPE_NUM] = {0};
+
+ISP_SNS_MIRRORFLIP_TYPE_E g_aeOv5647_MirrorFip[VI_MAX_PIPE_NUM] = {0};
+
+/****************************************************************************
+ * local variables and functions                                                           *
+ ****************************************************************************/
+static CVI_U32 g_au32InitExposure[VI_MAX_PIPE_NUM]  = {0};
+static CVI_U32 g_au32LinesPer500ms[VI_MAX_PIPE_NUM] = {0};
+static CVI_U16 g_au16InitWBGain[VI_MAX_PIPE_NUM][3] = {{0} };
+static CVI_U16 g_au16SampleRgain[VI_MAX_PIPE_NUM] = {0};
+static CVI_U16 g_au16SampleBgain[VI_MAX_PIPE_NUM] = {0};
+static CVI_S32 cmos_get_wdr_size(VI_PIPE ViPipe, ISP_SNS_ISP_INFO_S *pstIspCfg);
+/*****Ov5647 Lines Range*****/
+#define OV5647_FULL_LINES_MAX  (0xFFFF)
+
+/*****Ov5647 Register Address*****/
+#define OV5647_HOLD_3208	0x3208
+#define OV5647_HOLD_320B	0x320B
+#define OV5647_EXP1_ADDR	0x3500
+#define OV5647_AGAIN1_ADDR	0x350A
+#define OV5647_VTS_ADDR		0x380E
+
+#define OV5647_RES_IS_1080P(w, h)      ((w) == 1920 && (h) == 1080)
+
+static CVI_S32 cmos_get_ae_default(VI_PIPE ViPipe, AE_SENSOR_DEFAULT_S *pstAeSnsDft)
+{
+	const OV5647_MODE_S *pstMode;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstAeSnsDft);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstMode = &g_astOv5647_mode[pstSnsState->u8ImgMode];
+	pstAeSnsDft->u32FullLinesStd = pstSnsState->u32FLStd;
+	pstAeSnsDft->u32FlickerFreq = 50 * 256;
+	pstAeSnsDft->u32FullLinesMax = OV5647_FULL_LINES_MAX;
+	pstAeSnsDft->u32HmaxTimes = (1000000) / (pstSnsState->u32FLStd * 30);
+
+	pstAeSnsDft->stIntTimeAccu.enAccuType = AE_ACCURACY_LINEAR;
+	pstAeSnsDft->stIntTimeAccu.f32Accuracy = 1;
+	pstAeSnsDft->stIntTimeAccu.f32Offset = 0;
+
+	pstAeSnsDft->stAgainAccu.enAccuType = AE_ACCURACY_TABLE;
+	pstAeSnsDft->stAgainAccu.f32Accuracy = 1;
+
+	pstAeSnsDft->stDgainAccu.enAccuType = AE_ACCURACY_DB;
+	pstAeSnsDft->stDgainAccu.f32Accuracy = 1;
+
+	pstAeSnsDft->u32ISPDgainShift = 8;
+	pstAeSnsDft->u32MinISPDgainTarget = 1 << pstAeSnsDft->u32ISPDgainShift;
+	pstAeSnsDft->u32MaxISPDgainTarget = 2 << pstAeSnsDft->u32ISPDgainShift;
+
+	if (g_au32LinesPer500ms[ViPipe] == 0)
+		pstAeSnsDft->u32LinesPer500ms = pstSnsState->u32FLStd * 30 / 2;
+	else
+		pstAeSnsDft->u32LinesPer500ms = g_au32LinesPer500ms[ViPipe];
+	pstAeSnsDft->u32SnsStableFrame = 0;
+	/* OV sensor cannot update new setting before the old setting takes effect */
+	pstAeSnsDft->u8AERunInterval = 1;
+	switch (pstSnsState->enWDRMode) {
+	default:
+	case WDR_MODE_NONE:   /*linear mode*/
+		pstAeSnsDft->f32Fps = pstMode->f32MaxFps;
+		pstAeSnsDft->f32MinFps = pstMode->f32MinFps;
+		pstAeSnsDft->au8HistThresh[0] = 0xd;
+		pstAeSnsDft->au8HistThresh[1] = 0x28;
+		pstAeSnsDft->au8HistThresh[2] = 0x60;
+		pstAeSnsDft->au8HistThresh[3] = 0x80;
+
+		pstAeSnsDft->u32MaxAgain = pstMode->stAgain[0].u32Max;
+		pstAeSnsDft->u32MinAgain = pstMode->stAgain[0].u32Min;
+		pstAeSnsDft->u32MaxAgainTarget = pstAeSnsDft->u32MaxAgain;
+		pstAeSnsDft->u32MinAgainTarget = pstAeSnsDft->u32MinAgain;
+
+		pstAeSnsDft->u32MaxDgain = pstMode->stDgain[0].u32Max;
+		pstAeSnsDft->u32MinDgain = pstMode->stDgain[0].u32Min;
+		pstAeSnsDft->u32MaxDgainTarget = pstAeSnsDft->u32MaxDgain;
+		pstAeSnsDft->u32MinDgainTarget = pstAeSnsDft->u32MinDgain;
+
+		pstAeSnsDft->u8AeCompensation = 40;
+		pstAeSnsDft->u32InitAESpeed = 64;
+		pstAeSnsDft->u32InitAETolerance = 5;
+		pstAeSnsDft->u32AEResponseFrame = 4;
+		pstAeSnsDft->enAeExpMode = AE_EXP_HIGHLIGHT_PRIOR;
+		pstAeSnsDft->u32InitExposure = g_au32InitExposure[ViPipe] ? g_au32InitExposure[ViPipe] : 76151;
+
+		pstAeSnsDft->u32MaxIntTime = pstMode->stExp[0].u16Max;
+		pstAeSnsDft->u32MinIntTime = pstMode->stExp[0].u16Min;
+		pstAeSnsDft->u32MaxIntTimeTarget = 65535;
+		pstAeSnsDft->u32MinIntTimeTarget = 1;
+		break;
+	}
+
+	return CVI_SUCCESS;
+}
+
+/* the function of sensor set fps */
+static CVI_S32 cmos_fps_set(VI_PIPE ViPipe, CVI_FLOAT f32Fps, AE_SENSOR_DEFAULT_S *pstAeSnsDft)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	CVI_U32 u32VMAX;
+	CVI_FLOAT f32MaxFps = 0;
+	CVI_FLOAT f32MinFps = 0;
+	CVI_U32 u32Vts = 0;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstAeSnsDft);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	u32Vts = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+	pstSnsRegsInfo = &pstSnsState->astSyncInfo[0].snsCfg;
+	f32MaxFps = g_astOv5647_mode[pstSnsState->u8ImgMode].f32MaxFps;
+	f32MinFps = g_astOv5647_mode[pstSnsState->u8ImgMode].f32MinFps;
+
+	switch (pstSnsState->u8ImgMode) {
+	case OV5647_MODE_1920X1080P30:
+		if ((f32Fps <= f32MaxFps) && (f32Fps >= f32MinFps)) {
+			u32VMAX = u32Vts * f32MaxFps / DIV_0_TO_1_FLOAT(f32Fps);
+		} else {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Not support Fps: %f\n", f32Fps);
+			return CVI_FAILURE;
+		}
+		u32VMAX = (u32VMAX > OV5647_FULL_LINES_MAX) ? OV5647_FULL_LINES_MAX : u32VMAX;
+		break;
+	default:
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Not support sensor mode: %d\n", pstSnsState->u8ImgMode);
+		return CVI_FAILURE;
+	}
+
+
+	pstSnsState->u32FLStd = u32VMAX;
+
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+		pstSnsRegsInfo->astI2cData[LINEAR_VTS_0].u32Data = ((u32VMAX & 0xFF00) >> 8);
+		pstSnsRegsInfo->astI2cData[LINEAR_VTS_1].u32Data = (u32VMAX & 0xFF);
+	} else {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Not support WDR: %d\n", pstSnsState->enWDRMode);
+		return CVI_FAILURE;
+	}
+
+	pstAeSnsDft->f32Fps = f32Fps;
+	pstAeSnsDft->u32LinesPer500ms = pstSnsState->u32FLStd * f32Fps / 2;
+	pstAeSnsDft->u32FullLinesStd = pstSnsState->u32FLStd;
+	pstAeSnsDft->u32MaxIntTime = pstSnsState->u32FLStd - 8;
+	pstSnsState->au32FL[0] = pstSnsState->u32FLStd;
+	pstAeSnsDft->u32FullLines = pstSnsState->au32FL[0];
+	pstAeSnsDft->u32HmaxTimes = (1000000) / (pstSnsState->u32FLStd * DIV_0_TO_1_FLOAT(f32Fps));
+
+	return CVI_SUCCESS;
+}
+
+/* while isp notify ae to update sensor regs, ae call these funcs. */
+static CVI_S32 cmos_inttime_update(VI_PIPE ViPipe, CVI_U32 *u32IntTime)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(u32IntTime);
+	pstSnsRegsInfo = &pstSnsState->astSyncInfo[0].snsCfg;
+
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+		/* linear exposure reg range:
+		 * min : 4
+		 * max : vts - 4
+		 * step : 1
+		 */
+		CVI_U32 u32TmpIntTime = u32IntTime[0];
+		CVI_U32 mimExp = 4;
+		CVI_U32 maxExp = pstSnsState->au32FL[0] - 4;
+
+		u32TmpIntTime = (u32TmpIntTime > maxExp) ? maxExp : u32TmpIntTime;
+		u32TmpIntTime = (u32TmpIntTime < mimExp) ? mimExp : u32TmpIntTime;
+		u32IntTime[0] = u32TmpIntTime;
+
+		pstSnsRegsInfo->astI2cData[LINEAR_EXP_0].u32Data = ((u32TmpIntTime & 0xF000) >> 12);
+		pstSnsRegsInfo->astI2cData[LINEAR_EXP_1].u32Data = ((u32TmpIntTime & 0xFF0) >> 4);
+		pstSnsRegsInfo->astI2cData[LINEAR_EXP_2].u32Data = ((u32TmpIntTime & 0x0F) << 4);
+	} else {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Not support WDR: %d\n", pstSnsState->enWDRMode);
+		return CVI_FAILURE;
+	}
+
+	return CVI_SUCCESS;
+}
+
+typedef struct gain_tbl_info_s {
+	CVI_U16	gainMax;
+	CVI_U16	idxBase;
+	CVI_U8	regGain;
+	CVI_U8	regGainFineBase;
+	CVI_U8	regGainFineStep;
+} gain_tbl_info_s;
+
+static struct gain_tbl_info_s AgainInfo[7] = {
+	{
+		.gainMax = 1984,
+		.idxBase = 0,
+		.regGain = 0x00,
+		.regGainFineBase = 0x10,
+		.regGainFineStep = 1,
+	},
+	{
+		.gainMax = 3968,
+		.idxBase = 16,
+		.regGain = 0x00,
+		.regGainFineBase = 0x20,
+		.regGainFineStep = 2,
+	},
+	{
+		.gainMax = 7936,
+		.idxBase = 32,
+		.regGain = 0x00,
+		.regGainFineBase = 0x40,
+		.regGainFineStep = 4,
+	},
+	{
+		.gainMax = 15872,
+		.idxBase = 48,
+		.regGain = 0x00,
+		.regGainFineBase = 0x80,
+		.regGainFineStep = 8,
+	},
+	{
+		.gainMax = 31744,
+		.idxBase = 64,
+		.regGain = 0x01,
+		.regGainFineBase = 0x00,
+		.regGainFineStep = 16,
+	},
+	{
+		.gainMax = 47104,
+		.idxBase = 80,
+		.regGain = 0x02,
+		.regGainFineBase = 0x00,
+		.regGainFineStep = 32,
+	},
+	{
+		.gainMax = 63488,
+		.idxBase = 88,
+		.regGain = 0x03,
+		.regGainFineBase = 0x00,
+		.regGainFineStep = 32,
+	},
+
+};
+
+static CVI_U32 Again_table[] = {
+	1024, 1088, 1152, 1216, 1280, 1344, 1408, 1472, 1536, 1600, 1664, 1728, 1792, 1856, 1920, 1984,
+	2048, 2176, 2304, 2432, 2560, 2688, 2816, 2944, 3072, 3200, 3328, 3456, 3584, 3712, 3840, 3968,
+	4096, 4352, 4608, 4864, 5120, 5376, 5632, 5888, 6144, 6400, 6656, 6912, 7168, 7424, 7680, 7936,
+	8192, 8704, 9216, 9728, 10240, 10752, 11264, 11776, 12288, 12800, 13312, 13824, 14336, 14848, 15360, 15872,
+	16384, 17408, 18432, 19456, 20480, 21504, 22528, 23552, 24576, 25600, 26624, 27648, 28672, 29696, 30720, 31744,
+	32768, 34816, 36864, 38912, 40960, 43008, 45056, 47104, 49152, 51200, 53248, 55296, 57344, 59392, 61440, 63488
+};
+
+static const CVI_U32 again_table_size = ARRAY_SIZE(Again_table);
+
+static CVI_S32 cmos_again_calc_table(VI_PIPE ViPipe, CVI_U32 *pu32AgainLin, CVI_U32 *pu32AgainDb)
+{
+	CVI_U32 i;
+
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pu32AgainLin);
+	CMOS_CHECK_POINTER(pu32AgainDb);
+
+	if (*pu32AgainLin >= Again_table[again_table_size - 1]) {
+		*pu32AgainLin = Again_table[again_table_size - 1];
+		*pu32AgainDb = again_table_size - 1;
+		return CVI_SUCCESS;
+	}
+
+	for (i = 1; i < again_table_size; i++) {
+		if (*pu32AgainLin < Again_table[i]) {
+			*pu32AgainLin = Again_table[i - 1];
+			*pu32AgainDb = i - 1;
+			break;
+		}
+	}
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_dgain_calc_table(VI_PIPE ViPipe, CVI_U32 *pu32DgainLin, CVI_U32 *pu32DgainDb)
+{
+
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pu32DgainLin);
+	CMOS_CHECK_POINTER(pu32DgainDb);
+
+	*pu32DgainLin = 1024;
+	*pu32DgainDb = 0;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_gains_update(VI_PIPE ViPipe, CVI_U32 *pu32Again, CVI_U32 *pu32Dgain)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+	CVI_U32 u32Again;
+	struct gain_tbl_info_s *info;
+	int i, tbl_num;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(pu32Again);
+	CMOS_CHECK_POINTER(pu32Dgain);
+	pstSnsRegsInfo = &pstSnsState->astSyncInfo[0].snsCfg;
+	u32Again = pu32Again[0];
+
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+		/* linear mode */
+		/* find Again register setting. */
+		tbl_num = sizeof(AgainInfo)/sizeof(struct gain_tbl_info_s);
+		for (i = tbl_num - 1; i >= 0; i--) {
+			info = &AgainInfo[i];
+
+			if (u32Again >= info->idxBase)
+				break;
+		}
+
+		pstSnsRegsInfo->astI2cData[LINEAR_AGAIN_0].u32Data = info->regGain & 0xFF;
+		u32Again = info->regGainFineBase + (u32Again - info->idxBase) * info->regGainFineStep;
+		pstSnsRegsInfo->astI2cData[LINEAR_AGAIN_1].u32Data = u32Again & 0xFF;
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_ae_exp_function(AE_SENSOR_EXP_FUNC_S *pstExpFuncs)
+{
+	CMOS_CHECK_POINTER(pstExpFuncs);
+
+	memset(pstExpFuncs, 0, sizeof(AE_SENSOR_EXP_FUNC_S));
+
+	pstExpFuncs->pfn_cmos_get_ae_default    = cmos_get_ae_default;
+	pstExpFuncs->pfn_cmos_fps_set           = cmos_fps_set;
+	pstExpFuncs->pfn_cmos_inttime_update    = cmos_inttime_update;
+	pstExpFuncs->pfn_cmos_gains_update      = cmos_gains_update;
+	pstExpFuncs->pfn_cmos_again_calc_table  = cmos_again_calc_table;
+	pstExpFuncs->pfn_cmos_dgain_calc_table  = cmos_dgain_calc_table;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_awb_default(VI_PIPE ViPipe, AWB_SENSOR_DEFAULT_S *pstAwbSnsDft)
+{
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pstAwbSnsDft);
+
+	memset(pstAwbSnsDft, 0, sizeof(AWB_SENSOR_DEFAULT_S));
+
+	pstAwbSnsDft->u16InitGgain = 1024;
+	pstAwbSnsDft->u8AWBRunInterval = 1;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_awb_exp_function(AWB_SENSOR_EXP_FUNC_S *pstExpFuncs)
+{
+	CMOS_CHECK_POINTER(pstExpFuncs);
+
+	memset(pstExpFuncs, 0, sizeof(AWB_SENSOR_EXP_FUNC_S));
+
+	pstExpFuncs->pfn_cmos_get_awb_default = cmos_get_awb_default;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_isp_default(VI_PIPE ViPipe, ISP_CMOS_DEFAULT_S *pstDef)
+{
+	(void) ViPipe;
+
+	memset(pstDef, 0, sizeof(ISP_CMOS_DEFAULT_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_blc_default(VI_PIPE ViPipe, ISP_CMOS_BLACK_LEVEL_S *pstBlc)
+{
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pstBlc);
+
+	memset(pstBlc, 0, sizeof(ISP_CMOS_BLACK_LEVEL_S));
+
+	memcpy(pstBlc, &g_stIspBlcCalibratio, sizeof(ISP_CMOS_BLACK_LEVEL_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_wdr_size(VI_PIPE ViPipe, ISP_SNS_ISP_INFO_S *pstIspCfg)
+{
+	const OV5647_MODE_S *pstMode = CVI_NULL;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	pstMode = &g_astOv5647_mode[pstSnsState->u8ImgMode];
+
+	pstIspCfg->frm_num = 1;
+	memcpy(&pstIspCfg->img_size[0], &pstMode->astImg[0], sizeof(ISP_WDR_SIZE_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_set_wdr_mode(VI_PIPE ViPipe, CVI_U8 u8Mode)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstSnsState->bSyncInit = CVI_FALSE;
+
+	switch (u8Mode) {
+	case WDR_MODE_NONE:
+		pstSnsState->u8ImgMode = OV5647_MODE_1920X1080P30;
+		pstSnsState->enWDRMode = WDR_MODE_NONE;
+		pstSnsState->u32FLStd = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+		syslog(LOG_INFO, "linear mode\n");
+		break;
+	default:
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Unsupport sensor mode!\n");
+		return CVI_FAILURE;
+	}
+
+	pstSnsState->au32FL[0] = pstSnsState->u32FLStd;
+	pstSnsState->au32FL[1] = pstSnsState->au32FL[0];
+	memset(pstSnsState->au32WDRIntTime, 0, sizeof(pstSnsState->au32WDRIntTime));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_U32 sensor_cmp_wdr_size(ISP_SNS_ISP_INFO_S *pstWdr1, ISP_SNS_ISP_INFO_S *pstWdr2)
+{
+	CVI_U32 i;
+
+	if (pstWdr1->frm_num != pstWdr2->frm_num)
+		goto _mismatch;
+	for (i = 0; i < 2; i++) {
+		if (pstWdr1->img_size[i].stSnsSize.u32Width != pstWdr2->img_size[i].stSnsSize.u32Width)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stSnsSize.u32Height != pstWdr2->img_size[i].stSnsSize.u32Height)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.s32X != pstWdr2->img_size[i].stWndRect.s32X)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.s32Y != pstWdr2->img_size[i].stWndRect.s32Y)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.u32Width != pstWdr2->img_size[i].stWndRect.u32Width)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.u32Height != pstWdr2->img_size[i].stWndRect.u32Height)
+			goto _mismatch;
+	}
+
+	return 0;
+_mismatch:
+	return 1;
+}
+
+static CVI_S32 cmos_get_sns_regs_info(VI_PIPE ViPipe, ISP_SNS_SYNC_INFO_S *pstSnsSyncInfo)
+{
+	CVI_U32 i;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+	ISP_SNS_SYNC_INFO_S *pstCfg0 = CVI_NULL;
+	ISP_SNS_SYNC_INFO_S *pstCfg1 = CVI_NULL;
+	ISP_I2C_DATA_S *pstI2c_data = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSnsSyncInfo);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	pstSnsRegsInfo = &pstSnsSyncInfo->snsCfg;
+	pstCfg0 = &pstSnsState->astSyncInfo[0];
+	pstCfg1 = &pstSnsState->astSyncInfo[1];
+	pstI2c_data = pstCfg0->snsCfg.astI2cData;
+
+	if ((pstSnsState->bSyncInit == CVI_FALSE) || (pstSnsRegsInfo->bConfig == CVI_FALSE)) {
+		pstCfg0->snsCfg.enSnsType = SNS_I2C_TYPE;
+		pstCfg0->snsCfg.unComBus.s8I2cDev = g_aunOv5647_BusInfo[ViPipe].s8I2cDev;
+		pstCfg0->snsCfg.u8Cfg2ValidDelayMax = 0;
+		pstCfg0->snsCfg.use_snsr_sram = CVI_TRUE;
+		pstCfg0->snsCfg.u32RegNum = LINEAR_REGS_NUM;
+
+		for (i = 0; i < pstCfg0->snsCfg.u32RegNum; i++) {
+			pstI2c_data[i].bUpdate = CVI_TRUE;
+			pstI2c_data[i].u8DevAddr = ov5647_i2c_addr;
+			pstI2c_data[i].u32AddrByteNum = ov5647_addr_byte;
+			pstI2c_data[i].u32DataByteNum = ov5647_data_byte;
+		}
+
+		switch (pstSnsState->enWDRMode) {
+		default:
+			pstI2c_data[LINEAR_EXP_0].u32RegAddr = OV5647_EXP1_ADDR;
+			pstI2c_data[LINEAR_EXP_1].u32RegAddr = OV5647_EXP1_ADDR + 1;
+			pstI2c_data[LINEAR_EXP_2].u32RegAddr = OV5647_EXP1_ADDR + 2;
+			pstI2c_data[LINEAR_AGAIN_0].u32RegAddr = OV5647_AGAIN1_ADDR;
+			pstI2c_data[LINEAR_AGAIN_1].u32RegAddr = OV5647_AGAIN1_ADDR + 1;
+			pstI2c_data[LINEAR_VTS_0].u32RegAddr = OV5647_VTS_ADDR;
+			pstI2c_data[LINEAR_VTS_1].u32RegAddr = OV5647_VTS_ADDR + 1;
+			break;
+		}
+		pstSnsState->bSyncInit = CVI_TRUE;
+		pstCfg0->snsCfg.need_update = CVI_TRUE;
+		/* recalcualte WDR size */
+		cmos_get_wdr_size(ViPipe, &pstCfg0->ispCfg);
+		pstCfg0->ispCfg.need_update = CVI_TRUE;
+	} else {
+		pstCfg0->snsCfg.need_update = CVI_FALSE;
+		for (i = 0; i < pstCfg0->snsCfg.u32RegNum; i++) {
+			if (pstCfg0->snsCfg.astI2cData[i].u32Data == pstCfg1->snsCfg.astI2cData[i].u32Data) {
+				pstCfg0->snsCfg.astI2cData[i].bUpdate = CVI_FALSE;
+			} else {
+				pstCfg0->snsCfg.astI2cData[i].bUpdate = CVI_TRUE;
+				pstCfg0->snsCfg.need_update = CVI_TRUE;
+			}
+		}
+		/* check update isp crop or not */
+		pstCfg0->ispCfg.need_update = (sensor_cmp_wdr_size(&pstCfg0->ispCfg, &pstCfg1->ispCfg) ?
+				CVI_TRUE : CVI_FALSE);
+	}
+
+	pstSnsRegsInfo->bConfig = CVI_FALSE;
+	memcpy(pstSnsSyncInfo, &pstSnsState->astSyncInfo[0], sizeof(ISP_SNS_SYNC_INFO_S));
+	memcpy(&pstSnsState->astSyncInfo[1], &pstSnsState->astSyncInfo[0], sizeof(ISP_SNS_SYNC_INFO_S));
+	pstSnsState->au32FL[1] = pstSnsState->au32FL[0];
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_set_image_mode(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S *pstSensorImageMode)
+{
+	CVI_U8 u8SensorImageMode = 0;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSensorImageMode);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	u8SensorImageMode = pstSnsState->u8ImgMode;
+	pstSnsState->bSyncInit = CVI_FALSE;
+	if (pstSensorImageMode->f32Fps <= 30) {
+		if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+			if (OV5647_RES_IS_1080P(pstSensorImageMode->u16Width, pstSensorImageMode->u16Height))
+				u8SensorImageMode = OV5647_MODE_1920X1080P30;
+			else {
+				CVI_TRACE_SNS(CVI_DBG_ERR, "Not support! Width:%d, Height:%d, Fps:%f, WDRMode:%d\n",
+				       pstSensorImageMode->u16Width,
+				       pstSensorImageMode->u16Height,
+				       pstSensorImageMode->f32Fps,
+				       pstSnsState->enWDRMode);
+				return CVI_FAILURE;
+			}
+		} else {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Not support! Width:%d, Height:%d, Fps:%f, WDRMode:%d\n",
+			       pstSensorImageMode->u16Width,
+			       pstSensorImageMode->u16Height,
+			       pstSensorImageMode->f32Fps,
+			       pstSnsState->enWDRMode);
+			return CVI_FAILURE;
+		}
+	}
+
+	if ((pstSnsState->bInit == CVI_TRUE) && (u8SensorImageMode == pstSnsState->u8ImgMode)) {
+		/* Don't need to switch SensorImageMode */
+		return CVI_FAILURE;
+	}
+	pstSnsState->u8ImgMode = u8SensorImageMode;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_mirror_flip(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER_VOID(pstSnsState);
+	if (pstSnsState->bInit == CVI_TRUE && g_aeOv5647_MirrorFip[ViPipe] != eSnsMirrorFlip) {
+		ov5647_mirror_flip(ViPipe, eSnsMirrorFlip);
+		g_aeOv5647_MirrorFip[ViPipe] = eSnsMirrorFlip;
+	}
+}
+
+static CVI_VOID sensor_global_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER_VOID(pstSnsState);
+
+	pstSnsState->bInit = CVI_FALSE;
+	pstSnsState->bSyncInit = CVI_FALSE;
+	pstSnsState->u8ImgMode = OV5647_MODE_1920X1080P30;
+	pstSnsState->enWDRMode = WDR_MODE_NONE;
+	pstSnsState->u32FLStd  = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+	pstSnsState->au32FL[0] = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+	pstSnsState->au32FL[1] = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+
+	memset(&pstSnsState->astSyncInfo[0], 0, sizeof(ISP_SNS_SYNC_INFO_S));
+	memset(&pstSnsState->astSyncInfo[1], 0, sizeof(ISP_SNS_SYNC_INFO_S));
+}
+
+static CVI_S32 sensor_rx_attr(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *pstRxAttr)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(pstRxAttr);
+
+	memcpy(pstRxAttr, &ov5647_rx_attr, sizeof(*pstRxAttr));
+
+	pstRxAttr->img_size.width = g_astOv5647_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Width;
+	pstRxAttr->img_size.height = g_astOv5647_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Height;
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE)
+		pstRxAttr->mipi_attr.wdr_mode = CVI_MIPI_WDR_MODE_NONE;
+
+	return CVI_SUCCESS;
+
+}
+
+static CVI_S32 sensor_patch_rx_attr(RX_INIT_ATTR_S *pstRxInitAttr)
+{
+	SNS_COMBO_DEV_ATTR_S *pstRxAttr = &ov5647_rx_attr;
+	int i;
+
+	CMOS_CHECK_POINTER(pstRxInitAttr);
+
+	if (pstRxInitAttr->stMclkAttr.bMclkEn)
+		pstRxAttr->mclk.cam = pstRxInitAttr->stMclkAttr.u8Mclk;
+
+	if (pstRxInitAttr->MipiDev >= VI_MAX_DEV_NUM)
+		return CVI_SUCCESS;
+
+	pstRxAttr->devno = pstRxInitAttr->MipiDev;
+
+	if (pstRxAttr->input_mode == INPUT_MODE_MIPI) {
+		struct mipi_dev_attr_s *attr = &pstRxAttr->mipi_attr;
+
+		for (i = 0; i < MIPI_LANE_NUM + 1; i++) {
+			attr->lane_id[i] = pstRxInitAttr->as16LaneId[i];
+			attr->pn_swap[i] = pstRxInitAttr->as8PNSwap[i];
+		}
+	} else {
+		struct lvds_dev_attr_s *attr = &pstRxAttr->lvds_attr;
+
+		for (i = 0; i < MIPI_LANE_NUM + 1; i++) {
+			attr->lane_id[i] = pstRxInitAttr->as16LaneId[i];
+			attr->pn_swap[i] = pstRxInitAttr->as8PNSwap[i];
+		}
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_sensor_exp_function(ISP_SENSOR_EXP_FUNC_S *pstSensorExpFunc)
+{
+	CMOS_CHECK_POINTER(pstSensorExpFunc);
+
+	memset(pstSensorExpFunc, 0, sizeof(ISP_SENSOR_EXP_FUNC_S));
+
+	pstSensorExpFunc->pfn_cmos_sensor_init = ov5647_init;
+	pstSensorExpFunc->pfn_cmos_sensor_exit = ov5647_exit;
+	pstSensorExpFunc->pfn_cmos_sensor_global_init = sensor_global_init;
+	pstSensorExpFunc->pfn_cmos_set_image_mode = cmos_set_image_mode;
+	pstSensorExpFunc->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode;
+
+	pstSensorExpFunc->pfn_cmos_get_isp_default = cmos_get_isp_default;
+	pstSensorExpFunc->pfn_cmos_get_isp_black_level = cmos_get_blc_default;
+	pstSensorExpFunc->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info;
+
+	return CVI_SUCCESS;
+}
+
+/****************************************************************************
+ * callback structure                                                       *
+ ****************************************************************************/
+static CVI_VOID sensor_patch_i2c_addr(CVI_S32 s32I2cAddr)
+{
+	if (OV5647_I2C_ADDR_IS_VALID(s32I2cAddr))
+		ov5647_i2c_addr = s32I2cAddr;
+}
+
+static CVI_S32 ov5647_set_bus_info(VI_PIPE ViPipe, ISP_SNS_COMMBUS_U unSNSBusInfo)
+{
+	g_aunOv5647_BusInfo[ViPipe].s8I2cDev = unSNSBusInfo.s8I2cDev;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_ctx_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+
+	if (pastSnsStateCtx == CVI_NULL) {
+		pastSnsStateCtx = (ISP_SNS_STATE_S *)malloc(sizeof(ISP_SNS_STATE_S));
+		if (pastSnsStateCtx == CVI_NULL) {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Isp[%d] SnsCtx malloc memory failed!\n", ViPipe);
+			return -ENOMEM;
+		}
+	}
+
+	memset(pastSnsStateCtx, 0, sizeof(ISP_SNS_STATE_S));
+
+	OV5647_SENSOR_SET_CTX(ViPipe, pastSnsStateCtx);
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_ctx_exit(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+	SENSOR_FREE(pastSnsStateCtx);
+	OV5647_SENSOR_RESET_CTX(ViPipe);
+}
+
+static CVI_S32 sensor_register_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	CVI_S32 s32Ret;
+	ISP_SENSOR_REGISTER_S stIspRegister;
+	AE_SENSOR_REGISTER_S  stAeRegister;
+	AWB_SENSOR_REGISTER_S stAwbRegister;
+	ISP_SNS_ATTR_INFO_S   stSnsAttrInfo;
+
+	CMOS_CHECK_POINTER(pstAeLib);
+	CMOS_CHECK_POINTER(pstAwbLib);
+
+	s32Ret = sensor_ctx_init(ViPipe);
+
+	if (s32Ret != CVI_SUCCESS)
+		return CVI_FAILURE;
+
+	stSnsAttrInfo.eSensorId = OV5647_ID;
+
+	s32Ret  = cmos_init_sensor_exp_function(&stIspRegister.stSnsExp);
+	s32Ret |= CVI_ISP_SensorRegCallBack(ViPipe, &stSnsAttrInfo, &stIspRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret  = cmos_init_ae_exp_function(&stAeRegister.stAeExp);
+	s32Ret |= CVI_AE_SensorRegCallBack(ViPipe, pstAeLib, &stSnsAttrInfo, &stAeRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function to ae lib failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret  = cmos_init_awb_exp_function(&stAwbRegister.stAwbExp);
+	s32Ret |= CVI_AWB_SensorRegCallBack(ViPipe, pstAwbLib, &stSnsAttrInfo, &stAwbRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function to awb lib failed!\n");
+		return s32Ret;
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_unregister_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	CVI_S32 s32Ret;
+
+	CMOS_CHECK_POINTER(pstAeLib);
+	CMOS_CHECK_POINTER(pstAwbLib);
+
+	s32Ret = CVI_ISP_SensorUnRegCallBack(ViPipe, OV5647_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret = CVI_AE_SensorUnRegCallBack(ViPipe, pstAeLib, OV5647_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function to ae lib failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret = CVI_AWB_SensorUnRegCallBack(ViPipe, pstAwbLib, OV5647_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function to awb lib failed!\n");
+		return s32Ret;
+	}
+
+	sensor_ctx_exit(ViPipe);
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_set_init(VI_PIPE ViPipe, ISP_INIT_ATTR_S *pstInitAttr)
+{
+	CMOS_CHECK_POINTER(pstInitAttr);
+
+	g_au32InitExposure[ViPipe] = pstInitAttr->u32Exposure;
+	g_au32LinesPer500ms[ViPipe] = pstInitAttr->u32LinesPer500ms;
+	g_au16InitWBGain[ViPipe][0] = pstInitAttr->u16WBRgain;
+	g_au16InitWBGain[ViPipe][1] = pstInitAttr->u16WBGgain;
+	g_au16InitWBGain[ViPipe][2] = pstInitAttr->u16WBBgain;
+	g_au16SampleRgain[ViPipe] = pstInitAttr->u16SampleRgain;
+	g_au16SampleBgain[ViPipe] = pstInitAttr->u16SampleBgain;
+	g_au16Ov5647_GainMode[ViPipe] = pstInitAttr->enGainMode;
+	g_au16Ov5647_UseHwSync[ViPipe] = pstInitAttr->u16UseHwSync;
+
+	return CVI_SUCCESS;
+}
+static CVI_S32 sensor_probe(VI_PIPE ViPipe)
+{
+	return ov5647_probe(ViPipe);
+}
+
+ISP_SNS_OBJ_S stSnsOv5647_Obj = {
+	.pfnRegisterCallback	= sensor_register_callback,
+	.pfnUnRegisterCallback	= sensor_unregister_callback,
+	.pfnStandby		= ov5647_standby,
+	.pfnRestart		= ov5647_restart,
+	.pfnMirrorFlip		= sensor_mirror_flip,
+	.pfnWriteReg		= ov5647_write_register,
+	.pfnReadReg		= ov5647_read_register,
+	.pfnSetBusInfo		= ov5647_set_bus_info,
+	.pfnSetInit		= sensor_set_init,
+	.pfnPatchRxAttr		= sensor_patch_rx_attr,
+	.pfnPatchI2cAddr	= sensor_patch_i2c_addr,
+	.pfnGetRxAttr		= sensor_rx_attr,
+	.pfnExpSensorCb		= cmos_init_sensor_exp_function,
+	.pfnExpAeCb		= cmos_init_ae_exp_function,
+	.pfnSnsProbe		= sensor_probe,
+};
+
+
diff --git a/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos_ex.h b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos_ex.h
new file mode 100644
index 000000000..997695760
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos_ex.h
@@ -0,0 +1,89 @@
+#ifndef __OV5647_CMOS_EX_H_
+#define __OV5647_CMOS_EX_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+
+
+enum ov5647_linear_regs_e {
+	LINEAR_EXP_0,
+	LINEAR_EXP_1,
+	LINEAR_EXP_2,
+	LINEAR_AGAIN_0,
+	LINEAR_AGAIN_1,
+	LINEAR_VTS_0,
+	LINEAR_VTS_1,
+	LINEAR_REGS_NUM
+};
+
+typedef enum _OV5647_MODE_E {
+	OV5647_MODE_1920X1080P30 = 0,
+	OV5647_MODE_LINEAR_NUM,
+	OV5647_MODE_NUM
+} OV5647_MODE_E;
+
+typedef struct _OV5647_STATE_S {
+	CVI_U32		u32Sexp_MAX;
+} OV5647_STATE_S;
+
+typedef struct _OV5647_MODE_S {
+	ISP_WDR_SIZE_S astImg[2];
+	CVI_FLOAT f32MaxFps;
+	CVI_FLOAT f32MinFps;
+	CVI_U32 u32HtsDef;
+	CVI_U32 u32VtsDef;
+	CVI_U16 u16L2sOffset;
+	CVI_U16 u16TopBoundary;
+	CVI_U16 u16BotBoundary;
+	SNS_ATTR_S stExp[2];
+	SNS_ATTR_LARGE_S stAgain[2];
+	SNS_ATTR_LARGE_S stDgain[2];
+	CVI_U32 u32L2S_offset;
+	CVI_U32 u32IspResTime;
+	CVI_U32 u32HdrMargin;
+	char name[64];
+} OV5647_MODE_S;
+
+/****************************************************************************
+ * external variables and functions                                         *
+ ****************************************************************************/
+
+extern ISP_SNS_STATE_S *g_pastOv5647[VI_MAX_PIPE_NUM];
+extern ISP_SNS_COMMBUS_U g_aunOv5647_BusInfo[];
+extern CVI_U16 g_au16Ov5647_GainMode[];
+extern CVI_U16 g_au16Ov5647_UseHwSync[VI_MAX_PIPE_NUM];
+extern CVI_U8 ov5647_i2c_addr;
+extern const CVI_U32 ov5647_addr_byte;
+extern const CVI_U32 ov5647_data_byte;
+extern void ov5647_init(VI_PIPE ViPipe);
+extern void ov5647_exit(VI_PIPE ViPipe);
+extern void ov5647_standby(VI_PIPE ViPipe);
+extern void ov5647_restart(VI_PIPE ViPipe);
+extern int  ov5647_write_register(VI_PIPE ViPipe, int addr, int data);
+extern int  ov5647_read_register(VI_PIPE ViPipe, int addr);
+extern void ov5647_mirror_flip(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip);
+extern int ov5647_probe(VI_PIPE ViPipe);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __OV5647_CMOS_EX_H_ */
+
diff --git a/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos_param.h b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos_param.h
new file mode 100644
index 000000000..30aee31e7
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_cmos_param.h
@@ -0,0 +1,129 @@
+#ifndef __OV5647_CMOS_PARAM_H_
+#define __OV5647_CMOS_PARAM_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+#include "ov5647_cmos_ex.h"
+
+static const OV5647_MODE_S g_astOv5647_mode[OV5647_MODE_NUM] = {
+	[OV5647_MODE_1920X1080P30] = {
+		.name = "1920x1080p30",
+		.astImg[0] = {
+			.stSnsSize = {
+				.u32Width = 1920,
+				.u32Height = 1080,
+			},
+			.stWndRect = {
+				.s32X = 0,
+				.s32Y = 0,
+				.u32Width = 1920,
+				.u32Height = 1080,
+			},
+			.stMaxSize = {
+				.u32Width = 2592,
+				.u32Height = 1944,
+			},
+		},
+
+		.f32MaxFps = 30,
+		.f32MinFps = 0.711, /* 0x4e2 * 30 / 0xFFFF */
+		.u32HtsDef = 2416,
+		.u32VtsDef = 1104,
+		.stExp[0] = {
+			.u16Min = 4,
+			.u16Max = 1104 - 4,
+			.u16Def = 400,
+			.u16Step = 1,
+		},
+		.stAgain[0] = {
+			.u32Min = 1024,
+			.u32Max = 63448,
+			.u32Def = 1024,
+			.u32Step = 1,
+		},
+		.stDgain[0] = {
+			.u32Min = 1024,
+			.u32Max = 1024,
+			.u32Def = 1024,
+			.u32Step = 1,
+		},
+	},
+};
+
+static ISP_CMOS_BLACK_LEVEL_S g_stIspBlcCalibratio = {
+	.bUpdate = CVI_TRUE,
+	.blcAttr = {
+		.Enable = 1,
+		.enOpType = OP_TYPE_AUTO,
+		.stManual = {60, 60, 60, 60, 0, 0, 0, 0
+#ifdef ARCH_CV182X
+			, 1039, 1039, 1039, 1039
+#endif
+		},
+		.stAuto = {
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+#ifdef ARCH_CV182X
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+#endif
+		},
+	},
+};
+
+
+struct combo_dev_attr_s ov5647_rx_attr = {
+	.input_mode = INPUT_MODE_MIPI,
+	.mac_clk = RX_MAC_CLK_400M,
+	.mipi_attr = {
+		.raw_data_type = RAW_DATA_10BIT,
+		.lane_id = {0, 1, 2, -1, -1},
+		.pn_swap = {0, 0, 0, 0, 0},
+		.wdr_mode = CVI_MIPI_WDR_MODE_NONE,
+		.dphy = {
+			.enable = 1,
+			.hs_settle = 8,
+		},
+	},
+	.mclk = {
+		.cam = 0,
+		.freq = CAMPLL_FREQ_24M,
+	},
+	.devno = 0,
+};
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __OV5647_CMOS_PARAM_H_ */
+
diff --git a/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_sensor_ctl.c b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_sensor_ctl.c
new file mode 100644
index 000000000..8e2c2892d
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/ov_ov5647/ov5647_sensor_ctl.c
@@ -0,0 +1,347 @@
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <syslog.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_comm_video.h"
+#else
+#include <linux/vi_snsr.h>
+#include <linux/cvi_comm_video.h>
+#endif
+#include "cvi_sns_ctrl.h"
+#include "ov5647_cmos_ex.h"
+
+static void ov5647_linear_1080p30_init(VI_PIPE ViPipe);
+
+CVI_U8 ov5647_i2c_addr = 0x36;        /* I2C Address of OV5647 */
+const CVI_U32 ov5647_addr_byte = 2;
+const CVI_U32 ov5647_data_byte = 1;
+static int g_fd[VI_MAX_PIPE_NUM] = {[0 ... (VI_MAX_PIPE_NUM - 1)] = -1};
+
+int ov5647_i2c_init(VI_PIPE ViPipe)
+{
+
+	char acDevFile[16] = {0};
+	CVI_U8 u8DevNum;
+
+	if (g_fd[ViPipe] >= 0)
+		return CVI_SUCCESS;
+	int ret;
+
+	u8DevNum = g_aunOv5647_BusInfo[ViPipe].s8I2cDev;
+	snprintf(acDevFile, sizeof(acDevFile),  "/dev/i2c-%u", u8DevNum);
+
+	g_fd[ViPipe] = open(acDevFile, O_RDWR, 0600);
+
+	if (g_fd[ViPipe] < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Open /dev/i2c-%u error!\n", u8DevNum);
+		return CVI_FAILURE;
+	}
+
+	ret = ioctl(g_fd[ViPipe], I2C_SLAVE_FORCE, ov5647_i2c_addr);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return ret;
+	}
+	return CVI_SUCCESS;
+}
+
+int ov5647_i2c_exit(VI_PIPE ViPipe)
+{
+	if (g_fd[ViPipe] >= 0) {
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return CVI_SUCCESS;
+	}
+	return CVI_FAILURE;
+}
+
+int ov5647_read_register(VI_PIPE ViPipe, int addr)
+{
+	int ret, data;
+	CVI_U8 buf[8];
+	CVI_U8 idx = 0;
+
+	if (g_fd[ViPipe] < 0)
+		return CVI_FAILURE;
+
+	if (ov5647_addr_byte == 2)
+		buf[idx++] = (addr >> 8) & 0xff;
+
+	// add address byte 0
+	buf[idx++] = addr & 0xff;
+
+	ret = write(g_fd[ViPipe], buf, ov5647_addr_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	buf[0] = 0;
+	buf[1] = 0;
+	ret = read(g_fd[ViPipe], buf, ov5647_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	// pack read back data
+	data = 0;
+	if (ov5647_data_byte == 2) {
+		data = buf[0] << 8;
+		data += buf[1];
+	} else {
+		data = buf[0];
+	}
+
+	syslog(LOG_DEBUG, "i2c r 0x%x = 0x%x\n", addr, data);
+
+	return data;
+}
+
+int ov5647_write_register(VI_PIPE ViPipe, int addr, int data)
+{
+	CVI_U8 idx = 0;
+	int ret;
+	CVI_U8 buf[8];
+
+	if (g_fd[ViPipe] < 0)
+		return CVI_SUCCESS;
+
+	if (ov5647_addr_byte == 2) {
+		buf[idx] = (addr >> 8) & 0xff;
+		idx++;
+		buf[idx] = addr & 0xff;
+		idx++;
+	}
+
+	if (ov5647_data_byte == 1) {
+		buf[idx] = data & 0xff;
+		idx++;
+	}
+
+	ret = write(g_fd[ViPipe], buf, ov5647_addr_byte + ov5647_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_WRITE error!\n");
+		return CVI_FAILURE;
+	}
+	syslog(LOG_DEBUG, "i2c w 0x%x 0x%x\n", addr, data);
+	return CVI_SUCCESS;
+}
+
+static void delay_ms(int ms)
+{
+	usleep(ms * 1000);
+}
+
+void ov5647_standby(VI_PIPE ViPipe)
+{
+	ov5647_write_register(ViPipe, 0x0100, 0x00); /* STANDBY */
+}
+
+void ov5647_restart(VI_PIPE ViPipe)
+{
+	ov5647_write_register(ViPipe, 0x0100, 0x01); /* standby */
+}
+
+void ov5647_default_reg_init(VI_PIPE ViPipe)
+{
+	CVI_U32 i;
+	CVI_U32 start = 1;
+	CVI_U32 end = g_pastOv5647[ViPipe]->astSyncInfo[0].snsCfg.u32RegNum - 3;
+
+	for (i = start; i < end; i++) {
+		ov5647_write_register(ViPipe,
+				g_pastOv5647[ViPipe]->astSyncInfo[0].snsCfg.astI2cData[i].u32RegAddr,
+				g_pastOv5647[ViPipe]->astSyncInfo[0].snsCfg.astI2cData[i].u32Data);
+	}
+}
+
+#define OV5647_FLIP	0x3820
+#define OV5647_MIRROR	0x3821
+void ov5647_mirror_flip(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip)
+{
+	CVI_U8 flip, mirror;
+
+	flip = ov5647_read_register(ViPipe, OV5647_FLIP);
+	mirror = ov5647_read_register(ViPipe, OV5647_MIRROR);
+	flip &= ~(0x3 << 1);
+	mirror &= ~(0x3 << 1);
+
+	switch (eSnsMirrorFlip) {
+	case ISP_SNS_NORMAL:
+		break;
+	case ISP_SNS_MIRROR:
+		mirror |= 0x3 << 1;
+		break;
+	case ISP_SNS_FLIP:
+		flip |= 0x3 << 1;
+		break;
+	case ISP_SNS_MIRROR_FLIP:
+		flip |= 0x3 << 1;
+		mirror |= 0x3 << 1;
+		break;
+	default:
+		return;
+	}
+
+	ov5647_write_register(ViPipe, OV5647_FLIP, flip);
+	ov5647_write_register(ViPipe, OV5647_MIRROR, mirror);
+}
+
+#define OV5647_CHIP_ID_ADDR_H		0x300A
+#define OV5647_CHIP_ID_ADDR_L		0x300B
+#define OV5647_CHIP_ID			0x5647
+
+int ov5647_probe(VI_PIPE ViPipe)
+{
+	int nVal, nVal2;
+
+	usleep(1000);
+	if (ov5647_i2c_init(ViPipe) != CVI_SUCCESS)
+		return CVI_FAILURE;
+
+	nVal  = ov5647_read_register(ViPipe, OV5647_CHIP_ID_ADDR_H);
+	nVal2 = ov5647_read_register(ViPipe, OV5647_CHIP_ID_ADDR_L);
+	if (nVal < 0 || nVal2 < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "read sensor id error.\n");
+		return nVal;
+	}
+
+	if ((((nVal & 0xFF) << 8) | (nVal2 & 0xFF)) != OV5647_CHIP_ID) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Sensor ID Mismatch! Use the wrong sensor??\n");
+		return CVI_FAILURE;
+	}
+	return CVI_SUCCESS;
+}
+
+void ov5647_init(VI_PIPE ViPipe)
+{
+	ov5647_i2c_init(ViPipe);
+
+	delay_ms(10);
+
+	ov5647_linear_1080p30_init(ViPipe);
+
+	g_pastOv5647[ViPipe]->bInit = CVI_TRUE;
+}
+
+void ov5647_exit(VI_PIPE ViPipe)
+{
+	ov5647_i2c_exit(ViPipe);
+}
+
+/* 1080P30 */
+static void ov5647_linear_1080p30_init(VI_PIPE ViPipe)
+{
+	ov5647_write_register(ViPipe, 0x0100, 0x00);
+	ov5647_write_register(ViPipe, 0x0103, 0x01);
+	ov5647_write_register(ViPipe, 0x3035, 0x11);
+	ov5647_write_register(ViPipe, 0x3036, 0x64);
+	ov5647_write_register(ViPipe, 0x303c, 0x11);
+	ov5647_write_register(ViPipe, 0x3821, 0x00);
+	ov5647_write_register(ViPipe, 0x3820, 0x00);
+	ov5647_write_register(ViPipe, 0x370c, 0x0f);
+	ov5647_write_register(ViPipe, 0x3612, 0x5b);
+	ov5647_write_register(ViPipe, 0x3618, 0x04);
+	ov5647_write_register(ViPipe, 0x5000, 0x06);
+	ov5647_write_register(ViPipe, 0x5002, 0x40);
+	ov5647_write_register(ViPipe, 0x5003, 0x08);
+	ov5647_write_register(ViPipe, 0x5a00, 0x08);
+	ov5647_write_register(ViPipe, 0x3000, 0xff);
+	ov5647_write_register(ViPipe, 0x3001, 0xff);
+	ov5647_write_register(ViPipe, 0x3002, 0xff);
+	ov5647_write_register(ViPipe, 0x301d, 0xf0);
+	ov5647_write_register(ViPipe, 0x3503, 0x07);
+	ov5647_write_register(ViPipe, 0x3a18, 0x00);
+	ov5647_write_register(ViPipe, 0x3a19, 0xf8);
+	ov5647_write_register(ViPipe, 0x3c01, 0x80);
+	ov5647_write_register(ViPipe, 0x3b07, 0x0c);
+	ov5647_write_register(ViPipe, 0x380c, 0x09);
+	ov5647_write_register(ViPipe, 0x380d, 0x70);
+	ov5647_write_register(ViPipe, 0x380e, 0x04);
+	ov5647_write_register(ViPipe, 0x380f, 0x50);
+	ov5647_write_register(ViPipe, 0x3814, 0x11);
+	ov5647_write_register(ViPipe, 0x3815, 0x11);
+	ov5647_write_register(ViPipe, 0x3708, 0x64);
+	ov5647_write_register(ViPipe, 0x3709, 0x12);
+	ov5647_write_register(ViPipe, 0x3808, 0x07);
+	ov5647_write_register(ViPipe, 0x3809, 0x80);
+	ov5647_write_register(ViPipe, 0x380a, 0x04);
+	ov5647_write_register(ViPipe, 0x380b, 0x38);
+	ov5647_write_register(ViPipe, 0x3800, 0x01);
+	ov5647_write_register(ViPipe, 0x3801, 0x5c);
+	ov5647_write_register(ViPipe, 0x3802, 0x01);
+	ov5647_write_register(ViPipe, 0x3803, 0xb2);
+	ov5647_write_register(ViPipe, 0x3804, 0x08);
+	ov5647_write_register(ViPipe, 0x3805, 0xe3);
+	ov5647_write_register(ViPipe, 0x3806, 0x05);
+	ov5647_write_register(ViPipe, 0x3807, 0xf1);
+	ov5647_write_register(ViPipe, 0x3630, 0x2e);
+	ov5647_write_register(ViPipe, 0x3632, 0xe2);
+	ov5647_write_register(ViPipe, 0x3633, 0x23);
+	ov5647_write_register(ViPipe, 0x3634, 0x44);
+	ov5647_write_register(ViPipe, 0x3620, 0x64);
+	ov5647_write_register(ViPipe, 0x3621, 0xe0);
+	ov5647_write_register(ViPipe, 0x3600, 0x37);
+	ov5647_write_register(ViPipe, 0x3704, 0xa0);
+	ov5647_write_register(ViPipe, 0x3703, 0x5a);
+	ov5647_write_register(ViPipe, 0x3715, 0x78);
+	ov5647_write_register(ViPipe, 0x3717, 0x01);
+	ov5647_write_register(ViPipe, 0x3731, 0x02);
+	ov5647_write_register(ViPipe, 0x370b, 0x60);
+	ov5647_write_register(ViPipe, 0x3705, 0x1a);
+	ov5647_write_register(ViPipe, 0x3f05, 0x02);
+	ov5647_write_register(ViPipe, 0x3f06, 0x10);
+	ov5647_write_register(ViPipe, 0x3f01, 0x0a);
+	ov5647_write_register(ViPipe, 0x3a08, 0x01);
+	ov5647_write_register(ViPipe, 0x3a09, 0x4b);
+	ov5647_write_register(ViPipe, 0x3a0a, 0x01);
+	ov5647_write_register(ViPipe, 0x3a0b, 0x13);
+	ov5647_write_register(ViPipe, 0x3a0d, 0x04);
+	ov5647_write_register(ViPipe, 0x3a0e, 0x03);
+	ov5647_write_register(ViPipe, 0x3a0f, 0x58);
+	ov5647_write_register(ViPipe, 0x3a10, 0x50);
+	ov5647_write_register(ViPipe, 0x3a1b, 0x58);
+	ov5647_write_register(ViPipe, 0x3a1e, 0x50);
+	ov5647_write_register(ViPipe, 0x3a11, 0x60);
+	ov5647_write_register(ViPipe, 0x3a1f, 0x28);
+	ov5647_write_register(ViPipe, 0x4001, 0x02);
+	ov5647_write_register(ViPipe, 0x4004, 0x04);
+	ov5647_write_register(ViPipe, 0x4000, 0x09);
+	ov5647_write_register(ViPipe, 0x4050, 0x6e);
+	ov5647_write_register(ViPipe, 0x4051, 0x8f);
+	ov5647_write_register(ViPipe, 0x0100, 0x01);
+	ov5647_write_register(ViPipe, 0x3000, 0x00);
+	ov5647_write_register(ViPipe, 0x3001, 0x00);
+	ov5647_write_register(ViPipe, 0x3002, 0x00);
+	ov5647_write_register(ViPipe, 0x3017, 0xe0);
+	ov5647_write_register(ViPipe, 0x301c, 0xfc);
+	ov5647_write_register(ViPipe, 0x3636, 0x06);
+	ov5647_write_register(ViPipe, 0x3016, 0x08);
+	ov5647_write_register(ViPipe, 0x3827, 0xec);
+	ov5647_write_register(ViPipe, 0x3018, 0x44);
+	ov5647_write_register(ViPipe, 0x3035, 0x21);
+	ov5647_write_register(ViPipe, 0x3106, 0xf5);
+	ov5647_write_register(ViPipe, 0x3034, 0x1a);
+	ov5647_write_register(ViPipe, 0x301c, 0xf8);
+
+	ov5647_default_reg_init(ViPipe);
+
+	delay_ms(100);
+
+	printf("ViPipe:%d,===OV5647 1080P 30fps 10bit LINE Init OK!\n", ViPipe);
+}
+
+
+
+
+
diff --git a/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/Makefile b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/Makefile
new file mode 100644
index 000000000..1c908ce35
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/Makefile
@@ -0,0 +1,36 @@
+SHELL = /bin/bash
+ifeq ($(PARAM_FILE), )
+	PARAM_FILE=../../../../../../$(shell echo $(MW_VER))/Makefile.param
+	include $(PARAM_FILE)
+endif
+
+SDIR = $(PWD)
+SRCS = $(wildcard $(SDIR)/*.c)
+INCS = -I$(MW_INC) -I$(ISP_INC) -I$(KERNEL_INC) -I./include
+OBJS = $(SRCS:.c=.o)
+DEPS = $(SRCS:.c=.d)
+TARGET_A = $(MW_LIB)/libsns_tp2825.a
+TARGET_SO = $(MW_LIB)/libsns_tp2825.so
+
+EXTRA_CFLAGS = $(INCS) $(PROJ_CFLAGS)
+EXTRA_LDFLAGS =
+
+.PHONY : clean all
+all : $(TARGET_A) $(TARGET_SO)
+
+$(SDIR)/%.o: $(SDIR)/%.c
+	@$(CC) $(DEPFLAGS) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
+	@echo [$(notdir $(CC))] $(notdir $@)
+
+$(TARGET_A): $(OBJS)
+	@$(AR) $(ARFLAGS) $@ $(OBJS)
+	@echo -e $(YELLOW)[LINK]$(END)[$(notdir $(AR))] $(notdir $@)
+
+$(TARGET_SO): $(OBJS)
+	@$(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -o $@ --start-group $(OBJS) --end-group
+	@echo -e $(GREEN)[LINK]$(END)[$(notdir $(LD))] $(notdir $@)
+
+clean:
+	@rm -f $(OBJS) $(DEPS) $(TARGET_A) $(TARGET_SO)
+
+-include $(DEPS)
diff --git a/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos.c b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos.c
new file mode 100644
index 000000000..605760f89
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos.c
@@ -0,0 +1,277 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <syslog.h>
+#include <errno.h>
+#include <unistd.h>
+#ifdef ARCH_CV182X
+#include "cvi_type.h"
+#include "cvi_comm_video.h"
+#include <linux/cvi_vip_snsr.h>
+#else
+#include <linux/cvi_type.h>
+#include <linux/cvi_comm_video.h>
+#include <linux/vi_snsr.h>
+#endif
+#include "cvi_debug.h"
+#include "cvi_comm_sns.h"
+#include "cvi_sns_ctrl.h"
+#include "cvi_ae_comm.h"
+#include "cvi_awb_comm.h"
+#include "cvi_ae.h"
+#include "cvi_awb.h"
+#include "cvi_isp.h"
+#include "tp2825_cmos_ex.h"
+#include "tp2825_cmos_param.h"
+
+/****************************************************************************
+ * global variables                                                         *
+ ****************************************************************************/
+
+ISP_SNS_COMMBUS_U g_auntp2825_BusInfo[VI_MAX_PIPE_NUM] = {
+	[0] = { .s8I2cDev = 0},
+	[1 ... VI_MAX_PIPE_NUM - 1] = { .s8I2cDev = -1}
+};
+
+ISP_SNS_STATE_S *g_pasttp2825[VI_MAX_PIPE_NUM] = {CVI_NULL};
+
+#define TP2825_SENSOR_GET_CTX(dev, pstCtx)   (pstCtx = g_pasttp2825[dev])
+#define TP2825_SENSOR_SET_CTX(dev, pstCtx)   (g_pasttp2825[dev] = pstCtx)
+#define TP2825_SENSOR_RESET_CTX(dev)         (g_pasttp2825[dev] = CVI_NULL)
+
+#define TP2825_RES_IS_1440P(w, h)      ((w) <= 2560 && (h) <= 1440)
+#define TP2825_ID 0x2825
+/****************************************************************************
+ * local variables and functions                                            *
+ ****************************************************************************/
+static CVI_S32 cmos_get_wdr_size(VI_PIPE ViPipe, ISP_SNS_ISP_INFO_S *pstIspCfg)
+{
+	const tp2825_MODE_S *pstMode = CVI_NULL;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstMode = &g_asttp2825_mode[pstSnsState->u8ImgMode];
+	pstIspCfg->frm_num = 1;
+	memcpy(&pstIspCfg->img_size[0], &pstMode->astImg[0], sizeof(ISP_WDR_SIZE_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_sns_regs_info(VI_PIPE ViPipe, ISP_SNS_SYNC_INFO_S *pstSnsSyncInfo)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_SYNC_INFO_S *pstCfg0 = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSnsSyncInfo);
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstCfg0 = &pstSnsState->astSyncInfo[0];
+	cmos_get_wdr_size(ViPipe, &pstCfg0->ispCfg);
+	memcpy(pstSnsSyncInfo, &pstSnsState->astSyncInfo[0], sizeof(ISP_SNS_SYNC_INFO_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_set_image_mode(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S *pstSensorImageMode)
+{
+	CVI_U8 u8SensorImageMode = 0;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSensorImageMode);
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	u8SensorImageMode = pstSnsState->u8ImgMode;
+
+	if (pstSensorImageMode->f32Fps <= 30) {
+		if (TP2825_RES_IS_1440P(pstSensorImageMode->u16Width, pstSensorImageMode->u16Height)) {
+			u8SensorImageMode = TP2825_MODE_1440P_30P;
+		} else {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Not support! Width:%d, Height:%d, Fps:%f, WDRMode:%d\n",
+				pstSensorImageMode->u16Width,
+				pstSensorImageMode->u16Height,
+				pstSensorImageMode->f32Fps,
+				pstSnsState->enWDRMode);
+			return CVI_FAILURE;
+		}
+	}
+
+	if ((pstSnsState->bInit == CVI_TRUE) && (u8SensorImageMode == pstSnsState->u8ImgMode)) {
+		/* Don't need to switch SensorImageMode */
+		return CVI_FAILURE;
+	}
+
+	pstSnsState->u8ImgMode = u8SensorImageMode;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_global_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER_VOID(pstSnsState);
+
+	pstSnsState->bInit = CVI_FALSE;
+	pstSnsState->u8ImgMode = TP2825_MODE_1440P_30P;
+	pstSnsState->enWDRMode = WDR_MODE_NONE;
+}
+
+static CVI_S32 sensor_rx_attr(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *pstRxAttr)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(pstRxAttr);
+
+	memcpy(pstRxAttr, &tp2825_rx_attr, sizeof(*pstRxAttr));
+	//CVI_TRACE_SNS(CVI_DBG_INFO, "get tp2825_rx0_attr\n");
+
+	pstRxAttr->img_size.width = g_asttp2825_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Width;
+	pstRxAttr->img_size.height = g_asttp2825_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Height;
+
+	return CVI_SUCCESS;
+
+}
+
+static CVI_S32 sensor_patch_rx_attr(RX_INIT_ATTR_S *pstRxInitAttr)
+{
+	SNS_COMBO_DEV_ATTR_S *pstRxAttr = &tp2825_rx_attr;
+
+
+	CMOS_CHECK_POINTER(pstRxInitAttr);
+
+	if (pstRxInitAttr->stMclkAttr.bMclkEn)
+		pstRxAttr->mclk.cam = pstRxInitAttr->stMclkAttr.u8Mclk;
+
+	if (pstRxInitAttr->MipiDev >= VI_MAX_DEV_NUM)
+		return CVI_SUCCESS;
+
+	pstRxAttr->devno = pstRxInitAttr->MipiDev;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_sensor_exp_function(ISP_SENSOR_EXP_FUNC_S *pstSensorExpFunc)
+{
+	CMOS_CHECK_POINTER(pstSensorExpFunc);
+
+	memset(pstSensorExpFunc, 0, sizeof(ISP_SENSOR_EXP_FUNC_S));
+
+	pstSensorExpFunc->pfn_cmos_sensor_init = tp2825_init;
+	pstSensorExpFunc->pfn_cmos_sensor_exit = tp2825_exit;
+	pstSensorExpFunc->pfn_cmos_sensor_global_init = sensor_global_init;
+	pstSensorExpFunc->pfn_cmos_set_image_mode = cmos_set_image_mode;
+	pstSensorExpFunc->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info;
+	return CVI_SUCCESS;
+}
+
+/****************************************************************************
+ * callback structure                                                       *
+ ****************************************************************************/
+
+static CVI_S32 tp2825_set_bus_info(VI_PIPE ViPipe, ISP_SNS_COMMBUS_U unSNSBusInfo)
+{
+	g_auntp2825_BusInfo[ViPipe].s8I2cDev = unSNSBusInfo.s8I2cDev;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_ctx_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+
+	if (pastSnsStateCtx == CVI_NULL) {
+		pastSnsStateCtx = (ISP_SNS_STATE_S *)malloc(sizeof(ISP_SNS_STATE_S));
+		if (pastSnsStateCtx == CVI_NULL) {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Isp[%d] SnsCtx malloc memory failed!\n", ViPipe);
+			return -ENOMEM;
+		}
+	}
+
+	memset(pastSnsStateCtx, 0, sizeof(ISP_SNS_STATE_S));
+
+	TP2825_SENSOR_SET_CTX(ViPipe, pastSnsStateCtx);
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_ctx_exit(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+	SENSOR_FREE(pastSnsStateCtx);
+	TP2825_SENSOR_RESET_CTX(ViPipe);
+}
+
+static CVI_S32 sensor_register_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	(void) pstAeLib;
+	(void) pstAwbLib;
+
+	CVI_S32 s32Ret;
+	ISP_SENSOR_REGISTER_S stIspRegister;
+	ISP_SNS_ATTR_INFO_S   stSnsAttrInfo;
+
+	s32Ret = sensor_ctx_init(ViPipe);
+
+	if (s32Ret != CVI_SUCCESS)
+		return CVI_FAILURE;
+
+	stSnsAttrInfo.eSensorId = TP2825_ID;
+
+	s32Ret  = cmos_init_sensor_exp_function(&stIspRegister.stSnsExp);
+	s32Ret |= CVI_ISP_SensorRegCallBack(ViPipe, &stSnsAttrInfo, &stIspRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function failed!\n");
+		return s32Ret;
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_unregister_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	(void) pstAeLib;
+	(void) pstAwbLib;
+
+	CVI_S32 s32Ret;
+
+	s32Ret = CVI_ISP_SensorUnRegCallBack(ViPipe, TP2825_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function failed!\n");
+		return s32Ret;
+	}
+
+	sensor_ctx_exit(ViPipe);
+
+	return CVI_SUCCESS;
+}
+
+ISP_SNS_OBJ_S stSnsTP2825_Obj = {
+	.pfnRegisterCallback    = sensor_register_callback,
+	.pfnUnRegisterCallback  = sensor_unregister_callback,
+	.pfnMirrorFlip          = CVI_NULL,
+	.pfnStandby             = CVI_NULL,
+	.pfnRestart             = CVI_NULL,
+	.pfnWriteReg            = tp2825_write_register,
+	.pfnReadReg             = tp2825_read_register,
+	.pfnSetBusInfo          = tp2825_set_bus_info,
+	.pfnSetInit             = CVI_NULL,
+	.pfnPatchRxAttr         = sensor_patch_rx_attr,
+	.pfnPatchI2cAddr        = CVI_NULL,
+	.pfnGetRxAttr           = sensor_rx_attr,
+	.pfnExpSensorCb         = cmos_init_sensor_exp_function,
+	.pfnExpAeCb             = CVI_NULL,
+	.pfnSnsProbe            = CVI_NULL,};
+
diff --git a/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_ctrl.c b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_ctrl.c
new file mode 100644
index 000000000..9a23499cc
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_ctrl.c
@@ -0,0 +1,425 @@
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <syslog.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+#include <stdlib.h>
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_comm_video.h"
+#else
+#include <linux/vi_snsr.h>
+#include <linux/cvi_comm_video.h>
+#endif
+#include <pthread.h>
+#include <signal.h>
+#include "cvi_sns_ctrl.h"
+#include "tp2825_cmos_ex.h"
+
+const CVI_U8 tp2825_i2c_addr = 0x45;        /* I2C slave address of tp2825, SA0=0:0x44, SA0=1:0x45*/
+const CVI_U32 tp2825_addr_byte = 1;
+const CVI_U32 tp2825_data_byte = 1;
+static int g_fd[VI_MAX_PIPE_NUM] = {[0 ... (VI_MAX_PIPE_NUM - 1)] = -1};
+static pthread_t g_tp2825_thid;
+
+
+#define SYSFS_GPIO_DIR "/sys/class/gpio"
+#define MAX_BUF 64
+
+#define tp2825_BLUE_SCREEN 0
+
+
+enum CVI_GPIO_NUM_E {
+CVI_GPIOD_00 = 404,
+CVI_GPIOD_01,   CVI_GPIOD_02,   CVI_GPIOD_03,   CVI_GPIOD_04,   CVI_GPIOD_05,
+CVI_GPIOD_06,   CVI_GPIOD_07,   CVI_GPIOD_08,   CVI_GPIOD_09,   CVI_GPIOD_10,
+CVI_GPIOD_11,
+CVI_GPIOC_00 = 416,
+CVI_GPIOC_01,   CVI_GPIOC_02,   CVI_GPIOC_03,   CVI_GPIOC_04,   CVI_GPIOC_05,
+CVI_GPIOC_06,   CVI_GPIOC_07,   CVI_GPIOC_08,   CVI_GPIOC_09,   CVI_GPIOC_10,
+CVI_GPIOC_11,   CVI_GPIOC_12,   CVI_GPIOC_13,   CVI_GPIOC_14,   CVI_GPIOC_15,
+CVI_GPIOC_16,   CVI_GPIOC_17,   CVI_GPIOC_18,   CVI_GPIOC_19,   CVI_GPIOC_20,
+CVI_GPIOC_21,   CVI_GPIOC_22,   CVI_GPIOC_23,   CVI_GPIOC_24,   CVI_GPIOC_25,
+CVI_GPIOC_26,   CVI_GPIOC_27,   CVI_GPIOC_28,   CVI_GPIOC_29,   CVI_GPIOC_30,
+CVI_GPIOC_31,
+CVI_GPIOB_00 = 448,
+CVI_GPIOB_01,   CVI_GPIOB_02,   CVI_GPIOB_03,   CVI_GPIOB_04,   CVI_GPIOB_05,
+CVI_GPIOB_06,   CVI_GPIOB_07,   CVI_GPIOB_08,   CVI_GPIOB_09,   CVI_GPIOB_10,
+CVI_GPIOB_11,   CVI_GPIOB_12,   CVI_GPIOB_13,   CVI_GPIOB_14,   CVI_GPIOB_15,
+CVI_GPIOB_16,   CVI_GPIOB_17,   CVI_GPIOB_18,   CVI_GPIOB_19,   CVI_GPIOB_20,
+CVI_GPIOB_21,   CVI_GPIOB_22,   CVI_GPIOB_23,   CVI_GPIOB_24,   CVI_GPIOB_25,
+CVI_GPIOB_26,   CVI_GPIOB_27,   CVI_GPIOB_28,   CVI_GPIOB_29,   CVI_GPIOB_30,
+CVI_GPIOB_31,
+CVI_GPIOA_00 = 480,
+CVI_GPIOA_01,   CVI_GPIOA_02,   CVI_GPIOA_03,   CVI_GPIOA_04,   CVI_GPIOA_05,
+CVI_GPIOA_06,   CVI_GPIOA_07,   CVI_GPIOA_08,   CVI_GPIOA_09,   CVI_GPIOA_10,
+CVI_GPIOA_11,   CVI_GPIOA_12,   CVI_GPIOA_13,   CVI_GPIOA_14,   CVI_GPIOA_15,
+CVI_GPIOA_16,   CVI_GPIOA_17,   CVI_GPIOA_18,   CVI_GPIOA_19,   CVI_GPIOA_20,
+CVI_GPIOA_21,   CVI_GPIOA_22,   CVI_GPIOA_23,   CVI_GPIOA_24,   CVI_GPIOA_25,
+CVI_GPIOA_26,   CVI_GPIOA_27,   CVI_GPIOA_28,   CVI_GPIOA_29,   CVI_GPIOA_30,
+CVI_GPIOA_31,
+};
+
+#define CVI_GPIO_MIN CVI_GPIOD_00
+#define CVI_GPIO_MAX CVI_GPIOA_31
+
+#define SYSFS_GPIO_DIR "/sys/class/gpio"
+#define MAX_BUF 64
+static int TP2825_GPIO_Export(unsigned int gpio)
+{
+	int fd, len;
+	char buf[MAX_BUF];
+
+	fd = open(SYSFS_GPIO_DIR"/export", O_WRONLY);
+	if (fd < 0) {
+		perror("gpio/export");
+		return fd;
+	}
+
+	len = snprintf(buf, sizeof(buf), "%d", gpio);
+	write(fd, buf, len);
+	close(fd);
+
+	return 0;
+}
+
+static int TP2825_GPIO_SetDirection(unsigned int gpio, unsigned int out_flag)
+{
+	int fd;
+	char buf[MAX_BUF];
+
+	snprintf(buf, sizeof(buf), SYSFS_GPIO_DIR"/gpio%d/direction", gpio);
+	if (access(buf, 0) == -1)
+		TP2825_GPIO_Export(gpio);
+
+	fd = open(buf, O_WRONLY);
+	if (fd < 0) {
+		perror("gpio/direction");
+		return fd;
+	}
+	//printf("mark %d , %s\n",out_flag, buf);
+	if (out_flag)
+		write(fd, "out", 4);
+	else
+		write(fd, "in", 3);
+
+	close(fd);
+	return 0;
+}
+static int TP2825_GPIO_SetValue(unsigned int gpio, unsigned int value)
+{
+	int fd;
+	char buf[MAX_BUF];
+
+	snprintf(buf, sizeof(buf), SYSFS_GPIO_DIR"/gpio%d/value", gpio);
+	if (access(buf, 0) == -1)
+		TP2825_GPIO_Export(gpio);
+
+	TP2825_GPIO_SetDirection(gpio, 1); //output
+
+	fd = open(buf, O_WRONLY);
+	if (fd < 0) {
+		perror("gpio/set-value");
+		return fd;
+	}
+
+	if (value)
+		write(fd, "1", 2);
+	else
+		write(fd, "0", 2);
+
+	close(fd);
+	return 0;
+}
+
+int tp2825_sys_init(VI_PIPE ViPipe)
+{
+	(void) ViPipe;
+
+#ifdef AHD_PWR_EN
+	if (PR2020_GPIO_SetValue(CVI_GPIOA_00, 1) != 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "set power down gpio error!\n");
+		return CVI_FAILURE;
+	}
+#endif
+	//PR2K_RST
+	if (TP2825_GPIO_SetValue(CVI_GPIOB_12, 1) != 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "set reset gpio error!\n");
+		return CVI_FAILURE;
+	}
+#ifdef BACK_DET
+	if (PR2020_GPIO_SetValue(CVI_GPIOD_01, 1) != 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "set back detect gpio error!\n");
+		return CVI_FAILURE;
+	}
+#endif
+	return CVI_SUCCESS;
+}
+
+int tp2825_i2c_init(VI_PIPE ViPipe)
+{
+	char acDevFile[16] = {0};
+	CVI_U8 u8DevNum;
+	int ret;
+
+	if (g_fd[ViPipe] >= 0)
+		return CVI_SUCCESS;
+
+	u8DevNum = g_auntp2825_BusInfo[ViPipe].s8I2cDev;
+	snprintf(acDevFile, sizeof(acDevFile),  "/dev/i2c-%u", u8DevNum);
+	syslog(LOG_DEBUG, "open %s\n", acDevFile);
+
+	g_fd[ViPipe] = open(acDevFile, O_RDWR, 0600);
+
+	if (g_fd[ViPipe] < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Open /dev/cvi_i2c_drv-%u error!\n", u8DevNum);
+		return CVI_FAILURE;
+	}
+
+	ret = ioctl(g_fd[ViPipe], I2C_SLAVE_FORCE, tp2825_i2c_addr);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return ret;
+	}
+
+	return CVI_SUCCESS;
+}
+
+int tp2825_i2c_exit(VI_PIPE ViPipe)
+{
+	if (g_fd[ViPipe] >= 0) {
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return CVI_SUCCESS;
+	}
+	return CVI_FAILURE;
+}
+
+int tp2825_read_register(VI_PIPE ViPipe, int addr)
+{
+	int ret, data;
+	CVI_U8 buf[8];
+	CVI_U8 idx = 0;
+
+	if (g_fd[ViPipe] < 0)
+		return 0;
+
+	if (tp2825_addr_byte == 2)
+		buf[idx++] = (addr >> 8) & 0xff;
+
+	// add address byte 0
+	buf[idx++] = addr & 0xff;
+
+	ret = write(g_fd[ViPipe], buf, tp2825_addr_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	buf[0] = 0;
+	buf[1] = 0;
+	ret = read(g_fd[ViPipe], buf, tp2825_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	// pack read back data
+	data = 0;
+	if (tp2825_data_byte == 2) {
+		data = buf[0] << 8;
+		data += buf[1];
+	} else {
+		data = buf[0];
+	}
+	printf("i2c r 0x%x = 0x%x\n", addr, data);
+	syslog(LOG_DEBUG, "i2c r 0x%x = 0x%x\n", addr, data);
+	return data;
+}
+
+int tp2825_write_register(VI_PIPE ViPipe, int addr, int data)
+{
+	CVI_U8 idx = 0;
+	int ret;
+	CVI_U8 buf[8];
+
+	if (g_fd[ViPipe] < 0)
+		return CVI_SUCCESS;
+
+	if (tp2825_addr_byte == 2)
+		buf[idx++] = (addr >> 8) & 0xff;
+
+	// add address byte 0
+	buf[idx++] = addr & 0xff;
+
+	if (tp2825_data_byte == 2)
+		buf[idx++] = (data >> 8) & 0xff;
+
+	// add data byte 0
+	buf[idx++] = data & 0xff;
+
+	ret = write(g_fd[ViPipe], buf, tp2825_addr_byte + tp2825_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_WRITE error!\n");
+		return CVI_FAILURE;
+	}
+	syslog(LOG_DEBUG, "i2c w 0x%x 0x%x\n", addr, data);
+
+	return CVI_SUCCESS;
+}
+static void delay_ms(int ms)
+{
+	usleep(ms * 1000);
+}
+
+void tp2825_init_setting(VI_PIPE ViPipe, CVI_U8 mode)
+{
+	//unsigned char tmp;
+	tp2825_write_register(ViPipe, 0x02, 0x50);//Mpage
+	tp2825_write_register(ViPipe, 0x05, 0x00);
+	tp2825_write_register(ViPipe, 0x06, 0x32);
+	tp2825_write_register(ViPipe, 0x07, 0xC0);
+	tp2825_write_register(ViPipe, 0x08, 0x00);
+	tp2825_write_register(ViPipe, 0x09, 0x24);
+	tp2825_write_register(ViPipe, 0x0A, 0x48);
+	tp2825_write_register(ViPipe, 0x0B, 0xC0);
+	tp2825_write_register(ViPipe, 0x0C, 0x03);
+	tp2825_write_register(ViPipe, 0x0D, 0x50);
+	tp2825_write_register(ViPipe, 0x0E, 0x00);
+	tp2825_write_register(ViPipe, 0x0F, 0x00);
+	tp2825_write_register(ViPipe, 0x10, 0x00);
+	tp2825_write_register(ViPipe, 0x11, 0x40);
+	tp2825_write_register(ViPipe, 0x12, 0x60);
+	tp2825_write_register(ViPipe, 0x13, 0x00);
+	tp2825_write_register(ViPipe, 0x14, 0x00);
+	tp2825_write_register(ViPipe, 0x15, 0x23);
+	tp2825_write_register(ViPipe, 0x16, 0x1B);
+	tp2825_write_register(ViPipe, 0x17, 0x00);
+	tp2825_write_register(ViPipe, 0x18, 0x38);
+	tp2825_write_register(ViPipe, 0x19, 0xA0);
+	tp2825_write_register(ViPipe, 0x1A, 0x5A);
+	tp2825_write_register(ViPipe, 0x1B, 0x00);
+	//PAGE0
+	if (mode == TP2825_MODE_1440P_30P) {
+		tp2825_write_register(ViPipe, 0x1C, 0x0C);
+		tp2825_write_register(ViPipe, 0x1D, 0xE2);
+	} else if (mode == TP2825_MODE_1440P_25P) {
+		tp2825_write_register(ViPipe, 0x1C, 0x0F);
+		tp2825_write_register(ViPipe, 0x1D, 0x76);
+	}
+	tp2825_write_register(ViPipe, 0x1E, 0x80);
+	tp2825_write_register(ViPipe, 0x1F, 0x80);
+	tp2825_write_register(ViPipe, 0x20, 0x50);
+	tp2825_write_register(ViPipe, 0x21, 0x84);
+	tp2825_write_register(ViPipe, 0x22, 0x36);
+	tp2825_write_register(ViPipe, 0x23, 0x3C);
+	tp2825_write_register(ViPipe, 0x24, 0x04);
+	tp2825_write_register(ViPipe, 0x25, 0xFF);
+	tp2825_write_register(ViPipe, 0x26, 0x05);
+	tp2825_write_register(ViPipe, 0x27, 0xAD);
+	tp2825_write_register(ViPipe, 0x28, 0x00);
+	tp2825_write_register(ViPipe, 0x29, 0x48);
+	tp2825_write_register(ViPipe, 0x2A, 0x30);
+	tp2825_write_register(ViPipe, 0x2B, 0x60);
+	tp2825_write_register(ViPipe, 0x2C, 0x2A);
+	tp2825_write_register(ViPipe, 0x2D, 0x58);
+	tp2825_write_register(ViPipe, 0x2E, 0x70);
+	tp2825_write_register(ViPipe, 0x2F, 0x00);
+	tp2825_write_register(ViPipe, 0x30, 0x74);
+	tp2825_write_register(ViPipe, 0x31, 0x58);
+	tp2825_write_register(ViPipe, 0x32, 0x9F);
+	tp2825_write_register(ViPipe, 0x33, 0x60);
+	tp2825_write_register(ViPipe, 0x34, 0x00);
+	tp2825_write_register(ViPipe, 0x35, 0x15);
+	tp2825_write_register(ViPipe, 0x36, 0xDC);
+	tp2825_write_register(ViPipe, 0x37, 0x00);
+	tp2825_write_register(ViPipe, 0x38, 0x40);
+	tp2825_write_register(ViPipe, 0x39, 0x48);
+	tp2825_write_register(ViPipe, 0x3A, 0x12);
+	tp2825_write_register(ViPipe, 0x3B, 0x26);
+	tp2825_write_register(ViPipe, 0x3C, 0x00);
+	tp2825_write_register(ViPipe, 0x3D, 0x60);
+	tp2825_write_register(ViPipe, 0x3E, 0x00);
+	tp2825_write_register(ViPipe, 0x3F, 0x00);
+	tp2825_write_register(ViPipe, 0x40, 0x00);
+	tp2825_write_register(ViPipe, 0x41, 0x00);
+	tp2825_write_register(ViPipe, 0x42, 0x00);
+	tp2825_write_register(ViPipe, 0x43, 0x00);
+	tp2825_write_register(ViPipe, 0x44, 0x00);
+	tp2825_write_register(ViPipe, 0x45, 0x00);
+	tp2825_write_register(ViPipe, 0x46, 0x00);
+	tp2825_write_register(ViPipe, 0x47, 0x00);
+	tp2825_write_register(ViPipe, 0x48, 0x00);
+	tp2825_write_register(ViPipe, 0x49, 0x00);
+	tp2825_write_register(ViPipe, 0x4A, 0x00);
+	tp2825_write_register(ViPipe, 0x4B, 0x00);
+	tp2825_write_register(ViPipe, 0x4C, 0x43);
+	tp2825_write_register(ViPipe, 0x4D, 0x00);
+	tp2825_write_register(ViPipe, 0x4E, 0x0D);
+	tp2825_write_register(ViPipe, 0x4F, 0x00);
+	tp2825_write_register(ViPipe, 0xF0, 0x00);
+	tp2825_write_register(ViPipe, 0xF1, 0x00);
+	tp2825_write_register(ViPipe, 0xF2, 0x00);
+	tp2825_write_register(ViPipe, 0xF3, 0x00);
+	tp2825_write_register(ViPipe, 0xF4, 0x20);
+	tp2825_write_register(ViPipe, 0xF5, 0x10);
+	tp2825_write_register(ViPipe, 0xF6, 0x00);
+	tp2825_write_register(ViPipe, 0xF7, 0x00);
+	tp2825_write_register(ViPipe, 0xF8, 0x00);
+	tp2825_write_register(ViPipe, 0xF9, 0x00);
+	tp2825_write_register(ViPipe, 0xFA, 0x03);
+	tp2825_write_register(ViPipe, 0xFB, 0x00);
+	tp2825_write_register(ViPipe, 0xFC, 0x00);
+
+	printf("ViPipe:%d,===tp28251440P 30fps 10bit LINE Init OK!===\n", ViPipe);
+}
+
+void tp2825_init(VI_PIPE ViPipe)
+{
+	if (tp2825_sys_init(ViPipe) != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "TP2825 sys init fail\n");
+		return;
+	}
+
+	delay_ms(20);
+
+	if (tp2825_i2c_init(ViPipe) != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "TP2825 i2c init fail\n");
+		return;
+	}
+
+	syslog(LOG_DEBUG, "Loading Techpoint tp2825 sensor\n");
+
+	// check sensor chip id
+	tp2825_write_register(ViPipe, 0x40, 0x0);
+	if (tp2825_read_register(ViPipe, 0xfe) != 0x28 ||
+		tp2825_read_register(ViPipe, 0xff) != 0x25) {
+		syslog(LOG_DEBUG, "read tp2825 chip id fail\n");
+		return;
+	}
+
+	if (g_pasttp2825[ViPipe]->u8ImgMode == TP2825_MODE_1440P_30P)
+		syslog(LOG_DEBUG, "Techpoint tp2825 1440 30FPS\n");
+	else
+		syslog(LOG_DEBUG, "Techpoint tp2825 1440 25FPS\n");
+
+	tp2825_init_setting(ViPipe, g_pasttp2825[ViPipe]->u8ImgMode);
+#if tp2825_BLUE_SCREEN
+	tp2825_write_register(ViPipe, 0x40, 0x00);
+	tp2825_write_register(ViPipe, 0x2A, 0x34);
+#endif
+}
+
+void tp2825_exit(VI_PIPE ViPipe)
+{
+	if (g_tp2825_thid)
+		pthread_kill(g_tp2825_thid, SIGQUIT);
+
+	tp2825_i2c_exit(ViPipe);
+}
diff --git a/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_ex.h b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_ex.h
new file mode 100644
index 000000000..33dd03f77
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_ex.h
@@ -0,0 +1,62 @@
+#ifndef __tp2825_CMOS_EX_H_
+#define __tp2825_CMOS_EX_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+typedef enum _tp2825_MODE_E {
+	TP2825_MODE_1440P_25P,
+	TP2825_MODE_1440P_30P,
+	TP2825_MODE_NUM
+} tp2825_MODE_E;
+
+typedef struct _tp2825_MODE_S {
+	ISP_WDR_SIZE_S astImg[2];
+	CVI_FLOAT f32MaxFps;
+	CVI_FLOAT f32MinFps;
+	CVI_U32 u32HtsDef;
+	CVI_U32 u32VtsDef;
+	SNS_ATTR_S stExp[2];
+	SNS_ATTR_S stAgain[2];
+	SNS_ATTR_S stDgain[2];
+	CVI_U8 u8DgainReg;
+	char name[64];
+} tp2825_MODE_S;
+
+/****************************************************************************
+ * external variables and functions                                         *
+ ****************************************************************************/
+
+extern ISP_SNS_STATE_S *g_pasttp2825[VI_MAX_PIPE_NUM];
+extern ISP_SNS_COMMBUS_U g_auntp2825_BusInfo[];
+extern const CVI_U8 tp2825_i2c_addr;
+extern const CVI_U32 tp2825_addr_byte;
+extern const CVI_U32 tp2825_data_byte;
+extern void tp2825_init(VI_PIPE ViPipe);
+extern void tp2825_exit(VI_PIPE ViPipe);
+extern void tp2825_standby(VI_PIPE ViPipe);
+extern void tp2825_restart(VI_PIPE ViPipe);
+extern int  tp2825_write_register(VI_PIPE ViPipe, int addr, int data);
+extern int  tp2825_read_register(VI_PIPE ViPipe, int addr);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __tp2825_CMOS_EX_H_ */
diff --git a/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_param.h b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_param.h
new file mode 100644
index 000000000..29f1a109e
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv180x/techpoint_tp2825/tp2825_cmos_param.h
@@ -0,0 +1,89 @@
+#ifndef __tp2825_CMOS_PARAM_H_
+#define __tp2825_CMOS_PARAM_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+#include "tp2825_cmos_ex.h"
+
+static const tp2825_MODE_S g_asttp2825_mode[TP2825_MODE_NUM] = {
+	[TP2825_MODE_1440P_30P] = {
+		.name = "1440p30",
+		.astImg[0] = {
+			.stSnsSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stWndRect = {
+				.s32X = 0,
+				.s32Y = 0,
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stMaxSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+		},
+	},
+	[TP2825_MODE_1440P_25P] = {
+		.name = "1440p30",
+		.astImg[0] = {
+			.stSnsSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stWndRect = {
+				.s32X = 0,
+				.s32Y = 0,
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stMaxSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+		},
+	},
+};
+
+struct combo_dev_attr_s tp2825_rx_attr = {
+	.input_mode = INPUT_MODE_BT1120,
+	.mac_clk = RX_MAC_CLK_400M,
+	.mclk = {
+		.cam = 0,
+		.freq = CAMPLL_FREQ_NONE,
+	},
+	.ttl_attr = {
+		.vi = TTL_VI_SRC_VI1,
+		.func = {
+			-1, -1, -1, -1,
+			0, 1, 2, 3, 4, 5, 6, 7,
+			12, 11, 14, 13,
+			8, 15, 10, 9,
+		},
+	},
+	.devno = 0,
+};
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __tp2825_CMOS_PARAM_H_ */
diff --git a/middleware/v2/component/isp/sensor/cv181x/Makefile b/middleware/v2/component/isp/sensor/cv181x/Makefile
index 08954a6b3..df18c95bc 100644
--- a/middleware/v2/component/isp/sensor/cv181x/Makefile
+++ b/middleware/v2/component/isp/sensor/cv181x/Makefile
@@ -71,6 +71,9 @@ ov_os08a20:
 ov_ov4689:
 	$(call MAKE_SENSOR, ${@})
 
+ov_ov5647:
+	$(call MAKE_SENSOR, ${@})
+
 ov_ov6211:
 	$(call MAKE_SENSOR, ${@})
 
@@ -176,6 +179,9 @@ sony_imx327_sublvds:
 sony_imx335:
 	$(call MAKE_SENSOR, ${@})
 
+techpoint_tp2825:
+	$(call MAKE_SENSOR, ${@})
+
 all_sensor:
 	@$(MAKE) -f Makefile_full || exit 1;
 
diff --git a/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/Makefile b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/Makefile
new file mode 100644
index 000000000..7ae38111f
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/Makefile
@@ -0,0 +1,37 @@
+SHELL = /bin/bash
+ifeq ($(PARAM_FILE), )
+	PARAM_FILE=../../../../../../$(shell echo $(MW_VER))/Makefile.param
+	include $(PARAM_FILE)
+endif
+
+SDIR = $(PWD)
+SRCS = $(wildcard $(SDIR)/*.c)
+INCS = -I$(MW_INC) -I$(ISP_INC) -I$(KERNEL_INC) -I./include
+OBJS = $(SRCS:.c=.o)
+DEPS = $(SRCS:.c=.d)
+TARGET_A = $(MW_LIB)/libsns_ov5647.a
+TARGET_SO = $(MW_LIB)/libsns_ov5647.so
+
+EXTRA_CFLAGS = $(INCS) $(PROJ_CFLAGS)
+EXTRA_LDFLAGS =
+
+.PHONY : clean all
+all : $(TARGET_A) $(TARGET_SO)
+
+$(SDIR)/%.o: $(SDIR)/%.c
+	@$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
+	@echo [$(notdir $(CC))] $(notdir $@)
+
+$(TARGET_A): $(OBJS)
+	@$(AR) $(ARFLAGS) $@ $(OBJS)
+	@echo -e $(YELLOW)[LINK]$(END)[$(notdir $(AR))] $(notdir $@)
+
+$(TARGET_SO): $(OBJS)
+	@$(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -o $@ --start-group $(OBJS) --end-group
+	@echo -e $(GREEN)[LINK]$(END)[$(notdir $(LD))] $(notdir $@)
+
+clean:
+	@rm -f $(OBJS) $(DEPS) $(TARGET_A) $(TARGET_SO)
+
+-include $(DEPS)
+
diff --git a/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos.c b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos.c
new file mode 100644
index 000000000..b7cc52d2b
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos.c
@@ -0,0 +1,893 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <syslog.h>
+#include <errno.h>
+#ifdef ARCH_CV182X
+#include "cvi_type.h"
+#include "cvi_comm_video.h"
+#include <linux/cvi_vip_snsr.h>
+#else
+#include <linux/cvi_type.h>
+#include <linux/cvi_comm_video.h>
+#include <linux/vi_snsr.h>
+#endif
+#include "cvi_debug.h"
+#include "cvi_comm_sns.h"
+#include "cvi_sns_ctrl.h"
+#include "cvi_ae_comm.h"
+#include "cvi_awb_comm.h"
+#include "cvi_ae.h"
+#include "cvi_awb.h"
+#include "cvi_isp.h"
+
+#include "ov5647_cmos_ex.h"
+#include "ov5647_cmos_param.h"
+
+#define DIV_0_TO_1(a)   ((0 == (a)) ? 1 : (a))
+#define DIV_0_TO_1_FLOAT(a) ((((a) < 1E-10) && ((a) > -1E-10)) ? 1 : (a))
+#define OV5647_ID 0x5647
+#define OV5647_I2C_ADDR_1 0x36
+#define OV5647_I2C_ADDR_2 0x10
+#define OV5647_I2C_ADDR_IS_VALID(addr)	\
+		((addr) == OV5647_I2C_ADDR_1 || (addr) == OV5647_I2C_ADDR_2)
+/****************************************************************************
+ * global variables                                                            *
+ ****************************************************************************/
+
+ISP_SNS_STATE_S *g_pastOv5647[VI_MAX_PIPE_NUM] = {CVI_NULL};
+
+#define OV5647_SENSOR_GET_CTX(dev, pstCtx)   (pstCtx = g_pastOv5647[dev])
+#define OV5647_SENSOR_SET_CTX(dev, pstCtx)   (g_pastOv5647[dev] = pstCtx)
+#define OV5647_SENSOR_RESET_CTX(dev)         (g_pastOv5647[dev] = CVI_NULL)
+
+ISP_SNS_COMMBUS_U g_aunOv5647_BusInfo[VI_MAX_PIPE_NUM] = {
+	[0] = { .s8I2cDev = 0},
+	[1 ... VI_MAX_PIPE_NUM - 1] = { .s8I2cDev = -1}
+};
+
+CVI_U16 g_au16Ov5647_GainMode[VI_MAX_PIPE_NUM] = {0};
+CVI_U16 g_au16Ov5647_UseHwSync[VI_MAX_PIPE_NUM] = {0};
+
+ISP_SNS_MIRRORFLIP_TYPE_E g_aeOv5647_MirrorFip[VI_MAX_PIPE_NUM] = {0};
+
+/****************************************************************************
+ * local variables and functions                                                           *
+ ****************************************************************************/
+static CVI_U32 g_au32InitExposure[VI_MAX_PIPE_NUM]  = {0};
+static CVI_U32 g_au32LinesPer500ms[VI_MAX_PIPE_NUM] = {0};
+static CVI_U16 g_au16InitWBGain[VI_MAX_PIPE_NUM][3] = {{0} };
+static CVI_U16 g_au16SampleRgain[VI_MAX_PIPE_NUM] = {0};
+static CVI_U16 g_au16SampleBgain[VI_MAX_PIPE_NUM] = {0};
+static CVI_S32 cmos_get_wdr_size(VI_PIPE ViPipe, ISP_SNS_ISP_INFO_S *pstIspCfg);
+/*****Ov5647 Lines Range*****/
+#define OV5647_FULL_LINES_MAX  (0xFFFF)
+
+/*****Ov5647 Register Address*****/
+#define OV5647_HOLD_3208	0x3208
+#define OV5647_HOLD_320B	0x320B
+#define OV5647_EXP1_ADDR	0x3500
+#define OV5647_AGAIN1_ADDR	0x350A
+#define OV5647_VTS_ADDR		0x380E
+
+#define OV5647_RES_IS_1080P(w, h)      ((w) == 1920 && (h) == 1080)
+
+static CVI_S32 cmos_get_ae_default(VI_PIPE ViPipe, AE_SENSOR_DEFAULT_S *pstAeSnsDft)
+{
+	const OV5647_MODE_S *pstMode;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstAeSnsDft);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstMode = &g_astOv5647_mode[pstSnsState->u8ImgMode];
+	pstAeSnsDft->u32FullLinesStd = pstSnsState->u32FLStd;
+	pstAeSnsDft->u32FlickerFreq = 50 * 256;
+	pstAeSnsDft->u32FullLinesMax = OV5647_FULL_LINES_MAX;
+	pstAeSnsDft->u32HmaxTimes = (1000000) / (pstSnsState->u32FLStd * 30);
+
+	pstAeSnsDft->stIntTimeAccu.enAccuType = AE_ACCURACY_LINEAR;
+	pstAeSnsDft->stIntTimeAccu.f32Accuracy = 1;
+	pstAeSnsDft->stIntTimeAccu.f32Offset = 0;
+
+	pstAeSnsDft->stAgainAccu.enAccuType = AE_ACCURACY_TABLE;
+	pstAeSnsDft->stAgainAccu.f32Accuracy = 1;
+
+	pstAeSnsDft->stDgainAccu.enAccuType = AE_ACCURACY_DB;
+	pstAeSnsDft->stDgainAccu.f32Accuracy = 1;
+
+	pstAeSnsDft->u32ISPDgainShift = 8;
+	pstAeSnsDft->u32MinISPDgainTarget = 1 << pstAeSnsDft->u32ISPDgainShift;
+	pstAeSnsDft->u32MaxISPDgainTarget = 2 << pstAeSnsDft->u32ISPDgainShift;
+
+	if (g_au32LinesPer500ms[ViPipe] == 0)
+		pstAeSnsDft->u32LinesPer500ms = pstSnsState->u32FLStd * 30 / 2;
+	else
+		pstAeSnsDft->u32LinesPer500ms = g_au32LinesPer500ms[ViPipe];
+	pstAeSnsDft->u32SnsStableFrame = 0;
+	/* OV sensor cannot update new setting before the old setting takes effect */
+	pstAeSnsDft->u8AERunInterval = 1;
+	switch (pstSnsState->enWDRMode) {
+	default:
+	case WDR_MODE_NONE:   /*linear mode*/
+		pstAeSnsDft->f32Fps = pstMode->f32MaxFps;
+		pstAeSnsDft->f32MinFps = pstMode->f32MinFps;
+		pstAeSnsDft->au8HistThresh[0] = 0xd;
+		pstAeSnsDft->au8HistThresh[1] = 0x28;
+		pstAeSnsDft->au8HistThresh[2] = 0x60;
+		pstAeSnsDft->au8HistThresh[3] = 0x80;
+
+		pstAeSnsDft->u32MaxAgain = pstMode->stAgain[0].u32Max;
+		pstAeSnsDft->u32MinAgain = pstMode->stAgain[0].u32Min;
+		pstAeSnsDft->u32MaxAgainTarget = pstAeSnsDft->u32MaxAgain;
+		pstAeSnsDft->u32MinAgainTarget = pstAeSnsDft->u32MinAgain;
+
+		pstAeSnsDft->u32MaxDgain = pstMode->stDgain[0].u32Max;
+		pstAeSnsDft->u32MinDgain = pstMode->stDgain[0].u32Min;
+		pstAeSnsDft->u32MaxDgainTarget = pstAeSnsDft->u32MaxDgain;
+		pstAeSnsDft->u32MinDgainTarget = pstAeSnsDft->u32MinDgain;
+
+		pstAeSnsDft->u8AeCompensation = 40;
+		pstAeSnsDft->u32InitAESpeed = 64;
+		pstAeSnsDft->u32InitAETolerance = 5;
+		pstAeSnsDft->u32AEResponseFrame = 4;
+		pstAeSnsDft->enAeExpMode = AE_EXP_HIGHLIGHT_PRIOR;
+		pstAeSnsDft->u32InitExposure = g_au32InitExposure[ViPipe] ? g_au32InitExposure[ViPipe] : 76151;
+
+		pstAeSnsDft->u32MaxIntTime = pstMode->stExp[0].u16Max;
+		pstAeSnsDft->u32MinIntTime = pstMode->stExp[0].u16Min;
+		pstAeSnsDft->u32MaxIntTimeTarget = 65535;
+		pstAeSnsDft->u32MinIntTimeTarget = 1;
+		break;
+	}
+
+	return CVI_SUCCESS;
+}
+
+/* the function of sensor set fps */
+static CVI_S32 cmos_fps_set(VI_PIPE ViPipe, CVI_FLOAT f32Fps, AE_SENSOR_DEFAULT_S *pstAeSnsDft)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	CVI_U32 u32VMAX;
+	CVI_FLOAT f32MaxFps = 0;
+	CVI_FLOAT f32MinFps = 0;
+	CVI_U32 u32Vts = 0;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstAeSnsDft);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	u32Vts = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+	pstSnsRegsInfo = &pstSnsState->astSyncInfo[0].snsCfg;
+	f32MaxFps = g_astOv5647_mode[pstSnsState->u8ImgMode].f32MaxFps;
+	f32MinFps = g_astOv5647_mode[pstSnsState->u8ImgMode].f32MinFps;
+
+	switch (pstSnsState->u8ImgMode) {
+	case OV5647_MODE_1920X1080P30:
+		if ((f32Fps <= f32MaxFps) && (f32Fps >= f32MinFps)) {
+			u32VMAX = u32Vts * f32MaxFps / DIV_0_TO_1_FLOAT(f32Fps);
+		} else {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Not support Fps: %f\n", f32Fps);
+			return CVI_FAILURE;
+		}
+		u32VMAX = (u32VMAX > OV5647_FULL_LINES_MAX) ? OV5647_FULL_LINES_MAX : u32VMAX;
+		break;
+	default:
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Not support sensor mode: %d\n", pstSnsState->u8ImgMode);
+		return CVI_FAILURE;
+	}
+
+
+	pstSnsState->u32FLStd = u32VMAX;
+
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+		pstSnsRegsInfo->astI2cData[LINEAR_VTS_0].u32Data = ((u32VMAX & 0xFF00) >> 8);
+		pstSnsRegsInfo->astI2cData[LINEAR_VTS_1].u32Data = (u32VMAX & 0xFF);
+	} else {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Not support WDR: %d\n", pstSnsState->enWDRMode);
+		return CVI_FAILURE;
+	}
+
+	pstAeSnsDft->f32Fps = f32Fps;
+	pstAeSnsDft->u32LinesPer500ms = pstSnsState->u32FLStd * f32Fps / 2;
+	pstAeSnsDft->u32FullLinesStd = pstSnsState->u32FLStd;
+	pstAeSnsDft->u32MaxIntTime = pstSnsState->u32FLStd - 8;
+	pstSnsState->au32FL[0] = pstSnsState->u32FLStd;
+	pstAeSnsDft->u32FullLines = pstSnsState->au32FL[0];
+	pstAeSnsDft->u32HmaxTimes = (1000000) / (pstSnsState->u32FLStd * DIV_0_TO_1_FLOAT(f32Fps));
+
+	return CVI_SUCCESS;
+}
+
+/* while isp notify ae to update sensor regs, ae call these funcs. */
+static CVI_S32 cmos_inttime_update(VI_PIPE ViPipe, CVI_U32 *u32IntTime)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(u32IntTime);
+	pstSnsRegsInfo = &pstSnsState->astSyncInfo[0].snsCfg;
+
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+		/* linear exposure reg range:
+		 * min : 4
+		 * max : vts - 4
+		 * step : 1
+		 */
+		CVI_U32 u32TmpIntTime = u32IntTime[0];
+		CVI_U32 mimExp = 4;
+		CVI_U32 maxExp = pstSnsState->au32FL[0] - 4;
+
+		u32TmpIntTime = (u32TmpIntTime > maxExp) ? maxExp : u32TmpIntTime;
+		u32TmpIntTime = (u32TmpIntTime < mimExp) ? mimExp : u32TmpIntTime;
+		u32IntTime[0] = u32TmpIntTime;
+
+		pstSnsRegsInfo->astI2cData[LINEAR_EXP_0].u32Data = ((u32TmpIntTime & 0xF000) >> 12);
+		pstSnsRegsInfo->astI2cData[LINEAR_EXP_1].u32Data = ((u32TmpIntTime & 0xFF0) >> 4);
+		pstSnsRegsInfo->astI2cData[LINEAR_EXP_2].u32Data = ((u32TmpIntTime & 0x0F) << 4);
+	} else {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Not support WDR: %d\n", pstSnsState->enWDRMode);
+		return CVI_FAILURE;
+	}
+
+	return CVI_SUCCESS;
+}
+
+typedef struct gain_tbl_info_s {
+	CVI_U16	gainMax;
+	CVI_U16	idxBase;
+	CVI_U8	regGain;
+	CVI_U8	regGainFineBase;
+	CVI_U8	regGainFineStep;
+} gain_tbl_info_s;
+
+static struct gain_tbl_info_s AgainInfo[7] = {
+	{
+		.gainMax = 1984,
+		.idxBase = 0,
+		.regGain = 0x00,
+		.regGainFineBase = 0x10,
+		.regGainFineStep = 1,
+	},
+	{
+		.gainMax = 3968,
+		.idxBase = 16,
+		.regGain = 0x00,
+		.regGainFineBase = 0x20,
+		.regGainFineStep = 2,
+	},
+	{
+		.gainMax = 7936,
+		.idxBase = 32,
+		.regGain = 0x00,
+		.regGainFineBase = 0x40,
+		.regGainFineStep = 4,
+	},
+	{
+		.gainMax = 15872,
+		.idxBase = 48,
+		.regGain = 0x00,
+		.regGainFineBase = 0x80,
+		.regGainFineStep = 8,
+	},
+	{
+		.gainMax = 31744,
+		.idxBase = 64,
+		.regGain = 0x01,
+		.regGainFineBase = 0x00,
+		.regGainFineStep = 16,
+	},
+	{
+		.gainMax = 47104,
+		.idxBase = 80,
+		.regGain = 0x02,
+		.regGainFineBase = 0x00,
+		.regGainFineStep = 32,
+	},
+	{
+		.gainMax = 63488,
+		.idxBase = 88,
+		.regGain = 0x03,
+		.regGainFineBase = 0x00,
+		.regGainFineStep = 32,
+	},
+
+};
+
+static CVI_U32 Again_table[] = {
+	1024, 1088, 1152, 1216, 1280, 1344, 1408, 1472, 1536, 1600, 1664, 1728, 1792, 1856, 1920, 1984,
+	2048, 2176, 2304, 2432, 2560, 2688, 2816, 2944, 3072, 3200, 3328, 3456, 3584, 3712, 3840, 3968,
+	4096, 4352, 4608, 4864, 5120, 5376, 5632, 5888, 6144, 6400, 6656, 6912, 7168, 7424, 7680, 7936,
+	8192, 8704, 9216, 9728, 10240, 10752, 11264, 11776, 12288, 12800, 13312, 13824, 14336, 14848, 15360, 15872,
+	16384, 17408, 18432, 19456, 20480, 21504, 22528, 23552, 24576, 25600, 26624, 27648, 28672, 29696, 30720, 31744,
+	32768, 34816, 36864, 38912, 40960, 43008, 45056, 47104, 49152, 51200, 53248, 55296, 57344, 59392, 61440, 63488
+};
+
+static const CVI_U32 again_table_size = ARRAY_SIZE(Again_table);
+
+static CVI_S32 cmos_again_calc_table(VI_PIPE ViPipe, CVI_U32 *pu32AgainLin, CVI_U32 *pu32AgainDb)
+{
+	CVI_U32 i;
+
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pu32AgainLin);
+	CMOS_CHECK_POINTER(pu32AgainDb);
+
+	if (*pu32AgainLin >= Again_table[again_table_size - 1]) {
+		*pu32AgainLin = Again_table[again_table_size - 1];
+		*pu32AgainDb = again_table_size - 1;
+		return CVI_SUCCESS;
+	}
+
+	for (i = 1; i < again_table_size; i++) {
+		if (*pu32AgainLin < Again_table[i]) {
+			*pu32AgainLin = Again_table[i - 1];
+			*pu32AgainDb = i - 1;
+			break;
+		}
+	}
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_dgain_calc_table(VI_PIPE ViPipe, CVI_U32 *pu32DgainLin, CVI_U32 *pu32DgainDb)
+{
+
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pu32DgainLin);
+	CMOS_CHECK_POINTER(pu32DgainDb);
+
+	*pu32DgainLin = 1024;
+	*pu32DgainDb = 0;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_gains_update(VI_PIPE ViPipe, CVI_U32 *pu32Again, CVI_U32 *pu32Dgain)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+	CVI_U32 u32Again;
+	struct gain_tbl_info_s *info;
+	int i, tbl_num;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(pu32Again);
+	CMOS_CHECK_POINTER(pu32Dgain);
+	pstSnsRegsInfo = &pstSnsState->astSyncInfo[0].snsCfg;
+	u32Again = pu32Again[0];
+
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+		/* linear mode */
+		/* find Again register setting. */
+		tbl_num = sizeof(AgainInfo)/sizeof(struct gain_tbl_info_s);
+		for (i = tbl_num - 1; i >= 0; i--) {
+			info = &AgainInfo[i];
+
+			if (u32Again >= info->idxBase)
+				break;
+		}
+
+		pstSnsRegsInfo->astI2cData[LINEAR_AGAIN_0].u32Data = info->regGain & 0xFF;
+		u32Again = info->regGainFineBase + (u32Again - info->idxBase) * info->regGainFineStep;
+		pstSnsRegsInfo->astI2cData[LINEAR_AGAIN_1].u32Data = u32Again & 0xFF;
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_ae_exp_function(AE_SENSOR_EXP_FUNC_S *pstExpFuncs)
+{
+	CMOS_CHECK_POINTER(pstExpFuncs);
+
+	memset(pstExpFuncs, 0, sizeof(AE_SENSOR_EXP_FUNC_S));
+
+	pstExpFuncs->pfn_cmos_get_ae_default    = cmos_get_ae_default;
+	pstExpFuncs->pfn_cmos_fps_set           = cmos_fps_set;
+	pstExpFuncs->pfn_cmos_inttime_update    = cmos_inttime_update;
+	pstExpFuncs->pfn_cmos_gains_update      = cmos_gains_update;
+	pstExpFuncs->pfn_cmos_again_calc_table  = cmos_again_calc_table;
+	pstExpFuncs->pfn_cmos_dgain_calc_table  = cmos_dgain_calc_table;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_awb_default(VI_PIPE ViPipe, AWB_SENSOR_DEFAULT_S *pstAwbSnsDft)
+{
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pstAwbSnsDft);
+
+	memset(pstAwbSnsDft, 0, sizeof(AWB_SENSOR_DEFAULT_S));
+
+	pstAwbSnsDft->u16InitGgain = 1024;
+	pstAwbSnsDft->u8AWBRunInterval = 1;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_awb_exp_function(AWB_SENSOR_EXP_FUNC_S *pstExpFuncs)
+{
+	CMOS_CHECK_POINTER(pstExpFuncs);
+
+	memset(pstExpFuncs, 0, sizeof(AWB_SENSOR_EXP_FUNC_S));
+
+	pstExpFuncs->pfn_cmos_get_awb_default = cmos_get_awb_default;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_isp_default(VI_PIPE ViPipe, ISP_CMOS_DEFAULT_S *pstDef)
+{
+	(void) ViPipe;
+
+	memset(pstDef, 0, sizeof(ISP_CMOS_DEFAULT_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_blc_default(VI_PIPE ViPipe, ISP_CMOS_BLACK_LEVEL_S *pstBlc)
+{
+	(void) ViPipe;
+
+	CMOS_CHECK_POINTER(pstBlc);
+
+	memset(pstBlc, 0, sizeof(ISP_CMOS_BLACK_LEVEL_S));
+
+	memcpy(pstBlc, &g_stIspBlcCalibratio, sizeof(ISP_CMOS_BLACK_LEVEL_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_wdr_size(VI_PIPE ViPipe, ISP_SNS_ISP_INFO_S *pstIspCfg)
+{
+	const OV5647_MODE_S *pstMode = CVI_NULL;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	pstMode = &g_astOv5647_mode[pstSnsState->u8ImgMode];
+
+	pstIspCfg->frm_num = 1;
+	memcpy(&pstIspCfg->img_size[0], &pstMode->astImg[0], sizeof(ISP_WDR_SIZE_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_set_wdr_mode(VI_PIPE ViPipe, CVI_U8 u8Mode)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstSnsState->bSyncInit = CVI_FALSE;
+
+	switch (u8Mode) {
+	case WDR_MODE_NONE:
+		pstSnsState->u8ImgMode = OV5647_MODE_1920X1080P30;
+		pstSnsState->enWDRMode = WDR_MODE_NONE;
+		pstSnsState->u32FLStd = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+		syslog(LOG_INFO, "linear mode\n");
+		break;
+	default:
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Unsupport sensor mode!\n");
+		return CVI_FAILURE;
+	}
+
+	pstSnsState->au32FL[0] = pstSnsState->u32FLStd;
+	pstSnsState->au32FL[1] = pstSnsState->au32FL[0];
+	memset(pstSnsState->au32WDRIntTime, 0, sizeof(pstSnsState->au32WDRIntTime));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_U32 sensor_cmp_wdr_size(ISP_SNS_ISP_INFO_S *pstWdr1, ISP_SNS_ISP_INFO_S *pstWdr2)
+{
+	CVI_U32 i;
+
+	if (pstWdr1->frm_num != pstWdr2->frm_num)
+		goto _mismatch;
+	for (i = 0; i < 2; i++) {
+		if (pstWdr1->img_size[i].stSnsSize.u32Width != pstWdr2->img_size[i].stSnsSize.u32Width)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stSnsSize.u32Height != pstWdr2->img_size[i].stSnsSize.u32Height)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.s32X != pstWdr2->img_size[i].stWndRect.s32X)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.s32Y != pstWdr2->img_size[i].stWndRect.s32Y)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.u32Width != pstWdr2->img_size[i].stWndRect.u32Width)
+			goto _mismatch;
+		if (pstWdr1->img_size[i].stWndRect.u32Height != pstWdr2->img_size[i].stWndRect.u32Height)
+			goto _mismatch;
+	}
+
+	return 0;
+_mismatch:
+	return 1;
+}
+
+static CVI_S32 cmos_get_sns_regs_info(VI_PIPE ViPipe, ISP_SNS_SYNC_INFO_S *pstSnsSyncInfo)
+{
+	CVI_U32 i;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_REGS_INFO_S *pstSnsRegsInfo = CVI_NULL;
+	ISP_SNS_SYNC_INFO_S *pstCfg0 = CVI_NULL;
+	ISP_SNS_SYNC_INFO_S *pstCfg1 = CVI_NULL;
+	ISP_I2C_DATA_S *pstI2c_data = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSnsSyncInfo);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	pstSnsRegsInfo = &pstSnsSyncInfo->snsCfg;
+	pstCfg0 = &pstSnsState->astSyncInfo[0];
+	pstCfg1 = &pstSnsState->astSyncInfo[1];
+	pstI2c_data = pstCfg0->snsCfg.astI2cData;
+
+	if ((pstSnsState->bSyncInit == CVI_FALSE) || (pstSnsRegsInfo->bConfig == CVI_FALSE)) {
+		pstCfg0->snsCfg.enSnsType = SNS_I2C_TYPE;
+		pstCfg0->snsCfg.unComBus.s8I2cDev = g_aunOv5647_BusInfo[ViPipe].s8I2cDev;
+		pstCfg0->snsCfg.u8Cfg2ValidDelayMax = 0;
+		pstCfg0->snsCfg.use_snsr_sram = CVI_TRUE;
+		pstCfg0->snsCfg.u32RegNum = LINEAR_REGS_NUM;
+
+		for (i = 0; i < pstCfg0->snsCfg.u32RegNum; i++) {
+			pstI2c_data[i].bUpdate = CVI_TRUE;
+			pstI2c_data[i].u8DevAddr = ov5647_i2c_addr;
+			pstI2c_data[i].u32AddrByteNum = ov5647_addr_byte;
+			pstI2c_data[i].u32DataByteNum = ov5647_data_byte;
+		}
+
+		switch (pstSnsState->enWDRMode) {
+		default:
+			pstI2c_data[LINEAR_EXP_0].u32RegAddr = OV5647_EXP1_ADDR;
+			pstI2c_data[LINEAR_EXP_1].u32RegAddr = OV5647_EXP1_ADDR + 1;
+			pstI2c_data[LINEAR_EXP_2].u32RegAddr = OV5647_EXP1_ADDR + 2;
+			pstI2c_data[LINEAR_AGAIN_0].u32RegAddr = OV5647_AGAIN1_ADDR;
+			pstI2c_data[LINEAR_AGAIN_1].u32RegAddr = OV5647_AGAIN1_ADDR + 1;
+			pstI2c_data[LINEAR_VTS_0].u32RegAddr = OV5647_VTS_ADDR;
+			pstI2c_data[LINEAR_VTS_1].u32RegAddr = OV5647_VTS_ADDR + 1;
+			break;
+		}
+		pstSnsState->bSyncInit = CVI_TRUE;
+		pstCfg0->snsCfg.need_update = CVI_TRUE;
+		/* recalcualte WDR size */
+		cmos_get_wdr_size(ViPipe, &pstCfg0->ispCfg);
+		pstCfg0->ispCfg.need_update = CVI_TRUE;
+	} else {
+		pstCfg0->snsCfg.need_update = CVI_FALSE;
+		for (i = 0; i < pstCfg0->snsCfg.u32RegNum; i++) {
+			if (pstCfg0->snsCfg.astI2cData[i].u32Data == pstCfg1->snsCfg.astI2cData[i].u32Data) {
+				pstCfg0->snsCfg.astI2cData[i].bUpdate = CVI_FALSE;
+			} else {
+				pstCfg0->snsCfg.astI2cData[i].bUpdate = CVI_TRUE;
+				pstCfg0->snsCfg.need_update = CVI_TRUE;
+			}
+		}
+		/* check update isp crop or not */
+		pstCfg0->ispCfg.need_update = (sensor_cmp_wdr_size(&pstCfg0->ispCfg, &pstCfg1->ispCfg) ?
+				CVI_TRUE : CVI_FALSE);
+	}
+
+	pstSnsRegsInfo->bConfig = CVI_FALSE;
+	memcpy(pstSnsSyncInfo, &pstSnsState->astSyncInfo[0], sizeof(ISP_SNS_SYNC_INFO_S));
+	memcpy(&pstSnsState->astSyncInfo[1], &pstSnsState->astSyncInfo[0], sizeof(ISP_SNS_SYNC_INFO_S));
+	pstSnsState->au32FL[1] = pstSnsState->au32FL[0];
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_set_image_mode(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S *pstSensorImageMode)
+{
+	CVI_U8 u8SensorImageMode = 0;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSensorImageMode);
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	u8SensorImageMode = pstSnsState->u8ImgMode;
+	pstSnsState->bSyncInit = CVI_FALSE;
+	if (pstSensorImageMode->f32Fps <= 30) {
+		if (pstSnsState->enWDRMode == WDR_MODE_NONE) {
+			if (OV5647_RES_IS_1080P(pstSensorImageMode->u16Width, pstSensorImageMode->u16Height))
+				u8SensorImageMode = OV5647_MODE_1920X1080P30;
+			else {
+				CVI_TRACE_SNS(CVI_DBG_ERR, "Not support! Width:%d, Height:%d, Fps:%f, WDRMode:%d\n",
+				       pstSensorImageMode->u16Width,
+				       pstSensorImageMode->u16Height,
+				       pstSensorImageMode->f32Fps,
+				       pstSnsState->enWDRMode);
+				return CVI_FAILURE;
+			}
+		} else {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Not support! Width:%d, Height:%d, Fps:%f, WDRMode:%d\n",
+			       pstSensorImageMode->u16Width,
+			       pstSensorImageMode->u16Height,
+			       pstSensorImageMode->f32Fps,
+			       pstSnsState->enWDRMode);
+			return CVI_FAILURE;
+		}
+	}
+
+	if ((pstSnsState->bInit == CVI_TRUE) && (u8SensorImageMode == pstSnsState->u8ImgMode)) {
+		/* Don't need to switch SensorImageMode */
+		return CVI_FAILURE;
+	}
+	pstSnsState->u8ImgMode = u8SensorImageMode;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_mirror_flip(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER_VOID(pstSnsState);
+	if (pstSnsState->bInit == CVI_TRUE && g_aeOv5647_MirrorFip[ViPipe] != eSnsMirrorFlip) {
+		ov5647_mirror_flip(ViPipe, eSnsMirrorFlip);
+		g_aeOv5647_MirrorFip[ViPipe] = eSnsMirrorFlip;
+	}
+}
+
+static CVI_VOID sensor_global_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER_VOID(pstSnsState);
+
+	pstSnsState->bInit = CVI_FALSE;
+	pstSnsState->bSyncInit = CVI_FALSE;
+	pstSnsState->u8ImgMode = OV5647_MODE_1920X1080P30;
+	pstSnsState->enWDRMode = WDR_MODE_NONE;
+	pstSnsState->u32FLStd  = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+	pstSnsState->au32FL[0] = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+	pstSnsState->au32FL[1] = g_astOv5647_mode[pstSnsState->u8ImgMode].u32VtsDef;
+
+	memset(&pstSnsState->astSyncInfo[0], 0, sizeof(ISP_SNS_SYNC_INFO_S));
+	memset(&pstSnsState->astSyncInfo[1], 0, sizeof(ISP_SNS_SYNC_INFO_S));
+}
+
+static CVI_S32 sensor_rx_attr(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *pstRxAttr)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(pstRxAttr);
+
+	memcpy(pstRxAttr, &ov5647_rx_attr, sizeof(*pstRxAttr));
+
+	pstRxAttr->img_size.width = g_astOv5647_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Width;
+	pstRxAttr->img_size.height = g_astOv5647_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Height;
+	if (pstSnsState->enWDRMode == WDR_MODE_NONE)
+		pstRxAttr->mipi_attr.wdr_mode = CVI_MIPI_WDR_MODE_NONE;
+
+	return CVI_SUCCESS;
+
+}
+
+static CVI_S32 sensor_patch_rx_attr(RX_INIT_ATTR_S *pstRxInitAttr)
+{
+	SNS_COMBO_DEV_ATTR_S *pstRxAttr = &ov5647_rx_attr;
+	int i;
+
+	CMOS_CHECK_POINTER(pstRxInitAttr);
+
+	if (pstRxInitAttr->stMclkAttr.bMclkEn)
+		pstRxAttr->mclk.cam = pstRxInitAttr->stMclkAttr.u8Mclk;
+
+	if (pstRxInitAttr->MipiDev >= VI_MAX_DEV_NUM)
+		return CVI_SUCCESS;
+
+	pstRxAttr->devno = pstRxInitAttr->MipiDev;
+
+	if (pstRxAttr->input_mode == INPUT_MODE_MIPI) {
+		struct mipi_dev_attr_s *attr = &pstRxAttr->mipi_attr;
+
+		for (i = 0; i < MIPI_LANE_NUM + 1; i++) {
+			attr->lane_id[i] = pstRxInitAttr->as16LaneId[i];
+			attr->pn_swap[i] = pstRxInitAttr->as8PNSwap[i];
+		}
+	} else {
+		struct lvds_dev_attr_s *attr = &pstRxAttr->lvds_attr;
+
+		for (i = 0; i < MIPI_LANE_NUM + 1; i++) {
+			attr->lane_id[i] = pstRxInitAttr->as16LaneId[i];
+			attr->pn_swap[i] = pstRxInitAttr->as8PNSwap[i];
+		}
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_sensor_exp_function(ISP_SENSOR_EXP_FUNC_S *pstSensorExpFunc)
+{
+	CMOS_CHECK_POINTER(pstSensorExpFunc);
+
+	memset(pstSensorExpFunc, 0, sizeof(ISP_SENSOR_EXP_FUNC_S));
+
+	pstSensorExpFunc->pfn_cmos_sensor_init = ov5647_init;
+	pstSensorExpFunc->pfn_cmos_sensor_exit = ov5647_exit;
+	pstSensorExpFunc->pfn_cmos_sensor_global_init = sensor_global_init;
+	pstSensorExpFunc->pfn_cmos_set_image_mode = cmos_set_image_mode;
+	pstSensorExpFunc->pfn_cmos_set_wdr_mode = cmos_set_wdr_mode;
+
+	pstSensorExpFunc->pfn_cmos_get_isp_default = cmos_get_isp_default;
+	pstSensorExpFunc->pfn_cmos_get_isp_black_level = cmos_get_blc_default;
+	pstSensorExpFunc->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info;
+
+	return CVI_SUCCESS;
+}
+
+/****************************************************************************
+ * callback structure                                                       *
+ ****************************************************************************/
+static CVI_VOID sensor_patch_i2c_addr(CVI_S32 s32I2cAddr)
+{
+	if (OV5647_I2C_ADDR_IS_VALID(s32I2cAddr))
+		ov5647_i2c_addr = s32I2cAddr;
+}
+
+static CVI_S32 ov5647_set_bus_info(VI_PIPE ViPipe, ISP_SNS_COMMBUS_U unSNSBusInfo)
+{
+	g_aunOv5647_BusInfo[ViPipe].s8I2cDev = unSNSBusInfo.s8I2cDev;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_ctx_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+
+	if (pastSnsStateCtx == CVI_NULL) {
+		pastSnsStateCtx = (ISP_SNS_STATE_S *)malloc(sizeof(ISP_SNS_STATE_S));
+		if (pastSnsStateCtx == CVI_NULL) {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Isp[%d] SnsCtx malloc memory failed!\n", ViPipe);
+			return -ENOMEM;
+		}
+	}
+
+	memset(pastSnsStateCtx, 0, sizeof(ISP_SNS_STATE_S));
+
+	OV5647_SENSOR_SET_CTX(ViPipe, pastSnsStateCtx);
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_ctx_exit(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	OV5647_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+	SENSOR_FREE(pastSnsStateCtx);
+	OV5647_SENSOR_RESET_CTX(ViPipe);
+}
+
+static CVI_S32 sensor_register_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	CVI_S32 s32Ret;
+	ISP_SENSOR_REGISTER_S stIspRegister;
+	AE_SENSOR_REGISTER_S  stAeRegister;
+	AWB_SENSOR_REGISTER_S stAwbRegister;
+	ISP_SNS_ATTR_INFO_S   stSnsAttrInfo;
+
+	CMOS_CHECK_POINTER(pstAeLib);
+	CMOS_CHECK_POINTER(pstAwbLib);
+
+	s32Ret = sensor_ctx_init(ViPipe);
+
+	if (s32Ret != CVI_SUCCESS)
+		return CVI_FAILURE;
+
+	stSnsAttrInfo.eSensorId = OV5647_ID;
+
+	s32Ret  = cmos_init_sensor_exp_function(&stIspRegister.stSnsExp);
+	s32Ret |= CVI_ISP_SensorRegCallBack(ViPipe, &stSnsAttrInfo, &stIspRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret  = cmos_init_ae_exp_function(&stAeRegister.stAeExp);
+	s32Ret |= CVI_AE_SensorRegCallBack(ViPipe, pstAeLib, &stSnsAttrInfo, &stAeRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function to ae lib failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret  = cmos_init_awb_exp_function(&stAwbRegister.stAwbExp);
+	s32Ret |= CVI_AWB_SensorRegCallBack(ViPipe, pstAwbLib, &stSnsAttrInfo, &stAwbRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function to awb lib failed!\n");
+		return s32Ret;
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_unregister_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	CVI_S32 s32Ret;
+
+	CMOS_CHECK_POINTER(pstAeLib);
+	CMOS_CHECK_POINTER(pstAwbLib);
+
+	s32Ret = CVI_ISP_SensorUnRegCallBack(ViPipe, OV5647_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret = CVI_AE_SensorUnRegCallBack(ViPipe, pstAeLib, OV5647_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function to ae lib failed!\n");
+		return s32Ret;
+	}
+
+	s32Ret = CVI_AWB_SensorUnRegCallBack(ViPipe, pstAwbLib, OV5647_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function to awb lib failed!\n");
+		return s32Ret;
+	}
+
+	sensor_ctx_exit(ViPipe);
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_set_init(VI_PIPE ViPipe, ISP_INIT_ATTR_S *pstInitAttr)
+{
+	CMOS_CHECK_POINTER(pstInitAttr);
+
+	g_au32InitExposure[ViPipe] = pstInitAttr->u32Exposure;
+	g_au32LinesPer500ms[ViPipe] = pstInitAttr->u32LinesPer500ms;
+	g_au16InitWBGain[ViPipe][0] = pstInitAttr->u16WBRgain;
+	g_au16InitWBGain[ViPipe][1] = pstInitAttr->u16WBGgain;
+	g_au16InitWBGain[ViPipe][2] = pstInitAttr->u16WBBgain;
+	g_au16SampleRgain[ViPipe] = pstInitAttr->u16SampleRgain;
+	g_au16SampleBgain[ViPipe] = pstInitAttr->u16SampleBgain;
+	g_au16Ov5647_GainMode[ViPipe] = pstInitAttr->enGainMode;
+	g_au16Ov5647_UseHwSync[ViPipe] = pstInitAttr->u16UseHwSync;
+
+	return CVI_SUCCESS;
+}
+static CVI_S32 sensor_probe(VI_PIPE ViPipe)
+{
+	return ov5647_probe(ViPipe);
+}
+
+ISP_SNS_OBJ_S stSnsOv5647_Obj = {
+	.pfnRegisterCallback	= sensor_register_callback,
+	.pfnUnRegisterCallback	= sensor_unregister_callback,
+	.pfnStandby		= ov5647_standby,
+	.pfnRestart		= ov5647_restart,
+	.pfnMirrorFlip		= sensor_mirror_flip,
+	.pfnWriteReg		= ov5647_write_register,
+	.pfnReadReg		= ov5647_read_register,
+	.pfnSetBusInfo		= ov5647_set_bus_info,
+	.pfnSetInit		= sensor_set_init,
+	.pfnPatchRxAttr		= sensor_patch_rx_attr,
+	.pfnPatchI2cAddr	= sensor_patch_i2c_addr,
+	.pfnGetRxAttr		= sensor_rx_attr,
+	.pfnExpSensorCb		= cmos_init_sensor_exp_function,
+	.pfnExpAeCb		= cmos_init_ae_exp_function,
+	.pfnSnsProbe		= sensor_probe,
+};
+
+
diff --git a/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos_ex.h b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos_ex.h
new file mode 100644
index 000000000..997695760
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos_ex.h
@@ -0,0 +1,89 @@
+#ifndef __OV5647_CMOS_EX_H_
+#define __OV5647_CMOS_EX_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+
+
+enum ov5647_linear_regs_e {
+	LINEAR_EXP_0,
+	LINEAR_EXP_1,
+	LINEAR_EXP_2,
+	LINEAR_AGAIN_0,
+	LINEAR_AGAIN_1,
+	LINEAR_VTS_0,
+	LINEAR_VTS_1,
+	LINEAR_REGS_NUM
+};
+
+typedef enum _OV5647_MODE_E {
+	OV5647_MODE_1920X1080P30 = 0,
+	OV5647_MODE_LINEAR_NUM,
+	OV5647_MODE_NUM
+} OV5647_MODE_E;
+
+typedef struct _OV5647_STATE_S {
+	CVI_U32		u32Sexp_MAX;
+} OV5647_STATE_S;
+
+typedef struct _OV5647_MODE_S {
+	ISP_WDR_SIZE_S astImg[2];
+	CVI_FLOAT f32MaxFps;
+	CVI_FLOAT f32MinFps;
+	CVI_U32 u32HtsDef;
+	CVI_U32 u32VtsDef;
+	CVI_U16 u16L2sOffset;
+	CVI_U16 u16TopBoundary;
+	CVI_U16 u16BotBoundary;
+	SNS_ATTR_S stExp[2];
+	SNS_ATTR_LARGE_S stAgain[2];
+	SNS_ATTR_LARGE_S stDgain[2];
+	CVI_U32 u32L2S_offset;
+	CVI_U32 u32IspResTime;
+	CVI_U32 u32HdrMargin;
+	char name[64];
+} OV5647_MODE_S;
+
+/****************************************************************************
+ * external variables and functions                                         *
+ ****************************************************************************/
+
+extern ISP_SNS_STATE_S *g_pastOv5647[VI_MAX_PIPE_NUM];
+extern ISP_SNS_COMMBUS_U g_aunOv5647_BusInfo[];
+extern CVI_U16 g_au16Ov5647_GainMode[];
+extern CVI_U16 g_au16Ov5647_UseHwSync[VI_MAX_PIPE_NUM];
+extern CVI_U8 ov5647_i2c_addr;
+extern const CVI_U32 ov5647_addr_byte;
+extern const CVI_U32 ov5647_data_byte;
+extern void ov5647_init(VI_PIPE ViPipe);
+extern void ov5647_exit(VI_PIPE ViPipe);
+extern void ov5647_standby(VI_PIPE ViPipe);
+extern void ov5647_restart(VI_PIPE ViPipe);
+extern int  ov5647_write_register(VI_PIPE ViPipe, int addr, int data);
+extern int  ov5647_read_register(VI_PIPE ViPipe, int addr);
+extern void ov5647_mirror_flip(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip);
+extern int ov5647_probe(VI_PIPE ViPipe);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __OV5647_CMOS_EX_H_ */
+
diff --git a/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos_param.h b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos_param.h
new file mode 100644
index 000000000..30aee31e7
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_cmos_param.h
@@ -0,0 +1,129 @@
+#ifndef __OV5647_CMOS_PARAM_H_
+#define __OV5647_CMOS_PARAM_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+#include "ov5647_cmos_ex.h"
+
+static const OV5647_MODE_S g_astOv5647_mode[OV5647_MODE_NUM] = {
+	[OV5647_MODE_1920X1080P30] = {
+		.name = "1920x1080p30",
+		.astImg[0] = {
+			.stSnsSize = {
+				.u32Width = 1920,
+				.u32Height = 1080,
+			},
+			.stWndRect = {
+				.s32X = 0,
+				.s32Y = 0,
+				.u32Width = 1920,
+				.u32Height = 1080,
+			},
+			.stMaxSize = {
+				.u32Width = 2592,
+				.u32Height = 1944,
+			},
+		},
+
+		.f32MaxFps = 30,
+		.f32MinFps = 0.711, /* 0x4e2 * 30 / 0xFFFF */
+		.u32HtsDef = 2416,
+		.u32VtsDef = 1104,
+		.stExp[0] = {
+			.u16Min = 4,
+			.u16Max = 1104 - 4,
+			.u16Def = 400,
+			.u16Step = 1,
+		},
+		.stAgain[0] = {
+			.u32Min = 1024,
+			.u32Max = 63448,
+			.u32Def = 1024,
+			.u32Step = 1,
+		},
+		.stDgain[0] = {
+			.u32Min = 1024,
+			.u32Max = 1024,
+			.u32Def = 1024,
+			.u32Step = 1,
+		},
+	},
+};
+
+static ISP_CMOS_BLACK_LEVEL_S g_stIspBlcCalibratio = {
+	.bUpdate = CVI_TRUE,
+	.blcAttr = {
+		.Enable = 1,
+		.enOpType = OP_TYPE_AUTO,
+		.stManual = {60, 60, 60, 60, 0, 0, 0, 0
+#ifdef ARCH_CV182X
+			, 1039, 1039, 1039, 1039
+#endif
+		},
+		.stAuto = {
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{60, 60, 60, 60, 60, 60, 60, 60, /*8*/60, 60, 60, 60, 60, 60, 60, 60},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+			{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+#ifdef ARCH_CV182X
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+			{1039, 1039, 1039, 1039, 1039, 1039, 1039, 1039,
+				/*8*/1039, 1039, 1039, 1039, 1204, 1039, 1039, 1039},
+#endif
+		},
+	},
+};
+
+
+struct combo_dev_attr_s ov5647_rx_attr = {
+	.input_mode = INPUT_MODE_MIPI,
+	.mac_clk = RX_MAC_CLK_400M,
+	.mipi_attr = {
+		.raw_data_type = RAW_DATA_10BIT,
+		.lane_id = {0, 1, 2, -1, -1},
+		.pn_swap = {0, 0, 0, 0, 0},
+		.wdr_mode = CVI_MIPI_WDR_MODE_NONE,
+		.dphy = {
+			.enable = 1,
+			.hs_settle = 8,
+		},
+	},
+	.mclk = {
+		.cam = 0,
+		.freq = CAMPLL_FREQ_24M,
+	},
+	.devno = 0,
+};
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __OV5647_CMOS_PARAM_H_ */
+
diff --git a/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_sensor_ctl.c b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_sensor_ctl.c
new file mode 100644
index 000000000..8e2c2892d
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/ov_ov5647/ov5647_sensor_ctl.c
@@ -0,0 +1,347 @@
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <syslog.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_comm_video.h"
+#else
+#include <linux/vi_snsr.h>
+#include <linux/cvi_comm_video.h>
+#endif
+#include "cvi_sns_ctrl.h"
+#include "ov5647_cmos_ex.h"
+
+static void ov5647_linear_1080p30_init(VI_PIPE ViPipe);
+
+CVI_U8 ov5647_i2c_addr = 0x36;        /* I2C Address of OV5647 */
+const CVI_U32 ov5647_addr_byte = 2;
+const CVI_U32 ov5647_data_byte = 1;
+static int g_fd[VI_MAX_PIPE_NUM] = {[0 ... (VI_MAX_PIPE_NUM - 1)] = -1};
+
+int ov5647_i2c_init(VI_PIPE ViPipe)
+{
+
+	char acDevFile[16] = {0};
+	CVI_U8 u8DevNum;
+
+	if (g_fd[ViPipe] >= 0)
+		return CVI_SUCCESS;
+	int ret;
+
+	u8DevNum = g_aunOv5647_BusInfo[ViPipe].s8I2cDev;
+	snprintf(acDevFile, sizeof(acDevFile),  "/dev/i2c-%u", u8DevNum);
+
+	g_fd[ViPipe] = open(acDevFile, O_RDWR, 0600);
+
+	if (g_fd[ViPipe] < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Open /dev/i2c-%u error!\n", u8DevNum);
+		return CVI_FAILURE;
+	}
+
+	ret = ioctl(g_fd[ViPipe], I2C_SLAVE_FORCE, ov5647_i2c_addr);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return ret;
+	}
+	return CVI_SUCCESS;
+}
+
+int ov5647_i2c_exit(VI_PIPE ViPipe)
+{
+	if (g_fd[ViPipe] >= 0) {
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return CVI_SUCCESS;
+	}
+	return CVI_FAILURE;
+}
+
+int ov5647_read_register(VI_PIPE ViPipe, int addr)
+{
+	int ret, data;
+	CVI_U8 buf[8];
+	CVI_U8 idx = 0;
+
+	if (g_fd[ViPipe] < 0)
+		return CVI_FAILURE;
+
+	if (ov5647_addr_byte == 2)
+		buf[idx++] = (addr >> 8) & 0xff;
+
+	// add address byte 0
+	buf[idx++] = addr & 0xff;
+
+	ret = write(g_fd[ViPipe], buf, ov5647_addr_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	buf[0] = 0;
+	buf[1] = 0;
+	ret = read(g_fd[ViPipe], buf, ov5647_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	// pack read back data
+	data = 0;
+	if (ov5647_data_byte == 2) {
+		data = buf[0] << 8;
+		data += buf[1];
+	} else {
+		data = buf[0];
+	}
+
+	syslog(LOG_DEBUG, "i2c r 0x%x = 0x%x\n", addr, data);
+
+	return data;
+}
+
+int ov5647_write_register(VI_PIPE ViPipe, int addr, int data)
+{
+	CVI_U8 idx = 0;
+	int ret;
+	CVI_U8 buf[8];
+
+	if (g_fd[ViPipe] < 0)
+		return CVI_SUCCESS;
+
+	if (ov5647_addr_byte == 2) {
+		buf[idx] = (addr >> 8) & 0xff;
+		idx++;
+		buf[idx] = addr & 0xff;
+		idx++;
+	}
+
+	if (ov5647_data_byte == 1) {
+		buf[idx] = data & 0xff;
+		idx++;
+	}
+
+	ret = write(g_fd[ViPipe], buf, ov5647_addr_byte + ov5647_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_WRITE error!\n");
+		return CVI_FAILURE;
+	}
+	syslog(LOG_DEBUG, "i2c w 0x%x 0x%x\n", addr, data);
+	return CVI_SUCCESS;
+}
+
+static void delay_ms(int ms)
+{
+	usleep(ms * 1000);
+}
+
+void ov5647_standby(VI_PIPE ViPipe)
+{
+	ov5647_write_register(ViPipe, 0x0100, 0x00); /* STANDBY */
+}
+
+void ov5647_restart(VI_PIPE ViPipe)
+{
+	ov5647_write_register(ViPipe, 0x0100, 0x01); /* standby */
+}
+
+void ov5647_default_reg_init(VI_PIPE ViPipe)
+{
+	CVI_U32 i;
+	CVI_U32 start = 1;
+	CVI_U32 end = g_pastOv5647[ViPipe]->astSyncInfo[0].snsCfg.u32RegNum - 3;
+
+	for (i = start; i < end; i++) {
+		ov5647_write_register(ViPipe,
+				g_pastOv5647[ViPipe]->astSyncInfo[0].snsCfg.astI2cData[i].u32RegAddr,
+				g_pastOv5647[ViPipe]->astSyncInfo[0].snsCfg.astI2cData[i].u32Data);
+	}
+}
+
+#define OV5647_FLIP	0x3820
+#define OV5647_MIRROR	0x3821
+void ov5647_mirror_flip(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip)
+{
+	CVI_U8 flip, mirror;
+
+	flip = ov5647_read_register(ViPipe, OV5647_FLIP);
+	mirror = ov5647_read_register(ViPipe, OV5647_MIRROR);
+	flip &= ~(0x3 << 1);
+	mirror &= ~(0x3 << 1);
+
+	switch (eSnsMirrorFlip) {
+	case ISP_SNS_NORMAL:
+		break;
+	case ISP_SNS_MIRROR:
+		mirror |= 0x3 << 1;
+		break;
+	case ISP_SNS_FLIP:
+		flip |= 0x3 << 1;
+		break;
+	case ISP_SNS_MIRROR_FLIP:
+		flip |= 0x3 << 1;
+		mirror |= 0x3 << 1;
+		break;
+	default:
+		return;
+	}
+
+	ov5647_write_register(ViPipe, OV5647_FLIP, flip);
+	ov5647_write_register(ViPipe, OV5647_MIRROR, mirror);
+}
+
+#define OV5647_CHIP_ID_ADDR_H		0x300A
+#define OV5647_CHIP_ID_ADDR_L		0x300B
+#define OV5647_CHIP_ID			0x5647
+
+int ov5647_probe(VI_PIPE ViPipe)
+{
+	int nVal, nVal2;
+
+	usleep(1000);
+	if (ov5647_i2c_init(ViPipe) != CVI_SUCCESS)
+		return CVI_FAILURE;
+
+	nVal  = ov5647_read_register(ViPipe, OV5647_CHIP_ID_ADDR_H);
+	nVal2 = ov5647_read_register(ViPipe, OV5647_CHIP_ID_ADDR_L);
+	if (nVal < 0 || nVal2 < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "read sensor id error.\n");
+		return nVal;
+	}
+
+	if ((((nVal & 0xFF) << 8) | (nVal2 & 0xFF)) != OV5647_CHIP_ID) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Sensor ID Mismatch! Use the wrong sensor??\n");
+		return CVI_FAILURE;
+	}
+	return CVI_SUCCESS;
+}
+
+void ov5647_init(VI_PIPE ViPipe)
+{
+	ov5647_i2c_init(ViPipe);
+
+	delay_ms(10);
+
+	ov5647_linear_1080p30_init(ViPipe);
+
+	g_pastOv5647[ViPipe]->bInit = CVI_TRUE;
+}
+
+void ov5647_exit(VI_PIPE ViPipe)
+{
+	ov5647_i2c_exit(ViPipe);
+}
+
+/* 1080P30 */
+static void ov5647_linear_1080p30_init(VI_PIPE ViPipe)
+{
+	ov5647_write_register(ViPipe, 0x0100, 0x00);
+	ov5647_write_register(ViPipe, 0x0103, 0x01);
+	ov5647_write_register(ViPipe, 0x3035, 0x11);
+	ov5647_write_register(ViPipe, 0x3036, 0x64);
+	ov5647_write_register(ViPipe, 0x303c, 0x11);
+	ov5647_write_register(ViPipe, 0x3821, 0x00);
+	ov5647_write_register(ViPipe, 0x3820, 0x00);
+	ov5647_write_register(ViPipe, 0x370c, 0x0f);
+	ov5647_write_register(ViPipe, 0x3612, 0x5b);
+	ov5647_write_register(ViPipe, 0x3618, 0x04);
+	ov5647_write_register(ViPipe, 0x5000, 0x06);
+	ov5647_write_register(ViPipe, 0x5002, 0x40);
+	ov5647_write_register(ViPipe, 0x5003, 0x08);
+	ov5647_write_register(ViPipe, 0x5a00, 0x08);
+	ov5647_write_register(ViPipe, 0x3000, 0xff);
+	ov5647_write_register(ViPipe, 0x3001, 0xff);
+	ov5647_write_register(ViPipe, 0x3002, 0xff);
+	ov5647_write_register(ViPipe, 0x301d, 0xf0);
+	ov5647_write_register(ViPipe, 0x3503, 0x07);
+	ov5647_write_register(ViPipe, 0x3a18, 0x00);
+	ov5647_write_register(ViPipe, 0x3a19, 0xf8);
+	ov5647_write_register(ViPipe, 0x3c01, 0x80);
+	ov5647_write_register(ViPipe, 0x3b07, 0x0c);
+	ov5647_write_register(ViPipe, 0x380c, 0x09);
+	ov5647_write_register(ViPipe, 0x380d, 0x70);
+	ov5647_write_register(ViPipe, 0x380e, 0x04);
+	ov5647_write_register(ViPipe, 0x380f, 0x50);
+	ov5647_write_register(ViPipe, 0x3814, 0x11);
+	ov5647_write_register(ViPipe, 0x3815, 0x11);
+	ov5647_write_register(ViPipe, 0x3708, 0x64);
+	ov5647_write_register(ViPipe, 0x3709, 0x12);
+	ov5647_write_register(ViPipe, 0x3808, 0x07);
+	ov5647_write_register(ViPipe, 0x3809, 0x80);
+	ov5647_write_register(ViPipe, 0x380a, 0x04);
+	ov5647_write_register(ViPipe, 0x380b, 0x38);
+	ov5647_write_register(ViPipe, 0x3800, 0x01);
+	ov5647_write_register(ViPipe, 0x3801, 0x5c);
+	ov5647_write_register(ViPipe, 0x3802, 0x01);
+	ov5647_write_register(ViPipe, 0x3803, 0xb2);
+	ov5647_write_register(ViPipe, 0x3804, 0x08);
+	ov5647_write_register(ViPipe, 0x3805, 0xe3);
+	ov5647_write_register(ViPipe, 0x3806, 0x05);
+	ov5647_write_register(ViPipe, 0x3807, 0xf1);
+	ov5647_write_register(ViPipe, 0x3630, 0x2e);
+	ov5647_write_register(ViPipe, 0x3632, 0xe2);
+	ov5647_write_register(ViPipe, 0x3633, 0x23);
+	ov5647_write_register(ViPipe, 0x3634, 0x44);
+	ov5647_write_register(ViPipe, 0x3620, 0x64);
+	ov5647_write_register(ViPipe, 0x3621, 0xe0);
+	ov5647_write_register(ViPipe, 0x3600, 0x37);
+	ov5647_write_register(ViPipe, 0x3704, 0xa0);
+	ov5647_write_register(ViPipe, 0x3703, 0x5a);
+	ov5647_write_register(ViPipe, 0x3715, 0x78);
+	ov5647_write_register(ViPipe, 0x3717, 0x01);
+	ov5647_write_register(ViPipe, 0x3731, 0x02);
+	ov5647_write_register(ViPipe, 0x370b, 0x60);
+	ov5647_write_register(ViPipe, 0x3705, 0x1a);
+	ov5647_write_register(ViPipe, 0x3f05, 0x02);
+	ov5647_write_register(ViPipe, 0x3f06, 0x10);
+	ov5647_write_register(ViPipe, 0x3f01, 0x0a);
+	ov5647_write_register(ViPipe, 0x3a08, 0x01);
+	ov5647_write_register(ViPipe, 0x3a09, 0x4b);
+	ov5647_write_register(ViPipe, 0x3a0a, 0x01);
+	ov5647_write_register(ViPipe, 0x3a0b, 0x13);
+	ov5647_write_register(ViPipe, 0x3a0d, 0x04);
+	ov5647_write_register(ViPipe, 0x3a0e, 0x03);
+	ov5647_write_register(ViPipe, 0x3a0f, 0x58);
+	ov5647_write_register(ViPipe, 0x3a10, 0x50);
+	ov5647_write_register(ViPipe, 0x3a1b, 0x58);
+	ov5647_write_register(ViPipe, 0x3a1e, 0x50);
+	ov5647_write_register(ViPipe, 0x3a11, 0x60);
+	ov5647_write_register(ViPipe, 0x3a1f, 0x28);
+	ov5647_write_register(ViPipe, 0x4001, 0x02);
+	ov5647_write_register(ViPipe, 0x4004, 0x04);
+	ov5647_write_register(ViPipe, 0x4000, 0x09);
+	ov5647_write_register(ViPipe, 0x4050, 0x6e);
+	ov5647_write_register(ViPipe, 0x4051, 0x8f);
+	ov5647_write_register(ViPipe, 0x0100, 0x01);
+	ov5647_write_register(ViPipe, 0x3000, 0x00);
+	ov5647_write_register(ViPipe, 0x3001, 0x00);
+	ov5647_write_register(ViPipe, 0x3002, 0x00);
+	ov5647_write_register(ViPipe, 0x3017, 0xe0);
+	ov5647_write_register(ViPipe, 0x301c, 0xfc);
+	ov5647_write_register(ViPipe, 0x3636, 0x06);
+	ov5647_write_register(ViPipe, 0x3016, 0x08);
+	ov5647_write_register(ViPipe, 0x3827, 0xec);
+	ov5647_write_register(ViPipe, 0x3018, 0x44);
+	ov5647_write_register(ViPipe, 0x3035, 0x21);
+	ov5647_write_register(ViPipe, 0x3106, 0xf5);
+	ov5647_write_register(ViPipe, 0x3034, 0x1a);
+	ov5647_write_register(ViPipe, 0x301c, 0xf8);
+
+	ov5647_default_reg_init(ViPipe);
+
+	delay_ms(100);
+
+	printf("ViPipe:%d,===OV5647 1080P 30fps 10bit LINE Init OK!\n", ViPipe);
+}
+
+
+
+
+
diff --git a/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/Makefile b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/Makefile
new file mode 100644
index 000000000..1c908ce35
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/Makefile
@@ -0,0 +1,36 @@
+SHELL = /bin/bash
+ifeq ($(PARAM_FILE), )
+	PARAM_FILE=../../../../../../$(shell echo $(MW_VER))/Makefile.param
+	include $(PARAM_FILE)
+endif
+
+SDIR = $(PWD)
+SRCS = $(wildcard $(SDIR)/*.c)
+INCS = -I$(MW_INC) -I$(ISP_INC) -I$(KERNEL_INC) -I./include
+OBJS = $(SRCS:.c=.o)
+DEPS = $(SRCS:.c=.d)
+TARGET_A = $(MW_LIB)/libsns_tp2825.a
+TARGET_SO = $(MW_LIB)/libsns_tp2825.so
+
+EXTRA_CFLAGS = $(INCS) $(PROJ_CFLAGS)
+EXTRA_LDFLAGS =
+
+.PHONY : clean all
+all : $(TARGET_A) $(TARGET_SO)
+
+$(SDIR)/%.o: $(SDIR)/%.c
+	@$(CC) $(DEPFLAGS) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
+	@echo [$(notdir $(CC))] $(notdir $@)
+
+$(TARGET_A): $(OBJS)
+	@$(AR) $(ARFLAGS) $@ $(OBJS)
+	@echo -e $(YELLOW)[LINK]$(END)[$(notdir $(AR))] $(notdir $@)
+
+$(TARGET_SO): $(OBJS)
+	@$(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -o $@ --start-group $(OBJS) --end-group
+	@echo -e $(GREEN)[LINK]$(END)[$(notdir $(LD))] $(notdir $@)
+
+clean:
+	@rm -f $(OBJS) $(DEPS) $(TARGET_A) $(TARGET_SO)
+
+-include $(DEPS)
diff --git a/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos.c b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos.c
new file mode 100644
index 000000000..605760f89
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos.c
@@ -0,0 +1,277 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <syslog.h>
+#include <errno.h>
+#include <unistd.h>
+#ifdef ARCH_CV182X
+#include "cvi_type.h"
+#include "cvi_comm_video.h"
+#include <linux/cvi_vip_snsr.h>
+#else
+#include <linux/cvi_type.h>
+#include <linux/cvi_comm_video.h>
+#include <linux/vi_snsr.h>
+#endif
+#include "cvi_debug.h"
+#include "cvi_comm_sns.h"
+#include "cvi_sns_ctrl.h"
+#include "cvi_ae_comm.h"
+#include "cvi_awb_comm.h"
+#include "cvi_ae.h"
+#include "cvi_awb.h"
+#include "cvi_isp.h"
+#include "tp2825_cmos_ex.h"
+#include "tp2825_cmos_param.h"
+
+/****************************************************************************
+ * global variables                                                         *
+ ****************************************************************************/
+
+ISP_SNS_COMMBUS_U g_auntp2825_BusInfo[VI_MAX_PIPE_NUM] = {
+	[0] = { .s8I2cDev = 0},
+	[1 ... VI_MAX_PIPE_NUM - 1] = { .s8I2cDev = -1}
+};
+
+ISP_SNS_STATE_S *g_pasttp2825[VI_MAX_PIPE_NUM] = {CVI_NULL};
+
+#define TP2825_SENSOR_GET_CTX(dev, pstCtx)   (pstCtx = g_pasttp2825[dev])
+#define TP2825_SENSOR_SET_CTX(dev, pstCtx)   (g_pasttp2825[dev] = pstCtx)
+#define TP2825_SENSOR_RESET_CTX(dev)         (g_pasttp2825[dev] = CVI_NULL)
+
+#define TP2825_RES_IS_1440P(w, h)      ((w) <= 2560 && (h) <= 1440)
+#define TP2825_ID 0x2825
+/****************************************************************************
+ * local variables and functions                                            *
+ ****************************************************************************/
+static CVI_S32 cmos_get_wdr_size(VI_PIPE ViPipe, ISP_SNS_ISP_INFO_S *pstIspCfg)
+{
+	const tp2825_MODE_S *pstMode = CVI_NULL;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstMode = &g_asttp2825_mode[pstSnsState->u8ImgMode];
+	pstIspCfg->frm_num = 1;
+	memcpy(&pstIspCfg->img_size[0], &pstMode->astImg[0], sizeof(ISP_WDR_SIZE_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_get_sns_regs_info(VI_PIPE ViPipe, ISP_SNS_SYNC_INFO_S *pstSnsSyncInfo)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+	ISP_SNS_SYNC_INFO_S *pstCfg0 = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSnsSyncInfo);
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	pstCfg0 = &pstSnsState->astSyncInfo[0];
+	cmos_get_wdr_size(ViPipe, &pstCfg0->ispCfg);
+	memcpy(pstSnsSyncInfo, &pstSnsState->astSyncInfo[0], sizeof(ISP_SNS_SYNC_INFO_S));
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_set_image_mode(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S *pstSensorImageMode)
+{
+	CVI_U8 u8SensorImageMode = 0;
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	CMOS_CHECK_POINTER(pstSensorImageMode);
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+
+	u8SensorImageMode = pstSnsState->u8ImgMode;
+
+	if (pstSensorImageMode->f32Fps <= 30) {
+		if (TP2825_RES_IS_1440P(pstSensorImageMode->u16Width, pstSensorImageMode->u16Height)) {
+			u8SensorImageMode = TP2825_MODE_1440P_30P;
+		} else {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Not support! Width:%d, Height:%d, Fps:%f, WDRMode:%d\n",
+				pstSensorImageMode->u16Width,
+				pstSensorImageMode->u16Height,
+				pstSensorImageMode->f32Fps,
+				pstSnsState->enWDRMode);
+			return CVI_FAILURE;
+		}
+	}
+
+	if ((pstSnsState->bInit == CVI_TRUE) && (u8SensorImageMode == pstSnsState->u8ImgMode)) {
+		/* Don't need to switch SensorImageMode */
+		return CVI_FAILURE;
+	}
+
+	pstSnsState->u8ImgMode = u8SensorImageMode;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_global_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER_VOID(pstSnsState);
+
+	pstSnsState->bInit = CVI_FALSE;
+	pstSnsState->u8ImgMode = TP2825_MODE_1440P_30P;
+	pstSnsState->enWDRMode = WDR_MODE_NONE;
+}
+
+static CVI_S32 sensor_rx_attr(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *pstRxAttr)
+{
+	ISP_SNS_STATE_S *pstSnsState = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pstSnsState);
+	CMOS_CHECK_POINTER(pstSnsState);
+	CMOS_CHECK_POINTER(pstRxAttr);
+
+	memcpy(pstRxAttr, &tp2825_rx_attr, sizeof(*pstRxAttr));
+	//CVI_TRACE_SNS(CVI_DBG_INFO, "get tp2825_rx0_attr\n");
+
+	pstRxAttr->img_size.width = g_asttp2825_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Width;
+	pstRxAttr->img_size.height = g_asttp2825_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Height;
+
+	return CVI_SUCCESS;
+
+}
+
+static CVI_S32 sensor_patch_rx_attr(RX_INIT_ATTR_S *pstRxInitAttr)
+{
+	SNS_COMBO_DEV_ATTR_S *pstRxAttr = &tp2825_rx_attr;
+
+
+	CMOS_CHECK_POINTER(pstRxInitAttr);
+
+	if (pstRxInitAttr->stMclkAttr.bMclkEn)
+		pstRxAttr->mclk.cam = pstRxInitAttr->stMclkAttr.u8Mclk;
+
+	if (pstRxInitAttr->MipiDev >= VI_MAX_DEV_NUM)
+		return CVI_SUCCESS;
+
+	pstRxAttr->devno = pstRxInitAttr->MipiDev;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 cmos_init_sensor_exp_function(ISP_SENSOR_EXP_FUNC_S *pstSensorExpFunc)
+{
+	CMOS_CHECK_POINTER(pstSensorExpFunc);
+
+	memset(pstSensorExpFunc, 0, sizeof(ISP_SENSOR_EXP_FUNC_S));
+
+	pstSensorExpFunc->pfn_cmos_sensor_init = tp2825_init;
+	pstSensorExpFunc->pfn_cmos_sensor_exit = tp2825_exit;
+	pstSensorExpFunc->pfn_cmos_sensor_global_init = sensor_global_init;
+	pstSensorExpFunc->pfn_cmos_set_image_mode = cmos_set_image_mode;
+	pstSensorExpFunc->pfn_cmos_get_sns_reg_info = cmos_get_sns_regs_info;
+	return CVI_SUCCESS;
+}
+
+/****************************************************************************
+ * callback structure                                                       *
+ ****************************************************************************/
+
+static CVI_S32 tp2825_set_bus_info(VI_PIPE ViPipe, ISP_SNS_COMMBUS_U unSNSBusInfo)
+{
+	g_auntp2825_BusInfo[ViPipe].s8I2cDev = unSNSBusInfo.s8I2cDev;
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_ctx_init(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+
+	if (pastSnsStateCtx == CVI_NULL) {
+		pastSnsStateCtx = (ISP_SNS_STATE_S *)malloc(sizeof(ISP_SNS_STATE_S));
+		if (pastSnsStateCtx == CVI_NULL) {
+			CVI_TRACE_SNS(CVI_DBG_ERR, "Isp[%d] SnsCtx malloc memory failed!\n", ViPipe);
+			return -ENOMEM;
+		}
+	}
+
+	memset(pastSnsStateCtx, 0, sizeof(ISP_SNS_STATE_S));
+
+	TP2825_SENSOR_SET_CTX(ViPipe, pastSnsStateCtx);
+
+	return CVI_SUCCESS;
+}
+
+static CVI_VOID sensor_ctx_exit(VI_PIPE ViPipe)
+{
+	ISP_SNS_STATE_S *pastSnsStateCtx = CVI_NULL;
+
+	TP2825_SENSOR_GET_CTX(ViPipe, pastSnsStateCtx);
+	SENSOR_FREE(pastSnsStateCtx);
+	TP2825_SENSOR_RESET_CTX(ViPipe);
+}
+
+static CVI_S32 sensor_register_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	(void) pstAeLib;
+	(void) pstAwbLib;
+
+	CVI_S32 s32Ret;
+	ISP_SENSOR_REGISTER_S stIspRegister;
+	ISP_SNS_ATTR_INFO_S   stSnsAttrInfo;
+
+	s32Ret = sensor_ctx_init(ViPipe);
+
+	if (s32Ret != CVI_SUCCESS)
+		return CVI_FAILURE;
+
+	stSnsAttrInfo.eSensorId = TP2825_ID;
+
+	s32Ret  = cmos_init_sensor_exp_function(&stIspRegister.stSnsExp);
+	s32Ret |= CVI_ISP_SensorRegCallBack(ViPipe, &stSnsAttrInfo, &stIspRegister);
+
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor register callback function failed!\n");
+		return s32Ret;
+	}
+
+	return CVI_SUCCESS;
+}
+
+static CVI_S32 sensor_unregister_callback(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ALG_LIB_S *pstAwbLib)
+{
+	(void) pstAeLib;
+	(void) pstAwbLib;
+
+	CVI_S32 s32Ret;
+
+	s32Ret = CVI_ISP_SensorUnRegCallBack(ViPipe, TP2825_ID);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "sensor unregister callback function failed!\n");
+		return s32Ret;
+	}
+
+	sensor_ctx_exit(ViPipe);
+
+	return CVI_SUCCESS;
+}
+
+ISP_SNS_OBJ_S stSnsTP2825_Obj = {
+	.pfnRegisterCallback    = sensor_register_callback,
+	.pfnUnRegisterCallback  = sensor_unregister_callback,
+	.pfnMirrorFlip          = CVI_NULL,
+	.pfnStandby             = CVI_NULL,
+	.pfnRestart             = CVI_NULL,
+	.pfnWriteReg            = tp2825_write_register,
+	.pfnReadReg             = tp2825_read_register,
+	.pfnSetBusInfo          = tp2825_set_bus_info,
+	.pfnSetInit             = CVI_NULL,
+	.pfnPatchRxAttr         = sensor_patch_rx_attr,
+	.pfnPatchI2cAddr        = CVI_NULL,
+	.pfnGetRxAttr           = sensor_rx_attr,
+	.pfnExpSensorCb         = cmos_init_sensor_exp_function,
+	.pfnExpAeCb             = CVI_NULL,
+	.pfnSnsProbe            = CVI_NULL,};
+
diff --git a/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_ctrl.c b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_ctrl.c
new file mode 100644
index 000000000..9a23499cc
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_ctrl.c
@@ -0,0 +1,425 @@
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <syslog.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+#include <stdlib.h>
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_comm_video.h"
+#else
+#include <linux/vi_snsr.h>
+#include <linux/cvi_comm_video.h>
+#endif
+#include <pthread.h>
+#include <signal.h>
+#include "cvi_sns_ctrl.h"
+#include "tp2825_cmos_ex.h"
+
+const CVI_U8 tp2825_i2c_addr = 0x45;        /* I2C slave address of tp2825, SA0=0:0x44, SA0=1:0x45*/
+const CVI_U32 tp2825_addr_byte = 1;
+const CVI_U32 tp2825_data_byte = 1;
+static int g_fd[VI_MAX_PIPE_NUM] = {[0 ... (VI_MAX_PIPE_NUM - 1)] = -1};
+static pthread_t g_tp2825_thid;
+
+
+#define SYSFS_GPIO_DIR "/sys/class/gpio"
+#define MAX_BUF 64
+
+#define tp2825_BLUE_SCREEN 0
+
+
+enum CVI_GPIO_NUM_E {
+CVI_GPIOD_00 = 404,
+CVI_GPIOD_01,   CVI_GPIOD_02,   CVI_GPIOD_03,   CVI_GPIOD_04,   CVI_GPIOD_05,
+CVI_GPIOD_06,   CVI_GPIOD_07,   CVI_GPIOD_08,   CVI_GPIOD_09,   CVI_GPIOD_10,
+CVI_GPIOD_11,
+CVI_GPIOC_00 = 416,
+CVI_GPIOC_01,   CVI_GPIOC_02,   CVI_GPIOC_03,   CVI_GPIOC_04,   CVI_GPIOC_05,
+CVI_GPIOC_06,   CVI_GPIOC_07,   CVI_GPIOC_08,   CVI_GPIOC_09,   CVI_GPIOC_10,
+CVI_GPIOC_11,   CVI_GPIOC_12,   CVI_GPIOC_13,   CVI_GPIOC_14,   CVI_GPIOC_15,
+CVI_GPIOC_16,   CVI_GPIOC_17,   CVI_GPIOC_18,   CVI_GPIOC_19,   CVI_GPIOC_20,
+CVI_GPIOC_21,   CVI_GPIOC_22,   CVI_GPIOC_23,   CVI_GPIOC_24,   CVI_GPIOC_25,
+CVI_GPIOC_26,   CVI_GPIOC_27,   CVI_GPIOC_28,   CVI_GPIOC_29,   CVI_GPIOC_30,
+CVI_GPIOC_31,
+CVI_GPIOB_00 = 448,
+CVI_GPIOB_01,   CVI_GPIOB_02,   CVI_GPIOB_03,   CVI_GPIOB_04,   CVI_GPIOB_05,
+CVI_GPIOB_06,   CVI_GPIOB_07,   CVI_GPIOB_08,   CVI_GPIOB_09,   CVI_GPIOB_10,
+CVI_GPIOB_11,   CVI_GPIOB_12,   CVI_GPIOB_13,   CVI_GPIOB_14,   CVI_GPIOB_15,
+CVI_GPIOB_16,   CVI_GPIOB_17,   CVI_GPIOB_18,   CVI_GPIOB_19,   CVI_GPIOB_20,
+CVI_GPIOB_21,   CVI_GPIOB_22,   CVI_GPIOB_23,   CVI_GPIOB_24,   CVI_GPIOB_25,
+CVI_GPIOB_26,   CVI_GPIOB_27,   CVI_GPIOB_28,   CVI_GPIOB_29,   CVI_GPIOB_30,
+CVI_GPIOB_31,
+CVI_GPIOA_00 = 480,
+CVI_GPIOA_01,   CVI_GPIOA_02,   CVI_GPIOA_03,   CVI_GPIOA_04,   CVI_GPIOA_05,
+CVI_GPIOA_06,   CVI_GPIOA_07,   CVI_GPIOA_08,   CVI_GPIOA_09,   CVI_GPIOA_10,
+CVI_GPIOA_11,   CVI_GPIOA_12,   CVI_GPIOA_13,   CVI_GPIOA_14,   CVI_GPIOA_15,
+CVI_GPIOA_16,   CVI_GPIOA_17,   CVI_GPIOA_18,   CVI_GPIOA_19,   CVI_GPIOA_20,
+CVI_GPIOA_21,   CVI_GPIOA_22,   CVI_GPIOA_23,   CVI_GPIOA_24,   CVI_GPIOA_25,
+CVI_GPIOA_26,   CVI_GPIOA_27,   CVI_GPIOA_28,   CVI_GPIOA_29,   CVI_GPIOA_30,
+CVI_GPIOA_31,
+};
+
+#define CVI_GPIO_MIN CVI_GPIOD_00
+#define CVI_GPIO_MAX CVI_GPIOA_31
+
+#define SYSFS_GPIO_DIR "/sys/class/gpio"
+#define MAX_BUF 64
+static int TP2825_GPIO_Export(unsigned int gpio)
+{
+	int fd, len;
+	char buf[MAX_BUF];
+
+	fd = open(SYSFS_GPIO_DIR"/export", O_WRONLY);
+	if (fd < 0) {
+		perror("gpio/export");
+		return fd;
+	}
+
+	len = snprintf(buf, sizeof(buf), "%d", gpio);
+	write(fd, buf, len);
+	close(fd);
+
+	return 0;
+}
+
+static int TP2825_GPIO_SetDirection(unsigned int gpio, unsigned int out_flag)
+{
+	int fd;
+	char buf[MAX_BUF];
+
+	snprintf(buf, sizeof(buf), SYSFS_GPIO_DIR"/gpio%d/direction", gpio);
+	if (access(buf, 0) == -1)
+		TP2825_GPIO_Export(gpio);
+
+	fd = open(buf, O_WRONLY);
+	if (fd < 0) {
+		perror("gpio/direction");
+		return fd;
+	}
+	//printf("mark %d , %s\n",out_flag, buf);
+	if (out_flag)
+		write(fd, "out", 4);
+	else
+		write(fd, "in", 3);
+
+	close(fd);
+	return 0;
+}
+static int TP2825_GPIO_SetValue(unsigned int gpio, unsigned int value)
+{
+	int fd;
+	char buf[MAX_BUF];
+
+	snprintf(buf, sizeof(buf), SYSFS_GPIO_DIR"/gpio%d/value", gpio);
+	if (access(buf, 0) == -1)
+		TP2825_GPIO_Export(gpio);
+
+	TP2825_GPIO_SetDirection(gpio, 1); //output
+
+	fd = open(buf, O_WRONLY);
+	if (fd < 0) {
+		perror("gpio/set-value");
+		return fd;
+	}
+
+	if (value)
+		write(fd, "1", 2);
+	else
+		write(fd, "0", 2);
+
+	close(fd);
+	return 0;
+}
+
+int tp2825_sys_init(VI_PIPE ViPipe)
+{
+	(void) ViPipe;
+
+#ifdef AHD_PWR_EN
+	if (PR2020_GPIO_SetValue(CVI_GPIOA_00, 1) != 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "set power down gpio error!\n");
+		return CVI_FAILURE;
+	}
+#endif
+	//PR2K_RST
+	if (TP2825_GPIO_SetValue(CVI_GPIOB_12, 1) != 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "set reset gpio error!\n");
+		return CVI_FAILURE;
+	}
+#ifdef BACK_DET
+	if (PR2020_GPIO_SetValue(CVI_GPIOD_01, 1) != 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "set back detect gpio error!\n");
+		return CVI_FAILURE;
+	}
+#endif
+	return CVI_SUCCESS;
+}
+
+int tp2825_i2c_init(VI_PIPE ViPipe)
+{
+	char acDevFile[16] = {0};
+	CVI_U8 u8DevNum;
+	int ret;
+
+	if (g_fd[ViPipe] >= 0)
+		return CVI_SUCCESS;
+
+	u8DevNum = g_auntp2825_BusInfo[ViPipe].s8I2cDev;
+	snprintf(acDevFile, sizeof(acDevFile),  "/dev/i2c-%u", u8DevNum);
+	syslog(LOG_DEBUG, "open %s\n", acDevFile);
+
+	g_fd[ViPipe] = open(acDevFile, O_RDWR, 0600);
+
+	if (g_fd[ViPipe] < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "Open /dev/cvi_i2c_drv-%u error!\n", u8DevNum);
+		return CVI_FAILURE;
+	}
+
+	ret = ioctl(g_fd[ViPipe], I2C_SLAVE_FORCE, tp2825_i2c_addr);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return ret;
+	}
+
+	return CVI_SUCCESS;
+}
+
+int tp2825_i2c_exit(VI_PIPE ViPipe)
+{
+	if (g_fd[ViPipe] >= 0) {
+		close(g_fd[ViPipe]);
+		g_fd[ViPipe] = -1;
+		return CVI_SUCCESS;
+	}
+	return CVI_FAILURE;
+}
+
+int tp2825_read_register(VI_PIPE ViPipe, int addr)
+{
+	int ret, data;
+	CVI_U8 buf[8];
+	CVI_U8 idx = 0;
+
+	if (g_fd[ViPipe] < 0)
+		return 0;
+
+	if (tp2825_addr_byte == 2)
+		buf[idx++] = (addr >> 8) & 0xff;
+
+	// add address byte 0
+	buf[idx++] = addr & 0xff;
+
+	ret = write(g_fd[ViPipe], buf, tp2825_addr_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	buf[0] = 0;
+	buf[1] = 0;
+	ret = read(g_fd[ViPipe], buf, tp2825_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_READ error!\n");
+		return 0;
+	}
+
+	// pack read back data
+	data = 0;
+	if (tp2825_data_byte == 2) {
+		data = buf[0] << 8;
+		data += buf[1];
+	} else {
+		data = buf[0];
+	}
+	printf("i2c r 0x%x = 0x%x\n", addr, data);
+	syslog(LOG_DEBUG, "i2c r 0x%x = 0x%x\n", addr, data);
+	return data;
+}
+
+int tp2825_write_register(VI_PIPE ViPipe, int addr, int data)
+{
+	CVI_U8 idx = 0;
+	int ret;
+	CVI_U8 buf[8];
+
+	if (g_fd[ViPipe] < 0)
+		return CVI_SUCCESS;
+
+	if (tp2825_addr_byte == 2)
+		buf[idx++] = (addr >> 8) & 0xff;
+
+	// add address byte 0
+	buf[idx++] = addr & 0xff;
+
+	if (tp2825_data_byte == 2)
+		buf[idx++] = (data >> 8) & 0xff;
+
+	// add data byte 0
+	buf[idx++] = data & 0xff;
+
+	ret = write(g_fd[ViPipe], buf, tp2825_addr_byte + tp2825_data_byte);
+	if (ret < 0) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "I2C_WRITE error!\n");
+		return CVI_FAILURE;
+	}
+	syslog(LOG_DEBUG, "i2c w 0x%x 0x%x\n", addr, data);
+
+	return CVI_SUCCESS;
+}
+static void delay_ms(int ms)
+{
+	usleep(ms * 1000);
+}
+
+void tp2825_init_setting(VI_PIPE ViPipe, CVI_U8 mode)
+{
+	//unsigned char tmp;
+	tp2825_write_register(ViPipe, 0x02, 0x50);//Mpage
+	tp2825_write_register(ViPipe, 0x05, 0x00);
+	tp2825_write_register(ViPipe, 0x06, 0x32);
+	tp2825_write_register(ViPipe, 0x07, 0xC0);
+	tp2825_write_register(ViPipe, 0x08, 0x00);
+	tp2825_write_register(ViPipe, 0x09, 0x24);
+	tp2825_write_register(ViPipe, 0x0A, 0x48);
+	tp2825_write_register(ViPipe, 0x0B, 0xC0);
+	tp2825_write_register(ViPipe, 0x0C, 0x03);
+	tp2825_write_register(ViPipe, 0x0D, 0x50);
+	tp2825_write_register(ViPipe, 0x0E, 0x00);
+	tp2825_write_register(ViPipe, 0x0F, 0x00);
+	tp2825_write_register(ViPipe, 0x10, 0x00);
+	tp2825_write_register(ViPipe, 0x11, 0x40);
+	tp2825_write_register(ViPipe, 0x12, 0x60);
+	tp2825_write_register(ViPipe, 0x13, 0x00);
+	tp2825_write_register(ViPipe, 0x14, 0x00);
+	tp2825_write_register(ViPipe, 0x15, 0x23);
+	tp2825_write_register(ViPipe, 0x16, 0x1B);
+	tp2825_write_register(ViPipe, 0x17, 0x00);
+	tp2825_write_register(ViPipe, 0x18, 0x38);
+	tp2825_write_register(ViPipe, 0x19, 0xA0);
+	tp2825_write_register(ViPipe, 0x1A, 0x5A);
+	tp2825_write_register(ViPipe, 0x1B, 0x00);
+	//PAGE0
+	if (mode == TP2825_MODE_1440P_30P) {
+		tp2825_write_register(ViPipe, 0x1C, 0x0C);
+		tp2825_write_register(ViPipe, 0x1D, 0xE2);
+	} else if (mode == TP2825_MODE_1440P_25P) {
+		tp2825_write_register(ViPipe, 0x1C, 0x0F);
+		tp2825_write_register(ViPipe, 0x1D, 0x76);
+	}
+	tp2825_write_register(ViPipe, 0x1E, 0x80);
+	tp2825_write_register(ViPipe, 0x1F, 0x80);
+	tp2825_write_register(ViPipe, 0x20, 0x50);
+	tp2825_write_register(ViPipe, 0x21, 0x84);
+	tp2825_write_register(ViPipe, 0x22, 0x36);
+	tp2825_write_register(ViPipe, 0x23, 0x3C);
+	tp2825_write_register(ViPipe, 0x24, 0x04);
+	tp2825_write_register(ViPipe, 0x25, 0xFF);
+	tp2825_write_register(ViPipe, 0x26, 0x05);
+	tp2825_write_register(ViPipe, 0x27, 0xAD);
+	tp2825_write_register(ViPipe, 0x28, 0x00);
+	tp2825_write_register(ViPipe, 0x29, 0x48);
+	tp2825_write_register(ViPipe, 0x2A, 0x30);
+	tp2825_write_register(ViPipe, 0x2B, 0x60);
+	tp2825_write_register(ViPipe, 0x2C, 0x2A);
+	tp2825_write_register(ViPipe, 0x2D, 0x58);
+	tp2825_write_register(ViPipe, 0x2E, 0x70);
+	tp2825_write_register(ViPipe, 0x2F, 0x00);
+	tp2825_write_register(ViPipe, 0x30, 0x74);
+	tp2825_write_register(ViPipe, 0x31, 0x58);
+	tp2825_write_register(ViPipe, 0x32, 0x9F);
+	tp2825_write_register(ViPipe, 0x33, 0x60);
+	tp2825_write_register(ViPipe, 0x34, 0x00);
+	tp2825_write_register(ViPipe, 0x35, 0x15);
+	tp2825_write_register(ViPipe, 0x36, 0xDC);
+	tp2825_write_register(ViPipe, 0x37, 0x00);
+	tp2825_write_register(ViPipe, 0x38, 0x40);
+	tp2825_write_register(ViPipe, 0x39, 0x48);
+	tp2825_write_register(ViPipe, 0x3A, 0x12);
+	tp2825_write_register(ViPipe, 0x3B, 0x26);
+	tp2825_write_register(ViPipe, 0x3C, 0x00);
+	tp2825_write_register(ViPipe, 0x3D, 0x60);
+	tp2825_write_register(ViPipe, 0x3E, 0x00);
+	tp2825_write_register(ViPipe, 0x3F, 0x00);
+	tp2825_write_register(ViPipe, 0x40, 0x00);
+	tp2825_write_register(ViPipe, 0x41, 0x00);
+	tp2825_write_register(ViPipe, 0x42, 0x00);
+	tp2825_write_register(ViPipe, 0x43, 0x00);
+	tp2825_write_register(ViPipe, 0x44, 0x00);
+	tp2825_write_register(ViPipe, 0x45, 0x00);
+	tp2825_write_register(ViPipe, 0x46, 0x00);
+	tp2825_write_register(ViPipe, 0x47, 0x00);
+	tp2825_write_register(ViPipe, 0x48, 0x00);
+	tp2825_write_register(ViPipe, 0x49, 0x00);
+	tp2825_write_register(ViPipe, 0x4A, 0x00);
+	tp2825_write_register(ViPipe, 0x4B, 0x00);
+	tp2825_write_register(ViPipe, 0x4C, 0x43);
+	tp2825_write_register(ViPipe, 0x4D, 0x00);
+	tp2825_write_register(ViPipe, 0x4E, 0x0D);
+	tp2825_write_register(ViPipe, 0x4F, 0x00);
+	tp2825_write_register(ViPipe, 0xF0, 0x00);
+	tp2825_write_register(ViPipe, 0xF1, 0x00);
+	tp2825_write_register(ViPipe, 0xF2, 0x00);
+	tp2825_write_register(ViPipe, 0xF3, 0x00);
+	tp2825_write_register(ViPipe, 0xF4, 0x20);
+	tp2825_write_register(ViPipe, 0xF5, 0x10);
+	tp2825_write_register(ViPipe, 0xF6, 0x00);
+	tp2825_write_register(ViPipe, 0xF7, 0x00);
+	tp2825_write_register(ViPipe, 0xF8, 0x00);
+	tp2825_write_register(ViPipe, 0xF9, 0x00);
+	tp2825_write_register(ViPipe, 0xFA, 0x03);
+	tp2825_write_register(ViPipe, 0xFB, 0x00);
+	tp2825_write_register(ViPipe, 0xFC, 0x00);
+
+	printf("ViPipe:%d,===tp28251440P 30fps 10bit LINE Init OK!===\n", ViPipe);
+}
+
+void tp2825_init(VI_PIPE ViPipe)
+{
+	if (tp2825_sys_init(ViPipe) != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "TP2825 sys init fail\n");
+		return;
+	}
+
+	delay_ms(20);
+
+	if (tp2825_i2c_init(ViPipe) != CVI_SUCCESS) {
+		CVI_TRACE_SNS(CVI_DBG_ERR, "TP2825 i2c init fail\n");
+		return;
+	}
+
+	syslog(LOG_DEBUG, "Loading Techpoint tp2825 sensor\n");
+
+	// check sensor chip id
+	tp2825_write_register(ViPipe, 0x40, 0x0);
+	if (tp2825_read_register(ViPipe, 0xfe) != 0x28 ||
+		tp2825_read_register(ViPipe, 0xff) != 0x25) {
+		syslog(LOG_DEBUG, "read tp2825 chip id fail\n");
+		return;
+	}
+
+	if (g_pasttp2825[ViPipe]->u8ImgMode == TP2825_MODE_1440P_30P)
+		syslog(LOG_DEBUG, "Techpoint tp2825 1440 30FPS\n");
+	else
+		syslog(LOG_DEBUG, "Techpoint tp2825 1440 25FPS\n");
+
+	tp2825_init_setting(ViPipe, g_pasttp2825[ViPipe]->u8ImgMode);
+#if tp2825_BLUE_SCREEN
+	tp2825_write_register(ViPipe, 0x40, 0x00);
+	tp2825_write_register(ViPipe, 0x2A, 0x34);
+#endif
+}
+
+void tp2825_exit(VI_PIPE ViPipe)
+{
+	if (g_tp2825_thid)
+		pthread_kill(g_tp2825_thid, SIGQUIT);
+
+	tp2825_i2c_exit(ViPipe);
+}
diff --git a/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_ex.h b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_ex.h
new file mode 100644
index 000000000..33dd03f77
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_ex.h
@@ -0,0 +1,62 @@
+#ifndef __tp2825_CMOS_EX_H_
+#define __tp2825_CMOS_EX_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+typedef enum _tp2825_MODE_E {
+	TP2825_MODE_1440P_25P,
+	TP2825_MODE_1440P_30P,
+	TP2825_MODE_NUM
+} tp2825_MODE_E;
+
+typedef struct _tp2825_MODE_S {
+	ISP_WDR_SIZE_S astImg[2];
+	CVI_FLOAT f32MaxFps;
+	CVI_FLOAT f32MinFps;
+	CVI_U32 u32HtsDef;
+	CVI_U32 u32VtsDef;
+	SNS_ATTR_S stExp[2];
+	SNS_ATTR_S stAgain[2];
+	SNS_ATTR_S stDgain[2];
+	CVI_U8 u8DgainReg;
+	char name[64];
+} tp2825_MODE_S;
+
+/****************************************************************************
+ * external variables and functions                                         *
+ ****************************************************************************/
+
+extern ISP_SNS_STATE_S *g_pasttp2825[VI_MAX_PIPE_NUM];
+extern ISP_SNS_COMMBUS_U g_auntp2825_BusInfo[];
+extern const CVI_U8 tp2825_i2c_addr;
+extern const CVI_U32 tp2825_addr_byte;
+extern const CVI_U32 tp2825_data_byte;
+extern void tp2825_init(VI_PIPE ViPipe);
+extern void tp2825_exit(VI_PIPE ViPipe);
+extern void tp2825_standby(VI_PIPE ViPipe);
+extern void tp2825_restart(VI_PIPE ViPipe);
+extern int  tp2825_write_register(VI_PIPE ViPipe, int addr, int data);
+extern int  tp2825_read_register(VI_PIPE ViPipe, int addr);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __tp2825_CMOS_EX_H_ */
diff --git a/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_param.h b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_param.h
new file mode 100644
index 000000000..29f1a109e
--- /dev/null
+++ b/middleware/v2/component/isp/sensor/cv181x/techpoint_tp2825/tp2825_cmos_param.h
@@ -0,0 +1,89 @@
+#ifndef __tp2825_CMOS_PARAM_H_
+#define __tp2825_CMOS_PARAM_H_
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#ifdef ARCH_CV182X
+#include <linux/cvi_vip_cif.h>
+#include <linux/cvi_vip_snsr.h>
+#include "cvi_type.h"
+#else
+#include <linux/cif_uapi.h>
+#include <linux/vi_snsr.h>
+#include <linux/cvi_type.h>
+#endif
+#include "cvi_sns_ctrl.h"
+#include "tp2825_cmos_ex.h"
+
+static const tp2825_MODE_S g_asttp2825_mode[TP2825_MODE_NUM] = {
+	[TP2825_MODE_1440P_30P] = {
+		.name = "1440p30",
+		.astImg[0] = {
+			.stSnsSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stWndRect = {
+				.s32X = 0,
+				.s32Y = 0,
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stMaxSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+		},
+	},
+	[TP2825_MODE_1440P_25P] = {
+		.name = "1440p30",
+		.astImg[0] = {
+			.stSnsSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stWndRect = {
+				.s32X = 0,
+				.s32Y = 0,
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+			.stMaxSize = {
+				.u32Width = 2560,
+				.u32Height = 1440,
+			},
+		},
+	},
+};
+
+struct combo_dev_attr_s tp2825_rx_attr = {
+	.input_mode = INPUT_MODE_BT1120,
+	.mac_clk = RX_MAC_CLK_400M,
+	.mclk = {
+		.cam = 0,
+		.freq = CAMPLL_FREQ_NONE,
+	},
+	.ttl_attr = {
+		.vi = TTL_VI_SRC_VI1,
+		.func = {
+			-1, -1, -1, -1,
+			0, 1, 2, 3, 4, 5, 6, 7,
+			12, 11, 14, 13,
+			8, 15, 10, 9,
+		},
+	},
+	.devno = 0,
+};
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* End of #ifdef __cplusplus */
+
+
+#endif /* __tp2825_CMOS_PARAM_H_ */
diff --git a/middleware/v2/cv180x/lib_glibc_riscv64/libawb.a b/middleware/v2/cv180x/lib_glibc_riscv64/libawb.a
index e41c7979f..21c60d092 100644
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diff --git a/middleware/v2/cv180x/lib_glibc_riscv64/libawb.so b/middleware/v2/cv180x/lib_glibc_riscv64/libawb.so
index ba5f4c865..457524148 100755
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diff --git a/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.a b/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.a
index fb3e852e4..2d6b59dfe 100644
Binary files a/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.a and b/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.a differ
diff --git a/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.so b/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.so
index 57460a81f..21b3d9ff4 100755
Binary files a/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.so and b/middleware/v2/cv180x/lib_glibc_riscv64/libcvi_ispd2.so differ
diff --git a/middleware/v2/cv180x/lib_glibc_riscv64/libisp.a b/middleware/v2/cv180x/lib_glibc_riscv64/libisp.a
index 024dde0fb..e5a0d6c3f 100644
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diff --git a/middleware/v2/cv180x/lib_glibc_riscv64/libisp.so b/middleware/v2/cv180x/lib_glibc_riscv64/libisp.so
index d06fdc944..36da8d39e 100755
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diff --git a/middleware/v2/cv180x/lib_glibc_riscv64/libisp_algo.a b/middleware/v2/cv180x/lib_glibc_riscv64/libisp_algo.a
index 9bb9a3a96..5e648514b 100644
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index fb5f15ed0..fefd1f4c0 100644
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index becfd62b1..73c43df0f 100755
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index 35857ec2b..9a7dd0681 100644
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index 6c7dadece..b686f948b 100755
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index ba9cdeb53..e58d03e79 100644
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diff --git a/middleware/v2/cv181x/ko/cv181x_vi.ko b/middleware/v2/cv181x/ko/cv181x_vi.ko
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index ba57607c9..416b50f26 100644
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index 86e91696b..092ebc338 100755
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diff --git a/middleware/v2/cv181x/lib_glibc_riscv64/libisp.a b/middleware/v2/cv181x/lib_glibc_riscv64/libisp.a
index 2b7a3b56f..372df2c92 100644
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index 1e12e173e..d210fb5ee 100644
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index 00fc1462a..0aab2836d 100755
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index 71bb0bdbf..d285ff990 100644
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diff --git a/middleware/v2/cv181x/lib_glibc_riscv64/libraw_replay.so b/middleware/v2/cv181x/lib_glibc_riscv64/libraw_replay.so
index 49e726307..660e95134 100755
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diff --git a/middleware/v2/cv181x/lib_glibc_riscv64/libvpu.a b/middleware/v2/cv181x/lib_glibc_riscv64/libvpu.a
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libcvi_ispd2.a b/middleware/v2/cv181x/lib_musl_riscv64/libcvi_ispd2.a
index 43bc4f2d1..2c9c8e124 100644
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libisp.a b/middleware/v2/cv181x/lib_musl_riscv64/libisp.a
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libisp.so b/middleware/v2/cv181x/lib_musl_riscv64/libisp.so
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index 031328c6b..3e5523339 100644
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libisp_algo.so b/middleware/v2/cv181x/lib_musl_riscv64/libisp_algo.so
index 2b0a6baa5..7639cfdf4 100755
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libraw_dump.a b/middleware/v2/cv181x/lib_musl_riscv64/libraw_dump.a
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index d6cd178fd..ec868b1cb 100644
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libraw_replay.so b/middleware/v2/cv181x/lib_musl_riscv64/libraw_replay.so
index fff0e271b..e0763897f 100755
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libvpu.a b/middleware/v2/cv181x/lib_musl_riscv64/libvpu.a
index c7f882b12..52173df55 100644
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diff --git a/middleware/v2/cv181x/lib_musl_riscv64/libvpu.so b/middleware/v2/cv181x/lib_musl_riscv64/libvpu.so
index 97883d565..64c9dfa7b 100755
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diff --git a/middleware/v2/include/cvi_sns_ctrl.h b/middleware/v2/include/cvi_sns_ctrl.h
index 791621395..4dee97800 100644
--- a/middleware/v2/include/cvi_sns_ctrl.h
+++ b/middleware/v2/include/cvi_sns_ctrl.h
@@ -138,6 +138,7 @@ extern ISP_SNS_OBJ_S stSnsOs04c10_Slave_Obj;
 extern ISP_SNS_OBJ_S stSnsOs08a20_Obj;
 extern ISP_SNS_OBJ_S stSnsOs08a20_Slave_Obj;
 extern ISP_SNS_OBJ_S stSnsOv4689_Obj;
+extern ISP_SNS_OBJ_S stSnsOv5647_Obj;
 extern ISP_SNS_OBJ_S stSnsOv6211_Obj;
 extern ISP_SNS_OBJ_S stSnsOv7251_Obj;
 extern ISP_SNS_OBJ_S stSnsPICO384_Obj;
@@ -187,6 +188,7 @@ extern ISP_SNS_OBJ_S stSnsImx335_Obj;
 extern ISP_SNS_OBJ_S stSnsImx347_Obj;
 extern ISP_SNS_OBJ_S stSnsImx385_Obj;
 extern ISP_SNS_OBJ_S stSnsTP2850_Obj;
+extern ISP_SNS_OBJ_S stSnsTP2825_Obj;
 extern ISP_SNS_OBJ_S stSnsMCS369_Obj;
 extern ISP_SNS_OBJ_S stSnsMCS369Q_Obj;
 extern ISP_SNS_OBJ_S stSnsMM308M2_Obj;
diff --git a/middleware/v2/include/isp/cv181x/cvi_comm_isp.h b/middleware/v2/include/isp/cv181x/cvi_comm_isp.h
index 60fc614c1..fdb026fa2 100644
--- a/middleware/v2/include/isp/cv181x/cvi_comm_isp.h
+++ b/middleware/v2/include/isp/cv181x/cvi_comm_isp.h
@@ -869,6 +869,14 @@ typedef struct _ISP_AWB_EXTRA_LIGHTSOURCE_INFO_S {
 	CVI_U8 u8Radius; /*RW; Range:[0x1, 0xFF]*/
 } ISP_AWB_EXTRA_LIGHTSOURCE_INFO_S;
 
+struct ST_ISP_AWB_INTERFERNCE_S {
+	CVI_U8 u8Mode;	/*RW; Range:[0x0, 0x1]*/
+	CVI_U8 u8Limit; /*RW; Range:[0x32, 0x64]*/
+	CVI_U8 u8Radius; /*RW; Range:[0x1, 0xFF]*/
+	CVI_U8 u8Ratio; /*RW; Range:[0x1, 0xFF]*/
+	CVI_U8 u8Distance; /*RW; Range:[0x1, 0xFF]*/
+};
+
 struct ST_ISP_AWB_SKIN_S {
 	CVI_U8 u8Mode;
 	CVI_U16 u16RgainDiff;
@@ -973,6 +981,7 @@ typedef struct _ISP_AWB_ATTR_EX_S {
 	CVI_BOOL bFineTunEn;
 	CVI_U8 u8FineTunStrength;
 	//AWB Algo 6
+	struct ST_ISP_AWB_INTERFERNCE_S stInterfernce;
 	struct ST_ISP_AWB_SKIN_S stSkin;
 	struct ST_ISP_AWB_SKY_S stSky;
 	struct ST_ISP_AWB_GRASS_S stGrass;
@@ -980,7 +989,7 @@ typedef struct _ISP_AWB_ATTR_EX_S {
 	struct ST_ISP_AWB_SHIFT_LV_S stShiftLv;
 	struct ST_ISP_AWB_REGION_S stRegion;
 	CVI_U8 adjBgainMode;
-	CVI_U8 reserve[244];
+	CVI_U8 reserve[239];
 } ISP_AWB_ATTR_EX_S;//keep size to 512 bytes
 
 typedef struct _ISP_MWB_ATTR_S {
diff --git a/middleware/v2/sample/common/Kbuild b/middleware/v2/sample/common/Kbuild
index 2b86a52db..fef71822e 100644
--- a/middleware/v2/sample/common/Kbuild
+++ b/middleware/v2/sample/common/Kbuild
@@ -93,6 +93,10 @@ ifeq ($(CONFIG_SENSOR_OV_OV4689), y)
     KBUILD_DEFINES += -DSENSOR_OV_OV4689
 endif
 
+ifeq ($(CONFIG_SENSOR_OV_OV5647), y)
+    KBUILD_DEFINES += -DSENSOR_OV_OV5647
+endif
+
 ifeq ($(CONFIG_SENSOR_OV_OV6211), y)
     KBUILD_DEFINES += -DSENSOR_OV_OV6211
 endif
@@ -293,6 +297,10 @@ ifeq ($(CONFIG_SENSOR_TECHPOINT_TP2850), y)
     KBUILD_DEFINES += -DSENSOR_TECHPOINT_TP2850
 endif
 
+ifeq ($(CONFIG_SENSOR_TECHPOINT_TP2825), y)
+    KBUILD_DEFINES += -DSENSOR_TECHPOINT_TP2825
+endif
+
 ifeq ($(CONFIG_SENSOR_VIVO_MCS369Q), y)
     KBUILD_DEFINES += -DSENSOR_VIVO_MCS369Q
 endif
diff --git a/middleware/v2/sample/common/sample_comm.h b/middleware/v2/sample/common/sample_comm.h
index ba83dc06d..d64c9cfb8 100644
--- a/middleware/v2/sample/common/sample_comm.h
+++ b/middleware/v2/sample/common/sample_comm.h
@@ -206,6 +206,7 @@ typedef enum _SAMPLE_SNS_TYPE_E {
 	OV_OS08A20_MIPI_8M_30FPS_10BIT,
 	OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT,
 	OV_OV4689_MIPI_4M_30FPS_10BIT,
+	OV_OV5647_MIPI_2M_30FPS_10BIT,
 	OV_OV6211_MIPI_400P_120FPS_10BIT,
 	OV_OV7251_MIPI_480P_120FPS_10BIT,
 	PICO384_THERMAL_384X288,
@@ -277,6 +278,7 @@ typedef enum _SAMPLE_SNS_TYPE_E {
 	SONY_IMX385_MIPI_2M_30FPS_12BIT,
 	TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT,
 	TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT,
+	TECHPOINT_TP2825_MIPI_2M_30FPS_8BIT,
 	VIVO_MCS369_2M_30FPS_12BIT,
 	VIVO_MCS369Q_4M_30FPS_12BIT,
 	VIVO_MM308M2_2M_25FPS_8BIT,
@@ -818,7 +820,6 @@ CVI_S32 SAMPLE_COMM_ISP_SetSnsObj(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType)
 CVI_S32 SAMPLE_COMM_ISP_SetSnsInit(CVI_U32 u32SnsId, CVI_U8 u8HwSync);
 CVI_S32 SAMPLE_COMM_ISP_PatchSnsObj(CVI_U32 u32SnsId, SAMPLE_SENSOR_INFO_S *pstSnsInfo);
 CVI_VOID *SAMPLE_COMM_ISP_GetSnsObj(CVI_U32 u32SnsId);
-CVI_VOID *SAMPLE_COMM_GetSnsObj(SAMPLE_SNS_TYPE_E enSnsType);
 
 CVI_S32 SAMPLE_AUDIO_DEBUG(void);
 CVI_S32 SAMPLE_AUDIO_DEBUG_LEVEL(ST_AudioUnitTestCfg *testCfg);
@@ -826,6 +827,7 @@ CVI_S32 SAMPLE_AUDIO_DEBUG_LEVEL(ST_AudioUnitTestCfg *testCfg);
 CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr);
 void SAMPLE_COMM_VI_GetSensorInfo(SAMPLE_VI_CONFIG_S *pstViConfig);
 CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize);
+CVI_S32 SAMPLE_COMM_VI_GetYuvBypassSts(SAMPLE_SNS_TYPE_E enSnsType);
 CVI_S32 SAMPLE_COMM_VI_GetChnAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_CHN_ATTR_S *pstChnAttr);
 CVI_S32 SAMPLE_COMM_VI_StartIsp(SAMPLE_VI_INFO_S *pstViInfo);
 CVI_S32 SAMPLE_COMM_VI_StopIsp(SAMPLE_VI_INFO_S *pstViInfo);
@@ -846,6 +848,16 @@ CVI_S32 SAMPLE_COMM_VI_DefaultConfig(void);
 CVI_S32 SAMPLE_COMM_VI_IniToViCfg(SAMPLE_INI_CFG_S *pstIniCfg, SAMPLE_VI_CONFIG_S *pstViConfig);
 CVI_CHAR *SAMPLE_COMM_VI_GetSnsrTypeName(void);
 
+CVI_VOID *SAMPLE_COMM_SNS_GetSnsObj(SAMPLE_SNS_TYPE_E enSnsType);
+CVI_S32 SAMPLE_COMM_SNS_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr);
+CVI_S32 SAMPLE_COMM_SNS_GetYuvBypassSts(SAMPLE_SNS_TYPE_E enSnsType);
+CVI_S32 SAMPLE_COMM_SNS_GetDevAttr(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr);
+CVI_S32 SAMPLE_COMM_SNS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize);
+CVI_S32 SAMPLE_COMM_SNS_GetSize(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize);
+CVI_CHAR *SAMPLE_COMM_SNS_GetSnsrTypeName(void);
+CVI_S32 SAMPLE_COMM_SNS_SetIniPath(const CVI_CHAR *iniPath);
+CVI_S32 SAMPLE_COMM_SNS_ParseIni(SAMPLE_INI_CFG_S *pstIniCfg);
+
 CVI_S32 SAMPLE_COMM_VPSS_Start(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable, VPSS_GRP_ATTR_S *pstVpssGrpAttr,
 			       VPSS_CHN_ATTR_S *pastVpssChnAttr);
 CVI_S32 SAMPLE_COMM_VPSS_Init(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable, VPSS_GRP_ATTR_S *pstVpssGrpAttr,
diff --git a/middleware/v2/sample/common/sample_common_isp.c b/middleware/v2/sample/common/sample_common_isp.c
index 4146d69e2..5168ffcc5 100644
--- a/middleware/v2/sample/common/sample_common_isp.c
+++ b/middleware/v2/sample/common/sample_common_isp.c
@@ -30,7 +30,7 @@ static CVI_BOOL g_ISPDaemon = CVI_FALSE;
 static void *g_ISPDHandle;
 #define ISPD_LIBNAME "libcvi_ispd.so"
 #define ISPD_CONNECT_PORT 5566
-#endif //
+#endif
 
 static pthread_t g_IspPid[VI_MAX_DEV_NUM];
 static CVI_U32 g_au32IspSnsId[ISP_MAX_DEV_NUM] = { 0, 1, 2};
@@ -42,7 +42,17 @@ SAMPLE_SNS_TYPE_E g_enSnsType[VI_MAX_DEV_NUM] = {
 
 static ISP_INIT_ATTR_S gstInitAttr[ISP_MAX_DEV_NUM];
 
-ISP_PUB_ATTR_S ISP_PUB_ATTR_SAMPLE = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0};
+CVI_S32 SAMPLE_COMM_ISP_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr)
+{
+	CVI_S32 s32Ret = CVI_SUCCESS;
+
+	s32Ret = SAMPLE_COMM_SNS_GetIspAttrBySns(enSnsType, pstPubAttr);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_SNS_GetIspAttrBySns failed with %#x\n", s32Ret);
+		return s32Ret;
+	}
+	return s32Ret;
+}
 
 void callback_FPS(int fps)
 {
@@ -147,147 +157,6 @@ out:
 	return s32Ret;
 }
 
-CVI_S32 SAMPLE_COMM_ISP_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr)
-{
-	CVI_S32 s32Ret = CVI_SUCCESS;
-	PIC_SIZE_E enPicSize;
-	SIZE_S stSize;
-
-	memcpy(pstPubAttr, &ISP_PUB_ATTR_SAMPLE, sizeof(ISP_PUB_ATTR_S));
-
-	SAMPLE_COMM_VI_GetSizeBySensor(enSnsType, &enPicSize);
-	SAMPLE_COMM_SYS_GetPicSize(enPicSize, &stSize);
-
-	pstPubAttr->stSnsSize.u32Width = stSize.u32Width;
-	pstPubAttr->stSnsSize.u32Height = stSize.u32Height;
-	pstPubAttr->stWndRect.u32Width = stSize.u32Width;
-	pstPubAttr->stWndRect.u32Height = stSize.u32Height;
-
-	// WDR mode
-	if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT)
-		pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE;
-
-	// FPS
-	switch (enSnsType) {
-	case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
-	case SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT:
-	case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
-	case OV_OV6211_MIPI_400P_120FPS_10BIT:
-	case OV_OV7251_MIPI_480P_120FPS_10BIT:
-		pstPubAttr->f32FrameRate = 120;
-		break;
-	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT:
-	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
-	case SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT:
-	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
-	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
-	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
-		pstPubAttr->f32FrameRate = 60;
-		break;
-	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
-	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
-	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT:
-	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT:
-	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
-		pstPubAttr->f32FrameRate = 30;
-		break;
-	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
-		pstPubAttr->f32FrameRate = 12;
-		break;
-#ifdef FPGA_PORTING
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
-		pstPubAttr->f32FrameRate = 10;
-		break;
-#endif
-	default:
-		pstPubAttr->f32FrameRate = 25;
-		break;
-	}
-
-	switch (enSnsType) {
-	case SOI_K06_MIPI_4M_25FPS_10BIT:
-		pstPubAttr->enBayer = BAYER_GBRG;
-		break;
-	// Sony
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
-#ifdef FPGA_PORTING
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
-#endif
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
-	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
-	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	// GalaxyCore
-	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
-	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
-		pstPubAttr->enBayer = BAYER_RGGB;
-		break;
-	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
-	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
-	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
-	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
-		pstPubAttr->enBayer = BAYER_GRBG;
-		break;
-#ifdef ARCH_CV182X
-	case SOI_F23_MIPI_2M_30FPS_10BIT:
-		pstPubAttr->enBayer = BAYER_BGRGI;
-	break;
-#endif
-	default:
-		pstPubAttr->enBayer = BAYER_BGGR;
-		break;
-	};
-
-	return s32Ret;
-}
-
 /******************************************************************************
  * funciton : stop ISP, and stop isp thread
  ******************************************************************************/
@@ -444,453 +313,12 @@ CVI_S32 SAMPLE_COMM_ISP_SetSnsInit(CVI_U32 u32SnsId, CVI_U8 u8HwSync)
 	return CVI_SUCCESS;
 }
 
-CVI_VOID *SAMPLE_COMM_GetSnsObj(SAMPLE_SNS_TYPE_E enSnsType)
-{
-	CVI_VOID *pSnsObj;
-
-	switch (enSnsType) {
-#if defined(SENSOR_BRIGATES_BG0808)
-	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT:
-	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsBG0808_Obj;
-		break;
-#endif
-#if defined(SENSOR_GCORE_GC02M1)
-	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
-		return &stSnsGc02m1_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC1054)
-	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
-		return &stSnsGc1054_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC2053)
-	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
-		return &stSnsGc2053_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC2053_SLAVE)
-	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
-		return &stSnsGc2053_Slave_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC2053_1L)
-	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
-		pSnsObj = &stSnsGc2053_1l_Obj;
-		break;
-#endif
-#if defined(SENSOR_GCORE_GC2093)
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
-		return &stSnsGc2093_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC2093_SLAVE)
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
-		return &stSnsGc2093_Slave_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC2145)
-	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
-		return &stSnsGc2145_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC4023)
-	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
-		return &stSnsGc4023_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC4653)
-	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
-		return &stSnsGc4653_Obj;
-#endif
-#if defined(SENSOR_GCORE_GC4653_SLAVE)
-	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
-		return &stSnsGc4653_Slave_Obj;
-#endif
-#if defined(SENSOR_NEXTCHIP_N5)
-	case NEXTCHIP_N5_2M_25FPS_8BIT:
-	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
-		pSnsObj = &stSnsN5_Obj;
-		break;
-#endif
-#if defined(SENSOR_NEXTCHIP_N6)
-	case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
-		pSnsObj = &stSnsN6_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS02D10)
-	case OV_OS02D10_MIPI_2M_30FPS_10BIT:
-		pSnsObj = &stSnsOs02d10_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS02D10_SLAVE)
-	case OV_OS02D10_SLAVE_MIPI_2M_30FPS_10BIT:
-		pSnsObj = &stSnsOs02d10_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS02K10_SLAVE)
-	case OV_OS02K10_SLAVE_MIPI_2M_30FPS_12BIT:
-		pSnsObj = &stSnsOs02k10_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS04A10)
-	case OV_OS04A10_MIPI_4M_1440P_30FPS_12BIT:
-	case OV_OS04A10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsOs04a10_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS04C10)
-	case OV_OS04C10_MIPI_4M_30FPS_12BIT:
-	case OV_OS04C10_MIPI_4M_1440P_30FPS_12BIT:
-	case OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case OV_OS04C10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsOs04c10_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS04C10_SLAVE)
-	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT:
-	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsOs04c10_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS08A20)
-	case OV_OS08A20_MIPI_4M_30FPS_10BIT:
-	case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_MIPI_5M_30FPS_10BIT:
-	case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_MIPI_8M_30FPS_10BIT:
-	case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsOs08a20_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OS08A20_SLAVE)
-	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
-	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
-	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
-	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsOs08a20_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OV4689)
-	case OV_OV4689_MIPI_4M_30FPS_10BIT:
-		pSnsObj = &stSnsOv4689_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OV6211)
-	case OV_OV6211_MIPI_400P_120FPS_10BIT:
-		pSnsObj = &stSnsOv6211_Obj;
-		break;
-#endif
-#if defined(SENSOR_OV_OV7251)
-	case OV_OV7251_MIPI_480P_120FPS_10BIT:
-		pSnsObj = &stSnsOv7251_Obj;
-		break;
-#endif
-#if defined(SENSOR_PICO_384)
-	case PICO384_THERMAL_384X288:
-		pSnsObj = &stSnsPICO384_Obj;
-		break;
-#endif
-#if defined(SENSOR_PICO_640)
-	case PICO640_THERMAL_479P:
-		pSnsObj = &stSnsPICO640_Obj;
-		break;
-#endif
-#if defined(SENSOR_PIXELPLUS_PR2020)
-	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
-	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
-		pSnsObj = &stSnsPR2020_Obj;
-		break;
-#endif
-#if defined(SENSOR_PIXELPLUS_PR2100)
-	case PIXELPLUS_PR2100_2M_25FPS_8BIT:
-	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
-	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
-		pSnsObj = &stSnsPR2100_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC035GS)
-	case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
-		pSnsObj = &stSnsSC035GS_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC035GS_1L)
-	case SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT:
-		pSnsObj = &stSnsSC035GS_1L_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC035HGS)
-	case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
-		pSnsObj = &stSnsSC035HGS_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC1346_1L)
-	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT:
-	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT:
-	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsSC1346_1L_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC1346_1L_SLAVE)
-	case SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT:
-	case SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT:
-		pSnsObj = &stSnsSC1346_1L_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC200AI)
-	case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
-	case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsSC200AI_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC301IOT)
-	case SMS_SC301IOT_MIPI_3M_30FPS_10BIT:
-		pSnsObj = &stSnsSC301IOT_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC401AI)
-	case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
-	case SMS_SC401AI_MIPI_3M_30FPS_10BIT:
-		pSnsObj = &stSnsSC401AI_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC500AI)
-	case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
-	case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
-	case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsSC500AI_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC501AI_2L)
-	case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
-		pSnsObj = &stSnsSC501AI_2L_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC531AI_2L)
-	case SMS_SC531AI_2L_MIPI_5M_30FPS_10BIT:
-		pSnsObj = &stSnsSC531AI_2L_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC850SL)
-	case SMS_SC850SL_MIPI_8M_30FPS_12BIT:
-	case SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsSC850SL_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC3332)
-	case SMS_SC3332_MIPI_3M_30FPS_10BIT:
-		pSnsObj = &stSnsSC3332_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC3335)
-	case SMS_SC3335_MIPI_3M_30FPS_10BIT:
-		pSnsObj = &stSnsSC3335_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC3335_SLAVE)
-	case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
-		pSnsObj = &stSnsSC3335_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC3336)
-	case SMS_SC3336_MIPI_3M_30FPS_10BIT:
-		pSnsObj = &stSnsSC3336_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC2335)
-	case SMS_SC2335_MIPI_2M_30FPS_10BIT:
-		pSnsObj = &stSnsSC2335_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC2336)
-	case SMS_SC2336_MIPI_2M_30FPS_10BIT:
-		pSnsObj = &stSnsSC2336_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC4210)
-	case SMS_SC4210_MIPI_4M_30FPS_12BIT:
-	case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsSC4210_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC4336)
-	case SMS_SC4336_MIPI_4M_30FPS_10BIT:
-		pSnsObj = &stSnsSC4336_Obj;
-		break;
-#endif
-#if defined(SENSOR_SMS_SC8238)
-	case SMS_SC8238_MIPI_8M_30FPS_10BIT:
-	case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsSC8238_Obj;
-		break;
-#endif
-#if defined(SENSOR_SOI_F23)
-	case SOI_F23_MIPI_2M_30FPS_10BIT:
-		pSnsObj = &stSnsF23_Obj;
-		break;
-#endif
-#if defined(SENSOR_SOI_F35)
-	case SOI_F35_MIPI_2M_30FPS_10BIT:
-	case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsF35_Obj;
-		break;
-#endif
-#if defined(SENSOR_SOI_F35_SLAVE)
-	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT:
-	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsF35_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_SOI_F37P)
-	case SOI_F37P_MIPI_2M_30FPS_10BIT:
-		pSnsObj = &stSnsF37P_Obj;
-		break;
-#endif
-#if defined(SENSOR_SOI_H65)
-	case SOI_H65_MIPI_1M_30FPS_10BIT:
-		pSnsObj = &stSnsH65_Obj;
-		break;
-#endif
-#if defined(SENSOR_SOI_K06)
-	case SOI_K06_MIPI_4M_25FPS_10BIT:
-		return &stSnsK06_Obj;
-#endif
-#if defined(SENSOR_SOI_Q03)
-	case SOI_Q03_MIPI_3M_30FPS_10BIT:
-		pSnsObj = &stSnsQ03_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX290_2L)
-	case SONY_IMX290_MIPI_1M_30FPS_12BIT:
-	case SONY_IMX290_MIPI_2M_60FPS_12BIT:
-		pSnsObj = &stSnsImx290_2l_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX307)
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx307_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX307_SLAVE)
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx307_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX307_2L)
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx307_2l_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX307_SUBLVDS)
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx307_Sublvds_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX327)
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx327_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX327_SLAVE)
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx327_Slave_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX327_2L)
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx327_2l_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX327_FPGA) && defined(FPGA_PORTING)
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
-		pSnsObj = &stSnsImx327_fpga_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX327_SUBLVDS)
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx327_Sublvds_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX334)
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx334_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX335)
-	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
-		pSnsObj = &stSnsImx335_Obj;
-		break;
-#endif
-#if defined(SENSOR_SONY_IMX347)
-	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
-	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
-		return &stSnsImx347_Obj;
-#endif
-#if defined(SENSOR_SONY_IMX385)
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
-		pSnsObj = &stSnsImx385_Obj;
-		break;
-#endif
-#if defined(SENSOR_TECHPOINT_TP2850)
-	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
-	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
-		pSnsObj = &stSnsTP2850_Obj;
-		break;
-#endif
-#if defined(SENSOR_VIVO_MCS369)
-	case VIVO_MCS369_2M_30FPS_12BIT:
-		pSnsObj = &stSnsMCS369_Obj;
-		break;
-#endif
-#if defined(SENSOR_VIVO_MCS369Q)
-	case VIVO_MCS369Q_4M_30FPS_12BIT:
-		pSnsObj = &stSnsMCS369Q_Obj;
-		break;
-#endif
-#if defined(SENSOR_VIVO_MM308M2)
-	case VIVO_MM308M2_2M_25FPS_8BIT:
-		pSnsObj = &stSnsMM308M2_Obj;
-		break;
-#endif
-	default:
-		pSnsObj = CVI_NULL;
-		break;
-	}
-
-	return pSnsObj;
-}
-
 CVI_VOID *SAMPLE_COMM_ISP_GetSnsObj(CVI_U32 u32SnsId)
 {
 	SAMPLE_SNS_TYPE_E enSnsType;
 
 	enSnsType = g_enSnsType[u32SnsId];
-	return SAMPLE_COMM_GetSnsObj(enSnsType);
+	return SAMPLE_COMM_SNS_GetSnsObj(enSnsType);
 }
 
 CVI_S32 SAMPLE_COMM_ISP_PatchSnsObj(CVI_U32 u32SnsId, SAMPLE_SENSOR_INFO_S *pstSnsInfo)
diff --git a/middleware/v2/sample/common/sample_common_platform.c b/middleware/v2/sample/common/sample_common_platform.c
index e8850ff88..58d8b996c 100644
--- a/middleware/v2/sample/common/sample_common_platform.c
+++ b/middleware/v2/sample/common/sample_common_platform.c
@@ -161,29 +161,12 @@ CVI_S32 SAMPLE_PLAT_VI_INIT(SAMPLE_VI_CONFIG_S *pstViConfig)
 
 	for (i = 0; i < pstViConfig->s32WorkingViNum; i++) {
 		SAMPLE_VI_INFO_S *pstViInfo = NULL;
+		SAMPLE_SNS_TYPE_E sns_type;
 
 		s32DevNum  = pstViConfig->as32WorkingViId[i];
 		pstViInfo = &pstViConfig->astViInfo[s32DevNum];
-
-		if ((pstViInfo->stSnsInfo.enSnsType == GCORE_GC2145_MIPI_2M_12FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PICO640_THERMAL_479P) ||
-			(pstViInfo->stSnsInfo.enSnsType == TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == VIVO_MCS369Q_4M_30FPS_12BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == VIVO_MCS369_2M_30FPS_12BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == VIVO_MM308M2_2M_25FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == NEXTCHIP_N5_2M_25FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_1M_25FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_1M_30FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_2M_25FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_2M_30FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2100_2M_25FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT) ||
-			(pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT)) {
-			stPipeAttr.bYuvBypassPath = CVI_TRUE;
-		} else {
-			stPipeAttr.bYuvBypassPath = CVI_FALSE;
-		}
+		sns_type = pstViInfo->stSnsInfo.enSnsType;
+		stPipeAttr.bYuvBypassPath = SAMPLE_COMM_VI_GetYuvBypassSts(sns_type);
 
 		for (j = 0; j < WDR_MAX_PIPE_NUM; j++) {
 			if (pstViInfo->stPipeInfo.aPipe[j] >= 0 && pstViInfo->stPipeInfo.aPipe[j] < VI_MAX_PIPE_NUM) {
diff --git a/middleware/v2/sample/common/sample_common_sensor.c b/middleware/v2/sample/common/sample_common_sensor.c
new file mode 100644
index 000000000..d599c8b46
--- /dev/null
+++ b/middleware/v2/sample/common/sample_common_sensor.c
@@ -0,0 +1,1848 @@
+/*
+ * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved.
+ *
+ * File Name: sample/common/sample_common_sensor.c
+ * Description:
+ *   Common sample code for sensor configure.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include "cvi_mipi.h"
+#include "cvi_sns_ctrl.h"
+#include <linux/cvi_defines.h>
+#include <linux/cvi_common.h>
+#include "cvi_comm_isp.h"
+#include "sample_comm.h"
+#include "ini.h"
+
+#define INI_FILE_PATH	"/mnt/data/sensor_cfg.ini"
+#define INI_DEF_PATH	"/mnt/system/usr/bin/sensor_cfg.ini"
+#define SNSCFGPATH_SIZE 100
+
+static CVI_CHAR g_snsCfgPath[SNSCFGPATH_SIZE];
+
+ISP_PUB_ATTR_S ISP_PUB_ATTR_SAMPLE = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0};
+
+static SAMPLE_INI_CFG_S	stDefIniCfg = {
+	.enSource  = VI_PIPE_FRAME_SOURCE_DEV,
+	.devNum    = 1,
+	.enSnsType[0] = SONY_IMX327_MIPI_2M_30FPS_12BIT,
+	.enWDRMode[0] = WDR_MODE_NONE,
+	.s32BusId[0]  = 3,
+	.s32SnsI2cAddr[0] = -1,
+	.s32SnsI2cAddr[1] = -1,
+	.MipiDev[0]   = 0xFF,
+	.MipiDev[1]   = 0xFF,
+	.MipiDev[2]   = 0xFF,
+	.u8UseMultiSns = 0,
+};
+
+// default is MIPI-CSI Bayer format sensor
+VI_DEV_ATTR_S DEV_ATTR_SENSOR_BASE = {
+	VI_MODE_MIPI,
+	VI_WORK_MODE_1Multiplex,
+	VI_SCAN_PROGRESSIVE,
+	{-1, -1, -1, -1},
+	VI_DATA_SEQ_YUYV,
+
+	{
+	/*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
+	VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH,
+	VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH,
+
+	/*hsync_hfb    hsync_act    hsync_hhb*/
+	{0,            1920,        0,
+	/*vsync0_vhb vsync0_act vsync0_hhb*/
+	 0,            1080,        0,
+	/*vsync1_vhb vsync1_act vsync1_hhb*/
+	 0,            0,            0}
+	},
+	VI_DATA_TYPE_RGB,
+	{1920, 1080},
+	{
+		WDR_MODE_NONE,
+		1080,
+		0
+	},
+	.enBayerFormat = BAYER_FORMAT_BG,
+};
+
+/******************************************************************************
+ * If add new sensor , Modify the method as follows if need
+ *1-----*snsr_type_name
+ *2-----SAMPLE_COMM_SNS_GetSize
+ *3-----SAMPLE_COMM_SNS_GetDevAttr
+ *4-----SAMPLE_COMM_SNS_GetYuvBypassSts
+ *5-----SAMPLE_COMM_SNS_GetIspAttrBySns
+ *6-----SAMPLE_COMM_SNS_GetSnsObj
+ ******************************************************************************/
+/******************************************************************************
+ * Structure : Configure sensor mode
+ ******************************************************************************/
+static const char *snsr_type_name[SAMPLE_SNS_TYPE_BUTT] = {
+	/* ------ LINEAR BEGIN ------*/
+	"BRIGATES_BG0808_MIPI_2M_30FPS_10BIT",
+	"GCORE_GC02M1_MIPI_2M_30FPS_10BIT",
+	"GCORE_GC1054_MIPI_1M_30FPS_10BIT",
+	"GCORE_GC2053_MIPI_2M_30FPS_10BIT",
+	"GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT",
+	"GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT",
+	"GCORE_GC2093_MIPI_2M_30FPS_10BIT",
+	"GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT",
+	"GCORE_GC2145_MIPI_2M_12FPS_8BIT",
+	"GCORE_GC4023_MIPI_4M_30FPS_10BIT",
+	"GCORE_GC4653_MIPI_4M_30FPS_10BIT",
+	"GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT",
+	"NEXTCHIP_N5_1M_2CH_25FPS_8BIT",
+	"NEXTCHIP_N5_2M_25FPS_8BIT",
+	"NEXTCHIP_N6_2M_4CH_25FPS_8BIT",
+	"OV_OS02D10_MIPI_2M_30FPS_10BIT",
+	"OV_OS02D10_SLAVE_MIPI_2M_30FPS_10BIT",
+	"OV_OS02K10_SLAVE_MIPI_2M_30FPS_12BIT",
+	"OV_OS04A10_MIPI_4M_1440P_30FPS_12BIT",
+	"OV_OS04C10_MIPI_4M_30FPS_12BIT",
+	"OV_OS04C10_MIPI_4M_1440P_30FPS_12BIT",
+	"OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT",
+	"OV_OS08A20_MIPI_4M_30FPS_10BIT",
+	"OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT",
+	"OV_OS08A20_MIPI_5M_30FPS_10BIT",
+	"OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT",
+	"OV_OS08A20_MIPI_8M_30FPS_10BIT",
+	"OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT",
+	"OV_OV4689_MIPI_4M_30FPS_10BIT",
+	"OV_OV5647_MIPI_2M_30FPS_10BIT",
+	"OV_OV6211_MIPI_400P_120FPS_10BIT",
+	"OV_OV7251_MIPI_480P_120FPS_10BIT",
+	"PICO384_THERMAL_384X288",
+	"PICO640_THERMAL_479P",
+	"PIXELPLUS_PR2020_1M_25FPS_8BIT",
+	"PIXELPLUS_PR2020_1M_30FPS_8BIT",
+	"PIXELPLUS_PR2020_2M_25FPS_8BIT",
+	"PIXELPLUS_PR2020_2M_30FPS_8BIT",
+	"PIXELPLUS_PR2100_2M_25FPS_8BIT",
+	"PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT",
+	"PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT",
+	"SMS_SC035GS_MIPI_480P_120FPS_12BIT",
+	"SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT",
+	"SMS_SC035HGS_MIPI_480P_120FPS_12BIT",
+	"SMS_SC1346_1L_MIPI_1M_30FPS_10BIT",
+	"SMS_SC1346_1L_MIPI_1M_60FPS_10BIT",
+	"SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT",
+	"SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT",
+	"SMS_SC200AI_MIPI_2M_30FPS_10BIT",
+	"SMS_SC301IOT_MIPI_3M_30FPS_10BIT",
+	"SMS_SC401AI_MIPI_3M_30FPS_10BIT",
+	"SMS_SC401AI_MIPI_4M_30FPS_10BIT",
+	"SMS_SC500AI_MIPI_4M_30FPS_10BIT",
+	"SMS_SC500AI_MIPI_5M_30FPS_10BIT",
+	"SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT",
+	"SMS_SC531AI_2L_MIPI_5M_30FPS_10BIT",
+	"SMS_SC850SL_MIPI_8M_30FPS_12BIT",
+	"SMS_SC3332_MIPI_3M_30FPS_10BIT",
+	"SMS_SC3335_MIPI_3M_30FPS_10BIT",
+	"SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT",
+	"SMS_SC3336_MIPI_3M_30FPS_10BIT",
+	"SMS_SC2335_MIPI_2M_30FPS_10BIT",
+	"SMS_SC2336_MIPI_2M_30FPS_10BIT",
+	"SMS_SC4210_MIPI_4M_30FPS_12BIT",
+	"SMS_SC4336_MIPI_4M_30FPS_10BIT",
+	"SMS_SC8238_MIPI_8M_30FPS_10BIT",
+	"SOI_F23_MIPI_2M_30FPS_10BIT",
+	"SOI_F35_MIPI_2M_30FPS_10BIT",
+	"SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT",
+	"SOI_F37P_MIPI_2M_30FPS_10BIT",
+	"SOI_H65_MIPI_1M_30FPS_10BIT",
+	"SOI_K06_MIPI_4M_25FPS_10BIT",
+	"SOI_Q03_MIPI_3M_30FPS_10BIT",
+	"SONY_IMX290_MIPI_1M_30FPS_12BIT",
+	"SONY_IMX290_MIPI_2M_60FPS_12BIT",
+	"SONY_IMX307_MIPI_2M_30FPS_12BIT",
+	"SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT",
+	"SONY_IMX307_2L_MIPI_2M_30FPS_12BIT",
+	"SONY_IMX307_SUBLVDS_2M_30FPS_12BIT",
+	"SONY_IMX307_MIPI_2M_60FPS_12BIT",
+	"SONY_IMX307_SUBLVDS_2M_60FPS_12BIT",
+#ifdef FPGA_PORTING
+	"SONY_IMX327_MIPI_1M_30FPS_10BIT",
+#endif
+	"SONY_IMX327_MIPI_2M_30FPS_12BIT",
+	"SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT",
+	"SONY_IMX327_2L_MIPI_2M_30FPS_12BIT",
+	"SONY_IMX327_SUBLVDS_2M_30FPS_12BIT",
+	"SONY_IMX327_MIPI_2M_60FPS_12BIT",
+	"SONY_IMX334_MIPI_8M_30FPS_12BIT",
+	"SONY_IMX335_MIPI_4M_30FPS_12BIT",
+	"SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT",
+	"SONY_IMX335_2L_MIPI_4M_30FPS_10BIT",
+	"SONY_IMX335_MIPI_5M_30FPS_12BIT",
+	"SONY_IMX335_MIPI_2M_60FPS_10BIT",
+	"SONY_IMX335_MIPI_4M_60FPS_10BIT",
+	"SONY_IMX335_MIPI_5M_60FPS_10BIT",
+	"SONY_IMX347_MIPI_4M_60FPS_12BIT",
+	"SONY_IMX385_MIPI_2M_30FPS_12BIT",
+	"TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT",
+	"TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT",
+	"TECHPOINT_TP2825_MIPI_2M_30FPS_8BIT",
+	"VIVO_MCS369_2M_30FPS_12BIT",
+	"VIVO_MCS369Q_4M_30FPS_12BIT",
+	"VIVO_MM308M2_2M_25FPS_8BIT",
+	/* ------ LINEAR END ------*/
+
+	/* ------ WDR 2TO1 BEGIN ------*/
+	"BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1",
+	"GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1",
+	"GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1",
+	"OV_OS04A10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1",
+	"OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1",
+	"OV_OS04C10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1",
+	"OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1",
+	"OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1",
+	"OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1",
+	"OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1",
+	"OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1",
+	"OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1",
+	"OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1",
+	"SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1",
+	"SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1",
+	"SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1",
+	"SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1",
+	"SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1",
+	"SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1",
+	"SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1",
+	"SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1",
+	"SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1",
+	"SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1",
+	"SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1",
+#ifdef FPGA_PORTING
+	"SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1",
+#endif
+	"SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1",
+	"SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1",
+	"SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1",
+	"SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1",
+	"SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1",
+	"SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1",
+	/* ------ WDR 2TO1 END ------*/
+};
+
+CVI_CHAR *SAMPLE_COMM_SNS_GetSnsrTypeName(void)
+{
+	return (CVI_CHAR *)snsr_type_name;
+}
+/******************************************************************************
+ * funciton : Get enSize by diffrent sensor
+ * PIC_CIF:    352 * 288
+ * PIC_D1_PAL:    720 * 576
+ * PIC_D1_NTSC:    720 * 480
+ * PIC_720P:    1280 * 720
+ * PIC_1600x1200:
+ * PIC_1080P:   1920 * 1080
+ * PIC_1088:   1920 * 1088
+ * PIC_1440P:   2560 * 1440
+ * PIC_2304x1296:
+ * PIC_2048x1536:
+ * PIC_2592x1520:
+ * PIC_2560x1600:
+ * PIC_2592x1944:
+ * PIC_2592x1536:
+ * PIC_2688x1520:
+ * PIC_2716x1524:
+ * PIC_2880x1620:
+ * PIC_3844x1124:
+ * PIC_3840x2160:
+ * PIC_3000x3000:
+ * PIC_4000x3000:
+ * PIC_4096x2160:
+ * PIC_3840x8640:
+ * PIC_7688x1124:
+ * PIC_640x480:
+ * PIC_479P:   632 * 479
+ * PIC_400x400:
+ * PIC_288P:   384 * 288
+ ******************************************************************************/
+CVI_S32 SAMPLE_COMM_SNS_GetSize(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize)
+{
+	CVI_S32 s32Ret = CVI_SUCCESS;
+
+	if (!penSize)
+		return CVI_FAILURE;
+
+	switch (enMode) {
+	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
+	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
+	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT:
+	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT:
+	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
+	case SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT:
+	case SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT:
+	case SOI_H65_MIPI_1M_30FPS_10BIT:
+	case SONY_IMX290_MIPI_1M_30FPS_12BIT:
+#ifdef FPGA_PORTING
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
+#endif
+		*penSize = PIC_720P;
+		break;
+	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
+		*penSize = PIC_1600x1200;
+		break;
+	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT:
+	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case NEXTCHIP_N5_2M_25FPS_8BIT:
+	case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
+	case OV_OS02D10_MIPI_2M_30FPS_10BIT:
+	case OV_OS02D10_SLAVE_MIPI_2M_30FPS_10BIT:
+	case OV_OS02K10_SLAVE_MIPI_2M_30FPS_12BIT:
+	case OV_OV5647_MIPI_2M_30FPS_10BIT:
+	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_25FPS_8BIT:
+	case SMS_SC2335_MIPI_2M_30FPS_10BIT:
+	case SMS_SC2336_MIPI_2M_30FPS_10BIT:
+	case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
+	case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SOI_F23_MIPI_2M_30FPS_10BIT:
+	case SOI_F35_MIPI_2M_30FPS_10BIT:
+	case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT:
+	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SOI_F37P_MIPI_2M_30FPS_10BIT:
+	case SONY_IMX290_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
+	case TECHPOINT_TP2825_MIPI_2M_30FPS_8BIT:
+	case VIVO_MCS369_2M_30FPS_12BIT:
+	case VIVO_MM308M2_2M_25FPS_8BIT:
+		*penSize = PIC_1080P;
+		break;
+	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
+	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
+	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
+	case OV_OS04A10_MIPI_4M_1440P_30FPS_12BIT:
+	case OV_OS04A10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
+	case OV_OS04C10_MIPI_4M_1440P_30FPS_12BIT:
+	case OV_OS04C10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_MIPI_4M_30FPS_10BIT:
+	case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
+	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
+	case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
+	case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC4210_MIPI_4M_30FPS_12BIT:
+	case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC4336_MIPI_4M_30FPS_10BIT:
+	case SOI_K06_MIPI_4M_25FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
+	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
+	case VIVO_MCS369Q_4M_30FPS_12BIT:
+		*penSize = PIC_1440P;
+		break;
+	case SMS_SC401AI_MIPI_3M_30FPS_10BIT:
+	case SMS_SC3332_MIPI_3M_30FPS_10BIT:
+	case SMS_SC3335_MIPI_3M_30FPS_10BIT:
+	case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
+	case SMS_SC3336_MIPI_3M_30FPS_10BIT:
+	case SOI_Q03_MIPI_3M_30FPS_10BIT:
+		*penSize = PIC_2304x1296;
+		break;
+	case SMS_SC301IOT_MIPI_3M_30FPS_10BIT:
+		*penSize = PIC_2048x1536;
+		break;
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
+		*penSize = PIC_2560x1600;
+		break;
+	case OV_OS08A20_MIPI_5M_30FPS_10BIT:
+	case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
+	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
+		*penSize = PIC_2592x1944;
+		break;
+	case OV_OS04C10_MIPI_4M_30FPS_12BIT:
+	case OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT:
+	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case OV_OV4689_MIPI_4M_30FPS_10BIT:
+	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
+		*penSize = PIC_2688x1520;
+		break;
+	case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
+	case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
+	case SMS_SC531AI_2L_MIPI_5M_30FPS_10BIT:
+		*penSize = PIC_2880x1620;
+		break;
+	case OV_OS08A20_MIPI_8M_30FPS_10BIT:
+	case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
+	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC850SL_MIPI_8M_30FPS_12BIT:
+	case SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC8238_MIPI_8M_30FPS_10BIT:
+	case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1:
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
+		*penSize = PIC_3840x2160;
+		break;
+	case OV_OV7251_MIPI_480P_120FPS_10BIT:
+	case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
+	case SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT:
+	case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
+		*penSize = PIC_640x480;
+		break;
+	case PICO640_THERMAL_479P:
+		*penSize = PIC_479P;
+		break;
+	case OV_OV6211_MIPI_400P_120FPS_10BIT:
+		*penSize = PIC_400x400;
+		break;
+	case PICO384_THERMAL_384X288:
+		*penSize = PIC_288P;
+		break;
+#ifdef ARCH_CV183X
+	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
+		*penSize = PIC_3844x1124;
+		break;
+	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
+		*penSize = PIC_7688x1124;
+		break;
+#else
+	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
+		*penSize = PIC_1080P;
+		break;
+#endif
+	default:
+		s32Ret = CVI_FAILURE;
+		break;
+	}
+	return s32Ret;
+}
+/*
+ * Brief: get picture size(w*h), according enPicSize
+ */
+CVI_S32 SAMPLE_COMM_SNS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize)
+{
+	switch (enPicSize) {
+	case PIC_CIF:   /* 352 * 288 */
+		pstSize->u32Width  = 352;
+		pstSize->u32Height = 288;
+		break;
+
+	case PIC_D1_PAL:   /* 720 * 576 */
+		pstSize->u32Width  = 720;
+		pstSize->u32Height = 576;
+		break;
+
+	case PIC_D1_NTSC:   /* 720 * 480 */
+		pstSize->u32Width  = 720;
+		pstSize->u32Height = 480;
+		break;
+
+	case PIC_720P:   /* 1280 * 720 */
+		pstSize->u32Width  = 1280;
+		pstSize->u32Height = 720;
+		break;
+
+	case PIC_1600x1200:
+		pstSize->u32Width  = 1600;
+		pstSize->u32Height = 1200;
+		break;
+
+	case PIC_1080P:  /* 1920 * 1080 */
+		pstSize->u32Width  = 1920;
+		pstSize->u32Height = 1080;
+		break;
+
+	case PIC_1088:  /* 1920 * 1088*/
+		pstSize->u32Width  = 1920;
+		pstSize->u32Height = 1088;
+		break;
+
+	case PIC_1440P:  /* 2560 * 1440 */
+		pstSize->u32Width  = 2560;
+		pstSize->u32Height = 1440;
+		break;
+
+	case PIC_2304x1296:
+		pstSize->u32Width  = 2304;
+		pstSize->u32Height = 1296;
+		break;
+
+	case PIC_2048x1536:
+		pstSize->u32Width  = 2048;
+		pstSize->u32Height = 1536;
+		break;
+
+	case PIC_2592x1520:
+		pstSize->u32Width  = 2592;
+		pstSize->u32Height = 1520;
+		break;
+
+	case PIC_2560x1600:
+		pstSize->u32Width  = 2560;
+		pstSize->u32Height = 1600;
+		break;
+
+	case PIC_2592x1944:
+		pstSize->u32Width  = 2592;
+		pstSize->u32Height = 1944;
+		break;
+
+	case PIC_2592x1536:
+		pstSize->u32Width  = 2592;
+		pstSize->u32Height = 1536;
+		break;
+
+	case PIC_2688x1520:
+		pstSize->u32Width  = 2688;
+		pstSize->u32Height = 1520;
+		break;
+
+	case PIC_2716x1524:
+		pstSize->u32Width  = 2716;
+		pstSize->u32Height = 1524;
+		break;
+
+	case PIC_2880x1620:
+		pstSize->u32Width  = 2880;
+		pstSize->u32Height = 1620;
+		break;
+
+	case PIC_3844x1124:
+		pstSize->u32Width  = 3844;
+		pstSize->u32Height = 1124;
+		break;
+
+	case PIC_3840x2160:
+		pstSize->u32Width  = 3840;
+		pstSize->u32Height = 2160;
+		break;
+
+	case PIC_3000x3000:
+		pstSize->u32Width  = 3000;
+		pstSize->u32Height = 3000;
+		break;
+
+	case PIC_4000x3000:
+		pstSize->u32Width  = 4000;
+		pstSize->u32Height = 3000;
+		break;
+
+	case PIC_4096x2160:
+		pstSize->u32Width  = 4096;
+		pstSize->u32Height = 2160;
+		break;
+
+	case PIC_3840x8640:
+		pstSize->u32Width = 3840;
+		pstSize->u32Height = 8640;
+		break;
+
+	case PIC_7688x1124:
+		pstSize->u32Width = 7688;
+		pstSize->u32Height = 1124;
+		break;
+
+	case PIC_640x480:
+		pstSize->u32Width = 640;
+		pstSize->u32Height = 480;
+		break;
+	case PIC_479P:  /* 632 * 479 */
+		pstSize->u32Width  = 632;
+		pstSize->u32Height = 479;
+		break;
+	case PIC_400x400:
+		pstSize->u32Width  = 400;
+		pstSize->u32Height = 400;
+		break;
+	case PIC_288P:  /* 384 * 288 */
+		pstSize->u32Width  = 384;
+		pstSize->u32Height = 288;
+		break;
+	default:
+		return CVI_FAILURE;
+	}
+
+	return CVI_SUCCESS;
+}
+
+/******************************************************************************
+ * funciton : Get VI attr info by diffrent sensor
+ ******************************************************************************/
+CVI_S32 SAMPLE_COMM_SNS_GetDevAttr(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr)
+{
+	PIC_SIZE_E enPicSize;
+	SIZE_S stSize;
+
+	memcpy(pstViDevAttr, &DEV_ATTR_SENSOR_BASE, sizeof(VI_DEV_ATTR_S));
+
+	SAMPLE_COMM_SNS_GetSize(enSnsType, &enPicSize);
+	SAMPLE_COMM_SNS_GetPicSize(enPicSize, &stSize);
+
+	pstViDevAttr->stSize.u32Width = stSize.u32Width;
+	pstViDevAttr->stSize.u32Height = stSize.u32Height;
+	pstViDevAttr->stWDRAttr.u32CacheLine = stSize.u32Height;
+
+	// WDR mode
+	if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT)
+		pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
+
+	// set synthetic wdr mode
+	switch (enSnsType) {
+	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
+		pstViDevAttr->stWDRAttr.bSyntheticWDR = 1;
+		break;
+	default:
+		pstViDevAttr->stWDRAttr.bSyntheticWDR = 0;
+		break;
+	}
+
+	// YUV Sensor
+	switch (enSnsType) {
+	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
+	case NEXTCHIP_N5_2M_25FPS_8BIT:
+	case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
+	case PICO384_THERMAL_384X288:
+	case PICO640_THERMAL_479P:
+	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
+	case VIVO_MCS369_2M_30FPS_12BIT:
+	case VIVO_MCS369Q_4M_30FPS_12BIT:
+	case VIVO_MM308M2_2M_25FPS_8BIT:
+		pstViDevAttr->enDataSeq = VI_DATA_SEQ_YUYV;
+		pstViDevAttr->enInputDataType = VI_DATA_TYPE_YUV;
+		pstViDevAttr->enIntfMode = VI_MODE_MIPI_YUV422;
+		break;
+	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
+		pstViDevAttr->enDataSeq = VI_DATA_SEQ_YUYV;
+		pstViDevAttr->enInputDataType = VI_DATA_TYPE_YUV;
+		pstViDevAttr->enIntfMode = VI_MODE_BT601;
+		break;
+	default:
+		break;
+	};
+
+	// BT601
+	switch (enSnsType) {
+	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
+		pstViDevAttr->enIntfMode = VI_MODE_BT601;
+		break;
+	default:
+		break;
+	};
+
+	// BT656
+	switch (enSnsType) {
+	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
+	case NEXTCHIP_N5_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
+		pstViDevAttr->enIntfMode = VI_MODE_BT656;
+		break;
+	default:
+		break;
+	};
+
+	// BT1120
+	switch (enSnsType) {
+	case VIVO_MCS369_2M_30FPS_12BIT:
+	case VIVO_MCS369Q_4M_30FPS_12BIT:
+	case VIVO_MM308M2_2M_25FPS_8BIT:
+	case TECHPOINT_TP2825_MIPI_2M_30FPS_8BIT:
+		pstViDevAttr->enDataSeq = VI_DATA_SEQ_YUYV;
+		pstViDevAttr->enInputDataType = VI_DATA_TYPE_YUV;
+		pstViDevAttr->enIntfMode = VI_MODE_BT1120_STANDARD;
+		break;
+	default:
+		break;
+	};
+
+	// subLVDS
+	switch (enSnsType) {
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+		pstViDevAttr->enIntfMode = VI_MODE_LVDS;
+		break;
+	default:
+		break;
+	};
+
+	switch (enSnsType) {
+	// Sony
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
+#ifdef FPGA_PORTING
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
+#endif
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
+	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
+	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	// GalaxyCore
+	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
+	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
+		pstViDevAttr->enBayerFormat = BAYER_FORMAT_RG;
+		break;
+		// brigates
+	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT:
+	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC4336_MIPI_4M_30FPS_10BIT:
+	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
+	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
+	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
+	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
+		pstViDevAttr->enBayerFormat = BAYER_FORMAT_GR;
+		break;
+	case SOI_K06_MIPI_4M_25FPS_10BIT:
+		pstViDevAttr->enBayerFormat = BAYER_FORMAT_GB;
+		break;
+	default:
+		pstViDevAttr->enBayerFormat = BAYER_FORMAT_BG;
+		break;
+	};
+
+	// virtual channel for multi-ch
+#ifndef ARCH_CV183X
+	switch (enSnsType) {
+	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
+		pstViDevAttr->enWorkMode = VI_WORK_MODE_2Multiplex;
+		break;
+	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
+		pstViDevAttr->enWorkMode = VI_WORK_MODE_4Multiplex;
+		break;
+	default:
+		pstViDevAttr->enWorkMode = VI_WORK_MODE_1Multiplex;
+		break;
+	}
+#endif
+
+	return CVI_SUCCESS;
+}
+
+CVI_S32 SAMPLE_COMM_SNS_GetYuvBypassSts(SAMPLE_SNS_TYPE_E enSnsType)
+{
+	CVI_S32 s32Ret = 0;
+	//Set YUV sensor need bypass isp
+	switch (enSnsType) {
+	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
+	case PICO640_THERMAL_479P:
+	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
+	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
+	case TECHPOINT_TP2825_MIPI_2M_30FPS_8BIT:
+	case VIVO_MCS369Q_4M_30FPS_12BIT:
+	case VIVO_MCS369_2M_30FPS_12BIT:
+	case VIVO_MM308M2_2M_25FPS_8BIT:
+	case NEXTCHIP_N5_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
+		s32Ret = 1;
+		break;
+	default:
+		break;
+	}
+	return s32Ret;
+}
+/******************************************************************************
+ * funciton : Get ISP attr info by diffrent sensor
+ ******************************************************************************/
+CVI_S32 SAMPLE_COMM_SNS_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr)
+{
+	CVI_S32 s32Ret = CVI_SUCCESS;
+	PIC_SIZE_E enPicSize;
+	SIZE_S stSize;
+
+	memcpy(pstPubAttr, &ISP_PUB_ATTR_SAMPLE, sizeof(ISP_PUB_ATTR_S));
+
+	SAMPLE_COMM_SNS_GetSize(enSnsType, &enPicSize);
+	SAMPLE_COMM_SNS_GetPicSize(enPicSize, &stSize);
+
+	pstPubAttr->stSnsSize.u32Width = stSize.u32Width;
+	pstPubAttr->stSnsSize.u32Height = stSize.u32Height;
+	pstPubAttr->stWndRect.u32Width = stSize.u32Width;
+	pstPubAttr->stWndRect.u32Height = stSize.u32Height;
+
+	// WDR mode
+	if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT)
+		pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE;
+
+	// FPS
+	switch (enSnsType) {
+	case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
+	case SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT:
+	case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
+	case OV_OV6211_MIPI_400P_120FPS_10BIT:
+	case OV_OV7251_MIPI_480P_120FPS_10BIT:
+		pstPubAttr->f32FrameRate = 120;
+		break;
+	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT:
+	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
+	case SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT:
+	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
+	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
+	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
+		pstPubAttr->f32FrameRate = 60;
+		break;
+	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
+	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
+	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT:
+	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT:
+	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
+	case OV_OV5647_MIPI_2M_30FPS_10BIT:
+		pstPubAttr->f32FrameRate = 30;
+		break;
+	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
+		pstPubAttr->f32FrameRate = 12;
+		break;
+#ifdef FPGA_PORTING
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
+		pstPubAttr->f32FrameRate = 10;
+		break;
+#endif
+	default:
+		pstPubAttr->f32FrameRate = 25;
+		break;
+	}
+
+	switch (enSnsType) {
+	case SOI_K06_MIPI_4M_25FPS_10BIT:
+		pstPubAttr->enBayer = BAYER_GBRG;
+		break;
+	// Sony
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
+#ifdef FPGA_PORTING
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
+#endif
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
+	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
+	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
+	// GalaxyCore
+	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
+	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
+		pstPubAttr->enBayer = BAYER_RGGB;
+		break;
+	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
+	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
+	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
+	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
+		pstPubAttr->enBayer = BAYER_GRBG;
+		break;
+#ifdef ARCH_CV182X
+	case SOI_F23_MIPI_2M_30FPS_10BIT:
+		pstPubAttr->enBayer = BAYER_BGRGI;
+	break;
+#endif
+	default:
+		pstPubAttr->enBayer = BAYER_BGGR;
+		break;
+	};
+
+	return s32Ret;
+}
+
+/******************************************************************************
+ * funciton : Get sns_obj callback
+ ******************************************************************************/
+CVI_VOID *SAMPLE_COMM_SNS_GetSnsObj(SAMPLE_SNS_TYPE_E enSnsType)
+{
+	CVI_VOID *pSnsObj;
+
+	switch (enSnsType) {
+#if defined(SENSOR_BRIGATES_BG0808)
+	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT:
+	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsBG0808_Obj;
+		break;
+#endif
+#if defined(SENSOR_GCORE_GC02M1)
+	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
+		return &stSnsGc02m1_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC1054)
+	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
+		return &stSnsGc1054_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC2053)
+	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
+		return &stSnsGc2053_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC2053_SLAVE)
+	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
+		return &stSnsGc2053_Slave_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC2053_1L)
+	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsGc2053_1l_Obj;
+		break;
+#endif
+#if defined(SENSOR_GCORE_GC2093)
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
+		return &stSnsGc2093_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC2093_SLAVE)
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
+	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
+		return &stSnsGc2093_Slave_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC2145)
+	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
+		return &stSnsGc2145_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC4023)
+	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
+		return &stSnsGc4023_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC4653)
+	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
+		return &stSnsGc4653_Obj;
+#endif
+#if defined(SENSOR_GCORE_GC4653_SLAVE)
+	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
+		return &stSnsGc4653_Slave_Obj;
+#endif
+#if defined(SENSOR_NEXTCHIP_N5)
+	case NEXTCHIP_N5_2M_25FPS_8BIT:
+	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
+		pSnsObj = &stSnsN5_Obj;
+		break;
+#endif
+#if defined(SENSOR_NEXTCHIP_N6)
+	case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
+		pSnsObj = &stSnsN6_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS02D10)
+	case OV_OS02D10_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsOs02d10_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS02D10_SLAVE)
+	case OV_OS02D10_SLAVE_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsOs02d10_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS02K10_SLAVE)
+	case OV_OS02K10_SLAVE_MIPI_2M_30FPS_12BIT:
+		pSnsObj = &stSnsOs02k10_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS04A10)
+	case OV_OS04A10_MIPI_4M_1440P_30FPS_12BIT:
+	case OV_OS04A10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsOs04a10_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS04C10)
+	case OV_OS04C10_MIPI_4M_30FPS_12BIT:
+	case OV_OS04C10_MIPI_4M_1440P_30FPS_12BIT:
+	case OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case OV_OS04C10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsOs04c10_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS04C10_SLAVE)
+	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT:
+	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsOs04c10_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS08A20)
+	case OV_OS08A20_MIPI_4M_30FPS_10BIT:
+	case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_MIPI_5M_30FPS_10BIT:
+	case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_MIPI_8M_30FPS_10BIT:
+	case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsOs08a20_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OS08A20_SLAVE)
+	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
+	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
+	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
+	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsOs08a20_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OV4689)
+	case OV_OV4689_MIPI_4M_30FPS_10BIT:
+		pSnsObj = &stSnsOv4689_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OV5647)
+	case OV_OV5647_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsOv5647_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OV6211)
+	case OV_OV6211_MIPI_400P_120FPS_10BIT:
+		pSnsObj = &stSnsOv6211_Obj;
+		break;
+#endif
+#if defined(SENSOR_OV_OV7251)
+	case OV_OV7251_MIPI_480P_120FPS_10BIT:
+		pSnsObj = &stSnsOv7251_Obj;
+		break;
+#endif
+#if defined(SENSOR_PICO_384)
+	case PICO384_THERMAL_384X288:
+		pSnsObj = &stSnsPICO384_Obj;
+		break;
+#endif
+#if defined(SENSOR_PICO_640)
+	case PICO640_THERMAL_479P:
+		pSnsObj = &stSnsPICO640_Obj;
+		break;
+#endif
+#if defined(SENSOR_PIXELPLUS_PR2020)
+	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
+		pSnsObj = &stSnsPR2020_Obj;
+		break;
+#endif
+#if defined(SENSOR_PIXELPLUS_PR2100)
+	case PIXELPLUS_PR2100_2M_25FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
+	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
+		pSnsObj = &stSnsPR2100_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC035GS)
+	case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
+		pSnsObj = &stSnsSC035GS_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC035GS_1L)
+	case SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT:
+		pSnsObj = &stSnsSC035GS_1L_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC035HGS)
+	case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
+		pSnsObj = &stSnsSC035HGS_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC1346_1L)
+	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT:
+	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT:
+	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsSC1346_1L_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC1346_1L_SLAVE)
+	case SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT:
+	case SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT:
+		pSnsObj = &stSnsSC1346_1L_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC200AI)
+	case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
+	case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsSC200AI_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC301IOT)
+	case SMS_SC301IOT_MIPI_3M_30FPS_10BIT:
+		pSnsObj = &stSnsSC301IOT_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC401AI)
+	case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
+	case SMS_SC401AI_MIPI_3M_30FPS_10BIT:
+		pSnsObj = &stSnsSC401AI_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC500AI)
+	case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
+	case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
+	case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsSC500AI_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC501AI_2L)
+	case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
+		pSnsObj = &stSnsSC501AI_2L_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC531AI_2L)
+	case SMS_SC531AI_2L_MIPI_5M_30FPS_10BIT:
+		pSnsObj = &stSnsSC531AI_2L_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC850SL)
+	case SMS_SC850SL_MIPI_8M_30FPS_12BIT:
+	case SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsSC850SL_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC3332)
+	case SMS_SC3332_MIPI_3M_30FPS_10BIT:
+		pSnsObj = &stSnsSC3332_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC3335)
+	case SMS_SC3335_MIPI_3M_30FPS_10BIT:
+		pSnsObj = &stSnsSC3335_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC3335_SLAVE)
+	case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
+		pSnsObj = &stSnsSC3335_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC3336)
+	case SMS_SC3336_MIPI_3M_30FPS_10BIT:
+		pSnsObj = &stSnsSC3336_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC2335)
+	case SMS_SC2335_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsSC2335_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC2336)
+	case SMS_SC2336_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsSC2336_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC4210)
+	case SMS_SC4210_MIPI_4M_30FPS_12BIT:
+	case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsSC4210_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC4336)
+	case SMS_SC4336_MIPI_4M_30FPS_10BIT:
+		pSnsObj = &stSnsSC4336_Obj;
+		break;
+#endif
+#if defined(SENSOR_SMS_SC8238)
+	case SMS_SC8238_MIPI_8M_30FPS_10BIT:
+	case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsSC8238_Obj;
+		break;
+#endif
+#if defined(SENSOR_SOI_F23)
+	case SOI_F23_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsF23_Obj;
+		break;
+#endif
+#if defined(SENSOR_SOI_F35)
+	case SOI_F35_MIPI_2M_30FPS_10BIT:
+	case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsF35_Obj;
+		break;
+#endif
+#if defined(SENSOR_SOI_F35_SLAVE)
+	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT:
+	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsF35_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_SOI_F37P)
+	case SOI_F37P_MIPI_2M_30FPS_10BIT:
+		pSnsObj = &stSnsF37P_Obj;
+		break;
+#endif
+#if defined(SENSOR_SOI_H65)
+	case SOI_H65_MIPI_1M_30FPS_10BIT:
+		pSnsObj = &stSnsH65_Obj;
+		break;
+#endif
+#if defined(SENSOR_SOI_K06)
+	case SOI_K06_MIPI_4M_25FPS_10BIT:
+		return &stSnsK06_Obj;
+#endif
+#if defined(SENSOR_SOI_Q03)
+	case SOI_Q03_MIPI_3M_30FPS_10BIT:
+		pSnsObj = &stSnsQ03_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX290_2L)
+	case SONY_IMX290_MIPI_1M_30FPS_12BIT:
+	case SONY_IMX290_MIPI_2M_60FPS_12BIT:
+		pSnsObj = &stSnsImx290_2l_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX307)
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx307_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX307_SLAVE)
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx307_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX307_2L)
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx307_2l_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX307_SUBLVDS)
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
+	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx307_Sublvds_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX327)
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
+	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx327_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX327_SLAVE)
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx327_Slave_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX327_2L)
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx327_2l_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX327_FPGA) && defined(FPGA_PORTING)
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
+	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
+		pSnsObj = &stSnsImx327_fpga_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX327_SUBLVDS)
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
+	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx327_Sublvds_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX334)
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
+	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx334_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX335)
+	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
+	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
+	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
+	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
+	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
+		pSnsObj = &stSnsImx335_Obj;
+		break;
+#endif
+#if defined(SENSOR_SONY_IMX347)
+	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
+	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
+		return &stSnsImx347_Obj;
+#endif
+#if defined(SENSOR_SONY_IMX385)
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
+	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
+		pSnsObj = &stSnsImx385_Obj;
+		break;
+#endif
+#if defined(SENSOR_TECHPOINT_TP2850)
+	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
+	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
+		pSnsObj = &stSnsTP2850_Obj;
+		break;
+#endif
+#if defined(SENSOR_TECHPOINT_TP2825)
+	case TECHPOINT_TP2825_MIPI_2M_30FPS_8BIT:
+		pSnsObj = &stSnsTP2825_Obj;
+		break;
+#endif
+#if defined(SENSOR_VIVO_MCS369)
+	case VIVO_MCS369_2M_30FPS_12BIT:
+		pSnsObj = &stSnsMCS369_Obj;
+		break;
+#endif
+#if defined(SENSOR_VIVO_MCS369Q)
+	case VIVO_MCS369Q_4M_30FPS_12BIT:
+		pSnsObj = &stSnsMCS369Q_Obj;
+		break;
+#endif
+#if defined(SENSOR_VIVO_MM308M2)
+	case VIVO_MM308M2_2M_25FPS_8BIT:
+		pSnsObj = &stSnsMM308M2_Obj;
+		break;
+#endif
+	default:
+		pSnsObj = CVI_NULL;
+		break;
+	}
+
+	return pSnsObj;
+}
+
+/******************************************************************************
+ * funciton : Get sns_cfg from sensor_cfg.ini
+ ******************************************************************************/
+
+/*=== Source section parser handler begin === */
+static void parse_source_type(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	(CVI_VOID) param0;
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+
+	SAMPLE_PRT("source type =  %s\n", value);
+	if (strcmp(value, "SOURCE_USER_FE") == 0) {
+		cfg->enSource = VI_PIPE_FRAME_SOURCE_USER_FE;
+	}
+}
+
+static void parse_source_devnum(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	int devno = atoi(value);
+
+	(CVI_VOID) param0;
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+
+	SAMPLE_PRT("devNum =  %s\n", value);
+
+	if (devno >= 1 && devno <= VI_MAX_DEV_NUM)
+		cfg->devNum = devno;
+	else
+		cfg->devNum = 1;
+}
+/* === Source section parser handler end === */
+
+/* === Sensor section parser handler begin === */
+static int parse_lane_id(CVI_S16 *LaneId, const char *value)
+{
+	char buf[8];
+	int offset = 0, idx = 0, k;
+
+	for (k = 0; k < 30; k++) {
+		/* find next ',' */
+		if (value[k] == ',' || value[k] == '\0') {
+			if (k == offset) {
+				SAMPLE_PRT("lane_id parse error, is the format correct?\n");
+				return -1;
+			}
+			memset(buf, 0, sizeof(buf));
+			memcpy(buf, &value[offset], k - offset);
+			buf[k-offset] = '\0';
+			LaneId[idx++] = atoi(buf);
+			offset = k + 1;
+		}
+
+		if (value[k] == '\0' || idx == 5)
+			break;
+	}
+
+	if (k == 30) {
+		SAMPLE_PRT("lane_id parse error, is the format correct?\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+static int parse_pn_swap(CVI_S8 *PNSwap, const char *value)
+{
+	char buf[8];
+	int offset = 0, idx = 0, k;
+
+	for (k = 0; k < 30; k++) {
+		/* find next ',' */
+		if (value[k] == ',' || value[k] == '\0') {
+			if (k == offset) {
+				SAMPLE_PRT("lane_id parse error, is the format correct?\n");
+				return -1;
+			}
+			memset(buf, 0, sizeof(buf));
+			memcpy(buf, &value[offset], k - offset);
+			buf[k-offset] = '\0';
+			PNSwap[idx++] = atoi(buf);
+			offset = k + 1;
+		}
+
+		if (value[k] == '\0' || idx == 5)
+			break;
+	}
+
+	if (k == 30) {
+		SAMPLE_PRT("lane_id parse error, is the format correct?\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+static void parse_sensor_name(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+#define NAME_SIZE 20
+	CVI_U32 index = param0;
+	CVI_U32 i;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("sensor =  %s\n", value);
+	char sensorNameEnv[NAME_SIZE];
+
+	snprintf(sensorNameEnv, NAME_SIZE, "SENSORNAME%d", index);
+	setenv(sensorNameEnv, value, 1);
+
+	for (i = 0; i < SAMPLE_SNS_TYPE_BUTT; i++) {
+		if (strcmp(value, snsr_type_name[i]) == 0) {
+			cfg->enSnsType[index] = i;
+			cfg->enWDRMode[index] = (i < SAMPLE_SNS_TYPE_LINEAR_BUTT) ?
+				WDR_MODE_NONE : WDR_MODE_2To1_LINE;
+			break;
+		}
+	}
+	if (i == SAMPLE_SNS_TYPE_BUTT) {
+		cfg->enSnsType[index] = SONY_IMX327_MIPI_2M_30FPS_12BIT;
+		cfg->enWDRMode[index] = WDR_MODE_NONE;
+		cfg->u8UseMultiSns = index;
+	}
+}
+
+static void parse_sensor_busid(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("bus_id =  %s\n", value);
+	cfg->s32BusId[index] = atoi(value);
+}
+
+static void parse_sensor_i2caddr(SAMPLE_INI_CFG_S *cfg, const char *value,
+					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("sns_i2c_addr =  %s\n", value);
+	cfg->s32SnsI2cAddr[index] = atoi(value);
+}
+
+static void parse_sensor_mipidev(SAMPLE_INI_CFG_S *cfg, const char *value,
+					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("mipi_dev =  %s\n", value);
+	cfg->MipiDev[index] = atoi(value);
+}
+
+static void parse_sensor_laneid(SAMPLE_INI_CFG_S *cfg, const char *value,
+					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("Lane_id =  %s\n", value);
+	parse_lane_id(cfg->as16LaneId[index], value);
+}
+
+static void parse_sensor_pnswap(SAMPLE_INI_CFG_S *cfg, const char *value,
+					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("pn_swap =  %s\n", value);
+	parse_pn_swap(cfg->as8PNSwap[index], value);
+}
+
+static void parse_sensor_hwsync(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("hw_sync =  %s\n", value);
+	cfg->u8HwSync[index] = atoi(value);
+}
+
+static void parse_sensor_mclken(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("mclk_en =  %s\n", value);
+	cfg->stMclkAttr[index].bMclkEn = atoi(value);
+}
+
+static void parse_sensor_mclk(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("mclk =  %s\n", value);
+	cfg->stMclkAttr[index].u8Mclk = atoi(value);
+}
+
+static void parse_sensor_orien(SAMPLE_INI_CFG_S *cfg, const char *value,
+				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
+{
+	CVI_U32 index = param0;
+
+	(CVI_VOID) param1;
+	(CVI_VOID) param2;
+	SAMPLE_PRT("orien =  %s\n", value);
+	cfg->u8Orien[index] = atoi(value);
+}
+ /* === Sensor section parser handler end === */
+typedef CVI_VOID(*parser)(SAMPLE_INI_CFG_S *cfg, const char *value,
+		CVI_U32 param0, CVI_U32 param1, CVI_U32 param2);
+
+typedef struct _INI_HDLR_S {
+	const char name[16];
+	CVI_U32 param0;
+	CVI_U32 param1;
+	CVI_U32 param2;
+	parser pfnJob;
+} INI_HDLR_S;
+
+typedef enum _INI_SOURCE_NAME_E {
+	INI_SOURCE_TYPE = 0,
+	INI_SOURCE_DEVNUM,
+	INI_SOURCE_NUM,
+} INI_SOURCE_NAME_E;
+
+typedef enum _INI_SENSOR_NAME_E {
+	INI_SENSOR_NAME = 0,
+	INI_SENSOR_BUSID,
+	INI_SENSOR_I2CADDR,
+	INI_SENSOR_MIPIDEV,
+	INI_SENSOR_LANEID,
+	INI_SENSOR_PNSWAP,
+	INI_SENSOR_HWSYNC,
+	INI_SENSOR_MCLKEN,
+	INI_SENSOR_MCLK,
+	INI_SENSOR_ORIEN,
+	INI_SENSOR_NUM,
+} INI_SENSOR_NAME_E;
+
+const INI_HDLR_S stSectionSource[INI_SOURCE_NUM] = {
+	[INI_SOURCE_TYPE] = {"type", 0, 0, 0, parse_source_type},
+	[INI_SOURCE_DEVNUM] = {"dev_num", 0, 0, 0, parse_source_devnum},
+};
+
+const INI_HDLR_S stSectionSensor1[INI_SENSOR_NUM] = {
+	[INI_SENSOR_NAME] = {"name", 0, 0, 0, parse_sensor_name},
+	[INI_SENSOR_BUSID] = {"bus_id", 0, 0, 0, parse_sensor_busid},
+	[INI_SENSOR_I2CADDR] = {"sns_i2c_addr", 0, 0, 0, parse_sensor_i2caddr},
+	[INI_SENSOR_MIPIDEV] = {"mipi_dev", 0, 0, 0, parse_sensor_mipidev},
+	[INI_SENSOR_LANEID] = {"lane_id", 0, 0, 0, parse_sensor_laneid},
+	[INI_SENSOR_PNSWAP] = {"pn_swap", 0, 0, 0, parse_sensor_pnswap},
+	[INI_SENSOR_HWSYNC] = {"hw_sync", 0, 0, 0, parse_sensor_hwsync},
+	[INI_SENSOR_MCLKEN] = {"mclk_en", 0, 0, 0, parse_sensor_mclken},
+	[INI_SENSOR_MCLK] = {"mclk", 0, 0, 0, parse_sensor_mclk},
+	[INI_SENSOR_ORIEN] = {"orien", 0, 0, 0, parse_sensor_orien},
+};
+
+const INI_HDLR_S stSectionSensor2[INI_SENSOR_NUM] = {
+	[INI_SENSOR_NAME] = {"name", 1, 0, 0, parse_sensor_name},
+	[INI_SENSOR_BUSID] = {"bus_id", 1, 0, 0, parse_sensor_busid},
+	[INI_SENSOR_I2CADDR] = {"sns_i2c_addr", 1, 0, 0, parse_sensor_i2caddr},
+	[INI_SENSOR_MIPIDEV] = {"mipi_dev", 1, 0, 0, parse_sensor_mipidev},
+	[INI_SENSOR_LANEID] = {"lane_id", 1, 0, 0, parse_sensor_laneid},
+	[INI_SENSOR_PNSWAP] = {"pn_swap", 1, 0, 0, parse_sensor_pnswap},
+	[INI_SENSOR_HWSYNC] = {"hw_sync", 1, 0, 0, parse_sensor_hwsync},
+	[INI_SENSOR_MCLKEN] = {"mclk_en", 1, 0, 0, parse_sensor_mclken},
+	[INI_SENSOR_MCLK] = {"mclk", 1, 0, 0, parse_sensor_mclk},
+	[INI_SENSOR_ORIEN] = {"orien", 1, 0, 0, parse_sensor_orien},
+};
+
+const INI_HDLR_S stSectionSensor3[INI_SENSOR_NUM] = {
+	[INI_SENSOR_NAME] = {"name", 2, 0, 0, parse_sensor_name},
+	[INI_SENSOR_BUSID] = {"bus_id", 2, 0, 0, parse_sensor_busid},
+	[INI_SENSOR_I2CADDR] = {"sns_i2c_addr", 2, 0, 0, parse_sensor_i2caddr},
+	[INI_SENSOR_MIPIDEV] = {"mipi_dev", 2, 0, 0, parse_sensor_mipidev},
+	[INI_SENSOR_LANEID] = {"lane_id", 2, 0, 0, parse_sensor_laneid},
+	[INI_SENSOR_PNSWAP] = {"pn_swap", 2, 0, 0, parse_sensor_pnswap},
+	[INI_SENSOR_HWSYNC] = {"hw_sync", 2, 0, 0, parse_sensor_hwsync},
+	[INI_SENSOR_MCLKEN] = {"mclk_en", 2, 0, 0, parse_sensor_mclken},
+	[INI_SENSOR_MCLK] = {"mclk", 2, 0, 0, parse_sensor_mclk},
+	[INI_SENSOR_ORIEN] = {"orien", 2, 0, 0, parse_sensor_orien},
+};
+
+CVI_S32 SAMPLE_COMM_SNS_SetIniPath(const CVI_CHAR *iniPath)
+{
+	int ret;
+
+	if (iniPath == NULL) {
+		SAMPLE_PRT("%s: null ptr\n", __func__);
+		ret = CVI_FAILURE;
+	} else if (strlen(iniPath) >= SNSCFGPATH_SIZE) {
+		SAMPLE_PRT("%s: SNSCFGPATH_SIZE is too small\n", __func__);
+		ret = CVI_FAILURE;
+	} else {
+		strncpy(g_snsCfgPath, iniPath, SNSCFGPATH_SIZE);
+		ret = CVI_SUCCESS;
+	}
+
+	return ret;
+}
+
+static int parse_handler(void *user, const char *section, const char *name, const char *value)
+{
+	SAMPLE_INI_CFG_S *cfg = (SAMPLE_INI_CFG_S *)user;
+	const INI_HDLR_S *hdler;
+	int i, size;
+
+	if (strcmp(section, "source") == 0) {
+		hdler = stSectionSource;
+		size = INI_SOURCE_NUM;
+	} else if (strcmp(section, "sensor") == 0) {
+		hdler = stSectionSensor1;
+		size = INI_SENSOR_NUM;
+	} else if (strcmp(section, "sensor2") == 0) {
+		hdler = stSectionSensor2;
+		size = INI_SENSOR_NUM;
+	} else if (strcmp(section, "sensor3") == 0) {
+		hdler = stSectionSensor3;
+		size = INI_SENSOR_NUM;
+	} else {
+		/* unknown section/name */
+		return 1;
+	}
+	for (i = 0; i < size; i++) {
+		if (strcmp(name, hdler[i].name) == 0) {
+			hdler[i].pfnJob(cfg, value, hdler[i].param0,
+					hdler[i].param1, hdler[i].param2);
+			break;
+		}
+	}
+
+	return 1;
+}
+
+CVI_S32 SAMPLE_COMM_SNS_ParseIni(SAMPLE_INI_CFG_S *pstIniCfg)
+{
+	int ret;
+
+	memcpy(pstIniCfg, &stDefIniCfg, sizeof(*pstIniCfg));
+	if (g_snsCfgPath[0] != 0) {
+		SAMPLE_PRT("Parse %s\n", g_snsCfgPath);
+		ret = ini_parse(g_snsCfgPath, parse_handler, pstIniCfg);
+		if (ret >= 0) {
+			return 1;
+		}
+		if (ret != -1) {
+			SAMPLE_PRT("Parse %s incomplete, use default cfg\n", INI_FILE_PATH);
+			return 0;
+		}
+
+		SAMPLE_PRT("%s Not Found\n", g_snsCfgPath);
+	}
+	SAMPLE_PRT("Parse %s\n", INI_FILE_PATH);
+	ret = ini_parse(INI_FILE_PATH, parse_handler, pstIniCfg);
+	if (ret >= 0) {
+		return 1;
+	}
+	if (ret != -1) {
+		SAMPLE_PRT("Parse %s incomplete, use default cfg\n", INI_FILE_PATH);
+		return 0;
+	}
+	SAMPLE_PRT("%s Not Found\n", INI_FILE_PATH);
+	SAMPLE_PRT("Parse %s\n", INI_DEF_PATH);
+
+	ret = ini_parse(INI_DEF_PATH, parse_handler, pstIniCfg);
+	if (ret < 0) {
+		if (ret == -1) {
+			SAMPLE_PRT("%s not exist, use default cfg\n", INI_DEF_PATH);
+		} else {
+			SAMPLE_PRT("Parse %s incomplete, use default cfg\n", INI_DEF_PATH);
+		}
+
+		return 0;
+	}
+
+	return 1;
+}
\ No newline at end of file
diff --git a/middleware/v2/sample/common/sample_common_vi.c b/middleware/v2/sample/common/sample_common_vi.c
index f42337024..59f486140 100644
--- a/middleware/v2/sample/common/sample_common_vi.c
+++ b/middleware/v2/sample/common/sample_common_vi.c
@@ -19,40 +19,6 @@
 #include "cvi_comm_isp.h"
 #include "sample_comm.h"
 #include "cvi_isp.h"
-#include "ini.h"
-
-#define SNSCFGPATH_SIZE 100
-static CVI_CHAR g_snsCfgPath[SNSCFGPATH_SIZE];
-
-// default is MIPI-CSI Bayer format sensor
-VI_DEV_ATTR_S DEV_ATTR_SENSOR_BASE = {
-	VI_MODE_MIPI,
-	VI_WORK_MODE_1Multiplex,
-	VI_SCAN_PROGRESSIVE,
-	{-1, -1, -1, -1},
-	VI_DATA_SEQ_YUYV,
-
-	{
-	/*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
-	VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH,
-	VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH,
-
-	/*hsync_hfb    hsync_act    hsync_hhb*/
-	{0,            1920,        0,
-	/*vsync0_vhb vsync0_act vsync0_hhb*/
-	 0,            1080,        0,
-	/*vsync1_vhb vsync1_act vsync1_hhb*/
-	 0,            0,            0}
-	},
-	VI_DATA_TYPE_RGB,
-	{1920, 1080},
-	{
-		WDR_MODE_NONE,
-		1080,
-		0
-	},
-	.enBayerFormat = BAYER_FORMAT_BG,
-};
 
 // default is output YUV420 image
 VI_CHN_ATTR_S CHN_ATTR_420_SDR8 = {
@@ -67,153 +33,74 @@ VI_CHN_ATTR_S CHN_ATTR_420_SDR8 = {
 	-1
 };
 
-/*
- * Brief: get picture size(w*h), according enPicSize
- */
+CVI_CHAR *SAMPLE_COMM_VI_GetSnsrTypeName(void)
+{
+	return SAMPLE_COMM_SNS_GetSnsrTypeName();
+}
+
+CVI_S32 SAMPLE_COMM_VI_GetYuvBypassSts(SAMPLE_SNS_TYPE_E enSnsType)
+{
+	return SAMPLE_COMM_SNS_GetYuvBypassSts(enSnsType);
+}
+
+CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize)
+{
+	CVI_S32 s32Ret = CVI_SUCCESS;
+
+	s32Ret = SAMPLE_COMM_SNS_GetSize(enMode, penSize);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_SNS_GetSize failed with %#x\n", s32Ret);
+		return s32Ret;
+	}
+	return s32Ret;
+}
+
 CVI_S32 SAMPLE_COMM_SYS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize)
 {
-	switch (enPicSize) {
-	case PIC_CIF:   /* 352 * 288 */
-		pstSize->u32Width  = 352;
-		pstSize->u32Height = 288;
-		break;
+	CVI_S32 s32Ret = CVI_SUCCESS;
 
-	case PIC_D1_PAL:   /* 720 * 576 */
-		pstSize->u32Width  = 720;
-		pstSize->u32Height = 576;
-		break;
-
-	case PIC_D1_NTSC:   /* 720 * 480 */
-		pstSize->u32Width  = 720;
-		pstSize->u32Height = 480;
-		break;
-
-	case PIC_720P:   /* 1280 * 720 */
-		pstSize->u32Width  = 1280;
-		pstSize->u32Height = 720;
-		break;
-
-	case PIC_1600x1200:
-		pstSize->u32Width  = 1600;
-		pstSize->u32Height = 1200;
-		break;
-
-	case PIC_1080P:  /* 1920 * 1080 */
-		pstSize->u32Width  = 1920;
-		pstSize->u32Height = 1080;
-		break;
-
-	case PIC_1088:  /* 1920 * 1088*/
-		pstSize->u32Width  = 1920;
-		pstSize->u32Height = 1088;
-		break;
-
-	case PIC_1440P:  /* 2560 * 1440 */
-		pstSize->u32Width  = 2560;
-		pstSize->u32Height = 1440;
-		break;
-
-	case PIC_2304x1296:
-		pstSize->u32Width  = 2304;
-		pstSize->u32Height = 1296;
-		break;
-
-	case PIC_2048x1536:
-		pstSize->u32Width  = 2048;
-		pstSize->u32Height = 1536;
-		break;
-
-	case PIC_2592x1520:
-		pstSize->u32Width  = 2592;
-		pstSize->u32Height = 1520;
-		break;
-
-	case PIC_2560x1600:
-		pstSize->u32Width  = 2560;
-		pstSize->u32Height = 1600;
-		break;
-
-	case PIC_2592x1944:
-		pstSize->u32Width  = 2592;
-		pstSize->u32Height = 1944;
-		break;
-
-	case PIC_2592x1536:
-		pstSize->u32Width  = 2592;
-		pstSize->u32Height = 1536;
-		break;
-
-	case PIC_2688x1520:
-		pstSize->u32Width  = 2688;
-		pstSize->u32Height = 1520;
-		break;
-
-	case PIC_2716x1524:
-		pstSize->u32Width  = 2716;
-		pstSize->u32Height = 1524;
-		break;
-
-	case PIC_2880x1620:
-		pstSize->u32Width  = 2880;
-		pstSize->u32Height = 1620;
-		break;
-
-	case PIC_3844x1124:
-		pstSize->u32Width  = 3844;
-		pstSize->u32Height = 1124;
-		break;
-
-	case PIC_3840x2160:
-		pstSize->u32Width  = 3840;
-		pstSize->u32Height = 2160;
-		break;
-
-	case PIC_3000x3000:
-		pstSize->u32Width  = 3000;
-		pstSize->u32Height = 3000;
-		break;
-
-	case PIC_4000x3000:
-		pstSize->u32Width  = 4000;
-		pstSize->u32Height = 3000;
-		break;
-
-	case PIC_4096x2160:
-		pstSize->u32Width  = 4096;
-		pstSize->u32Height = 2160;
-		break;
-
-	case PIC_3840x8640:
-		pstSize->u32Width = 3840;
-		pstSize->u32Height = 8640;
-		break;
-
-	case PIC_7688x1124:
-		pstSize->u32Width = 7688;
-		pstSize->u32Height = 1124;
-		break;
-
-	case PIC_640x480:
-		pstSize->u32Width = 640;
-		pstSize->u32Height = 480;
-		break;
-	case PIC_479P:  /* 632 * 479 */
-		pstSize->u32Width  = 632;
-		pstSize->u32Height = 479;
-		break;
-	case PIC_400x400:
-		pstSize->u32Width  = 400;
-		pstSize->u32Height = 400;
-		break;
-	case PIC_288P:  /* 384 * 288 */
-		pstSize->u32Width  = 384;
-		pstSize->u32Height = 288;
-		break;
-	default:
-		return CVI_FAILURE;
+	s32Ret = SAMPLE_COMM_SNS_GetPicSize(enPicSize, pstSize);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_SNS_GetPicSize failed with %#x\n", s32Ret);
+		return s32Ret;
 	}
+	return s32Ret;
+}
 
-	return CVI_SUCCESS;
+CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr)
+{
+	CVI_S32 s32Ret = CVI_SUCCESS;
+
+	s32Ret = SAMPLE_COMM_SNS_GetDevAttr(enSnsType, pstViDevAttr);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_SNS_GetDevAttr failed with %#x\n", s32Ret);
+		return s32Ret;
+	}
+	return s32Ret;
+}
+
+CVI_S32 SAMPLE_COMM_VI_ParseIni(SAMPLE_INI_CFG_S *pstIniCfg)
+{
+	CVI_S32 s32Ret = CVI_SUCCESS;
+
+	s32Ret = SAMPLE_COMM_SNS_ParseIni(pstIniCfg);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_SNS_ParseIni failed with %#x\n", s32Ret);
+		return s32Ret;
+	}
+	return s32Ret;
+}
+
+CVI_S32 SAMPLE_COMM_VI_SetIniPath(const CVI_CHAR *iniPath)
+{
+	CVI_S32 s32Ret = CVI_SUCCESS;
+
+	s32Ret = SAMPLE_COMM_SNS_SetIniPath(iniPath);
+	if (s32Ret != CVI_SUCCESS) {
+		CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_SNS_SetIniPath failed with %#x\n", s32Ret);
+		return s32Ret;
+	}
+	return s32Ret;
 }
 
 void SAMPLE_COMM_VI_GetSensorInfo(SAMPLE_VI_CONFIG_S *pstViConfig)
@@ -235,203 +122,6 @@ void SAMPLE_COMM_VI_GetSensorInfo(SAMPLE_VI_CONFIG_S *pstViConfig)
 	pstViConfig->astViInfo[1].stSnsInfo.enSnsType = SONY_IMX290_MIPI_2M_60FPS_12BIT;
 }
 
-CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr)
-{
-	PIC_SIZE_E enPicSize;
-	SIZE_S stSize;
-
-	memcpy(pstViDevAttr, &DEV_ATTR_SENSOR_BASE, sizeof(VI_DEV_ATTR_S));
-
-	SAMPLE_COMM_VI_GetSizeBySensor(enSnsType, &enPicSize);
-	SAMPLE_COMM_SYS_GetPicSize(enPicSize, &stSize);
-
-	pstViDevAttr->stSize.u32Width = stSize.u32Width;
-	pstViDevAttr->stSize.u32Height = stSize.u32Height;
-	pstViDevAttr->stWDRAttr.u32CacheLine = stSize.u32Height;
-
-	// WDR mode
-	if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT)
-		pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
-
-	// set synthetic wdr mode
-	switch (enSnsType) {
-	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
-		pstViDevAttr->stWDRAttr.bSyntheticWDR = 1;
-		break;
-	default:
-		pstViDevAttr->stWDRAttr.bSyntheticWDR = 0;
-		break;
-	}
-
-	// YUV Sensor
-	switch (enSnsType) {
-	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
-	case NEXTCHIP_N5_2M_25FPS_8BIT:
-	case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
-	case PICO384_THERMAL_384X288:
-	case PICO640_THERMAL_479P:
-	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
-	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
-	case PIXELPLUS_PR2100_2M_25FPS_8BIT:
-	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
-	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
-	case VIVO_MCS369_2M_30FPS_12BIT:
-	case VIVO_MCS369Q_4M_30FPS_12BIT:
-	case VIVO_MM308M2_2M_25FPS_8BIT:
-		pstViDevAttr->enDataSeq = VI_DATA_SEQ_YUYV;
-		pstViDevAttr->enInputDataType = VI_DATA_TYPE_YUV;
-		pstViDevAttr->enIntfMode = VI_MODE_MIPI_YUV422;
-		break;
-	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
-		pstViDevAttr->enDataSeq = VI_DATA_SEQ_YUYV;
-		pstViDevAttr->enInputDataType = VI_DATA_TYPE_YUV;
-		pstViDevAttr->enIntfMode = VI_MODE_BT601;
-		break;
-	default:
-		break;
-	};
-
-	// BT601
-	switch (enSnsType) {
-	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
-		pstViDevAttr->enIntfMode = VI_MODE_BT601;
-		break;
-	default:
-		break;
-	};
-
-	// BT656
-	switch (enSnsType) {
-	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
-	case NEXTCHIP_N5_2M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
-	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
-		pstViDevAttr->enIntfMode = VI_MODE_BT656;
-		break;
-	default:
-		break;
-	};
-
-	// BT1120
-	switch (enSnsType) {
-	case VIVO_MCS369_2M_30FPS_12BIT:
-	case VIVO_MCS369Q_4M_30FPS_12BIT:
-	case VIVO_MM308M2_2M_25FPS_8BIT:
-		pstViDevAttr->enIntfMode = VI_MODE_BT1120_STANDARD;
-		break;
-	default:
-		break;
-	};
-
-	// subLVDS
-	switch (enSnsType) {
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-		pstViDevAttr->enIntfMode = VI_MODE_LVDS;
-		break;
-	default:
-		break;
-	};
-
-	switch (enSnsType) {
-	// Sony
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
-#ifdef FPGA_PORTING
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
-#endif
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
-	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
-	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
-	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	// GalaxyCore
-	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
-	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
-		pstViDevAttr->enBayerFormat = BAYER_FORMAT_RG;
-		break;
-		// brigates
-	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT:
-	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC4336_MIPI_4M_30FPS_10BIT:
-	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
-	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
-	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
-	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
-		pstViDevAttr->enBayerFormat = BAYER_FORMAT_GR;
-		break;
-	case SOI_K06_MIPI_4M_25FPS_10BIT:
-		pstViDevAttr->enBayerFormat = BAYER_FORMAT_GB;
-		break;
-	default:
-		pstViDevAttr->enBayerFormat = BAYER_FORMAT_BG;
-		break;
-	};
-
-	// virtual channel for multi-ch
-#ifndef ARCH_CV183X
-	switch (enSnsType) {
-	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
-		pstViDevAttr->enWorkMode = VI_WORK_MODE_2Multiplex;
-		break;
-	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
-		pstViDevAttr->enWorkMode = VI_WORK_MODE_4Multiplex;
-		break;
-	default:
-		pstViDevAttr->enWorkMode = VI_WORK_MODE_1Multiplex;
-		break;
-	}
-#endif
-
-	return CVI_SUCCESS;
-}
-
 CVI_S32 SAMPLE_COMM_VI_GetChnAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_CHN_ATTR_S *pstChnAttr)
 {
 	VI_DEV_ATTR_S stViDevAttr;
@@ -927,207 +617,6 @@ CVI_S32 SAMPLE_COMM_VI_BindPipeDev(SAMPLE_VI_INFO_S *pstViInfo)
 	return s32Ret;
 }
 
-/******************************************************************************
- * funciton : Get enSize by diffrent sensor
- ******************************************************************************/
-CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize)
-{
-	CVI_S32 s32Ret = CVI_SUCCESS;
-
-	if (!penSize)
-		return CVI_FAILURE;
-
-	switch (enMode) {
-	case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
-	case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
-	case PIXELPLUS_PR2020_1M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_1M_30FPS_8BIT:
-	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT:
-	case SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT:
-	case SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1:
-	case SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT:
-	case SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT:
-	case SOI_H65_MIPI_1M_30FPS_10BIT:
-	case SONY_IMX290_MIPI_1M_30FPS_12BIT:
-#ifdef FPGA_PORTING
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT:
-	case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
-#endif
-		*penSize = PIC_720P;
-		break;
-	case GCORE_GC02M1_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2145_MIPI_2M_12FPS_8BIT:
-		*penSize = PIC_1600x1200;
-		break;
-	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT:
-	case BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
-	case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case NEXTCHIP_N5_2M_25FPS_8BIT:
-	case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
-	case OV_OS02D10_MIPI_2M_30FPS_10BIT:
-	case OV_OS02D10_SLAVE_MIPI_2M_30FPS_10BIT:
-	case OV_OS02K10_SLAVE_MIPI_2M_30FPS_12BIT:
-	case PIXELPLUS_PR2020_2M_25FPS_8BIT:
-	case PIXELPLUS_PR2020_2M_30FPS_8BIT:
-	case PIXELPLUS_PR2100_2M_25FPS_8BIT:
-	case SMS_SC2335_MIPI_2M_30FPS_10BIT:
-	case SMS_SC2336_MIPI_2M_30FPS_10BIT:
-	case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
-	case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SOI_F23_MIPI_2M_30FPS_10BIT:
-	case SOI_F35_MIPI_2M_30FPS_10BIT:
-	case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT:
-	case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SOI_F37P_MIPI_2M_30FPS_10BIT:
-	case SONY_IMX290_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX307_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
-	case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX327_MIPI_2M_60FPS_12BIT:
-	case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_2M_60FPS_10BIT:
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT:
-	case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
-	case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT:
-	case VIVO_MCS369_2M_30FPS_12BIT:
-	case VIVO_MM308M2_2M_25FPS_8BIT:
-		*penSize = PIC_1080P;
-		break;
-	case GCORE_GC4023_MIPI_4M_30FPS_10BIT:
-	case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
-	case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT:
-	case OV_OS04A10_MIPI_4M_1440P_30FPS_12BIT:
-	case OV_OS04A10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
-	case OV_OS04C10_MIPI_4M_1440P_30FPS_12BIT:
-	case OV_OS04C10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_MIPI_4M_30FPS_10BIT:
-	case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
-	case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
-	case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
-	case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC4210_MIPI_4M_30FPS_12BIT:
-	case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC4336_MIPI_4M_30FPS_10BIT:
-	case SOI_K06_MIPI_4M_25FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT:
-	case SONY_IMX335_MIPI_4M_60FPS_10BIT:
-	case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT:
-	case VIVO_MCS369Q_4M_30FPS_12BIT:
-		*penSize = PIC_1440P;
-		break;
-	case SMS_SC401AI_MIPI_3M_30FPS_10BIT:
-	case SMS_SC3332_MIPI_3M_30FPS_10BIT:
-	case SMS_SC3335_MIPI_3M_30FPS_10BIT:
-	case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
-	case SMS_SC3336_MIPI_3M_30FPS_10BIT:
-	case SOI_Q03_MIPI_3M_30FPS_10BIT:
-		*penSize = PIC_2304x1296;
-		break;
-	case SMS_SC301IOT_MIPI_3M_30FPS_10BIT:
-		*penSize = PIC_2048x1536;
-		break;
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
-	case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
-		*penSize = PIC_2560x1600;
-		break;
-	case OV_OS08A20_MIPI_5M_30FPS_10BIT:
-	case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
-	case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_5M_30FPS_12BIT:
-	case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case SONY_IMX335_MIPI_5M_60FPS_10BIT:
-		*penSize = PIC_2592x1944;
-		break;
-	case OV_OS04C10_MIPI_4M_30FPS_12BIT:
-	case OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT:
-	case OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
-	case OV_OV4689_MIPI_4M_30FPS_10BIT:
-	case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
-	case SONY_IMX347_MIPI_4M_60FPS_12BIT:
-		*penSize = PIC_2688x1520;
-		break;
-	case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
-	case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
-	case SMS_SC531AI_2L_MIPI_5M_30FPS_10BIT:
-		*penSize = PIC_2880x1620;
-		break;
-	case OV_OS08A20_MIPI_8M_30FPS_10BIT:
-	case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1:
-	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
-	case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC850SL_MIPI_8M_30FPS_12BIT:
-	case SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1:
-	case SMS_SC8238_MIPI_8M_30FPS_10BIT:
-	case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1:
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT:
-	case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
-		*penSize = PIC_3840x2160;
-		break;
-	case OV_OV7251_MIPI_480P_120FPS_10BIT:
-	case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
-	case SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT:
-	case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
-		*penSize = PIC_640x480;
-		break;
-	case PICO640_THERMAL_479P:
-		*penSize = PIC_479P;
-		break;
-	case OV_OV6211_MIPI_400P_120FPS_10BIT:
-		*penSize = PIC_400x400;
-		break;
-	case PICO384_THERMAL_384X288:
-		*penSize = PIC_288P;
-		break;
-#ifdef ARCH_CV183X
-	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
-		*penSize = PIC_3844x1124;
-		break;
-	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
-		*penSize = PIC_7688x1124;
-		break;
-#else
-	case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
-	case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
-		*penSize = PIC_1080P;
-		break;
-#endif
-	default:
-		s32Ret = CVI_FAILURE;
-		break;
-	}
-	return s32Ret;
-}
-
 CVI_S32 SAMPLE_COMM_VI_StartViChn(SAMPLE_VI_CONFIG_S *pstViConfig)
 {
 	CVI_S32             i;
@@ -1524,569 +1013,6 @@ CVI_S32 SAMPLE_COMM_VI_CLOSE(CVI_VOID)
 	return s32ret;
 }
 
-static const char *snsr_type_name[SAMPLE_SNS_TYPE_BUTT] = {
-	/* ------ LINEAR BEGIN ------*/
-	"BRIGATES_BG0808_MIPI_2M_30FPS_10BIT",
-	"GCORE_GC02M1_MIPI_2M_30FPS_10BIT",
-	"GCORE_GC1054_MIPI_1M_30FPS_10BIT",
-	"GCORE_GC2053_MIPI_2M_30FPS_10BIT",
-	"GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT",
-	"GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT",
-	"GCORE_GC2093_MIPI_2M_30FPS_10BIT",
-	"GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT",
-	"GCORE_GC2145_MIPI_2M_12FPS_8BIT",
-	"GCORE_GC4023_MIPI_4M_30FPS_10BIT",
-	"GCORE_GC4653_MIPI_4M_30FPS_10BIT",
-	"GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT",
-	"NEXTCHIP_N5_1M_2CH_25FPS_8BIT",
-	"NEXTCHIP_N5_2M_25FPS_8BIT",
-	"NEXTCHIP_N6_2M_4CH_25FPS_8BIT",
-	"OV_OS02D10_MIPI_2M_30FPS_10BIT",
-	"OV_OS02D10_SLAVE_MIPI_2M_30FPS_10BIT",
-	"OV_OS02K10_SLAVE_MIPI_2M_30FPS_12BIT",
-	"OV_OS04A10_MIPI_4M_1440P_30FPS_12BIT",
-	"OV_OS04C10_MIPI_4M_30FPS_12BIT",
-	"OV_OS04C10_MIPI_4M_1440P_30FPS_12BIT",
-	"OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT",
-	"OV_OS08A20_MIPI_4M_30FPS_10BIT",
-	"OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT",
-	"OV_OS08A20_MIPI_5M_30FPS_10BIT",
-	"OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT",
-	"OV_OS08A20_MIPI_8M_30FPS_10BIT",
-	"OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT",
-	"OV_OV4689_MIPI_4M_30FPS_10BIT",
-	"OV_OV6211_MIPI_400P_120FPS_10BIT",
-	"OV_OV7251_MIPI_480P_120FPS_10BIT",
-	"PICO384_THERMAL_384X288",
-	"PICO640_THERMAL_479P",
-	"PIXELPLUS_PR2020_1M_25FPS_8BIT",
-	"PIXELPLUS_PR2020_1M_30FPS_8BIT",
-	"PIXELPLUS_PR2020_2M_25FPS_8BIT",
-	"PIXELPLUS_PR2020_2M_30FPS_8BIT",
-	"PIXELPLUS_PR2100_2M_25FPS_8BIT",
-	"PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT",
-	"PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT",
-	"SMS_SC035GS_MIPI_480P_120FPS_12BIT",
-	"SMS_SC035GS_1L_MIPI_480P_120FPS_10BIT",
-	"SMS_SC035HGS_MIPI_480P_120FPS_12BIT",
-	"SMS_SC1346_1L_MIPI_1M_30FPS_10BIT",
-	"SMS_SC1346_1L_MIPI_1M_60FPS_10BIT",
-	"SMS_SC1346_1L_SLAVE_MIPI_1M_30FPS_10BIT",
-	"SMS_SC1346_1L_SLAVE_MIPI_1M_60FPS_10BIT",
-	"SMS_SC200AI_MIPI_2M_30FPS_10BIT",
-	"SMS_SC301IOT_MIPI_3M_30FPS_10BIT",
-	"SMS_SC401AI_MIPI_3M_30FPS_10BIT",
-	"SMS_SC401AI_MIPI_4M_30FPS_10BIT",
-	"SMS_SC500AI_MIPI_4M_30FPS_10BIT",
-	"SMS_SC500AI_MIPI_5M_30FPS_10BIT",
-	"SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT",
-	"SMS_SC531AI_2L_MIPI_5M_30FPS_10BIT",
-	"SMS_SC850SL_MIPI_8M_30FPS_12BIT",
-	"SMS_SC3332_MIPI_3M_30FPS_10BIT",
-	"SMS_SC3335_MIPI_3M_30FPS_10BIT",
-	"SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT",
-	"SMS_SC3336_MIPI_3M_30FPS_10BIT",
-	"SMS_SC2335_MIPI_2M_30FPS_10BIT",
-	"SMS_SC2336_MIPI_2M_30FPS_10BIT",
-	"SMS_SC4210_MIPI_4M_30FPS_12BIT",
-	"SMS_SC4336_MIPI_4M_30FPS_10BIT",
-	"SMS_SC8238_MIPI_8M_30FPS_10BIT",
-	"SOI_F23_MIPI_2M_30FPS_10BIT",
-	"SOI_F35_MIPI_2M_30FPS_10BIT",
-	"SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT",
-	"SOI_F37P_MIPI_2M_30FPS_10BIT",
-	"SOI_H65_MIPI_1M_30FPS_10BIT",
-	"SOI_K06_MIPI_4M_25FPS_10BIT",
-	"SOI_Q03_MIPI_3M_30FPS_10BIT",
-	"SONY_IMX290_MIPI_1M_30FPS_12BIT",
-	"SONY_IMX290_MIPI_2M_60FPS_12BIT",
-	"SONY_IMX307_MIPI_2M_30FPS_12BIT",
-	"SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT",
-	"SONY_IMX307_2L_MIPI_2M_30FPS_12BIT",
-	"SONY_IMX307_SUBLVDS_2M_30FPS_12BIT",
-	"SONY_IMX307_MIPI_2M_60FPS_12BIT",
-	"SONY_IMX307_SUBLVDS_2M_60FPS_12BIT",
-#ifdef FPGA_PORTING
-	"SONY_IMX327_MIPI_1M_30FPS_10BIT",
-#endif
-	"SONY_IMX327_MIPI_2M_30FPS_12BIT",
-	"SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT",
-	"SONY_IMX327_2L_MIPI_2M_30FPS_12BIT",
-	"SONY_IMX327_SUBLVDS_2M_30FPS_12BIT",
-	"SONY_IMX327_MIPI_2M_60FPS_12BIT",
-	"SONY_IMX334_MIPI_8M_30FPS_12BIT",
-	"SONY_IMX335_MIPI_4M_30FPS_12BIT",
-	"SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT",
-	"SONY_IMX335_2L_MIPI_4M_30FPS_10BIT",
-	"SONY_IMX335_MIPI_5M_30FPS_12BIT",
-	"SONY_IMX335_MIPI_2M_60FPS_10BIT",
-	"SONY_IMX335_MIPI_4M_60FPS_10BIT",
-	"SONY_IMX335_MIPI_5M_60FPS_10BIT",
-	"SONY_IMX347_MIPI_4M_60FPS_12BIT",
-	"SONY_IMX385_MIPI_2M_30FPS_12BIT",
-	"TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT",
-	"TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT",
-	"VIVO_MCS369_2M_30FPS_12BIT",
-	"VIVO_MCS369Q_4M_30FPS_12BIT",
-	"VIVO_MM308M2_2M_25FPS_8BIT",
-	/* ------ LINEAR END ------*/
-
-	/* ------ WDR 2TO1 BEGIN ------*/
-	"BRIGATES_BG0808_MIPI_2M_30FPS_10BIT_WDR2TO1",
-	"GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1",
-	"GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1",
-	"OV_OS04A10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1",
-	"OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1",
-	"OV_OS04C10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1",
-	"OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1",
-	"OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1",
-	"OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1",
-	"OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1",
-	"OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1",
-	"OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1",
-	"OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1",
-	"SMS_SC1346_1L_MIPI_1M_30FPS_10BIT_WDR2TO1",
-	"SMS_SC1346_1L_MIPI_1M_60FPS_10BIT_WDR2TO1",
-	"SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1",
-	"SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1",
-	"SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1",
-	"SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1",
-	"SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1",
-	"SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1",
-	"SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1",
-	"SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1",
-	"SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1",
-#ifdef FPGA_PORTING
-	"SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1",
-#endif
-	"SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1",
-	"SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1",
-	"SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1",
-	"SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1",
-	"SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1",
-	"SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1",
-	/* ------ WDR 2TO1 END ------*/
-};
-
-static SAMPLE_INI_CFG_S	stDefIniCfg = {
-	.enSource  = VI_PIPE_FRAME_SOURCE_DEV,
-	.devNum    = 1,
-	.enSnsType[0] = SONY_IMX327_MIPI_2M_30FPS_12BIT,
-	.enWDRMode[0] = WDR_MODE_NONE,
-	.s32BusId[0]  = 3,
-	.s32SnsI2cAddr[0] = -1,
-	.s32SnsI2cAddr[1] = -1,
-	.MipiDev[0]   = 0xFF,
-	.MipiDev[1]   = 0xFF,
-	.MipiDev[2]   = 0xFF,
-	.u8UseMultiSns = 0,
-};
-
-/*=== Source section parser handler begin === */
-static void parse_source_type(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	(CVI_VOID) param0;
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-
-	SAMPLE_PRT("source type =  %s\n", value);
-	if (strcmp(value, "SOURCE_USER_FE") == 0) {
-		cfg->enSource = VI_PIPE_FRAME_SOURCE_USER_FE;
-	}
-}
-
-static void parse_source_devnum(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	int devno = atoi(value);
-
-	(CVI_VOID) param0;
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-
-	SAMPLE_PRT("devNum =  %s\n", value);
-
-	if (devno >= 1 && devno <= VI_MAX_DEV_NUM)
-		cfg->devNum = devno;
-	else
-		cfg->devNum = 1;
-}
-/* === Source section parser handler end === */
-
-/* === Sensor section parser handler begin === */
-static int parse_lane_id(CVI_S16 *LaneId, const char *value)
-{
-	char buf[8];
-	int offset = 0, idx = 0, k;
-
-	for (k = 0; k < 30; k++) {
-		/* find next ',' */
-		if (value[k] == ',' || value[k] == '\0') {
-			if (k == offset) {
-				SAMPLE_PRT("lane_id parse error, is the format correct?\n");
-				return -1;
-			}
-			memset(buf, 0, sizeof(buf));
-			memcpy(buf, &value[offset], k - offset);
-			buf[k-offset] = '\0';
-			LaneId[idx++] = atoi(buf);
-			offset = k + 1;
-		}
-
-		if (value[k] == '\0' || idx == 5)
-			break;
-	}
-
-	if (k == 30) {
-		SAMPLE_PRT("lane_id parse error, is the format correct?\n");
-		return -1;
-	}
-
-	return 0;
-}
-
-static int parse_pn_swap(CVI_S8 *PNSwap, const char *value)
-{
-	char buf[8];
-	int offset = 0, idx = 0, k;
-
-	for (k = 0; k < 30; k++) {
-		/* find next ',' */
-		if (value[k] == ',' || value[k] == '\0') {
-			if (k == offset) {
-				SAMPLE_PRT("lane_id parse error, is the format correct?\n");
-				return -1;
-			}
-			memset(buf, 0, sizeof(buf));
-			memcpy(buf, &value[offset], k - offset);
-			buf[k-offset] = '\0';
-			PNSwap[idx++] = atoi(buf);
-			offset = k + 1;
-		}
-
-		if (value[k] == '\0' || idx == 5)
-			break;
-	}
-
-	if (k == 30) {
-		SAMPLE_PRT("lane_id parse error, is the format correct?\n");
-		return -1;
-	}
-
-	return 0;
-}
-
-static void parse_sensor_name(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-#define NAME_SIZE 20
-	CVI_U32 index = param0;
-	CVI_U32 i;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("sensor =  %s\n", value);
-	char sensorNameEnv[NAME_SIZE];
-
-	snprintf(sensorNameEnv, NAME_SIZE, "SENSORNAME%d", index);
-	setenv(sensorNameEnv, value, 1);
-
-	for (i = 0; i < SAMPLE_SNS_TYPE_BUTT; i++) {
-		if (strcmp(value, snsr_type_name[i]) == 0) {
-			cfg->enSnsType[index] = i;
-			cfg->enWDRMode[index] = (i < SAMPLE_SNS_TYPE_LINEAR_BUTT) ?
-				WDR_MODE_NONE : WDR_MODE_2To1_LINE;
-			break;
-		}
-	}
-	if (i == SAMPLE_SNS_TYPE_BUTT) {
-		cfg->enSnsType[index] = SONY_IMX327_MIPI_2M_30FPS_12BIT;
-		cfg->enWDRMode[index] = WDR_MODE_NONE;
-		cfg->u8UseMultiSns = index;
-	}
-}
-
-static void parse_sensor_busid(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("bus_id =  %s\n", value);
-	cfg->s32BusId[index] = atoi(value);
-}
-
-static void parse_sensor_i2caddr(SAMPLE_INI_CFG_S *cfg, const char *value,
-					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("sns_i2c_addr =  %s\n", value);
-	cfg->s32SnsI2cAddr[index] = atoi(value);
-}
-
-static void parse_sensor_mipidev(SAMPLE_INI_CFG_S *cfg, const char *value,
-					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("mipi_dev =  %s\n", value);
-	cfg->MipiDev[index] = atoi(value);
-}
-
-static void parse_sensor_laneid(SAMPLE_INI_CFG_S *cfg, const char *value,
-					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("Lane_id =  %s\n", value);
-	parse_lane_id(cfg->as16LaneId[index], value);
-}
-
-static void parse_sensor_pnswap(SAMPLE_INI_CFG_S *cfg, const char *value,
-					CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("pn_swap =  %s\n", value);
-	parse_pn_swap(cfg->as8PNSwap[index], value);
-}
-
-static void parse_sensor_hwsync(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("hw_sync =  %s\n", value);
-	cfg->u8HwSync[index] = atoi(value);
-}
-
-static void parse_sensor_mclken(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("mclk_en =  %s\n", value);
-	cfg->stMclkAttr[index].bMclkEn = atoi(value);
-}
-
-static void parse_sensor_mclk(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("mclk =  %s\n", value);
-	cfg->stMclkAttr[index].u8Mclk = atoi(value);
-}
-
-static void parse_sensor_orien(SAMPLE_INI_CFG_S *cfg, const char *value,
-				CVI_U32 param0, CVI_U32 param1, CVI_U32 param2)
-{
-	CVI_U32 index = param0;
-
-	(CVI_VOID) param1;
-	(CVI_VOID) param2;
-	SAMPLE_PRT("orien =  %s\n", value);
-	cfg->u8Orien[index] = atoi(value);
-}
-
-/* === Sensor section parser handler end === */
-typedef CVI_VOID(*parser)(SAMPLE_INI_CFG_S *cfg, const char *value,
-		CVI_U32 param0, CVI_U32 param1, CVI_U32 param2);
-
-typedef struct _INI_HDLR_S {
-	const char name[16];
-	CVI_U32 param0;
-	CVI_U32 param1;
-	CVI_U32 param2;
-	parser pfnJob;
-} INI_HDLR_S;
-
-typedef enum _INI_SOURCE_NAME_E {
-	INI_SOURCE_TYPE = 0,
-	INI_SOURCE_DEVNUM,
-	INI_SOURCE_NUM,
-} INI_SOURCE_NAME_E;
-
-typedef enum _INI_SENSOR_NAME_E {
-	INI_SENSOR_NAME = 0,
-	INI_SENSOR_BUSID,
-	INI_SENSOR_I2CADDR,
-	INI_SENSOR_MIPIDEV,
-	INI_SENSOR_LANEID,
-	INI_SENSOR_PNSWAP,
-	INI_SENSOR_HWSYNC,
-	INI_SENSOR_MCLKEN,
-	INI_SENSOR_MCLK,
-	INI_SENSOR_ORIEN,
-	INI_SENSOR_NUM,
-} INI_SENSOR_NAME_E;
-
-const INI_HDLR_S stSectionSource[INI_SOURCE_NUM] = {
-	[INI_SOURCE_TYPE] = {"type", 0, 0, 0, parse_source_type},
-	[INI_SOURCE_DEVNUM] = {"dev_num", 0, 0, 0, parse_source_devnum},
-};
-
-const INI_HDLR_S stSectionSensor1[INI_SENSOR_NUM] = {
-	[INI_SENSOR_NAME] = {"name", 0, 0, 0, parse_sensor_name},
-	[INI_SENSOR_BUSID] = {"bus_id", 0, 0, 0, parse_sensor_busid},
-	[INI_SENSOR_I2CADDR] = {"sns_i2c_addr", 0, 0, 0, parse_sensor_i2caddr},
-	[INI_SENSOR_MIPIDEV] = {"mipi_dev", 0, 0, 0, parse_sensor_mipidev},
-	[INI_SENSOR_LANEID] = {"lane_id", 0, 0, 0, parse_sensor_laneid},
-	[INI_SENSOR_PNSWAP] = {"pn_swap", 0, 0, 0, parse_sensor_pnswap},
-	[INI_SENSOR_HWSYNC] = {"hw_sync", 0, 0, 0, parse_sensor_hwsync},
-	[INI_SENSOR_MCLKEN] = {"mclk_en", 0, 0, 0, parse_sensor_mclken},
-	[INI_SENSOR_MCLK] = {"mclk", 0, 0, 0, parse_sensor_mclk},
-	[INI_SENSOR_ORIEN] = {"orien", 0, 0, 0, parse_sensor_orien},
-};
-
-const INI_HDLR_S stSectionSensor2[INI_SENSOR_NUM] = {
-	[INI_SENSOR_NAME] = {"name", 1, 0, 0, parse_sensor_name},
-	[INI_SENSOR_BUSID] = {"bus_id", 1, 0, 0, parse_sensor_busid},
-	[INI_SENSOR_I2CADDR] = {"sns_i2c_addr", 1, 0, 0, parse_sensor_i2caddr},
-	[INI_SENSOR_MIPIDEV] = {"mipi_dev", 1, 0, 0, parse_sensor_mipidev},
-	[INI_SENSOR_LANEID] = {"lane_id", 1, 0, 0, parse_sensor_laneid},
-	[INI_SENSOR_PNSWAP] = {"pn_swap", 1, 0, 0, parse_sensor_pnswap},
-	[INI_SENSOR_HWSYNC] = {"hw_sync", 1, 0, 0, parse_sensor_hwsync},
-	[INI_SENSOR_MCLKEN] = {"mclk_en", 1, 0, 0, parse_sensor_mclken},
-	[INI_SENSOR_MCLK] = {"mclk", 1, 0, 0, parse_sensor_mclk},
-	[INI_SENSOR_ORIEN] = {"orien", 1, 0, 0, parse_sensor_orien},
-};
-
-const INI_HDLR_S stSectionSensor3[INI_SENSOR_NUM] = {
-	[INI_SENSOR_NAME] = {"name", 2, 0, 0, parse_sensor_name},
-	[INI_SENSOR_BUSID] = {"bus_id", 2, 0, 0, parse_sensor_busid},
-	[INI_SENSOR_I2CADDR] = {"sns_i2c_addr", 2, 0, 0, parse_sensor_i2caddr},
-	[INI_SENSOR_MIPIDEV] = {"mipi_dev", 2, 0, 0, parse_sensor_mipidev},
-	[INI_SENSOR_LANEID] = {"lane_id", 2, 0, 0, parse_sensor_laneid},
-	[INI_SENSOR_PNSWAP] = {"pn_swap", 2, 0, 0, parse_sensor_pnswap},
-	[INI_SENSOR_HWSYNC] = {"hw_sync", 2, 0, 0, parse_sensor_hwsync},
-	[INI_SENSOR_MCLKEN] = {"mclk_en", 2, 0, 0, parse_sensor_mclken},
-	[INI_SENSOR_MCLK] = {"mclk", 2, 0, 0, parse_sensor_mclk},
-	[INI_SENSOR_ORIEN] = {"orien", 2, 0, 0, parse_sensor_orien},
-};
-
-static int parse_handler(void *user, const char *section, const char *name, const char *value)
-{
-	SAMPLE_INI_CFG_S *cfg = (SAMPLE_INI_CFG_S *)user;
-	const INI_HDLR_S *hdler;
-	int i, size;
-
-	if (strcmp(section, "source") == 0) {
-		hdler = stSectionSource;
-		size = INI_SOURCE_NUM;
-	} else if (strcmp(section, "sensor") == 0) {
-		hdler = stSectionSensor1;
-		size = INI_SENSOR_NUM;
-	} else if (strcmp(section, "sensor2") == 0) {
-		hdler = stSectionSensor2;
-		size = INI_SENSOR_NUM;
-	} else if (strcmp(section, "sensor3") == 0) {
-		hdler = stSectionSensor3;
-		size = INI_SENSOR_NUM;
-	} else {
-		/* unknown section/name */
-		return 1;
-	}
-	for (i = 0; i < size; i++) {
-		if (strcmp(name, hdler[i].name) == 0) {
-			hdler[i].pfnJob(cfg, value, hdler[i].param0,
-					hdler[i].param1, hdler[i].param2);
-			break;
-		}
-	}
-
-	return 1;
-}
-
-CVI_S32 SAMPLE_COMM_VI_SetIniPath(const CVI_CHAR *iniPath)
-{
-	int ret;
-
-	if (iniPath == NULL) {
-		SAMPLE_PRT("%s: null ptr\n", __func__);
-		ret = CVI_FAILURE;
-	} else if (strlen(iniPath) >= SNSCFGPATH_SIZE) {
-		SAMPLE_PRT("%s: SNSCFGPATH_SIZE is too small\n", __func__);
-		ret = CVI_FAILURE;
-	} else {
-		strncpy(g_snsCfgPath, iniPath, SNSCFGPATH_SIZE);
-		ret = CVI_SUCCESS;
-	}
-
-	return ret;
-}
-
-CVI_S32 SAMPLE_COMM_VI_ParseIni(SAMPLE_INI_CFG_S *pstIniCfg)
-{
-	int ret;
-#define INI_FILE_PATH	"/mnt/data/sensor_cfg.ini"
-#define INI_DEF_PATH	"/mnt/system/usr/bin/sensor_cfg.ini"
-
-	memcpy(pstIniCfg, &stDefIniCfg, sizeof(*pstIniCfg));
-	if (g_snsCfgPath[0] != 0) {
-		SAMPLE_PRT("Parse %s\n", g_snsCfgPath);
-		ret = ini_parse(g_snsCfgPath, parse_handler, pstIniCfg);
-		if (ret >= 0) {
-			return 1;
-		}
-		if (ret != -1) {
-			SAMPLE_PRT("Parse %s incomplete, use default cfg\n", INI_FILE_PATH);
-			return 0;
-		}
-
-		SAMPLE_PRT("%s Not Found\n", g_snsCfgPath);
-	}
-	SAMPLE_PRT("Parse %s\n", INI_FILE_PATH);
-	ret = ini_parse(INI_FILE_PATH, parse_handler, pstIniCfg);
-	if (ret >= 0) {
-		return 1;
-	}
-	if (ret != -1) {
-		SAMPLE_PRT("Parse %s incomplete, use default cfg\n", INI_FILE_PATH);
-		return 0;
-	}
-	SAMPLE_PRT("%s Not Found\n", INI_FILE_PATH);
-	SAMPLE_PRT("Parse %s\n", INI_DEF_PATH);
-
-	ret = ini_parse(INI_DEF_PATH, parse_handler, pstIniCfg);
-	if (ret < 0) {
-		if (ret == -1) {
-			SAMPLE_PRT("%s not exist, use default cfg\n", INI_DEF_PATH);
-		} else {
-			SAMPLE_PRT("Parse %s incomplete, use default cfg\n", INI_DEF_PATH);
-		}
-
-		return 0;
-	}
-
-	return 1;
-}
-
 /* Helper API to fill the stViConfig according to the pstIniCfg. */
 CVI_S32 SAMPLE_COMM_VI_IniToViCfg(SAMPLE_INI_CFG_S *pstIniCfg, SAMPLE_VI_CONFIG_S *pstViConfig)
 {
@@ -2228,10 +1154,4 @@ CVI_S32 SAMPLE_COMM_VI_DefaultConfig(CVI_VOID)
 	}
 
 	return s32Ret;
-}
-
-CVI_CHAR *SAMPLE_COMM_VI_GetSnsrTypeName(void)
-{
-	return (CVI_CHAR *)snsr_type_name;
-}
-
+}
\ No newline at end of file