From cbb030f19f4d2650dd5c00dbf480e2b6f5e17a6f Mon Sep 17 00:00:00 2001 From: "sam.xiang" Date: Thu, 23 Feb 2023 11:39:27 +0800 Subject: [PATCH] [freertos] add freertos firmware Change-Id: I4158d66d9b5fc444e28287f55e79ac24e0a1666f --- freertos/cvitek/build_cv180x.sh | 24 + freertos/cvitek/build_cv181x.sh | 24 + freertos/cvitek/install/bin/cvirtos.bin | Bin 0 -> 78304 bytes freertos/cvitek/install/bin/cvirtos.dis | 28685 ++++++++++++++++ freertos/cvitek/install/bin/cvirtos.elf | Bin 0 -> 767560 bytes freertos/cvitek/install/bin/cvirtos.map | 3510 ++ .../cvitek/install/include/arch/arch_cpu.h | 14 + .../install/include/arch/arch_helpers.h | 12 + .../cvitek/install/include/arch/arch_sleep.h | 7 + .../cvitek/install/include/arch/arch_time.h | 12 + .../cvitek/install/include/arch/core_rv64.h | 1068 + .../cvitek/install/include/arch/csi_core.h | 54 + .../install/include/arch/csi_rv64_gcc.h | 2819 ++ freertos/cvitek/install/include/arch/csr.h | 83 + freertos/cvitek/install/include/arch/io.h | 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freertos/cvitek/task/vip/include/vip_main.h create mode 100644 freertos/cvitek/task/vip/src/cv181x/vip_main.c create mode 100644 freertos/cvitek/task/vip/src/cv1835/vip_main.c diff --git a/freertos/cvitek/build_cv180x.sh b/freertos/cvitek/build_cv180x.sh new file mode 100755 index 000000000..ae31e437d --- /dev/null +++ b/freertos/cvitek/build_cv180x.sh @@ -0,0 +1,24 @@ +#!/bin/bash +set -e + TOP_DIR="$( cd "$(dirname "$0")" ; pwd -P )" + TOOLCHAIN_FILE_PATH=$TOP_DIR/scripts/toolchain-riscv64-elf.cmake + BUILD_FREERTOS_PATH=$TOP_DIR/build + BUILD_ENV_PATH=$BUILD_PATH + INSTALL_PATH=$TOP_DIR/install + RUN_TYPE=CVIRTOS +RUN_CHIP=cv180x +RUN_ARCH=riscv64 + if [ ! -e $BUILD_FREERTOS_PATH/task ]; then + mkdir -p $BUILD_FREERTOS_PATH/task + fi + if [ -f $TOP_DIR/task/isp/libisp.a ]; then + mkdir -p $BUILD_FREERTOS_PATH/task/isp + cp $TOP_DIR/task/isp/libisp.a $BUILD_FREERTOS_PATH/task/isp + cp $TOP_DIR/task/isp/libisp.a $INSTALL_PATH/lib/ + fi + pushd $BUILD_FREERTOS_PATH/task + cmake -G Ninja -DCHIP=$RUN_CHIP -DRUN_ARCH=$RUN_ARCH -DRUN_TYPE=$RUN_TYPE -DTOP_DIR=$TOP_DIR -DBUILD_ENV_PATH=$BUILD_ENV_PATH -DBOARD_FPGA=n -DCMAKE_TOOLCHAIN_FILE=$TOOLCHAIN_FILE_PATH $TOP_DIR/task + cmake --build . --target install -- -v + cmake --build . --target cvirtos.bin -- -v + popd + cp $TOP_DIR/install/bin/cvirtos.bin ../cvirtos.bin diff --git a/freertos/cvitek/build_cv181x.sh b/freertos/cvitek/build_cv181x.sh new file mode 100755 index 000000000..12f990e05 --- /dev/null +++ b/freertos/cvitek/build_cv181x.sh @@ -0,0 +1,24 @@ +#!/bin/bash +set -e + TOP_DIR="$( cd "$(dirname "$0")" ; pwd -P )" + TOOLCHAIN_FILE_PATH=$TOP_DIR/scripts/toolchain-riscv64-elf.cmake + BUILD_FREERTOS_PATH=$TOP_DIR/build + BUILD_ENV_PATH=$BUILD_PATH + INSTALL_PATH=$TOP_DIR/install + RUN_TYPE=CVIRTOS +RUN_CHIP=cv181x +RUN_ARCH=riscv64 + if [ ! -e $BUILD_FREERTOS_PATH/task ]; then + mkdir -p $BUILD_FREERTOS_PATH/task + fi + if [ -f $TOP_DIR/task/isp/libisp.a ]; then + mkdir -p $BUILD_FREERTOS_PATH/task/isp + cp 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zZ12fM^Ro~0HOqcBXjkMrEdFQA{aA#b>eQ(h3J4G0Df3kcCsX2gG5&*}OB)yO{{X#U B=lcKv literal 0 HcmV?d00001 diff --git a/freertos/cvitek/install/bin/cvirtos.dis b/freertos/cvitek/install/bin/cvirtos.dis new file mode 100644 index 000000000..709e2b672 --- /dev/null +++ b/freertos/cvitek/install/bin/cvirtos.dis @@ -0,0 +1,28685 @@ + +/data/sam/proj_aiot/wanmosi/rls_sdk/sophpi-duo/sophpi-duo/cvi_mmf_sdk/freertos/cvitek/install/bin/cvirtos.elf: file format elf64-littleriscv + + +Disassembly of section .text: + +0000000083f40000 <_start>: + 83f40000: f1402573 csrr a0,mhartid + 83f40004: 4581 li a1,0 + 83f40006: 0eb51a63 bne a0,a1,83f400fa + 83f4000a: 4081 li ra,0 + 83f4000c: 4101 li sp,0 + 83f4000e: 4181 li gp,0 + 83f40010: 4201 li tp,0 + 83f40012: 4281 li t0,0 + 83f40014: 4301 li t1,0 + 83f40016: 4381 li t2,0 + 83f40018: 4401 li s0,0 + 83f4001a: 4481 li s1,0 + 83f4001c: 4501 li a0,0 + 83f4001e: 4581 li a1,0 + 83f40020: 4601 li a2,0 + 83f40022: 4681 li a3,0 + 83f40024: 4701 li a4,0 + 83f40026: 4781 li a5,0 + 83f40028: 4801 li a6,0 + 83f4002a: 4881 li a7,0 + 83f4002c: 4901 li s2,0 + 83f4002e: 4981 li s3,0 + 83f40030: 4a01 li s4,0 + 83f40032: 4a81 li s5,0 + 83f40034: 4b01 li s6,0 + 83f40036: 4b81 li s7,0 + 83f40038: 4c01 li s8,0 + 83f4003a: 4c81 li s9,0 + 83f4003c: 4d01 li s10,0 + 83f4003e: 4d81 li s11,0 + 83f40040: 4e01 li t3,0 + 83f40042: 4e81 li t4,0 + 83f40044: 4f01 li t5,0 + 83f40046: 4f81 li t6,0 + 83f40048: 000011b7 lui gp,0x1 + 83f4004c: 8801819b addiw gp,gp,-1920 + 83f40050: 30419073 csrw mie,gp + 83f40054: 000301b7 lui gp,0x30 + 83f40058: 0131819b addiw gp,gp,19 + 83f4005c: 7c21a073 csrs mcor,gp + 83f40060: 07f00193 li gp,127 + 83f40064: 7c11a073 csrs mhcr,gp + 83f40068: 000061b7 lui gp,0x6 + 83f4006c: 10c1819b addiw gp,gp,268 + 83f40070: 7c51a073 csrs mhint,gp + 83f40074: 6189 lui gp,0x2 + 83f40076: 3001a073 csrs mstatus,gp + 83f4007a: 000c0117 auipc sp,0xc0 + 83f4007e: cc610113 addi sp,sp,-826 # 83fffd40 <_end> + 83f40082: 00012517 auipc a0,0x12 + 83f40086: 6fe50513 addi a0,a0,1790 # 83f52780 <_data_lma> + 83f4008a: 00012597 auipc a1,0x12 + 83f4008e: 6f658593 addi a1,a1,1782 # 83f52780 <_data_lma> + 83f40092: 00013617 auipc a2,0x13 + 83f40096: 14e60613 addi a2,a2,334 # 83f531e0 <_edata> + 83f4009a: 00c5fa63 bgeu a1,a2,83f400ae <_start+0xae> + 83f4009e: 00053283 ld t0,0(a0) + 83f400a2: 0055b023 sd t0,0(a1) + 83f400a6: 0521 addi a0,a0,8 + 83f400a8: 05a1 addi a1,a1,8 + 83f400aa: fec5eae3 bltu a1,a2,83f4009e <_start+0x9e> + 83f400ae: 00013517 auipc a0,0x13 + 83f400b2: 15250513 addi a0,a0,338 # 83f53200 <__data1_end> + 83f400b6: 00020597 auipc a1,0x20 + 83f400ba: c8a58593 addi a1,a1,-886 # 83f5fd40 <_ebss> + 83f400be: 02b57663 bgeu a0,a1,83f400ea <_start+0xea> + 83f400c2: 00053023 sd zero,0(a0) + 83f400c6: 00053423 sd zero,8(a0) + 83f400ca: 00053823 sd zero,16(a0) + 83f400ce: 00053c23 sd zero,24(a0) + 83f400d2: 02053023 sd zero,32(a0) + 83f400d6: 02053423 sd zero,40(a0) + 83f400da: 02053823 sd zero,48(a0) + 83f400de: 02053c23 sd zero,56(a0) + 83f400e2: 04050513 addi a0,a0,64 + 83f400e6: fcb56ee3 bltu a0,a1,83f400c2 <_start+0xc2> + 83f400ea: 4501 li a0,0 + 83f400ec: 4581 li a1,0 + 83f400ee: 4601 li a2,0 + 83f400f0: 531020ef jal ra,83f42e20
+ 83f400f4: 10500073 wfi + 83f400f8: bff5 j 83f400f4 <_start+0xf4> + +0000000083f400fa : + 83f400fa: 10500073 wfi + 83f400fe: bff5 j 83f400fa + +0000000083f40100 : + 83f40100: 8faa mv t6,a0 + 83f40102: 08063693 sltiu a3,a2,128 + 83f40106: eedd bnez a3,83f401c4 + 83f40108: 007ff693 andi a3,t6,7 + 83f4010c: 0075f713 andi a4,a1,7 + 83f40110: 0ae69a63 bne a3,a4,83f401c4 + 83f40114: ce99 beqz a3,83f40132 + 83f40116: ff85f693 andi a3,a1,-8 + 83f4011a: 06a1 addi a3,a3,8 + 83f4011c: 40b68733 sub a4,a3,a1 + 83f40120: 00058783 lb a5,0(a1) + 83f40124: 0585 addi a1,a1,1 + 83f40126: 00ff8023 sb a5,0(t6) + 83f4012a: 0f85 addi t6,t6,1 + 83f4012c: fed5eae3 bltu a1,a3,83f40120 + 83f40130: 8e19 sub a2,a2,a4 + 83f40132: f8067713 andi a4,a2,-128 + 83f40136: c759 beqz a4,83f401c4 + 83f40138: 00e586b3 add a3,a1,a4 + 83f4013c: 6198 ld a4,0(a1) + 83f4013e: 659c ld a5,8(a1) + 83f40140: 0105b803 ld a6,16(a1) + 83f40144: 0185b883 ld a7,24(a1) + 83f40148: 0205b283 ld t0,32(a1) + 83f4014c: 0285b303 ld t1,40(a1) + 83f40150: 0305b383 ld t2,48(a1) + 83f40154: 0385be03 ld t3,56(a1) + 83f40158: 0405be83 ld t4,64(a1) + 83f4015c: 0485bf03 ld t5,72(a1) + 83f40160: 00efb023 sd a4,0(t6) + 83f40164: 00ffb423 sd a5,8(t6) + 83f40168: 010fb823 sd a6,16(t6) + 83f4016c: 011fbc23 sd a7,24(t6) + 83f40170: 025fb023 sd t0,32(t6) + 83f40174: 026fb423 sd t1,40(t6) + 83f40178: 027fb823 sd t2,48(t6) + 83f4017c: 03cfbc23 sd t3,56(t6) + 83f40180: 05dfb023 sd t4,64(t6) + 83f40184: 05efb423 sd t5,72(t6) + 83f40188: 69b8 ld a4,80(a1) + 83f4018a: 6dbc ld a5,88(a1) + 83f4018c: 0605b803 ld a6,96(a1) + 83f40190: 0685b883 ld a7,104(a1) + 83f40194: 0705b283 ld t0,112(a1) + 83f40198: 0785b303 ld t1,120(a1) + 83f4019c: 08058593 addi a1,a1,128 + 83f401a0: 04efb823 sd a4,80(t6) + 83f401a4: 04ffbc23 sd a5,88(t6) + 83f401a8: 070fb023 sd a6,96(t6) + 83f401ac: 071fb423 sd a7,104(t6) + 83f401b0: 065fb823 sd t0,112(t6) + 83f401b4: 066fbc23 sd t1,120(t6) + 83f401b8: 080f8f93 addi t6,t6,128 + 83f401bc: f8d5e0e3 bltu a1,a3,83f4013c + 83f401c0: 07f67613 andi a2,a2,127 + 83f401c4: ca05 beqz a2,83f401f4 + 83f401c6: 00c586b3 add a3,a1,a2 + 83f401ca: 01f5e7b3 or a5,a1,t6 + 83f401ce: 8fd5 or a5,a5,a3 + 83f401d0: 8b8d andi a5,a5,3 + 83f401d2: eb89 bnez a5,83f401e4 + 83f401d4: 4198 lw a4,0(a1) + 83f401d6: 0591 addi a1,a1,4 + 83f401d8: 00efa023 sw a4,0(t6) + 83f401dc: 0f91 addi t6,t6,4 + 83f401de: fed5ebe3 bltu a1,a3,83f401d4 + 83f401e2: 8082 ret + 83f401e4: 00058703 lb a4,0(a1) + 83f401e8: 0585 addi a1,a1,1 + 83f401ea: 00ef8023 sb a4,0(t6) + 83f401ee: 0f85 addi t6,t6,1 + 83f401f0: fed5eae3 bltu a1,a3,83f401e4 + 83f401f4: 8082 ret + ... + +0000000083f40200 : + 83f40200: 7151 addi sp,sp,-240 + 83f40202: e406 sd ra,8(sp) + 83f40204: e816 sd t0,16(sp) + 83f40206: ec1a sd t1,24(sp) + 83f40208: f01e sd t2,32(sp) + 83f4020a: f422 sd s0,40(sp) + 83f4020c: f826 sd s1,48(sp) + 83f4020e: fc2a sd a0,56(sp) + 83f40210: e0ae sd a1,64(sp) + 83f40212: e4b2 sd a2,72(sp) + 83f40214: e8b6 sd a3,80(sp) + 83f40216: ecba sd a4,88(sp) + 83f40218: f0be sd a5,96(sp) + 83f4021a: f4c2 sd a6,104(sp) + 83f4021c: f8c6 sd a7,112(sp) + 83f4021e: fcca sd s2,120(sp) + 83f40220: e14e sd s3,128(sp) + 83f40222: e552 sd s4,136(sp) + 83f40224: e956 sd s5,144(sp) + 83f40226: ed5a sd s6,152(sp) + 83f40228: f15e sd s7,160(sp) + 83f4022a: f562 sd s8,168(sp) + 83f4022c: f966 sd s9,176(sp) + 83f4022e: fd6a sd s10,184(sp) + 83f40230: e1ee sd s11,192(sp) + 83f40232: e5f2 sd t3,200(sp) + 83f40234: e9f6 sd t4,208(sp) + 83f40236: edfa sd t5,216(sp) + 83f40238: f1fe sd t6,224(sp) + 83f4023a: 300022f3 csrr t0,mstatus + 83f4023e: f596 sd t0,232(sp) + 83f40240: 716d addi sp,sp,-272 + 83f40242: a402 fsd ft0,8(sp) + 83f40244: a806 fsd ft1,16(sp) + 83f40246: ac0a fsd ft2,24(sp) + 83f40248: b00e fsd ft3,32(sp) + 83f4024a: b412 fsd ft4,40(sp) + 83f4024c: b816 fsd ft5,48(sp) + 83f4024e: bc1a fsd ft6,56(sp) + 83f40250: a09e fsd ft7,64(sp) + 83f40252: a4a2 fsd fs0,72(sp) + 83f40254: a8a6 fsd fs1,80(sp) + 83f40256: acaa fsd fa0,88(sp) + 83f40258: b0ae fsd fa1,96(sp) + 83f4025a: b4b2 fsd fa2,104(sp) + 83f4025c: b8b6 fsd fa3,112(sp) + 83f4025e: bcba fsd fa4,120(sp) + 83f40260: a13e fsd fa5,128(sp) + 83f40262: a542 fsd fa6,136(sp) + 83f40264: a946 fsd fa7,144(sp) + 83f40266: ad4a fsd fs2,152(sp) + 83f40268: b14e fsd fs3,160(sp) + 83f4026a: b552 fsd fs4,168(sp) + 83f4026c: b956 fsd fs5,176(sp) + 83f4026e: bd5a fsd fs6,184(sp) + 83f40270: a1de fsd fs7,192(sp) + 83f40272: a5e2 fsd fs8,200(sp) + 83f40274: a9e6 fsd fs9,208(sp) + 83f40276: adea fsd fs10,216(sp) + 83f40278: b1ee fsd fs11,224(sp) + 83f4027a: b5f2 fsd ft8,232(sp) + 83f4027c: b9f6 fsd ft9,240(sp) + 83f4027e: bdfa fsd ft10,248(sp) + 83f40280: a27e fsd ft11,256(sp) + 83f40282: 003022f3 frsr t0 + 83f40286: e616 sd t0,264(sp) + 83f40288: 00020297 auipc t0,0x20 + 83f4028c: a002b283 ld t0,-1536(t0) # 83f5fc88 + 83f40290: 0022b023 sd sp,0(t0) + 83f40294: 34202573 csrr a0,mcause + 83f40298: 341025f3 csrr a1,mepc + +0000000083f4029c : + 83f4029c: 03f55613 srli a2,a0,0x3f + 83f402a0: c62d beqz a2,83f4030a + 83f402a2: e02e sd a1,0(sp) + +0000000083f402a4 : + 83f402a4: 00100293 li t0,1 + 83f402a8: 12fe slli t0,t0,0x3f + 83f402aa: 00728313 addi t1,t0,7 + 83f402ae: 04651463 bne a0,t1,83f402f6 + 83f402b2: 00020297 auipc t0,0x20 + 83f402b6: a762b283 ld t0,-1418(t0) # 83f5fd28 + 83f402ba: 00013317 auipc t1,0x13 + 83f402be: f1e33303 ld t1,-226(t1) # 83f531d8 + 83f402c2: 00033383 ld t2,0(t1) + 83f402c6: 0072a023 sw t2,0(t0) + 83f402ca: 0203de13 srli t3,t2,0x20 + 83f402ce: 01c2a223 sw t3,4(t0) + 83f402d2: 00012297 auipc t0,0x12 + 83f402d6: 1b62b283 ld t0,438(t0) # 83f52488 + 83f402da: 00728eb3 add t4,t0,t2 + 83f402de: 01d33023 sd t4,0(t1) + 83f402e2: 00012117 auipc sp,0x12 + 83f402e6: 1ae13103 ld sp,430(sp) # 83f52490 + 83f402ea: 1660f0ef jal ra,83f4f450 + 83f402ee: c521 beqz a0,83f40336 + 83f402f0: 18c0f0ef jal ra,83f4f47c + 83f402f4: a089 j 83f40336 + +0000000083f402f6 : + 83f402f6: 0311 addi t1,t1,4 + 83f402f8: 02651c63 bne a0,t1,83f40330 + 83f402fc: 00012117 auipc sp,0x12 + 83f40300: 19413103 ld sp,404(sp) # 83f52490 + 83f40304: 2240c0ef jal ra,83f4c528 + 83f40308: a03d j 83f40336 + +0000000083f4030a : + 83f4030a: 0591 addi a1,a1,4 + 83f4030c: e02e sd a1,0(sp) + +0000000083f4030e : + 83f4030e: 42ad li t0,11 + 83f40310: 00551963 bne a0,t0,83f40322 + 83f40314: 00012117 auipc sp,0x12 + 83f40318: 17c13103 ld sp,380(sp) # 83f52490 + 83f4031c: 1600f0ef jal ra,83f4f47c + 83f40320: a819 j 83f40336 + +0000000083f40322 : + 83f40322: 342022f3 csrr t0,mcause + 83f40326: 34102373 csrr t1,mepc + 83f4032a: 300023f3 csrr t2,mstatus + 83f4032e: bfd5 j 83f40322 + +0000000083f40330 : + 83f40330: 342022f3 csrr t0,mcause + 83f40334: bff5 j 83f40330 + +0000000083f40336 : + 83f40336: 00020317 auipc t1,0x20 + 83f4033a: 95233303 ld t1,-1710(t1) # 83f5fc88 + 83f4033e: 00033103 ld sp,0(t1) + 83f40342: 6282 ld t0,0(sp) + 83f40344: 34129073 csrw mepc,t0 + 83f40348: 2022 fld ft0,8(sp) + 83f4034a: 20c2 fld ft1,16(sp) + 83f4034c: 2162 fld ft2,24(sp) + 83f4034e: 3182 fld ft3,32(sp) + 83f40350: 3222 fld ft4,40(sp) + 83f40352: 32c2 fld ft5,48(sp) + 83f40354: 3362 fld ft6,56(sp) + 83f40356: 2386 fld ft7,64(sp) + 83f40358: 2426 fld fs0,72(sp) + 83f4035a: 24c6 fld fs1,80(sp) + 83f4035c: 2566 fld fa0,88(sp) + 83f4035e: 3586 fld fa1,96(sp) + 83f40360: 3626 fld fa2,104(sp) + 83f40362: 36c6 fld fa3,112(sp) + 83f40364: 3766 fld fa4,120(sp) + 83f40366: 278a fld fa5,128(sp) + 83f40368: 282a fld fa6,136(sp) + 83f4036a: 28ca fld fa7,144(sp) + 83f4036c: 296a fld fs2,152(sp) + 83f4036e: 398a fld fs3,160(sp) + 83f40370: 3a2a fld fs4,168(sp) + 83f40372: 3aca fld fs5,176(sp) + 83f40374: 3b6a fld fs6,184(sp) + 83f40376: 2b8e fld fs7,192(sp) + 83f40378: 2c2e fld fs8,200(sp) + 83f4037a: 2cce fld fs9,208(sp) + 83f4037c: 2d6e fld fs10,216(sp) + 83f4037e: 3d8e fld fs11,224(sp) + 83f40380: 3e2e fld ft8,232(sp) + 83f40382: 3ece fld ft9,240(sp) + 83f40384: 3f6e fld ft10,248(sp) + 83f40386: 2f92 fld ft11,256(sp) + 83f40388: 62b2 ld t0,264(sp) + 83f4038a: 00329073 fssr t0 + 83f4038e: 6151 addi sp,sp,272 + 83f40390: 72ae ld t0,232(sp) + 83f40392: 30029073 csrw mstatus,t0 + 83f40396: 60a2 ld ra,8(sp) + 83f40398: 62c2 ld t0,16(sp) + 83f4039a: 6362 ld t1,24(sp) + 83f4039c: 7382 ld t2,32(sp) + 83f4039e: 7422 ld s0,40(sp) + 83f403a0: 74c2 ld s1,48(sp) + 83f403a2: 7562 ld a0,56(sp) + 83f403a4: 6586 ld a1,64(sp) + 83f403a6: 6626 ld a2,72(sp) + 83f403a8: 66c6 ld a3,80(sp) + 83f403aa: 6766 ld a4,88(sp) + 83f403ac: 7786 ld a5,96(sp) + 83f403ae: 7826 ld a6,104(sp) + 83f403b0: 78c6 ld a7,112(sp) + 83f403b2: 7966 ld s2,120(sp) + 83f403b4: 698a ld s3,128(sp) + 83f403b6: 6a2a ld s4,136(sp) + 83f403b8: 6aca ld s5,144(sp) + 83f403ba: 6b6a ld s6,152(sp) + 83f403bc: 7b8a ld s7,160(sp) + 83f403be: 7c2a ld s8,168(sp) + 83f403c0: 7cca ld s9,176(sp) + 83f403c2: 7d6a ld s10,184(sp) + 83f403c4: 6d8e ld s11,192(sp) + 83f403c6: 6e2e ld t3,200(sp) + 83f403c8: 6ece ld t4,208(sp) + 83f403ca: 6f6e ld t5,216(sp) + 83f403cc: 7f8e ld t6,224(sp) + 83f403ce: 616d addi sp,sp,240 + 83f403d0: 30200073 mret + 83f403d4: 00000013 nop + 83f403d8: 00000013 nop + 83f403dc: 00000013 nop + 83f403e0: 00000013 nop + 83f403e4: 00000013 nop + 83f403e8: 00000013 nop + 83f403ec: 00000013 nop + 83f403f0: 00000013 nop + 83f403f4: 00000013 nop + 83f403f8: 00000013 nop + 83f403fc: 00000013 nop + +0000000083f40400 : + 83f40400: 00000297 auipc t0,0x0 + 83f40404: e0028293 addi t0,t0,-512 # 83f40200 + 83f40408: 30529073 csrw mtvec,t0 + 83f4040c: 00020117 auipc sp,0x20 + 83f40410: 87c13103 ld sp,-1924(sp) # 83f5fc88 + 83f40414: 6102 ld sp,0(sp) + 83f40416: 6082 ld ra,0(sp) + 83f40418: 2022 fld ft0,8(sp) + 83f4041a: 20c2 fld ft1,16(sp) + 83f4041c: 2162 fld ft2,24(sp) + 83f4041e: 3182 fld ft3,32(sp) + 83f40420: 3222 fld ft4,40(sp) + 83f40422: 32c2 fld ft5,48(sp) + 83f40424: 3362 fld ft6,56(sp) + 83f40426: 2386 fld ft7,64(sp) + 83f40428: 2426 fld fs0,72(sp) + 83f4042a: 24c6 fld fs1,80(sp) + 83f4042c: 2566 fld fa0,88(sp) + 83f4042e: 3586 fld fa1,96(sp) + 83f40430: 3626 fld fa2,104(sp) + 83f40432: 36c6 fld fa3,112(sp) + 83f40434: 3766 fld fa4,120(sp) + 83f40436: 278a fld fa5,128(sp) + 83f40438: 282a fld fa6,136(sp) + 83f4043a: 28ca fld fa7,144(sp) + 83f4043c: 296a fld fs2,152(sp) + 83f4043e: 398a fld fs3,160(sp) + 83f40440: 3a2a fld fs4,168(sp) + 83f40442: 3aca fld fs5,176(sp) + 83f40444: 3b6a fld fs6,184(sp) + 83f40446: 2b8e fld fs7,192(sp) + 83f40448: 2c2e fld fs8,200(sp) + 83f4044a: 2cce fld fs9,208(sp) + 83f4044c: 2d6e fld fs10,216(sp) + 83f4044e: 3d8e fld fs11,224(sp) + 83f40450: 3e2e fld ft8,232(sp) + 83f40452: 3ece fld ft9,240(sp) + 83f40454: 3f6e fld ft10,248(sp) + 83f40456: 2f92 fld ft11,256(sp) + 83f40458: 62b2 ld t0,264(sp) + 83f4045a: 00329073 fssr t0 + 83f4045e: 6151 addi sp,sp,272 + 83f40460: 6362 ld t1,24(sp) + 83f40462: 7382 ld t2,32(sp) + 83f40464: 7422 ld s0,40(sp) + 83f40466: 74c2 ld s1,48(sp) + 83f40468: 7562 ld a0,56(sp) + 83f4046a: 6586 ld a1,64(sp) + 83f4046c: 6626 ld a2,72(sp) + 83f4046e: 66c6 ld a3,80(sp) + 83f40470: 6766 ld a4,88(sp) + 83f40472: 7786 ld a5,96(sp) + 83f40474: 7826 ld a6,104(sp) + 83f40476: 78c6 ld a7,112(sp) + 83f40478: 7966 ld s2,120(sp) + 83f4047a: 698a ld s3,128(sp) + 83f4047c: 6a2a ld s4,136(sp) + 83f4047e: 6aca ld s5,144(sp) + 83f40480: 6b6a ld s6,152(sp) + 83f40482: 7b8a ld s7,160(sp) + 83f40484: 7c2a ld s8,168(sp) + 83f40486: 7cca ld s9,176(sp) + 83f40488: 7d6a ld s10,184(sp) + 83f4048a: 6d8e ld s11,192(sp) + 83f4048c: 6e2e ld t3,200(sp) + 83f4048e: 6ece ld t4,208(sp) + 83f40490: 6f6e ld t5,216(sp) + 83f40492: 7f8e ld t6,224(sp) + 83f40494: 72ae ld t0,232(sp) + 83f40496: 02a1 addi t0,t0,8 + 83f40498: 30029073 csrw mstatus,t0 + 83f4049c: 62c2 ld t0,16(sp) + 83f4049e: 616d addi sp,sp,240 + 83f404a0: 8082 ret + 83f404a2: 00000013 nop + 83f404a6: 00000013 nop + 83f404aa: 00000013 nop + 83f404ae: 00000013 nop + 83f404b2: 00000013 nop + 83f404b6: 00000013 nop + 83f404ba: 00000013 nop + 83f404be: 00000013 nop + 83f404c2: 00000013 nop + 83f404c6: 00000013 nop + 83f404ca: 00000013 nop + 83f404ce: 00000013 nop + 83f404d2: 00000013 nop + 83f404d6: 00000013 nop + 83f404da: 00000013 nop + 83f404de: 00000013 nop + 83f404e2: 00000013 nop + 83f404e6: 00000013 nop + 83f404ea: 00000013 nop + 83f404ee: 00000013 nop + 83f404f2: 00000013 nop + 83f404f6: 00000013 nop + 83f404fa: 00000013 nop + 83f404fe: 0001 nop + +0000000083f40500 : + 83f40500: 300022f3 csrr t0,mstatus + 83f40504: ff72f293 andi t0,t0,-9 + 83f40508: 18800313 li t1,392 + 83f4050c: 0312 slli t1,t1,0x4 + 83f4050e: 0062e2b3 or t0,t0,t1 + 83f40512: 1561 addi a0,a0,-8 + 83f40514: 00553023 sd t0,0(a0) + 83f40518: f5050513 addi a0,a0,-176 + 83f4051c: e110 sd a2,0(a0) + 83f4051e: fd050513 addi a0,a0,-48 + 83f40522: 00053023 sd zero,0(a0) + 83f40526: 02200293 li t0,34 + +0000000083f4052a : + 83f4052a: 00028763 beqz t0,83f40538 + 83f4052e: 1561 addi a0,a0,-8 + 83f40530: 00053023 sd zero,0(a0) + 83f40534: 12fd addi t0,t0,-1 + 83f40536: bfd5 j 83f4052a + 83f40538: 1561 addi a0,a0,-8 + 83f4053a: e10c sd a1,0(a0) + 83f4053c: 8082 ret + ... + +0000000083f40590 : + 83f40590: e20507d3 fmv.x.d a5,fa0 + 83f40594: 1101 addi sp,sp,-32 + 83f40596: e426 sd s1,8(sp) + 83f40598: 4207d493 srai s1,a5,0x20 + 83f4059c: e822 sd s0,16(sp) + 83f4059e: 02149413 slli s0,s1,0x21 + 83f405a2: ec06 sd ra,24(sp) + 83f405a4: 44100737 lui a4,0x44100 + 83f405a8: 9005 srli s0,s0,0x21 + 83f405aa: 02e44f63 blt s0,a4,83f405e8 + 83f405ae: 7ff00737 lui a4,0x7ff00 + 83f405b2: 02874263 blt a4,s0,83f405d6 + 83f405b6: 00e40d63 beq s0,a4,83f405d0 + 83f405ba: 12905663 blez s1,83f406e6 + 83f405be: 60e2 ld ra,24(sp) + 83f405c0: 6442 ld s0,16(sp) + 83f405c2: 64a2 ld s1,8(sp) + 83f405c4: 00012797 auipc a5,0x12 + 83f405c8: e447b507 fld fa0,-444(a5) # 83f52408 <__func__.1+0x210> + 83f405cc: 6105 addi sp,sp,32 + 83f405ce: 8082 ret + 83f405d0: 0007869b sext.w a3,a5 + 83f405d4: d2fd beqz a3,83f405ba + 83f405d6: f20787d3 fmv.d.x fa5,a5 + 83f405da: 02f7f553 fadd.d fa0,fa5,fa5 + 83f405de: 60e2 ld ra,24(sp) + 83f405e0: 6442 ld s0,16(sp) + 83f405e2: 64a2 ld s1,8(sp) + 83f405e4: 6105 addi sp,sp,32 + 83f405e6: 8082 ret + 83f405e8: 3fdc0737 lui a4,0x3fdc0 + 83f405ec: 10e45663 bge s0,a4,83f406f8 + 83f405f0: 3e200737 lui a4,0x3e200 + 83f405f4: 0ce44b63 blt s0,a4,83f406ca + 83f405f8: 577d li a4,-1 + 83f405fa: f20786d3 fmv.d.x fa3,a5 + 83f405fe: 00012697 auipc a3,0x12 + 83f40602: ec26b787 fld fa5,-318(a3) # 83f524c0 + 83f40606: 00012697 auipc a3,0x12 + 83f4060a: ec26b507 fld fa0,-318(a3) # 83f524c8 + 83f4060e: 12d6f653 fmul.d fa2,fa3,fa3 + 83f40612: 00012697 auipc a3,0x12 + 83f40616: ede6b707 fld fa4,-290(a3) # 83f524f0 + 83f4061a: 00012697 auipc a3,0x12 + 83f4061e: ede6b307 fld ft6,-290(a3) # 83f524f8 + 83f40622: 00012697 auipc a3,0x12 + 83f40626: eae6b287 fld ft5,-338(a3) # 83f524d0 + 83f4062a: 00012697 auipc a3,0x12 + 83f4062e: ed66b207 fld ft4,-298(a3) # 83f52500 + 83f40632: 00012697 auipc a3,0x12 + 83f40636: ea66b187 fld ft3,-346(a3) # 83f524d8 + 83f4063a: 00012697 auipc a3,0x12 + 83f4063e: ece6b107 fld ft2,-306(a3) # 83f52508 + 83f40642: 12c676d3 fmul.d fa3,fa2,fa2 + 83f40646: 00012697 auipc a3,0x12 + 83f4064a: e9a6b087 fld ft1,-358(a3) # 83f524e0 + 83f4064e: 00012697 auipc a3,0x12 + 83f40652: ec26b007 fld ft0,-318(a3) # 83f52510 + 83f40656: 00012697 auipc a3,0x12 + 83f4065a: e926b587 fld fa1,-366(a3) # 83f524e8 + 83f4065e: 56fd li a3,-1 + 83f40660: 52f6f543 fmadd.d fa0,fa3,fa5,fa0 + 83f40664: 32e6f7c3 fmadd.d fa5,fa3,fa4,ft6 + 83f40668: 2ad57543 fmadd.d fa0,fa0,fa3,ft5 + 83f4066c: 22d7f7c3 fmadd.d fa5,fa5,fa3,ft4 + 83f40670: 1ad57543 fmadd.d fa0,fa0,fa3,ft3 + 83f40674: 12d7f7c3 fmadd.d fa5,fa5,fa3,ft2 + 83f40678: 0ad57543 fmadd.d fa0,fa0,fa3,ft1 + 83f4067c: 02d7f7c3 fmadd.d fa5,fa5,fa3,ft0 + 83f40680: 5ad57543 fmadd.d fa0,fa0,fa3,fa1 + 83f40684: 12d7f7d3 fmul.d fa5,fa5,fa3 + 83f40688: 7ac57543 fmadd.d fa0,fa0,fa2,fa5 + 83f4068c: f20787d3 fmv.d.x fa5,a5 + 83f40690: 12a7f553 fmul.d fa0,fa5,fa0 + 83f40694: 08d70e63 beq a4,a3,83f40730 + 83f40698: 070e slli a4,a4,0x3 + 83f4069a: 00010697 auipc a3,0x10 + 83f4069e: 33e68693 addi a3,a3,830 # 83f509d8 + 83f406a2: 9736 add a4,a4,a3 + 83f406a4: 3318 fld fa4,32(a4) + 83f406a6: 231c fld fa5,0(a4) + 83f406a8: 0ae57553 fsub.d fa0,fa0,fa4 + 83f406ac: f2078753 fmv.d.x fa4,a5 + 83f406b0: 0ae57553 fsub.d fa0,fa0,fa4 + 83f406b4: 0aa7f553 fsub.d fa0,fa5,fa0 + 83f406b8: f204d3e3 bgez s1,83f405de + 83f406bc: 60e2 ld ra,24(sp) + 83f406be: 6442 ld s0,16(sp) + 83f406c0: 64a2 ld s1,8(sp) + 83f406c2: 22a51553 fneg.d fa0,fa0 + 83f406c6: 6105 addi sp,sp,32 + 83f406c8: 8082 ret + 83f406ca: 00012717 auipc a4,0x12 + 83f406ce: dd673787 fld fa5,-554(a4) # 83f524a0 + 83f406d2: 02f577d3 fadd.d fa5,fa0,fa5 + 83f406d6: 00012717 auipc a4,0x12 + 83f406da: c3a73707 fld fa4,-966(a4) # 83f52310 <__func__.1+0x118> + 83f406de: a2f71753 flt.d a4,fa4,fa5 + 83f406e2: db19 beqz a4,83f405f8 + 83f406e4: bded j 83f405de + 83f406e6: 60e2 ld ra,24(sp) + 83f406e8: 6442 ld s0,16(sp) + 83f406ea: 64a2 ld s1,8(sp) + 83f406ec: 00012797 auipc a5,0x12 + 83f406f0: dac7b507 fld fa0,-596(a5) # 83f52498 + 83f406f4: 6105 addi sp,sp,32 + 83f406f6: 8082 ret + 83f406f8: 250000ef jal ra,83f40948 + 83f406fc: 3ff307b7 lui a5,0x3ff30 + 83f40700: 02f45f63 bge s0,a5,83f4073e + 83f40704: 3fe607b7 lui a5,0x3fe60 + 83f40708: 06f45b63 bge s0,a5,83f4077e + 83f4070c: 00012797 auipc a5,0x12 + 83f40710: d9c7b707 fld fa4,-612(a5) # 83f524a8 + 83f40714: 00012797 auipc a5,0x12 + 83f40718: d9c7b787 fld fa5,-612(a5) # 83f524b0 + 83f4071c: 7ae577c3 fmadd.d fa5,fa0,fa4,fa5 + 83f40720: 02e57553 fadd.d fa0,fa0,fa4 + 83f40724: 4701 li a4,0 + 83f40726: 1aa7f7d3 fdiv.d fa5,fa5,fa0 + 83f4072a: e20787d3 fmv.x.d a5,fa5 + 83f4072e: b5f1 j 83f405fa + 83f40730: 60e2 ld ra,24(sp) + 83f40732: 6442 ld s0,16(sp) + 83f40734: 64a2 ld s1,8(sp) + 83f40736: 0aa7f553 fsub.d fa0,fa5,fa0 + 83f4073a: 6105 addi sp,sp,32 + 83f4073c: 8082 ret + 83f4073e: 400387b7 lui a5,0x40038 + 83f40742: 02f45463 bge s0,a5,83f4076a + 83f40746: 00012797 auipc a5,0x12 + 83f4074a: d727b787 fld fa5,-654(a5) # 83f524b8 + 83f4074e: 00012797 auipc a5,0x12 + 83f40752: bc27b687 fld fa3,-1086(a5) # 83f52310 <__func__.1+0x118> + 83f40756: 0af57753 fsub.d fa4,fa0,fa5 + 83f4075a: 6af57543 fmadd.d fa0,fa0,fa5,fa3 + 83f4075e: 4709 li a4,2 + 83f40760: 1aa777d3 fdiv.d fa5,fa4,fa0 + 83f40764: e20787d3 fmv.x.d a5,fa5 + 83f40768: bd49 j 83f405fa + 83f4076a: 00012797 auipc a5,0x12 + 83f4076e: d467b787 fld fa5,-698(a5) # 83f524b0 + 83f40772: 1aa7f7d3 fdiv.d fa5,fa5,fa0 + 83f40776: 470d li a4,3 + 83f40778: e20787d3 fmv.x.d a5,fa5 + 83f4077c: bdbd j 83f405fa + 83f4077e: 00012797 auipc a5,0x12 + 83f40782: b927b787 fld fa5,-1134(a5) # 83f52310 <__func__.1+0x118> + 83f40786: 0af57753 fsub.d fa4,fa0,fa5 + 83f4078a: 02f57553 fadd.d fa0,fa0,fa5 + 83f4078e: 4705 li a4,1 + 83f40790: 1aa777d3 fdiv.d fa5,fa4,fa0 + 83f40794: e20787d3 fmv.x.d a5,fa5 + 83f40798: b58d j 83f405fa + +0000000083f4079a : + 83f4079a: e20507d3 fmv.x.d a5,fa0 + 83f4079e: 464d li a2,19 + 83f407a0: 4347d713 srai a4,a5,0x34 + 83f407a4: 7ff77713 andi a4,a4,2047 + 83f407a8: c017081b addiw a6,a4,-1023 + 83f407ac: 4207d893 srai a7,a5,0x20 + 83f407b0: 0007851b sext.w a0,a5 + 83f407b4: 09064863 blt a2,a6,83f40844 + 83f407b8: 06084163 bltz a6,83f4081a + 83f407bc: 00100737 lui a4,0x100 + 83f407c0: fff7059b addiw a1,a4,-1 + 83f407c4: 4105d5bb sraw a1,a1,a6 + 83f407c8: 00b8f6b3 and a3,a7,a1 + 83f407cc: 8ec9 or a3,a3,a0 + 83f407ce: 2681 sext.w a3,a3 + 83f407d0: e2050653 fmv.x.d a2,fa0 + 83f407d4: c2a1 beqz a3,83f40814 + 83f407d6: 00012697 auipc a3,0x12 + 83f407da: cca6b787 fld fa5,-822(a3) # 83f524a0 + 83f407de: 02f577d3 fadd.d fa5,fa0,fa5 + 83f407e2: f2000753 fmv.d.x fa4,zero + 83f407e6: a2f717d3 flt.d a5,fa4,fa5 + 83f407ea: cf91 beqz a5,83f40806 + 83f407ec: 01105663 blez a7,83f407f8 + 83f407f0: 4107573b sraw a4,a4,a6 + 83f407f4: 011708bb addw a7,a4,a7 + 83f407f8: fff5c713 not a4,a1 + 83f407fc: 01177733 and a4,a4,a7 + 83f40800: 0007089b sext.w a7,a4 + 83f40804: 4501 li a0,0 + 83f40806: 02051793 slli a5,a0,0x20 + 83f4080a: 9381 srli a5,a5,0x20 + 83f4080c: 02089713 slli a4,a7,0x20 + 83f40810: 00f76633 or a2,a4,a5 + 83f40814: f2060553 fmv.d.x fa0,a2 + 83f40818: 8082 ret + 83f4081a: 00012717 auipc a4,0x12 + 83f4081e: c8673787 fld fa5,-890(a4) # 83f524a0 + 83f40822: 02f577d3 fadd.d fa5,fa0,fa5 + 83f40826: f2000753 fmv.d.x fa4,zero + 83f4082a: a2f717d3 flt.d a5,fa4,fa5 + 83f4082e: dfe1 beqz a5,83f40806 + 83f40830: 0808cb63 bltz a7,83f408c6 + 83f40834: 00a8e6b3 or a3,a7,a0 + 83f40838: 4501 li a0,0 + 83f4083a: 3ff008b7 lui a7,0x3ff00 + 83f4083e: f6e1 bnez a3,83f40806 + 83f40840: 4881 li a7,0 + 83f40842: b7d1 j 83f40806 + 83f40844: 03300613 li a2,51 + 83f40848: 01065d63 bge a2,a6,83f40862 + 83f4084c: 40000713 li a4,1024 + 83f40850: e2050653 fmv.x.d a2,fa0 + 83f40854: fce810e3 bne a6,a4,83f40814 + 83f40858: 02a577d3 fadd.d fa5,fa0,fa0 + 83f4085c: e2078653 fmv.x.d a2,fa5 + 83f40860: bf55 j 83f40814 + 83f40862: 567d li a2,-1 + 83f40864: bed7071b addiw a4,a4,-1043 + 83f40868: 00e6573b srlw a4,a2,a4 + 83f4086c: 00e57e33 and t3,a0,a4 + 83f40870: 2e01 sext.w t3,t3 + 83f40872: e2050653 fmv.x.d a2,fa0 + 83f40876: f80e0fe3 beqz t3,83f40814 + 83f4087a: 00012617 auipc a2,0x12 + 83f4087e: c2663787 fld fa5,-986(a2) # 83f524a0 + 83f40882: 02f577d3 fadd.d fa5,fa0,fa5 + 83f40886: f2000753 fmv.d.x fa4,zero + 83f4088a: a2f717d3 flt.d a5,fa4,fa5 + 83f4088e: dfa5 beqz a5,83f40806 + 83f40890: 03105263 blez a7,83f408b4 + 83f40894: 47d1 li a5,20 + 83f40896: 02f80663 beq a6,a5,83f408c2 + 83f4089a: 03400793 li a5,52 + 83f4089e: 410787bb subw a5,a5,a6 + 83f408a2: 4585 li a1,1 + 83f408a4: 00f595bb sllw a1,a1,a5 + 83f408a8: 00a586bb addw a3,a1,a0 + 83f408ac: 02a6f163 bgeu a3,a0,83f408ce + 83f408b0: 2885 addiw a7,a7,1 + 83f408b2: 8536 mv a0,a3 + 83f408b4: fff74713 not a4,a4 + 83f408b8: 00a777b3 and a5,a4,a0 + 83f408bc: 0007851b sext.w a0,a5 + 83f408c0: b799 j 83f40806 + 83f408c2: 2885 addiw a7,a7,1 + 83f408c4: bfc5 j 83f408b4 + 83f408c6: 4501 li a0,0 + 83f408c8: 800008b7 lui a7,0x80000 + 83f408cc: bf2d j 83f40806 + 83f408ce: 8536 mv a0,a3 + 83f408d0: b7d5 j 83f408b4 + +0000000083f408d2 : + 83f408d2: e20507d3 fmv.x.d a5,fa0 + 83f408d6: 3fe926b7 lui a3,0x3fe92 + 83f408da: 1fb68693 addi a3,a3,507 # 3fe921fb + 83f408de: 00179713 slli a4,a5,0x1 + 83f408e2: 9305 srli a4,a4,0x21 + 83f408e4: 02e6de63 bge a3,a4,83f40920 + 83f408e8: 7ff006b7 lui a3,0x7ff00 + 83f408ec: 00d74563 blt a4,a3,83f408f6 + 83f408f0: 0aa57553 fsub.d fa0,fa0,fa0 + 83f408f4: 8082 ret + 83f408f6: 1101 addi sp,sp,-32 + 83f408f8: 850a mv a0,sp + 83f408fa: ec06 sd ra,24(sp) + 83f408fc: 372010ef jal ra,83f41c6e <__ieee754_rem_pio2> + 83f40900: 890d andi a0,a0,3 + 83f40902: 4785 li a5,1 + 83f40904: 02f50263 beq a0,a5,83f40928 + 83f40908: 4789 li a5,2 + 83f4090a: 25a2 fld fa1,8(sp) + 83f4090c: 2502 fld fa0,0(sp) + 83f4090e: 02f50863 beq a0,a5,83f4093e + 83f40912: c11d beqz a0,83f40938 + 83f40914: 4505 li a0,1 + 83f40916: 09a020ef jal ra,83f429b0 <__kernel_sin> + 83f4091a: 60e2 ld ra,24(sp) + 83f4091c: 6105 addi sp,sp,32 + 83f4091e: 8082 ret + 83f40920: f20005d3 fmv.d.x fa1,zero + 83f40924: 7ec0106f j 83f42110 <__kernel_cos> + 83f40928: 25a2 fld fa1,8(sp) + 83f4092a: 2502 fld fa0,0(sp) + 83f4092c: 4505 li a0,1 + 83f4092e: 082020ef jal ra,83f429b0 <__kernel_sin> + 83f40932: 22a51553 fneg.d fa0,fa0 + 83f40936: b7d5 j 83f4091a + 83f40938: 7d8010ef jal ra,83f42110 <__kernel_cos> + 83f4093c: bff9 j 83f4091a + 83f4093e: 7d2010ef jal ra,83f42110 <__kernel_cos> + 83f40942: 22a51553 fneg.d fa0,fa0 + 83f40946: bfd1 j 83f4091a + +0000000083f40948 : + 83f40948: e20506d3 fmv.x.d a3,fa0 + 83f4094c: 57fd li a5,-1 + 83f4094e: 9381 srli a5,a5,0x20 + 83f40950: 00169713 slli a4,a3,0x1 + 83f40954: 9305 srli a4,a4,0x21 + 83f40956: 1702 slli a4,a4,0x20 + 83f40958: 8ff5 and a5,a5,a3 + 83f4095a: 8fd9 or a5,a5,a4 + 83f4095c: f2078553 fmv.d.x fa0,a5 + 83f40960: 8082 ret + +0000000083f40962 : + 83f40962: e20507d3 fmv.x.d a5,fa0 + 83f40966: 464d li a2,19 + 83f40968: 4347d713 srai a4,a5,0x34 + 83f4096c: 7ff77713 andi a4,a4,2047 + 83f40970: c017081b addiw a6,a4,-1023 + 83f40974: 4207d893 srai a7,a5,0x20 + 83f40978: 0007851b sext.w a0,a5 + 83f4097c: 09064363 blt a2,a6,83f40a02 + 83f40980: 06084163 bltz a6,83f409e2 + 83f40984: 001005b7 lui a1,0x100 + 83f40988: fff5869b addiw a3,a1,-1 + 83f4098c: 4106d6bb sraw a3,a3,a6 + 83f40990: 00d8f733 and a4,a7,a3 + 83f40994: 8f49 or a4,a4,a0 + 83f40996: 2701 sext.w a4,a4 + 83f40998: e2050653 fmv.x.d a2,fa0 + 83f4099c: c321 beqz a4,83f409dc + 83f4099e: 00012717 auipc a4,0x12 + 83f409a2: b0273787 fld fa5,-1278(a4) # 83f524a0 + 83f409a6: 02f577d3 fadd.d fa5,fa0,fa5 + 83f409aa: f2000753 fmv.d.x fa4,zero + 83f409ae: a2f717d3 flt.d a5,fa4,fa5 + 83f409b2: cf91 beqz a5,83f409ce + 83f409b4: 0008d663 bgez a7,83f409c0 + 83f409b8: 4105d73b sraw a4,a1,a6 + 83f409bc: 011708bb addw a7,a4,a7 + 83f409c0: fff6c713 not a4,a3 + 83f409c4: 01177733 and a4,a4,a7 + 83f409c8: 0007089b sext.w a7,a4 + 83f409cc: 4501 li a0,0 + 83f409ce: 02051793 slli a5,a0,0x20 + 83f409d2: 9381 srli a5,a5,0x20 + 83f409d4: 02089713 slli a4,a7,0x20 + 83f409d8: 00f76633 or a2,a4,a5 + 83f409dc: f2060553 fmv.d.x fa0,a2 + 83f409e0: 8082 ret + 83f409e2: 00012717 auipc a4,0x12 + 83f409e6: abe73787 fld fa5,-1346(a4) # 83f524a0 + 83f409ea: 02f577d3 fadd.d fa5,fa0,fa5 + 83f409ee: f2000753 fmv.d.x fa4,zero + 83f409f2: a2f717d3 flt.d a5,fa4,fa5 + 83f409f6: dfe1 beqz a5,83f409ce + 83f409f8: 0608c463 bltz a7,83f40a60 + 83f409fc: 4501 li a0,0 + 83f409fe: 4881 li a7,0 + 83f40a00: b7f9 j 83f409ce + 83f40a02: 03300613 li a2,51 + 83f40a06: 01065d63 bge a2,a6,83f40a20 + 83f40a0a: 40000713 li a4,1024 + 83f40a0e: e2050653 fmv.x.d a2,fa0 + 83f40a12: fce815e3 bne a6,a4,83f409dc + 83f40a16: 02a577d3 fadd.d fa5,fa0,fa0 + 83f40a1a: e2078653 fmv.x.d a2,fa5 + 83f40a1e: bf7d j 83f409dc + 83f40a20: 567d li a2,-1 + 83f40a22: bed7071b addiw a4,a4,-1043 + 83f40a26: 00e6573b srlw a4,a2,a4 + 83f40a2a: 00e57e33 and t3,a0,a4 + 83f40a2e: 2e01 sext.w t3,t3 + 83f40a30: e2050653 fmv.x.d a2,fa0 + 83f40a34: fa0e04e3 beqz t3,83f409dc + 83f40a38: 00012617 auipc a2,0x12 + 83f40a3c: a6863787 fld fa5,-1432(a2) # 83f524a0 + 83f40a40: 02f577d3 fadd.d fa5,fa0,fa5 + 83f40a44: f2000753 fmv.d.x fa4,zero + 83f40a48: a2f717d3 flt.d a5,fa4,fa5 + 83f40a4c: d3c9 beqz a5,83f409ce + 83f40a4e: 0208c463 bltz a7,83f40a76 + 83f40a52: fff74713 not a4,a4 + 83f40a56: 00a777b3 and a5,a4,a0 + 83f40a5a: 0007851b sext.w a0,a5 + 83f40a5e: bf85 j 83f409ce + 83f40a60: 02189313 slli t1,a7,0x21 + 83f40a64: 02135313 srli t1,t1,0x21 + 83f40a68: 006566b3 or a3,a0,t1 + 83f40a6c: 4501 li a0,0 + 83f40a6e: d2a5 beqz a3,83f409ce + 83f40a70: bff008b7 lui a7,0xbff00 + 83f40a74: bfa9 j 83f409ce + 83f40a76: 47d1 li a5,20 + 83f40a78: 02f80063 beq a6,a5,83f40a98 + 83f40a7c: 03400793 li a5,52 + 83f40a80: 410787bb subw a5,a5,a6 + 83f40a84: 4585 li a1,1 + 83f40a86: 00f595bb sllw a1,a1,a5 + 83f40a8a: 00a586bb addw a3,a1,a0 + 83f40a8e: 00a6f763 bgeu a3,a0,83f40a9c + 83f40a92: 2885 addiw a7,a7,1 + 83f40a94: 8536 mv a0,a3 + 83f40a96: bf75 j 83f40a52 + 83f40a98: 2885 addiw a7,a7,1 + 83f40a9a: bf65 j 83f40a52 + 83f40a9c: 8536 mv a0,a3 + 83f40a9e: bf55 j 83f40a52 + +0000000083f40aa0 : + 83f40aa0: e20507d3 fmv.x.d a5,fa0 + 83f40aa4: 484d li a6,19 + 83f40aa6: 4347d693 srai a3,a5,0x34 + 83f40aaa: 7ff6f693 andi a3,a3,2047 + 83f40aae: c016861b addiw a2,a3,-1023 + 83f40ab2: 4207d713 srai a4,a5,0x20 + 83f40ab6: 8532 mv a0,a2 + 83f40ab8: 88ba mv a7,a4 + 83f40aba: 0007859b sext.w a1,a5 + 83f40abe: 04c84c63 blt a6,a2,83f40b16 + 83f40ac2: 02064e63 bltz a2,83f40afe + 83f40ac6: 001006b7 lui a3,0x100 + 83f40aca: 36fd addiw a3,a3,-1 + 83f40acc: 40c6d6bb sraw a3,a3,a2 + 83f40ad0: 8f75 and a4,a4,a3 + 83f40ad2: 8dd9 or a1,a1,a4 + 83f40ad4: 2581 sext.w a1,a1 + 83f40ad6: c18d beqz a1,83f40af8 + 83f40ad8: 00080737 lui a4,0x80 + 83f40adc: 40c7573b sraw a4,a4,a2 + 83f40ae0: 011708bb addw a7,a4,a7 + 83f40ae4: fff6c713 not a4,a3 + 83f40ae8: 01177733 and a4,a4,a7 + 83f40aec: 2701 sext.w a4,a4 + 83f40aee: 4781 li a5,0 + 83f40af0: 1782 slli a5,a5,0x20 + 83f40af2: 9381 srli a5,a5,0x20 + 83f40af4: 1702 slli a4,a4,0x20 + 83f40af6: 8fd9 or a5,a5,a4 + 83f40af8: f2078553 fmv.d.x fa0,a5 + 83f40afc: 8082 ret + 83f40afe: 80000737 lui a4,0x80000 + 83f40b02: 57fd li a5,-1 + 83f40b04: 00e8f733 and a4,a7,a4 + 83f40b08: fef612e3 bne a2,a5,83f40aec + 83f40b0c: 3ff007b7 lui a5,0x3ff00 + 83f40b10: 8f5d or a4,a4,a5 + 83f40b12: 4781 li a5,0 + 83f40b14: bff1 j 83f40af0 + 83f40b16: 03300813 li a6,51 + 83f40b1a: 00c85b63 bge a6,a2,83f40b30 + 83f40b1e: 40000713 li a4,1024 + 83f40b22: fce61be3 bne a2,a4,83f40af8 + 83f40b26: 02a577d3 fadd.d fa5,fa0,fa0 + 83f40b2a: e20787d3 fmv.x.d a5,fa5 + 83f40b2e: b7e9 j 83f40af8 + 83f40b30: 567d li a2,-1 + 83f40b32: bed6869b addiw a3,a3,-1043 + 83f40b36: 00d656bb srlw a3,a2,a3 + 83f40b3a: 00d5f633 and a2,a1,a3 + 83f40b3e: 2601 sext.w a2,a2 + 83f40b40: de45 beqz a2,83f40af8 + 83f40b42: 03300793 li a5,51 + 83f40b46: 40a7853b subw a0,a5,a0 + 83f40b4a: 4785 li a5,1 + 83f40b4c: 00a797bb sllw a5,a5,a0 + 83f40b50: 9fad addw a5,a5,a1 + 83f40b52: 0007861b sext.w a2,a5 + 83f40b56: 00b67363 bgeu a2,a1,83f40b5c + 83f40b5a: 2705 addiw a4,a4,1 + 83f40b5c: fff6c693 not a3,a3 + 83f40b60: 8ff5 and a5,a5,a3 + 83f40b62: 2781 sext.w a5,a5 + 83f40b64: b771 j 83f40af0 + +0000000083f40b66 : + 83f40b66: e20507d3 fmv.x.d a5,fa0 + 83f40b6a: 3fe926b7 lui a3,0x3fe92 + 83f40b6e: 1fb68693 addi a3,a3,507 # 3fe921fb + 83f40b72: 00179713 slli a4,a5,0x1 + 83f40b76: 9305 srli a4,a4,0x21 + 83f40b78: 02e6df63 bge a3,a4,83f40bb6 + 83f40b7c: 7ff006b7 lui a3,0x7ff00 + 83f40b80: 00d74563 blt a4,a3,83f40b8a + 83f40b84: 0aa57553 fsub.d fa0,fa0,fa0 + 83f40b88: 8082 ret + 83f40b8a: 1101 addi sp,sp,-32 + 83f40b8c: 850a mv a0,sp + 83f40b8e: ec06 sd ra,24(sp) + 83f40b90: 0de010ef jal ra,83f41c6e <__ieee754_rem_pio2> + 83f40b94: 890d andi a0,a0,3 + 83f40b96: 4785 li a5,1 + 83f40b98: 02f50463 beq a0,a5,83f40bc0 + 83f40b9c: 4789 li a5,2 + 83f40b9e: 25a2 fld fa1,8(sp) + 83f40ba0: 2502 fld fa0,0(sp) + 83f40ba2: 02f50863 beq a0,a5,83f40bd2 + 83f40ba6: c115 beqz a0,83f40bca + 83f40ba8: 568010ef jal ra,83f42110 <__kernel_cos> + 83f40bac: 22a51553 fneg.d fa0,fa0 + 83f40bb0: 60e2 ld ra,24(sp) + 83f40bb2: 6105 addi sp,sp,32 + 83f40bb4: 8082 ret + 83f40bb6: f20005d3 fmv.d.x fa1,zero + 83f40bba: 4501 li a0,0 + 83f40bbc: 5f50106f j 83f429b0 <__kernel_sin> + 83f40bc0: 25a2 fld fa1,8(sp) + 83f40bc2: 2502 fld fa0,0(sp) + 83f40bc4: 54c010ef jal ra,83f42110 <__kernel_cos> + 83f40bc8: b7e5 j 83f40bb0 + 83f40bca: 4505 li a0,1 + 83f40bcc: 5e5010ef jal ra,83f429b0 <__kernel_sin> + 83f40bd0: b7c5 j 83f40bb0 + 83f40bd2: 4505 li a0,1 + 83f40bd4: 5dd010ef jal ra,83f429b0 <__kernel_sin> + 83f40bd8: 22a51553 fneg.d fa0,fa0 + 83f40bdc: bfd1 j 83f40bb0 + +0000000083f40bde : + 83f40bde: a495 j 83f40e42 <__ieee754_atan2> + +0000000083f40be0 : + 83f40be0: 1101 addi sp,sp,-32 + 83f40be2: a422 fsd fs0,8(sp) + 83f40be4: a026 fsd fs1,0(sp) + 83f40be6: 22a50453 fmv.d fs0,fa0 + 83f40bea: ec06 sd ra,24(sp) + 83f40bec: 440000ef jal ra,83f4102c <__ieee754_exp> + 83f40bf0: 0001f717 auipc a4,0x1f + 83f40bf4: fb072703 lw a4,-80(a4) # 83f5fba0 <__fdlib_version> + 83f40bf8: 57fd li a5,-1 + 83f40bfa: 22a504d3 fmv.d fs1,fa0 + 83f40bfe: 02f70563 beq a4,a5,83f40c28 + 83f40c02: 22840553 fmv.d fa0,fs0 + 83f40c06: 64f010ef jal ra,83f42a54 + 83f40c0a: cd19 beqz a0,83f40c28 + 83f40c0c: 00012797 auipc a5,0x12 + 83f40c10: 9147b787 fld fa5,-1772(a5) # 83f52520 + 83f40c14: a28797d3 flt.d a5,fa5,fs0 + 83f40c18: e79d bnez a5,83f40c46 + 83f40c1a: 00012797 auipc a5,0x12 + 83f40c1e: 90e7b787 fld fa5,-1778(a5) # 83f52528 + 83f40c22: a2f417d3 flt.d a5,fs0,fa5 + 83f40c26: eb81 bnez a5,83f40c36 + 83f40c28: 60e2 ld ra,24(sp) + 83f40c2a: 22948553 fmv.d fa0,fs1 + 83f40c2e: 2422 fld fs0,8(sp) + 83f40c30: 2482 fld fs1,0(sp) + 83f40c32: 6105 addi sp,sp,32 + 83f40c34: 8082 ret + 83f40c36: 0da020ef jal ra,83f42d10 <__errno> + 83f40c3a: 02200793 li a5,34 + 83f40c3e: f20004d3 fmv.d.x fs1,zero + 83f40c42: c11c sw a5,0(a0) + 83f40c44: b7d5 j 83f40c28 + 83f40c46: 0ca020ef jal ra,83f42d10 <__errno> + 83f40c4a: 02200793 li a5,34 + 83f40c4e: c11c sw a5,0(a0) + 83f40c50: 00012797 auipc a5,0x12 + 83f40c54: 8c87b487 fld fs1,-1848(a5) # 83f52518 + 83f40c58: bfc1 j 83f40c28 + +0000000083f40c5a : + 83f40c5a: 1101 addi sp,sp,-32 + 83f40c5c: a422 fsd fs0,8(sp) + 83f40c5e: ec06 sd ra,24(sp) + 83f40c60: 22a50453 fmv.d fs0,fa0 + 83f40c64: 646000ef jal ra,83f412aa <__ieee754_log> + 83f40c68: 0001f717 auipc a4,0x1f + 83f40c6c: f3872703 lw a4,-200(a4) # 83f5fba0 <__fdlib_version> + 83f40c70: 57fd li a5,-1 + 83f40c72: 02f70663 beq a4,a5,83f40c9e + 83f40c76: a28427d3 feq.d a5,fs0,fs0 + 83f40c7a: c395 beqz a5,83f40c9e + 83f40c7c: f20007d3 fmv.d.x fa5,zero + 83f40c80: a28797d3 flt.d a5,fa5,fs0 + 83f40c84: ef89 bnez a5,83f40c9e + 83f40c86: a2f427d3 feq.d a5,fs0,fa5 + 83f40c8a: cf91 beqz a5,83f40ca6 + 83f40c8c: 084020ef jal ra,83f42d10 <__errno> + 83f40c90: 02200793 li a5,34 + 83f40c94: c11c sw a5,0(a0) + 83f40c96: 00012797 auipc a5,0x12 + 83f40c9a: 89a7b507 fld fa0,-1894(a5) # 83f52530 + 83f40c9e: 60e2 ld ra,24(sp) + 83f40ca0: 2422 fld fs0,8(sp) + 83f40ca2: 6105 addi sp,sp,32 + 83f40ca4: 8082 ret + 83f40ca6: 06a020ef jal ra,83f42d10 <__errno> + 83f40caa: 60e2 ld ra,24(sp) + 83f40cac: 2422 fld fs0,8(sp) + 83f40cae: 02100793 li a5,33 + 83f40cb2: c11c sw a5,0(a0) + 83f40cb4: 00011517 auipc a0,0x11 + 83f40cb8: 53c50513 addi a0,a0,1340 # 83f521f0 <__func__.0+0x30> + 83f40cbc: 6105 addi sp,sp,32 + 83f40cbe: 5ab0106f j 83f42a68 + +0000000083f40cc2 : + 83f40cc2: 7179 addi sp,sp,-48 + 83f40cc4: ac22 fsd fs0,24(sp) + 83f40cc6: a826 fsd fs1,16(sp) + 83f40cc8: a44a fsd fs2,8(sp) + 83f40cca: 22a504d3 fmv.d fs1,fa0 + 83f40cce: 22b58453 fmv.d fs0,fa1 + 83f40cd2: f406 sd ra,40(sp) + 83f40cd4: a04e fsd fs3,0(sp) + 83f40cd6: 025000ef jal ra,83f414fa <__ieee754_pow> + 83f40cda: 0001f717 auipc a4,0x1f + 83f40cde: ec672703 lw a4,-314(a4) # 83f5fba0 <__fdlib_version> + 83f40ce2: 57fd li a5,-1 + 83f40ce4: 22a50953 fmv.d fs2,fa0 + 83f40ce8: 02f70863 beq a4,a5,83f40d18 + 83f40cec: a28427d3 feq.d a5,fs0,fs0 + 83f40cf0: c785 beqz a5,83f40d18 + 83f40cf2: a294a7d3 feq.d a5,fs1,fs1 + 83f40cf6: c7a5 beqz a5,83f40d5e + 83f40cf8: f20009d3 fmv.d.x fs3,zero + 83f40cfc: a334a7d3 feq.d a5,fs1,fs3 + 83f40d00: c78d beqz a5,83f40d2a + 83f40d02: a33427d3 feq.d a5,fs0,fs3 + 83f40d06: e3ad bnez a5,83f40d68 + 83f40d08: 22840553 fmv.d fa0,fs0 + 83f40d0c: 549010ef jal ra,83f42a54 + 83f40d10: c501 beqz a0,83f40d18 + 83f40d12: a33417d3 flt.d a5,fs0,fs3 + 83f40d16: e3c5 bnez a5,83f40db6 + 83f40d18: 70a2 ld ra,40(sp) + 83f40d1a: 23290553 fmv.d fa0,fs2 + 83f40d1e: 2462 fld fs0,24(sp) + 83f40d20: 24c2 fld fs1,16(sp) + 83f40d22: 2922 fld fs2,8(sp) + 83f40d24: 2982 fld fs3,0(sp) + 83f40d26: 6145 addi sp,sp,48 + 83f40d28: 8082 ret + 83f40d2a: 52b010ef jal ra,83f42a54 + 83f40d2e: c931 beqz a0,83f40d82 + 83f40d30: f20007d3 fmv.d.x fa5,zero + 83f40d34: a2f927d3 feq.d a5,fs2,fa5 + 83f40d38: d3e5 beqz a5,83f40d18 + 83f40d3a: 22948553 fmv.d fa0,fs1 + 83f40d3e: 517010ef jal ra,83f42a54 + 83f40d42: d979 beqz a0,83f40d18 + 83f40d44: 22840553 fmv.d fa0,fs0 + 83f40d48: 50d010ef jal ra,83f42a54 + 83f40d4c: d571 beqz a0,83f40d18 + 83f40d4e: 7c3010ef jal ra,83f42d10 <__errno> + 83f40d52: 02200793 li a5,34 + 83f40d56: f2000953 fmv.d.x fs2,zero + 83f40d5a: c11c sw a5,0(a0) + 83f40d5c: bf75 j 83f40d18 + 83f40d5e: f20007d3 fmv.d.x fa5,zero + 83f40d62: a2f427d3 feq.d a5,fs0,fa5 + 83f40d66: dbcd beqz a5,83f40d18 + 83f40d68: 70a2 ld ra,40(sp) + 83f40d6a: 00011797 auipc a5,0x11 + 83f40d6e: 5a67b907 fld fs2,1446(a5) # 83f52310 <__func__.1+0x118> + 83f40d72: 23290553 fmv.d fa0,fs2 + 83f40d76: 2462 fld fs0,24(sp) + 83f40d78: 24c2 fld fs1,16(sp) + 83f40d7a: 2922 fld fs2,8(sp) + 83f40d7c: 2982 fld fs3,0(sp) + 83f40d7e: 6145 addi sp,sp,48 + 83f40d80: 8082 ret + 83f40d82: 22948553 fmv.d fa0,fs1 + 83f40d86: 4cf010ef jal ra,83f42a54 + 83f40d8a: d15d beqz a0,83f40d30 + 83f40d8c: 22840553 fmv.d fa0,fs0 + 83f40d90: 4c5010ef jal ra,83f42a54 + 83f40d94: dd51 beqz a0,83f40d30 + 83f40d96: a32927d3 feq.d a5,fs2,fs2 + 83f40d9a: c7a1 beqz a5,83f40de2 + 83f40d9c: 775010ef jal ra,83f42d10 <__errno> + 83f40da0: a33497d3 flt.d a5,fs1,fs3 + 83f40da4: 02200713 li a4,34 + 83f40da8: c118 sw a4,0(a0) + 83f40daa: e385 bnez a5,83f40dca + 83f40dac: 00011797 auipc a5,0x11 + 83f40db0: 76c7b907 fld fs2,1900(a5) # 83f52518 + 83f40db4: b795 j 83f40d18 + 83f40db6: 75b010ef jal ra,83f42d10 <__errno> + 83f40dba: 02100793 li a5,33 + 83f40dbe: c11c sw a5,0(a0) + 83f40dc0: 00011797 auipc a5,0x11 + 83f40dc4: 7707b907 fld fs2,1904(a5) # 83f52530 + 83f40dc8: bf81 j 83f40d18 + 83f40dca: 22840553 fmv.d fa0,fs0 + 83f40dce: 4a5010ef jal ra,83f42a72 + 83f40dd2: a28527d3 feq.d a5,fa0,fs0 + 83f40dd6: fbf9 bnez a5,83f40dac + 83f40dd8: 00011797 auipc a5,0x11 + 83f40ddc: 7587b907 fld fs2,1880(a5) # 83f52530 + 83f40de0: bf25 j 83f40d18 + 83f40de2: 72f010ef jal ra,83f42d10 <__errno> + 83f40de6: 02100793 li a5,33 + 83f40dea: 1b39f953 fdiv.d fs2,fs3,fs3 + 83f40dee: c11c sw a5,0(a0) + 83f40df0: b725 j 83f40d18 + +0000000083f40df2 : + 83f40df2: 1101 addi sp,sp,-32 + 83f40df4: a422 fsd fs0,8(sp) + 83f40df6: ec06 sd ra,24(sp) + 83f40df8: 22a50453 fmv.d fs0,fa0 + 83f40dfc: a026 fsd fs1,0(sp) + 83f40dfe: 136010ef jal ra,83f41f34 <__ieee754_sqrt> + 83f40e02: 0001f717 auipc a4,0x1f + 83f40e06: d9e72703 lw a4,-610(a4) # 83f5fba0 <__fdlib_version> + 83f40e0a: 57fd li a5,-1 + 83f40e0c: 00f70a63 beq a4,a5,83f40e20 + 83f40e10: a28427d3 feq.d a5,fs0,fs0 + 83f40e14: c791 beqz a5,83f40e20 + 83f40e16: f20004d3 fmv.d.x fs1,zero + 83f40e1a: a29417d3 flt.d a5,fs0,fs1 + 83f40e1e: e791 bnez a5,83f40e2a + 83f40e20: 60e2 ld ra,24(sp) + 83f40e22: 2422 fld fs0,8(sp) + 83f40e24: 2482 fld fs1,0(sp) + 83f40e26: 6105 addi sp,sp,32 + 83f40e28: 8082 ret + 83f40e2a: 6e7010ef jal ra,83f42d10 <__errno> + 83f40e2e: 60e2 ld ra,24(sp) + 83f40e30: 02100793 li a5,33 + 83f40e34: c11c sw a5,0(a0) + 83f40e36: 1a94f553 fdiv.d fa0,fs1,fs1 + 83f40e3a: 2422 fld fs0,8(sp) + 83f40e3c: 2482 fld fs1,0(sp) + 83f40e3e: 6105 addi sp,sp,32 + 83f40e40: 8082 ret + +0000000083f40e42 <__ieee754_atan2>: + 83f40e42: e2058653 fmv.x.d a2,fa1 + 83f40e46: 80000737 lui a4,0x80000 + 83f40e4a: fff74713 not a4,a4 + 83f40e4e: 0006051b sext.w a0,a2 + 83f40e52: 40c007bb negw a5,a2 + 83f40e56: 42065593 srai a1,a2,0x20 + 83f40e5a: 8fc9 or a5,a5,a0 + 83f40e5c: 00e5f8b3 and a7,a1,a4 + 83f40e60: 01f7d79b srliw a5,a5,0x1f + 83f40e64: 00f8e7b3 or a5,a7,a5 + 83f40e68: 7ff00837 lui a6,0x7ff00 + 83f40e6c: 2781 sext.w a5,a5 + 83f40e6e: e20506d3 fmv.x.d a3,fa0 + 83f40e72: 06f86c63 bltu a6,a5,83f40eea <__ieee754_atan2+0xa8> + 83f40e76: 4206de13 srai t3,a3,0x20 + 83f40e7a: 00068e9b sext.w t4,a3 + 83f40e7e: 40d007bb negw a5,a3 + 83f40e82: 00ee7733 and a4,t3,a4 + 83f40e86: 00fee7b3 or a5,t4,a5 + 83f40e8a: 00070f9b sext.w t6,a4 + 83f40e8e: 01f7d79b srliw a5,a5,0x1f + 83f40e92: 00ffe7b3 or a5,t6,a5 + 83f40e96: 2781 sext.w a5,a5 + 83f40e98: 04f86963 bltu a6,a5,83f40eea <__ieee754_atan2+0xa8> + 83f40e9c: c01007b7 lui a5,0xc0100 + 83f40ea0: 9fad addw a5,a5,a1 + 83f40ea2: 8fc9 or a5,a5,a0 + 83f40ea4: 2781 sext.w a5,a5 + 83f40ea6: c7f9 beqz a5,83f40f74 <__ieee754_atan2+0x132> + 83f40ea8: 1141 addi sp,sp,-16 + 83f40eaa: e022 sd s0,0(sp) + 83f40eac: 41e5d41b sraiw s0,a1,0x1e + 83f40eb0: 8809 andi s0,s0,2 + 83f40eb2: 01fe5f1b srliw t5,t3,0x1f + 83f40eb6: 01e46433 or s0,s0,t5 + 83f40eba: e406 sd ra,8(sp) + 83f40ebc: 01feeeb3 or t4,t4,t6 + 83f40ec0: 2401 sext.w s0,s0 + 83f40ec2: 020e9d63 bnez t4,83f40efc <__ieee754_atan2+0xba> + 83f40ec6: 4789 li a5,2 + 83f40ec8: 0af40f63 beq s0,a5,83f40f86 <__ieee754_atan2+0x144> + 83f40ecc: 470d li a4,3 + 83f40ece: e20507d3 fmv.x.d a5,fa0 + 83f40ed2: 00e41663 bne s0,a4,83f40ede <__ieee754_atan2+0x9c> + 83f40ed6: 00011797 auipc a5,0x11 + 83f40eda: 6627b783 ld a5,1634(a5) # 83f52538 + 83f40ede: 60a2 ld ra,8(sp) + 83f40ee0: 6402 ld s0,0(sp) + 83f40ee2: f2078553 fmv.d.x fa0,a5 + 83f40ee6: 0141 addi sp,sp,16 + 83f40ee8: 8082 ret + 83f40eea: f20607d3 fmv.d.x fa5,a2 + 83f40eee: f2068753 fmv.d.x fa4,a3 + 83f40ef2: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f40ef6: 22f78553 fmv.d fa0,fa5 + 83f40efa: 8082 ret + 83f40efc: 01156533 or a0,a0,a7 + 83f40f00: 2501 sext.w a0,a0 + 83f40f02: c93d beqz a0,83f40f78 <__ieee754_atan2+0x136> + 83f40f04: 0b088063 beq a7,a6,83f40fa4 <__ieee754_atan2+0x162> + 83f40f08: 070f8863 beq t6,a6,83f40f78 <__ieee754_atan2+0x136> + 83f40f0c: 411f873b subw a4,t6,a7 + 83f40f10: 4147571b sraiw a4,a4,0x14 + 83f40f14: 03c00793 li a5,60 + 83f40f18: 08e7c163 blt a5,a4,83f40f9a <__ieee754_atan2+0x158> + 83f40f1c: 0005d863 bgez a1,83f40f2c <__ieee754_atan2+0xea> + 83f40f20: fc400593 li a1,-60 + 83f40f24: 00000793 li a5,0 + 83f40f28: 00b74e63 blt a4,a1,83f40f44 <__ieee754_atan2+0x102> + 83f40f2c: f20687d3 fmv.d.x fa5,a3 + 83f40f30: f2060753 fmv.d.x fa4,a2 + 83f40f34: 1ae7f553 fdiv.d fa0,fa5,fa4 + 83f40f38: a11ff0ef jal ra,83f40948 + 83f40f3c: e54ff0ef jal ra,83f40590 + 83f40f40: e20507d3 fmv.x.d a5,fa0 + 83f40f44: 4705 li a4,1 + 83f40f46: 0ae40563 beq s0,a4,83f40ff0 <__ieee754_atan2+0x1ae> + 83f40f4a: 4709 li a4,2 + 83f40f4c: 08e40163 beq s0,a4,83f40fce <__ieee754_atan2+0x18c> + 83f40f50: d459 beqz s0,83f40ede <__ieee754_atan2+0x9c> + 83f40f52: f2078753 fmv.d.x fa4,a5 + 83f40f56: 00011717 auipc a4,0x11 + 83f40f5a: 5fa73787 fld fa5,1530(a4) # 83f52550 + 83f40f5e: 0af777d3 fsub.d fa5,fa4,fa5 + 83f40f62: 00011797 auipc a5,0x11 + 83f40f66: 5de7b707 fld fa4,1502(a5) # 83f52540 + 83f40f6a: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f40f6e: e20787d3 fmv.x.d a5,fa5 + 83f40f72: b7b5 j 83f40ede <__ieee754_atan2+0x9c> + 83f40f74: e1cff06f j 83f40590 + 83f40f78: 000e4c63 bltz t3,83f40f90 <__ieee754_atan2+0x14e> + 83f40f7c: 00011797 auipc a5,0x11 + 83f40f80: 48c7b783 ld a5,1164(a5) # 83f52408 <__func__.1+0x210> + 83f40f84: bfa9 j 83f40ede <__ieee754_atan2+0x9c> + 83f40f86: 00011797 auipc a5,0x11 + 83f40f8a: 5ba7b783 ld a5,1466(a5) # 83f52540 + 83f40f8e: bf81 j 83f40ede <__ieee754_atan2+0x9c> + 83f40f90: 00011797 auipc a5,0x11 + 83f40f94: 5087b783 ld a5,1288(a5) # 83f52498 + 83f40f98: b799 j 83f40ede <__ieee754_atan2+0x9c> + 83f40f9a: 00011797 auipc a5,0x11 + 83f40f9e: 46e7b783 ld a5,1134(a5) # 83f52408 <__func__.1+0x210> + 83f40fa2: b74d j 83f40f44 <__ieee754_atan2+0x102> + 83f40fa4: 347d addiw s0,s0,-1 + 83f40fa6: 0004069b sext.w a3,s0 + 83f40faa: 051f8e63 beq t6,a7,83f41006 <__ieee754_atan2+0x1c4> + 83f40fae: 4709 li a4,2 + 83f40fb0: 00000793 li a5,0 + 83f40fb4: f2d765e3 bltu a4,a3,83f40ede <__ieee754_atan2+0x9c> + 83f40fb8: 02041793 slli a5,s0,0x20 + 83f40fbc: 01d7d413 srli s0,a5,0x1d + 83f40fc0: 00010797 auipc a5,0x10 + 83f40fc4: a5878793 addi a5,a5,-1448 # 83f50a18 + 83f40fc8: 943e add s0,s0,a5 + 83f40fca: 6c1c ld a5,24(s0) + 83f40fcc: bf09 j 83f40ede <__ieee754_atan2+0x9c> + 83f40fce: f2078753 fmv.d.x fa4,a5 + 83f40fd2: 00011717 auipc a4,0x11 + 83f40fd6: 57e73787 fld fa5,1406(a4) # 83f52550 + 83f40fda: 0af777d3 fsub.d fa5,fa4,fa5 + 83f40fde: 00011797 auipc a5,0x11 + 83f40fe2: 5627b707 fld fa4,1378(a5) # 83f52540 + 83f40fe6: 0af777d3 fsub.d fa5,fa4,fa5 + 83f40fea: e20787d3 fmv.x.d a5,fa5 + 83f40fee: bdc5 j 83f40ede <__ieee754_atan2+0x9c> + 83f40ff0: 0207d713 srli a4,a5,0x20 + 83f40ff4: 800006b7 lui a3,0x80000 + 83f40ff8: 8f35 xor a4,a4,a3 + 83f40ffa: 56fd li a3,-1 + 83f40ffc: 9281 srli a3,a3,0x20 + 83f40ffe: 1702 slli a4,a4,0x20 + 83f41000: 8ff5 and a5,a5,a3 + 83f41002: 8fd9 or a5,a5,a4 + 83f41004: bde9 j 83f40ede <__ieee754_atan2+0x9c> + 83f41006: 4789 li a5,2 + 83f41008: 00d7ed63 bltu a5,a3,83f41022 <__ieee754_atan2+0x1e0> + 83f4100c: 02041793 slli a5,s0,0x20 + 83f41010: 01d7d413 srli s0,a5,0x1d + 83f41014: 00010797 auipc a5,0x10 + 83f41018: a0478793 addi a5,a5,-1532 # 83f50a18 + 83f4101c: 943e add s0,s0,a5 + 83f4101e: 601c ld a5,0(s0) + 83f41020: bd7d j 83f40ede <__ieee754_atan2+0x9c> + 83f41022: 00011797 auipc a5,0x11 + 83f41026: 5267b783 ld a5,1318(a5) # 83f52548 + 83f4102a: bd55 j 83f40ede <__ieee754_atan2+0x9c> + +0000000083f4102c <__ieee754_exp>: + 83f4102c: e20507d3 fmv.x.d a5,fa0 + 83f41030: 40863637 lui a2,0x40863 + 83f41034: e4160613 addi a2,a2,-447 # 40862e41 + 83f41038: 4207d693 srai a3,a5,0x20 + 83f4103c: 02169713 slli a4,a3,0x21 + 83f41040: 9305 srli a4,a4,0x21 + 83f41042: 03f7d513 srli a0,a5,0x3f + 83f41046: 0007a593 slti a1,a5,0 + 83f4104a: 02e67463 bgeu a2,a4,83f41072 <__ieee754_exp+0x46> + 83f4104e: 7ff00637 lui a2,0x7ff00 + 83f41052: 0ac76763 bltu a4,a2,83f41100 <__ieee754_exp+0xd4> + 83f41056: 02c69713 slli a4,a3,0x2c + 83f4105a: 9331 srli a4,a4,0x2c + 83f4105c: 8f5d or a4,a4,a5 + 83f4105e: 2701 sext.w a4,a4 + 83f41060: 1e071963 bnez a4,83f41252 <__ieee754_exp+0x226> + 83f41064: 00000713 li a4,0 + 83f41068: 1a059f63 bnez a1,83f41226 <__ieee754_exp+0x1fa> + 83f4106c: e2050753 fmv.x.d a4,fa0 + 83f41070: aa5d j 83f41226 <__ieee754_exp+0x1fa> + 83f41072: 3fd636b7 lui a3,0x3fd63 + 83f41076: e4268693 addi a3,a3,-446 # 3fd62e42 + 83f4107a: 0ee6e663 bltu a3,a4,83f41166 <__ieee754_exp+0x13a> + 83f4107e: 3e3006b7 lui a3,0x3e300 + 83f41082: 1ad76563 bltu a4,a3,83f4122c <__ieee754_exp+0x200> + 83f41086: 00011717 auipc a4,0x11 + 83f4108a: 28a73707 fld fa4,650(a4) # 83f52310 <__func__.1+0x118> + 83f4108e: f20787d3 fmv.d.x fa5,a5 + 83f41092: 00011717 auipc a4,0x11 + 83f41096: 4de73687 fld fa3,1246(a4) # 83f52570 + 83f4109a: 00011717 auipc a4,0x11 + 83f4109e: 4de73007 fld ft0,1246(a4) # 83f52578 + 83f410a2: 12f7f7d3 fmul.d fa5,fa5,fa5 + 83f410a6: 00011717 auipc a4,0x11 + 83f410aa: 4da73507 fld fa0,1242(a4) # 83f52580 + 83f410ae: 00011717 auipc a4,0x11 + 83f410b2: 4da73587 fld fa1,1242(a4) # 83f52588 + 83f410b6: 00011717 auipc a4,0x11 + 83f410ba: 4da73607 fld fa2,1242(a4) # 83f52590 + 83f410be: 02d7f6c3 fmadd.d fa3,fa5,fa3,ft0 + 83f410c2: 52d7f6c3 fmadd.d fa3,fa5,fa3,fa0 + 83f410c6: 5ad7f6c3 fmadd.d fa3,fa5,fa3,fa1 + 83f410ca: 62d7f6c3 fmadd.d fa3,fa5,fa3,fa2 + 83f410ce: f2078653 fmv.d.x fa2,a5 + 83f410d2: 62d7f7cb fnmsub.d fa5,fa5,fa3,fa2 + 83f410d6: 12f676d3 fmul.d fa3,fa2,fa5 + 83f410da: 00011717 auipc a4,0x11 + 83f410de: 3ce73607 fld fa2,974(a4) # 83f524a8 + 83f410e2: 0ac7f7d3 fsub.d fa5,fa5,fa2 + 83f410e6: 1af6f7d3 fdiv.d fa5,fa3,fa5 + 83f410ea: f20786d3 fmv.d.x fa3,a5 + 83f410ee: 0ad7f7d3 fsub.d fa5,fa5,fa3 + 83f410f2: 0af777d3 fsub.d fa5,fa4,fa5 + 83f410f6: e2078753 fmv.x.d a4,fa5 + 83f410fa: f2070553 fmv.d.x fa0,a4 + 83f410fe: 8082 ret + 83f41100: 00011717 auipc a4,0x11 + 83f41104: 42073787 fld fa5,1056(a4) # 83f52520 + 83f41108: a2a79753 flt.d a4,fa5,fa0 + 83f4110c: 14071a63 bnez a4,83f41260 <__ieee754_exp+0x234> + 83f41110: 00011717 auipc a4,0x11 + 83f41114: 41873787 fld fa5,1048(a4) # 83f52528 + 83f41118: a2f516d3 flt.d a3,fa0,fa5 + 83f4111c: 00000713 li a4,0 + 83f41120: 10069363 bnez a3,83f41226 <__ieee754_exp+0x1fa> + 83f41124: 00010717 auipc a4,0x10 + 83f41128: 92470713 addi a4,a4,-1756 # 83f50a48 + 83f4112c: 058e slli a1,a1,0x3 + 83f4112e: 95ba add a1,a1,a4 + 83f41130: f2078753 fmv.d.x fa4,a5 + 83f41134: 3194 fld fa3,32(a1) + 83f41136: 00011717 auipc a4,0x11 + 83f4113a: 42273787 fld fa5,1058(a4) # 83f52558 + 83f4113e: 00011717 auipc a4,0x11 + 83f41142: 42273587 fld fa1,1058(a4) # 83f52560 + 83f41146: 6af777c3 fmadd.d fa5,fa4,fa5,fa3 + 83f4114a: 00011717 auipc a4,0x11 + 83f4114e: 41e73687 fld fa3,1054(a4) # 83f52568 + 83f41152: c2079753 fcvt.w.d a4,fa5,rtz + 83f41156: d20707d3 fcvt.d.w fa5,a4 + 83f4115a: 2701 sext.w a4,a4 + 83f4115c: 72b7f5cb fnmsub.d fa1,fa5,fa1,fa4 + 83f41160: 12d7f753 fmul.d fa4,fa5,fa3 + 83f41164: a025 j 83f4118c <__ieee754_exp+0x160> + 83f41166: 3ff0a6b7 lui a3,0x3ff0a + 83f4116a: 2b168693 addi a3,a3,689 # 3ff0a2b1 + 83f4116e: fae6ebe3 bltu a3,a4,83f41124 <__ieee754_exp+0xf8> + 83f41172: 00010717 auipc a4,0x10 + 83f41176: 8d670713 addi a4,a4,-1834 # 83f50a48 + 83f4117a: 058e slli a1,a1,0x3 + 83f4117c: 95ba add a1,a1,a4 + 83f4117e: 2198 fld fa4,0(a1) + 83f41180: 4705 li a4,1 + 83f41182: 9f09 subw a4,a4,a0 + 83f41184: 0ae575d3 fsub.d fa1,fa0,fa4 + 83f41188: 2998 fld fa4,16(a1) + 83f4118a: 9f09 subw a4,a4,a0 + 83f4118c: 0ae5f7d3 fsub.d fa5,fa1,fa4 + 83f41190: 00011697 auipc a3,0x11 + 83f41194: 3e86b087 fld ft1,1000(a3) # 83f52578 + 83f41198: 00011697 auipc a3,0x11 + 83f4119c: 3e86b007 fld ft0,1000(a3) # 83f52580 + 83f411a0: 00011697 auipc a3,0x11 + 83f411a4: 3e86b507 fld fa0,1000(a3) # 83f52588 + 83f411a8: 00011697 auipc a3,0x11 + 83f411ac: 3e86b607 fld fa2,1000(a3) # 83f52590 + 83f411b0: e20787d3 fmv.x.d a5,fa5 + 83f411b4: 00011697 auipc a3,0x11 + 83f411b8: 3bc6b787 fld fa5,956(a3) # 83f52570 + 83f411bc: f20786d3 fmv.d.x fa3,a5 + 83f411c0: 12d6f6d3 fmul.d fa3,fa3,fa3 + 83f411c4: 0af6f7c3 fmadd.d fa5,fa3,fa5,ft1 + 83f411c8: 02d7f7c3 fmadd.d fa5,fa5,fa3,ft0 + 83f411cc: 52d7f7c3 fmadd.d fa5,fa5,fa3,fa0 + 83f411d0: 62d7f7c3 fmadd.d fa5,fa5,fa3,fa2 + 83f411d4: f2078653 fmv.d.x fa2,a5 + 83f411d8: 62d7f7cb fnmsub.d fa5,fa5,fa3,fa2 + 83f411dc: 12f676d3 fmul.d fa3,fa2,fa5 + 83f411e0: c361 beqz a4,83f412a0 <__ieee754_exp+0x274> + 83f411e2: 00011797 auipc a5,0x11 + 83f411e6: 2c67b607 fld fa2,710(a5) # 83f524a8 + 83f411ea: 0af677d3 fsub.d fa5,fa2,fa5 + 83f411ee: 00011797 auipc a5,0x11 + 83f411f2: 1227b607 fld fa2,290(a5) # 83f52310 <__func__.1+0x118> + 83f411f6: c0300613 li a2,-1021 + 83f411fa: 1af6f6d3 fdiv.d fa3,fa3,fa5 + 83f411fe: 0ad77753 fsub.d fa4,fa4,fa3 + 83f41202: 0ab77753 fsub.d fa4,fa4,fa1 + 83f41206: 0ae677d3 fsub.d fa5,fa2,fa4 + 83f4120a: e20786d3 fmv.x.d a3,fa5 + 83f4120e: 4206d593 srai a1,a3,0x20 + 83f41212: 06c74063 blt a4,a2,83f41272 <__ieee754_exp+0x246> + 83f41216: 0147179b slliw a5,a4,0x14 + 83f4121a: 577d li a4,-1 + 83f4121c: 9fad addw a5,a5,a1 + 83f4121e: 9301 srli a4,a4,0x20 + 83f41220: 1782 slli a5,a5,0x20 + 83f41222: 8f75 and a4,a4,a3 + 83f41224: 8f5d or a4,a4,a5 + 83f41226: f2070553 fmv.d.x fa0,a4 + 83f4122a: 8082 ret + 83f4122c: 00011717 auipc a4,0x11 + 83f41230: 27473787 fld fa5,628(a4) # 83f524a0 + 83f41234: 02f577d3 fadd.d fa5,fa0,fa5 + 83f41238: 00011717 auipc a4,0x11 + 83f4123c: 0d873707 fld fa4,216(a4) # 83f52310 <__func__.1+0x118> + 83f41240: a2f71753 flt.d a4,fa4,fa5 + 83f41244: e40705e3 beqz a4,83f4108e <__ieee754_exp+0x62> + 83f41248: 02e577d3 fadd.d fa5,fa0,fa4 + 83f4124c: e2078753 fmv.x.d a4,fa5 + 83f41250: bfd9 j 83f41226 <__ieee754_exp+0x1fa> + 83f41252: 02a577d3 fadd.d fa5,fa0,fa0 + 83f41256: e2078753 fmv.x.d a4,fa5 + 83f4125a: f2070553 fmv.d.x fa0,a4 + 83f4125e: 8082 ret + 83f41260: 00011797 auipc a5,0x11 + 83f41264: 2407b787 fld fa5,576(a5) # 83f524a0 + 83f41268: 12f7f7d3 fmul.d fa5,fa5,fa5 + 83f4126c: e2078753 fmv.x.d a4,fa5 + 83f41270: bf5d j 83f41226 <__ieee754_exp+0x1fa> + 83f41272: 3e87079b addiw a5,a4,1000 + 83f41276: 0147979b slliw a5,a5,0x14 + 83f4127a: 577d li a4,-1 + 83f4127c: 9fad addw a5,a5,a1 + 83f4127e: 9301 srli a4,a4,0x20 + 83f41280: 1782 slli a5,a5,0x20 + 83f41282: 8f75 and a4,a4,a3 + 83f41284: 8f5d or a4,a4,a5 + 83f41286: f2070753 fmv.d.x fa4,a4 + 83f4128a: 00011797 auipc a5,0x11 + 83f4128e: 30e7b787 fld fa5,782(a5) # 83f52598 + 83f41292: 12e7f7d3 fmul.d fa5,fa5,fa4 + 83f41296: e2078753 fmv.x.d a4,fa5 + 83f4129a: f2070553 fmv.d.x fa0,a4 + 83f4129e: 8082 ret + 83f412a0: 00011717 auipc a4,0x11 + 83f412a4: 07073707 fld fa4,112(a4) # 83f52310 <__func__.1+0x118> + 83f412a8: bd0d j 83f410da <__ieee754_exp+0xae> + +0000000083f412aa <__ieee754_log>: + 83f412aa: e20507d3 fmv.x.d a5,fa0 + 83f412ae: 00100637 lui a2,0x100 + 83f412b2: 4207d713 srai a4,a5,0x20 + 83f412b6: 0cc75563 bge a4,a2,83f41380 <__ieee754_log+0xd6> + 83f412ba: 02171693 slli a3,a4,0x21 + 83f412be: 9285 srli a3,a3,0x21 + 83f412c0: 8edd or a3,a3,a5 + 83f412c2: 2681 sext.w a3,a3 + 83f412c4: 18068363 beqz a3,83f4144a <__ieee754_log+0x1a0> + 83f412c8: 20074163 bltz a4,83f414ca <__ieee754_log+0x220> + 83f412cc: 00011717 auipc a4,0x11 + 83f412d0: 2dc73787 fld fa5,732(a4) # 83f525a8 + 83f412d4: 12f577d3 fmul.d fa5,fa0,fa5 + 83f412d8: 7ff006b7 lui a3,0x7ff00 + 83f412dc: fca00313 li t1,-54 + 83f412e0: e20787d3 fmv.x.d a5,fa5 + 83f412e4: 4207d713 srai a4,a5,0x20 + 83f412e8: 0ad75163 bge a4,a3,83f4138a <__ieee754_log+0xe0> + 83f412ec: 00100637 lui a2,0x100 + 83f412f0: fff60893 addi a7,a2,-1 # fffff + 83f412f4: 000966b7 lui a3,0x96 + 83f412f8: 01177833 and a6,a4,a7 + 83f412fc: f646869b addiw a3,a3,-156 + 83f41300: 00d806bb addw a3,a6,a3 + 83f41304: 8ef1 and a3,a3,a2 + 83f41306: 3ff005b7 lui a1,0x3ff00 + 83f4130a: 8db5 xor a1,a1,a3 + 83f4130c: 567d li a2,-1 + 83f4130e: 9201 srli a2,a2,0x20 + 83f41310: 00b865b3 or a1,a6,a1 + 83f41314: 1582 slli a1,a1,0x20 + 83f41316: 8ff1 and a5,a5,a2 + 83f41318: 8fcd or a5,a5,a1 + 83f4131a: 4147571b sraiw a4,a4,0x14 + 83f4131e: 0028051b addiw a0,a6,2 + 83f41322: f2078753 fmv.d.x fa4,a5 + 83f41326: c017071b addiw a4,a4,-1023 + 83f4132a: 0067073b addw a4,a4,t1 + 83f4132e: 01157633 and a2,a0,a7 + 83f41332: 4146d69b sraiw a3,a3,0x14 + 83f41336: 00e685bb addw a1,a3,a4 + 83f4133a: 2601 sext.w a2,a2 + 83f4133c: 00011717 auipc a4,0x11 + 83f41340: fd473787 fld fa5,-44(a4) # 83f52310 <__func__.1+0x118> + 83f41344: 4509 li a0,2 + 83f41346: 0af777d3 fsub.d fa5,fa4,fa5 + 83f4134a: 04c54563 blt a0,a2,83f41394 <__ieee754_log+0xea> + 83f4134e: f2000753 fmv.d.x fa4,zero + 83f41352: a2e7a7d3 feq.d a5,fa5,fa4 + 83f41356: 10078363 beqz a5,83f4145c <__ieee754_log+0x1b2> + 83f4135a: 22e70553 fmv.d fa0,fa4 + 83f4135e: 16058563 beqz a1,83f414c8 <__ieee754_log+0x21e> + 83f41362: d20587d3 fcvt.d.w fa5,a1 + 83f41366: 00011797 auipc a5,0x11 + 83f4136a: 2027b507 fld fa0,514(a5) # 83f52568 + 83f4136e: 00011797 auipc a5,0x11 + 83f41372: 1f27b707 fld fa4,498(a5) # 83f52560 + 83f41376: 12a7f553 fmul.d fa0,fa5,fa0 + 83f4137a: 52e7f543 fmadd.d fa0,fa5,fa4,fa0 + 83f4137e: 8082 ret + 83f41380: 7ff006b7 lui a3,0x7ff00 + 83f41384: 4301 li t1,0 + 83f41386: f6d743e3 blt a4,a3,83f412ec <__ieee754_log+0x42> + 83f4138a: f20787d3 fmv.d.x fa5,a5 + 83f4138e: 02f7f553 fadd.d fa0,fa5,fa5 + 83f41392: 8082 ret + 83f41394: 00011797 auipc a5,0x11 + 83f41398: 1147b507 fld fa0,276(a5) # 83f524a8 + 83f4139c: 02a7f553 fadd.d fa0,fa5,fa0 + 83f413a0: 00011797 auipc a5,0x11 + 83f413a4: 2307b687 fld fa3,560(a5) # 83f525d0 + 83f413a8: 00011797 auipc a5,0x11 + 83f413ac: 2307b207 fld ft4,560(a5) # 83f525d8 + 83f413b0: 00011797 auipc a5,0x11 + 83f413b4: 2307b107 fld ft2,560(a5) # 83f525e0 + 83f413b8: 00011797 auipc a5,0x11 + 83f413bc: 2007b707 fld fa4,512(a5) # 83f525b8 + 83f413c0: 00011797 auipc a5,0x11 + 83f413c4: 2007b187 fld ft3,512(a5) # 83f525c0 + 83f413c8: 00011797 auipc a5,0x11 + 83f413cc: 2207b007 fld ft0,544(a5) # 83f525e8 + 83f413d0: 1aa7f553 fdiv.d fa0,fa5,fa0 + 83f413d4: 00011797 auipc a5,0x11 + 83f413d8: 1f47b087 fld ft1,500(a5) # 83f525c8 + 83f413dc: fff9f637 lui a2,0xfff9f + 83f413e0: 0006c7b7 lui a5,0x6c + 83f413e4: b866061b addiw a2,a2,-1146 + 83f413e8: 8517879b addiw a5,a5,-1967 + 83f413ec: 0106063b addw a2,a2,a6 + 83f413f0: 4107883b subw a6,a5,a6 + 83f413f4: 01066633 or a2,a2,a6 + 83f413f8: 2601 sext.w a2,a2 + 83f413fa: d20582d3 fcvt.d.w ft5,a1 + 83f413fe: 12a575d3 fmul.d fa1,fa0,fa0 + 83f41402: 12b5f653 fmul.d fa2,fa1,fa1 + 83f41406: 22d676c3 fmadd.d fa3,fa2,fa3,ft4 + 83f4140a: 1ae67743 fmadd.d fa4,fa2,fa4,ft3 + 83f4140e: 12c6f6c3 fmadd.d fa3,fa3,fa2,ft2 + 83f41412: 0ac77743 fmadd.d fa4,fa4,fa2,ft1 + 83f41416: 02c6f6c3 fmadd.d fa3,fa3,fa2,ft0 + 83f4141a: 12b6f6d3 fmul.d fa3,fa3,fa1 + 83f4141e: 6ac77743 fmadd.d fa4,fa4,fa2,fa3 + 83f41422: 06c05d63 blez a2,83f4149c <__ieee754_log+0x1f2> + 83f41426: 00011797 auipc a5,0x11 + 83f4142a: e727b687 fld fa3,-398(a5) # 83f52298 <__func__.1+0xa0> + 83f4142e: 12d7f6d3 fmul.d fa3,fa5,fa3 + 83f41432: 12f6f6d3 fmul.d fa3,fa3,fa5 + 83f41436: 02d77753 fadd.d fa4,fa4,fa3 + 83f4143a: 12a77753 fmul.d fa4,fa4,fa0 + 83f4143e: edc9 bnez a1,83f414d8 <__ieee754_log+0x22e> + 83f41440: 0ae6f553 fsub.d fa0,fa3,fa4 + 83f41444: 0aa7f553 fsub.d fa0,fa5,fa0 + 83f41448: 8082 ret + 83f4144a: f2000553 fmv.d.x fa0,zero + 83f4144e: 00011797 auipc a5,0x11 + 83f41452: 1527b787 fld fa5,338(a5) # 83f525a0 + 83f41456: 1aa7f553 fdiv.d fa0,fa5,fa0 + 83f4145a: 8082 ret + 83f4145c: 00011797 auipc a5,0x11 + 83f41460: 1547b707 fld fa4,340(a5) # 83f525b0 + 83f41464: 00011797 auipc a5,0x11 + 83f41468: e347b687 fld fa3,-460(a5) # 83f52298 <__func__.1+0xa0> + 83f4146c: 12f7f553 fmul.d fa0,fa5,fa5 + 83f41470: 6ae7f74b fnmsub.d fa4,fa5,fa4,fa3 + 83f41474: 12e57553 fmul.d fa0,fa0,fa4 + 83f41478: d5f1 beqz a1,83f41444 <__ieee754_log+0x19a> + 83f4147a: d20586d3 fcvt.d.w fa3,a1 + 83f4147e: 00011797 auipc a5,0x11 + 83f41482: 0ea7b707 fld fa4,234(a5) # 83f52568 + 83f41486: 00011797 auipc a5,0x11 + 83f4148a: 0da7b607 fld fa2,218(a5) # 83f52560 + 83f4148e: 52e6f54b fnmsub.d fa0,fa3,fa4,fa0 + 83f41492: 0af57553 fsub.d fa0,fa0,fa5 + 83f41496: 52c6f547 fmsub.d fa0,fa3,fa2,fa0 + 83f4149a: 8082 ret + 83f4149c: 0ae7f753 fsub.d fa4,fa5,fa4 + 83f414a0: 12a77753 fmul.d fa4,fa4,fa0 + 83f414a4: e581 bnez a1,83f414ac <__ieee754_log+0x202> + 83f414a6: 0ae7f553 fsub.d fa0,fa5,fa4 + 83f414aa: 8082 ret + 83f414ac: 00011797 auipc a5,0x11 + 83f414b0: 0bc7b507 fld fa0,188(a5) # 83f52568 + 83f414b4: 72a2f54b fnmsub.d fa0,ft5,fa0,fa4 + 83f414b8: 00011797 auipc a5,0x11 + 83f414bc: 0a87b707 fld fa4,168(a5) # 83f52560 + 83f414c0: 0af57553 fsub.d fa0,fa0,fa5 + 83f414c4: 52e2f547 fmsub.d fa0,ft5,fa4,fa0 + 83f414c8: 8082 ret + 83f414ca: 0aa577d3 fsub.d fa5,fa0,fa0 + 83f414ce: f2000553 fmv.d.x fa0,zero + 83f414d2: 1aa7f553 fdiv.d fa0,fa5,fa0 + 83f414d6: 8082 ret + 83f414d8: 00011797 auipc a5,0x11 + 83f414dc: 0907b507 fld fa0,144(a5) # 83f52568 + 83f414e0: 72a2f543 fmadd.d fa0,ft5,fa0,fa4 + 83f414e4: 00011797 auipc a5,0x11 + 83f414e8: 07c7b607 fld fa2,124(a5) # 83f52560 + 83f414ec: 0aa6f553 fsub.d fa0,fa3,fa0 + 83f414f0: 0af57553 fsub.d fa0,fa0,fa5 + 83f414f4: 52c2f547 fmsub.d fa0,ft5,fa2,fa0 + 83f414f8: 8082 ret + +0000000083f414fa <__ieee754_pow>: + 83f414fa: 711d addi sp,sp,-96 + 83f414fc: f852 sd s4,48(sp) + 83f414fe: e2058a53 fmv.x.d s4,fa1 + 83f41502: 800007b7 lui a5,0x80000 + 83f41506: f456 sd s5,40(sp) + 83f41508: fff7c793 not a5,a5 + 83f4150c: 420a5a93 srai s5,s4,0x20 + 83f41510: fc4e sd s3,56(sp) + 83f41512: 000a071b sext.w a4,s4 + 83f41516: 00faf9b3 and s3,s5,a5 + 83f4151a: ec86 sd ra,88(sp) + 83f4151c: e8a2 sd s0,80(sp) + 83f4151e: e4a6 sd s1,72(sp) + 83f41520: e0ca sd s2,64(sp) + 83f41522: f05a sd s6,32(sp) + 83f41524: ec5e sd s7,24(sp) + 83f41526: e862 sd s8,16(sp) + 83f41528: a422 fsd fs0,8(sp) + 83f4152a: 00e9e6b3 or a3,s3,a4 + 83f4152e: c6c1 beqz a3,83f415b6 <__ieee754_pow+0xbc> + 83f41530: e2050453 fmv.x.d s0,fa0 + 83f41534: 7ff00637 lui a2,0x7ff00 + 83f41538: 42045b13 srai s6,s0,0x20 + 83f4153c: 00fb74b3 and s1,s6,a5 + 83f41540: 8bda mv s7,s6 + 83f41542: 0004091b sext.w s2,s0 + 83f41546: 06964163 blt a2,s1,83f415a8 <__ieee754_pow+0xae> + 83f4154a: 08c48963 beq s1,a2,83f415dc <__ieee754_pow+0xe2> + 83f4154e: 05364d63 blt a2,s3,83f415a8 <__ieee754_pow+0xae> + 83f41552: 7ff007b7 lui a5,0x7ff00 + 83f41556: 04f98863 beq s3,a5,83f415a6 <__ieee754_pow+0xac> + 83f4155a: 4c01 li s8,0 + 83f4155c: 0a0b4663 bltz s6,83f41608 <__ieee754_pow+0x10e> + 83f41560: ef71 bnez a4,83f4163c <__ieee754_pow+0x142> + 83f41562: 7ff007b7 lui a5,0x7ff00 + 83f41566: 12f98963 beq s3,a5,83f41698 <__ieee754_pow+0x19e> + 83f4156a: 3ff007b7 lui a5,0x3ff00 + 83f4156e: 14f98663 beq s3,a5,83f416ba <__ieee754_pow+0x1c0> + 83f41572: 400007b7 lui a5,0x40000 + 83f41576: 64fa8e63 beq s5,a5,83f41bd2 <__ieee754_pow+0x6d8> + 83f4157a: 3fe007b7 lui a5,0x3fe00 + 83f4157e: 0afa9f63 bne s5,a5,83f4163c <__ieee754_pow+0x142> + 83f41582: 0a0b4d63 bltz s6,83f4163c <__ieee754_pow+0x142> + 83f41586: f2040553 fmv.d.x fa0,s0 + 83f4158a: 6446 ld s0,80(sp) + 83f4158c: 60e6 ld ra,88(sp) + 83f4158e: 64a6 ld s1,72(sp) + 83f41590: 6906 ld s2,64(sp) + 83f41592: 79e2 ld s3,56(sp) + 83f41594: 7a42 ld s4,48(sp) + 83f41596: 7aa2 ld s5,40(sp) + 83f41598: 7b02 ld s6,32(sp) + 83f4159a: 6be2 ld s7,24(sp) + 83f4159c: 6c42 ld s8,16(sp) + 83f4159e: 2422 fld fs0,8(sp) + 83f415a0: 6125 addi sp,sp,96 + 83f415a2: 1930006f j 83f41f34 <__ieee754_sqrt> + 83f415a6: db55 beqz a4,83f4155a <__ieee754_pow+0x60> + 83f415a8: c01007b7 lui a5,0xc0100 + 83f415ac: 9fa5 addw a5,a5,s1 + 83f415ae: 00f967b3 or a5,s2,a5 + 83f415b2: 2781 sext.w a5,a5 + 83f415b4: eb85 bnez a5,83f415e4 <__ieee754_pow+0xea> + 83f415b6: 00011717 auipc a4,0x11 + 83f415ba: d5a73703 ld a4,-678(a4) # 83f52310 <__func__.1+0x118> + 83f415be: 60e6 ld ra,88(sp) + 83f415c0: 6446 ld s0,80(sp) + 83f415c2: 64a6 ld s1,72(sp) + 83f415c4: 6906 ld s2,64(sp) + 83f415c6: 79e2 ld s3,56(sp) + 83f415c8: 7a42 ld s4,48(sp) + 83f415ca: 7aa2 ld s5,40(sp) + 83f415cc: 7b02 ld s6,32(sp) + 83f415ce: 6be2 ld s7,24(sp) + 83f415d0: 6c42 ld s8,16(sp) + 83f415d2: 2422 fld fs0,8(sp) + 83f415d4: f2070553 fmv.d.x fa0,a4 + 83f415d8: 6125 addi sp,sp,96 + 83f415da: 8082 ret + 83f415dc: 00091463 bnez s2,83f415e4 <__ieee754_pow+0xea> + 83f415e0: f734d9e3 bge s1,s3,83f41552 <__ieee754_pow+0x58> + 83f415e4: 6446 ld s0,80(sp) + 83f415e6: 60e6 ld ra,88(sp) + 83f415e8: 64a6 ld s1,72(sp) + 83f415ea: 6906 ld s2,64(sp) + 83f415ec: 79e2 ld s3,56(sp) + 83f415ee: 7a42 ld s4,48(sp) + 83f415f0: 7aa2 ld s5,40(sp) + 83f415f2: 7b02 ld s6,32(sp) + 83f415f4: 6be2 ld s7,24(sp) + 83f415f6: 6c42 ld s8,16(sp) + 83f415f8: 2422 fld fs0,8(sp) + 83f415fa: 00011517 auipc a0,0x11 + 83f415fe: bf650513 addi a0,a0,-1034 # 83f521f0 <__func__.0+0x30> + 83f41602: 6125 addi sp,sp,96 + 83f41604: 4640106f j 83f42a68 + 83f41608: 434007b7 lui a5,0x43400 + 83f4160c: 12f9d163 bge s3,a5,83f4172e <__ieee754_pow+0x234> + 83f41610: 3ff007b7 lui a5,0x3ff00 + 83f41614: 02f9c363 blt s3,a5,83f4163a <__ieee754_pow+0x140> + 83f41618: 4149d79b sraiw a5,s3,0x14 + 83f4161c: c017861b addiw a2,a5,-1023 + 83f41620: 46d1 li a3,20 + 83f41622: 5ac6df63 bge a3,a2,83f41be0 <__ieee754_pow+0x6e6> + 83f41626: 03400693 li a3,52 + 83f4162a: 40c687bb subw a5,a3,a2 + 83f4162e: 00f756bb srlw a3,a4,a5 + 83f41632: 00f697bb sllw a5,a3,a5 + 83f41636: 0ee78563 beq a5,a4,83f41720 <__ieee754_pow+0x226> + 83f4163a: db05 beqz a4,83f4156a <__ieee754_pow+0x70> + 83f4163c: f2040553 fmv.d.x fa0,s0 + 83f41640: b08ff0ef jal ra,83f40948 + 83f41644: e2050753 fmv.x.d a4,fa0 + 83f41648: 00091a63 bnez s2,83f4165c <__ieee754_pow+0x162> + 83f4164c: c8d1 beqz s1,83f416e0 <__ieee754_pow+0x1e6> + 83f4164e: 022b1793 slli a5,s6,0x22 + 83f41652: 9389 srli a5,a5,0x22 + 83f41654: 3ff006b7 lui a3,0x3ff00 + 83f41658: 08d78463 beq a5,a3,83f416e0 <__ieee754_pow+0x1e6> + 83f4165c: 01fbdb9b srliw s7,s7,0x1f + 83f41660: 3bfd addiw s7,s7,-1 + 83f41662: 017c67b3 or a5,s8,s7 + 83f41666: 2781 sext.w a5,a5 + 83f41668: cfe9 beqz a5,83f41742 <__ieee754_pow+0x248> + 83f4166a: 41e007b7 lui a5,0x41e00 + 83f4166e: 0f37d363 bge a5,s3,83f41754 <__ieee754_pow+0x25a> + 83f41672: 43f007b7 lui a5,0x43f00 + 83f41676: 4d37dd63 bge a5,s3,83f41b50 <__ieee754_pow+0x656> + 83f4167a: 3ff007b7 lui a5,0x3ff00 + 83f4167e: 04f4cc63 blt s1,a5,83f416d6 <__ieee754_pow+0x1dc> + 83f41682: 03505963 blez s5,83f416b4 <__ieee754_pow+0x1ba> + 83f41686: 00011797 auipc a5,0x11 + 83f4168a: e1a7b787 fld fa5,-486(a5) # 83f524a0 + 83f4168e: 12f7f7d3 fmul.d fa5,fa5,fa5 + 83f41692: e2078753 fmv.x.d a4,fa5 + 83f41696: b725 j 83f415be <__ieee754_pow+0xc4> + 83f41698: c01007b7 lui a5,0xc0100 + 83f4169c: 9fa5 addw a5,a5,s1 + 83f4169e: 00f967b3 or a5,s2,a5 + 83f416a2: 2781 sext.w a5,a5 + 83f416a4: db89 beqz a5,83f415b6 <__ieee754_pow+0xbc> + 83f416a6: 3ff007b7 lui a5,0x3ff00 + 83f416aa: 46f4ce63 blt s1,a5,83f41b26 <__ieee754_pow+0x62c> + 83f416ae: 8752 mv a4,s4 + 83f416b0: f00ad7e3 bgez s5,83f415be <__ieee754_pow+0xc4> + 83f416b4: 00000713 li a4,0 + 83f416b8: b719 j 83f415be <__ieee754_pow+0xc4> + 83f416ba: 8722 mv a4,s0 + 83f416bc: f00ad1e3 bgez s5,83f415be <__ieee754_pow+0xc4> + 83f416c0: f2040753 fmv.d.x fa4,s0 + 83f416c4: 00011797 auipc a5,0x11 + 83f416c8: c4c7b787 fld fa5,-948(a5) # 83f52310 <__func__.1+0x118> + 83f416cc: 1ae7f7d3 fdiv.d fa5,fa5,fa4 + 83f416d0: e2078753 fmv.x.d a4,fa5 + 83f416d4: b5ed j 83f415be <__ieee754_pow+0xc4> + 83f416d6: fa0ac8e3 bltz s5,83f41686 <__ieee754_pow+0x18c> + 83f416da: 00000713 li a4,0 + 83f416de: b5c5 j 83f415be <__ieee754_pow+0xc4> + 83f416e0: 020ac563 bltz s5,83f4170a <__ieee754_pow+0x210> + 83f416e4: ec0b5de3 bgez s6,83f415be <__ieee754_pow+0xc4> + 83f416e8: c01007b7 lui a5,0xc0100 + 83f416ec: 9fa5 addw a5,a5,s1 + 83f416ee: 00fc67b3 or a5,s8,a5 + 83f416f2: 2781 sext.w a5,a5 + 83f416f4: 52079963 bnez a5,83f41c26 <__ieee754_pow+0x72c> + 83f416f8: f20707d3 fmv.d.x fa5,a4 + 83f416fc: 0af7f7d3 fsub.d fa5,fa5,fa5 + 83f41700: 1af7f7d3 fdiv.d fa5,fa5,fa5 + 83f41704: e2078753 fmv.x.d a4,fa5 + 83f41708: bd5d j 83f415be <__ieee754_pow+0xc4> + 83f4170a: f2070753 fmv.d.x fa4,a4 + 83f4170e: 00011797 auipc a5,0x11 + 83f41712: c027b787 fld fa5,-1022(a5) # 83f52310 <__func__.1+0x118> + 83f41716: 1ae7f7d3 fdiv.d fa5,fa5,fa4 + 83f4171a: e2078753 fmv.x.d a4,fa5 + 83f4171e: b7d9 j 83f416e4 <__ieee754_pow+0x1ea> + 83f41720: 8a85 andi a3,a3,1 + 83f41722: 4c09 li s8,2 + 83f41724: 40dc0c3b subw s8,s8,a3 + 83f41728: e40701e3 beqz a4,83f4156a <__ieee754_pow+0x70> + 83f4172c: bf01 j 83f4163c <__ieee754_pow+0x142> + 83f4172e: 4c09 li s8,2 + 83f41730: bd05 j 83f41560 <__ieee754_pow+0x66> + 83f41732: f2040553 fmv.d.x fa0,s0 + 83f41736: a12ff0ef jal ra,83f40948 + 83f4173a: e2050753 fmv.x.d a4,fa0 + 83f4173e: f00907e3 beqz s2,83f4164c <__ieee754_pow+0x152> + 83f41742: f20407d3 fmv.d.x fa5,s0 + 83f41746: 0af7f7d3 fsub.d fa5,fa5,fa5 + 83f4174a: 1af7f7d3 fdiv.d fa5,fa5,fa5 + 83f4174e: e2078753 fmv.x.d a4,fa5 + 83f41752: b5b5 j 83f415be <__ieee754_pow+0xc4> + 83f41754: 7ff007b7 lui a5,0x7ff00 + 83f41758: 00fb7b33 and s6,s6,a5 + 83f4175c: 4681 li a3,0 + 83f4175e: 020b1063 bnez s6,83f4177e <__ieee754_pow+0x284> + 83f41762: f2070753 fmv.d.x fa4,a4 + 83f41766: 00011797 auipc a5,0x11 + 83f4176a: eaa7b787 fld fa5,-342(a5) # 83f52610 + 83f4176e: fcb00693 li a3,-53 + 83f41772: 12f777d3 fmul.d fa5,fa4,fa5 + 83f41776: e2078753 fmv.x.d a4,fa5 + 83f4177a: 42075493 srai s1,a4,0x20 + 83f4177e: 4144d61b sraiw a2,s1,0x14 + 83f41782: c016061b addiw a2,a2,-1023 + 83f41786: 02c49793 slli a5,s1,0x2c + 83f4178a: 0003a537 lui a0,0x3a + 83f4178e: 00d605bb addw a1,a2,a3 + 83f41792: 93b1 srli a5,a5,0x2c + 83f41794: 3ff006b7 lui a3,0x3ff00 + 83f41798: 88e50513 addi a0,a0,-1906 # 3988e <_STACK_SIZE+0x1988e> + 83f4179c: 8edd or a3,a3,a5 + 83f4179e: 38f55d63 bge a0,a5,83f41b38 <__ieee754_pow+0x63e> + 83f417a2: 000bb537 lui a0,0xbb + 83f417a6: 67950513 addi a0,a0,1657 # bb679 + 83f417aa: 48f55863 bge a0,a5,83f41c3a <__ieee754_pow+0x740> + 83f417ae: f20002d3 fmv.d.x ft5,zero + 83f417b2: 00011797 auipc a5,0x11 + 83f417b6: b5e7b587 fld fa1,-1186(a5) # 83f52310 <__func__.1+0x118> + 83f417ba: 22b587d3 fmv.d fa5,fa1 + 83f417be: 22528853 fmv.d fa6,ft5 + 83f417c2: fff007b7 lui a5,0xfff00 + 83f417c6: 2585 addiw a1,a1,1 + 83f417c8: 9ebd addw a3,a3,a5 + 83f417ca: 4801 li a6,0 + 83f417cc: 557d li a0,-1 + 83f417ce: 02055793 srli a5,a0,0x20 + 83f417d2: 02069613 slli a2,a3,0x20 + 83f417d6: 8ff9 and a5,a5,a4 + 83f417d8: 8fd1 or a5,a5,a2 + 83f417da: f2078753 fmv.d.x fa4,a5 + 83f417de: 20000737 lui a4,0x20000 + 83f417e2: 4016d69b sraiw a3,a3,0x1 + 83f417e6: 02e7f1d3 fadd.d ft3,fa5,fa4 + 83f417ea: 0af77253 fsub.d ft4,fa4,fa5 + 83f417ee: 00080637 lui a2,0x80 + 83f417f2: 8ed9 or a3,a3,a4 + 83f417f4: 9eb1 addw a3,a3,a2 + 83f417f6: 010686bb addw a3,a3,a6 + 83f417fa: 1682 slli a3,a3,0x20 + 83f417fc: 1a35f1d3 fdiv.d ft3,fa1,ft3 + 83f41800: f2068753 fmv.d.x fa4,a3 + 83f41804: 00011717 auipc a4,0x11 + 83f41808: e1c73507 fld fa0,-484(a4) # 83f52620 + 83f4180c: 00011717 auipc a4,0x11 + 83f41810: e0c73687 fld fa3,-500(a4) # 83f52618 + 83f41814: 0af777d3 fsub.d fa5,fa4,fa5 + 83f41818: f2078753 fmv.d.x fa4,a5 + 83f4181c: 00011797 auipc a5,0x11 + 83f41820: e447b387 fld ft7,-444(a5) # 83f52660 + 83f41824: 00011797 auipc a5,0x11 + 83f41828: e2c7b887 fld fa7,-468(a5) # 83f52650 + 83f4182c: 02051713 slli a4,a0,0x20 + 83f41830: 00011617 auipc a2,0x11 + 83f41834: e1863107 fld ft2,-488(a2) # 83f52648 + 83f41838: 00011617 auipc a2,0x11 + 83f4183c: df063f87 fld ft11,-528(a2) # 83f52628 + 83f41840: 0af777d3 fsub.d fa5,fa4,fa5 + 83f41844: 00011797 auipc a5,0x11 + 83f41848: e147b707 fld fa4,-492(a5) # 83f52658 + 83f4184c: 00011617 auipc a2,0x11 + 83f41850: de463f07 fld ft10,-540(a2) # 83f52630 + 83f41854: 00011617 auipc a2,0x11 + 83f41858: de463e87 fld ft9,-540(a2) # 83f52638 + 83f4185c: 00011617 auipc a2,0x11 + 83f41860: de463e07 fld ft8,-540(a2) # 83f52640 + 83f41864: f2068453 fmv.d.x fs0,a3 + 83f41868: d20580d3 fcvt.d.w ft1,a1 + 83f4186c: 12327653 fmul.d fa2,ft4,ft3 + 83f41870: 12c67053 fmul.d ft0,fa2,fa2 + 83f41874: e20607d3 fmv.x.d a5,fa2 + 83f41878: 00f77633 and a2,a4,a5 + 83f4187c: f2060653 fmv.d.x fa2,a2 + 83f41880: 52d076c3 fmadd.d fa3,ft0,fa3,fa0 + 83f41884: 2286724b fnmsub.d ft4,fa2,fs0,ft4 + 83f41888: f2060453 fmv.d.x fs0,a2 + 83f4188c: f2078653 fmv.d.x fa2,a5 + 83f41890: 12007553 fmul.d fa0,ft0,ft0 + 83f41894: 02867353 fadd.d ft6,fa2,fs0 + 83f41898: fa06f6c3 fmadd.d fa3,fa3,ft0,ft11 + 83f4189c: 22f477cb fnmsub.d fa5,fs0,fa5,ft4 + 83f418a0: 12847643 fmadd.d fa2,fs0,fs0,ft2 + 83f418a4: f206f6c3 fmadd.d fa3,fa3,ft0,ft10 + 83f418a8: 1237f7d3 fmul.d fa5,fa5,ft3 + 83f418ac: ea06f6c3 fmadd.d fa3,fa3,ft0,ft9 + 83f418b0: 12f37353 fmul.d ft6,ft6,fa5 + 83f418b4: e206f6c3 fmadd.d fa3,fa3,ft0,ft8 + 83f418b8: 32d576c3 fmadd.d fa3,fa0,fa3,ft6 + 83f418bc: 02d67653 fadd.d fa2,fa2,fa3 + 83f418c0: e20606d3 fmv.x.d a3,fa2 + 83f418c4: 8ef9 and a3,a3,a4 + 83f418c6: f2068653 fmv.d.x fa2,a3 + 83f418ca: 0a267653 fsub.d fa2,fa2,ft2 + 83f418ce: 6284764b fnmsub.d fa2,fs0,fs0,fa2 + 83f418d2: 0ac6f6d3 fsub.d fa3,fa3,fa2 + 83f418d6: f2078653 fmv.d.x fa2,a5 + 83f418da: 12c6f6d3 fmul.d fa3,fa3,fa2 + 83f418de: f2068653 fmv.d.x fa2,a3 + 83f418e2: 6ac7f7c3 fmadd.d fa5,fa5,fa2,fa3 + 83f418e6: 7a8676c3 fmadd.d fa3,fa2,fs0,fa5 + 83f418ea: e20687d3 fmv.x.d a5,fa3 + 83f418ee: 8ff9 and a5,a5,a4 + 83f418f0: f2078553 fmv.d.x fa0,a5 + 83f418f4: 52c476cb fnmsub.d fa3,fs0,fa2,fa0 + 83f418f8: 0ad7f7d3 fsub.d fa5,fa5,fa3 + 83f418fc: 1317f7d3 fmul.d fa5,fa5,fa7 + 83f41900: 7aa777c3 fmadd.d fa5,fa4,fa0,fa5 + 83f41904: 0307f7d3 fadd.d fa5,fa5,fa6 + 83f41908: 7aa3f743 fmadd.d fa4,ft7,fa0,fa5 + 83f4190c: 02577753 fadd.d fa4,fa4,ft5 + 83f41910: 02177753 fadd.d fa4,fa4,ft1 + 83f41914: e20706d3 fmv.x.d a3,fa4 + 83f41918: 8f75 and a4,a4,a3 + 83f4191a: f2070753 fmv.d.x fa4,a4 + 83f4191e: 0a1776d3 fsub.d fa3,fa4,ft1 + 83f41922: 0a56f6d3 fsub.d fa3,fa3,ft5 + 83f41926: 6a7576cb fnmsub.d fa3,fa0,ft7,fa3 + 83f4192a: 0ad7f6d3 fsub.d fa3,fa5,fa3 + 83f4192e: 3c7d addiw s8,s8,-1 + 83f41930: 017c6bb3 or s7,s8,s7 + 83f41934: 2b81 sext.w s7,s7 + 83f41936: 22b58453 fmv.d fs0,fa1 + 83f4193a: 000b9663 bnez s7,83f41946 <__ieee754_pow+0x44c> + 83f4193e: 00011797 auipc a5,0x11 + 83f41942: b727b407 fld fs0,-1166(a5) # 83f524b0 + 83f41946: 020a5793 srli a5,s4,0x20 + 83f4194a: 1782 slli a5,a5,0x20 + 83f4194c: f2078653 fmv.d.x fa2,a5 + 83f41950: f20a07d3 fmv.d.x fa5,s4 + 83f41954: 40900637 lui a2,0x40900 + 83f41958: 0ac7f7d3 fsub.d fa5,fa5,fa2 + 83f4195c: f20a0653 fmv.d.x fa2,s4 + 83f41960: 12c6f6d3 fmul.d fa3,fa3,fa2 + 83f41964: f2078653 fmv.d.x fa2,a5 + 83f41968: 12c77653 fmul.d fa2,fa4,fa2 + 83f4196c: 6ae7f7c3 fmadd.d fa5,fa5,fa4,fa3 + 83f41970: 02c7f753 fadd.d fa4,fa5,fa2 + 83f41974: e20706d3 fmv.x.d a3,fa4 + 83f41978: 4206d593 srai a1,a3,0x20 + 83f4197c: 0006871b sext.w a4,a3 + 83f41980: 16c5c163 blt a1,a2,83f41ae2 <__ieee754_pow+0x5e8> + 83f41984: bf7007b7 lui a5,0xbf700 + 83f41988: 9fad addw a5,a5,a1 + 83f4198a: 8fd9 or a5,a5,a4 + 83f4198c: 2781 sext.w a5,a5 + 83f4198e: 28079163 bnez a5,83f41c10 <__ieee754_pow+0x716> + 83f41992: f20686d3 fmv.d.x fa3,a3 + 83f41996: 00011797 auipc a5,0x11 + 83f4199a: cd27b707 fld fa4,-814(a5) # 83f52668 + 83f4199e: 02e7f753 fadd.d fa4,fa5,fa4 + 83f419a2: 0ac6f6d3 fsub.d fa3,fa3,fa2 + 83f419a6: a2e697d3 flt.d a5,fa3,fa4 + 83f419aa: 26079363 bnez a5,83f41c10 <__ieee754_pow+0x716> + 83f419ae: 4145d79b sraiw a5,a1,0x14 + 83f419b2: 7ff7f793 andi a5,a5,2047 + 83f419b6: 00100537 lui a0,0x100 + 83f419ba: c027879b addiw a5,a5,-1022 + 83f419be: 40f557bb sraw a5,a0,a5 + 83f419c2: 9fad addw a5,a5,a1 + 83f419c4: 4147d69b sraiw a3,a5,0x14 + 83f419c8: 7ff6f693 andi a3,a3,2047 + 83f419cc: c016869b addiw a3,a3,-1023 + 83f419d0: fff5061b addiw a2,a0,-1 + 83f419d4: 02c79713 slli a4,a5,0x2c + 83f419d8: 40d6563b sraw a2,a2,a3 + 83f419dc: 9331 srli a4,a4,0x2c + 83f419de: 8f49 or a4,a4,a0 + 83f419e0: fff64613 not a2,a2 + 83f419e4: 4551 li a0,20 + 83f419e6: 40d506bb subw a3,a0,a3 + 83f419ea: 8ff1 and a5,a5,a2 + 83f419ec: 40d7553b sraw a0,a4,a3 + 83f419f0: 1782 slli a5,a5,0x20 + 83f419f2: 0005d463 bgez a1,83f419fa <__ieee754_pow+0x500> + 83f419f6: 40a0053b negw a0,a0 + 83f419fa: f2078753 fmv.d.x fa4,a5 + 83f419fe: 0145161b slliw a2,a0,0x14 + 83f41a02: 0ae67653 fsub.d fa2,fa2,fa4 + 83f41a06: 02c7f753 fadd.d fa4,fa5,fa2 + 83f41a0a: e20706d3 fmv.x.d a3,fa4 + 83f41a0e: 57fd li a5,-1 + 83f41a10: 02079713 slli a4,a5,0x20 + 83f41a14: 8ef9 and a3,a3,a4 + 83f41a16: f2068753 fmv.d.x fa4,a3 + 83f41a1a: 00011717 auipc a4,0x11 + 83f41a1e: c5e73687 fld fa3,-930(a4) # 83f52678 + 83f41a22: 00011717 auipc a4,0x11 + 83f41a26: c5e73287 fld ft5,-930(a4) # 83f52680 + 83f41a2a: 0ac77653 fsub.d fa2,fa4,fa2 + 83f41a2e: 12e6f6d3 fmul.d fa3,fa3,fa4 + 83f41a32: 00011717 auipc a4,0x11 + 83f41a36: c5673507 fld fa0,-938(a4) # 83f52688 + 83f41a3a: 00011717 auipc a4,0x11 + 83f41a3e: b3673707 fld fa4,-1226(a4) # 83f52570 + 83f41a42: 00011717 auipc a4,0x11 + 83f41a46: b3673207 fld ft4,-1226(a4) # 83f52578 + 83f41a4a: 00011717 auipc a4,0x11 + 83f41a4e: b3673187 fld ft3,-1226(a4) # 83f52580 + 83f41a52: 00011717 auipc a4,0x11 + 83f41a56: b3673107 fld ft2,-1226(a4) # 83f52588 + 83f41a5a: 0ac7f7d3 fsub.d fa5,fa5,fa2 + 83f41a5e: 00011717 auipc a4,0x11 + 83f41a62: b3273087 fld ft1,-1230(a4) # 83f52590 + 83f41a66: 00011717 auipc a4,0x11 + 83f41a6a: a4273007 fld ft0,-1470(a4) # 83f524a8 + 83f41a6e: 6a57f7c3 fmadd.d fa5,fa5,ft5,fa3 + 83f41a72: f20686d3 fmv.d.x fa3,a3 + 83f41a76: f20682d3 fmv.d.x ft5,a3 + 83f41a7a: 7ad57643 fmadd.d fa2,fa0,fa3,fa5 + 83f41a7e: 12c676d3 fmul.d fa3,fa2,fa2 + 83f41a82: 62a2f54b fnmsub.d fa0,ft5,fa0,fa2 + 83f41a86: 22e6f743 fmadd.d fa4,fa3,fa4,ft4 + 83f41a8a: 0aa7f7d3 fsub.d fa5,fa5,fa0 + 83f41a8e: 1ad77743 fmadd.d fa4,fa4,fa3,ft3 + 83f41a92: 7af677c3 fmadd.d fa5,fa2,fa5,fa5 + 83f41a96: 12d77743 fmadd.d fa4,fa4,fa3,ft2 + 83f41a9a: 0ad77743 fmadd.d fa4,fa4,fa3,ft1 + 83f41a9e: 62d7774b fnmsub.d fa4,fa4,fa3,fa2 + 83f41aa2: 12e676d3 fmul.d fa3,fa2,fa4 + 83f41aa6: 0a077753 fsub.d fa4,fa4,ft0 + 83f41aaa: 1ae6f753 fdiv.d fa4,fa3,fa4 + 83f41aae: 0af777d3 fsub.d fa5,fa4,fa5 + 83f41ab2: 0ac7f7d3 fsub.d fa5,fa5,fa2 + 83f41ab6: 0af5f7d3 fsub.d fa5,fa1,fa5 + 83f41aba: e2078753 fmv.x.d a4,fa5 + 83f41abe: 42075693 srai a3,a4,0x20 + 83f41ac2: 9e35 addw a2,a2,a3 + 83f41ac4: 4146569b sraiw a3,a2,0x14 + 83f41ac8: 18d05c63 blez a3,83f41c60 <__ieee754_pow+0x766> + 83f41acc: 9381 srli a5,a5,0x20 + 83f41ace: 1602 slli a2,a2,0x20 + 83f41ad0: 8f7d and a4,a4,a5 + 83f41ad2: 8f51 or a4,a4,a2 + 83f41ad4: f20707d3 fmv.d.x fa5,a4 + 83f41ad8: 1287f7d3 fmul.d fa5,fa5,fs0 + 83f41adc: e2078753 fmv.x.d a4,fa5 + 83f41ae0: bcf9 j 83f415be <__ieee754_pow+0xc4> + 83f41ae2: 02159793 slli a5,a1,0x21 + 83f41ae6: 4090d637 lui a2,0x4090d + 83f41aea: 9385 srli a5,a5,0x21 + 83f41aec: bff60613 addi a2,a2,-1025 # 4090cbff + 83f41af0: 10f65863 bge a2,a5,83f41c00 <__ieee754_pow+0x706> + 83f41af4: 3f6f37b7 lui a5,0x3f6f3 + 83f41af8: 4007879b addiw a5,a5,1024 + 83f41afc: 9fad addw a5,a5,a1 + 83f41afe: 8fd9 or a5,a5,a4 + 83f41b00: 2781 sext.w a5,a5 + 83f41b02: e799 bnez a5,83f41b10 <__ieee754_pow+0x616> + 83f41b04: 0ac77753 fsub.d fa4,fa4,fa2 + 83f41b08: a2e787d3 fle.d a5,fa5,fa4 + 83f41b0c: ea0781e3 beqz a5,83f419ae <__ieee754_pow+0x4b4> + 83f41b10: 00011797 auipc a5,0x11 + 83f41b14: b607b787 fld fa5,-1184(a5) # 83f52670 + 83f41b18: 12f47453 fmul.d fs0,fs0,fa5 + 83f41b1c: 12f477d3 fmul.d fa5,fs0,fa5 + 83f41b20: e2078753 fmv.x.d a4,fa5 + 83f41b24: bc69 j 83f415be <__ieee754_pow+0xc4> + 83f41b26: b80ad7e3 bgez s5,83f416b4 <__ieee754_pow+0x1ba> + 83f41b2a: f20a07d3 fmv.d.x fa5,s4 + 83f41b2e: 22f797d3 fneg.d fa5,fa5 + 83f41b32: e2078753 fmv.x.d a4,fa5 + 83f41b36: b461 j 83f415be <__ieee754_pow+0xc4> + 83f41b38: f20002d3 fmv.d.x ft5,zero + 83f41b3c: 00010797 auipc a5,0x10 + 83f41b40: 7d47b587 fld fa1,2004(a5) # 83f52310 <__func__.1+0x118> + 83f41b44: 22b587d3 fmv.d fa5,fa1 + 83f41b48: 22528853 fmv.d fa6,ft5 + 83f41b4c: 4801 li a6,0 + 83f41b4e: b9bd j 83f417cc <__ieee754_pow+0x2d2> + 83f41b50: 3ff007b7 lui a5,0x3ff00 + 83f41b54: ffe78693 addi a3,a5,-2 # 3feffffe + 83f41b58: b696dfe3 bge a3,s1,83f416d6 <__ieee754_pow+0x1dc> + 83f41b5c: b297c3e3 blt a5,s1,83f41682 <__ieee754_pow+0x188> + 83f41b60: f20707d3 fmv.d.x fa5,a4 + 83f41b64: 00010797 auipc a5,0x10 + 83f41b68: 7ac7b587 fld fa1,1964(a5) # 83f52310 <__func__.1+0x118> + 83f41b6c: 00011797 auipc a5,0x11 + 83f41b70: a447b707 fld fa4,-1468(a5) # 83f525b0 + 83f41b74: 0ab7f7d3 fsub.d fa5,fa5,fa1 + 83f41b78: 00010797 auipc a5,0x10 + 83f41b7c: 7a87b607 fld fa2,1960(a5) # 83f52320 <__func__.1+0x128> + 83f41b80: 00010797 auipc a5,0x10 + 83f41b84: 7187b087 fld ft1,1816(a5) # 83f52298 <__func__.1+0xa0> + 83f41b88: 00011797 auipc a5,0x11 + 83f41b8c: 9d07b007 fld ft0,-1584(a5) # 83f52558 + 83f41b90: 00011797 auipc a5,0x11 + 83f41b94: a707b687 fld fa3,-1424(a5) # 83f52600 + 83f41b98: 00011797 auipc a5,0x11 + 83f41b9c: a707b507 fld fa0,-1424(a5) # 83f52608 + 83f41ba0: 72c7f64b fnmsub.d fa2,fa5,fa2,fa4 + 83f41ba4: 12f7f753 fmul.d fa4,fa5,fa5 + 83f41ba8: 0af6764b fnmsub.d fa2,fa2,fa5,ft1 + 83f41bac: 12c77753 fmul.d fa4,fa4,fa2 + 83f41bb0: 12077753 fmul.d fa4,fa4,ft0 + 83f41bb4: 72d7f6c7 fmsub.d fa3,fa5,fa3,fa4 + 83f41bb8: 6aa7f743 fmadd.d fa4,fa5,fa0,fa3 + 83f41bbc: e20707d3 fmv.x.d a5,fa4 + 83f41bc0: 9381 srli a5,a5,0x20 + 83f41bc2: 1782 slli a5,a5,0x20 + 83f41bc4: f2078753 fmv.d.x fa4,a5 + 83f41bc8: 72a7f7cb fnmsub.d fa5,fa5,fa0,fa4 + 83f41bcc: 0af6f6d3 fsub.d fa3,fa3,fa5 + 83f41bd0: bbb9 j 83f4192e <__ieee754_pow+0x434> + 83f41bd2: f20407d3 fmv.d.x fa5,s0 + 83f41bd6: 12f7f7d3 fmul.d fa5,fa5,fa5 + 83f41bda: e2078753 fmv.x.d a4,fa5 + 83f41bde: b2c5 j 83f415be <__ieee754_pow+0xc4> + 83f41be0: b40719e3 bnez a4,83f41732 <__ieee754_pow+0x238> + 83f41be4: 4751 li a4,20 + 83f41be6: 40c707bb subw a5,a4,a2 + 83f41bea: 40f9d73b sraw a4,s3,a5 + 83f41bee: 00f717bb sllw a5,a4,a5 + 83f41bf2: 97379ce3 bne a5,s3,83f4156a <__ieee754_pow+0x70> + 83f41bf6: 8b05 andi a4,a4,1 + 83f41bf8: 4c09 li s8,2 + 83f41bfa: 40ec0c3b subw s8,s8,a4 + 83f41bfe: b2b5 j 83f4156a <__ieee754_pow+0x70> + 83f41c00: 3fe00737 lui a4,0x3fe00 + 83f41c04: 4601 li a2,0 + 83f41c06: 4501 li a0,0 + 83f41c08: e0f753e3 bge a4,a5,83f41a0e <__ieee754_pow+0x514> + 83f41c0c: 83d1 srli a5,a5,0x14 + 83f41c0e: b365 j 83f419b6 <__ieee754_pow+0x4bc> + 83f41c10: 00011797 auipc a5,0x11 + 83f41c14: 8907b787 fld fa5,-1904(a5) # 83f524a0 + 83f41c18: 12f47453 fmul.d fs0,fs0,fa5 + 83f41c1c: 12f477d3 fmul.d fa5,fs0,fa5 + 83f41c20: e2078753 fmv.x.d a4,fa5 + 83f41c24: ba69 j 83f415be <__ieee754_pow+0xc4> + 83f41c26: 4785 li a5,1 + 83f41c28: 98fc1be3 bne s8,a5,83f415be <__ieee754_pow+0xc4> + 83f41c2c: f20707d3 fmv.d.x fa5,a4 + 83f41c30: 22f797d3 fneg.d fa5,fa5 + 83f41c34: e2078753 fmv.x.d a4,fa5 + 83f41c38: b259 j 83f415be <__ieee754_pow+0xc4> + 83f41c3a: 00011797 auipc a5,0x11 + 83f41c3e: 9b67b287 fld ft5,-1610(a5) # 83f525f0 + 83f41c42: 00011797 auipc a5,0x11 + 83f41c46: 9b67b807 fld fa6,-1610(a5) # 83f525f8 + 83f41c4a: 00040837 lui a6,0x40 + 83f41c4e: 00011797 auipc a5,0x11 + 83f41c52: 86a7b787 fld fa5,-1942(a5) # 83f524b8 + 83f41c56: 00010797 auipc a5,0x10 + 83f41c5a: 6ba7b587 fld fa1,1722(a5) # 83f52310 <__func__.1+0x118> + 83f41c5e: b6bd j 83f417cc <__ieee754_pow+0x2d2> + 83f41c60: 22f78553 fmv.d fa0,fa5 + 83f41c64: 779000ef jal ra,83f42bdc + 83f41c68: e2050753 fmv.x.d a4,fa0 + 83f41c6c: b5a5 j 83f41ad4 <__ieee754_pow+0x5da> + +0000000083f41c6e <__ieee754_rem_pio2>: + 83f41c6e: e20507d3 fmv.x.d a5,fa0 + 83f41c72: 7139 addi sp,sp,-64 + 83f41c74: f04a sd s2,32(sp) + 83f41c76: 4207d913 srai s2,a5,0x20 + 83f41c7a: f822 sd s0,48(sp) + 83f41c7c: 3fe92737 lui a4,0x3fe92 + 83f41c80: 02191413 slli s0,s2,0x21 + 83f41c84: f426 sd s1,40(sp) + 83f41c86: fc06 sd ra,56(sp) + 83f41c88: 1fb70713 addi a4,a4,507 # 3fe921fb + 83f41c8c: 9005 srli s0,s0,0x21 + 83f41c8e: 84aa mv s1,a0 + 83f41c90: 0e875a63 bge a4,s0,83f41d84 <__ieee754_rem_pio2+0x116> + 83f41c94: 4002e737 lui a4,0x4002e + 83f41c98: 97b70713 addi a4,a4,-1669 # 4002d97b + 83f41c9c: 04874363 blt a4,s0,83f41ce2 <__ieee754_rem_pio2+0x74> + 83f41ca0: 00011717 auipc a4,0x11 + 83f41ca4: 9f073787 fld fa5,-1552(a4) # 83f52690 + 83f41ca8: 3ff92737 lui a4,0x3ff92 + 83f41cac: 1fb70713 addi a4,a4,507 # 3ff921fb + 83f41cb0: 23205c63 blez s2,83f41ee8 <__ieee754_rem_pio2+0x27a> + 83f41cb4: 0af577d3 fsub.d fa5,fa0,fa5 + 83f41cb8: 0ee40663 beq s0,a4,83f41da4 <__ieee754_rem_pio2+0x136> + 83f41cbc: 00011797 auipc a5,0x11 + 83f41cc0: 9dc7b707 fld fa4,-1572(a5) # 83f52698 + 83f41cc4: 0ae7f6d3 fsub.d fa3,fa5,fa4 + 83f41cc8: 4505 li a0,1 + 83f41cca: 0ad7f7d3 fsub.d fa5,fa5,fa3 + 83f41cce: a094 fsd fa3,0(s1) + 83f41cd0: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f41cd4: a49c fsd fa5,8(s1) + 83f41cd6: 70e2 ld ra,56(sp) + 83f41cd8: 7442 ld s0,48(sp) + 83f41cda: 74a2 ld s1,40(sp) + 83f41cdc: 7902 ld s2,32(sp) + 83f41cde: 6121 addi sp,sp,64 + 83f41ce0: 8082 ret + 83f41ce2: 41392737 lui a4,0x41392 + 83f41ce6: 1fb70713 addi a4,a4,507 # 413921fb + 83f41cea: 0e875663 bge a4,s0,83f41dd6 <__ieee754_rem_pio2+0x168> + 83f41cee: 7ff00737 lui a4,0x7ff00 + 83f41cf2: 0ae45363 bge s0,a4,83f41d98 <__ieee754_rem_pio2+0x12a> + 83f41cf6: 4144561b sraiw a2,s0,0x14 + 83f41cfa: bea6061b addiw a2,a2,-1046 + 83f41cfe: 86be mv a3,a5 + 83f41d00: 0146179b slliw a5,a2,0x14 + 83f41d04: 9c1d subw s0,s0,a5 + 83f41d06: 1682 slli a3,a3,0x20 + 83f41d08: 9281 srli a3,a3,0x20 + 83f41d0a: 1402 slli s0,s0,0x20 + 83f41d0c: 8c55 or s0,s0,a3 + 83f41d0e: f20407d3 fmv.d.x fa5,s0 + 83f41d12: f20406d3 fmv.d.x fa3,s0 + 83f41d16: 00011717 auipc a4,0x11 + 83f41d1a: 9b273707 fld fa4,-1614(a4) # 83f526c8 + 83f41d1e: c20797d3 fcvt.w.d a5,fa5,rtz + 83f41d22: 468d li a3,3 + 83f41d24: d20787d3 fcvt.d.w fa5,a5 + 83f41d28: 0af6f6d3 fsub.d fa3,fa3,fa5 + 83f41d2c: a43e fsd fa5,8(sp) + 83f41d2e: 12e6f7d3 fmul.d fa5,fa3,fa4 + 83f41d32: c20797d3 fcvt.w.d a5,fa5,rtz + 83f41d36: d20786d3 fcvt.d.w fa3,a5 + 83f41d3a: 2781 sext.w a5,a5 + 83f41d3c: 0ad7f7d3 fsub.d fa5,fa5,fa3 + 83f41d40: a836 fsd fa3,16(sp) + 83f41d42: 12e7f7d3 fmul.d fa5,fa5,fa4 + 83f41d46: f2000753 fmv.d.x fa4,zero + 83f41d4a: a2e7a753 feq.d a4,fa5,fa4 + 83f41d4e: ac3e fsd fa5,24(sp) + 83f41d50: c701 beqz a4,83f41d58 <__ieee754_rem_pio2+0xea> + 83f41d52: 00f036b3 snez a3,a5 + 83f41d56: 0685 addi a3,a3,1 + 83f41d58: 0000f797 auipc a5,0xf + 83f41d5c: da078793 addi a5,a5,-608 # 83f50af8 + 83f41d60: 4709 li a4,2 + 83f41d62: 85a6 mv a1,s1 + 83f41d64: 0028 addi a0,sp,8 + 83f41d66: 4f2000ef jal ra,83f42258 <__kernel_rem_pio2> + 83f41d6a: f60956e3 bgez s2,83f41cd6 <__ieee754_rem_pio2+0x68> + 83f41d6e: 2098 fld fa4,0(s1) + 83f41d70: 249c fld fa5,8(s1) + 83f41d72: 40a0053b negw a0,a0 + 83f41d76: 22e71753 fneg.d fa4,fa4 + 83f41d7a: 22f797d3 fneg.d fa5,fa5 + 83f41d7e: a098 fsd fa4,0(s1) + 83f41d80: a49c fsd fa5,8(s1) + 83f41d82: bf91 j 83f41cd6 <__ieee754_rem_pio2+0x68> + 83f41d84: 70e2 ld ra,56(sp) + 83f41d86: 7442 ld s0,48(sp) + 83f41d88: a088 fsd fa0,0(s1) + 83f41d8a: 00053423 sd zero,8(a0) # 100008 + 83f41d8e: 74a2 ld s1,40(sp) + 83f41d90: 7902 ld s2,32(sp) + 83f41d92: 4501 li a0,0 + 83f41d94: 6121 addi sp,sp,64 + 83f41d96: 8082 ret + 83f41d98: 0aa577d3 fsub.d fa5,fa0,fa0 + 83f41d9c: 4501 li a0,0 + 83f41d9e: a49c fsd fa5,8(s1) + 83f41da0: a09c fsd fa5,0(s1) + 83f41da2: bf15 j 83f41cd6 <__ieee754_rem_pio2+0x68> + 83f41da4: 00011797 auipc a5,0x11 + 83f41da8: 8fc7b707 fld fa4,-1796(a5) # 83f526a0 + 83f41dac: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f41db0: 00011797 auipc a5,0x11 + 83f41db4: 8f87b707 fld fa4,-1800(a5) # 83f526a8 + 83f41db8: 70e2 ld ra,56(sp) + 83f41dba: 7442 ld s0,48(sp) + 83f41dbc: 7902 ld s2,32(sp) + 83f41dbe: 4505 li a0,1 + 83f41dc0: 0ae7f6d3 fsub.d fa3,fa5,fa4 + 83f41dc4: 0ad7f7d3 fsub.d fa5,fa5,fa3 + 83f41dc8: a094 fsd fa3,0(s1) + 83f41dca: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f41dce: a49c fsd fa5,8(s1) + 83f41dd0: 74a2 ld s1,40(sp) + 83f41dd2: 6121 addi sp,sp,64 + 83f41dd4: 8082 ret + 83f41dd6: b73fe0ef jal ra,83f40948 + 83f41dda: 00011797 auipc a5,0x11 + 83f41dde: 8d67b687 fld fa3,-1834(a5) # 83f526b0 + 83f41de2: 00010797 auipc a5,0x10 + 83f41de6: 4b67b607 fld fa2,1206(a5) # 83f52298 <__func__.1+0xa0> + 83f41dea: 62d576c3 fmadd.d fa3,fa0,fa3,fa2 + 83f41dee: 00011797 auipc a5,0x11 + 83f41df2: 8a27b787 fld fa5,-1886(a5) # 83f52690 + 83f41df6: 00011797 auipc a5,0x11 + 83f41dfa: 8a27b707 fld fa4,-1886(a5) # 83f52698 + 83f41dfe: 47fd li a5,31 + 83f41e00: c20696d3 fcvt.w.d a3,fa3,rtz + 83f41e04: d20686d3 fcvt.d.w fa3,a3 + 83f41e08: 0006851b sext.w a0,a3 + 83f41e0c: 52f6f54b fnmsub.d fa0,fa3,fa5,fa0 + 83f41e10: 12e6f7d3 fmul.d fa5,fa3,fa4 + 83f41e14: 04a7c563 blt a5,a0,83f41e5e <__ieee754_rem_pio2+0x1f0> + 83f41e18: 0af57753 fsub.d fa4,fa0,fa5 + 83f41e1c: fff6879b addiw a5,a3,-1 + 83f41e20: 00279713 slli a4,a5,0x2 + 83f41e24: 0000f797 auipc a5,0xf + 83f41e28: c5478793 addi a5,a5,-940 # 83f50a78 + 83f41e2c: 97ba add a5,a5,a4 + 83f41e2e: 4398 lw a4,0(a5) + 83f41e30: e20707d3 fmv.x.d a5,fa4 + 83f41e34: 02870963 beq a4,s0,83f41e66 <__ieee754_rem_pio2+0x1f8> + 83f41e38: e09c sd a5,0(s1) + 83f41e3a: f2078753 fmv.d.x fa4,a5 + 83f41e3e: 0ae57553 fsub.d fa0,fa0,fa4 + 83f41e42: 0af57553 fsub.d fa0,fa0,fa5 + 83f41e46: a488 fsd fa0,8(s1) + 83f41e48: e80957e3 bgez s2,83f41cd6 <__ieee754_rem_pio2+0x68> + 83f41e4c: 22e717d3 fneg.d fa5,fa4 + 83f41e50: 22a51553 fneg.d fa0,fa0 + 83f41e54: 40d0053b negw a0,a3 + 83f41e58: a09c fsd fa5,0(s1) + 83f41e5a: a488 fsd fa0,8(s1) + 83f41e5c: bdad j 83f41cd6 <__ieee754_rem_pio2+0x68> + 83f41e5e: 0af57753 fsub.d fa4,fa0,fa5 + 83f41e62: e20707d3 fmv.x.d a5,fa4 + 83f41e66: 0347d713 srli a4,a5,0x34 + 83f41e6a: 4144541b sraiw s0,s0,0x14 + 83f41e6e: 7ff77713 andi a4,a4,2047 + 83f41e72: 40e4073b subw a4,s0,a4 + 83f41e76: 4641 li a2,16 + 83f41e78: fce650e3 bge a2,a4,83f41e38 <__ieee754_rem_pio2+0x1ca> + 83f41e7c: 00011797 auipc a5,0x11 + 83f41e80: 8247b607 fld fa2,-2012(a5) # 83f526a0 + 83f41e84: 52c6f74b fnmsub.d fa4,fa3,fa2,fa0 + 83f41e88: 00011797 auipc a5,0x11 + 83f41e8c: 8207b787 fld fa5,-2016(a5) # 83f526a8 + 83f41e90: 03100613 li a2,49 + 83f41e94: 0ae57553 fsub.d fa0,fa0,fa4 + 83f41e98: 52c6f54b fnmsub.d fa0,fa3,fa2,fa0 + 83f41e9c: 52f6f7c7 fmsub.d fa5,fa3,fa5,fa0 + 83f41ea0: 0af77653 fsub.d fa2,fa4,fa5 + 83f41ea4: e20607d3 fmv.x.d a5,fa2 + 83f41ea8: 0347d713 srli a4,a5,0x34 + 83f41eac: 7ff77713 andi a4,a4,2047 + 83f41eb0: 9c19 subw s0,s0,a4 + 83f41eb2: 00864663 blt a2,s0,83f41ebe <__ieee754_rem_pio2+0x250> + 83f41eb6: 22e70553 fmv.d fa0,fa4 + 83f41eba: a090 fsd fa2,0(s1) + 83f41ebc: bfbd j 83f41e3a <__ieee754_rem_pio2+0x1cc> + 83f41ebe: 00010797 auipc a5,0x10 + 83f41ec2: 7fa7b607 fld fa2,2042(a5) # 83f526b8 + 83f41ec6: 72c6f54b fnmsub.d fa0,fa3,fa2,fa4 + 83f41eca: 00010797 auipc a5,0x10 + 83f41ece: 7f67b787 fld fa5,2038(a5) # 83f526c0 + 83f41ed2: 0aa77753 fsub.d fa4,fa4,fa0 + 83f41ed6: 72c6f74b fnmsub.d fa4,fa3,fa2,fa4 + 83f41eda: 72f6f7c7 fmsub.d fa5,fa3,fa5,fa4 + 83f41ede: 0af57753 fsub.d fa4,fa0,fa5 + 83f41ee2: e20707d3 fmv.x.d a5,fa4 + 83f41ee6: bf89 j 83f41e38 <__ieee754_rem_pio2+0x1ca> + 83f41ee8: 02f577d3 fadd.d fa5,fa0,fa5 + 83f41eec: 02e40063 beq s0,a4,83f41f0c <__ieee754_rem_pio2+0x29e> + 83f41ef0: 00010797 auipc a5,0x10 + 83f41ef4: 7a87b707 fld fa4,1960(a5) # 83f52698 + 83f41ef8: 02e7f6d3 fadd.d fa3,fa5,fa4 + 83f41efc: 557d li a0,-1 + 83f41efe: 0ad7f7d3 fsub.d fa5,fa5,fa3 + 83f41f02: a094 fsd fa3,0(s1) + 83f41f04: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f41f08: a49c fsd fa5,8(s1) + 83f41f0a: b3f1 j 83f41cd6 <__ieee754_rem_pio2+0x68> + 83f41f0c: 00010797 auipc a5,0x10 + 83f41f10: 7947b707 fld fa4,1940(a5) # 83f526a0 + 83f41f14: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f41f18: 00010797 auipc a5,0x10 + 83f41f1c: 7907b707 fld fa4,1936(a5) # 83f526a8 + 83f41f20: 557d li a0,-1 + 83f41f22: 02e7f6d3 fadd.d fa3,fa5,fa4 + 83f41f26: 0ad7f7d3 fsub.d fa5,fa5,fa3 + 83f41f2a: a094 fsd fa3,0(s1) + 83f41f2c: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f41f30: a49c fsd fa5,8(s1) + 83f41f32: b355 j 83f41cd6 <__ieee754_rem_pio2+0x68> + +0000000083f41f34 <__ieee754_sqrt>: + 83f41f34: e2050553 fmv.x.d a0,fa0 + 83f41f38: 7ff00737 lui a4,0x7ff00 + 83f41f3c: 7ff006b7 lui a3,0x7ff00 + 83f41f40: 42055793 srai a5,a0,0x20 + 83f41f44: 8f7d and a4,a4,a5 + 83f41f46: 0005061b sext.w a2,a0 + 83f41f4a: 18d70e63 beq a4,a3,83f420e6 <__ieee754_sqrt+0x1b2> + 83f41f4e: 10f05a63 blez a5,83f42062 <__ieee754_sqrt+0x12e> + 83f41f52: 4147d593 srai a1,a5,0x14 + 83f41f56: 12058763 beqz a1,83f42084 <__ieee754_sqrt+0x150> + 83f41f5a: 02c79693 slli a3,a5,0x2c + 83f41f5e: 92b1 srli a3,a3,0x2c + 83f41f60: 001007b7 lui a5,0x100 + 83f41f64: 8edd or a3,a3,a5 + 83f41f66: c015859b addiw a1,a1,-1023 + 83f41f6a: 0016969b slliw a3,a3,0x1 + 83f41f6e: 01f6579b srliw a5,a2,0x1f + 83f41f72: 0016171b slliw a4,a2,0x1 + 83f41f76: 0015f813 andi a6,a1,1 + 83f41f7a: 9fb5 addw a5,a5,a3 + 83f41f7c: 853a mv a0,a4 + 83f41f7e: 00080963 beqz a6,83f41f90 <__ieee754_sqrt+0x5c> + 83f41f82: 0017979b slliw a5,a5,0x1 + 83f41f86: 01f5551b srliw a0,a0,0x1f + 83f41f8a: 0026171b slliw a4,a2,0x2 + 83f41f8e: 9fa9 addw a5,a5,a0 + 83f41f90: 4015df1b sraiw t5,a1,0x1 + 83f41f94: 4e81 li t4,0 + 83f41f96: 45d9 li a1,22 + 83f41f98: 4681 li a3,0 + 83f41f9a: 00200637 lui a2,0x200 + 83f41f9e: 00c688bb addw a7,a3,a2 + 83f41fa2: 01f7581b srliw a6,a4,0x1f + 83f41fa6: 35fd addiw a1,a1,-1 + 83f41fa8: 0017171b slliw a4,a4,0x1 + 83f41fac: 0117c863 blt a5,a7,83f41fbc <__ieee754_sqrt+0x88> + 83f41fb0: 411787bb subw a5,a5,a7 + 83f41fb4: 00c886bb addw a3,a7,a2 + 83f41fb8: 00ce8ebb addw t4,t4,a2 + 83f41fbc: 0017979b slliw a5,a5,0x1 + 83f41fc0: 00f807bb addw a5,a6,a5 + 83f41fc4: 8205 srli a2,a2,0x1 + 83f41fc6: fde1 bnez a1,83f41f9e <__ieee754_sqrt+0x6a> + 83f41fc8: 4e01 li t3,0 + 83f41fca: 02000513 li a0,32 + 83f41fce: 80000637 lui a2,0x80000 + 83f41fd2: a839 j 83f41ff0 <__ieee754_sqrt+0xbc> + 83f41fd4: 0ed78863 beq a5,a3,83f420c4 <__ieee754_sqrt+0x190> + 83f41fd8: 01f7581b srliw a6,a4,0x1f + 83f41fdc: 0017979b slliw a5,a5,0x1 + 83f41fe0: 357d addiw a0,a0,-1 + 83f41fe2: 0017171b slliw a4,a4,0x1 + 83f41fe6: 010787bb addw a5,a5,a6 + 83f41fea: 0016561b srliw a2,a2,0x1 + 83f41fee: c121 beqz a0,83f4202e <__ieee754_sqrt+0xfa> + 83f41ff0: 00b608bb addw a7,a2,a1 + 83f41ff4: 8846 mv a6,a7 + 83f41ff6: fcf6dfe3 bge a3,a5,83f41fd4 <__ieee754_sqrt+0xa0> + 83f41ffa: 00c885bb addw a1,a7,a2 + 83f41ffe: 8336 mv t1,a3 + 83f42000: 0a08cc63 bltz a7,83f420b8 <__ieee754_sqrt+0x184> + 83f42004: 9f95 subw a5,a5,a3 + 83f42006: 01177363 bgeu a4,a7,83f4200c <__ieee754_sqrt+0xd8> + 83f4200a: 37fd addiw a5,a5,-1 + 83f4200c: 4107073b subw a4,a4,a6 + 83f42010: 01f7581b srliw a6,a4,0x1f + 83f42014: 0017979b slliw a5,a5,0x1 + 83f42018: 357d addiw a0,a0,-1 + 83f4201a: 01c60e3b addw t3,a2,t3 + 83f4201e: 869a mv a3,t1 + 83f42020: 0017171b slliw a4,a4,0x1 + 83f42024: 010787bb addw a5,a5,a6 + 83f42028: 0016561b srliw a2,a2,0x1 + 83f4202c: f171 bnez a0,83f41ff0 <__ieee754_sqrt+0xbc> + 83f4202e: 8fd9 or a5,a5,a4 + 83f42030: e3dd bnez a5,83f420d6 <__ieee754_sqrt+0x1a2> + 83f42032: 001e551b srliw a0,t3,0x1 + 83f42036: 401ed71b sraiw a4,t4,0x1 + 83f4203a: 3fe007b7 lui a5,0x3fe00 + 83f4203e: 001efe93 andi t4,t4,1 + 83f42042: 9f3d addw a4,a4,a5 + 83f42044: 000e8563 beqz t4,83f4204e <__ieee754_sqrt+0x11a> + 83f42048: 800007b7 lui a5,0x80000 + 83f4204c: 8d5d or a0,a0,a5 + 83f4204e: 014f179b slliw a5,t5,0x14 + 83f42052: 9fb9 addw a5,a5,a4 + 83f42054: 1502 slli a0,a0,0x20 + 83f42056: 9101 srli a0,a0,0x20 + 83f42058: 1782 slli a5,a5,0x20 + 83f4205a: 8d5d or a0,a0,a5 + 83f4205c: f2050553 fmv.d.x fa0,a0 + 83f42060: 8082 ret + 83f42062: 02179713 slli a4,a5,0x21 + 83f42066: 9305 srli a4,a4,0x21 + 83f42068: 8f51 or a4,a4,a2 + 83f4206a: db6d beqz a4,83f4205c <__ieee754_sqrt+0x128> + 83f4206c: 4581 li a1,0 + 83f4206e: e3d9 bnez a5,83f420f4 <__ieee754_sqrt+0x1c0> + 83f42070: 00b6571b srliw a4,a2,0xb + 83f42074: 35ad addiw a1,a1,-21 + 83f42076: 0156161b slliw a2,a2,0x15 + 83f4207a: 87ba mv a5,a4 + 83f4207c: db75 beqz a4,83f42070 <__ieee754_sqrt+0x13c> + 83f4207e: 01475693 srli a3,a4,0x14 + 83f42082: e2d1 bnez a3,83f42106 <__ieee754_sqrt+0x1d2> + 83f42084: 4681 li a3,0 + 83f42086: 00100837 lui a6,0x100 + 83f4208a: 0017979b slliw a5,a5,0x1 + 83f4208e: 0107f733 and a4,a5,a6 + 83f42092: 2701 sext.w a4,a4 + 83f42094: 8536 mv a0,a3 + 83f42096: 2685 addiw a3,a3,1 + 83f42098: db6d beqz a4,83f4208a <__ieee754_sqrt+0x156> + 83f4209a: 02000893 li a7,32 + 83f4209e: 8832 mv a6,a2 + 83f420a0: 40d888bb subw a7,a7,a3 + 83f420a4: 0007871b sext.w a4,a5 + 83f420a8: 00d6163b sllw a2,a2,a3 + 83f420ac: 011857bb srlw a5,a6,a7 + 83f420b0: 8fd9 or a5,a5,a4 + 83f420b2: 9d89 subw a1,a1,a0 + 83f420b4: 2781 sext.w a5,a5 + 83f420b6: b555 j 83f41f5a <__ieee754_sqrt+0x26> + 83f420b8: 8336 mv t1,a3 + 83f420ba: f405c5e3 bltz a1,83f42004 <__ieee754_sqrt+0xd0> + 83f420be: 0016831b addiw t1,a3,1 + 83f420c2: b789 j 83f42004 <__ieee754_sqrt+0xd0> + 83f420c4: f1176ae3 bltu a4,a7,83f41fd8 <__ieee754_sqrt+0xa4> + 83f420c8: 00c885bb addw a1,a7,a2 + 83f420cc: fe08c6e3 bltz a7,83f420b8 <__ieee754_sqrt+0x184> + 83f420d0: 833e mv t1,a5 + 83f420d2: 4781 li a5,0 + 83f420d4: bf25 j 83f4200c <__ieee754_sqrt+0xd8> + 83f420d6: 57fd li a5,-1 + 83f420d8: 02fe0563 beq t3,a5,83f42102 <__ieee754_sqrt+0x1ce> + 83f420dc: 001e051b addiw a0,t3,1 + 83f420e0: 0015551b srliw a0,a0,0x1 + 83f420e4: bf89 j 83f42036 <__ieee754_sqrt+0x102> + 83f420e6: 52a577c3 fmadd.d fa5,fa0,fa0,fa0 + 83f420ea: e2078553 fmv.x.d a0,fa5 + 83f420ee: f2050553 fmv.d.x fa0,a0 + 83f420f2: 8082 ret + 83f420f4: 0aa577d3 fsub.d fa5,fa0,fa0 + 83f420f8: 1af7f7d3 fdiv.d fa5,fa5,fa5 + 83f420fc: e2078553 fmv.x.d a0,fa5 + 83f42100: bfb1 j 83f4205c <__ieee754_sqrt+0x128> + 83f42102: 2e85 addiw t4,t4,1 + 83f42104: bf0d j 83f42036 <__ieee754_sqrt+0x102> + 83f42106: 8832 mv a6,a2 + 83f42108: 02000893 li a7,32 + 83f4210c: 557d li a0,-1 + 83f4210e: bf79 j 83f420ac <__ieee754_sqrt+0x178> + +0000000083f42110 <__kernel_cos>: + 83f42110: e20507d3 fmv.x.d a5,fa0 + 83f42114: 3e4006b7 lui a3,0x3e400 + 83f42118: 00179713 slli a4,a5,0x1 + 83f4211c: 9305 srli a4,a4,0x21 + 83f4211e: 08d75063 bge a4,a3,83f4219e <__kernel_cos+0x8e> + 83f42122: c2051753 fcvt.w.d a4,fa0,rtz + 83f42126: 2701 sext.w a4,a4 + 83f42128: 12070363 beqz a4,83f4224e <__kernel_cos+0x13e> + 83f4212c: 12a576d3 fmul.d fa3,fa0,fa0 + 83f42130: 00010717 auipc a4,0x10 + 83f42134: 5b073707 fld fa4,1456(a4) # 83f526e0 + 83f42138: 00010717 auipc a4,0x10 + 83f4213c: 5b073087 fld ft1,1456(a4) # 83f526e8 + 83f42140: 00010717 auipc a4,0x10 + 83f42144: 5b073007 fld ft0,1456(a4) # 83f526f0 + 83f42148: 00010717 auipc a4,0x10 + 83f4214c: 5b073787 fld fa5,1456(a4) # 83f526f8 + 83f42150: 00010717 auipc a4,0x10 + 83f42154: 5b073507 fld fa0,1456(a4) # 83f52700 + 83f42158: 00010717 auipc a4,0x10 + 83f4215c: 5b073607 fld fa2,1456(a4) # 83f52708 + 83f42160: 0ae6f743 fmadd.d fa4,fa3,fa4,ft1 + 83f42164: 02e6f743 fmadd.d fa4,fa3,fa4,ft0 + 83f42168: 7ae6f7c3 fmadd.d fa5,fa3,fa4,fa5 + 83f4216c: 52f6f7c3 fmadd.d fa5,fa3,fa5,fa0 + 83f42170: 62f6f7c3 fmadd.d fa5,fa3,fa5,fa2 + 83f42174: 12f6f7d3 fmul.d fa5,fa3,fa5 + 83f42178: f2078753 fmv.d.x fa4,a5 + 83f4217c: 00010797 auipc a5,0x10 + 83f42180: 1947b507 fld fa0,404(a5) # 83f52310 <__func__.1+0x118> + 83f42184: 12b775d3 fmul.d fa1,fa4,fa1 + 83f42188: 00010797 auipc a5,0x10 + 83f4218c: 1107b707 fld fa4,272(a5) # 83f52298 <__func__.1+0xa0> + 83f42190: 5af6f7c7 fmsub.d fa5,fa3,fa5,fa1 + 83f42194: 7ae6f7c7 fmsub.d fa5,fa3,fa4,fa5 + 83f42198: 0af57553 fsub.d fa0,fa0,fa5 + 83f4219c: 8082 ret + 83f4219e: 12a576d3 fmul.d fa3,fa0,fa0 + 83f421a2: 00010697 auipc a3,0x10 + 83f421a6: 53e6b707 fld fa4,1342(a3) # 83f526e0 + 83f421aa: 00010697 auipc a3,0x10 + 83f421ae: 53e6b787 fld fa5,1342(a3) # 83f526e8 + 83f421b2: 00010697 auipc a3,0x10 + 83f421b6: 53e6b087 fld ft1,1342(a3) # 83f526f0 + 83f421ba: 00010697 auipc a3,0x10 + 83f421be: 53e6b007 fld ft0,1342(a3) # 83f526f8 + 83f421c2: 00010697 auipc a3,0x10 + 83f421c6: 53e6b507 fld fa0,1342(a3) # 83f52700 + 83f421ca: 00010697 auipc a3,0x10 + 83f421ce: 53e6b607 fld fa2,1342(a3) # 83f52708 + 83f421d2: 7ae6f7c3 fmadd.d fa5,fa3,fa4,fa5 + 83f421d6: 3fd336b7 lui a3,0x3fd33 + 83f421da: 33268693 addi a3,a3,818 # 3fd33332 + 83f421de: 0ad7f7c3 fmadd.d fa5,fa5,fa3,ft1 + 83f421e2: 02d7f7c3 fmadd.d fa5,fa5,fa3,ft0 + 83f421e6: 52d7f7c3 fmadd.d fa5,fa5,fa3,fa0 + 83f421ea: 62d7f7c3 fmadd.d fa5,fa5,fa3,fa2 + 83f421ee: 12d7f7d3 fmul.d fa5,fa5,fa3 + 83f421f2: f8e6d3e3 bge a3,a4,83f42178 <__kernel_cos+0x68> + 83f421f6: 3fe906b7 lui a3,0x3fe90 + 83f421fa: 04e6c163 blt a3,a4,83f4223c <__kernel_cos+0x12c> + 83f421fe: ffe006b7 lui a3,0xffe00 + 83f42202: 9f35 addw a4,a4,a3 + 83f42204: 1702 slli a4,a4,0x20 + 83f42206: f2070753 fmv.d.x fa4,a4 + 83f4220a: 00010697 auipc a3,0x10 + 83f4220e: 1066b507 fld fa0,262(a3) # 83f52310 <__func__.1+0x118> + 83f42212: f2070653 fmv.d.x fa2,a4 + 83f42216: 0ae57553 fsub.d fa0,fa0,fa4 + 83f4221a: f2078753 fmv.d.x fa4,a5 + 83f4221e: 12b775d3 fmul.d fa1,fa4,fa1 + 83f42222: 00010797 auipc a5,0x10 + 83f42226: 0767b707 fld fa4,118(a5) # 83f52298 <__func__.1+0xa0> + 83f4222a: 62e6f747 fmsub.d fa4,fa3,fa4,fa2 + 83f4222e: 5af6f6c7 fmsub.d fa3,fa3,fa5,fa1 + 83f42232: 0ad77753 fsub.d fa4,fa4,fa3 + 83f42236: 0ae57553 fsub.d fa0,fa0,fa4 + 83f4223a: 8082 ret + 83f4223c: 00010717 auipc a4,0x10 + 83f42240: 49473507 fld fa0,1172(a4) # 83f526d0 + 83f42244: 00010717 auipc a4,0x10 + 83f42248: 49473607 fld fa2,1172(a4) # 83f526d8 + 83f4224c: b7f9 j 83f4221a <__kernel_cos+0x10a> + 83f4224e: 00010797 auipc a5,0x10 + 83f42252: 0c27b507 fld fa0,194(a5) # 83f52310 <__func__.1+0x118> + 83f42256: 8082 ret + +0000000083f42258 <__kernel_rem_pio2>: + 83f42258: d0010113 addi sp,sp,-768 + 83f4225c: 2d313c23 sd s3,728(sp) + 83f42260: e43a sd a4,8(sp) + 83f42262: 89b6 mv s3,a3 + 83f42264: 00271693 slli a3,a4,0x2 + 83f42268: 0000f717 auipc a4,0xf + 83f4226c: 99870713 addi a4,a4,-1640 # 83f50c00 + 83f42270: 9736 add a4,a4,a3 + 83f42272: 2d413823 sd s4,720(sp) + 83f42276: 2b713c23 sd s7,696(sp) + 83f4227a: 2b913423 sd s9,680(sp) + 83f4227e: 2ba13023 sd s10,672(sp) + 83f42282: 29b13c23 sd s11,664(sp) + 83f42286: fff9889b addiw a7,s3,-1 + 83f4228a: 2e113c23 sd ra,760(sp) + 83f4228e: 2e813823 sd s0,752(sp) + 83f42292: 2e913423 sd s1,744(sp) + 83f42296: 2f213023 sd s2,736(sp) + 83f4229a: 2d513423 sd s5,712(sp) + 83f4229e: 2d613023 sd s6,704(sp) + 83f422a2: 2b813823 sd s8,688(sp) + 83f422a6: 28813427 fsd fs0,648(sp) + 83f422aa: 28913027 fsd fs1,640(sp) + 83f422ae: 27213c27 fsd fs2,632(sp) + 83f422b2: 27313827 fsd fs3,624(sp) + 83f422b6: 27413427 fsd fs4,616(sp) + 83f422ba: 27513027 fsd fs5,608(sp) + 83f422be: 25613c27 fsd fs6,600(sp) + 83f422c2: 56b1 li a3,-20 + 83f422c4: e02e sd a1,0(sp) + 83f422c6: 00072c83 lw s9,0(a4) + 83f422ca: 8bb2 mv s7,a2 + 83f422cc: 8daa mv s11,a0 + 83f422ce: 8a3e mv s4,a5 + 83f422d0: 00088d1b sext.w s10,a7 + 83f422d4: 60d64463 blt a2,a3,83f428dc <__kernel_rem_pio2+0x684> + 83f422d8: 47e1 li a5,24 + 83f422da: ffd6049b addiw s1,a2,-3 + 83f422de: 02f4c4bb divw s1,s1,a5 + 83f422e2: 0014879b addiw a5,s1,1 + 83f422e6: 0027971b slliw a4,a5,0x2 + 83f422ea: 9f99 subw a5,a5,a4 + 83f422ec: 0037979b slliw a5,a5,0x3 + 83f422f0: 00fb8b3b addw s6,s7,a5 + 83f422f4: 019886bb addw a3,a7,s9 + 83f422f8: 411485bb subw a1,s1,a7 + 83f422fc: c85a sw s6,16(sp) + 83f422fe: 8736 mv a4,a3 + 83f42300: 0005879b sext.w a5,a1 + 83f42304: 0206c663 bltz a3,83f42330 <__kernel_rem_pio2+0xd8> + 83f42308: 0017061b addiw a2,a4,1 + 83f4230c: 00279693 slli a3,a5,0x2 + 83f42310: 1898 addi a4,sp,112 + 83f42312: 96d2 add a3,a3,s4 + 83f42314: 9e2d addw a2,a2,a1 + 83f42316: f20007d3 fmv.d.x fa5,zero + 83f4231a: 0007c563 bltz a5,83f42324 <__kernel_rem_pio2+0xcc> + 83f4231e: 428c lw a1,0(a3) + 83f42320: d20587d3 fcvt.d.w fa5,a1 + 83f42324: 2785 addiw a5,a5,1 + 83f42326: a31c fsd fa5,0(a4) + 83f42328: 0721 addi a4,a4,8 + 83f4232a: 0691 addi a3,a3,4 + 83f4232c: fec795e3 bne a5,a2,83f42316 <__kernel_rem_pio2+0xbe> + 83f42330: 040cc563 bltz s9,83f4237a <__kernel_rem_pio2+0x122> + 83f42334: fff9869b addiw a3,s3,-1 + 83f42338: 02069793 slli a5,a3,0x20 + 83f4233c: 01d7d693 srli a3,a5,0x1d + 83f42340: 008d8793 addi a5,s11,8 + 83f42344: 1b0c addi a1,sp,432 + 83f42346: 866a mv a2,s10 + 83f42348: 013c853b addw a0,s9,s3 + 83f4234c: 96be add a3,a3,a5 + 83f4234e: f20007d3 fmv.d.x fa5,zero + 83f42352: 000d4f63 bltz s10,83f42370 <__kernel_rem_pio2+0x118> + 83f42356: 189c addi a5,sp,112 + 83f42358: 00361713 slli a4,a2,0x3 + 83f4235c: 973e add a4,a4,a5 + 83f4235e: 87ee mv a5,s11 + 83f42360: 2394 fld fa3,0(a5) + 83f42362: 2318 fld fa4,0(a4) + 83f42364: 07a1 addi a5,a5,8 + 83f42366: 1761 addi a4,a4,-8 + 83f42368: 7ae6f7c3 fmadd.d fa5,fa3,fa4,fa5 + 83f4236c: fed79ae3 bne a5,a3,83f42360 <__kernel_rem_pio2+0x108> + 83f42370: a19c fsd fa5,0(a1) + 83f42372: 2605 addiw a2,a2,1 + 83f42374: 05a1 addi a1,a1,8 + 83f42376: fca61ce3 bne a2,a0,83f4234e <__kernel_rem_pio2+0xf6> + 83f4237a: 02089793 slli a5,a7,0x20 + 83f4237e: 002c9913 slli s2,s9,0x2 + 83f42382: 01d7d893 srli a7,a5,0x1d + 83f42386: 1961 addi s2,s2,-8 + 83f42388: 101c addi a5,sp,32 + 83f4238a: 993e add s2,s2,a5 + 83f4238c: fffc841b addiw s0,s9,-1 + 83f42390: 00010797 auipc a5,0x10 + 83f42394: 3907b487 fld fs1,912(a5) # 83f52720 + 83f42398: 00010797 auipc a5,0x10 + 83f4239c: 3907b407 fld fs0,912(a5) # 83f52728 + 83f423a0: 00010797 auipc a5,0x10 + 83f423a4: f707b907 fld fs2,-144(a5) # 83f52310 <__func__.1+0x118> + 83f423a8: 00010797 auipc a5,0x10 + 83f423ac: 3707ba87 fld fs5,880(a5) # 83f52718 + 83f423b0: 00010797 auipc a5,0x10 + 83f423b4: 3187ba07 fld fs4,792(a5) # 83f526c8 + 83f423b8: 00010797 auipc a5,0x10 + 83f423bc: ee07b987 fld fs3,-288(a5) # 83f52298 <__func__.1+0xa0> + 83f423c0: 040a slli s0,s0,0x2 + 83f423c2: 0c9c addi a5,sp,592 + 83f423c4: 011d8c33 add s8,s11,a7 + 83f423c8: 8ae6 mv s5,s9 + 83f423ca: 943e add s0,s0,a5 + 83f423cc: 003a9793 slli a5,s5,0x3 + 83f423d0: 0c98 addi a4,sp,592 + 83f423d2: 973e add a4,a4,a5 + 83f423d4: f6073507 fld fa0,-160(a4) + 83f423d8: 05505263 blez s5,83f4241c <__kernel_rem_pio2+0x1c4> + 83f423dc: fffa859b addiw a1,s5,-1 + 83f423e0: ff878713 addi a4,a5,-8 + 83f423e4: 1b14 addi a3,sp,432 + 83f423e6: 02059793 slli a5,a1,0x20 + 83f423ea: 01e7d593 srli a1,a5,0x1e + 83f423ee: 9736 add a4,a4,a3 + 83f423f0: 1054 addi a3,sp,36 + 83f423f2: 101c addi a5,sp,32 + 83f423f4: 95b6 add a1,a1,a3 + 83f423f6: 135577d3 fmul.d fa5,fa0,fs5 + 83f423fa: 2314 fld fa3,0(a4) + 83f423fc: 0791 addi a5,a5,4 + 83f423fe: 1761 addi a4,a4,-8 + 83f42400: c2079653 fcvt.w.d a2,fa5,rtz + 83f42404: d20607d3 fcvt.d.w fa5,a2 + 83f42408: 5347f74b fnmsub.d fa4,fa5,fs4,fa0 + 83f4240c: 02d7f553 fadd.d fa0,fa5,fa3 + 83f42410: c2071653 fcvt.w.d a2,fa4,rtz + 83f42414: fec7ae23 sw a2,-4(a5) + 83f42418: fcb79fe3 bne a5,a1,83f423f6 <__kernel_rem_pio2+0x19e> + 83f4241c: 855a mv a0,s6 + 83f4241e: 7be000ef jal ra,83f42bdc + 83f42422: 22a50b53 fmv.d fs6,fa0 + 83f42426: 12957553 fmul.d fa0,fa0,fs1 + 83f4242a: d38fe0ef jal ra,83f40962 + 83f4242e: b285754b fnmsub.d fa0,fa0,fs0,fs6 + 83f42432: c2051653 fcvt.w.d a2,fa0,rtz + 83f42436: d2060b53 fcvt.d.w fs6,a2 + 83f4243a: 00060b9b sext.w s7,a2 + 83f4243e: 0b657b53 fsub.d fs6,fa0,fs6 + 83f42442: 0f605f63 blez s6,83f42540 <__kernel_rem_pio2+0x2e8> + 83f42446: fffa879b addiw a5,s5,-1 + 83f4244a: 0c98 addi a4,sp,592 + 83f4244c: 078a slli a5,a5,0x2 + 83f4244e: 97ba add a5,a5,a4 + 83f42450: dd07a883 lw a7,-560(a5) + 83f42454: 4761 li a4,24 + 83f42456: 4167073b subw a4,a4,s6 + 83f4245a: 40e8de3b sraw t3,a7,a4 + 83f4245e: 00ee173b sllw a4,t3,a4 + 83f42462: 40e8873b subw a4,a7,a4 + 83f42466: 48dd li a7,23 + 83f42468: 416888bb subw a7,a7,s6 + 83f4246c: dce7a823 sw a4,-560(a5) + 83f42470: 411758bb sraw a7,a4,a7 + 83f42474: 01c60bbb addw s7,a2,t3 + 83f42478: 0f104163 bgtz a7,83f4255a <__kernel_rem_pio2+0x302> + 83f4247c: f2000753 fmv.d.x fa4,zero + 83f42480: a2eb27d3 feq.d a5,fs6,fa4 + 83f42484: 1a078263 beqz a5,83f42628 <__kernel_rem_pio2+0x3d0> + 83f42488: fffa831b addiw t1,s5,-1 + 83f4248c: 03934b63 blt t1,s9,83f424c2 <__kernel_rem_pio2+0x26a> + 83f42490: fffcc713 not a4,s9 + 83f42494: 002a9593 slli a1,s5,0x2 + 83f42498: 0157073b addw a4,a4,s5 + 83f4249c: 0834 addi a3,sp,24 + 83f4249e: ffc58793 addi a5,a1,-4 # 3feffffc + 83f424a2: 95b6 add a1,a1,a3 + 83f424a4: 02071693 slli a3,a4,0x20 + 83f424a8: 01e6d713 srli a4,a3,0x1e + 83f424ac: 1014 addi a3,sp,32 + 83f424ae: 8d99 sub a1,a1,a4 + 83f424b0: 97b6 add a5,a5,a3 + 83f424b2: 4701 li a4,0 + 83f424b4: 4390 lw a2,0(a5) + 83f424b6: 17f1 addi a5,a5,-4 + 83f424b8: 8f51 or a4,a4,a2 + 83f424ba: feb79de3 bne a5,a1,83f424b4 <__kernel_rem_pio2+0x25c> + 83f424be: 30071f63 bnez a4,83f427dc <__kernel_rem_pio2+0x584> + 83f424c2: dd042783 lw a5,-560(s0) + 83f424c6: 30079763 bnez a5,83f427d4 <__kernel_rem_pio2+0x57c> + 83f424ca: 87ca mv a5,s2 + 83f424cc: 4705 li a4,1 + 83f424ce: 4390 lw a2,0(a5) + 83f424d0: 2705 addiw a4,a4,1 + 83f424d2: 17f1 addi a5,a5,-4 + 83f424d4: de6d beqz a2,83f424ce <__kernel_rem_pio2+0x276> + 83f424d6: 001a851b addiw a0,s5,1 + 83f424da: 00ea88bb addw a7,s5,a4 + 83f424de: 00ad07bb addw a5,s10,a0 + 83f424e2: 013a8333 add t1,s5,s3 + 83f424e6: 40f30333 sub t1,t1,a5 + 83f424ea: 00a48633 add a2,s1,a0 + 83f424ee: 078e slli a5,a5,0x3 + 83f424f0: 1898 addi a4,sp,112 + 83f424f2: 060a slli a2,a2,0x2 + 83f424f4: 00351593 slli a1,a0,0x3 + 83f424f8: 030e slli t1,t1,0x3 + 83f424fa: 00f706b3 add a3,a4,a5 + 83f424fe: 1b1c addi a5,sp,432 + 83f42500: 9652 add a2,a2,s4 + 83f42502: 95be add a1,a1,a5 + 83f42504: 1361 addi t1,t1,-8 + 83f42506: 421c lw a5,0(a2) + 83f42508: f20007d3 fmv.d.x fa5,zero + 83f4250c: d2078753 fcvt.d.w fa4,a5 + 83f42510: a298 fsd fa4,0(a3) + 83f42512: 000d4e63 bltz s10,83f4252e <__kernel_rem_pio2+0x2d6> + 83f42516: 00d30733 add a4,t1,a3 + 83f4251a: 87ee mv a5,s11 + 83f4251c: a021 j 83f42524 <__kernel_rem_pio2+0x2cc> + 83f4251e: 2318 fld fa4,0(a4) + 83f42520: 07a1 addi a5,a5,8 + 83f42522: 1761 addi a4,a4,-8 + 83f42524: 2394 fld fa3,0(a5) + 83f42526: 7ae6f7c3 fmadd.d fa5,fa3,fa4,fa5 + 83f4252a: ff879ae3 bne a5,s8,83f4251e <__kernel_rem_pio2+0x2c6> + 83f4252e: a19c fsd fa5,0(a1) + 83f42530: 2505 addiw a0,a0,1 + 83f42532: 0611 addi a2,a2,4 + 83f42534: 06a1 addi a3,a3,8 + 83f42536: 05a1 addi a1,a1,8 + 83f42538: fca8d7e3 bge a7,a0,83f42506 <__kernel_rem_pio2+0x2ae> + 83f4253c: 8ac6 mv s5,a7 + 83f4253e: b579 j 83f423cc <__kernel_rem_pio2+0x174> + 83f42540: 260b1d63 bnez s6,83f427ba <__kernel_rem_pio2+0x562> + 83f42544: fffa879b addiw a5,s5,-1 + 83f42548: 078a slli a5,a5,0x2 + 83f4254a: 0c98 addi a4,sp,592 + 83f4254c: 97ba add a5,a5,a4 + 83f4254e: dd07a883 lw a7,-560(a5) + 83f42552: 4178d89b sraiw a7,a7,0x17 + 83f42556: f31053e3 blez a7,83f4247c <__kernel_rem_pio2+0x224> + 83f4255a: 2b85 addiw s7,s7,1 + 83f4255c: 39505e63 blez s5,83f428f8 <__kernel_rem_pio2+0x6a0> + 83f42560: 5782 lw a5,32(sp) + 83f42562: 24079963 bnez a5,83f427b4 <__kernel_rem_pio2+0x55c> + 83f42566: 4705 li a4,1 + 83f42568: 06ea8763 beq s5,a4,83f425d6 <__kernel_rem_pio2+0x37e> + 83f4256c: 5792 lw a5,36(sp) + 83f4256e: 1050 addi a2,sp,36 + 83f42570: 0017051b addiw a0,a4,1 + 83f42574: 0611 addi a2,a2,4 + 83f42576: eb89 bnez a5,83f42588 <__kernel_rem_pio2+0x330> + 83f42578: 04aa8f63 beq s5,a0,83f425d6 <__kernel_rem_pio2+0x37e> + 83f4257c: 421c lw a5,0(a2) + 83f4257e: 872a mv a4,a0 + 83f42580: 0017051b addiw a0,a4,1 + 83f42584: 0611 addi a2,a2,4 + 83f42586: dbed beqz a5,83f42578 <__kernel_rem_pio2+0x320> + 83f42588: 00271613 slli a2,a4,0x2 + 83f4258c: 0c94 addi a3,sp,592 + 83f4258e: 01000737 lui a4,0x1000 + 83f42592: 9636 add a2,a2,a3 + 83f42594: 40f707bb subw a5,a4,a5 + 83f42598: dcf62823 sw a5,-560(a2) # ffffffff7ffffdd0 <_end+0xfffffffefc000090> + 83f4259c: 03555c63 bge a0,s5,83f425d4 <__kernel_rem_pio2+0x37c> + 83f425a0: fffa879b addiw a5,s5,-1 + 83f425a4: 9f89 subw a5,a5,a0 + 83f425a6: 1782 slli a5,a5,0x20 + 83f425a8: 00251613 slli a2,a0,0x2 + 83f425ac: 9381 srli a5,a5,0x20 + 83f425ae: 00c685b3 add a1,a3,a2 + 83f425b2: 97aa add a5,a5,a0 + 83f425b4: 1014 addi a3,sp,32 + 83f425b6: 078a slli a5,a5,0x2 + 83f425b8: 9636 add a2,a2,a3 + 83f425ba: 1054 addi a3,sp,36 + 83f425bc: dd05a583 lw a1,-560(a1) + 83f425c0: 97b6 add a5,a5,a3 + 83f425c2: 377d addiw a4,a4,-1 + 83f425c4: a011 j 83f425c8 <__kernel_rem_pio2+0x370> + 83f425c6: 420c lw a1,0(a2) + 83f425c8: 40b705bb subw a1,a4,a1 + 83f425cc: c20c sw a1,0(a2) + 83f425ce: 0611 addi a2,a2,4 + 83f425d0: fef61be3 bne a2,a5,83f425c6 <__kernel_rem_pio2+0x36e> + 83f425d4: 4785 li a5,1 + 83f425d6: 03605363 blez s6,83f425fc <__kernel_rem_pio2+0x3a4> + 83f425da: 4705 li a4,1 + 83f425dc: 2eeb0463 beq s6,a4,83f428c4 <__kernel_rem_pio2+0x66c> + 83f425e0: 4709 li a4,2 + 83f425e2: 00eb1d63 bne s6,a4,83f425fc <__kernel_rem_pio2+0x3a4> + 83f425e6: fffa871b addiw a4,s5,-1 + 83f425ea: 070a slli a4,a4,0x2 + 83f425ec: 0c94 addi a3,sp,592 + 83f425ee: 9736 add a4,a4,a3 + 83f425f0: dd072603 lw a2,-560(a4) # fffdd0 + 83f425f4: 162a slli a2,a2,0x2a + 83f425f6: 9229 srli a2,a2,0x2a + 83f425f8: dcc72823 sw a2,-560(a4) + 83f425fc: 4709 li a4,2 + 83f425fe: e6e89fe3 bne a7,a4,83f4247c <__kernel_rem_pio2+0x224> + 83f42602: 0b697b53 fsub.d fs6,fs2,fs6 + 83f42606: e6078be3 beqz a5,83f4247c <__kernel_rem_pio2+0x224> + 83f4260a: 23290553 fmv.d fa0,fs2 + 83f4260e: 855a mv a0,s6 + 83f42610: ec46 sd a7,24(sp) + 83f42612: 5ca000ef jal ra,83f42bdc + 83f42616: 0aab7b53 fsub.d fs6,fs6,fa0 + 83f4261a: f2000753 fmv.d.x fa4,zero + 83f4261e: 68e2 ld a7,24(sp) + 83f42620: a2eb27d3 feq.d a5,fs6,fa4 + 83f42624: e60792e3 bnez a5,83f42488 <__kernel_rem_pio2+0x230> + 83f42628: 4442 lw s0,16(sp) + 83f4262a: 236b0553 fmv.d fa0,fs6 + 83f4262e: ec46 sd a7,24(sp) + 83f42630: 4080053b negw a0,s0 + 83f42634: 5a8000ef jal ra,83f42bdc + 83f42638: 00010797 auipc a5,0x10 + 83f4263c: 0907b607 fld fa2,144(a5) # 83f526c8 + 83f42640: a2a607d3 fle.d a5,fa2,fa0 + 83f42644: 68e2 ld a7,24(sp) + 83f42646: 30078063 beqz a5,83f42946 <__kernel_rem_pio2+0x6ee> + 83f4264a: 00010797 auipc a5,0x10 + 83f4264e: 0ce7b687 fld fa3,206(a5) # 83f52718 + 83f42652: 12d576d3 fmul.d fa3,fa0,fa3 + 83f42656: 0c9c addi a5,sp,592 + 83f42658: 002a9713 slli a4,s5,0x2 + 83f4265c: 001a831b addiw t1,s5,1 + 83f42660: 973e add a4,a4,a5 + 83f42662: 0c94 addi a3,sp,592 + 83f42664: 00231793 slli a5,t1,0x2 + 83f42668: 97b6 add a5,a5,a3 + 83f4266a: c20696d3 fcvt.w.d a3,fa3,rtz + 83f4266e: 01840b1b addiw s6,s0,24 + 83f42672: d2068753 fcvt.d.w fa4,a3 + 83f42676: 52c777cb fnmsub.d fa5,fa4,fa2,fa0 + 83f4267a: c2079653 fcvt.w.d a2,fa5,rtz + 83f4267e: dcc72823 sw a2,-560(a4) + 83f42682: dcd7a823 sw a3,-560(a5) + 83f42686: 23290553 fmv.d fa0,fs2 + 83f4268a: 855a mv a0,s6 + 83f4268c: ec1a sd t1,24(sp) + 83f4268e: e846 sd a7,16(sp) + 83f42690: 54c000ef jal ra,83f42bdc + 83f42694: 6362 ld t1,24(sp) + 83f42696: 68c2 ld a7,16(sp) + 83f42698: 2e034863 bltz t1,83f42988 <__kernel_rem_pio2+0x730> + 83f4269c: 1b18 addi a4,sp,432 + 83f4269e: 00331f13 slli t5,t1,0x3 + 83f426a2: 01e705b3 add a1,a4,t5 + 83f426a6: 00231793 slli a5,t1,0x2 + 83f426aa: 1018 addi a4,sp,32 + 83f426ac: 97ba add a5,a5,a4 + 83f426ae: 0870 addi a2,sp,28 + 83f426b0: 872e mv a4,a1 + 83f426b2: 00010697 auipc a3,0x10 + 83f426b6: 0666b687 fld fa3,102(a3) # 83f52718 + 83f426ba: 4394 lw a3,0(a5) + 83f426bc: 1761 addi a4,a4,-8 + 83f426be: 17f1 addi a5,a5,-4 + 83f426c0: d20687d3 fcvt.d.w fa5,a3 + 83f426c4: 12a7f7d3 fmul.d fa5,fa5,fa0 + 83f426c8: 12d57553 fmul.d fa0,fa0,fa3 + 83f426cc: a71c fsd fa5,8(a4) + 83f426ce: fec796e3 bne a5,a2,83f426ba <__kernel_rem_pio2+0x462> + 83f426d2: 11010813 addi a6,sp,272 + 83f426d6: 851a mv a0,t1 + 83f426d8: 4e81 li t4,0 + 83f426da: 00010797 auipc a5,0x10 + 83f426de: 0367b607 fld fa2,54(a5) # 83f52710 + 83f426e2: 5ffd li t6,-1 + 83f426e4: 1e0ccf63 bltz s9,83f428e2 <__kernel_rem_pio2+0x68a> + 83f426e8: 22c60753 fmv.d fa4,fa2 + 83f426ec: f20007d3 fmv.d.x fa5,zero + 83f426f0: 0000e697 auipc a3,0xe + 83f426f4: 52068693 addi a3,a3,1312 # 83f50c10 + 83f426f8: 872e mv a4,a1 + 83f426fa: 4781 li a5,0 + 83f426fc: 000e861b sext.w a2,t4 + 83f42700: a029 j 83f4270a <__kernel_rem_pio2+0x4b2> + 83f42702: 0721 addi a4,a4,8 + 83f42704: 00f64a63 blt a2,a5,83f42718 <__kernel_rem_pio2+0x4c0> + 83f42708: 2298 fld fa4,0(a3) + 83f4270a: 2314 fld fa3,0(a4) + 83f4270c: 2785 addiw a5,a5,1 + 83f4270e: 06a1 addi a3,a3,8 + 83f42710: 7ae6f7c3 fmadd.d fa5,fa3,fa4,fa5 + 83f42714: fefcd7e3 bge s9,a5,83f42702 <__kernel_rem_pio2+0x4aa> + 83f42718: 00f83027 fsd fa5,0(a6) # 100000 + 83f4271c: 357d addiw a0,a0,-1 + 83f4271e: 0e85 addi t4,t4,1 + 83f42720: 0821 addi a6,a6,8 + 83f42722: 15e1 addi a1,a1,-8 + 83f42724: fdf510e3 bne a0,t6,83f426e4 <__kernel_rem_pio2+0x48c> + 83f42728: 6722 ld a4,8(sp) + 83f4272a: 4789 li a5,2 + 83f4272c: 0ce7cc63 blt a5,a4,83f42804 <__kernel_rem_pio2+0x5ac> + 83f42730: 1ce04663 bgtz a4,83f428fc <__kernel_rem_pio2+0x6a4> + 83f42734: e31d bnez a4,83f4275a <__kernel_rem_pio2+0x502> + 83f42736: f20007d3 fmv.d.x fa5,zero + 83f4273a: 0a1c addi a5,sp,272 + 83f4273c: 9f3e add t5,t5,a5 + 83f4273e: 17e1 addi a5,a5,-8 + 83f42740: 000f3707 fld fa4,0(t5) + 83f42744: 1f61 addi t5,t5,-8 + 83f42746: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f4274a: ffe79be3 bne a5,t5,83f42740 <__kernel_rem_pio2+0x4e8> + 83f4274e: 00088463 beqz a7,83f42756 <__kernel_rem_pio2+0x4fe> + 83f42752: 22f797d3 fneg.d fa5,fa5 + 83f42756: 6782 ld a5,0(sp) + 83f42758: a39c fsd fa5,0(a5) + 83f4275a: 2f813083 ld ra,760(sp) + 83f4275e: 2f013403 ld s0,752(sp) + 83f42762: 2e813483 ld s1,744(sp) + 83f42766: 2e013903 ld s2,736(sp) + 83f4276a: 2d813983 ld s3,728(sp) + 83f4276e: 2d013a03 ld s4,720(sp) + 83f42772: 2c813a83 ld s5,712(sp) + 83f42776: 2c013b03 ld s6,704(sp) + 83f4277a: 2b013c03 ld s8,688(sp) + 83f4277e: 2a813c83 ld s9,680(sp) + 83f42782: 2a013d03 ld s10,672(sp) + 83f42786: 29813d83 ld s11,664(sp) + 83f4278a: 28813407 fld fs0,648(sp) + 83f4278e: 28013487 fld fs1,640(sp) + 83f42792: 27813907 fld fs2,632(sp) + 83f42796: 27013987 fld fs3,624(sp) + 83f4279a: 26813a07 fld fs4,616(sp) + 83f4279e: 26013a87 fld fs5,608(sp) + 83f427a2: 25813b07 fld fs6,600(sp) + 83f427a6: 007bf513 andi a0,s7,7 + 83f427aa: 2b813b83 ld s7,696(sp) + 83f427ae: 30010113 addi sp,sp,768 + 83f427b2: 8082 ret + 83f427b4: 4505 li a0,1 + 83f427b6: 4701 li a4,0 + 83f427b8: bbc1 j 83f42588 <__kernel_rem_pio2+0x330> + 83f427ba: a36987d3 fle.d a5,fs3,fs6 + 83f427be: 4881 li a7,0 + 83f427c0: ca078ee3 beqz a5,83f4247c <__kernel_rem_pio2+0x224> + 83f427c4: 00160b9b addiw s7,a2,1 + 83f427c8: 4889 li a7,2 + 83f427ca: d9504be3 bgtz s5,83f42560 <__kernel_rem_pio2+0x308> + 83f427ce: 0b697b53 fsub.d fs6,fs2,fs6 + 83f427d2: b16d j 83f4247c <__kernel_rem_pio2+0x224> + 83f427d4: 001a851b addiw a0,s5,1 + 83f427d8: 88aa mv a7,a0 + 83f427da: b311 j 83f424de <__kernel_rem_pio2+0x286> + 83f427dc: 00231793 slli a5,t1,0x2 + 83f427e0: 0c98 addi a4,sp,592 + 83f427e2: 973e add a4,a4,a5 + 83f427e4: 46c2 lw a3,16(sp) + 83f427e6: dd072703 lw a4,-560(a4) + 83f427ea: fe868b1b addiw s6,a3,-24 + 83f427ee: e8071ce3 bnez a4,83f42686 <__kernel_rem_pio2+0x42e> + 83f427f2: 17f1 addi a5,a5,-4 + 83f427f4: 1018 addi a4,sp,32 + 83f427f6: 97ba add a5,a5,a4 + 83f427f8: 4398 lw a4,0(a5) + 83f427fa: 337d addiw t1,t1,-1 + 83f427fc: 17f1 addi a5,a5,-4 + 83f427fe: 3b21 addiw s6,s6,-24 + 83f42800: df65 beqz a4,83f427f8 <__kernel_rem_pio2+0x5a0> + 83f42802: b551 j 83f42686 <__kernel_rem_pio2+0x42e> + 83f42804: 6722 ld a4,8(sp) + 83f42806: 478d li a5,3 + 83f42808: f4f719e3 bne a4,a5,83f4275a <__kernel_rem_pio2+0x502> + 83f4280c: 04030163 beqz t1,83f4284e <__kernel_rem_pio2+0x5f6> + 83f42810: fff3069b addiw a3,t1,-1 + 83f42814: 0c9c addi a5,sp,592 + 83f42816: 97fa add a5,a5,t5 + 83f42818: 02069613 slli a2,a3,0x20 + 83f4281c: 0218 addi a4,sp,256 + 83f4281e: 01d65693 srli a3,a2,0x1d + 83f42822: ec07b707 fld fa4,-320(a5) + 83f42826: 977a add a4,a4,t5 + 83f42828: ff8f0793 addi a5,t5,-8 + 83f4282c: 0a10 addi a2,sp,272 + 83f4282e: 97b2 add a5,a5,a2 + 83f42830: 8f15 sub a4,a4,a3 + 83f42832: 239c fld fa5,0(a5) + 83f42834: 22e706d3 fmv.d fa3,fa4 + 83f42838: 17e1 addi a5,a5,-8 + 83f4283a: 02f77753 fadd.d fa4,fa4,fa5 + 83f4283e: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f42842: a798 fsd fa4,8(a5) + 83f42844: 02d7f7d3 fadd.d fa5,fa5,fa3 + 83f42848: ab9c fsd fa5,16(a5) + 83f4284a: fef714e3 bne a4,a5,83f42832 <__kernel_rem_pio2+0x5da> + 83f4284e: 4785 li a5,1 + 83f42850: f20007d3 fmv.d.x fa5,zero + 83f42854: 0467df63 bge a5,t1,83f428b2 <__kernel_rem_pio2+0x65a> + 83f42858: ffe3069b addiw a3,t1,-2 + 83f4285c: 02069713 slli a4,a3,0x20 + 83f42860: 0c9c addi a5,sp,592 + 83f42862: 97fa add a5,a5,t5 + 83f42864: 01d75693 srli a3,a4,0x1d + 83f42868: 0218 addi a4,sp,256 + 83f4286a: ec07b707 fld fa4,-320(a5) + 83f4286e: 977a add a4,a4,t5 + 83f42870: ff8f0793 addi a5,t5,-8 + 83f42874: 0a10 addi a2,sp,272 + 83f42876: 97b2 add a5,a5,a2 + 83f42878: 8f15 sub a4,a4,a3 + 83f4287a: 239c fld fa5,0(a5) + 83f4287c: 22e706d3 fmv.d fa3,fa4 + 83f42880: 17e1 addi a5,a5,-8 + 83f42882: 02f77753 fadd.d fa4,fa4,fa5 + 83f42886: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f4288a: a798 fsd fa4,8(a5) + 83f4288c: 02d7f7d3 fadd.d fa5,fa5,fa3 + 83f42890: ab9c fsd fa5,16(a5) + 83f42892: fee794e3 bne a5,a4,83f4287a <__kernel_rem_pio2+0x622> + 83f42896: 023c addi a5,sp,264 + 83f42898: f20007d3 fmv.d.x fa5,zero + 83f4289c: 97fa add a5,a5,t5 + 83f4289e: 0a18 addi a4,sp,272 + 83f428a0: 9f3a add t5,t5,a4 + 83f428a2: 8f95 sub a5,a5,a3 + 83f428a4: 000f3707 fld fa4,0(t5) + 83f428a8: 1f61 addi t5,t5,-8 + 83f428aa: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f428ae: ffe79be3 bne a5,t5,83f428a4 <__kernel_rem_pio2+0x64c> + 83f428b2: 26d2 fld fa3,272(sp) + 83f428b4: 2772 fld fa4,280(sp) + 83f428b6: 0a089263 bnez a7,83f4295a <__kernel_rem_pio2+0x702> + 83f428ba: 6782 ld a5,0(sp) + 83f428bc: a394 fsd fa3,0(a5) + 83f428be: a798 fsd fa4,8(a5) + 83f428c0: ab9c fsd fa5,16(a5) + 83f428c2: bd61 j 83f4275a <__kernel_rem_pio2+0x502> + 83f428c4: fffa871b addiw a4,s5,-1 + 83f428c8: 070a slli a4,a4,0x2 + 83f428ca: 0c94 addi a3,sp,592 + 83f428cc: 9736 add a4,a4,a3 + 83f428ce: dd072603 lw a2,-560(a4) + 83f428d2: 1626 slli a2,a2,0x29 + 83f428d4: 9225 srli a2,a2,0x29 + 83f428d6: dcc72823 sw a2,-560(a4) + 83f428da: b30d j 83f425fc <__kernel_rem_pio2+0x3a4> + 83f428dc: 57a1 li a5,-24 + 83f428de: 4481 li s1,0 + 83f428e0: bc01 j 83f422f0 <__kernel_rem_pio2+0x98> + 83f428e2: f20007d3 fmv.d.x fa5,zero + 83f428e6: 357d addiw a0,a0,-1 + 83f428e8: 0e85 addi t4,t4,1 + 83f428ea: 00f83027 fsd fa5,0(a6) + 83f428ee: 15e1 addi a1,a1,-8 + 83f428f0: 0821 addi a6,a6,8 + 83f428f2: dff519e3 bne a0,t6,83f426e4 <__kernel_rem_pio2+0x48c> + 83f428f6: bd0d j 83f42728 <__kernel_rem_pio2+0x4d0> + 83f428f8: 4781 li a5,0 + 83f428fa: b9f1 j 83f425d6 <__kernel_rem_pio2+0x37e> + 83f428fc: f20007d3 fmv.d.x fa5,zero + 83f42900: 0a1c addi a5,sp,272 + 83f42902: 9f3e add t5,t5,a5 + 83f42904: 023c addi a5,sp,264 + 83f42906: 000f3707 fld fa4,0(t5) + 83f4290a: 1f61 addi t5,t5,-8 + 83f4290c: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f42910: ffe79be3 bne a5,t5,83f42906 <__kernel_rem_pio2+0x6ae> + 83f42914: 04089e63 bnez a7,83f42970 <__kernel_rem_pio2+0x718> + 83f42918: 6782 ld a5,0(sp) + 83f4291a: 2752 fld fa4,272(sp) + 83f4291c: a39c fsd fa5,0(a5) + 83f4291e: 0af777d3 fsub.d fa5,fa4,fa5 + 83f42922: 00605f63 blez t1,83f42940 <__kernel_rem_pio2+0x6e8> + 83f42926: 0a38 addi a4,sp,280 + 83f42928: 4785 li a5,1 + 83f4292a: 2318 fld fa4,0(a4) + 83f4292c: 2785 addiw a5,a5,1 + 83f4292e: 0721 addi a4,a4,8 + 83f42930: 02e7f7d3 fadd.d fa5,fa5,fa4 + 83f42934: fef35be3 bge t1,a5,83f4292a <__kernel_rem_pio2+0x6d2> + 83f42938: 00088463 beqz a7,83f42940 <__kernel_rem_pio2+0x6e8> + 83f4293c: 22f797d3 fneg.d fa5,fa5 + 83f42940: 6782 ld a5,0(sp) + 83f42942: a79c fsd fa5,8(a5) + 83f42944: bd19 j 83f4275a <__kernel_rem_pio2+0x502> + 83f42946: c2051753 fcvt.w.d a4,fa0,rtz + 83f4294a: 002a9793 slli a5,s5,0x2 + 83f4294e: 0c94 addi a3,sp,592 + 83f42950: 97b6 add a5,a5,a3 + 83f42952: dce7a823 sw a4,-560(a5) + 83f42956: 8356 mv t1,s5 + 83f42958: b33d j 83f42686 <__kernel_rem_pio2+0x42e> + 83f4295a: 6782 ld a5,0(sp) + 83f4295c: 22d696d3 fneg.d fa3,fa3 + 83f42960: 22e71753 fneg.d fa4,fa4 + 83f42964: 22f797d3 fneg.d fa5,fa5 + 83f42968: a394 fsd fa3,0(a5) + 83f4296a: a798 fsd fa4,8(a5) + 83f4296c: ab9c fsd fa5,16(a5) + 83f4296e: b3f5 j 83f4275a <__kernel_rem_pio2+0x502> + 83f42970: 22f79753 fneg.d fa4,fa5 + 83f42974: 6782 ld a5,0(sp) + 83f42976: a398 fsd fa4,0(a5) + 83f42978: 2752 fld fa4,272(sp) + 83f4297a: 0af777d3 fsub.d fa5,fa4,fa5 + 83f4297e: fa6044e3 bgtz t1,83f42926 <__kernel_rem_pio2+0x6ce> + 83f42982: 22f797d3 fneg.d fa5,fa5 + 83f42986: bf6d j 83f42940 <__kernel_rem_pio2+0x6e8> + 83f42988: 6722 ld a4,8(sp) + 83f4298a: 4789 li a5,2 + 83f4298c: 00e7cb63 blt a5,a4,83f429a2 <__kernel_rem_pio2+0x74a> + 83f42990: f20007d3 fmv.d.x fa5,zero + 83f42994: f8e040e3 bgtz a4,83f42914 <__kernel_rem_pio2+0x6bc> + 83f42998: dc0711e3 bnez a4,83f4275a <__kernel_rem_pio2+0x502> + 83f4299c: da088de3 beqz a7,83f42756 <__kernel_rem_pio2+0x4fe> + 83f429a0: bb4d j 83f42752 <__kernel_rem_pio2+0x4fa> + 83f429a2: 6722 ld a4,8(sp) + 83f429a4: 478d li a5,3 + 83f429a6: f20007d3 fmv.d.x fa5,zero + 83f429aa: f0f704e3 beq a4,a5,83f428b2 <__kernel_rem_pio2+0x65a> + 83f429ae: b375 j 83f4275a <__kernel_rem_pio2+0x502> + +0000000083f429b0 <__kernel_sin>: + 83f429b0: e20507d3 fmv.x.d a5,fa0 + 83f429b4: 3e4006b7 lui a3,0x3e400 + 83f429b8: 00179713 slli a4,a5,0x1 + 83f429bc: 9305 srli a4,a4,0x21 + 83f429be: 00d75663 bge a4,a3,83f429ca <__kernel_sin+0x1a> + 83f429c2: c2051753 fcvt.w.d a4,fa0,rtz + 83f429c6: 2701 sext.w a4,a4 + 83f429c8: c749 beqz a4,83f42a52 <__kernel_sin+0xa2> + 83f429ca: f20787d3 fmv.d.x fa5,a5 + 83f429ce: 00010717 auipc a4,0x10 + 83f429d2: d6a73507 fld fa0,-662(a4) # 83f52738 + 83f429d6: 00010717 auipc a4,0x10 + 83f429da: d6a73007 fld ft0,-662(a4) # 83f52740 + 83f429de: 12f7f753 fmul.d fa4,fa5,fa5 + 83f429e2: 00010717 auipc a4,0x10 + 83f429e6: d4e73787 fld fa5,-690(a4) # 83f52730 + 83f429ea: 00010717 auipc a4,0x10 + 83f429ee: d5e73607 fld fa2,-674(a4) # 83f52748 + 83f429f2: 00010717 auipc a4,0x10 + 83f429f6: d5e73687 fld fa3,-674(a4) # 83f52750 + 83f429fa: 52f777c3 fmadd.d fa5,fa4,fa5,fa0 + 83f429fe: f2078553 fmv.d.x fa0,a5 + 83f42a02: 12e57553 fmul.d fa0,fa0,fa4 + 83f42a06: 02e7f7c3 fmadd.d fa5,fa5,fa4,ft0 + 83f42a0a: 62e7f7c3 fmadd.d fa5,fa5,fa4,fa2 + 83f42a0e: 6ae7f7c3 fmadd.d fa5,fa5,fa4,fa3 + 83f42a12: ed01 bnez a0,83f42a2a <__kernel_sin+0x7a> + 83f42a14: 00010717 auipc a4,0x10 + 83f42a18: d4473687 fld fa3,-700(a4) # 83f52758 + 83f42a1c: 6af777c3 fmadd.d fa5,fa4,fa5,fa3 + 83f42a20: f2078753 fmv.d.x fa4,a5 + 83f42a24: 72a7f543 fmadd.d fa0,fa5,fa0,fa4 + 83f42a28: 8082 ret + 83f42a2a: 12f577d3 fmul.d fa5,fa0,fa5 + 83f42a2e: 00010717 auipc a4,0x10 + 83f42a32: 86a73687 fld fa3,-1942(a4) # 83f52298 <__func__.1+0xa0> + 83f42a36: 00010717 auipc a4,0x10 + 83f42a3a: d2a73607 fld fa2,-726(a4) # 83f52760 + 83f42a3e: 7ad5f7c7 fmsub.d fa5,fa1,fa3,fa5 + 83f42a42: 5ae7f5c7 fmsub.d fa1,fa5,fa4,fa1 + 83f42a46: f20787d3 fmv.d.x fa5,a5 + 83f42a4a: 5ac57543 fmadd.d fa0,fa0,fa2,fa1 + 83f42a4e: 0aa7f553 fsub.d fa0,fa5,fa0 + 83f42a52: 8082 ret + +0000000083f42a54 : + 83f42a54: e2050553 fmv.x.d a0,fa0 + 83f42a58: 801007b7 lui a5,0x80100 + 83f42a5c: 0506 slli a0,a0,0x1 + 83f42a5e: 9105 srli a0,a0,0x21 + 83f42a60: 9d3d addw a0,a0,a5 + 83f42a62: 01f5551b srliw a0,a0,0x1f + 83f42a66: 8082 ret + +0000000083f42a68 : + 83f42a68: 00010797 auipc a5,0x10 + 83f42a6c: d007b507 fld fa0,-768(a5) # 83f52768 + 83f42a70: 8082 ret + +0000000083f42a72 : + 83f42a72: e20507d3 fmv.x.d a5,fa0 + 83f42a76: 454d li a0,19 + 83f42a78: 1141 addi sp,sp,-16 + 83f42a7a: 4347d613 srai a2,a5,0x34 + 83f42a7e: 7ff67613 andi a2,a2,2047 + 83f42a82: c016059b addiw a1,a2,-1023 + 83f42a86: 4207d713 srai a4,a5,0x20 + 83f42a8a: 0007869b sext.w a3,a5 + 83f42a8e: 0007a893 slti a7,a5,0 + 83f42a92: 0eb54d63 blt a0,a1,83f42b8c + 83f42a96: 0605cd63 bltz a1,83f42b10 + 83f42a9a: 00100637 lui a2,0x100 + 83f42a9e: 367d addiw a2,a2,-1 + 83f42aa0: 40b6563b sraw a2,a2,a1 + 83f42aa4: 00c77833 and a6,a4,a2 + 83f42aa8: 00d86833 or a6,a6,a3 + 83f42aac: 2801 sext.w a6,a6 + 83f42aae: 04080d63 beqz a6,83f42b08 + 83f42ab2: 0016561b srliw a2,a2,0x1 + 83f42ab6: 00c777b3 and a5,a4,a2 + 83f42aba: 8edd or a3,a3,a5 + 83f42abc: 2681 sext.w a3,a3 + 83f42abe: ce99 beqz a3,83f42adc + 83f42ac0: 800006b7 lui a3,0x80000 + 83f42ac4: 00a58363 beq a1,a0,83f42aca + 83f42ac8: 4681 li a3,0 + 83f42aca: fff64613 not a2,a2 + 83f42ace: 000407b7 lui a5,0x40 + 83f42ad2: 8f71 and a4,a4,a2 + 83f42ad4: 40b7d5bb sraw a1,a5,a1 + 83f42ad8: 8f4d or a4,a4,a1 + 83f42ada: 2701 sext.w a4,a4 + 83f42adc: 1682 slli a3,a3,0x20 + 83f42ade: 00389793 slli a5,a7,0x3 + 83f42ae2: 0000e617 auipc a2,0xe + 83f42ae6: 16e60613 addi a2,a2,366 # 83f50c50 + 83f42aea: 9281 srli a3,a3,0x20 + 83f42aec: 1702 slli a4,a4,0x20 + 83f42aee: 97b2 add a5,a5,a2 + 83f42af0: 8f55 or a4,a4,a3 + 83f42af2: 2398 fld fa4,0(a5) + 83f42af4: f20707d3 fmv.d.x fa5,a4 + 83f42af8: 02f777d3 fadd.d fa5,fa4,fa5 + 83f42afc: a43e fsd fa5,8(sp) + 83f42afe: 27a2 fld fa5,8(sp) + 83f42b00: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f42b04: e20787d3 fmv.x.d a5,fa5 + 83f42b08: f2078553 fmv.d.x fa0,a5 + 83f42b0c: 0141 addi sp,sp,16 + 83f42b0e: 8082 ret + 83f42b10: 800005b7 lui a1,0x80000 + 83f42b14: fff5c593 not a1,a1 + 83f42b18: 00b77633 and a2,a4,a1 + 83f42b1c: 8e55 or a2,a2,a3 + 83f42b1e: d66d beqz a2,83f42b08 + 83f42b20: 883a mv a6,a4 + 83f42b22: 1732 slli a4,a4,0x2c + 83f42b24: 9331 srli a4,a4,0x2c + 83f42b26: 8ed9 or a3,a3,a4 + 83f42b28: 40d0073b negw a4,a3 + 83f42b2c: 8f55 or a4,a4,a3 + 83f42b2e: 00c7571b srliw a4,a4,0xc + 83f42b32: 000806b7 lui a3,0x80 + 83f42b36: 8f75 and a4,a4,a3 + 83f42b38: 0000e617 auipc a2,0xe + 83f42b3c: 11860613 addi a2,a2,280 # 83f50c50 + 83f42b40: 088e slli a7,a7,0x3 + 83f42b42: 7681 lui a3,0xfffe0 + 83f42b44: 00d876b3 and a3,a6,a3 + 83f42b48: 98b2 add a7,a7,a2 + 83f42b4a: 567d li a2,-1 + 83f42b4c: 9201 srli a2,a2,0x20 + 83f42b4e: 8f55 or a4,a4,a3 + 83f42b50: 8ff1 and a5,a5,a2 + 83f42b52: 1702 slli a4,a4,0x20 + 83f42b54: 8f5d or a4,a4,a5 + 83f42b56: 0008b707 fld fa4,0(a7) # ffffffffbff00000 <_end+0xffffffff3bf002c0> + 83f42b5a: f20707d3 fmv.d.x fa5,a4 + 83f42b5e: 800006b7 lui a3,0x80000 + 83f42b62: 00d876b3 and a3,a6,a3 + 83f42b66: 02f777d3 fadd.d fa5,fa4,fa5 + 83f42b6a: a43e fsd fa5,8(sp) + 83f42b6c: 27a2 fld fa5,8(sp) + 83f42b6e: 0141 addi sp,sp,16 + 83f42b70: 0ae7f7d3 fsub.d fa5,fa5,fa4 + 83f42b74: e2078753 fmv.x.d a4,fa5 + 83f42b78: 02075793 srli a5,a4,0x20 + 83f42b7c: 8fed and a5,a5,a1 + 83f42b7e: 8fd5 or a5,a5,a3 + 83f42b80: 1782 slli a5,a5,0x20 + 83f42b82: 8e79 and a2,a2,a4 + 83f42b84: 8fd1 or a5,a5,a2 + 83f42b86: f2078553 fmv.d.x fa0,a5 + 83f42b8a: 8082 ret + 83f42b8c: 03300513 li a0,51 + 83f42b90: 00b55b63 bge a0,a1,83f42ba6 + 83f42b94: 40000713 li a4,1024 + 83f42b98: f6e598e3 bne a1,a4,83f42b08 + 83f42b9c: 02a577d3 fadd.d fa5,fa0,fa0 + 83f42ba0: e20787d3 fmv.x.d a5,fa5 + 83f42ba4: b795 j 83f42b08 + 83f42ba6: bed6061b addiw a2,a2,-1043 + 83f42baa: 55fd li a1,-1 + 83f42bac: 00c5d5bb srlw a1,a1,a2 + 83f42bb0: 00b6f533 and a0,a3,a1 + 83f42bb4: 2501 sext.w a0,a0 + 83f42bb6: 8836 mv a6,a3 + 83f42bb8: d921 beqz a0,83f42b08 + 83f42bba: 0015d59b srliw a1,a1,0x1 + 83f42bbe: 00b6f7b3 and a5,a3,a1 + 83f42bc2: 2781 sext.w a5,a5 + 83f42bc4: df81 beqz a5,83f42adc + 83f42bc6: fff5c593 not a1,a1 + 83f42bca: 400007b7 lui a5,0x40000 + 83f42bce: 0105f6b3 and a3,a1,a6 + 83f42bd2: 40c7d63b sraw a2,a5,a2 + 83f42bd6: 8ed1 or a3,a3,a2 + 83f42bd8: 2681 sext.w a3,a3 + 83f42bda: b709 j 83f42adc + +0000000083f42bdc : + 83f42bdc: e20507d3 fmv.x.d a5,fa0 + 83f42be0: 4347d713 srai a4,a5,0x34 + 83f42be4: 7ff77713 andi a4,a4,2047 + 83f42be8: 4207d693 srai a3,a5,0x20 + 83f42bec: ef25 bnez a4,83f42c64 + 83f42bee: 1686 slli a3,a3,0x21 + 83f42bf0: 9285 srli a3,a3,0x21 + 83f42bf2: 8edd or a3,a3,a5 + 83f42bf4: 2681 sext.w a3,a3 + 83f42bf6: c6a5 beqz a3,83f42c5e + 83f42bf8: 00010717 auipc a4,0x10 + 83f42bfc: 9b073787 fld fa5,-1616(a4) # 83f525a8 + 83f42c00: 12f577d3 fmul.d fa5,fa0,fa5 + 83f42c04: 7751 lui a4,0xffff4 + 83f42c06: cb070713 addi a4,a4,-848 # ffffffffffff3cb0 <_end+0xffffffff7bff3f70> + 83f42c0a: e20787d3 fmv.x.d a5,fa5 + 83f42c0e: 0ce54f63 blt a0,a4,83f42cec + 83f42c12: 4347d713 srai a4,a5,0x34 + 83f42c16: 7ff77713 andi a4,a4,2047 + 83f42c1a: 4207d693 srai a3,a5,0x20 + 83f42c1e: fca7071b addiw a4,a4,-54 + 83f42c22: 00e5063b addw a2,a0,a4 + 83f42c26: 7fe00593 li a1,2046 + 83f42c2a: 8732 mv a4,a2 + 83f42c2c: 04c5c763 blt a1,a2,83f42c7a + 83f42c30: 08c04f63 bgtz a2,83f42cce + 83f42c34: fcb00593 li a1,-53 + 83f42c38: 06b65063 bge a2,a1,83f42c98 + 83f42c3c: 6731 lui a4,0xc + 83f42c3e: 35070713 addi a4,a4,848 # c350 <_EL1_STACK_SIZE+0xbb50> + 83f42c42: 02a74c63 blt a4,a0,83f42c7a + 83f42c46: f20787d3 fmv.d.x fa5,a5 + 83f42c4a: 00010717 auipc a4,0x10 + 83f42c4e: a2673707 fld fa4,-1498(a4) # 83f52670 + 83f42c52: 22f707d3 fsgnj.d fa5,fa4,fa5 + 83f42c56: 12e7f7d3 fmul.d fa5,fa5,fa4 + 83f42c5a: e20787d3 fmv.x.d a5,fa5 + 83f42c5e: f2078553 fmv.d.x fa0,a5 + 83f42c62: 8082 ret + 83f42c64: 7ff00613 li a2,2047 + 83f42c68: fac71de3 bne a4,a2,83f42c22 + 83f42c6c: 02a577d3 fadd.d fa5,fa0,fa0 + 83f42c70: e20787d3 fmv.x.d a5,fa5 + 83f42c74: f2078553 fmv.d.x fa0,a5 + 83f42c78: 8082 ret + 83f42c7a: f20787d3 fmv.d.x fa5,a5 + 83f42c7e: 00010717 auipc a4,0x10 + 83f42c82: 82273707 fld fa4,-2014(a4) # 83f524a0 + 83f42c86: 22f707d3 fsgnj.d fa5,fa4,fa5 + 83f42c8a: 12e7f7d3 fmul.d fa5,fa5,fa4 + 83f42c8e: e20787d3 fmv.x.d a5,fa5 + 83f42c92: f2078553 fmv.d.x fa0,a5 + 83f42c96: 8082 ret + 83f42c98: 0366071b addiw a4,a2,54 + 83f42c9c: 80100637 lui a2,0x80100 + 83f42ca0: 167d addi a2,a2,-1 + 83f42ca2: 8ef1 and a3,a3,a2 + 83f42ca4: 0147171b slliw a4,a4,0x14 + 83f42ca8: 8f55 or a4,a4,a3 + 83f42caa: 56fd li a3,-1 + 83f42cac: 9281 srli a3,a3,0x20 + 83f42cae: 1702 slli a4,a4,0x20 + 83f42cb0: 8ff5 and a5,a5,a3 + 83f42cb2: 8fd9 or a5,a5,a4 + 83f42cb4: f2078753 fmv.d.x fa4,a5 + 83f42cb8: 00010717 auipc a4,0x10 + 83f42cbc: ab873787 fld fa5,-1352(a4) # 83f52770 + 83f42cc0: 12e7f7d3 fmul.d fa5,fa5,fa4 + 83f42cc4: e20787d3 fmv.x.d a5,fa5 + 83f42cc8: f2078553 fmv.d.x fa0,a5 + 83f42ccc: 8082 ret + 83f42cce: 80100637 lui a2,0x80100 + 83f42cd2: 167d addi a2,a2,-1 + 83f42cd4: 8ef1 and a3,a3,a2 + 83f42cd6: 0147171b slliw a4,a4,0x14 + 83f42cda: 8f55 or a4,a4,a3 + 83f42cdc: 56fd li a3,-1 + 83f42cde: 9281 srli a3,a3,0x20 + 83f42ce0: 1702 slli a4,a4,0x20 + 83f42ce2: 8ff5 and a5,a5,a3 + 83f42ce4: 8fd9 or a5,a5,a4 + 83f42ce6: f2078553 fmv.d.x fa0,a5 + 83f42cea: 8082 ret + 83f42cec: f2078753 fmv.d.x fa4,a5 + 83f42cf0: 00010717 auipc a4,0x10 + 83f42cf4: 98073787 fld fa5,-1664(a4) # 83f52670 + 83f42cf8: 12f777d3 fmul.d fa5,fa4,fa5 + 83f42cfc: e20787d3 fmv.x.d a5,fa5 + 83f42d00: f2078553 fmv.d.x fa0,a5 + 83f42d04: 8082 ret + +0000000083f42d06 : + 83f42d06: 41f5579b sraiw a5,a0,0x1f + 83f42d0a: 8d3d xor a0,a0,a5 + 83f42d0c: 9d1d subw a0,a0,a5 + 83f42d0e: 8082 ret + +0000000083f42d10 <__errno>: + 83f42d10: 00010517 auipc a0,0x10 + 83f42d14: 4a053503 ld a0,1184(a0) # 83f531b0 <_impure_ptr> + 83f42d18: 8082 ret + +0000000083f42d1a : + 83f42d1a: 02a5f263 bgeu a1,a0,83f42d3e + 83f42d1e: 00c587b3 add a5,a1,a2 + 83f42d22: 00f57e63 bgeu a0,a5,83f42d3e + 83f42d26: 00c50733 add a4,a0,a2 + 83f42d2a: ca5d beqz a2,83f42de0 + 83f42d2c: fff7c683 lbu a3,-1(a5) # 3fffffff + 83f42d30: 17fd addi a5,a5,-1 + 83f42d32: 177d addi a4,a4,-1 + 83f42d34: 00d70023 sb a3,0(a4) + 83f42d38: fef59ae3 bne a1,a5,83f42d2c + 83f42d3c: 8082 ret + 83f42d3e: 47fd li a5,31 + 83f42d40: 02c7e163 bltu a5,a2,83f42d62 + 83f42d44: 87aa mv a5,a0 + 83f42d46: fff60693 addi a3,a2,-1 # ffffffff800fffff <_end+0xfffffffefc1002bf> + 83f42d4a: c245 beqz a2,83f42dea + 83f42d4c: 0685 addi a3,a3,1 + 83f42d4e: 96be add a3,a3,a5 + 83f42d50: 0005c703 lbu a4,0(a1) # ffffffff80000000 <_end+0xfffffffefc0002c0> + 83f42d54: 0785 addi a5,a5,1 + 83f42d56: 0585 addi a1,a1,1 + 83f42d58: fee78fa3 sb a4,-1(a5) + 83f42d5c: fed79ae3 bne a5,a3,83f42d50 + 83f42d60: 8082 ret + 83f42d62: 00a5e7b3 or a5,a1,a0 + 83f42d66: 8b9d andi a5,a5,7 + 83f42d68: efad bnez a5,83f42de2 + 83f42d6a: fe060893 addi a7,a2,-32 + 83f42d6e: fe08f893 andi a7,a7,-32 + 83f42d72: 02088893 addi a7,a7,32 + 83f42d76: 01150833 add a6,a0,a7 + 83f42d7a: 872e mv a4,a1 + 83f42d7c: 87aa mv a5,a0 + 83f42d7e: 6314 ld a3,0(a4) + 83f42d80: 02070713 addi a4,a4,32 + 83f42d84: 02078793 addi a5,a5,32 + 83f42d88: fed7b023 sd a3,-32(a5) + 83f42d8c: fe873683 ld a3,-24(a4) + 83f42d90: fed7b423 sd a3,-24(a5) + 83f42d94: ff073683 ld a3,-16(a4) + 83f42d98: fed7b823 sd a3,-16(a5) + 83f42d9c: ff873683 ld a3,-8(a4) + 83f42da0: fed7bc23 sd a3,-8(a5) + 83f42da4: fcf81de3 bne a6,a5,83f42d7e + 83f42da8: 01867713 andi a4,a2,24 + 83f42dac: 95c6 add a1,a1,a7 + 83f42dae: 01f67813 andi a6,a2,31 + 83f42db2: cf0d beqz a4,83f42dec + 83f42db4: 872e mv a4,a1 + 83f42db6: 88be mv a7,a5 + 83f42db8: 4e1d li t3,7 + 83f42dba: 00073303 ld t1,0(a4) + 83f42dbe: 0721 addi a4,a4,8 + 83f42dc0: 40e806b3 sub a3,a6,a4 + 83f42dc4: 0068b023 sd t1,0(a7) + 83f42dc8: 96ae add a3,a3,a1 + 83f42dca: 08a1 addi a7,a7,8 + 83f42dcc: fede67e3 bltu t3,a3,83f42dba + 83f42dd0: ff880713 addi a4,a6,-8 + 83f42dd4: 9b61 andi a4,a4,-8 + 83f42dd6: 0721 addi a4,a4,8 + 83f42dd8: 8a1d andi a2,a2,7 + 83f42dda: 97ba add a5,a5,a4 + 83f42ddc: 95ba add a1,a1,a4 + 83f42dde: b7a5 j 83f42d46 + 83f42de0: 8082 ret + 83f42de2: fff60693 addi a3,a2,-1 + 83f42de6: 87aa mv a5,a0 + 83f42de8: b795 j 83f42d4c + 83f42dea: 8082 ret + 83f42dec: 8642 mv a2,a6 + 83f42dee: bfa1 j 83f42d46 + +0000000083f42df0 <__clzdi2>: + 83f42df0: 03800793 li a5,56 + 83f42df4: 00f55733 srl a4,a0,a5 + 83f42df8: 0ff77713 andi a4,a4,255 + 83f42dfc: e319 bnez a4,83f42e02 <__clzdi2+0x12> + 83f42dfe: 17e1 addi a5,a5,-8 + 83f42e00: fbf5 bnez a5,83f42df4 <__clzdi2+0x4> + 83f42e02: 04000713 li a4,64 + 83f42e06: 8f1d sub a4,a4,a5 + 83f42e08: 00f55533 srl a0,a0,a5 + 83f42e0c: 0000e797 auipc a5,0xe + 83f42e10: e5478793 addi a5,a5,-428 # 83f50c60 <__clz_tab> + 83f42e14: 953e add a0,a0,a5 + 83f42e16: 00054503 lbu a0,0(a0) + 83f42e1a: 40a7053b subw a0,a4,a0 + 83f42e1e: 8082 ret + +0000000083f42e20
: +uint8_t ucHeap[ configTOTAL_HEAP_SIZE ] __attribute__ ( ( section( ".heap" ) ) ); +#endif +/*-----------------------------------------------------------*/ + +int main(void) +{ + 83f42e20: 1141 addi sp,sp,-16 + 83f42e22: e406 sd ra,8(sp) + pre_system_init(); + 83f42e24: 670090ef jal ra,83f4c494 + printf("CVIRTOS Build Date:%s (Time :%s) \n", __DATE__, __TIME__); + 83f42e28: 0000e617 auipc a2,0xe + 83f42e2c: f3860613 addi a2,a2,-200 # 83f50d60 <__clz_tab+0x100> + 83f42e30: 0000e597 auipc a1,0xe + 83f42e34: f4058593 addi a1,a1,-192 # 83f50d70 <__clz_tab+0x110> + 83f42e38: 0000e517 auipc a0,0xe + 83f42e3c: f4850513 addi a0,a0,-184 # 83f50d80 <__clz_tab+0x120> + 83f42e40: 154090ef jal ra,83f4bf94 + /* Configure the hardware ready to run the demo. */ + prvSetupHardware(); +#if ( configUSE_TRACE_FACILITY == 1 ) + vTraceEnable(TRC_START); +#endif + post_system_init(); + 83f42e44: 5d0090ef jal ra,83f4c414 + +#ifdef CVIRTOS + { + main_cvirtos(); + 83f42e48: 51a000ef jal ra,83f43362 +#error "Not correct running definition" +#endif + + /* Don't expect to reach here. */ + return 0; +} + 83f42e4c: 60a2 ld ra,8(sp) + 83f42e4e: 4501 li a0,0 + 83f42e50: 0141 addi sp,sp,16 + 83f42e52: 8082 ret + +0000000083f42e54 : +#endif +} +/*-----------------------------------------------------------*/ + +void vApplicationMallocFailedHook(void) +{ + 83f42e54: 1141 addi sp,sp,-16 + 83f42e56: e406 sd ra,8(sp) + /* Called if a call to pvPortMalloc() fails because there is insufficient + free memory available in the FreeRTOS heap. pvPortMalloc() is called + internally by FreeRTOS API functions that create tasks, queues, software + timers, and semaphores. The size of the FreeRTOS heap is set by the + configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */ + taskDISABLE_INTERRUPTS(); + 83f42e58: 30047073 csrci mstatus,8 + dump_uart_disable(); + 83f42e5c: 083090ef jal ra,83f4c6de + printf("vApplicationMallocFailedHook\n"); + 83f42e60: 0000e517 auipc a0,0xe + 83f42e64: f4850513 addi a0,a0,-184 # 83f50da8 <__clz_tab+0x148> + 83f42e68: 12c090ef jal ra,83f4bf94 + for (;;) + 83f42e6c: a001 j 83f42e6c + +0000000083f42e6e : + ; +} +/*-----------------------------------------------------------*/ + +void vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName) +{ + 83f42e6e: 1141 addi sp,sp,-16 + 83f42e70: e406 sd ra,8(sp) + 83f42e72: e022 sd s0,0(sp) + 83f42e74: 842e mv s0,a1 + (void)pcTaskName; + (void)pxTask; + dump_uart_disable(); + 83f42e76: 069090ef jal ra,83f4c6de + printf("%s %s\n", __func__, pcTaskName); + 83f42e7a: 8622 mv a2,s0 + 83f42e7c: 0000e597 auipc a1,0xe + 83f42e80: f5458593 addi a1,a1,-172 # 83f50dd0 <__func__.4> + 83f42e84: 0000e517 auipc a0,0xe + 83f42e88: f4450513 addi a0,a0,-188 # 83f50dc8 <__clz_tab+0x168> + 83f42e8c: 108090ef jal ra,83f4bf94 + /* Run time stack overflow checking is performed if + configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + function is called if a stack overflow is detected. */ + taskDISABLE_INTERRUPTS(); + 83f42e90: 30047073 csrci mstatus,8 + for (;;) + 83f42e94: a001 j 83f42e94 + +0000000083f42e96 : + /* Only the comprehensive demo actually uses the tick hook. */ + extern void vFullDemoTickHook(void); + vFullDemoTickHook(); + } +#endif +} + 83f42e96: 8082 ret + +0000000083f42e98 : + static StaticTask_t xIdleTaskTCB; + static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE]; + + /* Pass out a pointer to the StaticTask_t structure in which the Idle task's + state will be stored. */ + *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; + 83f42e98: 00016797 auipc a5,0x16 + 83f42e9c: 36878793 addi a5,a5,872 # 83f59200 + 83f42ea0: e11c sd a5,0(a0) + + /* Pass out the array that will be used as the Idle task's stack. */ + *ppxIdleTaskStackBuffer = uxIdleTaskStack; + 83f42ea2: 00010797 auipc a5,0x10 + 83f42ea6: 35e78793 addi a5,a5,862 # 83f53200 <__data1_end> + 83f42eaa: e19c sd a5,0(a1) + + /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer. + Note that, as the array is necessarily of type StackType_t, + configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; + 83f42eac: 40000793 li a5,1024 + 83f42eb0: c21c sw a5,0(a2) +} + 83f42eb2: 8082 ret + +0000000083f42eb4 : + static StaticTask_t xTimerTaskTCB; + static StackType_t uxTimerTaskStack[configTIMER_TASK_STACK_DEPTH]; + + /* Pass out a pointer to the StaticTask_t structure in which the Timer + task's state will be stored. */ + *ppxTimerTaskTCBBuffer = &xTimerTaskTCB; + 83f42eb4: 00016797 auipc a5,0x16 + 83f42eb8: 3f478793 addi a5,a5,1012 # 83f592a8 + 83f42ebc: e11c sd a5,0(a0) + + /* Pass out the array that will be used as the Timer task's stack. */ + *ppxTimerTaskStackBuffer = uxTimerTaskStack; + 83f42ebe: 00012797 auipc a5,0x12 + 83f42ec2: 34278793 addi a5,a5,834 # 83f55200 + 83f42ec6: e19c sd a5,0(a1) + + /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer. + Note that, as the array is necessarily of type StackType_t, + configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; + 83f42ec8: 6785 lui a5,0x1 + 83f42eca: 80078793 addi a5,a5,-2048 # 800 <_EL1_STACK_SIZE> + 83f42ece: c21c sw a5,0(a2) +} + 83f42ed0: 8082 ret + +0000000083f42ed2 : + +#ifdef FAST_IMAGE_ENABLE +extern JPEG_PIC encoded_pics[MAX_JPEG_NUM]; +#endif +void prvCmdQuRunTask(void *pvParameters) +{ + 83f42ed2: 7159 addi sp,sp,-112 + 83f42ed4: f45e sd s7,40(sp) + int send_to_cpu = SEND_TO_CPU1; + + unsigned int reg_base = MAILBOX_REG_BASE; + + /* set mcu_status to type1 running*/ + transfer_config.mcu_status = MCU_STATUS_RTOS_T1_RUNNING; + 83f42ed6: 0001ab97 auipc s7,0x1a + 83f42eda: 5aab8b93 addi s7,s7,1450 # 83f5d480 +{ + 83f42ede: e0d2 sd s4,64(sp) + + if (transfer_config.conf_magic == C906_MAGIC_HEADER) + send_to_cpu = SEND_TO_CPU1; + else if (transfer_config.conf_magic == CA53_MAGIC_HEADER) + 83f42ee0: 000baa03 lw s4,0(s7) + 83f42ee4: a55ad737 lui a4,0xa55ad + send_to_cpu = SEND_TO_CPU0; + /* to compatible code with linux side */ + cmdq = &rtos_cmdq; + mbox_reg = (struct mailbox_set_register *) reg_base; + 83f42ee8: 019007b7 lui a5,0x1900 + else if (transfer_config.conf_magic == CA53_MAGIC_HEADER) + 83f42eec: a5370713 addi a4,a4,-1453 # ffffffffa55aca53 <_end+0xffffffff215acd13> + 83f42ef0: 40ea0a33 sub s4,s4,a4 + mbox_done_reg = (struct mailbox_done_register *) (reg_base + 2); + 83f42ef4: 00278693 addi a3,a5,2 # 1900002 + mailbox_context = (unsigned long *) (MAILBOX_REG_BUFF); + 83f42ef8: 40078713 addi a4,a5,1024 + transfer_config.mcu_status = MCU_STATUS_RTOS_T1_RUNNING; + 83f42efc: 4615 li a2,5 +{ + 83f42efe: e4ce sd s3,72(sp) + 83f42f00: f85a sd s6,48(sp) + mailbox_context = (unsigned long *) (MAILBOX_REG_BUFF); + 83f42f02: 0001d997 auipc s3,0x1d + 83f42f06: ca698993 addi s3,s3,-858 # 83f5fba8 + mbox_reg = (struct mailbox_set_register *) reg_base; + 83f42f0a: 0001db17 auipc s6,0x1d + 83f42f0e: caeb0b13 addi s6,s6,-850 # 83f5fbb8 + 83f42f12: 00fb3023 sd a5,0(s6) +{ + 83f42f16: f486 sd ra,104(sp) + 83f42f18: f0a2 sd s0,96(sp) + 83f42f1a: eca6 sd s1,88(sp) + 83f42f1c: e8ca sd s2,80(sp) + 83f42f1e: fc56 sd s5,56(sp) + 83f42f20: f062 sd s8,32(sp) + 83f42f22: ec66 sd s9,24(sp) + send_to_cpu = SEND_TO_CPU0; + 83f42f24: 01403ab3 snez s5,s4 + transfer_config.mcu_status = MCU_STATUS_RTOS_T1_RUNNING; + 83f42f28: 02cb8323 sb a2,38(s7) + mbox_done_reg = (struct mailbox_done_register *) (reg_base + 2); + 83f42f2c: 0001d797 auipc a5,0x1d + 83f42f30: c8d7b223 sd a3,-892(a5) # 83f5fbb0 + mailbox_context = (unsigned long *) (MAILBOX_REG_BUFF); + 83f42f34: 00e9b023 sd a4,0(s3) +{ + 83f42f38: e86a sd s10,16(sp) + + cvi_spinlock_init(); + 83f42f3a: 3b5090ef jal ra,83f4caee + else if (transfer_config.conf_magic == CA53_MAGIC_HEADER) + 83f42f3e: 8a56 mv s4,s5 + printf("prvCmdQuRunTask run\n"); + 83f42f40: 0000e517 auipc a0,0xe + 83f42f44: eb050513 addi a0,a0,-336 # 83f50df0 <__func__.4+0x20> + break; + case SYS_CMD_INFO_STOP_ISR_DONE: + // stop interrupt in order to avoid losing frame + if (rtos_cmdq.ip_id == IP_VI) { + stop_ip |= STOP_CMD_DONE_VI; + rtos_cmdq.ip_id = IP_VCODEC; + 83f42f48: 6c15 lui s8,0x5 + debug_printf("rtos_cmdqu_t->cmd_id = %d\n", rtos_cmdqu_t->cmd_id); + debug_printf("rtos_cmdqu_t->block = %d\n", rtos_cmdqu_t->block); + debug_printf("rtos_cmdqu_t->param_ptr addr=%x %x\n", &rtos_cmdqu_t->param_ptr, rtos_cmdqu_t->param_ptr); + debug_printf("*ptr = %x\n", *ptr); + // clear mailbox + mbox_reg->cpu_mbox_set[send_to_cpu].cpu_mbox_int_clr.mbox_int_clr = (1 << valid); + 83f42f4a: 0a85 addi s5,s5,1 + if (rtos_cmdqu_t->resv.valid.linux_valid == 0 && rtos_cmdqu_t->resv.valid.rtos_valid == 0) { + 83f42f4c: 0ffff437 lui s0,0xffff + printf("prvCmdQuRunTask run\n"); + 83f42f50: 044090ef jal ra,83f4bf94 + 83f42f54: 00010917 auipc s2,0x10 + 83f42f58: f7490913 addi s2,s2,-140 # 83f52ec8 + if (rtos_cmdqu_t->resv.valid.linux_valid == 0 && rtos_cmdqu_t->resv.valid.rtos_valid == 0) { + 83f42f5c: 0412 slli s0,s0,0x4 + for (valid = 0; valid < MAILBOX_MAX_NUM; valid++) { + 83f42f5e: 44a1 li s1,8 + mbox_reg->cpu_mbox_set[send_to_cpu].cpu_mbox_int_clr.mbox_int_clr = (1 << valid); + 83f42f60: 0a92 slli s5,s5,0x4 + rtos_cmdq.ip_id = IP_VCODEC; + 83f42f62: 301c0c93 addi s9,s8,769 # 5301 <_EL1_STACK_SIZE+0x4b01> + xQueueReceive(gTaskCtx[E_QUEUE_CMDQU].queHandle, &rtos_cmdq, portMAX_DELAY); + 83f42f66: 1a893503 ld a0,424(s2) + 83f42f6a: 567d li a2,-1 + 83f42f6c: 002c addi a1,sp,8 + 83f42f6e: 4d90b0ef jal ra,83f4ec46 + switch (rtos_cmdq.cmd_id) { + 83f42f72: 67a2 ld a5,8(sp) + 83f42f74: 4729 li a4,10 + 83f42f76: 83a1 srli a5,a5,0x8 + 83f42f78: 02f78793 addi a5,a5,47 + 83f42f7c: 07f7f793 andi a5,a5,127 + 83f42f80: 02f76063 bltu a4,a5,83f42fa0 + 83f42f84: 0000e717 auipc a4,0xe + 83f42f88: f1c70713 addi a4,a4,-228 # 83f50ea0 <__func__.4+0xd0> + 83f42f8c: 078a slli a5,a5,0x2 + 83f42f8e: 97ba add a5,a5,a4 + 83f42f90: 439c lw a5,0(a5) + 83f42f92: 97ba add a5,a5,a4 + 83f42f94: 8782 jr a5 + if (rtos_cmdq.param_ptr >= MAX_JPEG_NUM) { + 83f42f96: 45b2 lw a1,12(sp) + 83f42f98: 47bd li a5,15 + 83f42f9a: 10b7ed63 bltu a5,a1,83f430b4 + rtos_cmdq.param_ptr = 0x0; + 83f42f9e: c602 sw zero,12(sp) + drv_spin_lock_irqsave(&mailbox_lock, flags); + 83f42fa0: 00010517 auipc a0,0x10 + 83f42fa4: 21850513 addi a0,a0,536 # 83f531b8 + rtos_cmdqu_t = (cmdqu_t *) mailbox_context; + 83f42fa8: 0009bd03 ld s10,0(s3) + drv_spin_lock_irqsave(&mailbox_lock, flags); + 83f42fac: 477090ef jal ra,83f4cc22 <_hw_raw_spin_lock_irqsave> + if (flags == MAILBOX_LOCK_FAILED) { + 83f42fb0: 57fd li a5,-1 + drv_spin_lock_irqsave(&mailbox_lock, flags); + 83f42fb2: 85aa mv a1,a0 + for (valid = 0; valid < MAILBOX_MAX_NUM; valid++) { + 83f42fb4: 4701 li a4,0 + if (flags == MAILBOX_LOCK_FAILED) { + 83f42fb6: 06f50b63 beq a0,a5,83f4302c + if (rtos_cmdqu_t->resv.valid.linux_valid == 0 && rtos_cmdqu_t->resv.valid.rtos_valid == 0) { + 83f42fba: 000d3783 ld a5,0(s10) + 83f42fbe: 8fe1 and a5,a5,s0 + 83f42fc0: 10078263 beqz a5,83f430c4 + for (valid = 0; valid < MAILBOX_MAX_NUM; valid++) { + 83f42fc4: 2705 addiw a4,a4,1 + // trigger mailbox valid to rtos + mbox_reg->cpu_mbox_en[send_to_cpu].mbox_info |= (1 << valid); + mbox_reg->mbox_set.mbox_set = (1 << valid); + break; + } + rtos_cmdqu_t++; + 83f42fc6: 0d21 addi s10,s10,8 + for (valid = 0; valid < MAILBOX_MAX_NUM; valid++) { + 83f42fc8: fe9719e3 bne a4,s1,83f42fba + } + drv_spin_unlock_irqrestore(&mailbox_lock, flags); + 83f42fcc: 00010517 auipc a0,0x10 + 83f42fd0: 1ec50513 addi a0,a0,492 # 83f531b8 + 83f42fd4: 4b5090ef jal ra,83f4cc88 <_hw_raw_spin_unlock_irqrestore> + if (valid >= MAILBOX_MAX_NUM) { + printf("No valid mailbox is available\n"); + 83f42fd8: 0000e517 auipc a0,0xe + 83f42fdc: ea850513 addi a0,a0,-344 # 83f50e80 <__func__.4+0xb0> + 83f42fe0: 7b5080ef jal ra,83f4bf94 + return -1; + } + break; + } + } +} + 83f42fe4: 70a6 ld ra,104(sp) + 83f42fe6: 7406 ld s0,96(sp) + 83f42fe8: 64e6 ld s1,88(sp) + 83f42fea: 6946 ld s2,80(sp) + 83f42fec: 69a6 ld s3,72(sp) + 83f42fee: 6a06 ld s4,64(sp) + 83f42ff0: 7ae2 ld s5,56(sp) + 83f42ff2: 7b42 ld s6,48(sp) + 83f42ff4: 7ba2 ld s7,40(sp) + 83f42ff6: 7c02 ld s8,32(sp) + 83f42ff8: 6ce2 ld s9,24(sp) + 83f42ffa: 6d42 ld s10,16(sp) + 83f42ffc: 6165 addi sp,sp,112 + 83f42ffe: 8082 ret + dump_uart_disable(); + 83f43000: 6de090ef jal ra,83f4c6de + break; + 83f43004: b78d j 83f42f66 + dump_uart_enable(); + 83f43006: 6c0090ef jal ra,83f4c6c6 + break; + 83f4300a: bfb1 j 83f42f66 + rtos_cmdq.param_ptr = (unsigned int) dump_uart_msg(); + 83f4300c: 6ea090ef jal ra,83f4c6f6 + 83f43010: c62a sw a0,12(sp) + drv_spin_lock_irqsave(&mailbox_lock, flags); + 83f43012: 00010517 auipc a0,0x10 + 83f43016: 1a650513 addi a0,a0,422 # 83f531b8 + rtos_cmdqu_t = (cmdqu_t *) mailbox_context; + 83f4301a: 0009bd03 ld s10,0(s3) + drv_spin_lock_irqsave(&mailbox_lock, flags); + 83f4301e: 405090ef jal ra,83f4cc22 <_hw_raw_spin_lock_irqsave> + if (flags == MAILBOX_LOCK_FAILED) { + 83f43022: 57fd li a5,-1 + drv_spin_lock_irqsave(&mailbox_lock, flags); + 83f43024: 85aa mv a1,a0 + for (valid = 0; valid < MAILBOX_MAX_NUM; valid++) { + 83f43026: 4701 li a4,0 + if (flags == MAILBOX_LOCK_FAILED) { + 83f43028: f8f519e3 bne a0,a5,83f42fba + printf("[%s][%d] drv_spin_lock_irqsave failed! ip_id = %d , cmd_id = %d\n" , cmdq->ip_id , cmdq->cmd_id); + 83f4302c: 6622 ld a2,8(sp) + 83f4302e: 00814583 lbu a1,8(sp) + 83f43032: 0000e517 auipc a0,0xe + 83f43036: e0650513 addi a0,a0,-506 # 83f50e38 <__func__.4+0x68> + 83f4303a: 8221 srli a2,a2,0x8 + 83f4303c: 07f67613 andi a2,a2,127 + 83f43040: 755080ef jal ra,83f4bf94 + break; + 83f43044: b70d j 83f42f66 + if (rtos_cmdq.ip_id == IP_VI) { + 83f43046: 00814703 lbu a4,8(sp) + stop_ip |= STOP_CMD_DONE_VI; + 83f4304a: 0001d817 auipc a6,0x1d + 83f4304e: b7680813 addi a6,a6,-1162 # 83f5fbc0 + if (rtos_cmdq.ip_id == IP_VI) { + 83f43052: 468d li a3,3 + stop_ip |= STOP_CMD_DONE_VI; + 83f43054: 00082783 lw a5,0(a6) + if (rtos_cmdq.ip_id == IP_VI) { + 83f43058: 0ed70563 beq a4,a3,83f43142 + if (rtos_cmdq.ip_id == IP_VCODEC) + 83f4305c: 4685 li a3,1 + 83f4305e: 00d71663 bne a4,a3,83f4306a + stop_ip |= STOP_CMD_DONE_VCODE; + 83f43062: 0047e793 ori a5,a5,4 + 83f43066: 00f82023 sw a5,0(a6) + if (stop_ip != STOP_CMD_DONE_ALL) + 83f4306a: 4719 li a4,6 + 83f4306c: eee79de3 bne a5,a4,83f42f66 + rtos_cmdq.ip_id = IP_SYSTEM; + 83f43070: 00f10423 sb a5,8(sp) + 83f43074: b735 j 83f42fa0 + rtos_cmdq.ip_id = IP_VI; + 83f43076: 00815783 lhu a5,8(sp) + 83f4307a: 7761 lui a4,0xffff8 + xQueueSend(gTaskCtx[E_QUEUE_VI].queHandle, &rtos_cmdq, 0U); + 83f4307c: 0d093503 ld a0,208(s2) + rtos_cmdq.ip_id = IP_VI; + 83f43080: 8ff9 and a5,a5,a4 + 83f43082: 303c0713 addi a4,s8,771 + 83f43086: 8fd9 or a5,a5,a4 + xQueueSend(gTaskCtx[E_QUEUE_VI].queHandle, &rtos_cmdq, 0U); + 83f43088: 4681 li a3,0 + 83f4308a: 4601 li a2,0 + 83f4308c: 002c addi a1,sp,8 + rtos_cmdq.ip_id = IP_VI; + 83f4308e: 00f11423 sh a5,8(sp) + stop_ip = 0; + 83f43092: 0001d797 auipc a5,0x1d + 83f43096: b207a723 sw zero,-1234(a5) # 83f5fbc0 + xQueueSend(gTaskCtx[E_QUEUE_VI].queHandle, &rtos_cmdq, 0U); + 83f4309a: 1ad0b0ef jal ra,83f4ea46 + break; + 83f4309e: b5e1 j 83f42f66 + rtos_cmdq.cmd_id = SYS_CMD_INFO_RTOS_INIT_DONE; + 83f430a0: 00914783 lbu a5,9(sp) + rtos_cmdq.param_ptr = &transfer_config; + 83f430a4: c65e sw s7,12(sp) + rtos_cmdq.cmd_id = SYS_CMD_INFO_RTOS_INIT_DONE; + 83f430a6: f807f793 andi a5,a5,-128 + 83f430aa: 0527e793 ori a5,a5,82 + 83f430ae: 00f104a3 sb a5,9(sp) + goto send_label; + 83f430b2: b5fd j 83f42fa0 + printf("SYS_CMD_INFO_DUMP_JPG idx = %d, set idx to 0\n", rtos_cmdq.param_ptr); + 83f430b4: 0000e517 auipc a0,0xe + 83f430b8: d5450513 addi a0,a0,-684 # 83f50e08 <__func__.4+0x38> + 83f430bc: 6d9080ef jal ra,83f4bf94 + rtos_cmdq.param_ptr = 0x0; + 83f430c0: c602 sw zero,12(sp) + goto send_label; + 83f430c2: bdf9 j 83f42fa0 + cmdq->resv.valid.rtos_valid = 1; + 83f430c4: 4785 li a5,1 + 83f430c6: 00f105a3 sb a5,11(sp) + *ptr = ((cmdq->ip_id << 0) | (cmdq->cmd_id << 8) | (cmdq->block << 15) | + 83f430ca: 66a2 ld a3,8(sp) + (cmdq->resv.valid.linux_valid << 16) | + 83f430cc: 00a14603 lbu a2,10(sp) + *ptr = ((cmdq->ip_id << 0) | (cmdq->cmd_id << 8) | (cmdq->block << 15) | + 83f430d0: 00814503 lbu a0,8(sp) + 83f430d4: 0086d793 srli a5,a3,0x8 + 83f430d8: 07f7f793 andi a5,a5,127 + (cmdq->resv.valid.linux_valid << 16) | + 83f430dc: 0106161b slliw a2,a2,0x10 + *ptr = ((cmdq->ip_id << 0) | (cmdq->cmd_id << 8) | (cmdq->block << 15) | + 83f430e0: 0087979b slliw a5,a5,0x8 + 83f430e4: 82bd srli a3,a3,0xf + 83f430e6: 8fd1 or a5,a5,a2 + 83f430e8: 8a85 andi a3,a3,1 + 83f430ea: 8fc9 or a5,a5,a0 + 83f430ec: 00f6969b slliw a3,a3,0xf + 83f430f0: 8fd5 or a5,a5,a3 + (cmdq->resv.valid.linux_valid << 16) | + 83f430f2: 010006b7 lui a3,0x1000 + 83f430f6: 8fd5 or a5,a5,a3 + *ptr = ((cmdq->ip_id << 0) | (cmdq->cmd_id << 8) | (cmdq->block << 15) | + 83f430f8: 00fd2023 sw a5,0(s10) + rtos_cmdqu_t->param_ptr = cmdq->param_ptr; + 83f430fc: 46b2 lw a3,12(sp) + mbox_reg->cpu_mbox_set[send_to_cpu].cpu_mbox_int_clr.mbox_int_clr = (1 << valid); + 83f430fe: 4785 li a5,1 + 83f43100: 00e7973b sllw a4,a5,a4 + rtos_cmdqu_t->param_ptr = cmdq->param_ptr; + 83f43104: 00dd2223 sw a3,4(s10) + mbox_reg->cpu_mbox_set[send_to_cpu].cpu_mbox_int_clr.mbox_int_clr = (1 << valid); + 83f43108: 000b3683 ld a3,0(s6) + 83f4310c: 0ff77613 andi a2,a4,255 + 83f43110: 002a1793 slli a5,s4,0x2 + 83f43114: 01568533 add a0,a3,s5 + 83f43118: 00c50023 sb a2,0(a0) + mbox_reg->cpu_mbox_en[send_to_cpu].mbox_info |= (1 << valid); + 83f4311c: 97b6 add a5,a5,a3 + 83f4311e: 0007c683 lbu a3,0(a5) + drv_spin_unlock_irqrestore(&mailbox_lock, flags); + 83f43122: 00010517 auipc a0,0x10 + 83f43126: 09650513 addi a0,a0,150 # 83f531b8 + mbox_reg->cpu_mbox_en[send_to_cpu].mbox_info |= (1 << valid); + 83f4312a: 8f55 or a4,a4,a3 + 83f4312c: 0ff77713 andi a4,a4,255 + 83f43130: 00e78023 sb a4,0(a5) + mbox_reg->mbox_set.mbox_set = (1 << valid); + 83f43134: 000b3783 ld a5,0(s6) + 83f43138: 06c78023 sb a2,96(a5) + drv_spin_unlock_irqrestore(&mailbox_lock, flags); + 83f4313c: 34d090ef jal ra,83f4cc88 <_hw_raw_spin_unlock_irqrestore> + if (valid >= MAILBOX_MAX_NUM) { + 83f43140: b51d j 83f42f66 + rtos_cmdq.ip_id = IP_VCODEC; + 83f43142: 00815703 lhu a4,8(sp) + 83f43146: 76e1 lui a3,0xffff8 + xQueueSend(gTaskCtx[E_QUEUE_VCODEC].queHandle, &rtos_cmdq, 0U); + 83f43148: 08893503 ld a0,136(s2) + rtos_cmdq.ip_id = IP_VCODEC; + 83f4314c: 8f75 and a4,a4,a3 + stop_ip |= STOP_CMD_DONE_VI; + 83f4314e: 0027e793 ori a5,a5,2 + rtos_cmdq.ip_id = IP_VCODEC; + 83f43152: 01976733 or a4,a4,s9 + xQueueSend(gTaskCtx[E_QUEUE_VCODEC].queHandle, &rtos_cmdq, 0U); + 83f43156: 4681 li a3,0 + 83f43158: 4601 li a2,0 + 83f4315a: 002c addi a1,sp,8 + stop_ip |= STOP_CMD_DONE_VI; + 83f4315c: 00f82023 sw a5,0(a6) + rtos_cmdq.ip_id = IP_VCODEC; + 83f43160: 00e11423 sh a4,8(sp) + xQueueSend(gTaskCtx[E_QUEUE_VCODEC].queHandle, &rtos_cmdq, 0U); + 83f43164: 0e30b0ef jal ra,83f4ea46 + break; + 83f43168: bbfd j 83f42f66 + +0000000083f4316a : + +void prvQueueISR(void) +{ + 83f4316a: 711d addi sp,sp,-96 + 83f4316c: e862 sd s8,16(sp) + unsigned char valid_val; + int i; + cmdqu_t *cmdq; + BaseType_t YieldRequired = pdFALSE; + + set_val = mbox_reg->cpu_mbox_set[RECEIVE_CPU].cpu_mbox_int_int.mbox_int; + 83f4316e: 0001dc17 auipc s8,0x1d + 83f43172: a4ac0c13 addi s8,s8,-1462 # 83f5fbb8 + 83f43176: 000c3783 ld a5,0(s8) +{ + 83f4317a: ec86 sd ra,88(sp) + 83f4317c: e8a2 sd s0,80(sp) + 83f4317e: e4a6 sd s1,72(sp) + 83f43180: e0ca sd s2,64(sp) + 83f43182: fc4e sd s3,56(sp) + 83f43184: f852 sd s4,48(sp) + 83f43186: f456 sd s5,40(sp) + 83f43188: f05a sd s6,32(sp) + 83f4318a: ec5e sd s7,24(sp) + set_val = mbox_reg->cpu_mbox_set[RECEIVE_CPU].cpu_mbox_int_int.mbox_int; + 83f4318c: 0387c403 lbu s0,56(a5) + BaseType_t YieldRequired = pdFALSE; + 83f43190: e002 sd zero,0(sp) + set_val = mbox_reg->cpu_mbox_set[RECEIVE_CPU].cpu_mbox_int_int.mbox_int; + 83f43192: 0ff47413 andi s0,s0,255 + /* Now, we do not implement info back feature */ + // done_val = mbox_done_reg->cpu_mbox_done[RECEIVE_CPU].cpu_mbox_int_int.mbox_int; + + if (set_val) { + 83f43196: c455 beqz s0,83f43242 + for(i = 0; i < MAILBOX_MAX_NUM; i++) { + valid_val = set_val & (1 << i); + 83f43198: 0184141b slliw s0,s0,0x18 + 83f4319c: 4184541b sraiw s0,s0,0x18 + 83f431a0: 4b81 li s7,0 + 83f431a2: 4485 li s1,1 + + if (valid_val) { + cmdqu_t rtos_cmdq; + cmdq = (cmdqu_t *)(mailbox_context) + i; + 83f431a4: 0001d997 auipc s3,0x1d + 83f431a8: a0498993 addi s3,s3,-1532 # 83f5fba8 + *((unsigned long *) &rtos_cmdq) = *((unsigned long *)cmdq); + /* need to clear mailbox interrupt before clear mailbox buffer */ + *((unsigned long*) cmdq) = 0; + + /* mailbox buffer context is send from linux*/ + if (rtos_cmdq.resv.valid.linux_valid == 1) { + 83f431ac: 4905 li s2,1 + printf("unknown ip_id =%d cmd_id=%d\n", rtos_cmdq.ip_id, rtos_cmdq.cmd_id); + break; + } + portYIELD_FROM_ISR(YieldRequired); + } else + printf("rtos cmdq is not valid %d, ip=%d , cmd=%d\n", + 83f431ae: 0000ea97 auipc s5,0xe + 83f431b2: d42a8a93 addi s5,s5,-702 # 83f50ef0 <__func__.4+0x120> + 83f431b6: 0000ea17 auipc s4,0xe + 83f431ba: d66a0a13 addi s4,s4,-666 # 83f50f1c <__func__.4+0x14c> + xQueueSendFromISR(gTaskCtx[E_QUEUE_CAMERA].queHandle, &rtos_cmdq, &YieldRequired); + 83f431be: 00010b17 auipc s6,0x10 + 83f431c2: d0ab0b13 addi s6,s6,-758 # 83f52ec8 + valid_val = set_val & (1 << i); + 83f431c6: 017497bb sllw a5,s1,s7 + 83f431ca: 8fe1 and a5,a5,s0 + 83f431cc: 0ff7f693 andi a3,a5,255 + 83f431d0: 0187979b slliw a5,a5,0x18 + 83f431d4: 4187d79b sraiw a5,a5,0x18 + if (valid_val) { + 83f431d8: c2ad beqz a3,83f4323a + mbox_reg->cpu_mbox_set[RECEIVE_CPU].cpu_mbox_int_clr.mbox_int_clr = valid_val; + 83f431da: 000c3603 ld a2,0(s8) + cmdq = (cmdqu_t *)(mailbox_context) + i; + 83f431de: 0009b703 ld a4,0(s3) + mbox_reg->cpu_mbox_en[RECEIVE_CPU].mbox_info &= ~valid_val; + 83f431e2: fff7c793 not a5,a5 + mbox_reg->cpu_mbox_set[RECEIVE_CPU].cpu_mbox_int_clr.mbox_int_clr = valid_val; + 83f431e6: 02d60823 sb a3,48(a2) + mbox_reg->cpu_mbox_en[RECEIVE_CPU].mbox_info &= ~valid_val; + 83f431ea: 00864683 lbu a3,8(a2) + cmdq = (cmdqu_t *)(mailbox_context) + i; + 83f431ee: 003b9593 slli a1,s7,0x3 + 83f431f2: 972e add a4,a4,a1 + mbox_reg->cpu_mbox_en[RECEIVE_CPU].mbox_info &= ~valid_val; + 83f431f4: 0ff6f693 andi a3,a3,255 + 83f431f8: 8ff5 and a5,a5,a3 + 83f431fa: 00f60423 sb a5,8(a2) + *((unsigned long *) &rtos_cmdq) = *((unsigned long *)cmdq); + 83f431fe: 631c ld a5,0(a4) + 83f43200: e43e sd a5,8(sp) + *((unsigned long*) cmdq) = 0; + 83f43202: 00073023 sd zero,0(a4) # ffffffffffff8000 <_end+0xffffffff7bff82c0> + if (rtos_cmdq.resv.valid.linux_valid == 1) { + 83f43206: 00a14783 lbu a5,10(sp) + 83f4320a: 01279d63 bne a5,s2,83f43224 + switch (rtos_cmdq.ip_id) { + 83f4320e: 00814583 lbu a1,8(sp) + 83f43212: 479d li a5,7 + 83f43214: 0cb7e363 bltu a5,a1,83f432da + 83f43218: 00259793 slli a5,a1,0x2 + 83f4321c: 97d2 add a5,a5,s4 + 83f4321e: 439c lw a5,0(a5) + 83f43220: 97d2 add a5,a5,s4 + 83f43222: 8782 jr a5 + rtos_cmdq.resv.valid.rtos_valid, rtos_cmdq.ip_id, rtos_cmdq.cmd_id); + 83f43224: 66a2 ld a3,8(sp) + printf("rtos cmdq is not valid %d, ip=%d , cmd=%d\n", + 83f43226: 00814603 lbu a2,8(sp) + 83f4322a: 00b14583 lbu a1,11(sp) + rtos_cmdq.resv.valid.rtos_valid, rtos_cmdq.ip_id, rtos_cmdq.cmd_id); + 83f4322e: 82a1 srli a3,a3,0x8 + printf("rtos cmdq is not valid %d, ip=%d , cmd=%d\n", + 83f43230: 07f6f693 andi a3,a3,127 + 83f43234: 8556 mv a0,s5 + 83f43236: 55f080ef jal ra,83f4bf94 + for(i = 0; i < MAILBOX_MAX_NUM; i++) { + 83f4323a: 0b85 addi s7,s7,1 + 83f4323c: 47a1 li a5,8 + 83f4323e: f8fb94e3 bne s7,a5,83f431c6 + } + } + } +} + 83f43242: 60e6 ld ra,88(sp) + 83f43244: 6446 ld s0,80(sp) + 83f43246: 64a6 ld s1,72(sp) + 83f43248: 6906 ld s2,64(sp) + 83f4324a: 79e2 ld s3,56(sp) + 83f4324c: 7a42 ld s4,48(sp) + 83f4324e: 7aa2 ld s5,40(sp) + 83f43250: 7b02 ld s6,32(sp) + 83f43252: 6be2 ld s7,24(sp) + 83f43254: 6c42 ld s8,16(sp) + 83f43256: 6125 addi sp,sp,96 + 83f43258: 8082 ret + xQueueSendFromISR(gTaskCtx[E_QUEUE_CAMERA].queHandle, &rtos_cmdq, &YieldRequired); + 83f4325a: 118b3503 ld a0,280(s6) + 83f4325e: 4681 li a3,0 + 83f43260: 860a mv a2,sp + 83f43262: 002c addi a1,sp,8 + 83f43264: 1030b0ef jal ra,83f4eb66 + portYIELD_FROM_ISR(YieldRequired); + 83f43268: 6782 ld a5,0(sp) + 83f4326a: dbe1 beqz a5,83f4323a + 83f4326c: 2100c0ef jal ra,83f4f47c + for(i = 0; i < MAILBOX_MAX_NUM; i++) { + 83f43270: 0b85 addi s7,s7,1 + 83f43272: 47a1 li a5,8 + 83f43274: f4fb99e3 bne s7,a5,83f431c6 + 83f43278: b7e9 j 83f43242 + xQueueSendFromISR(gTaskCtx[E_QUEUE_ISP].queHandle, &rtos_cmdq, &YieldRequired); + 83f4327a: 040b3503 ld a0,64(s6) + 83f4327e: 4681 li a3,0 + 83f43280: 860a mv a2,sp + 83f43282: 002c addi a1,sp,8 + 83f43284: 0e30b0ef jal ra,83f4eb66 + break; + 83f43288: b7c5 j 83f43268 + xQueueSendFromISR(gTaskCtx[E_QUEUE_VCODEC].queHandle, &rtos_cmdq, &YieldRequired); + 83f4328a: 088b3503 ld a0,136(s6) + 83f4328e: 4681 li a3,0 + 83f43290: 860a mv a2,sp + 83f43292: 002c addi a1,sp,8 + 83f43294: 0d30b0ef jal ra,83f4eb66 + break; + 83f43298: bfc1 j 83f43268 + xQueueSendFromISR(gTaskCtx[E_QUEUE_VI].queHandle, &rtos_cmdq, &YieldRequired); + 83f4329a: 0d0b3503 ld a0,208(s6) + 83f4329e: 4681 li a3,0 + 83f432a0: 860a mv a2,sp + 83f432a2: 002c addi a1,sp,8 + 83f432a4: 0c30b0ef jal ra,83f4eb66 + break; + 83f432a8: b7c1 j 83f43268 + xQueueSendFromISR(gTaskCtx[E_QUEUE_RGN].queHandle, &rtos_cmdq, &YieldRequired); + 83f432aa: 160b3503 ld a0,352(s6) + 83f432ae: 4681 li a3,0 + 83f432b0: 860a mv a2,sp + 83f432b2: 002c addi a1,sp,8 + 83f432b4: 0b30b0ef jal ra,83f4eb66 + break; + 83f432b8: bf45 j 83f43268 + xQueueSendFromISR(gTaskCtx[E_QUEUE_AUDIO].queHandle, &rtos_cmdq, &YieldRequired); + 83f432ba: 1f0b3503 ld a0,496(s6) + 83f432be: 4681 li a3,0 + 83f432c0: 860a mv a2,sp + 83f432c2: 002c addi a1,sp,8 + 83f432c4: 0a30b0ef jal ra,83f4eb66 + break; + 83f432c8: b745 j 83f43268 + xQueueSendFromISR(gTaskCtx[E_QUEUE_CMDQU].queHandle, &rtos_cmdq, &YieldRequired); + 83f432ca: 1a8b3503 ld a0,424(s6) + 83f432ce: 4681 li a3,0 + 83f432d0: 860a mv a2,sp + 83f432d2: 002c addi a1,sp,8 + 83f432d4: 0930b0ef jal ra,83f4eb66 + break; + 83f432d8: bf41 j 83f43268 + printf("unknown ip_id =%d cmd_id=%d\n", rtos_cmdq.ip_id, rtos_cmdq.cmd_id); + 83f432da: 6622 ld a2,8(sp) + 83f432dc: 0000e517 auipc a0,0xe + 83f432e0: bf450513 addi a0,a0,-1036 # 83f50ed0 <__func__.4+0x100> + 83f432e4: 8221 srli a2,a2,0x8 + 83f432e6: 07f67613 andi a2,a2,127 + 83f432ea: 4ab080ef jal ra,83f4bf94 + break; + 83f432ee: bfad j 83f43268 + +0000000083f432f0 : + if (handle_idx >= E_QUEUE_MAX) + 83f432f0: 4799 li a5,6 + 83f432f2: 00a7ef63 bltu a5,a0,83f43310 + return gTaskCtx[handle_idx].queHandle; + 83f432f6: 1502 slli a0,a0,0x20 + 83f432f8: 9101 srli a0,a0,0x20 + 83f432fa: 00351793 slli a5,a0,0x3 + 83f432fe: 953e add a0,a0,a5 + 83f43300: 050e slli a0,a0,0x3 + 83f43302: 00010797 auipc a5,0x10 + 83f43306: bc678793 addi a5,a5,-1082 # 83f52ec8 + 83f4330a: 953e add a0,a0,a5 + 83f4330c: 6128 ld a0,64(a0) + 83f4330e: 8082 ret + return NULL; + 83f43310: 4501 li a0,0 +} + 83f43312: 8082 ret + +0000000083f43314 : +{ + 83f43314: 1101 addi sp,sp,-32 + 83f43316: e822 sd s0,16(sp) + 83f43318: e426 sd s1,8(sp) + 83f4331a: ec06 sd ra,24(sp) + 83f4331c: 00010417 auipc s0,0x10 + 83f43320: bac40413 addi s0,s0,-1108 # 83f52ec8 + 83f43324: 00010497 auipc s1,0x10 + 83f43328: d9c48493 addi s1,s1,-612 # 83f530c0 + TASK_INIT(i); + 83f4332c: 03844503 lbu a0,56(s0) + 83f43330: 4601 li a2,0 + 83f43332: 45a1 li a1,8 + 83f43334: 6a60b0ef jal ra,83f4e9da + 83f43338: e028 sd a0,64(s0) + 83f4333a: c919 beqz a0,83f43350 + 83f4333c: 7808 ld a0,48(s0) + 83f4333e: 85a2 mv a1,s0 + 83f43340: 4781 li a5,0 + 83f43342: 4681 li a3,0 + 83f43344: c511 beqz a0,83f43350 + 83f43346: 7418 ld a4,40(s0) + 83f43348: 02045603 lhu a2,32(s0) + 83f4334c: 56e0c0ef jal ra,83f4f8ba + for (; i < ARRAY_SIZE(gTaskCtx); i++) { + 83f43350: 04840413 addi s0,s0,72 + 83f43354: fc941ce3 bne s0,s1,83f4332c +} + 83f43358: 60e2 ld ra,24(sp) + 83f4335a: 6442 ld s0,16(sp) + 83f4335c: 64a2 ld s1,8(sp) + 83f4335e: 6105 addi sp,sp,32 + 83f43360: 8082 ret + +0000000083f43362 : +{ + 83f43362: 1141 addi sp,sp,-16 + printf("create cvi task\n"); + 83f43364: 0000e517 auipc a0,0xe + 83f43368: bdc50513 addi a0,a0,-1060 # 83f50f40 <__func__.4+0x170> +{ + 83f4336c: e406 sd ra,8(sp) + printf("create cvi task\n"); + 83f4336e: 427080ef jal ra,83f4bf94 + request_irq(MBOX_INT_C906_2ND, prvQueueISR, 0, "mailbox", (void *)0); + 83f43372: 4701 li a4,0 + 83f43374: 0000e697 auipc a3,0xe + 83f43378: be468693 addi a3,a3,-1052 # 83f50f58 <__func__.4+0x188> + 83f4337c: 4601 li a2,0 + 83f4337e: 00000597 auipc a1,0x0 + 83f43382: dec58593 addi a1,a1,-532 # 83f4316a + 83f43386: 03d00513 li a0,61 + 83f4338a: 12a090ef jal ra,83f4c4b4 + main_create_tasks(); + 83f4338e: f87ff0ef jal ra,83f43314 + vTaskStartScheduler(); + 83f43392: 5a40c0ef jal ra,83f4f936 + for (;;) + 83f43396: a001 j 83f43396 + +0000000083f43398 : +#else +#define rgn_printf(...) +#endif + +void prvRGNRunTask(void *pvParameters) +{ + 83f43398: 7131 addi sp,sp,-192 + OSDC_Canvas_Attr_S canvas; + OSDC_DRAW_OBJ_S *obj_vec = NULL; + RGN_LINE_ATTR_S *line_attr = NULL; + + rgn_printf("%s run\n", __func__); + xQueueRGN = main_GetMODHandle(E_QUEUE_RGN); + 83f4339a: 4511 li a0,4 +{ + 83f4339c: fd06 sd ra,184(sp) + 83f4339e: fcde sd s7,120(sp) + 83f433a0: f8e2 sd s8,112(sp) + 83f433a2: f4e6 sd s9,104(sp) + 83f433a4: f922 sd s0,176(sp) + 83f433a6: f526 sd s1,168(sp) + 83f433a8: f14a sd s2,160(sp) + 83f433aa: ed4e sd s3,152(sp) + 83f433ac: e952 sd s4,144(sp) + 83f433ae: e556 sd s5,136(sp) + 83f433b0: e15a sd s6,128(sp) + 83f433b2: f0ea sd s10,96(sp) + 83f433b4: ecee sd s11,88(sp) + xQueueRGN = main_GetMODHandle(E_QUEUE_RGN); + 83f433b6: f3bff0ef jal ra,83f432f0 + 83f433ba: 87aa mv a5,a0 + 83f433bc: 0001dc97 auipc s9,0x1d + 83f433c0: 80cc8c93 addi s9,s9,-2036 # 83f5fbc8 + xQueueRGNCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + 83f433c4: 4515 li a0,5 + xQueueRGN = main_GetMODHandle(E_QUEUE_RGN); + 83f433c6: 00fcb023 sd a5,0(s9) + xQueueRGNCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + 83f433ca: f27ff0ef jal ra,83f432f0 + 83f433ce: 0001d797 auipc a5,0x1d + 83f433d2: 80278793 addi a5,a5,-2046 # 83f5fbd0 + } + vPortFree(line_attr); + vPortFree(obj_vec); + +WRONG_CMD_IP_ID: + rtos_cmdq.ip_id = -1; + 83f433d6: 6c21 lui s8,0x8 + xQueueRGNCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + 83f433d8: e388 sd a0,0(a5) + rtos_cmdq.ip_id = -1; + 83f433da: fffc0793 addi a5,s8,-1 # 7fff <_EL1_STACK_SIZE+0x77ff> + if (rtos_cmdq.ip_id != IP_RGN) { + 83f433de: 4b91 li s7,4 + rtos_cmdq.ip_id = -1; + 83f433e0: ec3e sd a5,24(sp) + 83f433e2: a025 j 83f4340a + xQueueSend(xQueueRGNCmdqu, &rtos_cmdq, 0U); + 83f433e4: 0001c797 auipc a5,0x1c + 83f433e8: 7ec78793 addi a5,a5,2028 # 83f5fbd0 + 83f433ec: 6388 ld a0,0(a5) + 83f433ee: 4681 li a3,0 + 83f433f0: 4601 li a2,0 + 83f433f2: 182c addi a1,sp,56 + 83f433f4: 6520b0ef jal ra,83f4ea46 + rtos_cmdq.ip_id = -1; + 83f433f8: 03815783 lhu a5,56(sp) + 83f433fc: 7761 lui a4,0xffff8 + rtos_cmdq.cmd_id = -1; + rtos_cmdq.param_ptr = 0; + 83f433fe: de02 sw zero,60(sp) + rtos_cmdq.ip_id = -1; + 83f43400: 8ff9 and a5,a5,a4 + 83f43402: 6762 ld a4,24(sp) + 83f43404: 8fd9 or a5,a5,a4 + 83f43406: 02f11c23 sh a5,56(sp) + xQueueReceive(xQueueRGN, &rtos_cmdq, portMAX_DELAY); + 83f4340a: 000cb503 ld a0,0(s9) + 83f4340e: 567d li a2,-1 + 83f43410: 182c addi a1,sp,56 + 83f43412: 0350b0ef jal ra,83f4ec46 + if (rtos_cmdq.ip_id != IP_RGN) { + 83f43416: 03814783 lbu a5,56(sp) + 83f4341a: fd7795e3 bne a5,s7,83f433e4 + canvas_cmpr_attr = (RGN_CANVAS_CMPR_ATTR_S *)rtos_cmdq.param_ptr; + 83f4341e: 03c16a83 lwu s5,60(sp) + canvas.width = canvas_cmpr_attr->u32Width; + 83f43422: 000aa703 lw a4,0(s5) + obj_num = canvas_cmpr_attr->u32ObjNum; + 83f43426: 014aa683 lw a3,20(s5) + canvas.height = canvas_cmpr_attr->u32Height; + 83f4342a: 004aa783 lw a5,4(s5) + canvas.width = canvas_cmpr_attr->u32Width; + 83f4342e: c0ba sw a4,64(sp) + obj_num = canvas_cmpr_attr->u32ObjNum; + 83f43430: f036 sd a3,32(sp) + canvas.height = canvas_cmpr_attr->u32Height; + 83f43432: c2be sw a5,68(sp) + obj_num = canvas_cmpr_attr->u32ObjNum; + 83f43434: 0ff6fb13 andi s6,a3,255 + obj_vec = (OSDC_DRAW_OBJ_S *)pvPortMalloc((obj_num ? obj_num : 1) * sizeof(OSDC_DRAW_OBJ_S)); + 83f43438: 020b0563 beqz s6,83f43462 + 83f4343c: 006b1513 slli a0,s6,0x6 + 83f43440: 1440b0ef jal ra,83f4e584 + 83f43444: 8a2a mv s4,a0 + if (obj_vec == NULL) { + 83f43446: d94d beqz a0,83f433f8 + line_attr = (RGN_LINE_ATTR_S *)pvPortMalloc((obj_num ? obj_num : 1) * sizeof(RGN_LINE_ATTR_S)); + 83f43448: 001b1513 slli a0,s6,0x1 + 83f4344c: 955a add a0,a0,s6 + 83f4344e: 050e slli a0,a0,0x3 + 83f43450: 1340b0ef jal ra,83f4e584 + 83f43454: 842a mv s0,a0 + if (line_attr == NULL) { + 83f43456: 22051b63 bnez a0,83f4368c + vPortFree(obj_vec); + 83f4345a: 8552 mv a0,s4 + 83f4345c: 28e0b0ef jal ra,83f4e6ea + 83f43460: bf61 j 83f433f8 + obj_vec = (OSDC_DRAW_OBJ_S *)pvPortMalloc((obj_num ? obj_num : 1) * sizeof(OSDC_DRAW_OBJ_S)); + 83f43462: 04000513 li a0,64 + 83f43466: 11e0b0ef jal ra,83f4e584 + 83f4346a: 8a2a mv s4,a0 + if (obj_vec == NULL) { + 83f4346c: d551 beqz a0,83f433f8 + line_attr = (RGN_LINE_ATTR_S *)pvPortMalloc((obj_num ? obj_num : 1) * sizeof(RGN_LINE_ATTR_S)); + 83f4346e: 4561 li a0,24 + 83f43470: 1140b0ef jal ra,83f4e584 + 83f43474: 842a mv s0,a0 + if (line_attr == NULL) { + 83f43476: d175 beqz a0,83f4345a + obj_attr = (RGN_CMPR_OBJ_ATTR_S *)((CVI_U8 *)rtos_cmdq.param_ptr + sizeof(RGN_CANVAS_CMPR_ATTR_S)); + 83f43478: 03c16783 lwu a5,60(sp) + 83f4347c: 4481 li s1,0 + 83f4347e: 07e1 addi a5,a5,24 + 83f43480: f43e sd a5,40(sp) + for (i = 0; i < line_num; ++i) { + 83f43482: 4995 li s3,5 + if (i < line_num - 1) { + 83f43484: fff4891b addiw s2,s1,-1 + for (i = 0; i < line_num; ++i) { + 83f43488: 01840d13 addi s10,s0,24 + 83f4348c: 4d81 li s11,0 + 83f4348e: ec85 bnez s1,83f434c6 + 83f43490: a059 j 83f43516 + = line_attr[i].stPointStart.s32Y; + 83f43492: fecd2503 lw a0,-20(s10) + if (i < line_num - 1) { + 83f43496: 000d859b sext.w a1,s11 + if (delta_x < line_attr[i].u32Thick) { + 83f4349a: 000c071b sext.w a4,s8 + = line_attr[i].stPointStart.s32Y; + 83f4349e: fead2a23 sw a0,-12(s10) + if (i < line_num - 1) { + 83f434a2: 1325d163 bge a1,s2,83f435c4 + line_attr[i + 1].stPointStart.s32Y = line_attr[i].stPointEnd.s32Y + 83f434a6: 00ad2223 sw a0,4(s10) + if (delta_x < line_attr[i].u32Thick) { + 83f434aa: 00c77863 bgeu a4,a2,83f434ba + = line_attr[i].stPointStart.s32X; + 83f434ae: fe8d2703 lw a4,-24(s10) + 83f434b2: feed2823 sw a4,-16(s10) + line_attr[i + 1].stPointStart.s32X = line_attr[i].stPointEnd.s32X + 83f434b6: 00ed2023 sw a4,0(s10) + for (i = 0; i < line_num; ++i) { + 83f434ba: 0d85 addi s11,s11,1 + 83f434bc: 000d871b sext.w a4,s11 + 83f434c0: 0d61 addi s10,s10,24 + 83f434c2: 04975a63 bge a4,s1,83f43516 + delta_x = abs(line_attr[i].stPointStart.s32X - line_attr[i].stPointEnd.s32X); + 83f434c6: ff0d2703 lw a4,-16(s10) + 83f434ca: fe8d2503 lw a0,-24(s10) + 83f434ce: 9d19 subw a0,a0,a4 + 83f434d0: 837ff0ef jal ra,83f42d06 + delta_y = abs(line_attr[i].stPointStart.s32Y - line_attr[i].stPointEnd.s32Y); + 83f434d4: ff4d2603 lw a2,-12(s10) + 83f434d8: fecd2583 lw a1,-20(s10) + delta_x = abs(line_attr[i].stPointStart.s32X - line_attr[i].stPointEnd.s32X); + 83f434dc: 8c2a mv s8,a0 + delta_y = abs(line_attr[i].stPointStart.s32Y - line_attr[i].stPointEnd.s32Y); + 83f434de: 40c5853b subw a0,a1,a2 + 83f434e2: 825ff0ef jal ra,83f42d06 + if (delta_y < line_attr[i].u32Thick) { + 83f434e6: ff8d2603 lw a2,-8(s10) + 83f434ea: 2501 sext.w a0,a0 + 83f434ec: fac563e3 bltu a0,a2,83f43492 + if (delta_x < line_attr[i].u32Thick) { + 83f434f0: 000c071b sext.w a4,s8 + 83f434f4: fcc773e3 bgeu a4,a2,83f434ba + if (i < line_num - 1) { + 83f434f8: 000d871b sext.w a4,s11 + 83f434fc: fb2749e3 blt a4,s2,83f434ae + = line_attr[i].stPointStart.s32X; + 83f43500: fe8d2703 lw a4,-24(s10) + for (i = 0; i < line_num; ++i) { + 83f43504: 0d85 addi s11,s11,1 + 83f43506: 0d61 addi s10,s10,24 + = line_attr[i].stPointStart.s32X; + 83f43508: fced2c23 sw a4,-40(s10) + line_attr[0].stPointStart.s32X = line_attr[i].stPointEnd.s32X + 83f4350c: c018 sw a4,0(s0) + for (i = 0; i < line_num; ++i) { + 83f4350e: 000d871b sext.w a4,s11 + 83f43512: fa974ae3 blt a4,s1,83f434c6 + delta_x = abs(line_attr[0].stPointStart.s32X - line_attr[0].stPointEnd.s32X); + 83f43516: 441c lw a5,8(s0) + 83f43518: 4008 lw a0,0(s0) + 83f4351a: 9d1d subw a0,a0,a5 + 83f4351c: feaff0ef jal ra,83f42d06 + delta_y = abs(line_attr[0].stPointStart.s32Y - line_attr[0].stPointEnd.s32Y); + 83f43520: 4054 lw a3,4(s0) + 83f43522: 4458 lw a4,12(s0) + delta_x = abs(line_attr[0].stPointStart.s32X - line_attr[0].stPointEnd.s32X); + 83f43524: 8d2a mv s10,a0 + delta_y = abs(line_attr[0].stPointStart.s32Y - line_attr[0].stPointEnd.s32Y); + 83f43526: 40e6853b subw a0,a3,a4 + 83f4352a: fdcff0ef jal ra,83f42d06 + if ((delta_x > line_attr[0].u32Thick || delta_x == 0) && + 83f4352e: 4818 lw a4,16(s0) + 83f43530: 000d069b sext.w a3,s10 + 83f43534: 00d76463 bltu a4,a3,83f4353c + 83f43538: 000d1763 bnez s10,83f43546 + 83f4353c: 0005079b sext.w a5,a0 + 83f43540: 00f76663 bltu a4,a5,83f4354c + (delta_y > line_attr[0].u32Thick || delta_y == 0)) + 83f43544: c501 beqz a0,83f4354c + while (j++ < 5) { + 83f43546: 39fd addiw s3,s3,-1 + 83f43548: f40990e3 bnez s3,83f43488 + if (obj_num) { + 83f4354c: 0a0b1e63 bnez s6,83f43608 + switch (canvas_cmpr_attr->enPixelFormat) { + 83f43550: 00caa783 lw a5,12(s5) + 83f43554: 4719 li a4,6 + 83f43556: 1ae78863 beq a5,a4,83f43706 + 83f4355a: 03000713 li a4,48 + 83f4355e: 1ae78163 beq a5,a4,83f43700 + 83f43562: 4715 li a4,5 + 83f43564: 18e78c63 beq a5,a4,83f436fc + canvas.format = OSD_ARGB1555; + 83f43568: 4795 li a5,5 + 83f4356a: c4be sw a5,72(sp) + switch (rtos_cmdq.cmd_id) { + 83f4356c: 77e2 ld a5,56(sp) + 83f4356e: 83a1 srli a5,a5,0x8 + 83f43570: 07f7f793 andi a5,a5,127 + 83f43574: cfb1 beqz a5,83f435d0 + 83f43576: 4705 li a4,1 + 83f43578: 04e79263 bne a5,a4,83f435bc + bs_size = CVI_OSDC_EstCmprCanvasSize(&canvas, &obj_vec[0], obj_num); + 83f4357c: 02014603 lbu a2,32(sp) + pvAddr = (void *)rtos_cmdq.param_ptr; + 83f43580: 54f2 lw s1,60(sp) + bs_size = CVI_OSDC_EstCmprCanvasSize(&canvas, &obj_vec[0], obj_num); + 83f43582: 85d2 mv a1,s4 + 83f43584: 0088 addi a0,sp,64 + 83f43586: 76e090ef jal ra,83f4ccf4 + 83f4358a: 0005079b sext.w a5,a0 + flush_dcache_range((uintptr_t)pvAddr, ALIGN(sizeof(RGN_CANVAS_CMPR_ATTR_S), 64)); + 83f4358e: 02049513 slli a0,s1,0x20 + canvas_cmpr_attr->u32BsSize = bs_size; + 83f43592: 00faa823 sw a5,16(s5) + flush_dcache_range((uintptr_t)pvAddr, ALIGN(sizeof(RGN_CANVAS_CMPR_ATTR_S), 64)); + 83f43596: 04000593 li a1,64 + 83f4359a: 9101 srli a0,a0,0x20 + bs_size = CVI_OSDC_EstCmprCanvasSize(&canvas, &obj_vec[0], obj_num); + 83f4359c: da3e sw a5,52(sp) + flush_dcache_range((uintptr_t)pvAddr, ALIGN(sizeof(RGN_CANVAS_CMPR_ATTR_S), 64)); + 83f4359e: 1bb080ef jal ra,83f4bf58 + xQueueSend(xQueueRGNCmdqu, &rtos_cmdq, 0U); + 83f435a2: 0001c797 auipc a5,0x1c + 83f435a6: 62e78793 addi a5,a5,1582 # 83f5fbd0 + 83f435aa: 6388 ld a0,0(a5) + 83f435ac: 4681 li a3,0 + 83f435ae: 4601 li a2,0 + 83f435b0: 182c addi a1,sp,56 + rtos_cmdq.ip_id = IP_RGN; + 83f435b2: 03710c23 sb s7,56(sp) + rtos_cmdq.param_ptr = 0; + 83f435b6: de02 sw zero,60(sp) + xQueueSend(xQueueRGNCmdqu, &rtos_cmdq, 0U); + 83f435b8: 48e0b0ef jal ra,83f4ea46 + vPortFree(line_attr); + 83f435bc: 8522 mv a0,s0 + 83f435be: 12c0b0ef jal ra,83f4e6ea + 83f435c2: bd61 j 83f4345a + line_attr[0].stPointStart.s32Y = line_attr[i].stPointEnd.s32Y + 83f435c4: c048 sw a0,4(s0) + if (delta_x < line_attr[i].u32Thick) { + 83f435c6: ff8d2603 lw a2,-8(s10) + 83f435ca: f2c76be3 bltu a4,a2,83f43500 + 83f435ce: b5f5 j 83f434ba + pvAddr = (void *)rtos_cmdq.param_ptr; + 83f435d0: 03c16483 lwu s1,60(sp) + status = CVI_OSDC_DrawCmprCanvas(&canvas, &obj_vec[0], obj_num ? obj_num : 0, pvAddr, + 83f435d4: 010aa703 lw a4,16(s5) + 83f435d8: 02014603 lbu a2,32(sp) + 83f435dc: 185c addi a5,sp,52 + 83f435de: 86a6 mv a3,s1 + 83f435e0: 85d2 mv a1,s4 + 83f435e2: 0088 addi a0,sp,64 + 83f435e4: 714090ef jal ra,83f4ccf8 + if (status != 1) { + 83f435e8: 4785 li a5,1 + 83f435ea: 14f50063 beq a0,a5,83f4372a + *(unsigned int *)pvAddr = 0xffffffff; + 83f435ee: 57fd li a5,-1 + 83f435f0: c09c sw a5,0(s1) + *((unsigned int *)pvAddr + 1) = bs_size; + 83f435f2: 57d2 lw a5,52(sp) + 83f435f4: c0dc sw a5,4(s1) + flush_dcache_range((uintptr_t)pvAddr, ALIGN(bs_size, 64)); + 83f435f6: 03f7879b addiw a5,a5,63 + 83f435fa: fc07f593 andi a1,a5,-64 + 83f435fe: 2581 sext.w a1,a1 + 83f43600: 8526 mv a0,s1 + 83f43602: 157080ef jal ra,83f4bf58 + 83f43606: bf71 j 83f435a2 + for (i = 0, j = 0; i < obj_num; ++i) { + 83f43608: 02014783 lbu a5,32(sp) + 83f4360c: d3b1 beqz a5,83f43550 + 83f4360e: 79a2 ld s3,40(sp) + 83f43610: 0796 slli a5,a5,0x5 + 83f43612: 8b52 mv s6,s4 + 83f43614: 00f984b3 add s1,s3,a5 + 83f43618: 4901 li s2,0 + 83f4361a: a811 j 83f4362e + } else if (obj_attr[i].enObjType == RGN_CMPR_BIT_MAP) { + 83f4361c: 4705 li a4,1 + 83f4361e: 0ee78663 beq a5,a4,83f4370a + for (i = 0, j = 0; i < obj_num; ++i) { + 83f43622: 02098993 addi s3,s3,32 + 83f43626: 040b0b13 addi s6,s6,64 + 83f4362a: f33483e3 beq s1,s3,83f43550 + if (obj_attr[i].enObjType == RGN_CMPR_LINE) { + 83f4362e: 0009a783 lw a5,0(s3) + 83f43632: 4709 li a4,2 + 83f43634: 02e78963 beq a5,a4,83f43666 + } else if (obj_attr[i].enObjType == RGN_CMPR_RECT) { + 83f43638: f3f5 bnez a5,83f4361c + CVI_OSDC_SetRectObjAttr( + 83f4363a: 01c9a883 lw a7,28(s3) + 83f4363e: 0149a583 lw a1,20(s3) + 83f43642: 0109a803 lw a6,16(s3) + 83f43646: 00c9a783 lw a5,12(s3) + 83f4364a: 0089a703 lw a4,8(s3) + 83f4364e: 0049a683 lw a3,4(s3) + 83f43652: 0189a603 lw a2,24(s3) + 83f43656: 011038b3 snez a7,a7 + 83f4365a: e02e sd a1,0(sp) + 83f4365c: 0088 addi a0,sp,64 + 83f4365e: 85da mv a1,s6 + 83f43660: 69c090ef jal ra,83f4ccfc + 83f43664: bf7d j 83f43622 + line_attr[j].u32Color, + 83f43666: 00191613 slli a2,s2,0x1 + 83f4366a: 964a add a2,a2,s2 + 83f4366c: 060e slli a2,a2,0x3 + 83f4366e: 9622 add a2,a2,s0 + CVI_OSDC_SetLineObjAttr( + 83f43670: 01062883 lw a7,16(a2) + 83f43674: 00c62803 lw a6,12(a2) + 83f43678: 461c lw a5,8(a2) + 83f4367a: 4258 lw a4,4(a2) + 83f4367c: 4214 lw a3,0(a2) + 83f4367e: 4a50 lw a2,20(a2) + 83f43680: 85da mv a1,s6 + 83f43682: 0088 addi a0,sp,64 + 83f43684: 684090ef jal ra,83f4cd08 + j++; + 83f43688: 2905 addiw s2,s2,1 + 83f4368a: bf61 j 83f43622 + obj_attr = (RGN_CMPR_OBJ_ATTR_S *)((CVI_U8 *)rtos_cmdq.param_ptr + sizeof(RGN_CANVAS_CMPR_ATTR_S)); + 83f4368c: 03c16603 lwu a2,60(sp) + 83f43690: 02014703 lbu a4,32(sp) + for (i = 0; i < obj_num; ++i) { + 83f43694: 4481 li s1,0 + obj_attr = (RGN_CMPR_OBJ_ATTR_S *)((CVI_U8 *)rtos_cmdq.param_ptr + sizeof(RGN_CANVAS_CMPR_ATTR_S)); + 83f43696: 01860793 addi a5,a2,24 + 83f4369a: f43e sd a5,40(sp) + for (i = 0; i < obj_num; ++i) { + 83f4369c: de0703e3 beqz a4,83f43482 + 83f436a0: fff7069b addiw a3,a4,-1 + 83f436a4: 02069713 slli a4,a3,0x20 + 83f436a8: 01b75693 srli a3,a4,0x1b + 83f436ac: 03860613 addi a2,a2,56 + 83f436b0: 96b2 add a3,a3,a2 + line_num = 0; + 83f436b2: 4481 li s1,0 + if (obj_attr[i].enObjType == RGN_CMPR_LINE) { + 83f436b4: 4398 lw a4,0(a5) + 83f436b6: 4609 li a2,2 + 83f436b8: 02c71c63 bne a4,a2,83f436f0 + line_attr[line_num] = obj_attr[i].stLine; + 83f436bc: 00149713 slli a4,s1,0x1 + 83f436c0: 0047a303 lw t1,4(a5) + 83f436c4: 0087a883 lw a7,8(a5) + 83f436c8: 00c7a803 lw a6,12(a5) + 83f436cc: 4b88 lw a0,16(a5) + 83f436ce: 4bcc lw a1,20(a5) + 83f436d0: 4f90 lw a2,24(a5) + 83f436d2: 9726 add a4,a4,s1 + 83f436d4: 070e slli a4,a4,0x3 + 83f436d6: 9722 add a4,a4,s0 + line_num++; + 83f436d8: 2485 addiw s1,s1,1 + line_attr[line_num] = obj_attr[i].stLine; + 83f436da: 00672023 sw t1,0(a4) # ffffffffffff8000 <_end+0xffffffff7bff82c0> + 83f436de: 01172223 sw a7,4(a4) + 83f436e2: 01072423 sw a6,8(a4) + 83f436e6: c748 sw a0,12(a4) + 83f436e8: cb0c sw a1,16(a4) + 83f436ea: cb50 sw a2,20(a4) + line_num++; + 83f436ec: 0ff4f493 andi s1,s1,255 + for (i = 0; i < obj_num; ++i) { + 83f436f0: 02078793 addi a5,a5,32 + 83f436f4: fcd790e3 bne a5,a3,83f436b4 + for (i = 0; i < line_num; ++i) { + 83f436f8: 2481 sext.w s1,s1 + 83f436fa: b361 j 83f43482 + canvas.format = OSD_ARGB4444; + 83f436fc: c4de sw s7,72(sp) + break; + 83f436fe: b5bd j 83f4356c + canvas.format = OSD_LUT8; + 83f43700: 47a1 li a5,8 + 83f43702: c4be sw a5,72(sp) + break; + 83f43704: b5a5 j 83f4356c + canvas.format = OSD_ARGB8888; + 83f43706: c482 sw zero,72(sp) + break; + 83f43708: b595 j 83f4356c + CVI_OSDC_SetBitmapObjAttr( + 83f4370a: 0109a803 lw a6,16(s3) + 83f4370e: 00c9a783 lw a5,12(s3) + 83f43712: 0089a703 lw a4,8(s3) + 83f43716: 0049a683 lw a3,4(s3) + 83f4371a: 0149e603 lwu a2,20(s3) + 83f4371e: 85da mv a1,s6 + 83f43720: 4881 li a7,0 + 83f43722: 0088 addi a0,sp,64 + 83f43724: 5e0090ef jal ra,83f4cd04 + 83f43728: bded j 83f43622 + *((unsigned int *)pvAddr + 1) = bs_size; + 83f4372a: 57d2 lw a5,52(sp) + 83f4372c: c0dc sw a5,4(s1) + 83f4372e: b5e1 j 83f435f6 + +0000000083f43730 : + } \ + } while (0) +#endif +// just to build & compiler venc sdk, do not need run this +__attribute__((optimize("-O0"))) void cvi_audio_init_test(void) +{ + 83f43730: 1141 addi sp,sp,-16 + 83f43732: e406 sd ra,8(sp) + 83f43734: e022 sd s0,0(sp) + 83f43736: 0800 addi s0,sp,16 + + aud_printf("Enter cvitek audio ssp algorithm test mode\n"); + 83f43738: 0000d517 auipc a0,0xd + 83f4373c: a0850513 addi a0,a0,-1528 # 83f50140 <__rodata_start> + 83f43740: 055080ef jal ra,83f4bf94 + if (unit_test_triggered == 1) { + 83f43744: 0001c797 auipc a5,0x1c + 83f43748: 49478793 addi a5,a5,1172 # 83f5fbd8 + 83f4374c: 439c lw a5,0(a5) + 83f4374e: 873e mv a4,a5 + 83f43750: 4785 li a5,1 + 83f43752: 02f70563 beq a4,a5,83f4377c + //already trigger + return; + + } else { + aud_printf("audio_ssp first trigger test begin.....!!!\n"); + 83f43756: 0000d517 auipc a0,0xd + 83f4375a: a1a50513 addi a0,a0,-1510 # 83f50170 <__rodata_start+0x30> + 83f4375e: 037080ef jal ra,83f4bf94 + aud_printf("audio_ssp first trigger test end!\n"); + 83f43762: 0000d517 auipc a0,0xd + 83f43766: a3e50513 addi a0,a0,-1474 # 83f501a0 <__rodata_start+0x60> + 83f4376a: 02b080ef jal ra,83f4bf94 + unit_test_triggered = 1; + 83f4376e: 0001c797 auipc a5,0x1c + 83f43772: 46a78793 addi a5,a5,1130 # 83f5fbd8 + 83f43776: 4705 li a4,1 + 83f43778: c398 sw a4,0(a5) + 83f4377a: a011 j 83f4377e + return; + 83f4377c: 0001 nop + } +} + 83f4377e: 60a2 ld ra,8(sp) + 83f43780: 6402 ld s0,0(sp) + 83f43782: 0141 addi sp,sp,16 + 83f43784: 8082 ret + +0000000083f43786 : + } + return (ret&check_val); + +} +void prvAudioRunTask(void *pvParameters) +{ + 83f43786: 716d addi sp,sp,-272 + 83f43788: e606 sd ra,264(sp) + 83f4378a: e226 sd s1,256(sp) + 83f4378c: f9ce sd s3,240(sp) + 83f4378e: f1d6 sd s5,224(sp) + 83f43790: edda sd s6,216(sp) + 83f43792: e9de sd s7,208(sp) + 83f43794: e5e2 sd s8,200(sp) + 83f43796: fdca sd s2,248(sp) + 83f43798: f5d2 sd s4,232(sp) + 83f4379a: e1e6 sd s9,192(sp) + 83f4379c: fd6a sd s10,184(sp) + 83f4379e: f96e sd s11,176(sp) + TickType_t xTimer3AProcEnd; + static int frame_count; + static int total_diff; + #endif + + cvi_audio_init_test(); + 83f437a0: f91ff0ef jal ra,83f43730 + printf("pAudioRunTask run Version:20220519\n"); + 83f437a4: 0000d517 auipc a0,0xd + 83f437a8: a2450513 addi a0,a0,-1500 # 83f501c8 <__rodata_start+0x88> + 83f437ac: 7e8080ef jal ra,83f4bf94 + + xQueueAudioCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + 83f437b0: 4515 li a0,5 + 83f437b2: b3fff0ef jal ra,83f432f0 + 83f437b6: 87aa mv a5,a0 + 83f437b8: 0001cc17 auipc s8,0x1c + 83f437bc: 460c0c13 addi s8,s8,1120 # 83f5fc18 + xQueueAudio = main_GetMODHandle(E_QUEUE_AUDIO); + 83f437c0: 4519 li a0,6 + xQueueAudioCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + 83f437c2: 00fc3023 sd a5,0(s8) + xQueueAudio = main_GetMODHandle(E_QUEUE_AUDIO); + 83f437c6: b2bff0ef jal ra,83f432f0 + unsigned int prev_msg_counter = -1;//counter to check the package from cviaudio_core.ko to rtos + 83f437ca: 57fd li a5,-1 + 83f437cc: ec3e sd a5,24(sp) + if (pindicator->chunks_number >= 5) + vTaskDelay(pdMS_TO_TICKS(10)); + else if (pindicator->chunks_number >= 3) + vTaskDelay(pdMS_TO_TICKS(5)); + else + usleep(3000); + 83f437ce: 6785 lui a5,0x1 + xQueueAudio = main_GetMODHandle(E_QUEUE_AUDIO); + 83f437d0: 0001ca97 auipc s5,0x1c + 83f437d4: 440a8a93 addi s5,s5,1088 # 83f5fc10 + usleep(3000); + 83f437d8: bb878793 addi a5,a5,-1096 # bb8 <_EL1_STACK_SIZE+0x3b8> + xQueueAudio = main_GetMODHandle(E_QUEUE_AUDIO); + 83f437dc: 00aab023 sd a0,0(s5) + 83f437e0: 0001c497 auipc s1,0x1c + 83f437e4: 41848493 addi s1,s1,1048 # 83f5fbf8 + 83f437e8: 0001cb97 auipc s7,0x1c + 83f437ec: 408b8b93 addi s7,s7,1032 # 83f5fbf0 + if (rtos_cmdq.ip_id != IP_AUDIO) { + 83f437f0: 4b15 li s6,5 + else if (pindicator->chunks_number >= 3) + 83f437f2: 4989 li s3,2 + usleep(3000); + 83f437f4: f43e sd a5,40(sp) + 83f437f6: a089 j 83f43838 + aud_error("invalid ip_id[%d] into AudioRunTask\n", rtos_cmdq.ip_id); + 83f437f8: 0b400613 li a2,180 + 83f437fc: 0000d597 auipc a1,0xd + 83f43800: 7c458593 addi a1,a1,1988 # 83f50fc0 <__func__.1> + 83f43804: 0000d517 auipc a0,0xd + 83f43808: 9ec50513 addi a0,a0,-1556 # 83f501f0 <__rodata_start+0xb0> + 83f4380c: 788080ef jal ra,83f4bf94 + //printf("CVIAUDIO_RTOS_CMD_SSP_PROC_BLOCK---success[0x%x][0x%x][0x%x]\n", pvincent[0], pvincent[1], pvincent[2]); + clean_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + clean_dcache_range((uintptr_t)pstBlockFrm->mic_in_addr, 1280); + clean_dcache_range((uintptr_t)pstBlockFrm->output_addr, 1280); + clean_dcache_range((uintptr_t)pstBlockFrm->ref_in_addr, 1280); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43810: 000c3503 ld a0,0(s8) + 83f43814: 4681 li a3,0 + 83f43816: 4601 li a2,0 + 83f43818: 180c addi a1,sp,48 + 83f4381a: 22c0b0ef jal ra,83f4ea46 + p_cmdqu->ip_id = -1; + 83f4381e: 03015783 lhu a5,48(sp) + 83f43822: 7761 lui a4,0xffff8 + xQueueReceive(xQueueAudio, &rtos_cmdq, portMAX_DELAY); + 83f43824: 000ab503 ld a0,0(s5) + p_cmdqu->ip_id = -1; + 83f43828: 8ff9 and a5,a5,a4 + 83f4382a: 6721 lui a4,0x8 + 83f4382c: 177d addi a4,a4,-1 + 83f4382e: 8fd9 or a5,a5,a4 + 83f43830: 02f11823 sh a5,48(sp) + p_cmdqu->param_ptr = -1; + 83f43834: 57fd li a5,-1 + 83f43836: da3e sw a5,52(sp) + xQueueReceive(xQueueAudio, &rtos_cmdq, portMAX_DELAY); + 83f43838: 567d li a2,-1 + 83f4383a: 180c addi a1,sp,48 + 83f4383c: 40a0b0ef jal ra,83f4ec46 + if (rtos_cmdq.ip_id != IP_AUDIO) { + 83f43840: 03014683 lbu a3,48(sp) + 83f43844: fb669ae3 bne a3,s6,83f437f8 + switch (rtos_cmdq.cmd_id) { + 83f43848: 76c2 ld a3,48(sp) + 83f4384a: 47b5 li a5,13 + 83f4384c: 82a1 srli a3,a3,0x8 + 83f4384e: 07f6f693 andi a3,a3,127 + 83f43852: 40d7ee63 bltu a5,a3,83f43c6e + 83f43856: 0000d717 auipc a4,0xd + 83f4385a: 70a70713 addi a4,a4,1802 # 83f50f60 <__func__.4+0x190> + 83f4385e: 00269793 slli a5,a3,0x2 + 83f43862: 97ba add a5,a5,a4 + 83f43864: 439c lw a5,0(a5) + 83f43866: 97ba add a5,a5,a4 + 83f43868: 8782 jr a5 + (ST_CVIAUDIO_MAILBOX_BLOCK *)rtos_cmdq.param_ptr; + 83f4386a: 03416903 lwu s2,52(sp) + inv_dcache_range((uintptr_t)pstAudBlockMailBox, sizeof(ST_CVIAUDIO_MAILBOX_BLOCK)); + 83f4386e: 45c1 li a1,16 + 83f43870: 854a mv a0,s2 + 83f43872: 69e080ef jal ra,83f4bf10 + if (pstAudBlockMailBox->u64RevMask != CVIAUDIO_RTOS_MAGIC_WORD_USERSPACE_BLOCK_MODE) { + 83f43876: 00093683 ld a3,0(s2) + 83f4387a: 0bb00793 li a5,187 + 83f4387e: 50f68463 beq a3,a5,83f43d86 + aud_error("[CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK]magic word mismatch[0x%lx]\n", + 83f43882: 0000d597 auipc a1,0xd + 83f43886: 73e58593 addi a1,a1,1854 # 83f50fc0 <__func__.1> + 83f4388a: 21d00613 li a2,541 + 83f4388e: 0000d517 auipc a0,0xd + 83f43892: db250513 addi a0,a0,-590 # 83f50640 <__rodata_start+0x500> + 83f43896: 6fe080ef jal ra,83f4bf94 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f4389a: 0fa00793 li a5,250 + clean_dcache_range((uintptr_t)pstAudBlockMailBox, sizeof(ST_CVIAUDIO_MAILBOX_BLOCK)); + 83f4389e: 854a mv a0,s2 + 83f438a0: 45c1 li a1,16 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f438a2: da3e sw a5,52(sp) + clean_dcache_range((uintptr_t)pstBlockFrm->ref_in_addr, 1280); + 83f438a4: 690080ef jal ra,83f4bf34 + 83f438a8: b7a5 j 83f43810 + inv_dcache_range((uintptr_t)output_addr, 320); + 83f438aa: 03416503 lwu a0,52(sp) + 83f438ae: 14000593 li a1,320 + 83f438b2: 65e080ef jal ra,83f4bf10 + if (ret == 0) { + 83f438b6: b7a5 j 83f4381e + if (!paudio_ssp_block) { + 83f438b8: 0001c797 auipc a5,0x1c + 83f438bc: 32878793 addi a5,a5,808 # 83f5fbe0 + 83f438c0: 639c ld a5,0(a5) + 83f438c2: 66078063 beqz a5,83f43f22 + ST_CVIAUDIO_BLOCK_FRAME *pstBlockFrm = (ST_CVIAUDIO_BLOCK_FRAME *)rtos_cmdq.param_ptr; + 83f438c6: 03416903 lwu s2,52(sp) + inv_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + 83f438ca: 02000593 li a1,32 + 83f438ce: 854a mv a0,s2 + 83f438d0: 640080ef jal ra,83f4bf10 + inv_dcache_range((uintptr_t)pstBlockFrm->mic_in_addr, 1280); + 83f438d4: 00893503 ld a0,8(s2) + 83f438d8: 50000593 li a1,1280 + 83f438dc: 634080ef jal ra,83f4bf10 + inv_dcache_range((uintptr_t)pstBlockFrm->output_addr, 1280); + 83f438e0: 01893503 ld a0,24(s2) + 83f438e4: 50000593 li a1,1280 + 83f438e8: 628080ef jal ra,83f4bf10 + inv_dcache_range((uintptr_t)pstBlockFrm->ref_in_addr, 1280); + 83f438ec: 01093503 ld a0,16(s2) + 83f438f0: 50000593 li a1,1280 + 83f438f4: 61c080ef jal ra,83f4bf10 + if (pstBlockFrm->u64RevMask != CVIAUDIO_RTOS_MAGIC_WORD_USERSPACE_BLOCK_MODE) { + 83f438f8: 00093683 ld a3,0(s2) + 83f438fc: 0bb00793 li a5,187 + 83f43900: 64f68963 beq a3,a5,83f43f52 + aud_error("[CVIAUDIO_RTOS_CMD_SSP_PROC_BLOCK]magic word mismatch[0x%lx]\n", + 83f43904: 0000d597 auipc a1,0xd + 83f43908: 6bc58593 addi a1,a1,1724 # 83f50fc0 <__func__.1> + 83f4390c: 27700613 li a2,631 + 83f43910: 0000d517 auipc a0,0xd + 83f43914: fd050513 addi a0,a0,-48 # 83f508e0 <__rodata_start+0x7a0> + 83f43918: 67c080ef jal ra,83f4bf94 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f4391c: 0fa00793 li a5,250 + clean_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + 83f43920: 854a mv a0,s2 + 83f43922: 02000593 li a1,32 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f43926: da3e sw a5,52(sp) + clean_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + 83f43928: bfb5 j 83f438a4 + ST_SSP_RTOS_INIT *pSspRtosCfg = rtos_cmdq.param_ptr; + 83f4392a: 03416783 lwu a5,52(sp) + pstSspBufTbl = &pSspRtosCfg->buffertbl[0]; + 83f4392e: 00878713 addi a4,a5,8 + 83f43932: e098 sd a4,0(s1) + pSpkSspRtosData_Ret = (ST_SSP_RTOS_SPK_DATA_RET *)pSspRtosCfg->CbPhyAddr; + 83f43934: 0047e783 lwu a5,4(a5) + 83f43938: f03e sd a5,32(sp) + aud_debug("[Rtos][Rtos_space]xxxpSspRtosCfg[0x%p]\n", pSspRtosCfg); + 83f4393a: b5d5 j 83f4381e + if (paudio_ssp_handle == NULL || pstSspBufTbl == NULL) { + 83f4393c: 0001c797 auipc a5,0x1c + 83f43940: 2ac78793 addi a5,a5,684 # 83f5fbe8 + 83f43944: 639c ld a5,0(a5) + 83f43946: c399 beqz a5,83f4394c + 83f43948: 609c ld a5,0(s1) + 83f4394a: ef8d bnez a5,83f43984 + aud_error("Error cannot process with NULL handle[%s][%d]\n", __func__, __LINE__); + 83f4394c: 0000d697 auipc a3,0xd + 83f43950: 67468693 addi a3,a3,1652 # 83f50fc0 <__func__.1> + 83f43954: 10500713 li a4,261 + 83f43958: 10500613 li a2,261 + 83f4395c: 85b6 mv a1,a3 + 83f4395e: 0000d517 auipc a0,0xd + 83f43962: 9da50513 addi a0,a0,-1574 # 83f50338 <__rodata_start+0x1f8> + 83f43966: 62e080ef jal ra,83f4bf94 + break; + 83f4396a: bd55 j 83f4381e + if (bCheck_input_full) { + 83f4396c: 14091363 bnez s2,83f43ab2 + } while ((ret_val > 0) && ssp_running); + 83f43970: ea0807e3 beqz a6,83f4381e + 83f43974: 0001c797 auipc a5,0x1c + 83f43978: 29478793 addi a5,a5,660 # 83f5fc08 + 83f4397c: 0007c783 lbu a5,0(a5) + 83f43980: e8078fe3 beqz a5,83f4381e + ret_val = _audio_task_check_ssp_proc_data_valid(pindicator); + 83f43984: 000bb903 ld s2,0(s7) + if (!pIndicator) { + 83f43988: 34090c63 beqz s2,83f43ce0 + if (pIndicator->channel_nums > 2 || pIndicator->channel_nums < 1) { + 83f4398c: 00494683 lbu a3,4(s2) + 83f43990: 4705 li a4,1 + unsigned char check_val = 1; + 83f43992: 4805 li a6,1 + if (pIndicator->channel_nums > 2 || pIndicator->channel_nums < 1) { + 83f43994: fff6879b addiw a5,a3,-1 + 83f43998: 0ff7f793 andi a5,a5,255 + 83f4399c: 00f77f63 bgeu a4,a5,83f439ba + aud_error("[error][rtos][audio_task]channel numbers[%d] invalid\n", + 83f439a0: 07900613 li a2,121 + 83f439a4: 0000d597 auipc a1,0xd + 83f439a8: 5f458593 addi a1,a1,1524 # 83f50f98 <__func__.0> + 83f439ac: 0000d517 auipc a0,0xd + 83f439b0: a3450513 addi a0,a0,-1484 # 83f503e0 <__rodata_start+0x2a0> + 83f439b4: 5e0080ef jal ra,83f4bf94 + check_val = 0; + 83f439b8: 4801 li a6,0 + if (pIndicator->chunks_number <= 0 || + 83f439ba: 00094683 lbu a3,0(s2) + 83f439be: 4761 li a4,24 + 83f439c0: fff6879b addiw a5,a3,-1 + 83f439c4: 0ff7f793 andi a5,a5,255 + 83f439c8: 26f76e63 bltu a4,a5,83f43c44 + if (pIndicator->Wpt_index > CVIAUDIO_SSP_CHUNK_NUMBERS) { + 83f439cc: 00194683 lbu a3,1(s2) + 83f439d0: 47e5 li a5,25 + 83f439d2: 20d7ed63 bltu a5,a3,83f43bec + if (!pIndicator->ssp_on) { + 83f439d6: 00594783 lbu a5,5(s2) + 83f439da: 22078863 beqz a5,83f43c0a + if (!ret_val) { + 83f439de: 24080363 beqz a6,83f43c24 + if ((pindicator->msg_counter == prev_msg_counter)) { + 83f439e2: 000bb503 ld a0,0(s7) + 83f439e6: 6762 ld a4,24(sp) + 83f439e8: 455c lw a5,12(a0) + 83f439ea: 28f70f63 beq a4,a5,83f43c88 + target_pkt_cnt = pindicator->chunks_number; + 83f439ee: 00054a03 lbu s4,0(a0) + cur_pt = pindicator->Ppt_index; + 83f439f2: 00354d03 lbu s10,3(a0) + while (proc_pkt_cnt < target_pkt_cnt) { + 83f439f6: 5a0a0c63 beqz s4,83f43fae + if (pstSspBufTbl[cur_pt].bBufOccupy != CVIAUDIO_BUF_TBL_INPUT) { + 83f439fa: 608c ld a1,0(s1) + cur_pt = pindicator->Ppt_index; + 83f439fc: 876a mv a4,s10 + proc_pkt_cnt = 0; + 83f439fe: 4601 li a2,0 + if (pstSspBufTbl[cur_pt].bBufOccupy != CVIAUDIO_BUF_TBL_INPUT) { + 83f43a00: 00571693 slli a3,a4,0x5 + 83f43a04: 96ae add a3,a3,a1 + 83f43a06: 0006c903 lbu s2,0(a3) + 83f43a0a: 4785 li a5,1 + 83f43a0c: 1af91c63 bne s2,a5,83f43bc4 + cur_pt = (cur_pt + 1) % CVIAUDIO_SSP_CHUNK_NUMBERS; + 83f43a10: 2705 addiw a4,a4,1 + 83f43a12: 47e5 li a5,25 + 83f43a14: 02f7673b remw a4,a4,a5 + proc_pkt_cnt += 1; + 83f43a18: 2605 addiw a2,a2,1 + 83f43a1a: 0ff67613 andi a2,a2,255 + cur_pt = (cur_pt + 1) % CVIAUDIO_SSP_CHUNK_NUMBERS; + 83f43a1e: 0ff77713 andi a4,a4,255 + while (proc_pkt_cnt < target_pkt_cnt) { + 83f43a22: fcca1fe3 bne s4,a2,83f43a00 + chn_num = pindicator->channel_nums; + 83f43a26: 00454783 lbu a5,4(a0) + proc_pkt_cnt = 0; + 83f43a2a: 4d81 li s11,0 + chn_num = pindicator->channel_nums; + 83f43a2c: e43e sd a5,8(sp) + while ((proc_pkt_cnt != target_pkt_cnt) && (bCheck_input_full)) { + 83f43a2e: f34d8fe3 beq s11,s4,83f4396c + 83f43a32: f2090fe3 beqz s2,83f43970 + ret_val = CviAud_Algo_Process(paudio_ssp_handle, + 83f43a36: 0001c797 auipc a5,0x1c + 83f43a3a: 1b278793 addi a5,a5,434 # 83f5fbe8 + pstSspBufTbl[cur_pt].mic_in_addr, + 83f43a3e: 6098 ld a4,0(s1) + ret_val = CviAud_Algo_Process(paudio_ssp_handle, + 83f43a40: 6388 ld a0,0(a5) + if (chn_num == 2 || pindicator->ssp_with_aec) { + 83f43a42: 67a2 ld a5,8(sp) + pstSspBufTbl[cur_pt].mic_in_addr, + 83f43a44: 005d1c93 slli s9,s10,0x5 + 83f43a48: 9766 add a4,a4,s9 + ret_val = CviAud_Algo_Process(paudio_ssp_handle, + 83f43a4a: 670c ld a1,8(a4) + 83f43a4c: 6f14 ld a3,24(a4) + if (chn_num == 2 || pindicator->ssp_with_aec) { + 83f43a4e: 01378863 beq a5,s3,83f43a5e + 83f43a52: 000bb603 ld a2,0(s7) + 83f43a56: 00664603 lbu a2,6(a2) + 83f43a5a: 14060d63 beqz a2,83f43bb4 + ret_val = CviAud_Algo_Process(paudio_ssp_handle, + 83f43a5e: 6b10 ld a2,16(a4) + 83f43a60: 0a000713 li a4,160 + 83f43a64: 63c000ef jal ra,83f440a0 + 83f43a68: 0ff57813 andi a6,a0,255 + if (ret_val <= 0) + 83f43a6c: 12080563 beqz a6,83f43b96 + pstSspBufTbl[cur_pt].bBufOccupy = CVIAUDIO_BUF_TBL_AFTER_SSP; + 83f43a70: 6098 ld a4,0(s1) + 83f43a72: 9766 add a4,a4,s9 + 83f43a74: 01370023 sb s3,0(a4) + cur_pt = (cur_pt + 1) % CVIAUDIO_SSP_CHUNK_NUMBERS; + 83f43a78: 001d079b addiw a5,s10,1 + 83f43a7c: 4765 li a4,25 + 83f43a7e: 02e7e7bb remw a5,a5,a4 + proc_pkt_cnt += 1; + 83f43a82: 001d889b addiw a7,s11,1 + 83f43a86: 0ff8fd93 andi s11,a7,255 + cur_pt = (cur_pt + 1) % CVIAUDIO_SSP_CHUNK_NUMBERS; + 83f43a8a: 0ff7fd13 andi s10,a5,255 + if (proc_pkt_cnt > (CVIAUDIO_SSP_CHUNK_NUMBERS + 1)) { + 83f43a8e: 47ed li a5,27 + 83f43a90: f8fd9fe3 bne s11,a5,83f43a2e + aud_error("[audio_task]proc_pkt_cnt abnormal..[%d]\n", + 83f43a94: 46ed li a3,27 + 83f43a96: 14f00613 li a2,335 + 83f43a9a: 0000d597 auipc a1,0xd + 83f43a9e: 52658593 addi a1,a1,1318 # 83f50fc0 <__func__.1> + 83f43aa2: 0000d517 auipc a0,0xd + 83f43aa6: b5650513 addi a0,a0,-1194 # 83f505f8 <__rodata_start+0x4b8> + 83f43aaa: e442 sd a6,8(sp) + 83f43aac: 4e8080ef jal ra,83f4bf94 + if (bCheck_input_full) { + 83f43ab0: 6822 ld a6,8(sp) + pindicator->Ppt_index = cur_pt; + 83f43ab2: 000bb703 ld a4,0(s7) + clean_dcache_range((uintptr_t)pindicator, + 83f43ab6: 45c1 li a1,16 + 83f43ab8: e442 sd a6,8(sp) + pindicator->Ppt_index = cur_pt; + 83f43aba: 01a701a3 sb s10,3(a4) + prev_msg_counter = pindicator->msg_counter; + 83f43abe: 000bb503 ld a0,0(s7) + 83f43ac2: 455c lw a5,12(a0) + 83f43ac4: ec3e sd a5,24(sp) + pindicator->msg_counter += 1; + 83f43ac6: 2785 addiw a5,a5,1 + 83f43ac8: c55c sw a5,12(a0) + clean_dcache_range((uintptr_t)pindicator, + 83f43aca: 46a080ef jal ra,83f4bf34 + clean_dcache_range((uintptr_t)pstSspBufTbl, + 83f43ace: 6088 ld a0,0(s1) + 83f43ad0: 32000593 li a1,800 + 83f43ad4: 460080ef jal ra,83f4bf34 + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43ad8: 000c3503 ld a0,0(s8) + 83f43adc: 4681 li a3,0 + 83f43ade: 4601 li a2,0 + 83f43ae0: 180c addi a1,sp,48 + 83f43ae2: 7650a0ef jal ra,83f4ea46 + 83f43ae6: 6822 ld a6,8(sp) + 83f43ae8: b561 j 83f43970 + if (paudio_ssp_handle == NULL) { + 83f43aea: 0001c797 auipc a5,0x1c + 83f43aee: 0fe78793 addi a5,a5,254 # 83f5fbe8 + 83f43af2: 6388 ld a0,0(a5) + 83f43af4: 3e050d63 beqz a0,83f43eee + CviAud_Algo_DeInit(paudio_ssp_handle); + 83f43af8: 614000ef jal ra,83f4410c + paudio_ssp_handle = NULL; + 83f43afc: 0001c797 auipc a5,0x1c + 83f43b00: 0e07b623 sd zero,236(a5) # 83f5fbe8 + rtos_cmdq.ip_id = IP_AUDIO; + 83f43b04: 03015783 lhu a5,48(sp) + 83f43b08: 7761 lui a4,0xffff8 + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43b0a: 000c3503 ld a0,0(s8) + rtos_cmdq.ip_id = IP_AUDIO; + 83f43b0e: 8ff9 and a5,a5,a4 + 83f43b10: 2057e793 ori a5,a5,517 + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43b14: 4681 li a3,0 + 83f43b16: 4601 li a2,0 + 83f43b18: 180c addi a1,sp,48 + rtos_cmdq.ip_id = IP_AUDIO; + 83f43b1a: 02f11823 sh a5,48(sp) + ssp_running = 0; + 83f43b1e: 0001c797 auipc a5,0x1c + 83f43b22: 0e078523 sb zero,234(a5) # 83f5fc08 + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43b26: 7210a0ef jal ra,83f4ea46 + break; + 83f43b2a: b9d5 j 83f4381e + rtos_cmdq.param_ptr = pSpkSspRtosData_Ret; + 83f43b2c: 7782 ld a5,32(sp) + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43b2e: 000c3503 ld a0,0(s8) + 83f43b32: 4681 li a3,0 + 83f43b34: 4601 li a2,0 + 83f43b36: 180c addi a1,sp,48 + rtos_cmdq.param_ptr = pSpkSspRtosData_Ret; + 83f43b38: da3e sw a5,52(sp) + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43b3a: 70d0a0ef jal ra,83f4ea46 + break; + 83f43b3e: b1c5 j 83f4381e + if (paudio_ssp_block) { + 83f43b40: 0001c797 auipc a5,0x1c + 83f43b44: 0a078793 addi a5,a5,160 # 83f5fbe0 + 83f43b48: 6388 ld a0,0(a5) + 83f43b4a: 3a050f63 beqz a0,83f43f08 + CviAud_Algo_DeInit(paudio_ssp_block); + 83f43b4e: 5be000ef jal ra,83f4410c + paudio_ssp_block = NULL; + 83f43b52: 0001c797 auipc a5,0x1c + 83f43b56: 0807b723 sd zero,142(a5) # 83f5fbe0 + 83f43b5a: b95d j 83f43810 + ST_CVIAUDIO_MAILBOX *gpstCviaudioMailBox= (ST_CVIAUDIO_MAILBOX *)rtos_cmdq.param_ptr; + 83f43b5c: 03416903 lwu s2,52(sp) + inv_dcache_range((uintptr_t)gpstCviaudioMailBox, sizeof(ST_CVIAUDIO_MAILBOX)); + 83f43b60: 02000593 li a1,32 + 83f43b64: 854a mv a0,s2 + 83f43b66: 3aa080ef jal ra,83f4bf10 + if (gpstCviaudioMailBox->u64RevMask == CVIAUDIO_RTOS_MAGIC_WORD_KERNEL_BIND_MODE) { + 83f43b6a: 00093703 ld a4,0(s2) + 83f43b6e: 09900793 li a5,153 + 83f43b72: 18f70463 beq a4,a5,83f43cfa + aud_error("[SSP]ERROR [%s][%d]...force break\n", __func__, __LINE__); + 83f43b76: 0000d697 auipc a3,0xd + 83f43b7a: 44a68693 addi a3,a3,1098 # 83f50fc0 <__func__.1> + 83f43b7e: 0d900713 li a4,217 + 83f43b82: 0d900613 li a2,217 + 83f43b86: 85b6 mv a1,a3 + 83f43b88: 0000c517 auipc a0,0xc + 83f43b8c: 6b050513 addi a0,a0,1712 # 83f50238 <__rodata_start+0xf8> + 83f43b90: 404080ef jal ra,83f4bf94 + break; + 83f43b94: b169 j 83f4381e + aud_error("[audio_task]CviAudio_Algo_Process error!!!\n"); + 83f43b96: 14900613 li a2,329 + 83f43b9a: 0000d597 auipc a1,0xd + 83f43b9e: 42658593 addi a1,a1,1062 # 83f50fc0 <__func__.1> + 83f43ba2: 0000d517 auipc a0,0xd + 83f43ba6: a0e50513 addi a0,a0,-1522 # 83f505b0 <__rodata_start+0x470> + 83f43baa: e842 sd a6,16(sp) + 83f43bac: 3e8080ef jal ra,83f4bf94 + 83f43bb0: 6842 ld a6,16(sp) + 83f43bb2: b5d9 j 83f43a78 + ret_val = CviAud_Algo_Process(paudio_ssp_handle, + 83f43bb4: 0a000713 li a4,160 + 83f43bb8: 4601 li a2,0 + 83f43bba: 4e6000ef jal ra,83f440a0 + 83f43bbe: 0ff57813 andi a6,a0,255 + 83f43bc2: b56d j 83f43a6c + inv_dcache_range((uintptr_t)pindicator, sizeof(ST_SSP_RTOS_INDICATOR)); + 83f43bc4: 45c1 li a1,16 + 83f43bc6: e442 sd a6,8(sp) + 83f43bc8: 348080ef jal ra,83f4bf10 + inv_dcache_range((uintptr_t)pstSspBufTbl, + 83f43bcc: 6088 ld a0,0(s1) + 83f43bce: 32000593 li a1,800 + bCheck_input_full = 0; + 83f43bd2: 4901 li s2,0 + inv_dcache_range((uintptr_t)pstSspBufTbl, + 83f43bd4: 33c080ef jal ra,83f4bf10 + cur_pt = pindicator->Ppt_index; + 83f43bd8: 000bb503 ld a0,0(s7) + break; + 83f43bdc: 6822 ld a6,8(sp) + proc_pkt_cnt = 0; + 83f43bde: 4d81 li s11,0 + chn_num = pindicator->channel_nums; + 83f43be0: 00454783 lbu a5,4(a0) + cur_pt = pindicator->Ppt_index; + 83f43be4: 00354d03 lbu s10,3(a0) + chn_num = pindicator->channel_nums; + 83f43be8: e43e sd a5,8(sp) + while ((proc_pkt_cnt != target_pkt_cnt) && (bCheck_input_full)) { + 83f43bea: b591 j 83f43a2e + aud_error("[error][rtos][audio_task]wpt_index invalid range[%d]\n", + 83f43bec: 08600613 li a2,134 + 83f43bf0: 0000d597 auipc a1,0xd + 83f43bf4: 3a858593 addi a1,a1,936 # 83f50f98 <__func__.0> + 83f43bf8: 0000d517 auipc a0,0xd + 83f43bfc: 8e050513 addi a0,a0,-1824 # 83f504d8 <__rodata_start+0x398> + 83f43c00: 394080ef jal ra,83f4bf94 + if (!pIndicator->ssp_on) { + 83f43c04: 00594783 lbu a5,5(s2) + 83f43c08: ef91 bnez a5,83f43c24 + aud_error("[error][rtos][audio_task]ssp_on invalid[%d]\n", + 83f43c0a: 4681 li a3,0 + 83f43c0c: 08c00613 li a2,140 + 83f43c10: 0000d597 auipc a1,0xd + 83f43c14: 38858593 addi a1,a1,904 # 83f50f98 <__func__.0> + 83f43c18: 0000d517 auipc a0,0xd + 83f43c1c: 87050513 addi a0,a0,-1936 # 83f50488 <__rodata_start+0x348> + 83f43c20: 374080ef jal ra,83f4bf94 + aud_error("Error[%s][%d]..force break!!\n", __func__, __LINE__); + 83f43c24: 0000d697 auipc a3,0xd + 83f43c28: 39c68693 addi a3,a3,924 # 83f50fc0 <__func__.1> + 83f43c2c: 10c00713 li a4,268 + 83f43c30: 10c00613 li a2,268 + 83f43c34: 85b6 mv a1,a3 + 83f43c36: 0000d517 auipc a0,0xd + 83f43c3a: 8fa50513 addi a0,a0,-1798 # 83f50530 <__rodata_start+0x3f0> + 83f43c3e: 356080ef jal ra,83f4bf94 + break; + 83f43c42: bef1 j 83f4381e + aud_error("[error][rtos][audio_task]invalid chunks_number[%d]\n", + 83f43c44: 08000613 li a2,128 + 83f43c48: 0000d597 auipc a1,0xd + 83f43c4c: 35058593 addi a1,a1,848 # 83f50f98 <__func__.0> + 83f43c50: 0000c517 auipc a0,0xc + 83f43c54: 7e850513 addi a0,a0,2024 # 83f50438 <__rodata_start+0x2f8> + 83f43c58: 33c080ef jal ra,83f4bf94 + if (pIndicator->Wpt_index > CVIAUDIO_SSP_CHUNK_NUMBERS) { + 83f43c5c: 00194683 lbu a3,1(s2) + 83f43c60: 47e5 li a5,25 + 83f43c62: f8d7e5e3 bltu a5,a3,83f43bec + if (!pIndicator->ssp_on) { + 83f43c66: 00594783 lbu a5,5(s2) + 83f43c6a: ffcd bnez a5,83f43c24 + 83f43c6c: bf79 j 83f43c0a + aud_info("[RTOS]Leaving\n"); + } + break; + default: + aud_error("[error][rtos][audio_task]unrecognized cmd error[%d]\n", rtos_cmdq.cmd_id); + 83f43c6e: 2a500613 li a2,677 + 83f43c72: 0000d597 auipc a1,0xd + 83f43c76: 34e58593 addi a1,a1,846 # 83f50fc0 <__func__.1> + 83f43c7a: 0000d517 auipc a0,0xd + 83f43c7e: d0650513 addi a0,a0,-762 # 83f50980 <__rodata_start+0x840> + 83f43c82: 312080ef jal ra,83f4bf94 + break; + 83f43c86: be61 j 83f4381e + aud_error("[audio_task] counter same[%d][%d]\n", + 83f43c88: 86ba mv a3,a4 + 83f43c8a: 11200613 li a2,274 + 83f43c8e: 0000d597 auipc a1,0xd + 83f43c92: 33258593 addi a1,a1,818 # 83f50fc0 <__func__.1> + 83f43c96: 0000d517 auipc a0,0xd + 83f43c9a: 8da50513 addi a0,a0,-1830 # 83f50570 <__rodata_start+0x430> + 83f43c9e: e442 sd a6,8(sp) + 83f43ca0: 2f4080ef jal ra,83f4bf94 + inv_dcache_range((uintptr_t)pindicator, sizeof(ST_SSP_RTOS_INDICATOR)); + 83f43ca4: 000bb503 ld a0,0(s7) + 83f43ca8: 45c1 li a1,16 + 83f43caa: 266080ef jal ra,83f4bf10 + inv_dcache_range((uintptr_t)pstSspBufTbl, + 83f43cae: 6088 ld a0,0(s1) + 83f43cb0: 32000593 li a1,800 + 83f43cb4: 25c080ef jal ra,83f4bf10 + if (pindicator) { + 83f43cb8: 000bb503 ld a0,0(s7) + 83f43cbc: 6822 ld a6,8(sp) + 83f43cbe: d20508e3 beqz a0,83f439ee + if (pindicator->chunks_number >= 5) + 83f43cc2: 00054783 lbu a5,0(a0) + 83f43cc6: 4711 li a4,4 + 83f43cc8: 2ef76563 bltu a4,a5,83f43fb2 + else if (pindicator->chunks_number >= 3) + 83f43ccc: e442 sd a6,8(sp) + 83f43cce: 2cf9f963 bgeu s3,a5,83f43fa0 + vTaskDelay(pdMS_TO_TICKS(5)); + 83f43cd2: 4505 li a0,1 + 83f43cd4: 6b70b0ef jal ra,83f4fb8a + target_pkt_cnt = pindicator->chunks_number; + 83f43cd8: 000bb503 ld a0,0(s7) + 83f43cdc: 6822 ld a6,8(sp) + 83f43cde: bb01 j 83f439ee + aud_error("[error][rtos][audio_task]Null pt detect in proc data...\n"); + 83f43ce0: 07300613 li a2,115 + 83f43ce4: 0000d597 auipc a1,0xd + 83f43ce8: 2b458593 addi a1,a1,692 # 83f50f98 <__func__.0> + 83f43cec: 0000c517 auipc a0,0xc + 83f43cf0: 69c50513 addi a0,a0,1692 # 83f50388 <__rodata_start+0x248> + 83f43cf4: 2a0080ef jal ra,83f4bf94 + if (!ret_val) { + 83f43cf8: b735 j 83f43c24 + pindicator = (ST_SSP_RTOS_INDICATOR *)gpstCviaudioMailBox->indicatorPhy; + 83f43cfa: 01893783 ld a5,24(s2) + pstSspBufTbl = (ST_SSP_BUFTBL *)gpstCviaudioMailBox->buffertblPhy; + 83f43cfe: 01093703 ld a4,16(s2) + pstVqeConfig = (AI_TALKVQE_CONFIG_S *)gpstCviaudioMailBox->AinVqeCfgPhy; + 83f43d02: 00893503 ld a0,8(s2) + 83f43d06: 0001c697 auipc a3,0x1c + 83f43d0a: efa68693 addi a3,a3,-262 # 83f5fc00 + inv_dcache_range((uintptr_t)gpstCviaudioMailBox->AinVqeCfgPhy, + 83f43d0e: 07800593 li a1,120 + pstVqeConfig = (AI_TALKVQE_CONFIG_S *)gpstCviaudioMailBox->AinVqeCfgPhy; + 83f43d12: e288 sd a0,0(a3) + pindicator = (ST_SSP_RTOS_INDICATOR *)gpstCviaudioMailBox->indicatorPhy; + 83f43d14: 00fbb023 sd a5,0(s7) + pstSspBufTbl = (ST_SSP_BUFTBL *)gpstCviaudioMailBox->buffertblPhy; + 83f43d18: e098 sd a4,0(s1) + inv_dcache_range((uintptr_t)gpstCviaudioMailBox->AinVqeCfgPhy, + 83f43d1a: 1f6080ef jal ra,83f4bf10 + inv_dcache_range((uintptr_t)gpstCviaudioMailBox->buffertblPhy, + 83f43d1e: 01093503 ld a0,16(s2) + 83f43d22: 02000593 li a1,32 + 83f43d26: 1ea080ef jal ra,83f4bf10 + inv_dcache_range((uintptr_t)gpstCviaudioMailBox->indicatorPhy, + 83f43d2a: 01893503 ld a0,24(s2) + 83f43d2e: 45c1 li a1,16 + 83f43d30: 1e0080ef jal ra,83f4bf10 + if (paudio_ssp_handle != NULL) { + 83f43d34: 0001c797 auipc a5,0x1c + 83f43d38: eb478793 addi a5,a5,-332 # 83f5fbe8 + 83f43d3c: 639c ld a5,0(a5) + 83f43d3e: cf89 beqz a5,83f43d58 + aud_error("Warning ssp audio handle is not NULL\n"); + 83f43d40: 0e700613 li a2,231 + 83f43d44: 0000d597 auipc a1,0xd + 83f43d48: 27c58593 addi a1,a1,636 # 83f50fc0 <__func__.1> + 83f43d4c: 0000c517 auipc a0,0xc + 83f43d50: 52c50513 addi a0,a0,1324 # 83f50278 <__rodata_start+0x138> + 83f43d54: 240080ef jal ra,83f4bf94 + paudio_ssp_handle = CviAud_Algo_Init(pstVqeConfig->u32OpenMask, pstVqeConfig); + 83f43d58: 0001c797 auipc a5,0x1c + 83f43d5c: ea878793 addi a5,a5,-344 # 83f5fc00 + 83f43d60: 638c ld a1,0(a5) + 83f43d62: 41c8 lw a0,4(a1) + 83f43d64: 298000ef jal ra,83f43ffc + 83f43d68: 0001c797 auipc a5,0x1c + 83f43d6c: e8078793 addi a5,a5,-384 # 83f5fbe8 + 83f43d70: e388 sd a0,0(a5) + if (paudio_ssp_handle == NULL) { + 83f43d72: 26050763 beqz a0,83f43fe0 + ssp_running = 1; + 83f43d76: 4785 li a5,1 + 83f43d78: 0001c717 auipc a4,0x1c + 83f43d7c: e9070713 addi a4,a4,-368 # 83f5fc08 + 83f43d80: 00f70023 sb a5,0(a4) + 83f43d84: b471 j 83f43810 + _pstVqeConfig = (AI_TALKVQE_CONFIG_S_RTOS *)pstAudBlockMailBox->AinVqeCfgPhy; + 83f43d86: 00893a03 ld s4,8(s2) + inv_dcache_range((uintptr_t)_pstVqeConfig, sizeof(AI_TALKVQE_CONFIG_S_RTOS)); + 83f43d8a: 02000593 li a1,32 + 83f43d8e: 8552 mv a0,s4 + 83f43d90: 180080ef jal ra,83f4bf10 + printf("SSP_INIT dump-----------------------------------------------------\n"); + 83f43d94: 0000d517 auipc a0,0xd + 83f43d98: 90c50513 addi a0,a0,-1780 # 83f506a0 <__rodata_start+0x560> + 83f43d9c: 1f8080ef jal ra,83f4bf94 + printf("para_client_config[%d]\n", _pstVqeConfig->para_client_config); + 83f43da0: 000a4583 lbu a1,0(s4) + 83f43da4: 0000d517 auipc a0,0xd + 83f43da8: 94450513 addi a0,a0,-1724 # 83f506e8 <__rodata_start+0x5a8> + 83f43dac: 1e8080ef jal ra,83f4bf94 + printf("u32OpenMask[0x%x]\n", _pstVqeConfig->u32OpenMask); + 83f43db0: 001a4583 lbu a1,1(s4) + 83f43db4: 0000d517 auipc a0,0xd + 83f43db8: 94c50513 addi a0,a0,-1716 # 83f50700 <__rodata_start+0x5c0> + 83f43dbc: 1d8080ef jal ra,83f4bf94 + printf("s32WorkSampleRate[%d]\n", _pstVqeConfig->s32WorkSampleRate); + 83f43dc0: 002a5583 lhu a1,2(s4) + 83f43dc4: 0000d517 auipc a0,0xd + 83f43dc8: 95450513 addi a0,a0,-1708 # 83f50718 <__rodata_start+0x5d8> + 83f43dcc: 1c8080ef jal ra,83f4bf94 + printf("stAecCfg.para_aec_filter_len[%d]\n", _pstVqeConfig->stAecCfg.para_aec_filter_len); + 83f43dd0: 004a4583 lbu a1,4(s4) + 83f43dd4: 0000d517 auipc a0,0xd + 83f43dd8: 95c50513 addi a0,a0,-1700 # 83f50730 <__rodata_start+0x5f0> + 83f43ddc: 1b8080ef jal ra,83f4bf94 + printf("stAecCfg.para_aes_std_thrd[%d]\n", _pstVqeConfig->stAecCfg.para_aes_std_thrd); + 83f43de0: 005a4583 lbu a1,5(s4) + 83f43de4: 0000d517 auipc a0,0xd + 83f43de8: 97450513 addi a0,a0,-1676 # 83f50758 <__rodata_start+0x618> + 83f43dec: 1a8080ef jal ra,83f4bf94 + printf("stAecCfg.para_aes_supp_coeff[%d]\n", _pstVqeConfig->stAecCfg.para_aes_supp_coeff); + 83f43df0: 006a4583 lbu a1,6(s4) + 83f43df4: 0000d517 auipc a0,0xd + 83f43df8: 98450513 addi a0,a0,-1660 # 83f50778 <__rodata_start+0x638> + 83f43dfc: 198080ef jal ra,83f4bf94 + printf("SSP_INIT dump-----------------------------------------------------[end]\n"); + 83f43e00: 0000d517 auipc a0,0xd + 83f43e04: 9a050513 addi a0,a0,-1632 # 83f507a0 <__rodata_start+0x660> + 83f43e08: 18c080ef jal ra,83f4bf94 + pVqeConfigSsp->para_client_config = _pstVqeConfig->para_client_config; + 83f43e0c: 000a4783 lbu a5,0(s4) + 83f43e10: 02f11c23 sh a5,56(sp) + pVqeConfigSsp->u32OpenMask = _pstVqeConfig->u32OpenMask; + 83f43e14: 001a4783 lbu a5,1(s4) + 83f43e18: de3e sw a5,60(sp) + pVqeConfigSsp->s32WorkSampleRate = _pstVqeConfig->s32WorkSampleRate; + 83f43e1a: 002a5783 lhu a5,2(s4) + 83f43e1e: c0be sw a5,64(sp) + pVqeConfigSsp->stAecCfg.para_aec_filter_len = _pstVqeConfig->stAecCfg.para_aec_filter_len; + 83f43e20: 004a4783 lbu a5,4(s4) + 83f43e24: 04f11423 sh a5,72(sp) + pVqeConfigSsp->stAecCfg.para_aes_std_thrd = _pstVqeConfig->stAecCfg.para_aes_std_thrd; + 83f43e28: 005a4783 lbu a5,5(s4) + 83f43e2c: 04f11523 sh a5,74(sp) + pVqeConfigSsp->stAecCfg.para_aes_supp_coeff = _pstVqeConfig->stAecCfg.para_aes_supp_coeff; + 83f43e30: 006a4783 lbu a5,6(s4) + 83f43e34: 04f11623 sh a5,76(sp) + pVqeConfigSsp->stAnrCfg.para_nr_snr_coeff = _pstVqeConfig->stAnrCfg.para_nr_snr_coeff; + 83f43e38: 008a4783 lbu a5,8(s4) + 83f43e3c: 04f11823 sh a5,80(sp) + pVqeConfigSsp->stAnrCfg.para_nr_init_sile_time = _pstVqeConfig->stAnrCfg.para_nr_init_sile_time; + 83f43e40: 009a4783 lbu a5,9(s4) + 83f43e44: 04f11923 sh a5,82(sp) + pVqeConfigSsp->stAgcCfg.para_agc_max_gain = _pstVqeConfig->stAgcCfg.para_agc_max_gain; + 83f43e48: 00ca4783 lbu a5,12(s4) + 83f43e4c: 04f10c23 sb a5,88(sp) + pVqeConfigSsp->stAgcCfg.para_agc_target_high = _pstVqeConfig->stAgcCfg.para_agc_target_high; + 83f43e50: 00da4783 lbu a5,13(s4) + 83f43e54: 04f10ca3 sb a5,89(sp) + pVqeConfigSsp->stAgcCfg.para_agc_target_low = _pstVqeConfig->stAgcCfg.para_agc_target_low; + 83f43e58: 00ea4783 lbu a5,14(s4) + 83f43e5c: 04f10d23 sb a5,90(sp) + pVqeConfigSsp->stAgcCfg.para_agc_vad_ena = _pstVqeConfig->stAgcCfg.para_agc_vad_ena; + 83f43e60: 00fa4783 lbu a5,15(s4) + 83f43e64: 00f037b3 snez a5,a5 + 83f43e68: 04f10da3 sb a5,91(sp) + _pstVqeConfig->stAecDelayCfg.para_aec_init_filter_len; + 83f43e6c: 010a4783 lbu a5,16(s4) + 83f43e70: 06f11023 sh a5,96(sp) + pVqeConfigSsp->stAecDelayCfg.para_dg_target = _pstVqeConfig->stAecDelayCfg.para_dg_target; + 83f43e74: 011a4783 lbu a5,17(s4) + 83f43e78: 06f11123 sh a5,98(sp) + pVqeConfigSsp->stAecDelayCfg.para_delay_sample = _pstVqeConfig->stAecDelayCfg.para_delay_sample; + 83f43e7c: 012a4783 lbu a5,18(s4) + 83f43e80: 06f11223 sh a5,100(sp) + pVqeConfigSsp->s32RevMask = _pstVqeConfig->s32RevMask; + 83f43e84: 014a4783 lbu a5,20(s4) + 83f43e88: d4be sw a5,104(sp) + pVqeConfigSsp->para_notch_freq = _pstVqeConfig->para_notch_freq; + 83f43e8a: 015a4703 lbu a4,21(s4) + if (paudio_ssp_block != NULL) + 83f43e8e: 0001c797 auipc a5,0x1c + 83f43e92: d5278793 addi a5,a5,-686 # 83f5fbe0 + 83f43e96: 639c ld a5,0(a5) + pVqeConfigSsp->para_notch_freq = _pstVqeConfig->para_notch_freq; + 83f43e98: d6ba sw a4,108(sp) + if (paudio_ssp_block != NULL) + 83f43e9a: cf89 beqz a5,83f43eb4 + aud_error("warning paudio_ssp_blcok not Null..\n"); + 83f43e9c: 24900613 li a2,585 + 83f43ea0: 0000d597 auipc a1,0xd + 83f43ea4: 12058593 addi a1,a1,288 # 83f50fc0 <__func__.1> + 83f43ea8: 0000d517 auipc a0,0xd + 83f43eac: 94850513 addi a0,a0,-1720 # 83f507f0 <__rodata_start+0x6b0> + 83f43eb0: 0e4080ef jal ra,83f4bf94 + paudio_ssp_block = CviAud_Algo_Init(pVqeConfigSsp->u32OpenMask, pVqeConfigSsp); + 83f43eb4: 5572 lw a0,60(sp) + 83f43eb6: 182c addi a1,sp,56 + 83f43eb8: 144000ef jal ra,83f43ffc + 83f43ebc: 0001c797 auipc a5,0x1c + 83f43ec0: d2478793 addi a5,a5,-732 # 83f5fbe0 + 83f43ec4: e388 sd a0,0(a5) + if (paudio_ssp_block == NULL) { + 83f43ec6: 940515e3 bnez a0,83f43810 + aud_error("[CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK]paudio_ssp_block failure\n"); + 83f43eca: 0000d597 auipc a1,0xd + 83f43ece: 0f658593 addi a1,a1,246 # 83f50fc0 <__func__.1> + 83f43ed2: 24d00613 li a2,589 + 83f43ed6: 0000d517 auipc a0,0xd + 83f43eda: 96250513 addi a0,a0,-1694 # 83f50838 <__rodata_start+0x6f8> + 83f43ede: 0b6080ef jal ra,83f4bf94 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f43ee2: 0fa00793 li a5,250 + clean_dcache_range((uintptr_t)pstAudBlockMailBox, sizeof(ST_CVIAUDIO_MAILBOX_BLOCK)); + 83f43ee6: 854a mv a0,s2 + 83f43ee8: 45c1 li a1,16 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f43eea: da3e sw a5,52(sp) + clean_dcache_range((uintptr_t)pstAudBlockMailBox, sizeof(ST_CVIAUDIO_MAILBOX_BLOCK)); + 83f43eec: ba65 j 83f438a4 + aud_error("Error cannot de-init null pt\n"); + 83f43eee: 0f600613 li a2,246 + 83f43ef2: 0000d597 auipc a1,0xd + 83f43ef6: 0ce58593 addi a1,a1,206 # 83f50fc0 <__func__.1> + 83f43efa: 0000c517 auipc a0,0xc + 83f43efe: 3fe50513 addi a0,a0,1022 # 83f502f8 <__rodata_start+0x1b8> + 83f43f02: 092080ef jal ra,83f4bf94 + 83f43f06: befd j 83f43b04 + aud_error("Error cannot de-init null pt\n"); + 83f43f08: 25e00613 li a2,606 + 83f43f0c: 0000d597 auipc a1,0xd + 83f43f10: 0b458593 addi a1,a1,180 # 83f50fc0 <__func__.1> + 83f43f14: 0000c517 auipc a0,0xc + 83f43f18: 3e450513 addi a0,a0,996 # 83f502f8 <__rodata_start+0x1b8> + 83f43f1c: 078080ef jal ra,83f4bf94 + 83f43f20: b8c5 j 83f43810 + aud_error("Error cannot proc with null paudio_ssp_block\n"); + 83f43f22: 26b00613 li a2,619 + 83f43f26: 0000d597 auipc a1,0xd + 83f43f2a: 09a58593 addi a1,a1,154 # 83f50fc0 <__func__.1> + 83f43f2e: 0000d517 auipc a0,0xd + 83f43f32: 96250513 addi a0,a0,-1694 # 83f50890 <__rodata_start+0x750> + 83f43f36: 05e080ef jal ra,83f4bf94 + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43f3a: 000c3503 ld a0,0(s8) + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f43f3e: 0fa00793 li a5,250 + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43f42: 4681 li a3,0 + 83f43f44: 4601 li a2,0 + 83f43f46: 180c addi a1,sp,48 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f43f48: da3e sw a5,52(sp) + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + 83f43f4a: 2fd0a0ef jal ra,83f4ea46 + break; + 83f43f4e: 8d1ff06f j 83f4381e + ret = CviAud_Algo_Process(paudio_ssp_block, + 83f43f52: 0001c797 auipc a5,0x1c + 83f43f56: c8e78793 addi a5,a5,-882 # 83f5fbe0 + 83f43f5a: 01893683 ld a3,24(s2) + 83f43f5e: 01093603 ld a2,16(s2) + 83f43f62: 00893583 ld a1,8(s2) + 83f43f66: 6388 ld a0,0(a5) + 83f43f68: 0a000713 li a4,160 + 83f43f6c: 134000ef jal ra,83f440a0 + if (ret < 0) { + 83f43f70: 04054863 bltz a0,83f43fc0 + clean_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + 83f43f74: 854a mv a0,s2 + 83f43f76: 02000593 li a1,32 + 83f43f7a: 7bb070ef jal ra,83f4bf34 + clean_dcache_range((uintptr_t)pstBlockFrm->mic_in_addr, 1280); + 83f43f7e: 00893503 ld a0,8(s2) + 83f43f82: 50000593 li a1,1280 + 83f43f86: 7af070ef jal ra,83f4bf34 + clean_dcache_range((uintptr_t)pstBlockFrm->output_addr, 1280); + 83f43f8a: 01893503 ld a0,24(s2) + 83f43f8e: 50000593 li a1,1280 + 83f43f92: 7a3070ef jal ra,83f4bf34 + clean_dcache_range((uintptr_t)pstBlockFrm->ref_in_addr, 1280); + 83f43f96: 01093503 ld a0,16(s2) + 83f43f9a: 50000593 li a1,1280 + 83f43f9e: b219 j 83f438a4 + usleep(3000); + 83f43fa0: 7522 ld a0,40(sp) + 83f43fa2: 054080ef jal ra,83f4bff6 + target_pkt_cnt = pindicator->chunks_number; + 83f43fa6: 000bb503 ld a0,0(s7) + 83f43faa: 6822 ld a6,8(sp) + 83f43fac: b489 j 83f439ee + unsigned char bCheck_input_full = 1; + 83f43fae: 8942 mv s2,a6 + 83f43fb0: bc9d j 83f43a26 + vTaskDelay(pdMS_TO_TICKS(10)); + 83f43fb2: 4509 li a0,2 + 83f43fb4: 3d70b0ef jal ra,83f4fb8a + target_pkt_cnt = pindicator->chunks_number; + 83f43fb8: 000bb503 ld a0,0(s7) + 83f43fbc: 6822 ld a6,8(sp) + 83f43fbe: bc05 j 83f439ee + aud_error("Error in CviAud_Algo_Process\n"); + 83f43fc0: 28800613 li a2,648 + 83f43fc4: 0000d597 auipc a1,0xd + 83f43fc8: ffc58593 addi a1,a1,-4 # 83f50fc0 <__func__.1> + 83f43fcc: 0000d517 auipc a0,0xd + 83f43fd0: 97450513 addi a0,a0,-1676 # 83f50940 <__rodata_start+0x800> + 83f43fd4: 7c1070ef jal ra,83f4bf94 + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + 83f43fd8: 0fa00793 li a5,250 + 83f43fdc: da3e sw a5,52(sp) + 83f43fde: bf59 j 83f43f74 + aud_error("get null pt in init ssp\n"); + 83f43fe0: 0eb00613 li a2,235 + 83f43fe4: 0000d597 auipc a1,0xd + 83f43fe8: fdc58593 addi a1,a1,-36 # 83f50fc0 <__func__.1> + 83f43fec: 0000c517 auipc a0,0xc + 83f43ff0: 2d450513 addi a0,a0,724 # 83f502c0 <__rodata_start+0x180> + 83f43ff4: 7a1070ef jal ra,83f4bf94 + 83f43ff8: 819ff06f j 83f43810 + +0000000083f43ffc : + * Outputs: none + * + * Return: algo handle + **************************************************************************************/ +void *CviAud_Algo_Init(int s32FunctMask, void *param_info) +{ + 83f43ffc: 7159 addi sp,sp,-112 + 83f43ffe: f0a2 sd s0,96(sp) + const AI_TALKVQE_CONFIG_S *pstVqeConfig = (const AI_TALKVQE_CONFIG_S *)param_info; + ssp_para_struct ssp_para_info; + ssp_para_struct *p_ssp_para_info = &ssp_para_info; + + s32FunctMask = s32FunctMask; + memset(p_ssp_para_info, 0, sizeof(ssp_para_struct)); + 83f44000: 05200613 li a2,82 +{ + 83f44004: 842e mv s0,a1 + memset(p_ssp_para_info, 0, sizeof(ssp_para_struct)); + 83f44006: 0028 addi a0,sp,8 + 83f44008: 4581 li a1,0 +{ + 83f4400a: f486 sd ra,104(sp) + memset(p_ssp_para_info, 0, sizeof(ssp_para_struct)); + 83f4400c: 771070ef jal ra,83f4bf7c + ssp_para_info.para_agc_target_low = 72; + ssp_para_info.para_agc_vad_ena = 1; + ssp_para_info.para_notch_freq = 0; + ssp_para_info.para_spk_fun_config = 0; + ssp_para_info.para_spk_agc_max_gain = 0; + ssp_para_info.para_spk_agc_target_high = 8; + 83f44010: 004807b7 lui a5,0x480 + 83f44014: 07a1 addi a5,a5,8 + + + //update value from use layer + //ssp_para_info.para_sample_rate = pstVqeConfig->s32WorkSampleRate;//only support 8k and 16k + ssp_para_info.para_client_config = pstVqeConfig->para_client_config; + ssp_para_info.para_fun_config = pstVqeConfig->u32OpenMask; + 83f44016: 00442383 lw t2,4(s0) + //update aec config + ssp_para_info.para_aec_filter_len = pstVqeConfig->stAecCfg.para_aec_filter_len; + 83f4401a: 01045283 lhu t0,16(s0) + ssp_para_info.para_aes_std_thrd = pstVqeConfig->stAecCfg.para_aes_std_thrd; + 83f4401e: 01245f83 lhu t6,18(s0) + ssp_para_info.para_aes_supp_coeff = pstVqeConfig->stAecCfg.para_aes_supp_coeff; + 83f44022: 01445f03 lhu t5,20(s0) + //update nr config + ssp_para_info.para_nr_init_sile_time = pstVqeConfig->stAnrCfg.para_nr_init_sile_time; + 83f44026: 01a45e83 lhu t4,26(s0) + ssp_para_info.para_nr_snr_coeff = pstVqeConfig->stAnrCfg.para_nr_snr_coeff;; + 83f4402a: 01845e03 lhu t3,24(s0) + //update agc config + ssp_para_info.para_agc_max_gain = pstVqeConfig->stAgcCfg.para_agc_max_gain; + 83f4402e: 02040303 lb t1,32(s0) + ssp_para_info.para_agc_target_high = pstVqeConfig->stAgcCfg.para_agc_target_high;; + 83f44032: 02140883 lb a7,33(s0) + ssp_para_info.para_agc_target_low = pstVqeConfig->stAgcCfg.para_agc_target_low; + 83f44036: 02240803 lb a6,34(s0) + ssp_para_info.para_agc_vad_ena = pstVqeConfig->stAgcCfg.para_agc_vad_ena; + 83f4403a: 02344503 lbu a0,35(s0) + //udpate sw aec config + ssp_para_info.para_aec_init_filter_len = pstVqeConfig->stAecDelayCfg.para_aec_init_filter_len; + ssp_para_info.para_dg_target = pstVqeConfig->stAecDelayCfg.para_dg_target; + 83f4403e: 02a45603 lhu a2,42(s0) + ssp_para_info.para_delay_sample = pstVqeConfig->stAecDelayCfg.para_delay_sample; + 83f44042: 02c45683 lhu a3,44(s0) + //update notch filter setting for specific customer + ssp_para_info.para_notch_freq = pstVqeConfig->para_notch_freq;//only support 8k and 16k + 83f44046: 5858 lw a4,52(s0) + ssp_para_info.para_aec_init_filter_len = pstVqeConfig->stAecDelayCfg.para_aec_init_filter_len; + 83f44048: 02845583 lhu a1,40(s0) + ssp_para_info.para_spk_agc_target_high = 8; + 83f4404c: d83e sw a5,48(sp) + ssp_para_info.para_client_config = pstVqeConfig->para_client_config; + 83f4404e: 00045783 lhu a5,0(s0) + ssp_para_info.para_fun_config = pstVqeConfig->u32OpenMask; + 83f44052: 00711523 sh t2,10(sp) + ssp_para_info.para_aec_filter_len = pstVqeConfig->stAecCfg.para_aec_filter_len; + 83f44056: 00511923 sh t0,18(sp) + ssp_para_info.para_client_config = pstVqeConfig->para_client_config; + 83f4405a: 00f11423 sh a5,8(sp) + ssp_para_info.para_aes_std_thrd = pstVqeConfig->stAecCfg.para_aes_std_thrd; + 83f4405e: 01f11a23 sh t6,20(sp) + ssp_para_info.para_aes_supp_coeff = pstVqeConfig->stAecCfg.para_aes_supp_coeff; + 83f44062: 01e11b23 sh t5,22(sp) + ssp_para_info.para_nr_init_sile_time = pstVqeConfig->stAnrCfg.para_nr_init_sile_time; + 83f44066: 01d11c23 sh t4,24(sp) + ssp_para_info.para_nr_snr_coeff = pstVqeConfig->stAnrCfg.para_nr_snr_coeff;; + 83f4406a: 01c11d23 sh t3,26(sp) + ssp_para_info.para_agc_max_gain = pstVqeConfig->stAgcCfg.para_agc_max_gain; + 83f4406e: 00611e23 sh t1,28(sp) + ssp_para_info.para_agc_target_high = pstVqeConfig->stAgcCfg.para_agc_target_high;; + 83f44072: 01111f23 sh a7,30(sp) + ssp_para_info.para_agc_target_low = pstVqeConfig->stAgcCfg.para_agc_target_low; + 83f44076: 03011023 sh a6,32(sp) + ssp_para_info.para_agc_vad_ena = pstVqeConfig->stAgcCfg.para_agc_vad_ena; + 83f4407a: 02a10123 sb a0,34(sp) + ssp_para_info.para_dg_target = pstVqeConfig->stAecDelayCfg.para_dg_target; + 83f4407e: 00c11723 sh a2,14(sp) + ssp_para_info.para_delay_sample = pstVqeConfig->stAecDelayCfg.para_delay_sample; + 83f44082: 00d11623 sh a3,12(sp) + ssp_para_info.para_notch_freq = pstVqeConfig->para_notch_freq;//only support 8k and 16k + 83f44086: 02e11223 sh a4,36(sp) + ssp_para_info.para_spk_fun_config = 0; + 83f4408a: d602 sw zero,44(sp) + ssp_para_info.para_aec_init_filter_len = pstVqeConfig->stAecDelayCfg.para_aec_init_filter_len; + 83f4408c: 00b11823 sh a1,16(sp) + ssp_para_info.para_spk_agc_target_high = pstVqeConfig->stSpkCfg.para_spk_agc_target_high; + ssp_para_info.para_spk_agc_target_low = pstVqeConfig->stSpkCfg.para_spk_agc_target_low; + #endif + + + _handle = (void *)audio_ssp_init((void *)p_ssp_para_info, pstVqeConfig->s32WorkSampleRate); + 83f44090: 440c lw a1,8(s0) + 83f44092: 0028 addi a0,sp,8 + 83f44094: 0b0000ef jal ra,83f44144 + + + return (void *)_handle; + + +} + 83f44098: 70a6 ld ra,104(sp) + 83f4409a: 7406 ld s0,96(sp) + 83f4409c: 6165 addi sp,sp,112 + 83f4409e: 8082 ret + +0000000083f440a0 : + * Return: output samples + * Notes: sure insamps < MAXFRAMESIZE + **************************************************************************************/ +int CviAud_Algo_Process(void *pHandle, uint64_t mic_in, + uint64_t ref_in, uint64_t out, int iLength) +{ + 83f440a0: 1141 addi sp,sp,-16 + 83f440a2: e406 sd ra,8(sp) + 83f440a4: e022 sd s0,0(sp) +//TODO: step 3[ok] implement the function acquired + SSP_UNUSED_REF(iLength); + int ret = 0; + int s32RetTotalSamples = 0; + + if (pHandle == NULL) { + 83f440a6: c529 beqz a0,83f440f0 + printf("Null input [%s][%d]\n", __func__, __LINE__); + return -1; + } + + if (iLength != AEC_FRAME_LENGTH) { + 83f440a8: 0a000793 li a5,160 + 83f440ac: 843a mv s0,a4 + 83f440ae: 00f71a63 bne a4,a5,83f440c2 + printf("input length only support 160 samples[%s][%d]\n", __func__, __LINE__); + return -1; + } + + ret = audio_ssp_process(pHandle, mic_in, ref_in, out, AEC_FRAME_LENGTH); + 83f440b2: 40c000ef jal ra,83f444be + if (ret != 0) { + 83f440b6: e505 bnez a0,83f440de + } + s32RetTotalSamples = AEC_FRAME_LENGTH; + + return s32RetTotalSamples; + +} + 83f440b8: 60a2 ld ra,8(sp) + 83f440ba: 8522 mv a0,s0 + 83f440bc: 6402 ld s0,0(sp) + 83f440be: 0141 addi sp,sp,16 + 83f440c0: 8082 ret + printf("input length only support 160 samples[%s][%d]\n", __func__, __LINE__); + 83f440c2: 0c000613 li a2,192 + 83f440c6: 0000d597 auipc a1,0xd + 83f440ca: fc258593 addi a1,a1,-62 # 83f51088 <__func__.3> + 83f440ce: 0000d517 auipc a0,0xd + 83f440d2: f1a50513 addi a0,a0,-230 # 83f50fe8 <__func__.1+0x28> + 83f440d6: 6bf070ef jal ra,83f4bf94 + return -1; + 83f440da: 547d li s0,-1 + 83f440dc: bff1 j 83f440b8 + printf("audio_ssp_process error ret(%d).\n", ret); + 83f440de: 85aa mv a1,a0 + 83f440e0: 0000d517 auipc a0,0xd + 83f440e4: f3850513 addi a0,a0,-200 # 83f51018 <__func__.1+0x58> + 83f440e8: 6ad070ef jal ra,83f4bf94 + return -1; + 83f440ec: 547d li s0,-1 + 83f440ee: b7e9 j 83f440b8 + printf("Null input [%s][%d]\n", __func__, __LINE__); + 83f440f0: 0bb00613 li a2,187 + 83f440f4: 0000d597 auipc a1,0xd + 83f440f8: f9458593 addi a1,a1,-108 # 83f51088 <__func__.3> + 83f440fc: 0000d517 auipc a0,0xd + 83f44100: ed450513 addi a0,a0,-300 # 83f50fd0 <__func__.1+0x10> + 83f44104: 691070ef jal ra,83f4bf94 + return -1; + 83f44108: 547d li s0,-1 + 83f4410a: b77d j 83f440b8 + +0000000083f4410c : + * Outputs: none + * + * Return: CVI_SUCCESS / CVI_FAILURE + **************************************************************************************/ +void CviAud_Algo_DeInit(void *pHandle) +{ + 83f4410c: 1141 addi sp,sp,-16 + 83f4410e: e406 sd ra,8(sp) + + //VQE_UNUSED_REF(pHandle); + //struct st3AInfo *pst3Ainfo = (struct st3AInfo *)pHandle; + + if (audio_ssp_deinit(pHandle) != 0) { + 83f44110: 093000ef jal ra,83f449a2 + 83f44114: e501 bnez a0,83f4411c + CVIAUD_NOTCH_ERR_PRINTF("3a deinit err\n"); + return; + } + +} + 83f44116: 60a2 ld ra,8(sp) + 83f44118: 0141 addi sp,sp,16 + 83f4411a: 8082 ret + CVIAUD_NOTCH_ERR_PRINTF("3a deinit err\n"); + 83f4411c: 0000f797 auipc a5,0xf + 83f44120: 0a07a783 lw a5,160(a5) # 83f531bc + 83f44124: fef059e3 blez a5,83f44116 +} + 83f44128: 60a2 ld ra,8(sp) + CVIAUD_NOTCH_ERR_PRINTF("3a deinit err\n"); + 83f4412a: 0e000613 li a2,224 + 83f4412e: 0000d597 auipc a1,0xd + 83f44132: f4258593 addi a1,a1,-190 # 83f51070 <__func__.2> + 83f44136: 0000d517 auipc a0,0xd + 83f4413a: f0a50513 addi a0,a0,-246 # 83f51040 <__func__.1+0x80> +} + 83f4413e: 0141 addi sp,sp,16 + CVIAUD_NOTCH_ERR_PRINTF("3a deinit err\n"); + 83f44140: 6550706f j 83f4bf94 + +0000000083f44144 : + return 0; +} +#endif + +void *audio_ssp_init(void *para_obj, unsigned int sample_rate) +{ + 83f44144: 7179 addi sp,sp,-48 + 83f44146: e84a sd s2,16(sp) + you will experience strange bugs */ +#ifndef PLATFORM_RTOS + return calloc(size,1); +#else + //return (void *)calloc(size,1); + uintptr_t *ptr = pvPortMalloc(size); + 83f44148: 6905 lui s2,0x1 + 83f4414a: e44e sd s3,8(sp) + 83f4414c: 89aa mv s3,a0 + 83f4414e: 03090513 addi a0,s2,48 # 1030 <_EL1_STACK_SIZE+0x830> + 83f44152: f022 sd s0,32(sp) + 83f44154: ec26 sd s1,24(sp) + 83f44156: f406 sd ra,40(sp) + 83f44158: 84ae mv s1,a1 + 83f4415a: 42a0a0ef jal ra,83f4e584 + 83f4415e: 842a mv s0,a0 + + memset(ptr, 0, size); + 83f44160: 03090613 addi a2,s2,48 + 83f44164: 4581 li a1,0 + 83f44166: 617070ef jal ra,83f4bf7c + pst3Ainfo = (struct st3AInfo *)malloc(sizeof(struct st3AInfo)); +#else + //pst3Ainfo = (struct st3AInfo *)pvPortMalloc(sizeof(struct st3AInfo)); + pst3Ainfo = (struct st3AInfo *)mem_alloc(sizeof(struct st3AInfo)); +#endif + if(NULL == pst3Ainfo) + 83f4416a: 30040463 beqz s0,83f44472 + { + LOG_ERROR("malloc failed.aec init failed.\n"); + return NULL; + } + + memset(pst3Ainfo,0,sizeof(struct st3AInfo)); + 83f4416e: 03090613 addi a2,s2,48 + 83f44172: 4581 li a1,0 + 83f44174: 8522 mv a0,s0 + 83f44176: 607070ef jal ra,83f4bf7c + memcpy(&pst3Ainfo->para_obj,para_info,sizeof(ssp_para_struct)); + 83f4417a: 06440913 addi s2,s0,100 + 83f4417e: 05200613 li a2,82 + 83f44182: 85ce mv a1,s3 + 83f44184: 854a mv a0,s2 + 83f44186: f7bfb0ef jal ra,83f40100 + pst3Ainfo->fs = sample_rate;// pst3Ainfo->para_obj.para_sample_rate; + 83f4418a: d014f7d3 fcvt.s.wu fa5,s1 + + //printf("[SSP_VER20220128]user setting config param------dump---start\n"); + printf("[SSP_VER20220128]sample_rate:%d.\n", (int)pst3Ainfo->fs); + 83f4418e: 0000d517 auipc a0,0xd + 83f44192: f4250513 addi a0,a0,-190 # 83f510d0 <__func__.3+0x48> + 83f44196: c00795d3 fcvt.w.s a1,fa5,rtz + pst3Ainfo->fs = sample_rate;// pst3Ainfo->para_obj.para_sample_rate; + 83f4419a: 06f42027 fsw fa5,96(s0) + printf("[SSP_VER20220128]sample_rate:%d.\n", (int)pst3Ainfo->fs); + 83f4419e: 2581 sext.w a1,a1 + 83f441a0: 5f5070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_client_config:%d.\n", pst3Ainfo->para_obj.para_client_config); + 83f441a4: 06445583 lhu a1,100(s0) + 83f441a8: 0000d517 auipc a0,0xd + 83f441ac: f5050513 addi a0,a0,-176 # 83f510f8 <__func__.3+0x70> + 83f441b0: 5e5070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_fun_config:%d.\n", pst3Ainfo->para_obj.para_fun_config); + 83f441b4: 06645583 lhu a1,102(s0) + 83f441b8: 0000d517 auipc a0,0xd + 83f441bc: f7050513 addi a0,a0,-144 # 83f51128 <__func__.3+0xa0> + 83f441c0: 5d5070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_delay_sample:%d.\n", pst3Ainfo->para_obj.para_delay_sample); + 83f441c4: 06845583 lhu a1,104(s0) + 83f441c8: 0000d517 auipc a0,0xd + 83f441cc: f8850513 addi a0,a0,-120 # 83f51150 <__func__.3+0xc8> + 83f441d0: 5c5070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_dg_target:%d.\n", pst3Ainfo->para_obj.para_dg_target); + 83f441d4: 06a45583 lhu a1,106(s0) + 83f441d8: 0000d517 auipc a0,0xd + 83f441dc: fa050513 addi a0,a0,-96 # 83f51178 <__func__.3+0xf0> + 83f441e0: 5b5070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_aec_init_filter_len:%d.\n", pst3Ainfo->para_obj.para_aec_init_filter_len); + 83f441e4: 06c45583 lhu a1,108(s0) + 83f441e8: 0000d517 auipc a0,0xd + 83f441ec: fb850513 addi a0,a0,-72 # 83f511a0 <__func__.3+0x118> + 83f441f0: 5a5070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_aec_filter_len:%d.\n", pst3Ainfo->para_obj.para_aec_filter_len); + 83f441f4: 06e45583 lhu a1,110(s0) + 83f441f8: 0000d517 auipc a0,0xd + 83f441fc: fd850513 addi a0,a0,-40 # 83f511d0 <__func__.3+0x148> + 83f44200: 595070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_aes_std_thrd:%d.\n", pst3Ainfo->para_obj.para_aes_std_thrd); + 83f44204: 07045583 lhu a1,112(s0) + 83f44208: 0000d517 auipc a0,0xd + 83f4420c: ff850513 addi a0,a0,-8 # 83f51200 <__func__.3+0x178> + 83f44210: 585070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_aes_supp_coeff:%d.\n", pst3Ainfo->para_obj.para_aes_supp_coeff); + 83f44214: 07245583 lhu a1,114(s0) + 83f44218: 0000d517 auipc a0,0xd + 83f4421c: 01050513 addi a0,a0,16 # 83f51228 <__func__.3+0x1a0> + 83f44220: 575070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_nr_init_sile_time:%d.\n", pst3Ainfo->para_obj.para_nr_init_sile_time); + 83f44224: 07445583 lhu a1,116(s0) + 83f44228: 0000d517 auipc a0,0xd + 83f4422c: 03050513 addi a0,a0,48 # 83f51258 <__func__.3+0x1d0> + 83f44230: 565070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_nr_snr_coeff:%d.\n", pst3Ainfo->para_obj.para_nr_snr_coeff); + 83f44234: 07645583 lhu a1,118(s0) + 83f44238: 0000d517 auipc a0,0xd + 83f4423c: 05050513 addi a0,a0,80 # 83f51288 <__func__.3+0x200> + 83f44240: 555070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_agc_max_gain:%d.\n", pst3Ainfo->para_obj.para_agc_max_gain); + 83f44244: 07845583 lhu a1,120(s0) + 83f44248: 0000d517 auipc a0,0xd + 83f4424c: 06850513 addi a0,a0,104 # 83f512b0 <__func__.3+0x228> + 83f44250: 545070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_agc_target_high:%d.\n", pst3Ainfo->para_obj.para_agc_target_high); + 83f44254: 07a45583 lhu a1,122(s0) + 83f44258: 0000d517 auipc a0,0xd + 83f4425c: 08050513 addi a0,a0,128 # 83f512d8 <__func__.3+0x250> + 83f44260: 535070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_agc_target_low:%d.\n", pst3Ainfo->para_obj.para_agc_target_low); + 83f44264: 07c45583 lhu a1,124(s0) + 83f44268: 0000d517 auipc a0,0xd + 83f4426c: 0a050513 addi a0,a0,160 # 83f51308 <__func__.3+0x280> + 83f44270: 525070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_agc_vad_ena:%d.\n", pst3Ainfo->para_obj.para_agc_vad_ena); + 83f44274: 07e44583 lbu a1,126(s0) + 83f44278: 0000d517 auipc a0,0xd + 83f4427c: 0c050513 addi a0,a0,192 # 83f51338 <__func__.3+0x2b0> + 83f44280: 515070ef jal ra,83f4bf94 + printf("[SSP_VER20220128]para_notch_freq:%d.\n", pst3Ainfo->para_obj.para_notch_freq); + 83f44284: 08045583 lhu a1,128(s0) + 83f44288: 0000d517 auipc a0,0xd + 83f4428c: 0d850513 addi a0,a0,216 # 83f51360 <__func__.3+0x2d8> + 83f44290: 505070ef jal ra,83f4bf94 + //printf("[SSP_VER20220128]user setting config param------dump---end\n"); + + //TODO: check ssp init with ssp_main.c + //reference from ssp_main.c + cond1 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + 83f44294: 06641783 lh a5,102(s0) + if (cond1) { + 83f44298: 0807f713 andi a4,a5,128 + 83f4429c: 1c071163 bnez a4,83f4445e + delay_para(&pst3Ainfo->para_obj); + pst3Ainfo->delay_state = delay_init(&pst3Ainfo->para_obj); + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + 83f442a0: 0407f713 andi a4,a5,64 + 83f442a4: 1a071563 bnez a4,83f4444e + DG_para(&pst3Ainfo->dg_obj, &pst3Ainfo->para_obj); + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + 83f442a8: 0207f713 andi a4,a5,32 + 83f442ac: 18071863 bnez a4,83f4443c + DC_remover_init(&pst3Ainfo->dc_obj, pst3Ainfo->fs); + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + 83f442b0: 0107f713 andi a4,a5,16 + 83f442b4: 16071463 bnez a4,83f4441c + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + + if (cond1 | cond2) { + 83f442b8: 0037f713 andi a4,a5,3 + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + 83f442bc: 0027f493 andi s1,a5,2 + if (cond1 | cond2) { + 83f442c0: e76d bnez a4,83f443aa + LP_AEC_para(&pst3Ainfo->para_obj, &pst3Ainfo->filter_length, &pst3Ainfo->init_filter_length); + pst3Ainfo->aec_state = LP_AEC_init(AEC_FRAME_LENGTH, pst3Ainfo->filter_length, + pst3Ainfo->init_filter_length, pst3Ainfo->fs); + } + if (cond2) { + 83f442c2: 10049863 bnez s1,83f443d2 + &pst3Ainfo->aes_supp_coef2); + pst3Ainfo->aes_state = NLP_AES_init(AEC_FRAME_LENGTH, pst3Ainfo->fs, pst3Ainfo->std_thrd, + pst3Ainfo->aes_supp_coef1, pst3Ainfo->aes_supp_coef2); + pst3Ainfo->aes_state->echo_state = pst3Ainfo->aec_state; + } + if (!(pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE)) { + 83f442c6: 06645783 lhu a5,102(s0) + 83f442ca: 0087f713 andi a4,a5,8 + 83f442ce: cf29 beqz a4,83f44328 + /* add fool-proof design for parameter configuration */ + pst3Ainfo->para_obj.para_agc_vad_ena = 0; + } + cond1 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + cond2 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + if (cond1 | (cond2 && pst3Ainfo->para_obj.para_agc_vad_ena)) { + 83f442d0: 0087f713 andi a4,a5,8 + 83f442d4: 8b91 andi a5,a5,4 + 83f442d6: cf29 beqz a4,83f44330 + 83f442d8: 07e44703 lbu a4,126(s0) + 83f442dc: 12070463 beqz a4,83f44404 + NR_para(&pst3Ainfo->para_obj, &pst3Ainfo->aa, &pst3Ainfo->mu); + 83f442e0: 0bc40613 addi a2,s0,188 + 83f442e4: 0b840593 addi a1,s0,184 + 83f442e8: 854a mv a0,s2 + 83f442ea: 0d8030ef jal ra,83f473c2 + pst3Ainfo->nr_state = NR_init(AEC_FRAME_LENGTH, pst3Ainfo->fs, pst3Ainfo->aa, pst3Ainfo->mu); + 83f442ee: 0bc42607 flw fa2,188(s0) + 83f442f2: 0b842587 flw fa1,184(s0) + 83f442f6: 06042507 flw fa0,96(s0) + 83f442fa: 0a000513 li a0,160 + 83f442fe: 1e0030ef jal ra,83f474de + 83f44302: e068 sd a0,192(s0) + } + if (cond2) { + AGC_para(&pst3Ainfo->agc_obj, &pst3Ainfo->para_obj, 1); + 83f44304: 6485 lui s1,0x1 + 83f44306: 14c1 addi s1,s1,-16 + 83f44308: 94a2 add s1,s1,s0 + 83f4430a: 85ca mv a1,s2 + 83f4430c: 8526 mv a0,s1 + 83f4430e: 4605 li a2,1 + 83f44310: 4ae050ef jal ra,83f497be + AGC_init(&pst3Ainfo->agc_obj, &pst3Ainfo->para_obj, pst3Ainfo->fs, AEC_FRAME_LENGTH, 1); + 83f44314: 06042507 flw fa0,96(s0) + 83f44318: 4685 li a3,1 + 83f4431a: 0a000613 li a2,160 + 83f4431e: 85ca mv a1,s2 + 83f44320: 8526 mv a0,s1 + 83f44322: 40e050ef jal ra,83f49730 + 83f44326: a039 j 83f44334 + pst3Ainfo->para_obj.para_agc_vad_ena = 0; + 83f44328: 06040f23 sb zero,126(s0) + if (cond1 | (cond2 && pst3Ainfo->para_obj.para_agc_vad_ena)) { + 83f4432c: 8b91 andi a5,a5,4 + 83f4432e: eb79 bnez a4,83f44404 + 83f44330: 16079463 bnez a5,83f44498 + pst3Ainfo->speech_vad = true; + pst3Ainfo->st_vad = false; /* default */ + pst3Ainfo->frame = 1.0F; + pst3Ainfo->nenr_silence_cnt = 0; + + pst3Ainfo->para_obj.para_nr_init_sile_time = MIN(MAX(pst3Ainfo->para_obj.para_nr_init_sile_time, 0), 250); + 83f44334: 07445783 lhu a5,116(s0) + pst3Ainfo->frame = 1.0F; + 83f44338: 0000e717 auipc a4,0xe + 83f4433c: f1872787 flw fa5,-232(a4) # 83f52250 <__func__.1+0x58> + pst3Ainfo->speech_vad = true; + 83f44340: 4705 li a4,1 + pst3Ainfo->para_obj.para_nr_init_sile_time = MIN(MAX(pst3Ainfo->para_obj.para_nr_init_sile_time, 0), 250); + 83f44342: 03079693 slli a3,a5,0x30 + pst3Ainfo->speech_vad = true; + 83f44346: 22e40023 sb a4,544(s0) + pst3Ainfo->st_vad = false; /* default */ + 83f4434a: 0c040823 sb zero,208(s0) + pst3Ainfo->frame = 1.0F; + 83f4434e: 22f42227 fsw fa5,548(s0) + pst3Ainfo->nenr_silence_cnt = 0; + 83f44352: 0c042623 sw zero,204(s0) + pst3Ainfo->para_obj.para_nr_init_sile_time = MIN(MAX(pst3Ainfo->para_obj.para_nr_init_sile_time, 0), 250); + 83f44356: 92c1 srli a3,a3,0x30 + 83f44358: 0fa00713 li a4,250 + 83f4435c: 00d77463 bgeu a4,a3,83f44364 + 83f44360: 0fa00793 li a5,250 + if (pst3Ainfo->fs == 16000.0F) { + 83f44364: 06042707 flw fa4,96(s0) + 83f44368: 0000e717 auipc a4,0xe + 83f4436c: eec72787 flw fa5,-276(a4) # 83f52254 <__func__.1+0x5c> + pst3Ainfo->para_obj.para_nr_init_sile_time = MIN(MAX(pst3Ainfo->para_obj.para_nr_init_sile_time, 0), 250); + 83f44370: 06f41a23 sh a5,116(s0) + if (pst3Ainfo->fs == 16000.0F) { + 83f44374: a0f72753 feq.s a4,fa4,fa5 + pst3Ainfo->initial_noise_pow_time = 14; + pst3Ainfo->nenr_silence_time = pst3Ainfo->para_obj.para_nr_init_sile_time*2; + 83f44378: 17c2 slli a5,a5,0x30 + 83f4437a: 93c1 srli a5,a5,0x30 + if (pst3Ainfo->fs == 16000.0F) { + 83f4437c: c759 beqz a4,83f4440a + pst3Ainfo->initial_noise_pow_time = 14; + 83f4437e: 0000e717 auipc a4,0xe + 83f44382: eda72787 flw fa5,-294(a4) # 83f52258 <__func__.1+0x60> + pst3Ainfo->nenr_silence_time = pst3Ainfo->para_obj.para_nr_init_sile_time*2; + 83f44386: 0017979b slliw a5,a5,0x1 + pst3Ainfo->initial_noise_pow_time = 14; + 83f4438a: 22f42427 fsw fa5,552(s0) + pst3Ainfo->nenr_silence_time = pst3Ainfo->para_obj.para_nr_init_sile_time*2; + 83f4438e: 0cf42423 sw a5,200(s0) + } else { + pst3Ainfo->initial_noise_pow_time = 7; + pst3Ainfo->nenr_silence_time = pst3Ainfo->para_obj.para_nr_init_sile_time; + } + + pst3Ainfo->bInitOk = true; + 83f44392: 6785 lui a5,0x1 + 83f44394: 97a2 add a5,a5,s0 + 83f44396: 4705 li a4,1 + 83f44398: d798 sw a4,40(a5) + + return (void *)pst3Ainfo; +} + 83f4439a: 70a2 ld ra,40(sp) + 83f4439c: 8522 mv a0,s0 + 83f4439e: 7402 ld s0,32(sp) + 83f443a0: 64e2 ld s1,24(sp) + 83f443a2: 6942 ld s2,16(sp) + 83f443a4: 69a2 ld s3,8(sp) + 83f443a6: 6145 addi sp,sp,48 + 83f443a8: 8082 ret + LP_AEC_para(&pst3Ainfo->para_obj, &pst3Ainfo->filter_length, &pst3Ainfo->init_filter_length); + 83f443aa: 05a40613 addi a2,s0,90 + 83f443ae: 05840593 addi a1,s0,88 + 83f443b2: 854a mv a0,s2 + 83f443b4: 2c9000ef jal ra,83f44e7c + pst3Ainfo->aec_state = LP_AEC_init(AEC_FRAME_LENGTH, pst3Ainfo->filter_length, + 83f443b8: 06042507 flw fa0,96(s0) + 83f443bc: 05a41603 lh a2,90(s0) + 83f443c0: 05841583 lh a1,88(s0) + 83f443c4: 0a000513 li a0,160 + 83f443c8: 2f7000ef jal ra,83f44ebe + 83f443cc: e428 sd a0,72(s0) + if (cond2) { + 83f443ce: ee048ce3 beqz s1,83f442c6 + NLP_AES_para(&pst3Ainfo->para_obj, &pst3Ainfo->std_thrd, &pst3Ainfo->aes_supp_coef1, + 83f443d2: 21840693 addi a3,s0,536 + 83f443d6: 21440613 addi a2,s0,532 + 83f443da: 21c40593 addi a1,s0,540 + 83f443de: 854a mv a0,s2 + 83f443e0: 43a030ef jal ra,83f4781a + pst3Ainfo->aes_state = NLP_AES_init(AEC_FRAME_LENGTH, pst3Ainfo->fs, pst3Ainfo->std_thrd, + 83f443e4: 21842687 flw fa3,536(s0) + 83f443e8: 21442607 flw fa2,532(s0) + 83f443ec: 21c42587 flw fa1,540(s0) + 83f443f0: 06042507 flw fa0,96(s0) + 83f443f4: 0a000513 li a0,160 + 83f443f8: 498030ef jal ra,83f47890 + pst3Ainfo->aes_state->echo_state = pst3Ainfo->aec_state; + 83f443fc: 643c ld a5,72(s0) + pst3Ainfo->aes_state = NLP_AES_init(AEC_FRAME_LENGTH, pst3Ainfo->fs, pst3Ainfo->std_thrd, + 83f443fe: e828 sd a0,80(s0) + pst3Ainfo->aes_state->echo_state = pst3Ainfo->aec_state; + 83f44400: ed1c sd a5,24(a0) + 83f44402: b5d1 j 83f442c6 + if (cond1 | (cond2 && pst3Ainfo->para_obj.para_agc_vad_ena)) { + 83f44404: f00780e3 beqz a5,83f44304 + 83f44408: bde1 j 83f442e0 + pst3Ainfo->initial_noise_pow_time = 7; + 83f4440a: 0000e717 auipc a4,0xe + 83f4440e: e5272787 flw fa5,-430(a4) # 83f5225c <__func__.1+0x64> + 83f44412: 22f42427 fsw fa5,552(s0) + pst3Ainfo->nenr_silence_time = pst3Ainfo->para_obj.para_nr_init_sile_time; + 83f44416: 0cf42423 sw a5,200(s0) + 83f4441a: bfa5 j 83f44392 + notch_para(&pst3Ainfo->notch_obj, &pst3Ainfo->para_obj, pst3Ainfo->fs); + 83f4441c: 06042507 flw fa0,96(s0) + 83f44420: 02040493 addi s1,s0,32 + 83f44424: 85ca mv a1,s2 + 83f44426: 8526 mv a0,s1 + 83f44428: 263040ef jal ra,83f48e8a + notch_init(&pst3Ainfo->notch_obj, pst3Ainfo->notch_state); + 83f4442c: 03840593 addi a1,s0,56 + 83f44430: 8526 mv a0,s1 + 83f44432: 2a1040ef jal ra,83f48ed2 + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + 83f44436: 06641783 lh a5,102(s0) + 83f4443a: bdbd j 83f442b8 + DC_remover_init(&pst3Ainfo->dc_obj, pst3Ainfo->fs); + 83f4443c: 06042507 flw fa0,96(s0) + 83f44440: 01040513 addi a0,s0,16 + 83f44444: 63c000ef jal ra,83f44a80 + cond1 = pst3Ainfo->para_obj.para_fun_config & NOTCH_ENABLE; + 83f44448: 06641783 lh a5,102(s0) + 83f4444c: b595 j 83f442b0 + DG_para(&pst3Ainfo->dg_obj, &pst3Ainfo->para_obj); + 83f4444e: 85ca mv a1,s2 + 83f44450: 00840513 addi a0,s0,8 + 83f44454: 08d000ef jal ra,83f44ce0 + cond1 = pst3Ainfo->para_obj.para_fun_config & DCREMOVER_ENABLE; + 83f44458: 06641783 lh a5,102(s0) + 83f4445c: b5b1 j 83f442a8 + delay_para(&pst3Ainfo->para_obj); + 83f4445e: 854a mv a0,s2 + 83f44460: 76c000ef jal ra,83f44bcc + pst3Ainfo->delay_state = delay_init(&pst3Ainfo->para_obj); + 83f44464: 854a mv a0,s2 + 83f44466: 78c000ef jal ra,83f44bf2 + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + 83f4446a: 06641783 lh a5,102(s0) + pst3Ainfo->delay_state = delay_init(&pst3Ainfo->para_obj); + 83f4446e: e008 sd a0,0(s0) + 83f44470: bd05 j 83f442a0 + LOG_ERROR("malloc failed.aec init failed.\n"); + 83f44472: 0000f797 auipc a5,0xf + 83f44476: d4e7a783 lw a5,-690(a5) # 83f531c0 + 83f4447a: f2f050e3 blez a5,83f4439a + 83f4447e: 0e500613 li a2,229 + 83f44482: 0000d597 auipc a1,0xd + 83f44486: 03e58593 addi a1,a1,62 # 83f514c0 <__func__.4> + 83f4448a: 0000d517 auipc a0,0xd + 83f4448e: c1650513 addi a0,a0,-1002 # 83f510a0 <__func__.3+0x18> + 83f44492: 303070ef jal ra,83f4bf94 + 83f44496: b711 j 83f4439a + NR_para(&pst3Ainfo->para_obj, &pst3Ainfo->aa, &pst3Ainfo->mu); + 83f44498: 0bc40613 addi a2,s0,188 + 83f4449c: 0b840593 addi a1,s0,184 + 83f444a0: 854a mv a0,s2 + 83f444a2: 721020ef jal ra,83f473c2 + pst3Ainfo->nr_state = NR_init(AEC_FRAME_LENGTH, pst3Ainfo->fs, pst3Ainfo->aa, pst3Ainfo->mu); + 83f444a6: 0bc42607 flw fa2,188(s0) + 83f444aa: 0b842587 flw fa1,184(s0) + 83f444ae: 06042507 flw fa0,96(s0) + 83f444b2: 0a000513 li a0,160 + 83f444b6: 028030ef jal ra,83f474de + 83f444ba: e068 sd a0,192(s0) + if (cond2) { + 83f444bc: bda5 j 83f44334 + +0000000083f444be : + + + +int audio_ssp_process(void *handle, short *mic_in, short *ref_in, short *dataout, int iLength) +{ + 83f444be: 715d addi sp,sp,-80 + 83f444c0: e486 sd ra,72(sp) + 83f444c2: e0a2 sd s0,64(sp) + 83f444c4: fc26 sd s1,56(sp) + 83f444c6: f84a sd s2,48(sp) + 83f444c8: f44e sd s3,40(sp) + 83f444ca: f052 sd s4,32(sp) + 83f444cc: ec56 sd s5,24(sp) + int nFFT = 2*len; + float alpha, alpha2; + float tmp1 = 0.0; + struct st3AInfo *pst3Ainfo = (struct st3AInfo *)handle; + + if (!pst3Ainfo) { + 83f444ce: 4c050263 beqz a0,83f44992 + printf("[error]audio_ssp_process error.\n"); + return -1; + } + + if(!(pst3Ainfo && pst3Ainfo->bInitOk)) + 83f444d2: 6785 lui a5,0x1 + 83f444d4: 97aa add a5,a5,a0 + 83f444d6: 579c lw a5,40(a5) + 83f444d8: 84aa mv s1,a0 + 83f444da: 4a078463 beqz a5,83f44982 + { + printf("[error]audio_ssp_process error params.\n"); + return -1; + } + + if(iLength != 160) + 83f444de: 0a000793 li a5,160 + 83f444e2: 48f71863 bne a4,a5,83f44972 + 83f444e6: 892e mv s2,a1 + 83f444e8: 89b2 mv s3,a2 + 83f444ea: 8436 mv s0,a3 + { + printf("[error]audio_ssp_process parameter len must be 160 frames.\n"); + return -1; + } + if(!(mic_in || dataout)) + 83f444ec: c5f5 beqz a1,83f445d8 + { + printf("[error]audio_ssp_process NULL parameers.\n"); + return -2; + } + if (ref_in == NULL) { + 83f444ee: 18098e63 beqz s3,83f4468a + //printf("[v]ref_in null\n"); + pst3Ainfo->para_obj.para_fun_config &= (~(LP_AEC_ENABLE | NLP_AES_ENABLE)); + } + //port from ssp_main.c + //printf("[v]pst3Ainfo->para_obj.para_fun_config[%x]\n", pst3Ainfo->para_obj.para_fun_config); + if (pst3Ainfo->para_obj.para_client_config == 2) { + 83f444f2: 0644d703 lhu a4,100(s1) # 1064 <_EL1_STACK_SIZE+0x864> + 83f444f6: 4789 li a5,2 + 83f444f8: 0ef70c63 beq a4,a5,83f445f0 + mic_in[i] = ROUND_POS(((float)(mic_in[i])/(float)(32768.0F) * 0.5F)*(short)(32767)); + } + } + + + if(!(pst3Ainfo->para_obj.para_fun_config)) { + 83f444fc: 0664d783 lhu a5,102(s1) + 83f44500: cbdd beqz a5,83f445b6 + for(i=0;i< hopsize;i++) + dataout[i]=mic_in[i]; + } else { + /* Delay ref signal, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + if (cond1) { + 83f44502: 0807f713 andi a4,a5,128 + cond1 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + 83f44506: 0107979b slliw a5,a5,0x10 + 83f4450a: 4107d79b sraiw a5,a5,0x10 + if (cond1) { + 83f4450e: 38071763 bnez a4,83f4489c + delay_ref(ref_in, pst3Ainfo->delay_state, hopsize); + } + + /* Apply DG, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + 83f44512: 0407f713 andi a4,a5,64 + 83f44516: 36071863 bnez a4,83f44886 + apply_DG(mic_in, mic_in, &pst3Ainfo->dg_obj, hopsize); + } + + /* DC filter, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + 83f4451a: 0207f713 andi a4,a5,32 + 83f4451e: 34071963 bnez a4,83f44870 + DC_remover(mic_in, mic_in, &pst3Ainfo->dc_obj, hopsize); + } + + /* Notch filter, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + 83f44522: 0107f713 andi a4,a5,16 + 83f44526: 32071a63 bnez a4,83f4485a + } + + /* Linear AEC, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + if (cond1 | cond2) { + 83f4452a: 0037f713 andi a4,a5,3 + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + 83f4452e: 0027fa13 andi s4,a5,2 + if (cond1 | cond2) { + 83f44532: 2c071e63 bnez a4,83f4480e + mic_in[i] = dataout[i]; + } + + cond3 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + cond4 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + if (!(cond2 | cond3 | cond4)) { + 83f44536: 00c7f713 andi a4,a5,12 + 83f4453a: 00ea6733 or a4,s4,a4 + cond3 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + 83f4453e: 0047fa93 andi s5,a5,4 + cond4 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + 83f44542: 0087f993 andi s3,a5,8 + if (!(cond2 | cond3 | cond4)) { + 83f44546: 16071163 bnez a4,83f446a8 + /* Compensate DG frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + 83f4454a: 0407f793 andi a5,a5,64 + 83f4454e: 28079263 bnez a5,83f447d2 + 83f44552: 85ca mv a1,s2 + 83f44554: 86a2 mv a3,s0 + 83f44556: 14090713 addi a4,s2,320 + compen_DG(mic_in, mic_in, &pst3Ainfo->dg_obj, hopsize); + } + for (i = 0; i < hopsize; i++) + dataout[i] = mic_in[i]; /* save MCPS if NR+AES+AGC off */ + 83f4455a: 00059783 lh a5,0(a1) + for (i = 0; i < hopsize; i++) + 83f4455e: 0589 addi a1,a1,2 + 83f44560: 0689 addi a3,a3,2 + dataout[i] = mic_in[i]; /* save MCPS if NR+AES+AGC off */ + 83f44562: fef69f23 sh a5,-2(a3) + for (i = 0; i < hopsize; i++) + 83f44566: feb71ae3 bne a4,a1,83f4455a + //printf("[v]AGC_out[0x%x][0x%x]\n", dataout[0], dataout[1]); + } + } + } + + if (pst3Ainfo->nenr_silence_cnt < pst3Ainfo->nenr_silence_time) + 83f4456a: 0cc4a883 lw a7,204(s1) + 83f4456e: 0c84a803 lw a6,200(s1) + 83f44572: 0708dc63 bge a7,a6,83f445ea + pst3Ainfo->nenr_silence_cnt += 1; + 83f44576: 0018879b addiw a5,a7,1 + 83f4457a: 0cf4a623 sw a5,204(s1) + pst3Ainfo->frame += 1; + else + pst3Ainfo->frame = pst3Ainfo->initial_noise_pow_time + 1; + } + + return 0; + 83f4457e: 4501 li a0,0 + if (pst3Ainfo->nenr_silence_cnt > pst3Ainfo->nenr_silence_time) { + 83f44580: 02f85263 bge a6,a5,83f445a4 + if (pst3Ainfo->frame < pst3Ainfo->initial_noise_pow_time) /* avoid overflow, 140ms */ + 83f44584: 2244a707 flw fa4,548(s1) + 83f44588: 2284a787 flw fa5,552(s1) + 83f4458c: a0f717d3 flt.s a5,fa4,fa5 + 83f44590: 10078363 beqz a5,83f44696 + pst3Ainfo->frame += 1; + 83f44594: 0000e797 auipc a5,0xe + 83f44598: cbc7a787 flw fa5,-836(a5) # 83f52250 <__func__.1+0x58> + 83f4459c: 00f77753 fadd.s fa4,fa4,fa5 + 83f445a0: 22e4a227 fsw fa4,548(s1) +} + 83f445a4: 60a6 ld ra,72(sp) + 83f445a6: 6406 ld s0,64(sp) + 83f445a8: 74e2 ld s1,56(sp) + 83f445aa: 7942 ld s2,48(sp) + 83f445ac: 79a2 ld s3,40(sp) + 83f445ae: 7a02 ld s4,32(sp) + 83f445b0: 6ae2 ld s5,24(sp) + 83f445b2: 6161 addi sp,sp,80 + 83f445b4: 8082 ret + 83f445b6: 85ca mv a1,s2 + 83f445b8: 86a2 mv a3,s0 + 83f445ba: 14090713 addi a4,s2,320 + dataout[i]=mic_in[i]; + 83f445be: 00059783 lh a5,0(a1) + for(i=0;i< hopsize;i++) + 83f445c2: 0589 addi a1,a1,2 + 83f445c4: 0689 addi a3,a3,2 + dataout[i]=mic_in[i]; + 83f445c6: fef69f23 sh a5,-2(a3) + for(i=0;i< hopsize;i++) + 83f445ca: feb71ae3 bne a4,a1,83f445be + if (pst3Ainfo->nenr_silence_cnt < pst3Ainfo->nenr_silence_time) + 83f445ce: 0cc4a883 lw a7,204(s1) + 83f445d2: 0c84a803 lw a6,200(s1) + 83f445d6: bf71 j 83f44572 + if(!(mic_in || dataout)) + 83f445d8: fa99 bnez a3,83f444ee + printf("[error]audio_ssp_process NULL parameers.\n"); + 83f445da: 0000d517 auipc a0,0xd + 83f445de: e3e50513 addi a0,a0,-450 # 83f51418 <__func__.3+0x390> + 83f445e2: 1b3070ef jal ra,83f4bf94 + return -2; + 83f445e6: 5579 li a0,-2 + 83f445e8: bf75 j 83f445a4 + pst3Ainfo->nenr_silence_cnt = pst3Ainfo->nenr_silence_time + 1; /* avoid overflow */ + 83f445ea: 0018079b addiw a5,a6,1 + 83f445ee: b771 j 83f4457a + 83f445f0: 7661 lui a2,0xffff8 + 83f445f2: 6521 lui a0,0x8 + 83f445f4: 87ce mv a5,s3 + 83f445f6: 874a mv a4,s2 + 83f445f8: 14098593 addi a1,s3,320 + 83f445fc: 0000e697 auipc a3,0xe + 83f44600: c646a687 flw fa3,-924(a3) # 83f52260 <__func__.1+0x68> + 83f44604: 0000e697 auipc a3,0xe + 83f44608: c606a507 flw fa0,-928(a3) # 83f52264 <__func__.1+0x6c> + 83f4460c: 0000e697 auipc a3,0xe + 83f44610: c5c6a607 flw fa2,-932(a3) # 83f52268 <__func__.1+0x70> + 83f44614: 0000e697 auipc a3,0xe + 83f44618: c586a587 flw fa1,-936(a3) # 83f5226c <__func__.1+0x74> + 83f4461c: 0000e697 auipc a3,0xe + 83f44620: c546a707 flw fa4,-940(a3) # 83f52270 <__func__.1+0x78> + 83f44624: 0609 addi a2,a2,2 + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + 83f44626: 0000e697 auipc a3,0xe + 83f4462a: c2a6a007 flw ft0,-982(a3) # 83f52250 <__func__.1+0x58> + 83f4462e: 157d addi a0,a0,-1 + tmp = (float)(ref_in[i])/(float)(32768.0F) * 15.84F; + 83f44630: 00079683 lh a3,0(a5) + 83f44634: 8832 mv a6,a2 + 83f44636: d006f7d3 fcvt.s.w fa5,a3 + 83f4463a: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f4463e: 10a7f7d3 fmul.s fa5,fa5,fa0 + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + 83f44642: a0c796d3 flt.s a3,fa5,fa2 + 83f44646: ee89 bnez a3,83f44660 + 83f44648: a0f016d3 flt.s a3,ft0,fa5 + 83f4464c: 882a mv a6,a0 + 83f4464e: ea89 bnez a3,83f44660 + ref_in[i] = ROUND_POS(tmp*(short)(32767)); + 83f44650: 70b7f7c3 fmadd.s fa5,fa5,fa1,fa4 + 83f44654: c0079853 fcvt.w.s a6,fa5,rtz + 83f44658: 0108181b slliw a6,a6,0x10 + 83f4465c: 4108581b sraiw a6,a6,0x10 + 83f44660: 01079023 sh a6,0(a5) + mic_in[i] = ROUND_POS(((float)(mic_in[i])/(float)(32768.0F) * 0.5F)*(short)(32767)); + 83f44664: 00071683 lh a3,0(a4) + for (i = 0; i < hopsize; i++) { + 83f44668: 0709 addi a4,a4,2 + 83f4466a: 0789 addi a5,a5,2 + mic_in[i] = ROUND_POS(((float)(mic_in[i])/(float)(32768.0F) * 0.5F)*(short)(32767)); + 83f4466c: d006f7d3 fcvt.s.w fa5,a3 + 83f44670: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f44674: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f44678: 70b7f7c3 fmadd.s fa5,fa5,fa1,fa4 + 83f4467c: c00796d3 fcvt.w.s a3,fa5,rtz + 83f44680: fed71f23 sh a3,-2(a4) + for (i = 0; i < hopsize; i++) { + 83f44684: faf596e3 bne a1,a5,83f44630 + 83f44688: bd95 j 83f444fc + pst3Ainfo->para_obj.para_fun_config &= (~(LP_AEC_ENABLE | NLP_AES_ENABLE)); + 83f4468a: 0664d783 lhu a5,102(s1) + 83f4468e: 9bf1 andi a5,a5,-4 + 83f44690: 06f49323 sh a5,102(s1) + 83f44694: bdb9 j 83f444f2 + pst3Ainfo->frame = pst3Ainfo->initial_noise_pow_time + 1; + 83f44696: 0000e797 auipc a5,0xe + 83f4469a: bba7a707 flw fa4,-1094(a5) # 83f52250 <__func__.1+0x58> + 83f4469e: 00e7f7d3 fadd.s fa5,fa5,fa4 + 83f446a2: 22f4a227 fsw fa5,548(s1) + 83f446a6: bdfd j 83f445a4 + if (cond3 | pst3Ainfo->para_obj.para_agc_vad_ena) { + 83f446a8: 07e4c783 lbu a5,126(s1) + 83f446ac: 00fae7b3 or a5,s5,a5 + 83f446b0: 10078463 beqz a5,83f447b8 + if (pst3Ainfo->nenr_silence_cnt >= pst3Ainfo->nenr_silence_time) { + 83f446b4: 0cc4a703 lw a4,204(s1) + 83f446b8: 0c84a783 lw a5,200(s1) + NR(mic_in, + 83f446bc: 60f0 ld a2,192(s1) + if (pst3Ainfo->nenr_silence_cnt >= pst3Ainfo->nenr_silence_time) { + 83f446be: 28f75c63 bge a4,a5,83f44956 + 83f446c2: 6685 lui a3,0x1 + 83f446c4: c3068693 addi a3,a3,-976 # c30 <_EL1_STACK_SIZE+0x430> + 83f446c8: 96a6 add a3,a3,s1 + 83f446ca: 4781 li a5,0 + for (i = 0; i < hopsize; i++) { + 83f446cc: 14000593 li a1,320 + 83f446d0: a011 j 83f446d4 + pst3Ainfo->nr_state->x_old[i] = mic_in[i]; + 83f446d2: 60f0 ld a2,192(s1) + pst3Ainfo->ne_float_out[i] = 0.0F; + 83f446d4: 0006a023 sw zero,0(a3) + pst3Ainfo->nr_state->x_old[i] = mic_in[i]; + 83f446d8: 6e18 ld a4,24(a2) + 83f446da: 00f90633 add a2,s2,a5 + 83f446de: 00061603 lh a2,0(a2) # ffffffffffff8000 <_end+0xffffffff7bff82c0> + 83f446e2: 973e add a4,a4,a5 + for (i = 0; i < hopsize; i++) { + 83f446e4: 0789 addi a5,a5,2 + pst3Ainfo->nr_state->x_old[i] = mic_in[i]; + 83f446e6: 00c71023 sh a2,0(a4) + for (i = 0; i < hopsize; i++) { + 83f446ea: 0691 addi a3,a3,4 + 83f446ec: feb793e3 bne a5,a1,83f446d2 + if (cond3) { + 83f446f0: 0c0a8463 beqz s5,83f447b8 + 83f446f4: 6705 lui a4,0x1 + 83f446f6: c3070793 addi a5,a4,-976 # c30 <_EL1_STACK_SIZE+0x430> + 83f446fa: eb070593 addi a1,a4,-336 + pst3Ainfo->ne_float_out[i] = MIN(MAX(pst3Ainfo->ne_float_out[i], -1.0F), 1.0F); /* saturation protection to avoid overflow */ + 83f446fe: 6521 lui a0,0x8 + if (pst3Ainfo->ne_float_out[i] < 0.0F) + 83f44700: f00006d3 fmv.w.x fa3,zero + 83f44704: 97a6 add a5,a5,s1 + 83f44706: 8722 mv a4,s0 + 83f44708: 95a6 add a1,a1,s1 + 83f4470a: 0000e697 auipc a3,0xe + 83f4470e: b5e6a607 flw fa2,-1186(a3) # 83f52268 <__func__.1+0x70> + pst3Ainfo->ne_float_out[i] = MIN(MAX(pst3Ainfo->ne_float_out[i], -1.0F), 1.0F); /* saturation protection to avoid overflow */ + 83f44712: 0000e697 auipc a3,0xe + 83f44716: b3e6a707 flw fa4,-1218(a3) # 83f52250 <__func__.1+0x58> + 83f4471a: 157d addi a0,a0,-1 + dataout[i] = ROUND_POS((pst3Ainfo->ne_float_out[i]*(short)(32767))); + 83f4471c: 0000e697 auipc a3,0xe + 83f44720: b506a507 flw fa0,-1200(a3) # 83f5226c <__func__.1+0x74> + 83f44724: 0000e697 auipc a3,0xe + 83f44728: b4c6a587 flw fa1,-1204(a3) # 83f52270 <__func__.1+0x78> + dataout[i] = ROUND_NEG((pst3Ainfo->ne_float_out[i]*(int)(32768))); + 83f4472c: 0000e697 auipc a3,0xe + 83f44730: b486a087 flw ft1,-1208(a3) # 83f52274 <__func__.1+0x7c> + 83f44734: 0000e697 auipc a3,0xe + 83f44738: b446a007 flw ft0,-1212(a3) # 83f52278 <__func__.1+0x80> + 83f4473c: a829 j 83f44756 + pst3Ainfo->ne_float_out[i] = MIN(MAX(pst3Ainfo->ne_float_out[i], -1.0F), 1.0F); /* saturation protection to avoid overflow */ + 83f4473e: a0f716d3 flt.s a3,fa4,fa5 + 83f44742: 862a mv a2,a0 + 83f44744: c2c5 beqz a3,83f447e4 + 83f44746: 00e7a027 fsw fa4,0(a5) + dataout[i] = ROUND_POS((pst3Ainfo->ne_float_out[i]*(short)(32767))); + 83f4474a: 00c71023 sh a2,0(a4) + for (i = 0; i < hopsize; i++) { + 83f4474e: 0791 addi a5,a5,4 + 83f44750: 0709 addi a4,a4,2 + 83f44752: 02f58063 beq a1,a5,83f44772 + pst3Ainfo->ne_float_out[i] = MIN(MAX(pst3Ainfo->ne_float_out[i], -1.0F), 1.0F); /* saturation protection to avoid overflow */ + 83f44756: 0007a787 flw fa5,0(a5) + 83f4475a: 7661 lui a2,0xffff8 + 83f4475c: a0c796d3 flt.s a3,fa5,fa2 + 83f44760: def9 beqz a3,83f4473e + 83f44762: 00c7a027 fsw fa2,0(a5) + dataout[i] = ROUND_POS((pst3Ainfo->ne_float_out[i]*(short)(32767))); + 83f44766: 00c71023 sh a2,0(a4) + for (i = 0; i < hopsize; i++) { + 83f4476a: 0791 addi a5,a5,4 + 83f4476c: 0709 addi a4,a4,2 + 83f4476e: fef594e3 bne a1,a5,83f44756 + if (cond2) { + 83f44772: 1a0a1b63 bnez s4,83f44928 + if (2 == pst3Ainfo->para_obj.para_client_config) { + 83f44776: 0644d703 lhu a4,100(s1) + 83f4477a: 4789 li a5,2 + 83f4477c: 12f70963 beq a4,a5,83f448ae + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + 83f44780: 0664d783 lhu a5,102(s1) + if (cond1) { + 83f44784: 0407f793 andi a5,a5,64 + 83f44788: 1a079e63 bnez a5,83f44944 + AGC(dataout, + 83f4478c: 0c84a803 lw a6,200(s1) + 83f44790: 0cc4a883 lw a7,204(s1) + if (cond4) { + 83f44794: dc098fe3 beqz s3,83f44572 + AGC(dataout, + 83f44798: 0d04c783 lbu a5,208(s1) + 83f4479c: 2204c703 lbu a4,544(s1) + 83f447a0: 6605 lui a2,0x1 + 83f447a2: 4685 li a3,1 + 83f447a4: 1641 addi a2,a2,-16 + 83f447a6: e036 sd a3,0(sp) + 83f447a8: 9626 add a2,a2,s1 + 83f447aa: 06448693 addi a3,s1,100 + 83f447ae: 85a2 mv a1,s0 + 83f447b0: 8522 mv a0,s0 + 83f447b2: 31d040ef jal ra,83f492ce + 83f447b6: bb55 j 83f4456a + 83f447b8: 85ca mv a1,s2 + 83f447ba: 87a2 mv a5,s0 + 83f447bc: 14090693 addi a3,s2,320 + dataout[i] = mic_in[i]; + 83f447c0: 00059703 lh a4,0(a1) + for (i = 0; i < hopsize; i++) + 83f447c4: 0589 addi a1,a1,2 + 83f447c6: 0789 addi a5,a5,2 + dataout[i] = mic_in[i]; + 83f447c8: fee79f23 sh a4,-2(a5) + for (i = 0; i < hopsize; i++) + 83f447cc: feb69ae3 bne a3,a1,83f447c0 + 83f447d0: b74d j 83f44772 + compen_DG(mic_in, mic_in, &pst3Ainfo->dg_obj, hopsize); + 83f447d2: 0a000693 li a3,160 + 83f447d6: 00848613 addi a2,s1,8 + 83f447da: 85ca mv a1,s2 + 83f447dc: 854a mv a0,s2 + 83f447de: 5e2000ef jal ra,83f44dc0 + 83f447e2: bb85 j 83f44552 + if (pst3Ainfo->ne_float_out[i] < 0.0F) + 83f447e4: a0d796d3 flt.s a3,fa5,fa3 + 83f447e8: ea91 bnez a3,83f447fc + dataout[i] = ROUND_POS((pst3Ainfo->ne_float_out[i]*(short)(32767))); + 83f447ea: 58a7f7c3 fmadd.s fa5,fa5,fa0,fa1 + 83f447ee: c0079653 fcvt.w.s a2,fa5,rtz + 83f447f2: 0106161b slliw a2,a2,0x10 + 83f447f6: 4106561b sraiw a2,a2,0x10 + 83f447fa: bf81 j 83f4474a + dataout[i] = ROUND_NEG((pst3Ainfo->ne_float_out[i]*(int)(32768))); + 83f447fc: 0017f7c3 fmadd.s fa5,fa5,ft1,ft0 + 83f44800: c0079653 fcvt.w.s a2,fa5,rtz + 83f44804: 0106161b slliw a2,a2,0x10 + 83f44808: 4106561b sraiw a2,a2,0x10 + 83f4480c: bf3d j 83f4474a + LP_AEC(pst3Ainfo->aec_state, mic_in, ref_in, dataout); + 83f4480e: 64a8 ld a0,72(s1) + 83f44810: 86a2 mv a3,s0 + 83f44812: 864e mv a2,s3 + 83f44814: 85ca mv a1,s2 + 83f44816: 565000ef jal ra,83f4557a + if (cond2) { + 83f4481a: 020a0163 beqz s4,83f4483c + 83f4481e: 4781 li a5,0 + for (i = 0; i < hopsize; i++) + 83f44820: 14000613 li a2,320 + pst3Ainfo->aes_state->aes_std_in[i] = mic_in[i]; + 83f44824: 68b8 ld a4,80(s1) + 83f44826: 00f906b3 add a3,s2,a5 + 83f4482a: 00069683 lh a3,0(a3) + 83f4482e: 6378 ld a4,192(a4) + 83f44830: 973e add a4,a4,a5 + 83f44832: 00d71023 sh a3,0(a4) + for (i = 0; i < hopsize; i++) + 83f44836: 0789 addi a5,a5,2 + 83f44838: fec796e3 bne a5,a2,83f44824 + 83f4483c: 87a2 mv a5,s0 + 83f4483e: 874a mv a4,s2 + 83f44840: 14040613 addi a2,s0,320 + mic_in[i] = dataout[i]; + 83f44844: 00079683 lh a3,0(a5) + for (i = 0; i < hopsize; i++) + 83f44848: 0789 addi a5,a5,2 + 83f4484a: 0709 addi a4,a4,2 + mic_in[i] = dataout[i]; + 83f4484c: fed71f23 sh a3,-2(a4) + for (i = 0; i < hopsize; i++) + 83f44850: fef61ae3 bne a2,a5,83f44844 + cond3 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + 83f44854: 06649783 lh a5,102(s1) + 83f44858: b9f9 j 83f44536 + notch_filter(mic_in, mic_in, &pst3Ainfo->notch_obj, hopsize); + 83f4485a: 0a000693 li a3,160 + 83f4485e: 02048613 addi a2,s1,32 + 83f44862: 85ca mv a1,s2 + 83f44864: 854a mv a0,s2 + 83f44866: 686040ef jal ra,83f48eec + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + 83f4486a: 06649783 lh a5,102(s1) + 83f4486e: b975 j 83f4452a + DC_remover(mic_in, mic_in, &pst3Ainfo->dc_obj, hopsize); + 83f44870: 0a000693 li a3,160 + 83f44874: 01048613 addi a2,s1,16 + 83f44878: 85ca mv a1,s2 + 83f4487a: 854a mv a0,s2 + 83f4487c: 24a000ef jal ra,83f44ac6 + cond1 = pst3Ainfo->para_obj.para_fun_config & NOTCH_ENABLE; + 83f44880: 06649783 lh a5,102(s1) + 83f44884: b979 j 83f44522 + apply_DG(mic_in, mic_in, &pst3Ainfo->dg_obj, hopsize); + 83f44886: 0a000693 li a3,160 + 83f4488a: 00848613 addi a2,s1,8 + 83f4488e: 85ca mv a1,s2 + 83f44890: 854a mv a0,s2 + 83f44892: 4a6000ef jal ra,83f44d38 + cond1 = pst3Ainfo->para_obj.para_fun_config & DCREMOVER_ENABLE; + 83f44896: 06649783 lh a5,102(s1) + 83f4489a: b141 j 83f4451a + delay_ref(ref_in, pst3Ainfo->delay_state, hopsize); + 83f4489c: 608c ld a1,0(s1) + 83f4489e: 0a000613 li a2,160 + 83f448a2: 854e mv a0,s3 + 83f448a4: 3ea000ef jal ra,83f44c8e + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + 83f448a8: 06649783 lh a5,102(s1) + 83f448ac: b19d j 83f44512 + 83f448ae: 7661 lui a2,0xffff8 + 83f448b0: 6521 lui a0,0x8 + 83f448b2: 87a2 mv a5,s0 + 83f448b4: 14040593 addi a1,s0,320 + 83f448b8: 0000e717 auipc a4,0xe + 83f448bc: 9a872687 flw fa3,-1624(a4) # 83f52260 <__func__.1+0x68> + 83f448c0: 0000e717 auipc a4,0xe + 83f448c4: 9a872607 flw fa2,-1624(a4) # 83f52268 <__func__.1+0x70> + 83f448c8: 0000e717 auipc a4,0xe + 83f448cc: 9b472707 flw fa4,-1612(a4) # 83f5227c <__func__.1+0x84> + 83f448d0: 0609 addi a2,a2,2 + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + 83f448d2: 0000e717 auipc a4,0xe + 83f448d6: 97e72587 flw fa1,-1666(a4) # 83f52250 <__func__.1+0x58> + 83f448da: 157d addi a0,a0,-1 + dataout[i] = ROUND_POS(tmp*(short)(32767)); + 83f448dc: 0000e717 auipc a4,0xe + 83f448e0: 99072007 flw ft0,-1648(a4) # 83f5226c <__func__.1+0x74> + 83f448e4: 0000e717 auipc a4,0xe + 83f448e8: 98c72507 flw fa0,-1652(a4) # 83f52270 <__func__.1+0x78> + tmp = (float)(dataout[i])/(float)(32768.0F) * 1.9952F; + 83f448ec: 00079683 lh a3,0(a5) + 83f448f0: 8732 mv a4,a2 + 83f448f2: d006f7d3 fcvt.s.w fa5,a3 + 83f448f6: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f448fa: 10e7f7d3 fmul.s fa5,fa5,fa4 + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + 83f448fe: a0c796d3 flt.s a3,fa5,fa2 + 83f44902: ee89 bnez a3,83f4491c + 83f44904: a0f596d3 flt.s a3,fa1,fa5 + 83f44908: 872a mv a4,a0 + 83f4490a: ea89 bnez a3,83f4491c + dataout[i] = ROUND_POS(tmp*(short)(32767)); + 83f4490c: 5007f7c3 fmadd.s fa5,fa5,ft0,fa0 + 83f44910: c0079753 fcvt.w.s a4,fa5,rtz + 83f44914: 0107171b slliw a4,a4,0x10 + 83f44918: 4107571b sraiw a4,a4,0x10 + 83f4491c: 00e79023 sh a4,0(a5) + for (i = 0; i < hopsize; i++) { + 83f44920: 0789 addi a5,a5,2 + 83f44922: fcf595e3 bne a1,a5,83f448ec + 83f44926: bda9 j 83f44780 + NLP_AES(pst3Ainfo->aes_state, dataout, pst3Ainfo->frame, pst3Ainfo->speech_vad); + 83f44928: 2204c603 lbu a2,544(s1) + 83f4492c: 2244a507 flw fa0,548(s1) + 83f44930: 68a8 ld a0,80(s1) + 83f44932: 85a2 mv a1,s0 + 83f44934: 5c4030ef jal ra,83f47ef8 + pst3Ainfo->st_vad = (boolean_T)pst3Ainfo->aes_state->st_vad; + 83f44938: 68bc ld a5,80(s1) + 83f4493a: 0bc7a783 lw a5,188(a5) + 83f4493e: 0cf48823 sb a5,208(s1) + 83f44942: bd15 j 83f44776 + compen_DG(dataout, dataout, &pst3Ainfo->dg_obj, hopsize); + 83f44944: 0a000693 li a3,160 + 83f44948: 00848613 addi a2,s1,8 + 83f4494c: 85a2 mv a1,s0 + 83f4494e: 8522 mv a0,s0 + 83f44950: 470000ef jal ra,83f44dc0 + 83f44954: bd25 j 83f4478c + NR(mic_in, + 83f44956: 2284a507 flw fa0,552(s1) + pst3Ainfo->ne_float_out); + 83f4495a: 6705 lui a4,0x1 + 83f4495c: c3070713 addi a4,a4,-976 # c30 <_EL1_STACK_SIZE+0x430> + NR(mic_in, + 83f44960: 9726 add a4,a4,s1 + 83f44962: 22048693 addi a3,s1,544 + 83f44966: 22448593 addi a1,s1,548 + 83f4496a: 854a mv a0,s2 + 83f4496c: 58b010ef jal ra,83f466f6 + 83f44970: b341 j 83f446f0 + printf("[error]audio_ssp_process parameter len must be 160 frames.\n"); + 83f44972: 0000d517 auipc a0,0xd + 83f44976: a6650513 addi a0,a0,-1434 # 83f513d8 <__func__.3+0x350> + 83f4497a: 61a070ef jal ra,83f4bf94 + return -1; + 83f4497e: 557d li a0,-1 + 83f44980: b115 j 83f445a4 + printf("[error]audio_ssp_process error params.\n"); + 83f44982: 0000d517 auipc a0,0xd + 83f44986: a2e50513 addi a0,a0,-1490 # 83f513b0 <__func__.3+0x328> + 83f4498a: 60a070ef jal ra,83f4bf94 + return -1; + 83f4498e: 557d li a0,-1 + 83f44990: b911 j 83f445a4 + printf("[error]audio_ssp_process error.\n"); + 83f44992: 0000d517 auipc a0,0xd + 83f44996: 9f650513 addi a0,a0,-1546 # 83f51388 <__func__.3+0x300> + 83f4499a: 5fa070ef jal ra,83f4bf94 + return -1; + 83f4499e: 557d li a0,-1 + 83f449a0: b111 j 83f445a4 + +0000000083f449a2 : + + +int audio_ssp_deinit(void *handle) +{ + 83f449a2: 7179 addi sp,sp,-48 + 83f449a4: f406 sd ra,40(sp) + 83f449a6: f022 sd s0,32(sp) + 83f449a8: ec26 sd s1,24(sp) + 83f449aa: e84a sd s2,16(sp) + 83f449ac: e44e sd s3,8(sp) + 83f449ae: e052 sd s4,0(sp) + struct st3AInfo *pst3Ainfo = (struct st3AInfo *)handle; + + if (!pst3Ainfo) { + 83f449b0: c545 beqz a0,83f44a58 + LOG_ERROR("audio_ssp_deinit NULL handle\n"); + return -1; + } + short cond1, cond2, cond3, cond4, cond6; + + if (!pst3Ainfo->bInitOk) { + 83f449b2: 6785 lui a5,0x1 + 83f449b4: 97aa add a5,a5,a0 + 83f449b6: 5798 lw a4,40(a5) + 83f449b8: 842a mv s0,a0 + 83f449ba: cb3d beqz a4,83f44a30 + LOG_ERROR("audio_ssp_deinit not init\n"); + return -1; + } + pst3Ainfo->bInitOk = 0; + 83f449bc: 0207a423 sw zero,40(a5) # 1028 <_EL1_STACK_SIZE+0x828> + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + 83f449c0: 06651783 lh a5,102(a0) + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + cond3 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + cond4 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + cond6 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + + if (cond1 | cond2) { + 83f449c4: 0037f713 andi a4,a5,3 + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + 83f449c8: 0027f993 andi s3,a5,2 + cond3 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + 83f449cc: 0047fa13 andi s4,a5,4 + cond4 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + 83f449d0: 0087f913 andi s2,a5,8 + cond6 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + 83f449d4: 0807f493 andi s1,a5,128 + if (cond1 | cond2) { + 83f449d8: e731 bnez a4,83f44a24 + LP_AEC_free(pst3Ainfo->aec_state); + } + if (cond2) { + 83f449da: 00098763 beqz s3,83f449e8 + if (pst3Ainfo->aec_state != NULL) + 83f449de: 643c ld a5,72(s0) + 83f449e0: c781 beqz a5,83f449e8 + NLP_AES_free(pst3Ainfo->aes_state); + 83f449e2: 6828 ld a0,80(s0) + 83f449e4: 166030ef jal ra,83f47b4a + } + if (cond3 | (cond4 && pst3Ainfo->para_obj.para_agc_vad_ena)) { + 83f449e8: 02090763 beqz s2,83f44a16 + 83f449ec: 07e44783 lbu a5,126(s0) + 83f449f0: c39d beqz a5,83f44a16 + if (pst3Ainfo->nr_state) + 83f449f2: 6068 ld a0,192(s0) + 83f449f4: c119 beqz a0,83f449fa + NR_free(pst3Ainfo->nr_state); + 83f449f6: 5c3020ef jal ra,83f477b8 + } + if (cond6) { + 83f449fa: e08d bnez s1,83f44a1c + delay_free(pst3Ainfo->delay_state); + } +#ifndef PLATFORM_RTOS + free(pst3Ainfo); +#else + vPortFree(pst3Ainfo); + 83f449fc: 8522 mv a0,s0 + 83f449fe: 4ed090ef jal ra,83f4e6ea +#endif + //pst3Ainfo = NULL; + return 0; + 83f44a02: 4401 li s0,0 +} + 83f44a04: 70a2 ld ra,40(sp) + 83f44a06: 8522 mv a0,s0 + 83f44a08: 7402 ld s0,32(sp) + 83f44a0a: 64e2 ld s1,24(sp) + 83f44a0c: 6942 ld s2,16(sp) + 83f44a0e: 69a2 ld s3,8(sp) + 83f44a10: 6a02 ld s4,0(sp) + 83f44a12: 6145 addi sp,sp,48 + 83f44a14: 8082 ret + if (cond3 | (cond4 && pst3Ainfo->para_obj.para_agc_vad_ena)) { + 83f44a16: fc0a1ee3 bnez s4,83f449f2 + if (cond6) { + 83f44a1a: d0ed beqz s1,83f449fc + delay_free(pst3Ainfo->delay_state); + 83f44a1c: 6008 ld a0,0(s0) + 83f44a1e: 256000ef jal ra,83f44c74 + 83f44a22: bfe9 j 83f449fc + LP_AEC_free(pst3Ainfo->aec_state); + 83f44a24: 6528 ld a0,72(a0) + 83f44a26: 29d000ef jal ra,83f454c2 + if (cond2) { + 83f44a2a: fa098fe3 beqz s3,83f449e8 + 83f44a2e: bf45 j 83f449de + LOG_ERROR("audio_ssp_deinit not init\n"); + 83f44a30: 0000e797 auipc a5,0xe + 83f44a34: 7907a783 lw a5,1936(a5) # 83f531c0 + return -1; + 83f44a38: 547d li s0,-1 + LOG_ERROR("audio_ssp_deinit not init\n"); + 83f44a3a: fcf055e3 blez a5,83f44a04 + 83f44a3e: 21700613 li a2,535 + 83f44a42: 0000d597 auipc a1,0xd + 83f44a46: a6658593 addi a1,a1,-1434 # 83f514a8 <__func__.3> + 83f44a4a: 0000d517 auipc a0,0xd + 83f44a4e: a2e50513 addi a0,a0,-1490 # 83f51478 <__func__.3+0x3f0> + 83f44a52: 542070ef jal ra,83f4bf94 + 83f44a56: b77d j 83f44a04 + LOG_ERROR("audio_ssp_deinit NULL handle\n"); + 83f44a58: 0000e797 auipc a5,0xe + 83f44a5c: 7687a783 lw a5,1896(a5) # 83f531c0 + return -1; + 83f44a60: 547d li s0,-1 + LOG_ERROR("audio_ssp_deinit NULL handle\n"); + 83f44a62: faf051e3 blez a5,83f44a04 + 83f44a66: 21100613 li a2,529 + 83f44a6a: 0000d597 auipc a1,0xd + 83f44a6e: a3e58593 addi a1,a1,-1474 # 83f514a8 <__func__.3> + 83f44a72: 0000d517 auipc a0,0xd + 83f44a76: 9d650513 addi a0,a0,-1578 # 83f51448 <__func__.3+0x3c0> + 83f44a7a: 51a070ef jal ra,83f4bf94 + 83f44a7e: b759 j 83f44a04 + +0000000083f44a80 : +void DC_remover_init(dcfilter_struct* dc_obj, float Fs) +{ + int i; + int sampling_rate; + + sampling_rate = (int)Fs; + 83f44a80: c00517d3 fcvt.w.s a5,fa0,rtz + + if (sampling_rate == 8000) + 83f44a84: 6709 lui a4,0x2 + 83f44a86: f4070713 addi a4,a4,-192 # 1f40 <_EL1_STACK_SIZE+0x1740> + sampling_rate = (int)Fs; + 83f44a8a: 2781 sext.w a5,a5 + if (sampling_rate == 8000) + 83f44a8c: 02e78263 beq a5,a4,83f44ab0 + dc_obj->dcfilter_radius = .9f; + if (sampling_rate == 16000) + 83f44a90: 6711 lui a4,0x4 + 83f44a92: e8070713 addi a4,a4,-384 # 3e80 <_EL1_STACK_SIZE+0x3680> + 83f44a96: 00e79863 bne a5,a4,83f44aa6 + dc_obj->dcfilter_radius = .982f; + 83f44a9a: 0000d797 auipc a5,0xd + 83f44a9e: 7ea7a787 flw fa5,2026(a5) # 83f52284 <__func__.1+0x8c> + 83f44aa2: 00f52027 fsw fa5,0(a0) + + for (i=0;i<2;i++) + dc_obj->dcfilter_mem[i] = 0; + 83f44aa6: 00052223 sw zero,4(a0) + 83f44aaa: 00052423 sw zero,8(a0) + +} + 83f44aae: 8082 ret + dc_obj->dcfilter_radius = .9f; + 83f44ab0: 0000d797 auipc a5,0xd + 83f44ab4: 7d07a787 flw fa5,2000(a5) # 83f52280 <__func__.1+0x88> + 83f44ab8: 00f52027 fsw fa5,0(a0) + dc_obj->dcfilter_mem[i] = 0; + 83f44abc: 00052223 sw zero,4(a0) + 83f44ac0: 00052423 sw zero,8(a0) +} + 83f44ac4: 8082 ret + +0000000083f44ac6 : +{ + int i; + float den2; + float tmp; + + den2 = dc_obj->dcfilter_radius*dc_obj->dcfilter_radius + .7f*(1-dc_obj->dcfilter_radius)*(1-dc_obj->dcfilter_radius); + 83f44ac6: 00062507 flw fa0,0(a2) # ffffffffffff8000 <_end+0xffffffff7bff82c0> +{ + 83f44aca: 711d addi sp,sp,-96 + 83f44acc: b422 fsd fs0,40(sp) + den2 = dc_obj->dcfilter_radius*dc_obj->dcfilter_radius + .7f*(1-dc_obj->dcfilter_radius)*(1-dc_obj->dcfilter_radius); + 83f44ace: 0000d797 auipc a5,0xd + 83f44ad2: 7827a407 flw fs0,1922(a5) # 83f52250 <__func__.1+0x58> + 83f44ad6: 08a47453 fsub.s fs0,fs0,fa0 + 83f44ada: 0000d797 auipc a5,0xd + 83f44ade: 7ae7a787 flw fa5,1966(a5) # 83f52288 <__func__.1+0x90> +{ + 83f44ae2: ec86 sd ra,88(sp) + 83f44ae4: e8a2 sd s0,80(sp) + 83f44ae6: e4a6 sd s1,72(sp) + den2 = dc_obj->dcfilter_radius*dc_obj->dcfilter_radius + .7f*(1-dc_obj->dcfilter_radius)*(1-dc_obj->dcfilter_radius); + 83f44ae8: 10f477d3 fmul.s fa5,fs0,fa5 +{ + 83f44aec: e0ca sd s2,64(sp) + 83f44aee: fc4e sd s3,56(sp) + 83f44af0: f852 sd s4,48(sp) + 83f44af2: b026 fsd fs1,32(sp) + den2 = dc_obj->dcfilter_radius*dc_obj->dcfilter_radius + .7f*(1-dc_obj->dcfilter_radius)*(1-dc_obj->dcfilter_radius); + 83f44af4: 1087f453 fmul.s fs0,fa5,fs0 +{ + 83f44af8: ac4a fsd fs2,24(sp) + 83f44afa: a84e fsd fs3,16(sp) + 83f44afc: a452 fsd fs4,8(sp) + den2 = dc_obj->dcfilter_radius*dc_obj->dcfilter_radius + .7f*(1-dc_obj->dcfilter_radius)*(1-dc_obj->dcfilter_radius); + 83f44afe: 40a57443 fmadd.s fs0,fa0,fa0,fs0 + + for (i=0;i + 83f44b06: fff6899b addiw s3,a3,-1 + 83f44b0a: 02099793 slli a5,s3,0x20 + 83f44b0e: 01f7d993 srli s3,a5,0x1f + float vin = in[i]; + float vout = dc_obj->dcfilter_mem[0] + vin; + dc_obj->dcfilter_mem[0] = dc_obj->dcfilter_mem[1] + 2*(-vin + dc_obj->dcfilter_radius*vout); /* history state */ + dc_obj->dcfilter_mem[1] = vin - den2 * vout; /* history state */ + tmp = dc_obj->dcfilter_radius * vout; + out[i] = (short)WORD2INT(tmp); + 83f44b12: 6a21 lui s4,0x8 + 83f44b14: 00250793 addi a5,a0,2 + 83f44b18: 99be add s3,s3,a5 + 83f44b1a: 8432 mv s0,a2 + 83f44b1c: 84aa mv s1,a0 + 83f44b1e: 892e mv s2,a1 + 83f44b20: 0000d797 auipc a5,0xd + 83f44b24: 76c7a907 flw fs2,1900(a5) # 83f5228c <__func__.1+0x94> + 83f44b28: 0000d797 auipc a5,0xd + 83f44b2c: 7687a487 flw fs1,1896(a5) # 83f52290 <__func__.1+0x98> + 83f44b30: 0000d797 auipc a5,0xd + 83f44b34: 7647aa07 flw fs4,1892(a5) # 83f52294 <__func__.1+0x9c> + 83f44b38: 1a7d addi s4,s4,-1 + 83f44b3a: 0000d797 auipc a5,0xd + 83f44b3e: 75e7b987 fld fs3,1886(a5) # 83f52298 <__func__.1+0xa0> + 83f44b42: a801 j 83f44b52 + 83f44b44: 00f91023 sh a5,0(s2) + for (i=0;i + dc_obj->dcfilter_mem[0] = dc_obj->dcfilter_mem[1] + 2*(-vin + dc_obj->dcfilter_radius*vout); /* history state */ + 83f44b4e: 00042507 flw fa0,0(s0) + float vin = in[i]; + 83f44b52: 00049783 lh a5,0(s1) + float vout = dc_obj->dcfilter_mem[0] + vin; + 83f44b56: 00442707 flw fa4,4(s0) + dc_obj->dcfilter_mem[0] = dc_obj->dcfilter_mem[1] + 2*(-vin + dc_obj->dcfilter_radius*vout); /* history state */ + 83f44b5a: 00842687 flw fa3,8(s0) + float vin = in[i]; + 83f44b5e: d007f7d3 fcvt.s.w fa5,a5 + for (i=0;idcfilter_mem[0] + vin; + 83f44b66: 00e7f753 fadd.s fa4,fa5,fa4 + dc_obj->dcfilter_mem[0] = dc_obj->dcfilter_mem[1] + 2*(-vin + dc_obj->dcfilter_radius*vout); /* history state */ + 83f44b6a: 10a77553 fmul.s fa0,fa4,fa0 + dc_obj->dcfilter_mem[1] = vin - den2 * vout; /* history state */ + 83f44b6e: 78e4774b fnmsub.s fa4,fs0,fa4,fa5 + dc_obj->dcfilter_mem[0] = dc_obj->dcfilter_mem[1] + 2*(-vin + dc_obj->dcfilter_radius*vout); /* history state */ + 83f44b72: 08f577d3 fsub.s fa5,fa0,fa5 + out[i] = (short)WORD2INT(tmp); + 83f44b76: a0951753 flt.s a4,fa0,fs1 + dc_obj->dcfilter_mem[1] = vin - den2 * vout; /* history state */ + 83f44b7a: 00e42427 fsw fa4,8(s0) + dc_obj->dcfilter_mem[0] = dc_obj->dcfilter_mem[1] + 2*(-vin + dc_obj->dcfilter_radius*vout); /* history state */ + 83f44b7e: 6927f7c3 fmadd.s fa5,fa5,fs2,fa3 + 83f44b82: 00f42227 fsw fa5,4(s0) + out[i] = (short)WORD2INT(tmp); + 83f44b86: ff5d bnez a4,83f44b44 + 83f44b88: a0aa1753 flt.s a4,fs4,fa0 + 83f44b8c: 87d2 mv a5,s4 + 83f44b8e: fb5d bnez a4,83f44b44 + 83f44b90: 42050553 fcvt.d.s fa0,fa0 + for (i=0;i + 83f44b9e: c20517d3 fcvt.w.d a5,fa0,rtz + 83f44ba2: 0107979b slliw a5,a5,0x10 + 83f44ba6: 4107d79b sraiw a5,a5,0x10 + 83f44baa: fef91f23 sh a5,-2(s2) + for (i=0;i + } + +} + 83f44bb2: 60e6 ld ra,88(sp) + 83f44bb4: 6446 ld s0,80(sp) + 83f44bb6: 64a6 ld s1,72(sp) + 83f44bb8: 6906 ld s2,64(sp) + 83f44bba: 79e2 ld s3,56(sp) + 83f44bbc: 7a42 ld s4,48(sp) + 83f44bbe: 3422 fld fs0,40(sp) + 83f44bc0: 3482 fld fs1,32(sp) + 83f44bc2: 2962 fld fs2,24(sp) + 83f44bc4: 29c2 fld fs3,16(sp) + 83f44bc6: 2a22 fld fs4,8(sp) + 83f44bc8: 6125 addi sp,sp,96 + 83f44bca: 8082 ret + +0000000083f44bcc : +{ + ssp_para_struct *ssp_para_obj; + + /* Delay Parameter */ + ssp_para_obj = para; + ssp_para_obj->para_delay_sample = MIN(MAX(ssp_para_obj->para_delay_sample, 1), 3000); /* delay in sample, delay 0 sample if disable DELAY_ENABLE */ + 83f44bcc: 00455783 lhu a5,4(a0) + 83f44bd0: 0107971b slliw a4,a5,0x10 + 83f44bd4: 0107569b srliw a3,a4,0x10 + 83f44bd8: 8736 mv a4,a3 + 83f44bda: e299 bnez a3,83f44be0 + 83f44bdc: 4785 li a5,1 + 83f44bde: 4705 li a4,1 + 83f44be0: 6685 lui a3,0x1 + 83f44be2: bb868693 addi a3,a3,-1096 # bb8 <_EL1_STACK_SIZE+0x3b8> + 83f44be6: 00e6f363 bgeu a3,a4,83f44bec + 83f44bea: 87b6 mv a5,a3 + 83f44bec: 00f51223 sh a5,4(a0) + +} + 83f44bf0: 8082 ret + +0000000083f44bf2 : + +EXPORT DelayState *delay_init(ssp_para_struct *para) +{ + 83f44bf2: 7179 addi sp,sp,-48 + 83f44bf4: e84a sd s2,16(sp) + 83f44bf6: 892a mv s2,a0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44bf8: 02800513 li a0,40 + 83f44bfc: f406 sd ra,40(sp) + 83f44bfe: f022 sd s0,32(sp) + 83f44c00: ec26 sd s1,24(sp) + 83f44c02: e44e sd s3,8(sp) + 83f44c04: 181090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44c08: 02800613 li a2,40 + 83f44c0c: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44c0e: 84aa mv s1,a0 + int i; + ssp_para_struct *ssp_para_obj; + DelayState *st = (DelayState *)mem_alloc(sizeof(DelayState)); + + ssp_para_obj = para; + st->size = 3001; + 83f44c10: 6985 lui s3,0x1 + memset(ptr, 0, size); + 83f44c12: 36a070ef jal ra,83f4bf7c + 83f44c16: bb998793 addi a5,s3,-1095 # bb9 <_EL1_STACK_SIZE+0x3b9> + 83f44c1a: 00f49c23 sh a5,24(s1) + uintptr_t *ptr = pvPortMalloc(size); + 83f44c1e: 77298513 addi a0,s3,1906 + 83f44c22: 163090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44c26: 77298613 addi a2,s3,1906 + 83f44c2a: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44c2c: 842a mv s0,a0 + memset(ptr, 0, size); + 83f44c2e: 34e070ef jal ra,83f4bf7c + + st->dly_ref_buf = (short*)mem_alloc(st->size*sizeof(short)); + + for (i=0;isize;i++) + 83f44c32: 0184d783 lhu a5,24(s1) + st->dly_ref_buf = (short*)mem_alloc(st->size*sizeof(short)); + 83f44c36: f080 sd s0,32(s1) + for (i=0;isize;i++) + 83f44c38: cf99 beqz a5,83f44c56 + 83f44c3a: 4781 li a5,0 + st->dly_ref_buf[i] = 0; + 83f44c3c: 00179713 slli a4,a5,0x1 + 83f44c40: 943a add s0,s0,a4 + 83f44c42: 00041023 sh zero,0(s0) + for (i=0;isize;i++) + 83f44c46: 0184d683 lhu a3,24(s1) + 83f44c4a: 0785 addi a5,a5,1 + 83f44c4c: 0007871b sext.w a4,a5 + st->dly_ref_buf[i] = 0; + 83f44c50: 7080 ld s0,32(s1) + for (i=0;isize;i++) + 83f44c52: fed745e3 blt a4,a3,83f44c3c + + st->addr = st->dly_ref_buf; + 83f44c56: e080 sd s0,0(s1) + st->rdptr = st->addr; + 83f44c58: e480 sd s0,8(s1) + st->wrptr = st->addr + ssp_para_obj->para_delay_sample; + 83f44c5a: 00495783 lhu a5,4(s2) + + return st; + +} + 83f44c5e: 8526 mv a0,s1 + st->wrptr = st->addr + ssp_para_obj->para_delay_sample; + 83f44c60: 0786 slli a5,a5,0x1 + 83f44c62: 943e add s0,s0,a5 + 83f44c64: e880 sd s0,16(s1) +} + 83f44c66: 70a2 ld ra,40(sp) + 83f44c68: 7402 ld s0,32(sp) + 83f44c6a: 64e2 ld s1,24(sp) + 83f44c6c: 6942 ld s2,16(sp) + 83f44c6e: 69a2 ld s3,8(sp) + 83f44c70: 6145 addi sp,sp,48 + 83f44c72: 8082 ret + +0000000083f44c74 : + +EXPORT void delay_free(DelayState *st) +{ + 83f44c74: 1141 addi sp,sp,-16 + 83f44c76: e022 sd s0,0(sp) + 83f44c78: e406 sd ra,8(sp) + 83f44c7a: 842a mv s0,a0 +static _inline void mem_free (void *ptr) +{ +#ifndef PLATFORM_RTOS + free(ptr); +#else + vPortFree(ptr); + 83f44c7c: 7108 ld a0,32(a0) + 83f44c7e: 26d090ef jal ra,83f4e6ea + 83f44c82: 8522 mv a0,s0 + mem_free(st->dly_ref_buf); + mem_free(st); + +} + 83f44c84: 6402 ld s0,0(sp) + 83f44c86: 60a2 ld ra,8(sp) + 83f44c88: 0141 addi sp,sp,16 + 83f44c8a: 2610906f j 83f4e6ea + +0000000083f44c8e : + DelayState *st; + short *ptr1, *ptr2, *ptr3; + + st = delay_state; + + ptr1 = st->wrptr; /* write pointer in circular butter */ + 83f44c8e: 6994 ld a3,16(a1) + ptr2 = pin; + ptr3 = st->rdptr; /* read pointer in circular butter */ + 83f44c90: 6598 ld a4,8(a1) + + for (i=0; i + 83f44c96: 0606 slli a2,a2,0x1 + 83f44c98: 00c508b3 add a7,a0,a2 + *ptr1++ = *ptr2; /* read from input buffer and write to circular buffer */ + 83f44c9c: 00051783 lh a5,0(a0) + 83f44ca0: 00268813 addi a6,a3,2 + if(ptr1 >= (st->addr + st->size)) + ptr1 = st->addr; + *ptr2++ = *ptr3++; /* read from circular buffer and write to input buffer */ + 83f44ca4: 0509 addi a0,a0,2 + *ptr1++ = *ptr2; /* read from input buffer and write to circular buffer */ + 83f44ca6: 00f69023 sh a5,0(a3) + if(ptr1 >= (st->addr + st->size)) + 83f44caa: 0185d783 lhu a5,24(a1) + 83f44cae: 6194 ld a3,0(a1) + *ptr2++ = *ptr3++; /* read from circular buffer and write to input buffer */ + 83f44cb0: 00270613 addi a2,a4,2 + if(ptr1 >= (st->addr + st->size)) + 83f44cb4: 0786 slli a5,a5,0x1 + 83f44cb6: 97b6 add a5,a5,a3 + 83f44cb8: 00f87363 bgeu a6,a5,83f44cbe + 83f44cbc: 86c2 mv a3,a6 + *ptr2++ = *ptr3++; /* read from circular buffer and write to input buffer */ + 83f44cbe: 00071783 lh a5,0(a4) + 83f44cc2: fef51f23 sh a5,-2(a0) + if(ptr3 >= (st->addr + st->size)) + 83f44cc6: 0185d783 lhu a5,24(a1) + 83f44cca: 6198 ld a4,0(a1) + 83f44ccc: 0786 slli a5,a5,0x1 + 83f44cce: 97ba add a5,a5,a4 + 83f44cd0: 00f67363 bgeu a2,a5,83f44cd6 + 83f44cd4: 8732 mv a4,a2 + for (i=0; i + ptr3 = st->addr; + } + + st->wrptr = ptr1; /* restore for next frame */ + 83f44cda: e994 sd a3,16(a1) + st->rdptr = ptr3; /* restore for next frame */ + 83f44cdc: e598 sd a4,8(a1) + +} + 83f44cde: 8082 ret + +0000000083f44ce0 : + static float dg_boost_tab[12] = {1.122018F, 1.258925F, 1.412538F, 1.584893F, 1.778279F, 1.995262F, + 2.238721F, 2.511886F, 2.818383F, 3.162278F, 3.548134F, 3.981072F}; + + /* DG Parameter */ + ssp_para_obj = para; + dg_obj = dg; + 83f44ce0: 0065d703 lhu a4,6(a1) + ssp_para_obj->para_dg_target = MIN(MAX(ssp_para_obj->para_dg_target, 1), 12); /* target 0dB if disable DG_ENABLE */ + 83f44ce4: 0107179b slliw a5,a4,0x10 + 83f44ce8: 0107d69b srliw a3,a5,0x10 + 83f44cec: 87b6 mv a5,a3 + 83f44cee: e299 bnez a3,83f44cf4 + 83f44cf0: 4705 li a4,1 + 83f44cf2: 4785 li a5,1 + 83f44cf4: 46b1 li a3,12 + 83f44cf6: 00f6f363 bgeu a3,a5,83f44cfc + 83f44cfa: 4731 li a4,12 + 83f44cfc: 03071793 slli a5,a4,0x30 + 83f44d00: 93c1 srli a5,a5,0x30 + dg_obj->cut_gain = dg_cut_tab[ssp_para_obj->para_dg_target-1]; + 83f44d02: 37fd addiw a5,a5,-1 + 83f44d04: 078a slli a5,a5,0x2 + 83f44d06: 0000c697 auipc a3,0xc + 83f44d0a: 7fa68693 addi a3,a3,2042 # 83f51500 + 83f44d0e: 97b6 add a5,a5,a3 + 83f44d10: 0007a787 flw fa5,0(a5) # ffffffffffff8000 <_end+0xffffffff7bff82c0> + ssp_para_obj->para_dg_target = MIN(MAX(ssp_para_obj->para_dg_target, 1), 12); /* target 0dB if disable DG_ENABLE */ + 83f44d14: 00e59323 sh a4,6(a1) + dg_obj->boost_gain = dg_boost_tab[ssp_para_obj->para_dg_target-1]; + 83f44d18: 0000c717 auipc a4,0xc + 83f44d1c: 7b870713 addi a4,a4,1976 # 83f514d0 + dg_obj->cut_gain = dg_cut_tab[ssp_para_obj->para_dg_target-1]; + 83f44d20: 00f52027 fsw fa5,0(a0) + dg_obj->boost_gain = dg_boost_tab[ssp_para_obj->para_dg_target-1]; + 83f44d24: 0065d783 lhu a5,6(a1) + 83f44d28: 37fd addiw a5,a5,-1 + 83f44d2a: 078a slli a5,a5,0x2 + 83f44d2c: 97ba add a5,a5,a4 + 83f44d2e: 0007a787 flw fa5,0(a5) + 83f44d32: 00f52227 fsw fa5,4(a0) + +} + 83f44d36: 8082 ret + +0000000083f44d38 : + int i; + float tmp; + dg_struct *dg_obj; + + dg_obj = dg; + for (i=0;i + 83f44d3c: fff6879b addiw a5,a3,-1 + 83f44d40: 02079713 slli a4,a5,0x20 + 83f44d44: 01f75793 srli a5,a4,0x1f + 83f44d48: 00258713 addi a4,a1,2 + 83f44d4c: 97ba add a5,a5,a4 + tmp = (float)(pin[i])/(float)(32768.0F)*dg_obj->cut_gain; + if (tmp < 0.0F) { + 83f44d4e: f0000653 fmv.w.x fa2,zero + 83f44d52: 0000d717 auipc a4,0xd + 83f44d56: 50e72687 flw fa3,1294(a4) # 83f52260 <__func__.1+0x68> + pout[i] = ROUND_NEG(tmp*(int)(32768)); + } else { + pout[i] = ROUND_POS(tmp*(short)(32767)); + 83f44d5a: 0000d717 auipc a4,0xd + 83f44d5e: 51272507 flw fa0,1298(a4) # 83f5226c <__func__.1+0x74> + 83f44d62: 0000d717 auipc a4,0xd + 83f44d66: 50e72587 flw fa1,1294(a4) # 83f52270 <__func__.1+0x78> + pout[i] = ROUND_NEG(tmp*(int)(32768)); + 83f44d6a: 0000d717 auipc a4,0xd + 83f44d6e: 50a72087 flw ft1,1290(a4) # 83f52274 <__func__.1+0x7c> + 83f44d72: 0000d717 auipc a4,0xd + 83f44d76: 50672007 flw ft0,1286(a4) # 83f52278 <__func__.1+0x80> + 83f44d7a: a819 j 83f44d90 + pout[i] = ROUND_POS(tmp*(short)(32767)); + 83f44d7c: 58a7f7c3 fmadd.s fa5,fa5,fa0,fa1 + for (i=0;i + tmp = (float)(pin[i])/(float)(32768.0F)*dg_obj->cut_gain; + 83f44d90: 00051703 lh a4,0(a0) + 83f44d94: 00062707 flw fa4,0(a2) + 83f44d98: d00777d3 fcvt.s.w fa5,a4 + 83f44d9c: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f44da0: 10e7f7d3 fmul.s fa5,fa5,fa4 + if (tmp < 0.0F) { + 83f44da4: a0c79753 flt.s a4,fa5,fa2 + 83f44da8: db71 beqz a4,83f44d7c + pout[i] = ROUND_NEG(tmp*(int)(32768)); + 83f44daa: 0017f7c3 fmadd.s fa5,fa5,ft1,ft0 + for (i=0;i + } + } + +} + 83f44dbe: 8082 ret + +0000000083f44dc0 : + int i; + float tmp; + dg_struct *dg_obj; + + dg_obj = dg; + for (i=0;i + 83f44dc4: fff6871b addiw a4,a3,-1 + 83f44dc8: 02071793 slli a5,a4,0x20 + 83f44dcc: 01f7d713 srli a4,a5,0x1f + 83f44dd0: 6821 lui a6,0x8 + 83f44dd2: 00258793 addi a5,a1,2 + 83f44dd6: 973e add a4,a4,a5 + tmp = (float)(pin[i])/(float)(32768.0F)*dg_obj->boost_gain; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + if (tmp < 0.0F) { + 83f44dd8: f0000553 fmv.w.x fa0,zero + 83f44ddc: 0000d797 auipc a5,0xd + 83f44de0: 4847a607 flw fa2,1156(a5) # 83f52260 <__func__.1+0x68> + 83f44de4: 0000d797 auipc a5,0xd + 83f44de8: 4847a687 flw fa3,1156(a5) # 83f52268 <__func__.1+0x70> + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + 83f44dec: 0000d797 auipc a5,0xd + 83f44df0: 4647a587 flw fa1,1124(a5) # 83f52250 <__func__.1+0x58> + 83f44df4: 187d addi a6,a6,-1 + pout[i] = ROUND_NEG(tmp*(int)(32768)); + 83f44df6: 0000d797 auipc a5,0xd + 83f44dfa: 47e7a187 flw ft3,1150(a5) # 83f52274 <__func__.1+0x7c> + 83f44dfe: 0000d797 auipc a5,0xd + 83f44e02: 47a7a107 flw ft2,1146(a5) # 83f52278 <__func__.1+0x80> + } else { + pout[i] = ROUND_POS(tmp*(short)(32767)); + 83f44e06: 0000d797 auipc a5,0xd + 83f44e0a: 4667a087 flw ft1,1126(a5) # 83f5226c <__func__.1+0x74> + 83f44e0e: 0000d797 auipc a5,0xd + 83f44e12: 4627a007 flw ft0,1122(a5) # 83f52270 <__func__.1+0x78> + 83f44e16: a839 j 83f44e34 + 83f44e18: 0017f7c3 fmadd.s fa5,fa5,ft1,ft0 + 83f44e1c: c00796d3 fcvt.w.s a3,fa5,rtz + 83f44e20: 0106969b slliw a3,a3,0x10 + 83f44e24: 4106d69b sraiw a3,a3,0x10 + 83f44e28: 00d59023 sh a3,0(a1) + for (i=0;i + tmp = (float)(pin[i])/(float)(32768.0F)*dg_obj->boost_gain; + 83f44e34: 00051783 lh a5,0(a0) + 83f44e38: 00462707 flw fa4,4(a2) + 83f44e3c: 76e1 lui a3,0xffff8 + 83f44e3e: d007f7d3 fcvt.s.w fa5,a5 + 83f44e42: 10c7f7d3 fmul.s fa5,fa5,fa2 + 83f44e46: 10e7f7d3 fmul.s fa5,fa5,fa4 + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + 83f44e4a: a0d797d3 flt.s a5,fa5,fa3 + 83f44e4e: ffe9 bnez a5,83f44e28 + 83f44e50: a0f597d3 flt.s a5,fa1,fa5 + 83f44e54: 86c2 mv a3,a6 + 83f44e56: fbe9 bnez a5,83f44e28 + if (tmp < 0.0F) { + 83f44e58: a0a797d3 flt.s a5,fa5,fa0 + 83f44e5c: dfd5 beqz a5,83f44e18 + pout[i] = ROUND_NEG(tmp*(int)(32768)); + 83f44e5e: 1037f7c3 fmadd.s fa5,fa5,ft3,ft2 + for (i=0;i + } + } + +} + 83f44e7a: 8082 ret + +0000000083f44e7c : + + /* LP AEC Parameters */ + para_obj = para; + + tmp = MIN(MAX(para_obj->para_aec_init_filter_len, 1), 13); /* 8kHz: [20ms, 260ms], each step 20ms; 16kHz: [10ms, 130ms], each step 10ms */ + *init_filter_length = tmp; + 83f44e7c: 00855783 lhu a5,8(a0) + 83f44e80: 0107971b slliw a4,a5,0x10 + 83f44e84: 0107569b srliw a3,a4,0x10 + 83f44e88: 8736 mv a4,a3 + 83f44e8a: e299 bnez a3,83f44e90 + 83f44e8c: 4785 li a5,1 + 83f44e8e: 4705 li a4,1 + 83f44e90: 46b5 li a3,13 + 83f44e92: 00e6f363 bgeu a3,a4,83f44e98 + 83f44e96: 47b5 li a5,13 + 83f44e98: 00f61023 sh a5,0(a2) + + tmp = MIN(MAX(para_obj->para_aec_filter_len, 1), 13); /* 8kHz: [20ms, 260ms], each step 20ms; 16kHz: [10ms, 130ms], each step 10ms */ + *filter_length = tmp; + 83f44e9c: 00a55783 lhu a5,10(a0) + 83f44ea0: 0107971b slliw a4,a5,0x10 + 83f44ea4: 0107569b srliw a3,a4,0x10 + 83f44ea8: 8736 mv a4,a3 + 83f44eaa: e299 bnez a3,83f44eb0 + 83f44eac: 4785 li a5,1 + 83f44eae: 4705 li a4,1 + 83f44eb0: 46b5 li a3,13 + 83f44eb2: 00e6f363 bgeu a3,a4,83f44eb8 + 83f44eb6: 47b5 li a5,13 + 83f44eb8: 00f59023 sh a5,0(a1) + +} + 83f44ebc: 8082 ret + +0000000083f44ebe : + +EXPORT LinearEchoState *LP_AEC_init(int frame_size, short filter_length, short init_filter_length, float Fs) +{ + 83f44ebe: 7119 addi sp,sp,-128 + 83f44ec0: e4d6 sd s5,72(sp) + 83f44ec2: 8aaa mv s5,a0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44ec4: 15800513 li a0,344 + 83f44ec8: fc86 sd ra,120(sp) + 83f44eca: f8a2 sd s0,112(sp) + 83f44ecc: f4a6 sd s1,104(sp) + 83f44ece: f0ca sd s2,96(sp) + 83f44ed0: 84ae mv s1,a1 + 83f44ed2: 8932 mv s2,a2 + 83f44ed4: ecce sd s3,88(sp) + 83f44ed6: e8d2 sd s4,80(sp) + 83f44ed8: e0da sd s6,64(sp) + 83f44eda: fc5e sd s7,56(sp) + 83f44edc: f466 sd s9,40(sp) + 83f44ede: ac22 fsd fs0,24(sp) + 83f44ee0: f862 sd s8,48(sp) + 83f44ee2: 20a50453 fmv.s fs0,fa0 + 83f44ee6: a826 fsd fs1,16(sp) + 83f44ee8: a44a fsd fs2,8(sp) + 83f44eea: 69a090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44eee: 15800613 li a2,344 + 83f44ef2: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44ef4: 842a mv s0,a0 + memset(ptr, 0, size); + 83f44ef6: 086070ef jal ra,83f4bf7c + st->sum_adapt = 0; + st->saturated = 0; + st->screwed_up = 0; + + st->sampling_rate = (int)Fs; + st->spec_average = (float)st->frame_size/(float)st->sampling_rate; + 83f44efa: d00af7d3 fcvt.s.w fa5,s5 + st->sampling_rate = (int)Fs; + 83f44efe: c00417d3 fcvt.w.s a5,fs0,rtz + st->beta0 = (2.0f*st->frame_size)/st->sampling_rate; + st->beta_max = (.5f*st->frame_size)/st->sampling_rate; + 83f44f02: 0000d717 auipc a4,0xd + 83f44f06: 36e72407 flw fs0,878(a4) # 83f52270 <__func__.1+0x78> + st->beta0 = (2.0f*st->frame_size)/st->sampling_rate; + 83f44f0a: 00f7f6d3 fadd.s fa3,fa5,fa5 + st->beta_max = (.5f*st->frame_size)/st->sampling_rate; + 83f44f0e: 1087f753 fmul.s fa4,fa5,fs0 + st->spec_average = (float)st->frame_size/(float)st->sampling_rate; + 83f44f12: d007f653 fcvt.s.w fa2,a5 + st->ss = .35f; // fe_smooth_coef; + 83f44f16: 0000d717 auipc a4,0xd + 83f44f1a: 38a72587 flw fa1,906(a4) # 83f522a0 <__func__.1+0xa8> + st->window_size = 2*frame_size; + 83f44f1e: 001a9b1b slliw s6,s5,0x1 + st->spec_average = (float)st->frame_size/(float)st->sampling_rate; + 83f44f22: 18c7f7d3 fdiv.s fa5,fa5,fa2 + st->ss = .35f; // fe_smooth_coef; + 83f44f26: 14b42027 fsw fa1,320(s0) + st->sampling_rate = (int)Fs; + 83f44f2a: cc5c sw a5,28(s0) + st->leak_estimate = 0; + + st->fft_table = speech_fft_init(N); + + st->e = (float*)mem_alloc(N*sizeof(float)); + 83f44f2c: 003a9a1b slliw s4,s5,0x3 + st->frame_size = frame_size; + 83f44f30: 01542023 sw s5,0(s0) + st->M = filter_length; + 83f44f34: c404 sw s1,8(s0) + st->window_size = 2*frame_size; + 83f44f36: 01642223 sw s6,4(s0) + st->initial_filter_len = init_filter_length; + 83f44f3a: 15241823 sh s2,336(s0) + st->cancel_count = 0; + 83f44f3e: 00042623 sw zero,12(s0) + st->sum_adapt = 0; + 83f44f42: 02042623 sw zero,44(s0) + st->saturated = 0; + 83f44f46: 00042a23 sw zero,20(s0) + st->screwed_up = 0; + 83f44f4a: 00042c23 sw zero,24(s0) + st->leak_estimate = 0; + 83f44f4e: 02042823 sw zero,48(s0) + st->fft_table = speech_fft_init(N); + 83f44f52: 855a mv a0,s6 + uintptr_t *ptr = pvPortMalloc(size); + 83f44f54: 000a049b sext.w s1,s4 + st->Rf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + st->Xf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + st->Yh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + st->Eh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + + st->X = (float*)mem_alloc((13+1)*N*sizeof(float)); + 83f44f58: 415a0a3b subw s4,s4,s5 + 83f44f5c: 004a1a1b slliw s4,s4,0x4 + M = st->initial_filter_len; + 83f44f60: 0009099b sext.w s3,s2 + st->beta0 = (2.0f*st->frame_size)/st->sampling_rate; + 83f44f64: 18c6f6d3 fdiv.s fa3,fa3,fa2 + st->spec_average = (float)st->frame_size/(float)st->sampling_rate; + 83f44f68: 02f42027 fsw fa5,32(s0) + st->beta_max = (.5f*st->frame_size)/st->sampling_rate; + 83f44f6c: 18c77753 fdiv.s fa4,fa4,fa2 + st->beta0 = (2.0f*st->frame_size)/st->sampling_rate; + 83f44f70: 02d42227 fsw fa3,36(s0) + st->beta_max = (.5f*st->frame_size)/st->sampling_rate; + 83f44f74: 02e42427 fsw fa4,40(s0) + st->fft_table = speech_fft_init(N); + 83f44f78: 0de040ef jal ra,83f49056 + 83f44f7c: fc68 sd a0,248(s0) + 83f44f7e: 8526 mv a0,s1 + 83f44f80: 604090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44f84: 8626 mv a2,s1 + 83f44f86: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44f88: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f44f8a: 7f3060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f44f8e: 8526 mv a0,s1 + st->e = (float*)mem_alloc(N*sizeof(float)); + 83f44f90: 03743c23 sd s7,56(s0) + 83f44f94: 5f0090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44f98: 8626 mv a2,s1 + 83f44f9a: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44f9c: 8caa mv s9,a0 + memset(ptr, 0, size); + 83f44f9e: 7df060ef jal ra,83f4bf7c + st->input = (float*)mem_alloc(st->frame_size*sizeof(float)); + 83f44fa2: 00042b83 lw s7,0(s0) + st->x = (float*)mem_alloc(N*sizeof(float)); + 83f44fa6: 05943023 sd s9,64(s0) + st->input = (float*)mem_alloc(st->frame_size*sizeof(float)); + 83f44faa: 002b9b9b slliw s7,s7,0x2 + uintptr_t *ptr = pvPortMalloc(size); + 83f44fae: 855e mv a0,s7 + 83f44fb0: 5d4090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44fb4: 865e mv a2,s7 + 83f44fb6: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44fb8: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f44fba: 7c3060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f44fbe: 8526 mv a0,s1 + 83f44fc0: 05743823 sd s7,80(s0) + 83f44fc4: 5c0090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44fc8: 8626 mv a2,s1 + 83f44fca: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44fcc: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f44fce: 7af060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f44fd2: 8526 mv a0,s1 + st->y = (float*)mem_alloc(N*sizeof(float)); + 83f44fd4: 05743c23 sd s7,88(s0) + 83f44fd8: 5ac090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44fdc: 8626 mv a2,s1 + 83f44fde: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44fe0: 8caa mv s9,a0 + memset(ptr, 0, size); + 83f44fe2: 79b060ef jal ra,83f4bf7c + st->Yf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f44fe6: 00042b83 lw s7,0(s0) + st->last_y = (float*)mem_alloc(N*sizeof(float)); + 83f44fea: 07943023 sd s9,96(s0) + st->Yf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f44fee: 2b85 addiw s7,s7,1 + uintptr_t *ptr = pvPortMalloc(size); + 83f44ff0: 002b9b9b slliw s7,s7,0x2 + 83f44ff4: 855e mv a0,s7 + 83f44ff6: 58e090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f44ffa: 865e mv a2,s7 + 83f44ffc: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f44ffe: 8caa mv s9,a0 + memset(ptr, 0, size); + 83f45000: 77d060ef jal ra,83f4bf7c + st->Rf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45004: 00042b83 lw s7,0(s0) + st->Yf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45008: 0d943023 sd s9,192(s0) + st->Rf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f4500c: 2b85 addiw s7,s7,1 + uintptr_t *ptr = pvPortMalloc(size); + 83f4500e: 002b9b9b slliw s7,s7,0x2 + 83f45012: 855e mv a0,s7 + 83f45014: 570090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45018: 865e mv a2,s7 + 83f4501a: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4501c: 8caa mv s9,a0 + memset(ptr, 0, size); + 83f4501e: 75f060ef jal ra,83f4bf7c + st->Xf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45022: 00042b83 lw s7,0(s0) + st->Rf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45026: 0b943c23 sd s9,184(s0) + st->Xf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f4502a: 2b85 addiw s7,s7,1 + uintptr_t *ptr = pvPortMalloc(size); + 83f4502c: 002b9b9b slliw s7,s7,0x2 + 83f45030: 855e mv a0,s7 + 83f45032: 552090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45036: 865e mv a2,s7 + 83f45038: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4503a: 8caa mv s9,a0 + memset(ptr, 0, size); + 83f4503c: 741060ef jal ra,83f4bf7c + st->Yh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45040: 00042b83 lw s7,0(s0) + st->Xf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45044: 0d943423 sd s9,200(s0) + st->Yh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45048: 2b85 addiw s7,s7,1 + uintptr_t *ptr = pvPortMalloc(size); + 83f4504a: 002b9b9b slliw s7,s7,0x2 + 83f4504e: 855e mv a0,s7 + 83f45050: 534090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45054: 865e mv a2,s7 + 83f45056: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f45058: 8caa mv s9,a0 + memset(ptr, 0, size); + 83f4505a: 723060ef jal ra,83f4bf7c + st->Eh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f4505e: 00042b83 lw s7,0(s0) + st->Yh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45062: 0d943c23 sd s9,216(s0) + st->Eh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + 83f45066: 2b85 addiw s7,s7,1 + uintptr_t *ptr = pvPortMalloc(size); + 83f45068: 002b9b9b slliw s7,s7,0x2 + 83f4506c: 855e mv a0,s7 + 83f4506e: 516090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45072: 865e mv a2,s7 + 83f45074: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f45076: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f45078: 705060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4507c: 8552 mv a0,s4 + 83f4507e: 0d743823 sd s7,208(s0) + 83f45082: 502090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45086: 8652 mv a2,s4 + 83f45088: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4508a: 8a2a mv s4,a0 + memset(ptr, 0, size); + 83f4508c: 6f1060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f45090: 8526 mv a0,s1 + st->X = (float*)mem_alloc((13+1)*N*sizeof(float)); + 83f45092: 05443423 sd s4,72(s0) + 83f45096: 4ee090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4509a: 8626 mv a2,s1 + 83f4509c: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4509e: 8a2a mv s4,a0 + memset(ptr, 0, size); + 83f450a0: 6dd060ef jal ra,83f4bf7c + st->Y = (float*)mem_alloc(N*sizeof(float)); + 83f450a4: 07443423 sd s4,104(s0) + st->E = (float*)mem_alloc(N*sizeof(float)); + st->W = (float*)mem_alloc(13*N*sizeof(float)); + 83f450a8: 4a69 li s4,26 + 83f450aa: 035a0a3b mulw s4,s4,s5 + uintptr_t *ptr = pvPortMalloc(size); + 83f450ae: 8526 mv a0,s1 + 83f450b0: 4d4090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f450b4: 8626 mv a2,s1 + 83f450b6: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f450b8: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f450ba: 6c3060ef jal ra,83f4bf7c + st->E = (float*)mem_alloc(N*sizeof(float)); + 83f450be: 07743823 sd s7,112(s0) +#ifdef TWO_FILTER + st->foreground = (float*)mem_alloc(13*N*sizeof(float)); +#endif + st->PHI = (float*)mem_alloc(N*sizeof(float)); + st->power = (float*)mem_alloc((frame_size+1)*sizeof(float)); + 83f450c2: 2a85 addiw s5,s5,1 + uintptr_t *ptr = pvPortMalloc(size); + 83f450c4: 002a9a9b slliw s5,s5,0x2 + 83f450c8: 002a1b9b slliw s7,s4,0x2 + 83f450cc: 855e mv a0,s7 + 83f450ce: 4b6090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f450d2: 865e mv a2,s7 + 83f450d4: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f450d6: 8caa mv s9,a0 + memset(ptr, 0, size); + 83f450d8: 6a5060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f450dc: 855e mv a0,s7 + st->W = (float*)mem_alloc(13*N*sizeof(float)); + 83f450de: 09943023 sd s9,128(s0) + 83f450e2: 4a2090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f450e6: 865e mv a2,s7 + 83f450e8: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f450ea: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f450ec: 691060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f450f0: 8526 mv a0,s1 + st->foreground = (float*)mem_alloc(13*N*sizeof(float)); + 83f450f2: 09743423 sd s7,136(s0) + 83f450f6: 48e090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f450fa: 8626 mv a2,s1 + 83f450fc: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f450fe: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f45100: 67d060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f45104: 8556 mv a0,s5 + st->PHI = (float*)mem_alloc(N*sizeof(float)); + 83f45106: 07743c23 sd s7,120(s0) + 83f4510a: 47a090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4510e: 8656 mv a2,s5 + 83f45110: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f45112: 8baa mv s7,a0 + memset(ptr, 0, size); + 83f45114: 669060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f45118: 8556 mv a0,s5 + st->power = (float*)mem_alloc((frame_size+1)*sizeof(float)); + 83f4511a: 0b743023 sd s7,160(s0) + 83f4511e: 466090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45122: 8656 mv a2,s5 + 83f45124: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f45126: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f45128: 655060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4512c: 8526 mv a0,s1 + st->power_1 = (float*)mem_alloc((frame_size+1)*sizeof(float)); + 83f4512e: 0b543423 sd s5,168(s0) + 83f45132: 452090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45136: 8626 mv a2,s1 + 83f45138: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4513a: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f4513c: 641060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f45140: 03400513 li a0,52 + st->window = (float*)mem_alloc(N*sizeof(float)); + 83f45144: 0f543423 sd s5,232(s0) + 83f45148: 43c090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4514c: 03400613 li a2,52 + 83f45150: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f45152: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f45154: 629060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f45158: 8526 mv a0,s1 + st->prop = (float*)mem_alloc(13*sizeof(float)); + 83f4515a: 0f543823 sd s5,240(s0) + 83f4515e: 426090ef jal ra,83f4e584 + 83f45162: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f45164: 8626 mv a2,s1 + 83f45166: 4581 li a1,0 + 83f45168: 615060ef jal ra,83f4bf7c + st->wtmp = (float*)mem_alloc(N*sizeof(float)); + 83f4516c: 0b543823 sd s5,176(s0) + st->W = (float*)mem_alloc(13*N*sizeof(float)); + 83f45170: 000a0a9b sext.w s5,s4 + for (i=0;i + st->window[i] = .5f-.5f*(float)cos(2*M_PI*i/N); /* Hanning window */ + 83f45178: d20b0953 fcvt.d.w fs2,s6 + 83f4517c: 4481 li s1,0 + 83f4517e: 0000d797 auipc a5,0xd + 83f45182: 16a7b487 fld fs1,362(a5) # 83f522e8 <__func__.1+0xf0> + 83f45186: d2048553 fcvt.d.w fa0,s1 + 83f4518a: 12957553 fmul.d fa0,fa0,fs1 + 83f4518e: 1b257553 fdiv.d fa0,fa0,fs2 + 83f45192: f40fb0ef jal ra,83f408d2 + 83f45196: 40157553 fcvt.s.d fa0,fa0 + 83f4519a: 747c ld a5,232(s0) + 83f4519c: 00249713 slli a4,s1,0x2 + 83f451a0: 4085754b fnmsub.s fa0,fa0,fs0,fs0 + 83f451a4: 97ba add a5,a5,a4 + for (i=0;iwindow[i] = .5f-.5f*(float)cos(2*M_PI*i/N); /* Hanning window */ + 83f451ac: 00a7a027 fsw fa0,0(a5) + for (i=0;i + for (i=0;i<=st->frame_size;i++) + 83f451b4: 4018 lw a4,0(s0) + 83f451b6: 4781 li a5,0 + 83f451b8: 02074263 bltz a4,83f451dc + st->power_1[i] = FLOAT_ONE; + 83f451bc: 0000d717 auipc a4,0xd + 83f451c0: 09472787 flw fa5,148(a4) # 83f52250 <__func__.1+0x58> + 83f451c4: 7458 ld a4,168(s0) + 83f451c6: 00279693 slli a3,a5,0x2 + for (i=0;i<=st->frame_size;i++) + 83f451ca: 0785 addi a5,a5,1 + st->power_1[i] = FLOAT_ONE; + 83f451cc: 9736 add a4,a4,a3 + 83f451ce: 00f72027 fsw fa5,0(a4) + for (i=0;i<=st->frame_size;i++) + 83f451d2: 4014 lw a3,0(s0) + 83f451d4: 0007871b sext.w a4,a5 + 83f451d8: fee6d6e3 bge a3,a4,83f451c4 + for (i=0;i + 83f451e0: 3a7d addiw s4,s4,-1 + 83f451e2: 020a1793 slli a5,s4,0x20 + 83f451e6: 01e7da13 srli s4,a5,0x1e + 83f451ea: 0a11 addi s4,s4,4 + 83f451ec: 4781 li a5,0 + st->W[i] = 0; + 83f451ee: 6058 ld a4,128(s0) + 83f451f0: 973e add a4,a4,a5 + 83f451f2: 00072023 sw zero,0(a4) + for (i=0;i + { + float sum = 0; + /* Ratio of ~10 between adaptation rate of first and last block */ + float decay = (float)math_exp(-(2.4/M)); + 83f451fc: d2090553 fcvt.d.w fa0,s2 + 83f45200: 0000d797 auipc a5,0xd + 83f45204: 0f07b787 fld fa5,240(a5) # 83f522f0 <__func__.1+0xf8> + 83f45208: 1aa7f553 fdiv.d fa0,fa5,fa0 + 83f4520c: 22a51553 fneg.d fa0,fa0 + 83f45210: 9d1fb0ef jal ra,83f40be0 + st->prop[0] = .7f; + 83f45214: 787c ld a5,240(s0) + 83f45216: 0000d717 auipc a4,0xd + 83f4521a: 07272787 flw fa5,114(a4) # 83f52288 <__func__.1+0x90> + sum = st->prop[0]; + for (i=1;iprop[0] = .7f; + 83f45220: 00f7a027 fsw fa5,0(a5) + sum = st->prop[0]; + 83f45224: 787c ld a5,240(s0) + float decay = (float)math_exp(-(2.4/M)); + 83f45226: 40157553 fcvt.s.d fa0,fa0 + st->prop[i] = st->prop[i-1] * decay; + sum = sum + st->prop[i]; + } + for (i=M-1;i>=0;i--) { + 83f4522a: fff9869b addiw a3,s3,-1 + sum = st->prop[0]; + 83f4522e: 0007a787 flw fa5,0(a5) + for (i=1;i + 83f45236: 397d addiw s2,s2,-1 + 83f45238: 02091713 slli a4,s2,0x20 + 83f4523c: 01e75913 srli s2,a4,0x1e + sum = st->prop[0]; + 83f45240: 20f78753 fmv.s fa4,fa5 + for (i=1;i + 83f45248: 0711 addi a4,a4,4 + st->prop[i] = st->prop[i-1] * decay; + 83f4524a: 10a7f7d3 fmul.s fa5,fa5,fa0 + 83f4524e: 97ba add a5,a5,a4 + 83f45250: 00f7a027 fsw fa5,0(a5) + sum = sum + st->prop[i]; + 83f45254: 787c ld a5,240(s0) + 83f45256: 00e785b3 add a1,a5,a4 + 83f4525a: 0005a787 flw fa5,0(a1) + 83f4525e: 00f77753 fadd.s fa4,fa4,fa5 + for (i=1;i + 83f45266: 0000d617 auipc a2,0xd + 83f4526a: 03e62687 flw fa3,62(a2) # 83f522a4 <__func__.1+0xac> + 83f4526e: 00269713 slli a4,a3,0x2 + for (i=M-1;i>=0;i--) { + 83f45272: 567d li a2,-1 + 83f45274: a011 j 83f45278 + st->prop[i] = (.8f * st->prop[i])/sum; + 83f45276: 787c ld a5,240(s0) + 83f45278: 97ba add a5,a5,a4 + 83f4527a: 0007a787 flw fa5,0(a5) + for (i=M-1;i>=0;i--) { + 83f4527e: 36fd addiw a3,a3,-1 + 83f45280: 1771 addi a4,a4,-4 + st->prop[i] = (.8f * st->prop[i])/sum; + 83f45282: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f45286: 18e7f7d3 fdiv.s fa5,fa5,fa4 + 83f4528a: 00f7a027 fsw fa5,0(a5) + for (i=M-1;i>=0;i--) { + 83f4528e: fec694e3 bne a3,a2,83f45276 + uintptr_t *ptr = pvPortMalloc(size); + 83f45292: 4511 li a0,4 + 83f45294: 2f0090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f45298: 4611 li a2,4 + 83f4529a: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4529c: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f4529e: 4df060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f452a2: 4511 li a0,4 + } + } + + st->memX = (float*)mem_alloc(sizeof(float)); + 83f452a4: 10943023 sd s1,256(s0) + 83f452a8: 2dc090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f452ac: 4611 li a2,4 + 83f452ae: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f452b0: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f452b2: 4cb060ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f452b6: 4511 li a0,4 + st->memD = (float*)mem_alloc(sizeof(float)); + 83f452b8: 10943423 sd s1,264(s0) + 83f452bc: 2c8090ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f452c0: 4611 li a2,4 + 83f452c2: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f452c4: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f452c6: 4b7060ef jal ra,83f4bf7c + st->memE = (float*)mem_alloc(sizeof(float)); + st->preemph = .9f; + 83f452ca: 0000d797 auipc a5,0xd + 83f452ce: fb67a787 flw fa5,-74(a5) # 83f52280 <__func__.1+0x88> + + if (st->sampling_rate<12000) + 83f452d2: 4c58 lw a4,28(s0) + 83f452d4: 678d lui a5,0x3 + st->memE = (float*)mem_alloc(sizeof(float)); + 83f452d6: 10943823 sd s1,272(s0) + st->preemph = .9f; + 83f452da: 10f42c27 fsw fa5,280(s0) + if (st->sampling_rate<12000) + 83f452de: edf78793 addi a5,a5,-289 # 2edf <_EL1_STACK_SIZE+0x26df> + 83f452e2: 02e7d263 bge a5,a4,83f45306 + st->notch_radius = .9f; + else if (st->sampling_rate<24000) + 83f452e6: 6799 lui a5,0x6 + 83f452e8: dbf78793 addi a5,a5,-577 # 5dbf <_EL1_STACK_SIZE+0x55bf> + 83f452ec: 00e7c963 blt a5,a4,83f452fe + st->notch_radius = .982f; + 83f452f0: 0000d797 auipc a5,0xd + 83f452f4: f947a787 flw fa5,-108(a5) # 83f52284 <__func__.1+0x8c> + 83f452f8: 10f42e27 fsw fa5,284(s0) + 83f452fc: a039 j 83f4530a + else + st->notch_radius = .992f; + 83f452fe: 0000d797 auipc a5,0xd + 83f45302: faa7a787 flw fa5,-86(a5) # 83f522a8 <__func__.1+0xb0> + 83f45306: 10f42e27 fsw fa5,284(s0) + uintptr_t *ptr = pvPortMalloc(size); + 83f4530a: 4521 li a0,8 + 83f4530c: 278090ef jal ra,83f4e584 + 83f45310: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f45312: 4621 li a2,8 + 83f45314: 4581 li a1,0 + 83f45316: 467060ef jal ra,83f4bf7c + st->notch_mem = (float*)mem_alloc(2*sizeof(float)); + 83f4531a: 12943023 sd s1,288(s0) + for (i=0;i<2;i++) + st->notch_mem[i] = 0; + 83f4531e: 0004a023 sw zero,0(s1) + 83f45322: 12043683 ld a3,288(s0) + + st->adapted = 0; + st->Pey = st->Pyy = FLOAT_ONE; + 83f45326: 3f800737 lui a4,0x3f800 + 83f4532a: 02071793 slli a5,a4,0x20 + st->notch_mem[i] = 0; + 83f4532e: 0006a223 sw zero,4(a3) # ffffffffffff8004 <_end+0xffffffff7bff82c4> + st->Pey = st->Pyy = FLOAT_ONE; + 83f45332: 97ba add a5,a5,a4 + 83f45334: f07c sd a5,224(s0) +#ifdef TWO_FILTER + st->Davg1 = st->Davg2 = FLOAT_ZERO; + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; +#endif + + st->aec_min_leak = .005f; + 83f45336: 0000d797 auipc a5,0xd + 83f4533a: fc27b783 ld a5,-62(a5) # 83f522f8 <__func__.1+0x100> + 83f4533e: 12f43423 sd a5,296(s0) + st->aec_var1_smooth = .36f; + st->aec_var2_smooth = .7225f; + 83f45342: 0000d797 auipc a5,0xd + 83f45346: fbe7b783 ld a5,-66(a5) # 83f52300 <__func__.1+0x108> + 83f4534a: 12f43823 sd a5,304(s0) + st->aec_var1_update = .5f; + st->aec_var2_update = .25f; + 83f4534e: 0000d797 auipc a5,0xd + 83f45352: fba7b783 ld a5,-70(a5) # 83f52308 <__func__.1+0x110> + st->adapted = 0; + 83f45356: 00042823 sw zero,16(s0) + st->Davg1 = st->Davg2 = FLOAT_ZERO; + 83f4535a: 08043823 sd zero,144(s0) + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; + 83f4535e: 08043c23 sd zero,152(s0) + st->aec_var2_update = .25f; + 83f45362: 12f43c23 sd a5,312(s0) + st->aec_var_backtrack = 4.f; + + st->echo_cnt = 0; + 83f45366: 14043423 sd zero,328(s0) + + return st; + +} + 83f4536a: 70e6 ld ra,120(sp) + 83f4536c: 8522 mv a0,s0 + 83f4536e: 7446 ld s0,112(sp) + 83f45370: 74a6 ld s1,104(sp) + 83f45372: 7906 ld s2,96(sp) + 83f45374: 69e6 ld s3,88(sp) + 83f45376: 6a46 ld s4,80(sp) + 83f45378: 6aa6 ld s5,72(sp) + 83f4537a: 6b06 ld s6,64(sp) + 83f4537c: 7be2 ld s7,56(sp) + 83f4537e: 7c42 ld s8,48(sp) + 83f45380: 7ca2 ld s9,40(sp) + 83f45382: 2462 fld fs0,24(sp) + 83f45384: 24c2 fld fs1,16(sp) + 83f45386: 2922 fld fs2,8(sp) + 83f45388: 6109 addi sp,sp,128 + 83f4538a: 8082 ret + for (i=M-1;i>=0;i--) { + 83f4538c: f006c3e3 bltz a3,83f45292 + sum = st->prop[0]; + 83f45390: 20f78753 fmv.s fa4,fa5 + 83f45394: bdc9 j 83f45266 + +0000000083f45396 : + + int i, M, N; + + st->cancel_count = 0; + st->screwed_up = 0; + N = st->window_size; + 83f45396: 4150 lw a2,4(a0) + st->cancel_count = 0; + 83f45398: 00052623 sw zero,12(a0) + st->screwed_up = 0; + 83f4539c: 00052c23 sw zero,24(a0) + M = st->M; + + M = M; + for (i=0;i + st->W[i] = 0; + 83f453b6: 6158 ld a4,128(a0) + 83f453b8: 973e add a4,a4,a5 + 83f453ba: 00072023 sw zero,0(a4) # 3f800000 + for (i=0;i + 83f453c4: 4781 li a5,0 +#ifdef TWO_FILTER + for (i=0;iforeground[i] = 0; + 83f453c6: 6558 ld a4,136(a0) + 83f453c8: 973e add a4,a4,a5 + 83f453ca: 00072023 sw zero,0(a4) + for (i=0;i +#endif + for (i=0;i + st->X[i] = 0; + 83f453e8: 6538 ld a4,72(a0) + 83f453ea: 973e add a4,a4,a5 + 83f453ec: 00072023 sw zero,0(a4) + for (i=0;i + for (i=0;i<=st->frame_size;i++) { + 83f453f6: 411c lw a5,0(a0) + 83f453f8: 4701 li a4,0 + 83f453fa: 0407cd63 bltz a5,83f45454 + st->power[i] = 0; + st->power_1[i] = FLOAT_ONE; + 83f453fe: 0000d797 auipc a5,0xd + 83f45402: e527a787 flw fa5,-430(a5) # 83f52250 <__func__.1+0x58> + st->power[i] = 0; + 83f45406: 7154 ld a3,160(a0) + 83f45408: 00271793 slli a5,a4,0x2 + for (i=0;i<=st->frame_size;i++) { + 83f4540c: 0705 addi a4,a4,1 + st->power[i] = 0; + 83f4540e: 96be add a3,a3,a5 + 83f45410: 0006a023 sw zero,0(a3) + st->power_1[i] = FLOAT_ONE; + 83f45414: 7554 ld a3,168(a0) + for (i=0;i<=st->frame_size;i++) { + 83f45416: 0007059b sext.w a1,a4 + st->power_1[i] = FLOAT_ONE; + 83f4541a: 96be add a3,a3,a5 + 83f4541c: 00f6a027 fsw fa5,0(a3) + st->Eh[i] = 0; + 83f45420: 6974 ld a3,208(a0) + 83f45422: 96be add a3,a3,a5 + 83f45424: 0006a023 sw zero,0(a3) + st->Yh[i] = 0; + 83f45428: 6d74 ld a3,216(a0) + 83f4542a: 97b6 add a5,a5,a3 + 83f4542c: 0007a023 sw zero,0(a5) + for (i=0;i<=st->frame_size;i++) { + 83f45430: 4114 lw a3,0(a0) + 83f45432: fcb6dae3 bge a3,a1,83f45406 + } + for (i=0;iframe_size;i++) { + 83f45436: 4781 li a5,0 + 83f45438: 00d05e63 blez a3,83f45454 + st->last_y[i] = 0; + 83f4543c: 7138 ld a4,96(a0) + 83f4543e: 00279693 slli a3,a5,0x2 + for (i=0;iframe_size;i++) { + 83f45442: 0785 addi a5,a5,1 + st->last_y[i] = 0; + 83f45444: 9736 add a4,a4,a3 + 83f45446: 00072023 sw zero,0(a4) + for (i=0;iframe_size;i++) { + 83f4544a: 4114 lw a3,0(a0) + 83f4544c: 0007871b sext.w a4,a5 + 83f45450: fed746e3 blt a4,a3,83f4543c + } + for (i=0;i + st->E[i] = 0; + 83f4545e: 7938 ld a4,112(a0) + 83f45460: 973e add a4,a4,a5 + 83f45462: 00072023 sw zero,0(a4) + for (i=0;i + 83f4546c: 4781 li a5,0 + } + for (i=0;ix[i] = 0; + 83f4546e: 6138 ld a4,64(a0) + 83f45470: 973e add a4,a4,a5 + 83f45472: 00072023 sw zero,0(a4) + for (i=0;i + } + for (i=0;i<2;i++) + st->notch_mem[i] = 0; + 83f4547c: 12053683 ld a3,288(a0) + st->memX[i] = 0; + + st->saturated = 0; + st->adapted = 0; + st->sum_adapt = 0; + st->Pey = st->Pyy = FLOAT_ONE; + 83f45480: 3f800737 lui a4,0x3f800 + 83f45484: 02071793 slli a5,a4,0x20 + st->notch_mem[i] = 0; + 83f45488: 0006a023 sw zero,0(a3) + 83f4548c: 12053683 ld a3,288(a0) + st->Pey = st->Pyy = FLOAT_ONE; + 83f45490: 97ba add a5,a5,a4 + st->notch_mem[i] = 0; + 83f45492: 0006a223 sw zero,4(a3) + st->memD[i] = st->memE[i] = 0; + 83f45496: 11053703 ld a4,272(a0) + 83f4549a: 00072023 sw zero,0(a4) # 3f800000 + 83f4549e: 10853703 ld a4,264(a0) + 83f454a2: 00072023 sw zero,0(a4) + st->memX[i] = 0; + 83f454a6: 10053703 ld a4,256(a0) + 83f454aa: 00072023 sw zero,0(a4) + st->adapted = 0; + 83f454ae: 00053823 sd zero,16(a0) + st->sum_adapt = 0; + 83f454b2: 02052623 sw zero,44(a0) + st->Pey = st->Pyy = FLOAT_ONE; + 83f454b6: f17c sd a5,224(a0) +#ifdef TWO_FILTER + st->Davg1 = st->Davg2 = FLOAT_ZERO; + 83f454b8: 08053823 sd zero,144(a0) + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; + 83f454bc: 08053c23 sd zero,152(a0) +#endif + +} + 83f454c0: 8082 ret + +0000000083f454c2 : + +EXPORT void LP_AEC_free(LinearEchoState *st) +{ + 83f454c2: 1141 addi sp,sp,-16 + 83f454c4: e406 sd ra,8(sp) + 83f454c6: e022 sd s0,0(sp) + 83f454c8: 842a mv s0,a0 + + speech_fft_free(st->fft_table); + 83f454ca: 7d68 ld a0,248(a0) + 83f454cc: 3b9030ef jal ra,83f49084 + vPortFree(ptr); + 83f454d0: 7c08 ld a0,56(s0) + 83f454d2: 218090ef jal ra,83f4e6ea + 83f454d6: 6028 ld a0,64(s0) + 83f454d8: 212090ef jal ra,83f4e6ea + 83f454dc: 6828 ld a0,80(s0) + 83f454de: 20c090ef jal ra,83f4e6ea + 83f454e2: 6c28 ld a0,88(s0) + 83f454e4: 206090ef jal ra,83f4e6ea + 83f454e8: 7028 ld a0,96(s0) + 83f454ea: 200090ef jal ra,83f4e6ea + 83f454ee: 6068 ld a0,192(s0) + 83f454f0: 1fa090ef jal ra,83f4e6ea + 83f454f4: 7c48 ld a0,184(s0) + 83f454f6: 1f4090ef jal ra,83f4e6ea + 83f454fa: 6468 ld a0,200(s0) + 83f454fc: 1ee090ef jal ra,83f4e6ea + 83f45500: 6c68 ld a0,216(s0) + 83f45502: 1e8090ef jal ra,83f4e6ea + 83f45506: 6868 ld a0,208(s0) + 83f45508: 1e2090ef jal ra,83f4e6ea + 83f4550c: 6428 ld a0,72(s0) + 83f4550e: 1dc090ef jal ra,83f4e6ea + 83f45512: 7428 ld a0,104(s0) + 83f45514: 1d6090ef jal ra,83f4e6ea + 83f45518: 7828 ld a0,112(s0) + 83f4551a: 1d0090ef jal ra,83f4e6ea + 83f4551e: 6048 ld a0,128(s0) + 83f45520: 1ca090ef jal ra,83f4e6ea + 83f45524: 6448 ld a0,136(s0) + 83f45526: 1c4090ef jal ra,83f4e6ea + 83f4552a: 7c28 ld a0,120(s0) + 83f4552c: 1be090ef jal ra,83f4e6ea + 83f45530: 7048 ld a0,160(s0) + 83f45532: 1b8090ef jal ra,83f4e6ea + 83f45536: 7448 ld a0,168(s0) + 83f45538: 1b2090ef jal ra,83f4e6ea + 83f4553c: 7468 ld a0,232(s0) + 83f4553e: 1ac090ef jal ra,83f4e6ea + 83f45542: 7868 ld a0,240(s0) + 83f45544: 1a6090ef jal ra,83f4e6ea + 83f45548: 7848 ld a0,176(s0) + 83f4554a: 1a0090ef jal ra,83f4e6ea + 83f4554e: 10043503 ld a0,256(s0) + 83f45552: 198090ef jal ra,83f4e6ea + 83f45556: 10843503 ld a0,264(s0) + 83f4555a: 190090ef jal ra,83f4e6ea + 83f4555e: 11043503 ld a0,272(s0) + 83f45562: 188090ef jal ra,83f4e6ea + 83f45566: 12043503 ld a0,288(s0) + 83f4556a: 180090ef jal ra,83f4e6ea + 83f4556e: 8522 mv a0,s0 + mem_free(st->memD); + mem_free(st->memE); + mem_free(st->notch_mem); + + mem_free(st); +} + 83f45570: 6402 ld s0,0(sp) + 83f45572: 60a2 ld ra,8(sp) + 83f45574: 0141 addi sp,sp,16 + 83f45576: 1740906f j 83f4e6ea + +0000000083f4557a : + +EXPORT void LP_AEC(LinearEchoState *st, const short *in, const short *far_end, short *out) +{ + 83f4557a: 7155 addi sp,sp,-208 + 83f4557c: e1a2 sd s0,192(sp) + 83f4557e: f54e sd s3,168(sp) + 83f45580: ed56 sd s5,152(sp) + 83f45582: e586 sd ra,200(sp) + 83f45584: fd26 sd s1,184(sp) + 83f45586: f94a sd s2,176(sp) + 83f45588: f152 sd s4,160(sp) + 83f4558a: e95a sd s6,144(sp) + 83f4558c: e55e sd s7,136(sp) + 83f4558e: e162 sd s8,128(sp) + 83f45590: fce6 sd s9,120(sp) + 83f45592: f8ea sd s10,112(sp) + 83f45594: f4ee sd s11,104(sp) + 83f45596: aca2 fsd fs0,88(sp) + 83f45598: a8a6 fsd fs1,80(sp) + 83f4559a: a4ca fsd fs2,72(sp) + 83f4559c: a0ce fsd fs3,64(sp) + 83f4559e: bc52 fsd fs4,56(sp) + 83f455a0: b856 fsd fs5,48(sp) + 83f455a2: b45a fsd fs6,40(sp) + 83f455a4: b05e fsd fs7,32(sp) + 83f455a6: ac62 fsd fs8,24(sp) + 83f455a8: a866 fsd fs9,16(sp) + 83f455aa: 842a mv s0,a0 + float alpha, alpha_1; + float RER; /* Residual to Error Ratio */ + float tmp32; + + + if (st->echo_cnt > (st->sampling_rate/st->frame_size*3)) { + 83f455ac: 4c5c lw a5,28(s0) + 83f455ae: 4108 lw a0,0(a0) + 83f455b0: 14843803 ld a6,328(s0) +{ + 83f455b4: e436 sd a3,8(sp) + if (st->echo_cnt > (st->sampling_rate/st->frame_size*3)) { + 83f455b6: 02a7c73b divw a4,a5,a0 +{ + 83f455ba: 89ae mv s3,a1 + 83f455bc: 8ab2 mv s5,a2 + if (st->echo_cnt > (st->sampling_rate/st->frame_size*3)) { + 83f455be: 0017179b slliw a5,a4,0x1 + 83f455c2: 9f3d addw a4,a4,a5 + 83f455c4: 2d075be3 bge a4,a6,83f4609a + M = st->M; /* from parameter */ + 83f455c8: 00842903 lw s2,8(s0) + st->echo_cnt = (st->sampling_rate/st->frame_size*3)+1; /* avoid cnt overflow */ + 83f455cc: 0017079b addiw a5,a4,1 + 83f455d0: 14f43423 sd a5,328(s0) + } else { + M = st->initial_filter_len; + } + + N = st->window_size; + st->cancel_count++; + 83f455d4: 445c lw a5,12(s0) + + /******************************************************************************/ + /* TX Signal Preprocessing*/ + /******************************************************************************/ + /* Apply DC filter to make sure DC doesn't end up causing problems */ + DC_filter(in, st->notch_radius, st->input, st->frame_size, st->notch_mem); + 83f455d6: 12043683 ld a3,288(s0) + 83f455da: 682c ld a1,80(s0) + 83f455dc: 11c42507 flw fa0,284(s0) + st->cancel_count++; + 83f455e0: 2785 addiw a5,a5,1 + 83f455e2: c45c sw a5,12(s0) + DC_filter(in, st->notch_radius, st->input, st->frame_size, st->notch_mem); + 83f455e4: 862a mv a2,a0 + 83f455e6: 854e mv a0,s3 + N = st->window_size; + 83f455e8: 4044 lw s1,4(s0) + ss = st->ss / M; + 83f455ea: 14042907 flw fs2,320(s0) + DC_filter(in, st->notch_radius, st->input, st->frame_size, st->notch_mem); + 83f455ee: 465000ef jal ra,83f46252 + + /* Copy input data to buffer and apply pre-emphasis filter */ + for (i=0;iframe_size;i++) { + 83f455f2: 401c lw a5,0(s0) + ss = st->ss / M; + 83f455f4: d00974d3 fcvt.s.w fs1,s2 + for (i=0;iframe_size;i++) { + 83f455f8: 4701 li a4,0 + 83f455fa: 08f05e63 blez a5,83f45696 + float tmp32; + /* H = 1-0.9z^(-1), FIR filter */ + /* tmp32 = input(n) - preemph * input(n-1), input(n) is d(n) */ + tmp32 = st->input[i] - st->preemph * st->memD[0]; + 83f455fe: 6834 ld a3,80(s0) + 83f45600: 10843783 ld a5,264(s0) + 83f45604: 00271613 slli a2,a4,0x2 + 83f45608: 96b2 add a3,a3,a2 + 83f4560a: 0006a707 flw fa4,0(a3) + 83f4560e: 0007a687 flw fa3,0(a5) + 83f45612: 11842787 flw fa5,280(s0) + st->memD[0] = st->input[i]; + 83f45616: 00e7a027 fsw fa4,0(a5) + st->input[i] = tmp32; + 83f4561a: 683c ld a5,80(s0) + tmp32 = st->input[i] - st->preemph * st->memD[0]; + 83f4561c: 70d7f7cb fnmsub.s fa5,fa5,fa3,fa4 + for (i=0;iframe_size;i++) { + 83f45620: 0705 addi a4,a4,1 + st->input[i] = tmp32; + 83f45622: 97b2 add a5,a5,a2 + for (i=0;iframe_size;i++) { + 83f45624: 0007069b sext.w a3,a4 + st->input[i] = tmp32; + 83f45628: 00f7a027 fsw fa5,0(a5) + for (i=0;iframe_size;i++) { + 83f4562c: 401c lw a5,0(s0) + 83f4562e: fcf6c8e3 blt a3,a5,83f455fe + } + + /******************************************************************************/ + /* RX Signal Preprocessing*/ + /******************************************************************************/ + for (i=0;iframe_size;i++) { + 83f45632: 06f05263 blez a5,83f45696 + 83f45636: 85d6 mv a1,s5 + 83f45638: 4601 li a2,0 + 83f4563a: 4681 li a3,0 + float tmp32; + /* x[1:2*frame_size]: |--previous frame--|--current frame--| */ + st->x[i] = st->x[i+st->frame_size]; /* perform pre-emphasis filtering for previous frame */ + 83f4563c: 6038 ld a4,64(s0) + 83f4563e: 9fb5 addw a5,a5,a3 + 83f45640: 078a slli a5,a5,0x2 + 83f45642: 97ba add a5,a5,a4 + 83f45644: 0007a787 flw fa5,0(a5) + 83f45648: 00261793 slli a5,a2,0x2 + 83f4564c: 973e add a4,a4,a5 + 83f4564e: 00f72027 fsw fa5,0(a4) + /* tmp32 = far_end(n) - preemph * far_end(n -1) */ + tmp32 = far_end[i] - st->preemph * st->memX[0]; + 83f45652: 00059703 lh a4,0(a1) + 83f45656: 10043783 ld a5,256(s0) + 83f4565a: 11842787 flw fa5,280(s0) + 83f4565e: d0077753 fcvt.s.w fa4,a4 + 83f45662: 0007a687 flw fa3,0(a5) + st->x[i+st->frame_size] = tmp32; /* perform pre-emphasis filtering for current frame */ + 83f45666: 401c lw a5,0(s0) + 83f45668: 6038 ld a4,64(s0) + tmp32 = far_end[i] - st->preemph * st->memX[0]; + 83f4566a: 70d7f7cb fnmsub.s fa5,fa5,fa3,fa4 + st->x[i+st->frame_size] = tmp32; /* perform pre-emphasis filtering for current frame */ + 83f4566e: 9fb5 addw a5,a5,a3 + 83f45670: 078a slli a5,a5,0x2 + 83f45672: 97ba add a5,a5,a4 + for (i=0;iframe_size;i++) { + 83f45674: 0605 addi a2,a2,1 + st->x[i+st->frame_size] = tmp32; /* perform pre-emphasis filtering for current frame */ + 83f45676: 00f7a027 fsw fa5,0(a5) + st->memX[0] = far_end[i]; + 83f4567a: 00059703 lh a4,0(a1) + 83f4567e: 10043783 ld a5,256(s0) + for (i=0;iframe_size;i++) { + 83f45682: 0006069b sext.w a3,a2 + st->memX[0] = far_end[i]; + 83f45686: d00777d3 fcvt.s.w fa5,a4 + for (i=0;iframe_size;i++) { + 83f4568a: 0589 addi a1,a1,2 + st->memX[0] = far_end[i]; + 83f4568c: 00f7a027 fsw fa5,0(a5) + for (i=0;iframe_size;i++) { + 83f45690: 401c lw a5,0(s0) + 83f45692: faf6c5e3 blt a3,a5,83f4563c + } + + /* Shift the filter length buffer of far-end in frequency domain */ + for (j=M-1;j>=0;j--) { + 83f45696: fff90a1b addiw s4,s2,-1 + 83f4569a: 000a0a9b sext.w s5,s4 + 83f4569e: 040acd63 bltz s5,83f456f8 + 83f456a2: 029a053b mulw a0,s4,s1 + 83f456a6: fff48e1b addiw t3,s1,-1 + 83f456aa: 1e02 slli t3,t3,0x20 + 83f456ac: 020e5e13 srli t3,t3,0x20 + 83f456b0: 0004831b sext.w t1,s1 + 83f456b4: 8856 mv a6,s5 + 83f456b6: 0e05 addi t3,t3,1 + 83f456b8: 5efd li t4,-1 + 83f456ba: 029908bb mulw a7,s2,s1 + for (i=0;i + 83f456c2: 00ae05b3 add a1,t3,a0 + 83f456c6: 40a88633 sub a2,a7,a0 + 83f456ca: 00251713 slli a4,a0,0x2 + 83f456ce: 058a slli a1,a1,0x2 + 83f456d0: 060a slli a2,a2,0x2 + st->X[(j+1)*N+i] = st->X[j*N+i]; + 83f456d2: 643c ld a5,72(s0) + 83f456d4: 00e786b3 add a3,a5,a4 + 83f456d8: 0006a787 flw fa5,0(a3) + 83f456dc: 97b2 add a5,a5,a2 + 83f456de: 97ba add a5,a5,a4 + 83f456e0: 00f7a027 fsw fa5,0(a5) + for (i=0;i + for (j=M-1;j>=0;j--) { + 83f456ea: 387d addiw a6,a6,-1 + 83f456ec: 4065053b subw a0,a0,t1 + 83f456f0: 406888bb subw a7,a7,t1 + 83f456f4: fdd815e3 bne a6,t4,83f456be + } + speech_fft(st->fft_table, st->x, &st->X[0]); + 83f456f8: 6430 ld a2,72(s0) + 83f456fa: 602c ld a1,64(s0) + 83f456fc: 7c68 ld a0,248(s0) + 83f456fe: 19f030ef jal ra,83f4909c + + Sxx = 0; + Sxx += inner_prod(st->x+st->frame_size, st->x+st->frame_size, st->frame_size); /* the variance of x(n) */ + 83f45702: 4010 lw a2,0(s0) + 83f45704: 602c ld a1,64(s0) + 83f45706: 00261793 slli a5,a2,0x2 + 83f4570a: 95be add a1,a1,a5 + 83f4570c: 852e mv a0,a1 + 83f4570e: 3bd000ef jal ra,83f462ca + accum_power_spectrum(st->X, st->Xf, N); /* Xf(k) = pow(X(k)), the power spectrum of X(k) */ + 83f45712: 646c ld a1,200(s0) + 83f45714: 6428 ld a0,72(s0) + 83f45716: 8626 mv a2,s1 + Sxx += inner_prod(st->x+st->frame_size, st->x+st->frame_size, st->frame_size); /* the variance of x(n) */ + 83f45718: 20a50a53 fmv.s fs4,fa0 + accum_power_spectrum(st->X, st->Xf, N); /* Xf(k) = pow(X(k)), the power spectrum of X(k) */ + 83f4571c: 473000ef jal ra,83f4638e + + Sff = 0; +#ifdef TWO_FILTER + /* Compute foreground filter */ + /* Y(k) = X(k) * W(k) */ + accum_spectral_mul(st->X, st->foreground, st->Y, N, M); + 83f45720: 7430 ld a2,104(s0) + 83f45722: 644c ld a1,136(s0) + 83f45724: 6428 ld a0,72(s0) + 83f45726: 874a mv a4,s2 + 83f45728: 86a6 mv a3,s1 + 83f4572a: 4f7000ef jal ra,83f46420 + speech_ifft(st->fft_table, st->Y, st->e); + 83f4572e: 7c10 ld a2,56(s0) + 83f45730: 742c ld a1,104(s0) + 83f45732: 7c68 ld a0,248(s0) + 83f45734: 1d5030ef jal ra,83f49108 + for (i=0;iframe_size;i++) { + 83f45738: 4010 lw a2,0(s0) + 83f4573a: 02c05a63 blez a2,83f4576e + 83f4573e: 4781 li a5,0 + /* e(n) = d(n) - y(n), e(n) use the first part, y(n) use the last part */ + st->e[i] = st->input[i] - st->e[i+st->frame_size]; + 83f45740: 7c18 ld a4,56(s0) + 83f45742: 6834 ld a3,80(s0) + 83f45744: 9e3d addw a2,a2,a5 + 83f45746: 00279593 slli a1,a5,0x2 + 83f4574a: 060a slli a2,a2,0x2 + 83f4574c: 963a add a2,a2,a4 + 83f4574e: 96ae add a3,a3,a1 + 83f45750: 0006a787 flw fa5,0(a3) + 83f45754: 00062707 flw fa4,0(a2) + 83f45758: 972e add a4,a4,a1 + for (i=0;iframe_size;i++) { + 83f4575a: 0785 addi a5,a5,1 + st->e[i] = st->input[i] - st->e[i+st->frame_size]; + 83f4575c: 08e7f7d3 fsub.s fa5,fa5,fa4 + for (i=0;iframe_size;i++) { + 83f45760: 0007869b sext.w a3,a5 + st->e[i] = st->input[i] - st->e[i+st->frame_size]; + 83f45764: 00f72027 fsw fa5,0(a4) + for (i=0;iframe_size;i++) { + 83f45768: 4010 lw a2,0(s0) + 83f4576a: fcc6cbe3 blt a3,a2,83f45740 + } + /* the variance of e(n) */ + Sff += inner_prod(st->e, st->e, st->frame_size); + 83f4576e: 7c0c ld a1,56(s0) + 83f45770: f00009d3 fmv.w.x fs3,zero + 83f45774: 852e mv a0,a1 + 83f45776: 355000ef jal ra,83f462ca +#endif + + /* Adjust proportional adaption rate */ + if (st->adapted) + 83f4577a: 481c lw a5,16(s0) + Sff += inner_prod(st->e, st->e, st->frame_size); + 83f4577c: 013579d3 fadd.s fs3,fa0,fs3 + if (st->adapted) + 83f45780: 180797e3 bnez a5,83f4610e + aec_adjust_prop (st->W, N, M, st->prop); + if (st->saturated == 0) { + 83f45784: 485c lw a5,20(s0) + 83f45786: 10079ee3 bnez a5,83f460a2 + for (j=M-1;j>=0;j--) { + 83f4578a: 080ac563 bltz s5,83f45814 + 83f4578e: 02990dbb mulw s11,s2,s1 + 83f45792: 020a1793 slli a5,s4,0x20 + 83f45796: fff48c9b addiw s9,s1,-1 + 83f4579a: 9381 srli a5,a5,0x20 + 83f4579c: 40f907b3 sub a5,s2,a5 + 83f457a0: 020c9713 slli a4,s9,0x20 + 83f457a4: 40900bbb negw s7,s1 + 83f457a8: 078a slli a5,a5,0x2 + 83f457aa: 01e75c93 srli s9,a4,0x1e + 83f457ae: 002a9d13 slli s10,s5,0x2 + 83f457b2: 029a0a3b mulw s4,s4,s1 + 83f457b6: 0b8a slli s7,s7,0x2 + 83f457b8: 00048c1b sext.w s8,s1 + 83f457bc: 0d8a slli s11,s11,0x2 + 83f457be: ff878b13 addi s6,a5,-8 + 83f457c2: 0c91 addi s9,s9,4 + /* st->X: focus on j+1, means the previous X state, X length is (M+1)*N */ + /* st->E: error in frequency domain */ + /* [0] = matlab[1].re (matlab[1].im = 0), [1] = [2].re, [2] = [2].im, [3] = [3].re, [4] = [3].im, ..., */ + /* [317] = [160].re, [318] = [160].im, [319] = [161].re (matlab[161].im = 0) */ + /* st->PHI: length is window size N */ + weighted_gradient_phi(st->power_1, st->prop[j], &st->X[(j+1)*N], st->E, st->PHI, N); + 83f457c4: 787c ld a5,240(s0) + 83f457c6: 642c ld a1,72(s0) + 83f457c8: 7c34 ld a3,120(s0) + 83f457ca: 97ea add a5,a5,s10 + 83f457cc: 0007a507 flw fa0,0(a5) + 83f457d0: 7830 ld a2,112(s0) + 83f457d2: 7448 ld a0,168(s0) + 83f457d4: 95ee add a1,a1,s11 + 83f457d6: 8726 mv a4,s1 + 83f457d8: 539000ef jal ra,83f46510 + /* compute weight gradient */ + for (i=0;iW[ j*N + i] += st->PHI[i]; + 83f457e0: 4781 li a5,0 + for (i=0;i + st->W[ j*N + i] += st->PHI[i]; + 83f457e6: 6058 ld a4,128(s0) + 83f457e8: 7c34 ld a3,120(s0) + 83f457ea: 00f58633 add a2,a1,a5 + 83f457ee: 9732 add a4,a4,a2 + 83f457f0: 96be add a3,a3,a5 + 83f457f2: 00072787 flw fa5,0(a4) + 83f457f6: 0006a707 flw fa4,0(a3) + for (i=0;iW[ j*N + i] += st->PHI[i]; + 83f457fc: 00e7f7d3 fadd.s fa5,fa5,fa4 + 83f45800: 00f72027 fsw fa5,0(a4) + for (i=0;i + for (j=M-1;j>=0;j--) { + 83f45808: 1d71 addi s10,s10,-4 + 83f4580a: 9dde add s11,s11,s7 + 83f4580c: 418a0a3b subw s4,s4,s8 + 83f45810: fbab1ae3 bne s6,s10,83f457c4 + } else { + st->saturated--; + } + + /* Overlap-store method to let circular convolution become linear convolution */ + for (j=0;j + //if (j==0 || ((2+st->cancel_count)%(M-1)) == j+1) { + if (j==0 || st->cancel_count%(M-1) == j-1) { /* better */ + 83f45824: 460b0163 beqz s6,83f45c86 + 83f45828: 4458 lw a4,12(s0) + 83f4582a: fffb079b addiw a5,s6,-1 + 83f4582e: 0357673b remw a4,a4,s5 + 83f45832: 44f70a63 beq a4,a5,83f45c86 + for (j=0;j + speech_fft(st->fft_table, st->wtmp, &st->W[j*N]); + } + } + + /* Reset to zeros for accumulation */ + for (i=0;i<=st->frame_size;i++) + 83f45840: 4018 lw a4,0(s0) + 83f45842: 4781 li a5,0 + 83f45844: 02074663 bltz a4,83f45870 + st->Rf[i] = st->Yf[i] = st->Xf[i] = 0; + 83f45848: 6478 ld a4,200(s0) + 83f4584a: 00279693 slli a3,a5,0x2 + for (i=0;i<=st->frame_size;i++) + 83f4584e: 0785 addi a5,a5,1 + st->Rf[i] = st->Yf[i] = st->Xf[i] = 0; + 83f45850: 9736 add a4,a4,a3 + 83f45852: 00072023 sw zero,0(a4) + 83f45856: 6078 ld a4,192(s0) + for (i=0;i<=st->frame_size;i++) + 83f45858: 0007861b sext.w a2,a5 + st->Rf[i] = st->Yf[i] = st->Xf[i] = 0; + 83f4585c: 9736 add a4,a4,a3 + 83f4585e: 00072023 sw zero,0(a4) + 83f45862: 7c58 ld a4,184(s0) + 83f45864: 9736 add a4,a4,a3 + 83f45866: 00072023 sw zero,0(a4) + for (i=0;i<=st->frame_size;i++) + 83f4586a: 4018 lw a4,0(s0) + 83f4586c: fcc75ee3 bge a4,a2,83f45848 + Dbf = 0; + See = 0; +#ifdef TWO_FILTER + /* Difference in response, this is used to estimate the variance of the residual power estimate */ + /* st.Y(:) = st.Y(:) + st.X(:, j) .* st.W(:, j); */ + accum_spectral_mul(st->X, st->W, st->Y, N, M); + 83f45870: 7430 ld a2,104(s0) + 83f45872: 604c ld a1,128(s0) + 83f45874: 6428 ld a0,72(s0) + 83f45876: 874a mv a4,s2 + 83f45878: 86a6 mv a3,s1 + 83f4587a: 3a7000ef jal ra,83f46420 + /* st.y : [ ~ | leak background ] */ + speech_ifft(st->fft_table, st->Y, st->y); + 83f4587e: 6c30 ld a2,88(s0) + 83f45880: 742c ld a1,104(s0) + 83f45882: 7c68 ld a0,248(s0) + 83f45884: 085030ef jal ra,83f49108 + for (i=0;iframe_size;i++) { + 83f45888: 4010 lw a2,0(s0) + 83f4588a: 4781 li a5,0 + 83f4588c: 02c05a63 blez a2,83f458c0 + st->e[i] = st->e[i+st->frame_size] - st->y[i+st->frame_size]; + 83f45890: 7c18 ld a4,56(s0) + 83f45892: 6c34 ld a3,88(s0) + 83f45894: 9e3d addw a2,a2,a5 + 83f45896: 060a slli a2,a2,0x2 + 83f45898: 00c705b3 add a1,a4,a2 + 83f4589c: 9636 add a2,a2,a3 + 83f4589e: 00062707 flw fa4,0(a2) + 83f458a2: 0005a787 flw fa5,0(a1) + 83f458a6: 00279693 slli a3,a5,0x2 + 83f458aa: 9736 add a4,a4,a3 + 83f458ac: 08e7f7d3 fsub.s fa5,fa5,fa4 + for (i=0;iframe_size;i++) { + 83f458b0: 0785 addi a5,a5,1 + 83f458b2: 0007869b sext.w a3,a5 + st->e[i] = st->e[i+st->frame_size] - st->y[i+st->frame_size]; + 83f458b6: 00f72027 fsw fa5,0(a4) + for (i=0;iframe_size;i++) { + 83f458ba: 4010 lw a2,0(s0) + 83f458bc: fcc6cae3 blt a3,a2,83f45890 + } + Dbf += 10 + inner_prod(st->e, st->e, st->frame_size); /* the variance of e(n) */ + 83f458c0: 7c0c ld a1,56(s0) + 83f458c2: 852e mv a0,a1 + 83f458c4: 207000ef jal ra,83f462ca + 83f458c8: 0000d797 auipc a5,0xd + 83f458cc: 9e87aa87 flw fs5,-1560(a5) # 83f522b0 <__func__.1+0xb8> + 83f458d0: 01557453 fadd.s fs0,fa0,fs5 + 83f458d4: f00007d3 fmv.w.x fa5,zero + for (i=0;iframe_size;i++) + 83f458d8: 4010 lw a2,0(s0) + Dbf += 10 + inner_prod(st->e, st->e, st->frame_size); /* the variance of e(n) */ + 83f458da: 00f47453 fadd.s fs0,fs0,fa5 + for (i=0;iframe_size;i++) + 83f458de: 02c05b63 blez a2,83f45914 + 83f458e2: 4781 li a5,0 + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + 83f458e4: 6c34 ld a3,88(s0) + 83f458e6: 682c ld a1,80(s0) + 83f458e8: 9e3d addw a2,a2,a5 + 83f458ea: 00279513 slli a0,a5,0x2 + 83f458ee: 060a slli a2,a2,0x2 + 83f458f0: 9636 add a2,a2,a3 + 83f458f2: 95aa add a1,a1,a0 + 83f458f4: 00062707 flw fa4,0(a2) + 83f458f8: 0005a787 flw fa5,0(a1) + 83f458fc: 7c18 ld a4,56(s0) + for (i=0;iframe_size;i++) + 83f458fe: 0785 addi a5,a5,1 + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + 83f45900: 08e7f7d3 fsub.s fa5,fa5,fa4 + 83f45904: 972a add a4,a4,a0 + for (i=0;iframe_size;i++) + 83f45906: 0007869b sext.w a3,a5 + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + 83f4590a: 00f72027 fsw fa5,0(a4) + for (i=0;iframe_size;i++) + 83f4590e: 4010 lw a2,0(s0) + 83f45910: fcc6cae3 blt a3,a2,83f458e4 + See += inner_prod(st->e, st->e, st->frame_size); /* the variance of e(n) */ + 83f45914: 7c0c ld a1,56(s0) + 83f45916: 852e mv a0,a1 + 83f45918: 1b3000ef jal ra,83f462ca + 83f4591c: f00001d3 fmv.w.x ft3,zero +#ifdef TWO_FILTER + /* For two time windows, compute the mean of the energy difference, as well as the variance */ + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + 83f45920: 0000d797 auipc a5,0xd + 83f45924: 9a87a787 flw fa5,-1624(a5) # 83f522c8 <__func__.1+0xd0> + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + 83f45928: 0000d797 auipc a5,0xd + 83f4592c: 99c7a687 flw fa3,-1636(a5) # 83f522c4 <__func__.1+0xcc> + See += inner_prod(st->e, st->e, st->frame_size); /* the variance of e(n) */ + 83f45930: 00357b53 fadd.s fs6,fa0,ft3 + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + 83f45934: 10f9f753 fmul.s fa4,fs3,fa5 + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + 83f45938: 10d9f6d3 fmul.s fa3,fs3,fa3 + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + 83f4593c: 0000d797 auipc a5,0xd + 83f45940: 9787a107 flw ft2,-1672(a5) # 83f522b4 <__func__.1+0xbc> + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + 83f45944: 0000d797 auipc a5,0xd + 83f45948: 9787a087 flw ft1,-1672(a5) # 83f522bc <__func__.1+0xc4> + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + 83f4594c: 0969f7d3 fsub.s fa5,fs3,fs6 + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + 83f45950: 10877753 fmul.s fa4,fa4,fs0 + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + 83f45954: 1086f6d3 fmul.s fa3,fa3,fs0 + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + 83f45958: 09042607 flw fa2,144(s0) + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + 83f4595c: 09442587 flw fa1,148(s0) + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + 83f45960: 1027f153 fmul.s ft2,fa5,ft2 + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + 83f45964: 1017f0d3 fmul.s ft1,fa5,ft1 + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + 83f45968: 09842287 flw ft5,152(s0) + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + 83f4596c: 09c42207 flw ft4,156(s0) + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + 83f45970: 12c42507 flw fa0,300(s0) + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + 83f45974: 13042007 flw ft0,304(s0) + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + 83f45978: 0000d797 auipc a5,0xd + 83f4597c: 9407a387 flw ft7,-1728(a5) # 83f522b8 <__func__.1+0xc0> + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + 83f45980: 0000d797 auipc a5,0xd + 83f45984: 9407a307 flw ft6,-1728(a5) # 83f522c0 <__func__.1+0xc8> + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + 83f45988: 685576c3 fmadd.s fa3,fa0,ft5,fa3 + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + 83f4598c: 10767643 fmadd.s fa2,fa2,ft7,ft2 + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + 83f45990: 70407543 fmadd.s fa0,ft0,ft4,fa4 + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + 83f45994: 0865f5c3 fmadd.s fa1,fa1,ft6,ft1 + + update_foreground = 0; + /* Inspect if there is a statistically significant reduction in the residual echo */ + if (((Sff - See) * ABS(Sff - See)) > (Sff * Dbf)) + 83f45998: a03797d3 flt.s a5,fa5,ft3 + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + 83f4599c: 08d42c27 fsw fa3,152(s0) + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + 83f459a0: 08c42827 fsw fa2,144(s0) + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + 83f459a4: 08a42e27 fsw fa0,156(s0) + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + 83f459a8: 08b42a27 fsw fa1,148(s0) + if (((Sff - See) * ABS(Sff - See)) > (Sff * Dbf)) + 83f459ac: 20f78053 fmv.s ft0,fa5 + 83f459b0: c399 beqz a5,83f459b6 + 83f459b2: 20f79053 fneg.s ft0,fa5 + 83f459b6: 1007f753 fmul.s fa4,fa5,ft0 + 83f459ba: 1089f0d3 fmul.s ft1,fs3,fs0 + 83f459be: a0e097d3 flt.s a5,ft1,fa4 + 83f459c2: e7a1 bnez a5,83f45a0a + update_foreground = 1; + else if ((st->Davg1 * ABS(st->Davg1)) > (st->aec_var1_update * st->Dvar1)) + 83f459c4: f0000753 fmv.w.x fa4,zero + 83f459c8: 20c60153 fmv.s ft2,fa2 + 83f459cc: a0e617d3 flt.s a5,fa2,fa4 + 83f459d0: 66079863 bnez a5,83f46040 + 83f459d4: 13442707 flw fa4,308(s0) + 83f459d8: 102670d3 fmul.s ft1,fa2,ft2 + 83f459dc: 10e6f753 fmul.s fa4,fa3,fa4 + 83f459e0: a01717d3 flt.s a5,fa4,ft1 + 83f459e4: e39d bnez a5,83f45a0a + update_foreground = 1; + else if ((st->Davg2 * ABS(st->Davg2)) > (st->aec_var2_update * st->Dvar2)) + 83f459e6: f0000753 fmv.w.x fa4,zero + 83f459ea: 20b581d3 fmv.s ft3,fa1 + 83f459ee: a0e597d3 flt.s a5,fa1,fa4 + 83f459f2: 000797e3 bnez a5,83f46200 + 83f459f6: 13842707 flw fa4,312(s0) + 83f459fa: 1035f0d3 fmul.s ft1,fa1,ft3 + 83f459fe: 10e57753 fmul.s fa4,fa0,fa4 + 83f45a02: a01717d3 flt.s a5,fa4,ft1 + 83f45a06: 74078263 beqz a5,83f4614a + + if (update_foreground) { /* update foreground filter */ + st->Davg1 = st->Davg2 = FLOAT_ZERO; + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; + /* Copy background filter to foreground filter */ + for (i=0;iDavg1 = st->Davg2 = FLOAT_ZERO; + 83f45a0e: 08043823 sd zero,144(s0) + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; + 83f45a12: 08043c23 sd zero,152(s0) + for (i=0;i + st->foreground[i] = st->W[i]; + 83f45a20: 6054 ld a3,128(s0) + 83f45a22: 6458 ld a4,136(s0) + 83f45a24: 96be add a3,a3,a5 + 83f45a26: 0006a787 flw fa5,0(a3) + 83f45a2a: 973e add a4,a4,a5 + for (i=0;iforeground[i] = st->W[i]; + 83f45a2e: 00f72027 fsw fa5,0(a4) + for (i=0;i + /* Apply a smooth transition to avoid blocking artifacts */ + /* y1(n) = window(n+N/2)y1(n) + window(n)y2(n) */ + for (i=0;iframe_size;i++) + 83f45a36: 4010 lw a2,0(s0) + 83f45a38: 4781 li a5,0 + 83f45a3a: 14c05663 blez a2,83f45b86 + /* Perform windowing and 50% OLA, output = window first part * leak background(new) + window last part * leak forground(old) */ + /* st.e last part still be leak(y) foreground */ + st->e[i+st->frame_size] = st->window[i+st->frame_size] * st->e[i+st->frame_size] + st->window[i] * st->y[i+st->frame_size]; + 83f45a3e: 7474 ld a3,232(s0) + 83f45a40: 6c38 ld a4,88(s0) + 83f45a42: 9e3d addw a2,a2,a5 + 83f45a44: 060a slli a2,a2,0x2 + 83f45a46: 00279593 slli a1,a5,0x2 + 83f45a4a: 9732 add a4,a4,a2 + 83f45a4c: 95b6 add a1,a1,a3 + 83f45a4e: 0005a787 flw fa5,0(a1) + 83f45a52: 00072707 flw fa4,0(a4) + 83f45a56: 7c18 ld a4,56(s0) + 83f45a58: 96b2 add a3,a3,a2 + 83f45a5a: 10e7f753 fmul.s fa4,fa5,fa4 + 83f45a5e: 963a add a2,a2,a4 + 83f45a60: 00062687 flw fa3,0(a2) + 83f45a64: 0006a787 flw fa5,0(a3) + for (i=0;iframe_size;i++) + 83f45a68: 0785 addi a5,a5,1 + 83f45a6a: 0007871b sext.w a4,a5 + st->e[i+st->frame_size] = st->window[i+st->frame_size] * st->e[i+st->frame_size] + st->window[i] * st->y[i+st->frame_size]; + 83f45a6e: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + 83f45a72: 00f62027 fsw fa5,0(a2) + for (i=0;iframe_size;i++) + 83f45a76: 4010 lw a2,0(s0) + 83f45a78: fcc743e3 blt a4,a2,83f45a3e + } +#endif + + Sey = Syy = Sdd = 0; + /* Compute error signal (for the output with de-emphasis) */ + for (i=0;iframe_size;i++) { + 83f45a7c: 10c05563 blez a2,83f45b86 + tmp_out = st->input[i] - st->y[i+st->frame_size]; +#endif + /* H = 1/(1-0.9z^(-1)), IIR, de-emphasis filtering */ + tmp_out = tmp_out + st->preemph * st->memE[0]; + /* this is an arbitrary test for saturation in the mic signal */ + if (in[i] <= -32000 || in[i] >= 32000) { + 83f45a80: 6c21 lui s8,0x8 + 83f45a82: 6bc1 lui s7,0x10 + if (st->saturated == 0) + st->saturated = 1; + } + out[i] = (short)WORD2INT(tmp_out); /* the output data is processed after windowing and OLA cuz e(n) */ + 83f45a84: 6ca1 lui s9,0x8 + 83f45a86: 6aa2 ld s5,8(sp) + 83f45a88: 8b4e mv s6,s3 + for (i=0;iframe_size;i++) { + 83f45a8a: 4901 li s2,0 + 83f45a8c: 0000d797 auipc a5,0xd + 83f45a90: 8047ac07 flw fs8,-2044(a5) # 83f52290 <__func__.1+0x98> + if (in[i] <= -32000 || in[i] >= 32000) { + 83f45a94: cffc0c1b addiw s8,s8,-769 + 83f45a98: 9feb8b93 addi s7,s7,-1538 # f9fe <_EL1_STACK_SIZE+0xf1fe> + st->saturated = 1; + 83f45a9c: 4d05 li s10,1 + out[i] = (short)WORD2INT(tmp_out); /* the output data is processed after windowing and OLA cuz e(n) */ + 83f45a9e: 0000c797 auipc a5,0xc + 83f45aa2: 7f67ac87 flw fs9,2038(a5) # 83f52294 <__func__.1+0x9c> + 83f45aa6: 1cfd addi s9,s9,-1 + 83f45aa8: 0000c797 auipc a5,0xc + 83f45aac: 7f07bb87 fld fs7,2032(a5) # 83f52298 <__func__.1+0xa0> + 83f45ab0: a829 j 83f45aca + 83f45ab2: 00fa9023 sh a5,0(s5) + st->memE[0] = tmp_out; /* state out(n-1) */ + 83f45ab6: 11043703 ld a4,272(s0) + for (i=0;iframe_size;i++) { + 83f45aba: 0009079b sext.w a5,s2 + 83f45abe: 0a89 addi s5,s5,2 + st->memE[0] = tmp_out; /* state out(n-1) */ + 83f45ac0: 00872027 fsw fs0,0(a4) + for (i=0;iframe_size;i++) { + 83f45ac4: 4010 lw a2,0(s0) + 83f45ac6: 08c7d763 bge a5,a2,83f45b54 + tmp_out = st->input[i] - st->e[i+st->frame_size]; + 83f45aca: 6838 ld a4,80(s0) + 83f45acc: 7c1c ld a5,56(s0) + 83f45ace: 00c9063b addw a2,s2,a2 + 83f45ad2: 00291693 slli a3,s2,0x2 + 83f45ad6: 060a slli a2,a2,0x2 + 83f45ad8: 9736 add a4,a4,a3 + 83f45ada: 97b2 add a5,a5,a2 + 83f45adc: 00072407 flw fs0,0(a4) + 83f45ae0: 0007a787 flw fa5,0(a5) + tmp_out = tmp_out + st->preemph * st->memE[0]; + 83f45ae4: 11043703 ld a4,272(s0) + if (in[i] <= -32000 || in[i] >= 32000) { + 83f45ae8: 000b5783 lhu a5,0(s6) + tmp_out = st->input[i] - st->e[i+st->frame_size]; + 83f45aec: 08f477d3 fsub.s fa5,fs0,fa5 + tmp_out = tmp_out + st->preemph * st->memE[0]; + 83f45af0: 00072707 flw fa4,0(a4) + 83f45af4: 11842407 flw fs0,280(s0) + if (in[i] <= -32000 || in[i] >= 32000) { + 83f45af8: 018787bb addw a5,a5,s8 + 83f45afc: 17c2 slli a5,a5,0x30 + 83f45afe: 93c1 srli a5,a5,0x30 + tmp_out = tmp_out + st->preemph * st->memE[0]; + 83f45b00: 78e47443 fmadd.s fs0,fs0,fa4,fa5 + for (i=0;iframe_size;i++) { + 83f45b04: 0905 addi s2,s2,1 + if (in[i] <= -32000 || in[i] >= 32000) { + 83f45b06: 00fbf663 bgeu s7,a5,83f45b12 + if (st->saturated == 0) + 83f45b0a: 485c lw a5,20(s0) + 83f45b0c: e399 bnez a5,83f45b12 + st->saturated = 1; + 83f45b0e: 01a42a23 sw s10,20(s0) + out[i] = (short)WORD2INT(tmp_out); /* the output data is processed after windowing and OLA cuz e(n) */ + 83f45b12: a1841753 flt.s a4,fs0,fs8 + 83f45b16: 77e1 lui a5,0xffff8 + for (i=0;iframe_size;i++) { + 83f45b18: 0b09 addi s6,s6,2 + out[i] = (short)WORD2INT(tmp_out); /* the output data is processed after windowing and OLA cuz e(n) */ + 83f45b1a: ff41 bnez a4,83f45ab2 + 83f45b1c: a08c9753 flt.s a4,fs9,fs0 + 83f45b20: 87e6 mv a5,s9 + 83f45b22: fb41 bnez a4,83f45ab2 + 83f45b24: 42040553 fcvt.d.s fa0,fs0 + for (i=0;iframe_size;i++) { + 83f45b28: 0a89 addi s5,s5,2 + out[i] = (short)WORD2INT(tmp_out); /* the output data is processed after windowing and OLA cuz e(n) */ + 83f45b2a: 03757553 fadd.d fa0,fa0,fs7 + 83f45b2e: e35fa0ef jal ra,83f40962 + 83f45b32: c20517d3 fcvt.w.d a5,fa0,rtz + 83f45b36: 0107979b slliw a5,a5,0x10 + 83f45b3a: 4107d79b sraiw a5,a5,0x10 + 83f45b3e: fefa9f23 sh a5,-2(s5) + st->memE[0] = tmp_out; /* state out(n-1) */ + 83f45b42: 11043703 ld a4,272(s0) + for (i=0;iframe_size;i++) { + 83f45b46: 0009079b sext.w a5,s2 + st->memE[0] = tmp_out; /* state out(n-1) */ + 83f45b4a: 00872027 fsw fs0,0(a4) + for (i=0;iframe_size;i++) { + 83f45b4e: 4010 lw a2,0(s0) + 83f45b50: f6c7cde3 blt a5,a2,83f45aca + } + + /* Compute error signal */ + for (i=0;iframe_size;i++) { + 83f45b54: 02c05963 blez a2,83f45b86 + 83f45b58: 4781 li a5,0 + st->e[i+st->frame_size] = st->e[i]; + 83f45b5a: 7c18 ld a4,56(s0) + 83f45b5c: 00279693 slli a3,a5,0x2 + 83f45b60: 9e3d addw a2,a2,a5 + 83f45b62: 00d705b3 add a1,a4,a3 + 83f45b66: 0005a787 flw fa5,0(a1) + 83f45b6a: 060a slli a2,a2,0x2 + 83f45b6c: 9732 add a4,a4,a2 + 83f45b6e: 00f72027 fsw fa5,0(a4) + st->e[i] = 0; + 83f45b72: 7c18 ld a4,56(s0) + for (i=0;iframe_size;i++) { + 83f45b74: 0785 addi a5,a5,1 + 83f45b76: 0007859b sext.w a1,a5 + st->e[i] = 0; + 83f45b7a: 9736 add a4,a4,a3 + 83f45b7c: 00072023 sw zero,0(a4) + for (i=0;iframe_size;i++) { + 83f45b80: 4010 lw a2,0(s0) + 83f45b82: fcc5cce3 blt a1,a2,83f45b5a + } + + /* Compute a bunch of correlations */ + Sey += inner_prod(st->e+st->frame_size, st->y+st->frame_size, st->frame_size); /* the covariance of e(n) and y(n) */ + 83f45b86: 6c2c ld a1,88(s0) + 83f45b88: 7c08 ld a0,56(s0) + 83f45b8a: 00261793 slli a5,a2,0x2 + 83f45b8e: 95be add a1,a1,a5 + 83f45b90: 953e add a0,a0,a5 + 83f45b92: 738000ef jal ra,83f462ca + Syy += inner_prod(st->y+st->frame_size, st->y+st->frame_size, st->frame_size); /* the variance of y(n) */ + 83f45b96: 4010 lw a2,0(s0) + 83f45b98: 6c2c ld a1,88(s0) + Sey += inner_prod(st->e+st->frame_size, st->y+st->frame_size, st->frame_size); /* the covariance of e(n) and y(n) */ + 83f45b9a: f0000bd3 fmv.w.x fs7,zero + Syy += inner_prod(st->y+st->frame_size, st->y+st->frame_size, st->frame_size); /* the variance of y(n) */ + 83f45b9e: 00261793 slli a5,a2,0x2 + 83f45ba2: 95be add a1,a1,a5 + 83f45ba4: 852e mv a0,a1 + Sey += inner_prod(st->e+st->frame_size, st->y+st->frame_size, st->frame_size); /* the covariance of e(n) and y(n) */ + 83f45ba6: 01757453 fadd.s fs0,fa0,fs7 + Syy += inner_prod(st->y+st->frame_size, st->y+st->frame_size, st->frame_size); /* the variance of y(n) */ + 83f45baa: 720000ef jal ra,83f462ca + Sdd += inner_prod(st->input, st->input, st->frame_size); /* the variance of d(n) */ + 83f45bae: 682c ld a1,80(s0) + 83f45bb0: 4010 lw a2,0(s0) + Syy += inner_prod(st->y+st->frame_size, st->y+st->frame_size, st->frame_size); /* the variance of y(n) */ + 83f45bb2: 01757bd3 fadd.s fs7,fa0,fs7 + Sdd += inner_prod(st->input, st->input, st->frame_size); /* the variance of d(n) */ + 83f45bb6: 852e mv a0,a1 + 83f45bb8: 712000ef jal ra,83f462ca + + speech_fft(st->fft_table, st->e, st->E); + 83f45bbc: 7830 ld a2,112(s0) + 83f45bbe: 7c0c ld a1,56(s0) + 83f45bc0: 7c68 ld a0,248(s0) + Sdd += inner_prod(st->input, st->input, st->frame_size); /* the variance of d(n) */ + 83f45bc2: 20a50c53 fmv.s fs8,fa0 + speech_fft(st->fft_table, st->e, st->E); + 83f45bc6: 4d6030ef jal ra,83f4909c + for (i=0;iframe_size;i++) + 83f45bca: 4018 lw a4,0(s0) + 83f45bcc: 4781 li a5,0 + 83f45bce: 00e05e63 blez a4,83f45bea + st->y[i] = 0; + 83f45bd2: 6c38 ld a4,88(s0) + 83f45bd4: 00279693 slli a3,a5,0x2 + for (i=0;iframe_size;i++) + 83f45bd8: 0785 addi a5,a5,1 + st->y[i] = 0; + 83f45bda: 9736 add a4,a4,a3 + 83f45bdc: 00072023 sw zero,0(a4) + for (i=0;iframe_size;i++) + 83f45be0: 4014 lw a3,0(s0) + 83f45be2: 0007871b sext.w a4,a5 + 83f45be6: fed746e3 blt a4,a3,83f45bd2 + speech_fft(st->fft_table, st->y, st->Y); + 83f45bea: 6c2c ld a1,88(s0) + 83f45bec: 7c68 ld a0,248(s0) + 83f45bee: 7430 ld a2,104(s0) + 83f45bf0: 4ac030ef jal ra,83f4909c + + accum_power_spectrum(st->E, st->Rf, N); /* Rf(k) = the power spectrum of E(k), error power in each frequency bin (N/2+1) */ + 83f45bf4: 7c4c ld a1,184(s0) + 83f45bf6: 7828 ld a0,112(s0) + 83f45bf8: 8626 mv a2,s1 + 83f45bfa: 794000ef jal ra,83f4638e + accum_power_spectrum(st->Y, st->Yf, N); /* Yf(k) = the power spectrum of Y(k) , estimated echo power in each frequency bin (N/2+1) */ + 83f45bfe: 606c ld a1,192(s0) + 83f45c00: 7428 ld a0,104(s0) + 83f45c02: 8626 mv a2,s1 + 83f45c04: 78a000ef jal ra,83f4638e + + + /* Sanity check */ + if (!(Syy>=0 && Sxx>=0 && See >= 0)) { /* things have gone really bad */ + 83f45c08: f00007d3 fmv.w.x fa5,zero + 83f45c0c: a17787d3 fle.s a5,fa5,fs7 + 83f45c10: cfcd beqz a5,83f45cca + Sxx += inner_prod(st->x+st->frame_size, st->x+st->frame_size, st->frame_size); /* the variance of x(n) */ + 83f45c12: 00fa7a53 fadd.s fs4,fs4,fa5 + if (!(Syy>=0 && Sxx>=0 && See >= 0)) { /* things have gone really bad */ + 83f45c16: a14787d3 fle.s a5,fa5,fs4 + 83f45c1a: cbc5 beqz a5,83f45cca + 83f45c1c: a16787d3 fle.s a5,fa5,fs6 + 83f45c20: c7cd beqz a5,83f45cca + st->screwed_up += 50; + for (i=0;iframe_size;i++) + out[i] = 0; + } else if (Sff > (Sdd + (float)(N * 10000))) { /* if foreground error signal is a lot greater than mic in */ + 83f45c22: 6789 lui a5,0x2 + 83f45c24: 7107879b addiw a5,a5,1808 + 83f45c28: 02f487bb mulw a5,s1,a5 + Sdd += inner_prod(st->input, st->input, st->frame_size); /* the variance of d(n) */ + 83f45c2c: 00fc77d3 fadd.s fa5,fs8,fa5 + } else if (Sff > (Sdd + (float)(N * 10000))) { /* if foreground error signal is a lot greater than mic in */ + 83f45c30: d007f753 fcvt.s.w fa4,a5 + 83f45c34: 00f777d3 fadd.s fa5,fa4,fa5 + 83f45c38: a13797d3 flt.s a5,fa5,fs3 + 83f45c3c: 5c078f63 beqz a5,83f4621a + st->screwed_up++; + 83f45c40: 4c18 lw a4,24(s0) + 83f45c42: 0017079b addiw a5,a4,1 + 83f45c46: cc1c sw a5,24(s0) + } else { /* everything is fine */ + st->screwed_up = 0; + } + + if (st->screwed_up>=50) { + 83f45c48: 03100713 li a4,49 + 83f45c4c: 0af75463 bge a4,a5,83f45cf4 + //speech_warning("AEC started behaving unreasonable and need to reset"); + echo_state_reset(st); + 83f45c50: 8522 mv a0,s0 + for (i=0;ilast_y[i] = st->x[i]; + } + #endif + +} + 83f45c52: 640e ld s0,192(sp) + 83f45c54: 60ae ld ra,200(sp) + 83f45c56: 74ea ld s1,184(sp) + 83f45c58: 794a ld s2,176(sp) + 83f45c5a: 79aa ld s3,168(sp) + 83f45c5c: 7a0a ld s4,160(sp) + 83f45c5e: 6aea ld s5,152(sp) + 83f45c60: 6b4a ld s6,144(sp) + 83f45c62: 6baa ld s7,136(sp) + 83f45c64: 6c0a ld s8,128(sp) + 83f45c66: 7ce6 ld s9,120(sp) + 83f45c68: 7d46 ld s10,112(sp) + 83f45c6a: 7da6 ld s11,104(sp) + 83f45c6c: 2466 fld fs0,88(sp) + 83f45c6e: 24c6 fld fs1,80(sp) + 83f45c70: 2926 fld fs2,72(sp) + 83f45c72: 2986 fld fs3,64(sp) + 83f45c74: 3a62 fld fs4,56(sp) + 83f45c76: 3ac2 fld fs5,48(sp) + 83f45c78: 3b22 fld fs6,40(sp) + 83f45c7a: 3b82 fld fs7,32(sp) + 83f45c7c: 2c62 fld fs8,24(sp) + 83f45c7e: 2cc2 fld fs9,16(sp) + 83f45c80: 6169 addi sp,sp,208 + echo_state_reset(st); + 83f45c82: f14ff06f j 83f45396 + speech_ifft(st->fft_table, &st->W[j*N], st->wtmp); + 83f45c86: 604c ld a1,128(s0) + 83f45c88: 7850 ld a2,176(s0) + 83f45c8a: 7c68 ld a0,248(s0) + 83f45c8c: 002c1d13 slli s10,s8,0x2 + 83f45c90: 95ea add a1,a1,s10 + 83f45c92: 476030ef jal ra,83f49108 + for (i=st->frame_size;i + 83f45c9c: 40fb86bb subw a3,s7,a5 + 83f45ca0: 1682 slli a3,a3,0x20 + 83f45ca2: 00178713 addi a4,a5,1 # 2001 <_EL1_STACK_SIZE+0x1801> + 83f45ca6: 9281 srli a3,a3,0x20 + 83f45ca8: 96ba add a3,a3,a4 + 83f45caa: 078a slli a5,a5,0x2 + 83f45cac: 068a slli a3,a3,0x2 + st->wtmp[i] = 0; /* set 0 to the last part */ + 83f45cae: 7858 ld a4,176(s0) + 83f45cb0: 973e add a4,a4,a5 + 83f45cb2: 00072023 sw zero,0(a4) + for (i=st->frame_size;i + speech_fft(st->fft_table, st->wtmp, &st->W[j*N]); + 83f45cbc: 6050 ld a2,128(s0) + 83f45cbe: 784c ld a1,176(s0) + 83f45cc0: 7c68 ld a0,248(s0) + 83f45cc2: 966a add a2,a2,s10 + 83f45cc4: 3d8030ef jal ra,83f4909c + 83f45cc8: b6bd j 83f45836 + st->screwed_up += 50; + 83f45cca: 4c1c lw a5,24(s0) + for (i=0;iframe_size;i++) + 83f45ccc: 4018 lw a4,0(s0) + st->screwed_up += 50; + 83f45cce: 0327879b addiw a5,a5,50 + 83f45cd2: cc1c sw a5,24(s0) + for (i=0;iframe_size;i++) + 83f45cd4: 00e05c63 blez a4,83f45cec + 83f45cd8: 6722 ld a4,8(sp) + 83f45cda: 4781 li a5,0 + out[i] = 0; + 83f45cdc: 00071023 sh zero,0(a4) + for (i=0;iframe_size;i++) + 83f45ce0: 4014 lw a3,0(s0) + 83f45ce2: 2785 addiw a5,a5,1 + 83f45ce4: 0709 addi a4,a4,2 + 83f45ce6: fed7cbe3 blt a5,a3,83f45cdc + if (st->screwed_up>=50) { + 83f45cea: 4c1c lw a5,24(s0) + 83f45cec: 03100713 li a4,49 + 83f45cf0: f6f740e3 blt a4,a5,83f45c50 + See = MAX(See, (float)(N * 100)); /* add a small noise floor to make sure not to have problems when dividing */ + 83f45cf4: 06400793 li a5,100 + 83f45cf8: 029787bb mulw a5,a5,s1 + 83f45cfc: d007f7d3 fcvt.s.w fa5,a5 + 83f45d00: a0fb17d3 flt.s a5,fs6,fa5 + 83f45d04: 32079663 bnez a5,83f46030 + Sxx += inner_prod(st->x+st->frame_size, st->x+st->frame_size, st->frame_size); /* far-end (TD) current frame power sum */ + 83f45d08: 4010 lw a2,0(s0) + 83f45d0a: 602c ld a1,64(s0) + 83f45d0c: f00009d3 fmv.w.x fs3,zero + 83f45d10: 00261793 slli a5,a2,0x2 + 83f45d14: 95be add a1,a1,a5 + 83f45d16: 852e mv a0,a1 + 83f45d18: 5b2000ef jal ra,83f462ca + accum_power_spectrum(st->X, st->Xf, N); /* Xf(k) = far-end(FD) power in each frequency bin (N/2+1) */ + 83f45d1c: 646c ld a1,200(s0) + 83f45d1e: 6428 ld a0,72(s0) + 83f45d20: 8626 mv a2,s1 + Sxx += inner_prod(st->x+st->frame_size, st->x+st->frame_size, st->frame_size); /* far-end (TD) current frame power sum */ + 83f45d22: 013579d3 fadd.s fs3,fa0,fs3 + accum_power_spectrum(st->X, st->Xf, N); /* Xf(k) = far-end(FD) power in each frequency bin (N/2+1) */ + 83f45d26: 668000ef jal ra,83f4638e + for (j=0;j<=st->frame_size;j++) + 83f45d2a: 401c lw a5,0(s0) + 83f45d2c: 4e07ca63 bltz a5,83f46220 + ss = st->ss / M; + 83f45d30: 18997953 fdiv.s fs2,fs2,fs1 + ss_1 = 1 - ss; + 83f45d34: 0000c797 auipc a5,0xc + 83f45d38: 51c7aa07 flw fs4,1308(a5) # 83f52250 <__func__.1+0x58> + 83f45d3c: 4701 li a4,0 + 83f45d3e: 092a76d3 fsub.s fa3,fs4,fs2 + st->power[j] = ss_1 * st->power[j] + 1 + ss * st->Xf[j]; /* smooth far end power estimate over time */ + 83f45d42: 705c ld a5,160(s0) + 83f45d44: 00271613 slli a2,a4,0x2 + 83f45d48: 6474 ld a3,200(s0) + 83f45d4a: 97b2 add a5,a5,a2 + 83f45d4c: 0007a707 flw fa4,0(a5) + 83f45d50: 96b2 add a3,a3,a2 + 83f45d52: 0006a787 flw fa5,0(a3) + 83f45d56: a0d77743 fmadd.s fa4,fa4,fa3,fs4 + for (j=0;j<=st->frame_size;j++) + 83f45d5a: 0705 addi a4,a4,1 + 83f45d5c: 0007069b sext.w a3,a4 + st->power[j] = ss_1 * st->power[j] + 1 + ss * st->Xf[j]; /* smooth far end power estimate over time */ + 83f45d60: 7127f7c3 fmadd.s fa5,fa5,fs2,fa4 + 83f45d64: 00f7a027 fsw fa5,0(a5) + for (j=0;j<=st->frame_size;j++) + 83f45d68: 401c lw a5,0(s0) + 83f45d6a: fcd7dce3 bge a5,a3,83f45d42 + for (j=st->frame_size;j>=0;j--) { + 83f45d6e: 4a07cd63 bltz a5,83f46228 + float Pey = FLOAT_ONE, Pyy = FLOAT_ONE; + 83f45d72: 214a05d3 fmv.s fa1,fs4 + 83f45d76: 214a0953 fmv.s fs2,fs4 + 83f45d7a: 078a slli a5,a5,0x2 + 83f45d7c: 4601 li a2,0 + Eh = st->Rf[j] - st->Eh[j]; + 83f45d7e: 7c54 ld a3,184(s0) + st->Eh[j] = (1-st->spec_average)*st->Eh[j] + st->spec_average*st->Rf[j]; + 83f45d80: 02042707 flw fa4,32(s0) + Eh = st->Rf[j] - st->Eh[j]; + 83f45d84: 6878 ld a4,208(s0) + 83f45d86: 96be add a3,a3,a5 + 83f45d88: 0006a787 flw fa5,0(a3) + st->Eh[j] = (1-st->spec_average)*st->Eh[j] + st->spec_average*st->Rf[j]; + 83f45d8c: 08ea7553 fsub.s fa0,fs4,fa4 + Eh = st->Rf[j] - st->Eh[j]; + 83f45d90: 973e add a4,a4,a5 + st->Eh[j] = (1-st->spec_average)*st->Eh[j] + st->spec_average*st->Rf[j]; + 83f45d92: 10e7f653 fmul.s fa2,fa5,fa4 + Eh = st->Rf[j] - st->Eh[j]; + 83f45d96: 00072687 flw fa3,0(a4) + Yh = st->Yf[j] - st->Yh[j]; + 83f45d9a: 606c ld a1,192(s0) + 83f45d9c: 6c74 ld a3,216(s0) + Eh = st->Rf[j] - st->Eh[j]; + 83f45d9e: 08d7f753 fsub.s fa4,fa5,fa3 + st->Eh[j] = (1-st->spec_average)*st->Eh[j] + st->spec_average*st->Rf[j]; + 83f45da2: 60a6f6c3 fmadd.s fa3,fa3,fa0,fa2 + Yh = st->Yf[j] - st->Yh[j]; + 83f45da6: 96be add a3,a3,a5 + 83f45da8: 95be add a1,a1,a5 + 83f45daa: 0006a007 flw ft0,0(a3) + 83f45dae: 0005a787 flw fa5,0(a1) + st->Eh[j] = (1-st->spec_average)*st->Eh[j] + st->spec_average*st->Rf[j]; + 83f45db2: 00d72027 fsw fa3,0(a4) + st->Yh[j] = (1-st->spec_average)*st->Yh[j] + st->spec_average*st->Yf[j]; + 83f45db6: 6074 ld a3,192(s0) + 83f45db8: 02042687 flw fa3,32(s0) + 83f45dbc: 6c78 ld a4,216(s0) + 83f45dbe: 96be add a3,a3,a5 + 83f45dc0: 0006a507 flw fa0,0(a3) + 83f45dc4: 08da7653 fsub.s fa2,fs4,fa3 + 83f45dc8: 973e add a4,a4,a5 + 83f45dca: 10a6f6d3 fmul.s fa3,fa3,fa0 + 83f45dce: 00072507 flw fa0,0(a4) + Yh = st->Yf[j] - st->Yh[j]; + 83f45dd2: 0807f7d3 fsub.s fa5,fa5,ft0 + Pey = Pey + Eh * Yh; + 83f45dd6: 86be mv a3,a5 + for (j=st->frame_size;j>=0;j--) { + 83f45dd8: 17f1 addi a5,a5,-4 + st->Yh[j] = (1-st->spec_average)*st->Yh[j] + st->spec_average*st->Yf[j]; + 83f45dda: 68a676c3 fmadd.s fa3,fa2,fa0,fa3 + Pey = Pey + Eh * Yh; + 83f45dde: 90f77943 fmadd.s fs2,fa4,fa5,fs2 + Pyy = Pyy + Yh * Yh; + 83f45de2: 58f7f5c3 fmadd.s fa1,fa5,fa5,fa1 + st->Yh[j] = (1-st->spec_average)*st->Yh[j] + st->spec_average*st->Yf[j]; + 83f45de6: 00d72027 fsw fa3,0(a4) + for (j=st->frame_size;j>=0;j--) { + 83f45dea: f8d61ae3 bne a2,a3,83f45d7e + Pyy = (float)math_sqrt(Pyy); /* the standard deviation of Y(k) */ + 83f45dee: 42058553 fcvt.d.s fa0,fa1 + 83f45df2: 800fb0ef jal ra,83f40df2 + tmp32 = st->beta0 * Syy; + 83f45df6: 02442707 flw fa4,36(s0) + if (tmp32 > (st->beta_max * See)) + 83f45dfa: 02842687 flw fa3,40(s0) + Pyy = (float)math_sqrt(Pyy); /* the standard deviation of Y(k) */ + 83f45dfe: 401575d3 fcvt.s.d fa1,fa0 + tmp32 = st->beta0 * Syy; + 83f45e02: 10ebf753 fmul.s fa4,fs7,fa4 + if (tmp32 > (st->beta_max * See)) + 83f45e06: 10db76d3 fmul.s fa3,fs6,fa3 + Pey = Pey / Pyy; /* the correlation coefficient of E(k) and Y(k) */ + 83f45e0a: 18b977d3 fdiv.s fa5,fs2,fa1 + if (tmp32 > (st->beta_max * See)) + 83f45e0e: a0e697d3 flt.s a5,fa3,fa4 + 83f45e12: c399 beqz a5,83f45e18 + tmp32 = st->beta_max * See; + 83f45e14: 20d68753 fmv.s fa4,fa3 + st->Pyy = alpha_1 * st->Pyy + alpha * Pyy; + 83f45e18: 0e442607 flw fa2,228(s0) + st->Pey = alpha_1 * st->Pey + alpha * Pey; + 83f45e1c: 0e042687 flw fa3,224(s0) + alpha = tmp32 / See; + 83f45e20: 19677753 fdiv.s fa4,fa4,fs6 + alpha_1 = FLOAT_ONE - alpha; + 83f45e24: 08ea7553 fsub.s fa0,fs4,fa4 + st->Pyy = alpha_1 * st->Pyy + alpha * Pyy; + 83f45e28: 10e5f5d3 fmul.s fa1,fa1,fa4 + st->Pey = alpha_1 * st->Pey + alpha * Pey; + 83f45e2c: 10e7f7d3 fmul.s fa5,fa5,fa4 + st->Pyy = alpha_1 * st->Pyy + alpha * Pyy; + 83f45e30: 58a67643 fmadd.s fa2,fa2,fa0,fa1 + st->Pey = alpha_1 * st->Pey + alpha * Pey; + 83f45e34: 78a6f7c3 fmadd.s fa5,fa3,fa0,fa5 + if (st->Pyy < FLOAT_ONE) + 83f45e38: a14617d3 flt.s a5,fa2,fs4 + st->Pey = alpha_1 * st->Pey + alpha * Pey; + 83f45e3c: 0ef42027 fsw fa5,224(s0) + if (st->Pyy < FLOAT_ONE) + 83f45e40: 1e079b63 bnez a5,83f46036 + st->Pyy = alpha_1 * st->Pyy + alpha * Pyy; + 83f45e44: 0ec42227 fsw fa2,228(s0) + if (st->Pey < st->aec_min_leak * st->Pyy) + 83f45e48: 12842687 flw fa3,296(s0) + 83f45e4c: 10d676d3 fmul.s fa3,fa2,fa3 + 83f45e50: a0d797d3 flt.s a5,fa5,fa3 + 83f45e54: c789 beqz a5,83f45e5e + st->Pey = st->aec_min_leak * st->Pyy; + 83f45e56: 20d687d3 fmv.s fa5,fa3 + 83f45e5a: 0ed42027 fsw fa3,224(s0) + if (st->Pey > st->Pyy) + 83f45e5e: a0f617d3 flt.s a5,fa2,fa5 + 83f45e62: c789 beqz a5,83f45e6c + st->Pey = st->Pyy; + 83f45e64: 20c607d3 fmv.s fa5,fa2 + 83f45e68: 0ec42027 fsw fa2,224(s0) + st->leak_estimate = st->Pey / st->Pyy; + 83f45e6c: 18c7f653 fdiv.s fa2,fa5,fa2 + if (st->leak_estimate > 16383) + 83f45e70: 0000c797 auipc a5,0xc + 83f45e74: 45c7a787 flw fa5,1116(a5) # 83f522cc <__func__.1+0xd4> + 83f45e78: a0c797d3 flt.s a5,fa5,fa2 + 83f45e7c: 26079c63 bnez a5,83f460f4 + RER = (float)((.0001*Sxx + 3*st->leak_estimate*Syy) / See); + 83f45e80: 0000c797 auipc a5,0xc + 83f45e84: 4507a687 flw fa3,1104(a5) # 83f522d0 <__func__.1+0xd8> + 83f45e88: 10d676d3 fmul.s fa3,fa2,fa3 + st->leak_estimate = st->Pey / st->Pyy; + 83f45e8c: 02c42827 fsw fa2,48(s0) + RER = (float)((.0001*Sxx + 3*st->leak_estimate*Syy) / See); + 83f45e90: 10dbf6d3 fmul.s fa3,fs7,fa3 + 83f45e94: 420987d3 fcvt.d.s fa5,fs3 + 83f45e98: 0000c797 auipc a5,0xc + 83f45e9c: 4807b507 fld fa0,1152(a5) # 83f52318 <__func__.1+0x120> + 83f45ea0: 420b05d3 fcvt.d.s fa1,fs6 + if (RER < Sey*Sey/(1+See*Syy)) + 83f45ea4: 10847453 fmul.s fs0,fs0,fs0 + RER = (float)((.0001*Sxx + 3*st->leak_estimate*Syy) / See); + 83f45ea8: 420686d3 fcvt.d.s fa3,fa3 + if (RER < Sey*Sey/(1+See*Syy)) + 83f45eac: a17b7743 fmadd.s fa4,fs6,fs7,fs4 + RER = (float)((.0001*Sxx + 3*st->leak_estimate*Syy) / See); + 83f45eb0: 6aa7f7c3 fmadd.d fa5,fa5,fa0,fa3 + if (RER < Sey*Sey/(1+See*Syy)) + 83f45eb4: 18e47753 fdiv.s fa4,fs0,fa4 + RER = (float)((.0001*Sxx + 3*st->leak_estimate*Syy) / See); + 83f45eb8: 1ab7f7d3 fdiv.d fa5,fa5,fa1 + 83f45ebc: 4017f7d3 fcvt.s.d fa5,fa5 + if (RER < Sey*Sey/(1+See*Syy)) + 83f45ec0: a0e797d3 flt.s a5,fa5,fa4 + 83f45ec4: c399 beqz a5,83f45eca + RER = Sey*Sey/(1+See*Syy); + 83f45ec6: 20e707d3 fmv.s fa5,fa4 + if (RER > .5) + 83f45eca: 0000c797 auipc a5,0xc + 83f45ece: 3a67a507 flw fa0,934(a5) # 83f52270 <__func__.1+0x78> + 83f45ed2: a0f517d3 flt.s a5,fa0,fa5 + 83f45ed6: 1e079263 bnez a5,83f460ba + if (st->RER*32767 > 1000) + 83f45eda: 0000c797 auipc a5,0xc + 83f45ede: 3927a707 flw fa4,914(a5) # 83f5226c <__func__.1+0x74> + 83f45ee2: 10e7f753 fmul.s fa4,fa5,fa4 + 83f45ee6: 0000c797 auipc a5,0xc + 83f45eea: 3ee7a687 flw fa3,1006(a5) # 83f522d4 <__func__.1+0xdc> + st->RER = RER; + 83f45eee: 14f42227 fsw fa5,324(s0) + if (st->RER*32767 > 1000) + 83f45ef2: a0e697d3 flt.s a5,fa3,fa4 + 83f45ef6: 1c079663 bnez a5,83f460c2 + if (!st->adapted && st->sum_adapt > M && st->leak_estimate*Syy > .03f*Syy) { + 83f45efa: 481c lw a5,16(s0) + 83f45efc: e78d bnez a5,83f45f26 + 83f45efe: 02c42707 flw fa4,44(s0) + 83f45f02: a0e497d3 flt.s a5,fs1,fa4 + 83f45f06: 14078063 beqz a5,83f46046 + 83f45f0a: 0000c797 auipc a5,0xc + 83f45f0e: 3ce7a687 flw fa3,974(a5) # 83f522d8 <__func__.1+0xe0> + 83f45f12: 10cbf053 fmul.s ft0,fs7,fa2 + 83f45f16: 10dbfbd3 fmul.s fs7,fs7,fa3 + 83f45f1a: a00b97d3 flt.s a5,fs7,ft0 + 83f45f1e: 12078463 beqz a5,83f46046 + st->adapted = 1; + 83f45f22: 4785 li a5,1 + 83f45f24: c81c sw a5,16(s0) + for (i=0;i<=st->frame_size;i++) { + 83f45f26: 401c lw a5,0(s0) + 83f45f28: 1a07c363 bltz a5,83f460ce + r = .7f * r + .3f * RER * e; + 83f45f2c: 0000c797 auipc a5,0xc + 83f45f30: 3b07a587 flw fa1,944(a5) # 83f522dc <__func__.1+0xe4> + 83f45f34: 10b7f5d3 fmul.s fa1,fa5,fa1 + 83f45f38: 4701 li a4,0 + 83f45f3a: 0000c797 auipc a5,0xc + 83f45f3e: 34e7a007 flw ft0,846(a5) # 83f52288 <__func__.1+0x90> + 83f45f42: a019 j 83f45f48 + r = st->leak_estimate * st->Yf[i]; + 83f45f44: 03042607 flw fa2,48(s0) + e = st->Rf[i] + 1; /* the power spectrum of E(k) */ + 83f45f48: 7c50 ld a2,184(s0) + 83f45f4a: 00271793 slli a5,a4,0x2 + r = st->leak_estimate * st->Yf[i]; + 83f45f4e: 6074 ld a3,192(s0) + e = st->Rf[i] + 1; /* the power spectrum of E(k) */ + 83f45f50: 963e add a2,a2,a5 + 83f45f52: 00062687 flw fa3,0(a2) + r = st->leak_estimate * st->Yf[i]; + 83f45f56: 96be add a3,a3,a5 + 83f45f58: 0006a787 flw fa5,0(a3) + e = st->Rf[i] + 1; /* the power spectrum of E(k) */ + 83f45f5c: 0146f6d3 fadd.s fa3,fa3,fs4 + for (i=0;i<=st->frame_size;i++) { + 83f45f60: 0705 addi a4,a4,1 + r = st->leak_estimate * st->Yf[i]; + 83f45f62: 10f677d3 fmul.s fa5,fa2,fa5 + for (i=0;i<=st->frame_size;i++) { + 83f45f66: 0007059b sext.w a1,a4 + if (r>.5f*e) + 83f45f6a: 10a6f753 fmul.s fa4,fa3,fa0 + r = .7f * r + .3f * RER * e; + 83f45f6e: 10d5f653 fmul.s fa2,fa1,fa3 + if (r>.5f*e) + 83f45f72: a0f716d3 flt.s a3,fa4,fa5 + 83f45f76: c299 beqz a3,83f45f7c + r = .5f*e; + 83f45f78: 20e707d3 fmv.s fa5,fa4 + st->power_1[i] = r / (e * (st->power[i] + 10)); + 83f45f7c: 7050 ld a2,160(s0) + r = .7f * r + .3f * RER * e; + 83f45f7e: 6007f7c3 fmadd.s fa5,fa5,ft0,fa2 + st->power_1[i] = r / (e * (st->power[i] + 10)); + 83f45f82: 7454 ld a3,168(s0) + 83f45f84: 963e add a2,a2,a5 + 83f45f86: 00062707 flw fa4,0(a2) + 83f45f8a: 97b6 add a5,a5,a3 + 83f45f8c: 01577753 fadd.s fa4,fa4,fs5 + 83f45f90: 10d77753 fmul.s fa4,fa4,fa3 + 83f45f94: 18e7f7d3 fdiv.s fa5,fa5,fa4 + 83f45f98: 00f7a027 fsw fa5,0(a5) + for (i=0;i<=st->frame_size;i++) { + 83f45f9c: 401c lw a5,0(s0) + 83f45f9e: fab7d3e3 bge a5,a1,83f45f44 + for (i=0;iframe_size;i++) + 83f45fa2: 4701 li a4,0 + 83f45fa4: 12f05563 blez a5,83f460ce + st->last_y[i] = st->last_y[st->frame_size+i]; + 83f45fa8: 7034 ld a3,96(s0) + 83f45faa: 9fb9 addw a5,a5,a4 + 83f45fac: 078a slli a5,a5,0x2 + 83f45fae: 97b6 add a5,a5,a3 + 83f45fb0: 0007a787 flw fa5,0(a5) + 83f45fb4: 00271793 slli a5,a4,0x2 + 83f45fb8: 96be add a3,a3,a5 + 83f45fba: 00f6a027 fsw fa5,0(a3) + for (i=0;iframe_size;i++) + 83f45fbe: 401c lw a5,0(s0) + 83f45fc0: 0705 addi a4,a4,1 + 83f45fc2: 0007069b sext.w a3,a4 + 83f45fc6: fef6c1e3 blt a3,a5,83f45fa8 + if (st->adapted) { + 83f45fca: 4818 lw a4,16(s0) + 83f45fcc: 10070363 beqz a4,83f460d2 + for (i=0;iframe_size;i++) + 83f45fd0: 02f05763 blez a5,83f45ffe + 83f45fd4: 6a22 ld s4,8(sp) + 83f45fd6: 4701 li a4,0 + st->last_y[st->frame_size+i] = (float)(in[i]-out[i]); + 83f45fd8: 00099503 lh a0,0(s3) + 83f45fdc: 000a1683 lh a3,0(s4) # 8000 <_EL1_STACK_SIZE+0x7800> + 83f45fe0: 7030 ld a2,96(s0) + 83f45fe2: 9fb9 addw a5,a5,a4 + 83f45fe4: 9d15 subw a0,a0,a3 + 83f45fe6: d00577d3 fcvt.s.w fa5,a0 + 83f45fea: 078a slli a5,a5,0x2 + 83f45fec: 97b2 add a5,a5,a2 + 83f45fee: 00f7a027 fsw fa5,0(a5) + for (i=0;iframe_size;i++) + 83f45ff2: 401c lw a5,0(s0) + 83f45ff4: 2705 addiw a4,a4,1 + 83f45ff6: 0989 addi s3,s3,2 + 83f45ff8: 0a09 addi s4,s4,2 + 83f45ffa: fcf74fe3 blt a4,a5,83f45fd8 +} + 83f45ffe: 60ae ld ra,200(sp) + 83f46000: 640e ld s0,192(sp) + 83f46002: 74ea ld s1,184(sp) + 83f46004: 794a ld s2,176(sp) + 83f46006: 79aa ld s3,168(sp) + 83f46008: 7a0a ld s4,160(sp) + 83f4600a: 6aea ld s5,152(sp) + 83f4600c: 6b4a ld s6,144(sp) + 83f4600e: 6baa ld s7,136(sp) + 83f46010: 6c0a ld s8,128(sp) + 83f46012: 7ce6 ld s9,120(sp) + 83f46014: 7d46 ld s10,112(sp) + 83f46016: 7da6 ld s11,104(sp) + 83f46018: 2466 fld fs0,88(sp) + 83f4601a: 24c6 fld fs1,80(sp) + 83f4601c: 2926 fld fs2,72(sp) + 83f4601e: 2986 fld fs3,64(sp) + 83f46020: 3a62 fld fs4,56(sp) + 83f46022: 3ac2 fld fs5,48(sp) + 83f46024: 3b22 fld fs6,40(sp) + 83f46026: 3b82 fld fs7,32(sp) + 83f46028: 2c62 fld fs8,24(sp) + 83f4602a: 2cc2 fld fs9,16(sp) + 83f4602c: 6169 addi sp,sp,208 + 83f4602e: 8082 ret + See = MAX(See, (float)(N * 100)); /* add a small noise floor to make sure not to have problems when dividing */ + 83f46030: 20f78b53 fmv.s fs6,fa5 + 83f46034: b9d1 j 83f45d08 + st->Pyy = FLOAT_ONE; + 83f46036: 214a0653 fmv.s fa2,fs4 + 83f4603a: 0f442227 fsw fs4,228(s0) + 83f4603e: b529 j 83f45e48 + else if ((st->Davg1 * ABS(st->Davg1)) > (st->aec_var1_update * st->Dvar1)) + 83f46040: 20c61153 fneg.s ft2,fa2 + 83f46044: ba41 j 83f459d4 + if (Sxx > (float)(N * 1000)) { /* far-end exists a certain level of energy */ + 83f46046: 3e800793 li a5,1000 + 83f4604a: 029787bb mulw a5,a5,s1 + 83f4604e: d007f7d3 fcvt.s.w fa5,a5 + 83f46052: a13797d3 flt.s a5,fa5,fs3 + 83f46056: e7e1 bnez a5,83f4611e + float adapt_rate = 0; + 83f46058: f0000b53 fmv.w.x fs6,zero + for (i=0;i<=st->frame_size;i++) + 83f4605c: 401c lw a5,0(s0) + 83f4605e: 0207c963 bltz a5,83f46090 + 83f46062: 4701 li a4,0 + st->power_1[i] = adapt_rate / (st->power[i] + 10); + 83f46064: 7054 ld a3,160(s0) + 83f46066: 00271613 slli a2,a4,0x2 + 83f4606a: 745c ld a5,168(s0) + 83f4606c: 96b2 add a3,a3,a2 + 83f4606e: 0006a787 flw fa5,0(a3) + 83f46072: 97b2 add a5,a5,a2 + for (i=0;i<=st->frame_size;i++) + 83f46074: 0705 addi a4,a4,1 + st->power_1[i] = adapt_rate / (st->power[i] + 10); + 83f46076: 0157f7d3 fadd.s fa5,fa5,fs5 + for (i=0;i<=st->frame_size;i++) + 83f4607a: 0007069b sext.w a3,a4 + st->power_1[i] = adapt_rate / (st->power[i] + 10); + 83f4607e: 18fb77d3 fdiv.s fa5,fs6,fa5 + 83f46082: 00f7a027 fsw fa5,0(a5) + for (i=0;i<=st->frame_size;i++) + 83f46086: 401c lw a5,0(s0) + 83f46088: fcd7dee3 bge a5,a3,83f46064 + st->sum_adapt = st->sum_adapt + adapt_rate; /* the bigger the value, the bigger the echo */ + 83f4608c: 02c42707 flw fa4,44(s0) + 83f46090: 00eb7b53 fadd.s fs6,fs6,fa4 + 83f46094: 03642627 fsw fs6,44(s0) + 83f46098: b729 j 83f45fa2 + M = st->initial_filter_len; + 83f4609a: 15041903 lh s2,336(s0) + 83f4609e: d36ff06f j 83f455d4 + st->saturated--; + 83f460a2: 37fd addiw a5,a5,-1 + 83f460a4: 00048c9b sext.w s9,s1 + 83f460a8: c85c sw a5,20(s0) + for (j=0;j + 83f460b6: f8aff06f j 83f45840 + RER = .5; + 83f460ba: 20a507d3 fmv.s fa5,fa0 + st->RER = RER; + 83f460be: 14a42227 fsw fa0,324(s0) + st->echo_cnt++; + 83f460c2: 14843783 ld a5,328(s0) + 83f460c6: 0785 addi a5,a5,1 + 83f460c8: 14f43423 sd a5,328(s0) + 83f460cc: b53d j 83f45efa + if (st->adapted) { + 83f460ce: 481c lw a5,16(s0) + 83f460d0: f79d bnez a5,83f45ffe + for (i=0;i + st->last_y[i] = st->x[i]; + 83f460dc: 6034 ld a3,64(s0) + 83f460de: 7038 ld a4,96(s0) + 83f460e0: 96be add a3,a3,a5 + 83f460e2: 0006a787 flw fa5,0(a3) + 83f460e6: 973e add a4,a4,a5 + for (i=0;ilast_y[i] = st->x[i]; + 83f460ea: 00f72027 fsw fa5,0(a4) + for (i=0;i + 83f460f2: b731 j 83f45ffe + st->leak_estimate = 32767; + 83f460f4: 0000c797 auipc a5,0xc + 83f460f8: 1787a787 flw fa5,376(a5) # 83f5226c <__func__.1+0x74> + 83f460fc: 20f78653 fmv.s fa2,fa5 + 83f46100: 02f42827 fsw fa5,48(s0) + 83f46104: 0000c797 auipc a5,0xc + 83f46108: 1a87a687 flw fa3,424(a5) # 83f522ac <__func__.1+0xb4> + 83f4610c: b351 j 83f45e90 + aec_adjust_prop (st->W, N, M, st->prop); + 83f4610e: 7874 ld a3,240(s0) + 83f46110: 6048 ld a0,128(s0) + 83f46112: 864a mv a2,s2 + 83f46114: 85a6 mv a1,s1 + 83f46116: 4cc000ef jal ra,83f465e2 + 83f4611a: e6aff06f j 83f45784 + tmp32 = .25f * Sxx; + 83f4611e: 0000c797 auipc a5,0xc + 83f46122: 1c27a787 flw fa5,450(a5) # 83f522e0 <__func__.1+0xe8> + if (tmp32 > .25*See) + 83f46126: 0000c797 auipc a5,0xc + 83f4612a: 1fa7b687 fld fa3,506(a5) # 83f52320 <__func__.1+0x128> + tmp32 = .25f * Sxx; + 83f4612e: 10f9f9d3 fmul.s fs3,fs3,fa5 + if (tmp32 > .25*See) + 83f46132: 12d5f5d3 fmul.d fa1,fa1,fa3 + 83f46136: 420986d3 fcvt.d.s fa3,fs3 + 83f4613a: a2d597d3 flt.d a5,fa1,fa3 + 83f4613e: c399 beqz a5,83f46144 + tmp32 = (float)(.25*See); + 83f46140: 10fb79d3 fmul.s fs3,fs6,fa5 + adapt_rate = tmp32 / See; /* residual echo/error signal */ + 83f46144: 1969fb53 fdiv.s fs6,fs3,fs6 + 83f46148: bf11 j 83f4605c + if ((-(Sff - See) * ABS(Sff - See)) > (st->aec_var_backtrack * Sff * Dbf)) + 83f4614a: 13c42087 flw ft1,316(s0) + if ((-(st->Davg1) * ABS(st->Davg1)) > (st->aec_var_backtrack * st->Dvar1)) + 83f4614e: 20c61753 fneg.s fa4,fa2 + 83f46152: 1016f6d3 fmul.s fa3,fa3,ft1 + 83f46156: 10277753 fmul.s fa4,fa4,ft2 + 83f4615a: a0e697d3 flt.s a5,fa3,fa4 + 83f4615e: eb91 bnez a5,83f46172 + if ((-(st->Davg2) * ABS(st->Davg2)) > (st->aec_var_backtrack * st->Dvar2)) + 83f46160: 20b59753 fneg.s fa4,fa1 + 83f46164: 10157553 fmul.s fa0,fa0,ft1 + 83f46168: 10377753 fmul.s fa4,fa4,ft3 + 83f4616c: a0e517d3 flt.s a5,fa0,fa4 + 83f46170: c3f9 beqz a5,83f46236 + for (i=0;i + st->W[i] = st->foreground[i]; + 83f46180: 6454 ld a3,136(s0) + 83f46182: 6058 ld a4,128(s0) + 83f46184: 96be add a3,a3,a5 + 83f46186: 0006a787 flw fa5,0(a3) + 83f4618a: 973e add a4,a4,a5 + for (i=0;iW[i] = st->foreground[i]; + 83f4618e: 00f72027 fsw fa5,0(a4) + for (i=0;i + for (i=0;iframe_size;i++) + 83f46196: 4010 lw a2,0(s0) + 83f46198: 4701 li a4,0 + 83f4619a: 04c05c63 blez a2,83f461f2 + st->y[i+st->frame_size] = st->e[i+st->frame_size]; + 83f4619e: 7c0c ld a1,56(s0) + 83f461a0: 00c707bb addw a5,a4,a2 + 83f461a4: 078a slli a5,a5,0x2 + 83f461a6: 6c34 ld a3,88(s0) + 83f461a8: 95be add a1,a1,a5 + 83f461aa: 0005a787 flw fa5,0(a1) + 83f461ae: 97b6 add a5,a5,a3 + for (i=0;iframe_size;i++) + 83f461b0: 2705 addiw a4,a4,1 + st->y[i+st->frame_size] = st->e[i+st->frame_size]; + 83f461b2: 00f7a027 fsw fa5,0(a5) + for (i=0;iframe_size;i++) + 83f461b6: 4010 lw a2,0(s0) + 83f461b8: fec743e3 blt a4,a2,83f4619e + for (i=0;iframe_size;i++) + 83f461bc: 02c05b63 blez a2,83f461f2 + 83f461c0: 4781 li a5,0 + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + 83f461c2: 6834 ld a3,80(s0) + 83f461c4: 6c38 ld a4,88(s0) + 83f461c6: 9e3d addw a2,a2,a5 + 83f461c8: 00279593 slli a1,a5,0x2 + 83f461cc: 060a slli a2,a2,0x2 + 83f461ce: 9732 add a4,a4,a2 + 83f461d0: 96ae add a3,a3,a1 + 83f461d2: 0006a787 flw fa5,0(a3) + 83f461d6: 00072707 flw fa4,0(a4) + 83f461da: 7c18 ld a4,56(s0) + for (i=0;iframe_size;i++) + 83f461dc: 0785 addi a5,a5,1 + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + 83f461de: 08e7f7d3 fsub.s fa5,fa5,fa4 + 83f461e2: 972e add a4,a4,a1 + for (i=0;iframe_size;i++) + 83f461e4: 0007869b sext.w a3,a5 + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + 83f461e8: 00f72027 fsw fa5,0(a4) + for (i=0;iframe_size;i++) + 83f461ec: 4010 lw a2,0(s0) + 83f461ee: fcc6cae3 blt a3,a2,83f461c2 + See = Sff; /* reset error power, copy foreground to background */ + 83f461f2: 21398b53 fmv.s fs6,fs3 + st->Davg1 = st->Davg2 = FLOAT_ZERO; + 83f461f6: 08043823 sd zero,144(s0) + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; + 83f461fa: 08043c23 sd zero,152(s0) + 83f461fe: b8bd j 83f45a7c + else if ((st->Davg2 * ABS(st->Davg2)) > (st->aec_var2_update * st->Dvar2)) + 83f46200: 20b591d3 fneg.s ft3,fa1 + 83f46204: 13842707 flw fa4,312(s0) + 83f46208: 1035f0d3 fmul.s ft1,fa1,ft3 + 83f4620c: 10e57753 fmul.s fa4,fa0,fa4 + 83f46210: a01717d3 flt.s a5,fa4,ft1 + 83f46214: fe079b63 bnez a5,83f45a0a + 83f46218: bf0d j 83f4614a + st->screwed_up = 0; + 83f4621a: 00042c23 sw zero,24(s0) + if (st->screwed_up>=50) { + 83f4621e: bcd9 j 83f45cf4 + 83f46220: 0000c797 auipc a5,0xc + 83f46224: 0307aa07 flw fs4,48(a5) # 83f52250 <__func__.1+0x58> + float Pey = FLOAT_ONE, Pyy = FLOAT_ONE; + 83f46228: 214a0953 fmv.s fs2,fs4 + 83f4622c: 0000c797 auipc a5,0xc + 83f46230: 0e47b507 fld fa0,228(a5) # 83f52310 <__func__.1+0x118> + 83f46234: be7d j 83f45df2 + if ((-(Sff - See) * ABS(Sff - See)) > (st->aec_var_backtrack * Sff * Dbf)) + 83f46236: 1130f0d3 fmul.s ft1,ft1,fs3 + 83f4623a: 20f797d3 fneg.s fa5,fa5 + 83f4623e: 1007f7d3 fmul.s fa5,fa5,ft0 + 83f46242: 1080f453 fmul.s fs0,ft1,fs0 + if (reset_background) { + 83f46246: a0f417d3 flt.s a5,fs0,fa5 + 83f4624a: f785 bnez a5,83f46172 + for (i=0;iframe_size;i++) { + 83f4624c: 4010 lw a2,0(s0) + 83f4624e: 82fff06f j 83f45a7c + +0000000083f46252 : +#endif +{ + int i; + float den2; + + den2 = radius*radius + .7f*(1-radius)*(1-radius); + 83f46252: 0000c797 auipc a5,0xc + 83f46256: ffe7a587 flw fa1,-2(a5) # 83f52250 <__func__.1+0x58> + 83f4625a: 08a5f5d3 fsub.s fa1,fa1,fa0 + 83f4625e: 0000c797 auipc a5,0xc + 83f46262: 02a7a787 flw fa5,42(a5) # 83f52288 <__func__.1+0x90> + 83f46266: 10f5f7d3 fmul.s fa5,fa1,fa5 + 83f4626a: 10b7f5d3 fmul.s fa1,fa5,fa1 + 83f4626e: 58a575c3 fmadd.s fa1,fa0,fa0,fa1 + + for (i=0;i + 83f46276: fff6079b addiw a5,a2,-1 + 83f4627a: 02079713 slli a4,a5,0x20 + 83f4627e: 01f75793 srli a5,a4,0x1f + 83f46282: 00250713 addi a4,a0,2 + 83f46286: 97ba add a5,a5,a4 + 83f46288: 0000c717 auipc a4,0xc + 83f4628c: 00472007 flw ft0,4(a4) # 83f5228c <__func__.1+0x94> + float vin = in[i]; + 83f46290: 00051703 lh a4,0(a0) + float vout = mem[0] + vin; + 83f46294: 0006a707 flw fa4,0(a3) + mem[0] = mem[1] + 2*(-vin + radius*vout); /* history buffer */ + 83f46298: 0046a607 flw fa2,4(a3) + float vin = in[i]; + 83f4629c: d00777d3 fcvt.s.w fa5,a4 + for (i=0;i + } +} + 83f462c8: 8082 ret + +0000000083f462ca : + +inline float inner_prod(const float *x, const float *y, int len) +{ + float sum = 0; + + len >>= 1; + 83f462ca: 40165793 srai a5,a2,0x1 + float sum = 0; + 83f462ce: f0000553 fmv.w.x fa0,zero + len >>= 1; + 83f462d2: 4016561b sraiw a2,a2,0x1 + while(len--) { + 83f462d6: cf85 beqz a5,83f4630e + 83f462d8: 02061793 slli a5,a2,0x20 + float part = 0; + part = part + (*x++) * (*y++); + 83f462dc: 20a50653 fmv.s fa2,fa0 + 83f462e0: 01d7d613 srli a2,a5,0x1d + 83f462e4: 00c507b3 add a5,a0,a2 + 83f462e8: 00052707 flw fa4,0(a0) + 83f462ec: 0005a687 flw fa3,0(a1) + 83f462f0: 0521 addi a0,a0,8 + part = part + (*x++) * (*y++); + 83f462f2: ffc52787 flw fa5,-4(a0) + part = part + (*x++) * (*y++); + 83f462f6: 60d77743 fmadd.s fa4,fa4,fa3,fa2 + part = part + (*x++) * (*y++); + 83f462fa: 0045a687 flw fa3,4(a1) + 83f462fe: 05a1 addi a1,a1,8 + 83f46300: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + sum = sum + part; + 83f46304: 00f57553 fadd.s fa0,fa0,fa5 + while(len--) { + 83f46308: fef510e3 bne a0,a5,83f462e8 + 83f4630c: 8082 ret + } + return sum; +} + 83f4630e: 8082 ret + +0000000083f46310 : + +inline void bin_power_spectrum(const float *X, float *ps, int N) +{ + int i, j; + + ps[0] = X[0] * X[0]; + 83f46310: 00052787 flw fa5,0(a0) + for (i=1,j=1;i + 83f46322: 3675 addiw a2,a2,-3 + 83f46324: 0016569b srliw a3,a2,0x1 + 83f46328: 00369813 slli a6,a3,0x3 + 83f4632c: 00c50693 addi a3,a0,12 + 83f46330: 00450793 addi a5,a0,4 + 83f46334: 00458713 addi a4,a1,4 + 83f46338: 0016561b srliw a2,a2,0x1 + 83f4633c: 96c2 add a3,a3,a6 + ps[j] = X[i] * X[i] + X[i+1] * X[i+1]; + 83f4633e: 0047a707 flw fa4,4(a5) + 83f46342: 0007a787 flw fa5,0(a5) + for (i=1,j=1;i + 83f4635a: 0016179b slliw a5,a2,0x1 + } + ps[j] = X[i] * X[i]; + 83f4635e: 278d addiw a5,a5,3 + 83f46360: 078a slli a5,a5,0x2 + 83f46362: 953e add a0,a0,a5 + 83f46364: 00052787 flw fa5,0(a0) + 83f46368: 2609 addiw a2,a2,2 + 83f4636a: 060a slli a2,a2,0x2 + 83f4636c: 10f7f7d3 fmul.s fa5,fa5,fa5 + 83f46370: 962e add a2,a2,a1 + 83f46372: 00f62027 fsw fa5,0(a2) +} + 83f46376: 8082 ret + for (i=1,j=1;i: + +inline void accum_power_spectrum(const float *X, float *ps, int N) +{ + int i, j; + + ps[0] += (X[0] * X[0]); /* ps[0] = ps[0] + X[0] * X[0], real part only, the im part in first point is zero */ + 83f4638e: 00052787 flw fa5,0(a0) + 83f46392: 0005a707 flw fa4,0(a1) + for (i=1,j=1;i + 83f463a4: 3675 addiw a2,a2,-3 + 83f463a6: 0016569b srliw a3,a2,0x1 + 83f463aa: 00369813 slli a6,a3,0x3 + 83f463ae: 00c50693 addi a3,a0,12 + 83f463b2: 00458713 addi a4,a1,4 + 83f463b6: 00450793 addi a5,a0,4 + 83f463ba: 0016561b srliw a2,a2,0x1 + 83f463be: 96c2 add a3,a3,a6 + ps[j] += (X[i] * X[i] + X[i+1] * X[i+1]); + 83f463c0: 0047a707 flw fa4,4(a5) + 83f463c4: 0007a787 flw fa5,0(a5) + 83f463c8: 00072687 flw fa3,0(a4) + 83f463cc: 10e77753 fmul.s fa4,fa4,fa4 + for (i=1,j=1;i + 83f463e4: 0016179b slliw a5,a2,0x1 + } + ps[j] += (X[i] * X[i]); /* real part only, the im part in (N/2+1)th point is zero */ + 83f463e8: 278d addiw a5,a5,3 + 83f463ea: 2609 addiw a2,a2,2 + 83f463ec: 060a slli a2,a2,0x2 + 83f463ee: 078a slli a5,a5,0x2 + 83f463f0: 962e add a2,a2,a1 + 83f463f2: 953e add a0,a0,a5 + 83f463f4: 00052787 flw fa5,0(a0) + 83f463f8: 00062707 flw fa4,0(a2) + 83f463fc: 70f7f7c3 fmadd.s fa5,fa5,fa5,fa4 + 83f46400: 00f62027 fsw fa5,0(a2) +} + 83f46404: 8082 ret + for (i=1,j=1;i: + +inline void accum_spectral_mul(const float *X, const float *Y, float *acc, int N, int M) +{ + int i,j; + + for (i=0;i + 83f46424: fff6881b addiw a6,a3,-1 + 83f46428: 02081793 slli a5,a6,0x20 + 83f4642c: 01e7d893 srli a7,a5,0x1e + 83f46430: 00460813 addi a6,a2,4 + 83f46434: 87b2 mv a5,a2 + 83f46436: 9846 add a6,a6,a7 + acc[i] = 0; + 83f46438: 0007a023 sw zero,0(a5) + for (i=0;i + for (j=0;j + 83f46446: ffd6879b addiw a5,a3,-3 + acc[0] += (X[0]*Y[0]); /* real part only for the first point of X and Y */ + for (i=1;i + 83f46480: 00460793 addi a5,a2,4 + 83f46484: 00450893 addi a7,a0,4 + 83f46488: 00458813 addi a6,a1,4 + acc[i] += (X[i]*Y[i] - X[i+1]*Y[i+1]); /* real part */ + 83f4648c: 0048a787 flw fa5,4(a7) + 83f46490: 00482607 flw fa2,4(a6) # 8004 <_EL1_STACK_SIZE+0x7804> + 83f46494: 0008a687 flw fa3,0(a7) + 83f46498: 00082587 flw fa1,0(a6) + 83f4649c: 10c7f653 fmul.s fa2,fa5,fa2 + 83f464a0: 0007a707 flw fa4,0(a5) + acc[i+1] += (X[i+1]*Y[i] + X[i]*Y[i+1]); /* imaginary part */ + 83f464a4: 0047a787 flw fa5,4(a5) + for (i=1;i + 83f464de: 87fa mv a5,t5 + acc[i] += (X[i]*Y[i]); /* real part only for the (N/2+1)th point of X and Y */ + 83f464e0: 00f60833 add a6,a2,a5 + 83f464e4: 00f508b3 add a7,a0,a5 + 83f464e8: 97ae add a5,a5,a1 + 83f464ea: 0008a787 flw fa5,0(a7) + 83f464ee: 0007a687 flw fa3,0(a5) + 83f464f2: 00082707 flw fa4,0(a6) + for (j=0;j + } +} + 83f46508: 8082 ret + for (i=1;i + 83f4650e: 8082 ret + +0000000083f46510 : +inline void weighted_gradient_phi(const float *w, const float p, const float *X, const float *Y, float *prod, int N) +{ + int i, j; + float W; + + W = p * w[0]; /* real value */ + 83f46510: 00052787 flw fa5,0(a0) + prod[0] = W * X[0] * Y[0]; /* real part only for the first point of X and Y */ + 83f46514: 0005a687 flw fa3,0(a1) + 83f46518: 00062707 flw fa4,0(a2) + W = p * w[0]; /* real value */ + 83f4651c: 10f577d3 fmul.s fa5,fa0,fa5 + for (i=1,j=1;i + 83f46532: ffd7031b addiw t1,a4,-3 + 83f46536: 00135e9b srliw t4,t1,0x1 + 83f4653a: 00c58e13 addi t3,a1,12 + 83f4653e: 0e8e slli t4,t4,0x3 + 83f46540: 00450893 addi a7,a0,4 + 83f46544: 00458793 addi a5,a1,4 + 83f46548: 00460713 addi a4,a2,4 + 83f4654c: 00468813 addi a6,a3,4 + 83f46550: 0013531b srliw t1,t1,0x1 + 83f46554: 9e76 add t3,t3,t4 + W = p * w[j]; /* real value */ + /* perform conj(X)*Y, conjugation of X[i] + X[i+1]j = X[i] - X[i+1]j */ + prod[i] = W * (X[i] * Y[i] + X[i+1] * Y[i+1]); /* real part */ + 83f46556: 0047a687 flw fa3,4(a5) + 83f4655a: 00472607 flw fa2,4(a4) + 83f4655e: 0007a707 flw fa4,0(a5) + 83f46562: 00072587 flw fa1,0(a4) + 83f46566: 10c6f653 fmul.s fa2,fa3,fa2 + W = p * w[j]; /* real value */ + 83f4656a: 0008a787 flw fa5,0(a7) + for (i=1,j=1;i + 83f465aa: 0013179b slliw a5,t1,0x1 + } + W = p * w[j]; /* real value */ + prod[i] = W * X[i] * Y[i]; /* real part only for the (N/2+1)th point of X and Y */ + 83f465ae: 278d addiw a5,a5,3 + W = p * w[j]; /* real value */ + 83f465b0: 2309 addiw t1,t1,2 + 83f465b2: 030a slli t1,t1,0x2 + prod[i] = W * X[i] * Y[i]; /* real part only for the (N/2+1)th point of X and Y */ + 83f465b4: 078a slli a5,a5,0x2 + W = p * w[j]; /* real value */ + 83f465b6: 951a add a0,a0,t1 + 83f465b8: 00052787 flw fa5,0(a0) + prod[i] = W * X[i] * Y[i]; /* real part only for the (N/2+1)th point of X and Y */ + 83f465bc: 95be add a1,a1,a5 + 83f465be: 0005a707 flw fa4,0(a1) + W = p * w[j]; /* real value */ + 83f465c2: 10f57553 fmul.s fa0,fa0,fa5 + prod[i] = W * X[i] * Y[i]; /* real part only for the (N/2+1)th point of X and Y */ + 83f465c6: 963e add a2,a2,a5 + 83f465c8: 00062787 flw fa5,0(a2) + 83f465cc: 96be add a3,a3,a5 + 83f465ce: 10e57553 fmul.s fa0,fa0,fa4 + 83f465d2: 10f57553 fmul.s fa0,fa0,fa5 + 83f465d6: 00a6a027 fsw fa0,0(a3) +} + 83f465da: 8082 ret + for (i=1,j=1;i + +0000000083f465e2 : + int i, j; + float max_sum = 1; + float prop_sum = 1; + //float max_sum_matlab[20]; + + for (i=0;i + 83f465e6: fff6079b addiw a5,a2,-1 +{ + 83f465ea: 7119 addi sp,sp,-128 + 83f465ec: 02079713 slli a4,a5,0x20 + 83f465f0: 01e75793 srli a5,a4,0x1e + 83f465f4: ac22 fsd fs0,24(sp) + float max_sum = 1; + 83f465f6: 0000c717 auipc a4,0xc + 83f465fa: c5a72407 flw fs0,-934(a4) # 83f52250 <__func__.1+0x58> +{ + 83f465fe: f0ca sd s2,96(sp) + 83f46600: a826 fsd fs1,16(sp) + 83f46602: fff5891b addiw s2,a1,-1 + float max_sum = 1; + 83f46606: 208404d3 fmv.s fs1,fs0 +{ + 83f4660a: fc5e sd s7,56(sp) + 83f4660c: 1902 slli s2,s2,0x20 + 83f4660e: 00468b93 addi s7,a3,4 + 83f46612: f8a2 sd s0,112(sp) + 83f46614: f4a6 sd s1,104(sp) + 83f46616: ecce sd s3,88(sp) + 83f46618: e8d2 sd s4,80(sp) + 83f4661a: e4d6 sd s5,72(sp) + 83f4661c: e0da sd s6,64(sp) + 83f4661e: f862 sd s8,48(sp) + 83f46620: f466 sd s9,40(sp) + 83f46622: a44a fsd fs2,8(sp) + 83f46624: 9bbe add s7,s7,a5 + 83f46626: fc86 sd ra,120(sp) + 83f46628: 89aa mv s3,a0 + 83f4662a: 84ae mv s1,a1 + 83f4662c: 8436 mv s0,a3 + 83f4662e: 8b36 mv s6,a3 + 83f46630: 00058a1b sext.w s4,a1 + for (i=0;i + 83f46640: 02095913 srli s2,s2,0x20 + 83f46644: 00450a93 addi s5,a0,4 + 83f46648: 23290553 fmv.d fa0,fs2 + 83f4664c: 02905463 blez s1,83f46674 + 83f46650: 01990733 add a4,s2,s9 + float tmp = 1; + 83f46654: 20840553 fmv.s fa0,fs0 + 83f46658: 002c9793 slli a5,s9,0x2 + 83f4665c: 070a slli a4,a4,0x2 + 83f4665e: 97ce add a5,a5,s3 + 83f46660: 9756 add a4,a4,s5 + /* tmp(m) = tmp(m) + W(k, m) * W(k, m) */ + tmp += (W[i*N+j] * W[i*N+j]); /* sum the power of the (N/2+1) frequency bin in each taplen */ + 83f46662: 0007a787 flw fa5,0(a5) + for (j=0;j + prop[i] = (float)math_sqrt(tmp); + 83f46670: 42050553 fcvt.d.s fa0,fa0 + 83f46674: f7efa0ef jal ra,83f40df2 + 83f46678: 40157553 fcvt.s.d fa0,fa0 + + #if (1) /* better */ + if (prop[i] > max_sum) + 83f4667c: a0a497d3 flt.s a5,fs1,fa0 + prop[i] = (float)math_sqrt(tmp); + 83f46680: 00ac2027 fsw fa0,0(s8) # 8000 <_EL1_STACK_SIZE+0x7800> + if (prop[i] > max_sum) + 83f46684: c399 beqz a5,83f4668a + max_sum = prop[i]; + 83f46686: 20a504d3 fmv.s fs1,fa0 + for (i=0;i + } + + for (i=0;i + 83f4669c: 10f4f4d3 fmul.s fs1,fs1,fa5 + 83f466a0: 00042787 flw fa5,0(s0) + for (i=0;i + 83f466b6: 0000c797 auipc a5,0xc + 83f466ba: c767a687 flw fa3,-906(a5) # 83f5232c <__func__.1+0x134> + } + for (i=0;i + } + +} + 83f466d4: 70e6 ld ra,120(sp) + 83f466d6: 7446 ld s0,112(sp) + 83f466d8: 74a6 ld s1,104(sp) + 83f466da: 7906 ld s2,96(sp) + 83f466dc: 69e6 ld s3,88(sp) + 83f466de: 6a46 ld s4,80(sp) + 83f466e0: 6aa6 ld s5,72(sp) + 83f466e2: 6b06 ld s6,64(sp) + 83f466e4: 7be2 ld s7,56(sp) + 83f466e6: 7c42 ld s8,48(sp) + 83f466e8: 7ca2 ld s9,40(sp) + 83f466ea: 2462 fld fs0,24(sp) + 83f466ec: 24c2 fld fs1,16(sp) + 83f466ee: 2922 fld fs2,8(sp) + 83f466f0: 6109 addi sp,sp,128 + 83f466f2: 8082 ret + 83f466f4: 8082 ret + +0000000083f466f6 : + } while (0) +#endif + +/* Function Definitions */ +EXPORT void NR(short *x, float initial_noise_pow_time, float *frame, NRState *st, boolean_T *speech_vad, float *y) +{ + 83f466f6: 716d addi sp,sp,-272 + 83f466f8: fda6 sd s1,248(sp) + 83f466fa: f9ca sd s2,240(sp) + 83f466fc: f1d2 sd s4,224(sp) + 83f466fe: e5de sd s7,200(sp) + 83f46700: a54a fsd fs2,136(sp) + 83f46702: e606 sd ra,264(sp) + 83f46704: e222 sd s0,256(sp) + 83f46706: f5ce sd s3,232(sp) + 83f46708: edd6 sd s5,216(sp) + 83f4670a: e9da sd s6,208(sp) + 83f4670c: e1e2 sd s8,192(sp) + 83f4670e: fd66 sd s9,184(sp) + 83f46710: f96a sd s10,176(sp) + 83f46712: f56e sd s11,168(sp) + 83f46714: ad22 fsd fs0,152(sp) + 83f46716: a926 fsd fs1,144(sp) + 83f46718: a14e fsd fs3,128(sp) + 83f4671a: bcd2 fsd fs4,120(sp) + 83f4671c: b8d6 fsd fs5,112(sp) + 83f4671e: b4da fsd fs6,104(sp) + 83f46720: b0de fsd fs7,96(sp) + + + /* Preparation */ + c = 0.886226925F; + qkr = 2.33333333F; + len = 2*st->frame_size; /* window size */ + 83f46722: 09862783 lw a5,152(a2) +{ + 83f46726: 8bb2 mv s7,a2 + 83f46728: e43a sd a4,8(sp) + len = 2*st->frame_size; /* window size */ + 83f4672a: 0017961b slliw a2,a5,0x1 + 83f4672e: 0006071b sext.w a4,a2 + len1 = st->frame_size; /* overlap size */ + nFFT = 2*2*st->frame_size; + 83f46732: 0027949b slliw s1,a5,0x2 + len = 2*st->frame_size; /* window size */ + 83f46736: f83a sd a4,48(sp) + nFFT = 2*2*st->frame_size; + 83f46738: 0004871b sext.w a4,s1 + len = 2*st->frame_size; /* window size */ + 83f4673c: f43e sd a5,40(sp) + 83f4673e: c6b2 sw a2,76(sp) + nFFT = 2*2*st->frame_size; + 83f46740: e83a sd a4,16(sp) +{ + 83f46742: 20a50953 fmv.s fs2,fa0 + 83f46746: 892e mv s2,a1 + 83f46748: 8a36 mv s4,a3 + for (i = 0; i < st->frame_size; i++) { + 83f4674a: 08f05963 blez a5,83f467dc + 83f4674e: 85aa mv a1,a0 + 83f46750: 873e mv a4,a5 + 83f46752: 4601 li a2,0 + 83f46754: 4681 li a3,0 + x[i+st->frame_size] = x[i]; /* go first to avoid overwriting by x_old[], applicable for AEC on or AEC off */ + 83f46756: 00059803 lh a6,0(a1) + 83f4675a: 9f35 addw a4,a4,a3 + 83f4675c: 0706 slli a4,a4,0x1 + 83f4675e: 972a add a4,a4,a0 + 83f46760: 01071023 sh a6,0(a4) + x[i] = st->x_old[i]; + 83f46764: 018bb803 ld a6,24(s7) + 83f46768: 00161893 slli a7,a2,0x1 + for (i = 0; i < st->frame_size; i++) { + 83f4676c: 0589 addi a1,a1,2 + x[i] = st->x_old[i]; + 83f4676e: 9846 add a6,a6,a7 + 83f46770: 00081703 lh a4,0(a6) + for (i = 0; i < st->frame_size; i++) { + 83f46774: 0605 addi a2,a2,1 + x[i] = st->x_old[i]; + 83f46776: fee59f23 sh a4,-2(a1) + st->x_old[i] = x[i+st->frame_size]; /* update input overlap data */ + 83f4677a: 098ba703 lw a4,152(s7) + 83f4677e: 018bb803 ld a6,24(s7) + 83f46782: 9f35 addw a4,a4,a3 + 83f46784: 0706 slli a4,a4,0x1 + 83f46786: 972a add a4,a4,a0 + 83f46788: 00071303 lh t1,0(a4) + 83f4678c: 01180733 add a4,a6,a7 + for (i = 0; i < st->frame_size; i++) { + 83f46790: 0006069b sext.w a3,a2 + st->x_old[i] = x[i+st->frame_size]; /* update input overlap data */ + 83f46794: 00671023 sh t1,0(a4) + for (i = 0; i < st->frame_size; i++) { + 83f46798: 098ba703 lw a4,152(s7) + 83f4679c: fae6cde3 blt a3,a4,83f46756 + } + /* Transform to floating-point with float precision for input signals, input sample have to be 16-bit length */ + for (i = 0; i < 2*st->frame_size; i++) { + 83f467a0: 02e05e63 blez a4,83f467dc + 83f467a4: 4701 li a4,0 + 83f467a6: 0000c797 auipc a5,0xc + 83f467aa: aba7a707 flw fa4,-1350(a5) # 83f52260 <__func__.1+0x68> + st->float_x[i] = (float)(x[i])/(float)(32768.0F); + 83f467ae: 00051583 lh a1,0(a0) + 83f467b2: 060bb683 ld a3,96(s7) + 83f467b6: 00271613 slli a2,a4,0x2 + 83f467ba: d005f7d3 fcvt.s.w fa5,a1 + 83f467be: 96b2 add a3,a3,a2 + for (i = 0; i < 2*st->frame_size; i++) { + 83f467c0: 0705 addi a4,a4,1 + st->float_x[i] = (float)(x[i])/(float)(32768.0F); + 83f467c2: 10e7f7d3 fmul.s fa5,fa5,fa4 + for (i = 0; i < 2*st->frame_size; i++) { + 83f467c6: 0007061b sext.w a2,a4 + 83f467ca: 0509 addi a0,a0,2 + st->float_x[i] = (float)(x[i])/(float)(32768.0F); + 83f467cc: 00f6a027 fsw fa5,0(a3) + for (i = 0; i < 2*st->frame_size; i++) { + 83f467d0: 098ba683 lw a3,152(s7) + 83f467d4: 0016969b slliw a3,a3,0x1 + 83f467d8: fcd64be3 blt a2,a3,83f467ae + } + + /* Apply analysis window */ + for (i = 0; i < (nFFT/2); i++) { + 83f467dc: 67c2 ld a5,16(sp) + 83f467de: 4014d99b sraiw s3,s1,0x1 + 83f467e2: 4685 li a3,1 + 83f467e4: 8ace mv s5,s3 + 83f467e6: 00015597 auipc a1,0x15 + 83f467ea: e9258593 addi a1,a1,-366 # 83f5b678 + 83f467ee: 00299813 slli a6,s3,0x2 + 83f467f2: 4701 li a4,0 + 83f467f4: 38f6d6e3 bge a3,a5,83f47380 + tmp_ifft_out[i] = st->ana_win[i] * st->float_x[i]; + 83f467f8: 008bb603 ld a2,8(s7) + 83f467fc: 060bb683 ld a3,96(s7) + 83f46800: 00271513 slli a0,a4,0x2 + 83f46804: 962a add a2,a2,a0 + 83f46806: 96aa add a3,a3,a0 + 83f46808: 00062787 flw fa5,0(a2) + 83f4680c: 0006a707 flw fa4,0(a3) + tmp_ifft_out[(nFFT/2) + i] = 0.0F; + 83f46810: 01058633 add a2,a1,a6 + for (i = 0; i < (nFFT/2); i++) { + 83f46814: 0591 addi a1,a1,4 + tmp_ifft_out[i] = st->ana_win[i] * st->float_x[i]; + 83f46816: 10e7f7d3 fmul.s fa5,fa5,fa4 + for (i = 0; i < (nFFT/2); i++) { + 83f4681a: 0705 addi a4,a4,1 + 83f4681c: 0007069b sext.w a3,a4 + tmp_ifft_out[i] = st->ana_win[i] * st->float_x[i]; + 83f46820: fef5ae27 fsw fa5,-4(a1) + tmp_ifft_out[(nFFT/2) + i] = 0.0F; + 83f46824: 00062023 sw zero,0(a2) + for (i = 0; i < (nFFT/2); i++) { + 83f46828: fd36c8e3 blt a3,s3,83f467f8 + } + + /* Take fourier transform of one frame */ + speech_fft(st->nr_fft_table, tmp_ifft_out, tmp_fft_out); /* faster than matlab fft() */ + 83f4682c: 000bb503 ld a0,0(s7) + 83f46830: 00014617 auipc a2,0x14 + 83f46834: 44060613 addi a2,a2,1088 # 83f5ac70 + 83f46838: 00015597 auipc a1,0x15 + 83f4683c: e4058593 addi a1,a1,-448 # 83f5b678 + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f46840: 8432 mv s0,a2 + 83f46842: ec32 sd a2,24(sp) + speech_fft(st->nr_fft_table, tmp_ifft_out, tmp_fft_out); /* faster than matlab fft() */ + 83f46844: 059020ef jal ra,83f4909c + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f46848: 00042787 flw fa5,0(s0) + 83f4684c: d004fa53 fcvt.s.w fs4,s1 + nr_fd_half[0].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + 83f46850: 0000c417 auipc s0,0xc + 83f46854: ae440413 addi s0,s0,-1308 # 83f52334 <__func__.1+0x13c> + 83f46858: 00042707 flw fa4,0(s0) + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f4685c: 1147f7d3 fmul.s fa5,fa5,fs4 + 83f46860: 00013797 auipc a5,0x13 + 83f46864: 50078793 addi a5,a5,1280 # 83f59d60 + 83f46868: f03e sd a5,32(sp) + nr_fd_half[0].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + 83f4686a: 00e7a227 fsw fa4,4(a5) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f4686e: 470d li a4,3 + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f46870: 00f7a027 fsw fa5,0(a5) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f46874: 67c2 ld a5,16(sp) + 83f46876: 02f75c63 bge a4,a5,83f468ae + 83f4687a: 00014697 auipc a3,0x14 + 83f4687e: 3fa68693 addi a3,a3,1018 # 83f5ac74 + 83f46882: 00013717 auipc a4,0x13 + 83f46886: 4e670713 addi a4,a4,1254 # 83f59d68 + 83f4688a: 4605 li a2,1 + nr_fd_half[j].re = tmp_fft_out[k] * nFFT; + 83f4688c: 0006a707 flw fa4,0(a3) + nr_fd_half[j].im = tmp_fft_out[k+1] * nFFT; + 83f46890: 0046a787 flw fa5,4(a3) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f46894: 0721 addi a4,a4,8 + nr_fd_half[j].re = tmp_fft_out[k] * nFFT; + 83f46896: 11477753 fmul.s fa4,fa4,fs4 + nr_fd_half[j].im = tmp_fft_out[k+1] * nFFT; + 83f4689a: 1147f7d3 fmul.s fa5,fa5,fs4 + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f4689e: 2605 addiw a2,a2,1 + 83f468a0: 06a1 addi a3,a3,8 + nr_fd_half[j].re = tmp_fft_out[k] * nFFT; + 83f468a2: fee72c27 fsw fa4,-8(a4) + nr_fd_half[j].im = tmp_fft_out[k+1] * nFFT; + 83f468a6: fef72e27 fsw fa5,-4(a4) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f468aa: ff3641e3 blt a2,s3,83f4688c + } + nr_fd_half[nFFT/2].re = tmp_fft_out[nFFT-1] * nFFT; + 83f468ae: 6762 ld a4,24(sp) + 83f468b0: 34fd addiw s1,s1,-1 + 83f468b2: 00249793 slli a5,s1,0x2 + 83f468b6: 00f70cb3 add s9,a4,a5 + 83f468ba: 000ca787 flw fa5,0(s9) # 8000 <_EL1_STACK_SIZE+0x7800> + 83f468be: 7702 ld a4,32(sp) + nr_fd_half[nFFT/2].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + 83f468c0: 00042707 flw fa4,0(s0) + nr_fd_half[nFFT/2].re = tmp_fft_out[nFFT-1] * nFFT; + 83f468c4: 1147f7d3 fmul.s fa5,fa5,fs4 + 83f468c8: e0be sd a5,64(sp) + 83f468ca: 00399793 slli a5,s3,0x3 + 83f468ce: 973e add a4,a4,a5 + + a_abs(nr_fd_half, nr_sig, (nFFT/2+1)); /* amplitude */ + 83f468d0: 2a85 addiw s5,s5,1 + nr_fd_half[nFFT/2].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + 83f468d2: 00e72227 fsw fa4,4(a4) + nr_fd_half[nFFT/2].re = tmp_fft_out[nFFT-1] * nFFT; + 83f468d6: 00f72027 fsw fa5,0(a4) + a_abs(nr_fd_half, nr_sig, (nFFT/2+1)); /* amplitude */ + 83f468da: 00014597 auipc a1,0x14 + 83f468de: e8e58593 addi a1,a1,-370 # 83f5a768 + 83f468e2: 00013517 auipc a0,0x13 + 83f468e6: 47e50513 addi a0,a0,1150 # 83f59d60 + 83f468ea: 8656 mv a2,s5 + nr_fd_half[nFFT/2].re = tmp_fft_out[nFFT-1] * nFFT; + 83f468ec: fc3e sd a5,56(sp) + a_abs(nr_fd_half, nr_sig, (nFFT/2+1)); /* amplitude */ + 83f468ee: 197020ef jal ra,83f49284 + c_power(nr_sig, tmp_ifft_out, (nFFT/2+1)); /* power */ + 83f468f2: 8656 mv a2,s5 + 83f468f4: 00014517 auipc a0,0x14 + 83f468f8: e7450513 addi a0,a0,-396 # 83f5a768 + 83f468fc: 00015597 auipc a1,0x15 + 83f46900: d7c58593 addi a1,a1,-644 # 83f5b678 + 83f46904: 031020ef jal ra,83f49134 + + /* Solve the issue of silence segment appeared in the beginning */ + //tmp1 = c_sum(nr_sig, (nFFT/2+1)); + tmp1 = c_sum(nr_sig, (nFFT/2)); + 83f46908: 85ce mv a1,s3 + 83f4690a: 00014517 auipc a0,0x14 + 83f4690e: e5e50513 addi a0,a0,-418 # 83f5a768 + 83f46912: 145020ef jal ra,83f49256 + if (tmp1/(nFFT/2.0F) < 0.0003F) { /* small signal segment */ + 83f46916: 0000c797 auipc a5,0xc + 83f4691a: 95a7a407 flw fs0,-1702(a5) # 83f52270 <__func__.1+0x78> + 83f4691e: 108a74d3 fmul.s fs1,fs4,fs0 + 83f46922: 0000c797 auipc a5,0xc + 83f46926: a167a707 flw fa4,-1514(a5) # 83f52338 <__func__.1+0x140> + 83f4692a: 18957553 fdiv.s fa0,fa0,fs1 + 83f4692e: a0e51753 flt.s a4,fa0,fa4 + 83f46932: c35d beqz a4,83f469d8 + *frame = 1.0F; /* reset initial noise power estimate */ + 83f46934: 0000c797 auipc a5,0xc + 83f46938: 91c7a787 flw fa5,-1764(a5) # 83f52250 <__func__.1+0x58> + st->vad_dr_cnt = 0.0F; + st->vad_dr = 0.0F; + st->vad_mmse = 0.0F; + st->vad_mmse_cnt = 0.0F; + xtmp_im = nFFT / 2.0F; + for (i = 0; i < (int)(xtmp_im + 1.0F); i++) { + 83f4693c: 00f4f753 fadd.s fa4,fs1,fa5 + *frame = 1.0F; /* reset initial noise power estimate */ + 83f46940: 00f92027 fsw fa5,0(s2) + st->vad_slope_cnt = 0.0F; + 83f46944: 060bb423 sd zero,104(s7) + st->vad_dr_cnt = 0.0F; + 83f46948: 060bb823 sd zero,112(s7) + st->vad_mmse = 0.0F; + 83f4694c: 060bbc23 sd zero,120(s7) + for (i = 0; i < (int)(xtmp_im + 1.0F); i++) { + 83f46950: c00716d3 fcvt.w.s a3,fa4,rtz + 83f46954: 4701 li a4,0 + 83f46956: 2681 sext.w a3,a3 + 83f46958: 00269613 slli a2,a3,0x2 + 83f4695c: 02d05463 blez a3,83f46984 + st->noise_mean[i] = 0.0F; + 83f46960: 030bb683 ld a3,48(s7) + 83f46964: 96ba add a3,a3,a4 + 83f46966: 0006a023 sw zero,0(a3) + st->noise_mu2[i] = 0.0F; + 83f4696a: 038bb683 ld a3,56(s7) + 83f4696e: 96ba add a3,a3,a4 + 83f46970: 0006a023 sw zero,0(a3) + st->Xk_prev[i] = 0.0F; + 83f46974: 028bb683 ld a3,40(s7) + 83f46978: 96ba add a3,a3,a4 + 83f4697a: 0006a023 sw zero,0(a3) + for (i = 0; i < (int)(xtmp_im + 1.0F); i++) { + 83f4697e: 0711 addi a4,a4,4 + 83f46980: fee610e3 bne a2,a4,83f46960 + 83f46984: 4701 li a4,0 + } + for (i = 0; i < 5; i++) { + 83f46986: 4651 li a2,20 + st->noisy_st_trough[i] = 0.0F; + 83f46988: 048bb683 ld a3,72(s7) + 83f4698c: 96ba add a3,a3,a4 + 83f4698e: 0006a023 sw zero,0(a3) + st->noisy_st_peak[i] = 0.0F; + 83f46992: 050bb683 ld a3,80(s7) + 83f46996: 96ba add a3,a3,a4 + 83f46998: 0006a023 sw zero,0(a3) + for (j = 0; j < 3; j++) { + st->amp_inst_band[i+5*j] = 0.0F; + 83f4699c: 040bb683 ld a3,64(s7) + 83f469a0: 96ba add a3,a3,a4 + 83f469a2: 0006a023 sw zero,0(a3) + 83f469a6: 040bb683 ld a3,64(s7) + 83f469aa: 96ba add a3,a3,a4 + 83f469ac: 0006aa23 sw zero,20(a3) + 83f469b0: 040bb683 ld a3,64(s7) + 83f469b4: 96ba add a3,a3,a4 + 83f469b6: 0206a423 sw zero,40(a3) + for (i = 0; i < 5; i++) { + 83f469ba: 0711 addi a4,a4,4 + 83f469bc: fcc716e3 bne a4,a2,83f46988 + } + } + for (i = 0; i < 3; i++) { + st->amp_inst_sum_hist[i] = 0.0F; + 83f469c0: 058bb703 ld a4,88(s7) + 83f469c4: 00072023 sw zero,0(a4) + 83f469c8: 058bb703 ld a4,88(s7) + 83f469cc: 00072223 sw zero,4(a4) + 83f469d0: 058bb703 ld a4,88(s7) + 83f469d4: 00072423 sw zero,8(a4) + } + } + + if (*frame <= initial_noise_pow_time) { /* amplitude of accumulating the first handful of frames */ + 83f469d8: 00092787 flw fa5,0(s2) + 83f469dc: a1278753 fle.s a4,fa5,fs2 + 83f469e0: c32d beqz a4,83f46a42 + 83f469e2: 00014597 auipc a1,0x14 + 83f469e6: d8658593 addi a1,a1,-634 # 83f5a768 + 83f469ea: 00014617 auipc a2,0x14 + 83f469ee: 28660613 addi a2,a2,646 # 83f5ac70 + 83f469f2: 4701 li a4,0 + for (i = 0; i < 321; i++) { + 83f469f4: 50400513 li a0,1284 + st->noise_mean[i] += nr_sig[i]; + 83f469f8: 030bb683 ld a3,48(s7) + 83f469fc: 0005a707 flw fa4,0(a1) + for (i = 0; i < 321; i++) { + 83f46a00: 0611 addi a2,a2,4 + st->noise_mean[i] += nr_sig[i]; + 83f46a02: 96ba add a3,a3,a4 + 83f46a04: 0006a787 flw fa5,0(a3) + for (i = 0; i < 321; i++) { + 83f46a08: 0591 addi a1,a1,4 + st->noise_mean[i] += nr_sig[i]; + 83f46a0a: 00e7f7d3 fadd.s fa5,fa5,fa4 + 83f46a0e: 00f6a027 fsw fa5,0(a3) + tmp_fft_out[i] = st->noise_mean[i] / (*frame); + 83f46a12: 030bb683 ld a3,48(s7) + 83f46a16: 00092707 flw fa4,0(s2) + 83f46a1a: 96ba add a3,a3,a4 + 83f46a1c: 0006a787 flw fa5,0(a3) + for (i = 0; i < 321; i++) { + 83f46a20: 0711 addi a4,a4,4 + tmp_fft_out[i] = st->noise_mean[i] / (*frame); + 83f46a22: 18e7f7d3 fdiv.s fa5,fa5,fa4 + 83f46a26: fef62e27 fsw fa5,-4(a2) + for (i = 0; i < 321; i++) { + 83f46a2a: fca717e3 bne a4,a0,83f469f8 + } + c_power(tmp_fft_out, st->noise_mu2, 321); /* average power for one frame */ + 83f46a2e: 038bb583 ld a1,56(s7) + 83f46a32: 14100613 li a2,321 + 83f46a36: 00014517 auipc a0,0x14 + 83f46a3a: 23a50513 addi a0,a0,570 # 83f5ac70 + 83f46a3e: 6f6020ef jal ra,83f49134 + /*for (i = 0; i < 321; i++) + fprintf(fp_test, "%f \n", st->noise_mu2[i]);*/ + } + + for (i = 0; i < (nFFT/2+1); i++) { + 83f46a42: 67c2 ld a5,16(sp) + 83f46a44: 56fd li a3,-1 + 83f46a46: 00015597 auipc a1,0x15 + 83f46a4a: c3258593 addi a1,a1,-974 # 83f5b678 + 83f46a4e: 00013517 auipc a0,0x13 + 83f46a52: 90250513 addi a0,a0,-1790 # 83f59350 + 83f46a56: 4701 li a4,0 + 83f46a58: 06d7c663 blt a5,a3,83f46ac4 + if (st->noise_mu2[i] == 0.0F) { /* zero denominator */ + 83f46a5c: f00006d3 fmv.w.x fa3,zero + } else { + gammak[i] = 40.0F; + } + } else { + absar = tmp_ifft_out[i] / st->noise_mu2[i]; + if (!(absar < 40.0F)) { + 83f46a60: 0000c797 auipc a5,0xc + 83f46a64: 8d07a607 flw fa2,-1840(a5) # 83f52330 <__func__.1+0x138> + gammak[i] = 40.0F; + 83f46a68: 0000c817 auipc a6,0xc + 83f46a6c: 8c880813 addi a6,a6,-1848 # 83f52330 <__func__.1+0x138> + 83f46a70: a821 j 83f46a88 + if (tmp_ifft_out[i] == 0.0F) { + 83f46a72: 3c060763 beqz a2,83f46e40 + gammak[i] = 0.0F; + 83f46a76: 00052023 sw zero,0(a0) + for (i = 0; i < (nFFT/2+1); i++) { + 83f46a7a: 0705 addi a4,a4,1 + 83f46a7c: 0007069b sext.w a3,a4 + 83f46a80: 0591 addi a1,a1,4 + 83f46a82: 0511 addi a0,a0,4 + 83f46a84: 04d9c063 blt s3,a3,83f46ac4 + if (st->noise_mu2[i] == 0.0F) { /* zero denominator */ + 83f46a88: 038bb603 ld a2,56(s7) + 83f46a8c: 00271693 slli a3,a4,0x2 + if (tmp_ifft_out[i] == 0.0F) { + 83f46a90: 0005a787 flw fa5,0(a1) + if (st->noise_mu2[i] == 0.0F) { /* zero denominator */ + 83f46a94: 96b2 add a3,a3,a2 + 83f46a96: 0006a707 flw fa4,0(a3) + if (tmp_ifft_out[i] == 0.0F) { + 83f46a9a: a0d7a653 feq.s a2,fa5,fa3 + if (st->noise_mu2[i] == 0.0F) { /* zero denominator */ + 83f46a9e: a0d726d3 feq.s a3,fa4,fa3 + 83f46aa2: fae1 bnez a3,83f46a72 + absar = tmp_ifft_out[i] / st->noise_mu2[i]; + 83f46aa4: 18e7f7d3 fdiv.s fa5,fa5,fa4 + if (!(absar < 40.0F)) { + 83f46aa8: a0c796d3 flt.s a3,fa5,fa2 + 83f46aac: e299 bnez a3,83f46ab2 + absar = 40.0F; + 83f46aae: 20c607d3 fmv.s fa5,fa2 + for (i = 0; i < (nFFT/2+1); i++) { + 83f46ab2: 0705 addi a4,a4,1 + } + gammak[i] = absar; /* posteriori SNR */ + 83f46ab4: 00f52027 fsw fa5,0(a0) + for (i = 0; i < (nFFT/2+1); i++) { + 83f46ab8: 0007069b sext.w a3,a4 + 83f46abc: 0591 addi a1,a1,4 + 83f46abe: 0511 addi a0,a0,4 + 83f46ac0: fcd9d4e3 bge s3,a3,83f46a88 + } + } + + if (*frame == 1.0F) { /* priori SNR for the first frame */ + 83f46ac4: 00092787 flw fa5,0(s2) + 83f46ac8: 0000b797 auipc a5,0xb + 83f46acc: 7887aa87 flw fs5,1928(a5) # 83f52250 <__func__.1+0x58> + 83f46ad0: a157a753 feq.s a4,fa5,fs5 + 83f46ad4: 78070d63 beqz a4,83f4726e + for (k = 0; k < 321; k++) { + xtmp_im = gammak[k] - 1.0F; + xtmp_im = MAX(xtmp_im, 0.0F); + 83f46ad8: f0000653 fmv.w.x fa2,zero + 83f46adc: 00013717 auipc a4,0x13 + 83f46ae0: 87470713 addi a4,a4,-1932 # 83f59350 + 83f46ae4: 00013697 auipc a3,0x13 + 83f46ae8: d7468693 addi a3,a3,-652 # 83f59858 + 83f46aec: 00013497 auipc s1,0x13 + 83f46af0: d6848493 addi s1,s1,-664 # 83f59854 + xtmp_im = gammak[k] - 1.0F; + 83f46af4: 00072787 flw fa5,0(a4) + for (k = 0; k < 321; k++) { + 83f46af8: 0711 addi a4,a4,4 + xtmp_im = gammak[k] - 1.0F; + 83f46afa: 0957f7d3 fsub.s fa5,fa5,fs5 + xtmp_im = MAX(xtmp_im, 0.0F); + 83f46afe: a0c79653 flt.s a2,fa5,fa2 + 83f46b02: c219 beqz a2,83f46b08 + 83f46b04: f00007d3 fmv.w.x fa5,zero + ksi[k] = st->aa + (1.0F - st->aa) * xtmp_im; + 83f46b08: 088ba687 flw fa3,136(s7) + for (k = 0; k < 321; k++) { + 83f46b0c: 0691 addi a3,a3,4 + ksi[k] = st->aa + (1.0F - st->aa) * xtmp_im; + 83f46b0e: 08daf753 fsub.s fa4,fs5,fa3 + 83f46b12: 68f777c3 fmadd.s fa5,fa4,fa5,fa3 + 83f46b16: fef6ae27 fsw fa5,-4(a3) + for (k = 0; k < 321; k++) { + 83f46b1a: fce49de3 bne s1,a4,83f46af4 + 83f46b1e: 00013c97 auipc s9,0x13 + 83f46b22: 23ec8c93 addi s9,s9,574 # 83f59d5c + xtmp_im = gammak[k] - 1.0F; + xtmp_im = MAX(xtmp_im, 0.0F); + if (0.0F == st->noise_mu2[k]) + st->noise_mu2[k] = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + ksi[k] = st->aa * st->Xk_prev[k] / st->noise_mu2[k] + (1.0F - st->aa) * xtmp_im; + ksi[k] = MAX(ksi[k], st->ksi_min); /* limit ksi greater than -25dB in power */ + 83f46b26: 4751 li a4,20 + } + } + + /* slope detection */ + for (i = 0; i < 5; i++) { + 83f46b28: 02800593 li a1,40 + st->amp_inst_band[10 + i] = st->amp_inst_band[5 + i]; + 83f46b2c: 040bb603 ld a2,64(s7) + 83f46b30: 963a add a2,a2,a4 + 83f46b32: 00062787 flw fa5,0(a2) + 83f46b36: 00f62a27 fsw fa5,20(a2) + st->amp_inst_band[5 + i] = st->amp_inst_band[i]; + 83f46b3a: 040bb603 ld a2,64(s7) + 83f46b3e: 963a add a2,a2,a4 + 83f46b40: fec62787 flw fa5,-20(a2) + for (i = 0; i < 5; i++) { + 83f46b44: 0711 addi a4,a4,4 + st->amp_inst_band[5 + i] = st->amp_inst_band[i]; + 83f46b46: 00f62027 fsw fa5,0(a2) + for (i = 0; i < 5; i++) { + 83f46b4a: feb711e3 bne a4,a1,83f46b2c + } + + st->amp_inst_band[0] = c_sum(*(float (*)[20])&nr_sig[4], 20); /* 20 */ + 83f46b4e: 040bb403 ld s0,64(s7) + 83f46b52: 45d1 li a1,20 + 83f46b54: 00014517 auipc a0,0x14 + 83f46b58: c2450513 addi a0,a0,-988 # 83f5a778 + 83f46b5c: 6fa020ef jal ra,83f49256 + 83f46b60: 00a42027 fsw fa0,0(s0) + st->amp_inst_band[1] = c_sum(*(float (*)[20])&nr_sig[24], 20); /* 20 */ + 83f46b64: 040bb403 ld s0,64(s7) + 83f46b68: 45d1 li a1,20 + 83f46b6a: 00014517 auipc a0,0x14 + 83f46b6e: c5e50513 addi a0,a0,-930 # 83f5a7c8 + 83f46b72: 6e4020ef jal ra,83f49256 + 83f46b76: 00a42227 fsw fa0,4(s0) + st->amp_inst_band[2] = c_sum(*(float (*)[40])&nr_sig[44], 40); /* 40 */ + 83f46b7a: 040bb403 ld s0,64(s7) + 83f46b7e: 02800593 li a1,40 + 83f46b82: 00014517 auipc a0,0x14 + 83f46b86: c9650513 addi a0,a0,-874 # 83f5a818 + 83f46b8a: 6cc020ef jal ra,83f49256 + 83f46b8e: 00a42427 fsw fa0,8(s0) + st->amp_inst_band[3] = c_sum(*(float (*)[80])&nr_sig[84], 80); /* 80 */ + 83f46b92: 040bb403 ld s0,64(s7) + 83f46b96: 05000593 li a1,80 + 83f46b9a: 00014517 auipc a0,0x14 + 83f46b9e: d1e50513 addi a0,a0,-738 # 83f5a8b8 + 83f46ba2: 6b4020ef jal ra,83f49256 + 83f46ba6: 00a42627 fsw fa0,12(s0) + st->amp_inst_band[4] = c_sum(*(float (*)[156])&nr_sig[164], 156); /* 156 */ + 83f46baa: 040bb403 ld s0,64(s7) + 83f46bae: 09c00593 li a1,156 + 83f46bb2: 00014517 auipc a0,0x14 + 83f46bb6: e4650513 addi a0,a0,-442 # 83f5a9f8 + 83f46bba: 69c020ef jal ra,83f49256 + /*for (i = 0; i < 5; i++) + fprintf(fp_test, "%f \n", st->amp_inst_band[i]);*/ + + slope_detection(st); + 83f46bbe: 855e mv a0,s7 + st->amp_inst_band[4] = c_sum(*(float (*)[156])&nr_sig[164], 156); /* 156 */ + 83f46bc0: 00a42827 fsw fa0,16(s0) + slope_detection(st); + 83f46bc4: 5d6020ef jal ra,83f4919a + + /* dynamic range detection */ + dr_detection(st); + 83f46bc8: 855e mv a0,s7 + 83f46bca: 7dd020ef jal ra,83f49ba6 + + if ((st->vad_slope != 0.0F) || (st->vad_dr != 0.0F)) { + 83f46bce: 06cba707 flw fa4,108(s7) + 83f46bd2: f00007d3 fmv.w.x fa5,zero + vad = true; + 83f46bd6: 4a85 li s5,1 + if ((st->vad_slope != 0.0F) || (st->vad_dr != 0.0F)) { + 83f46bd8: a0f72753 feq.s a4,fa4,fa5 + 83f46bdc: c719 beqz a4,83f46bea + 83f46bde: 074ba707 flw fa4,116(s7) + 83f46be2: a0f72ad3 feq.s s5,fa4,fa5 + vad = true; + 83f46be6: 001aca93 xori s5,s5,1 + 83f46bea: 00014797 auipc a5,0x14 + 83f46bee: 08678793 addi a5,a5,134 # 83f5ac70 + 83f46bf2: 00013d97 auipc s11,0x13 + 83f46bf6: c66d8d93 addi s11,s11,-922 # 83f59858 + 83f46bfa: ec3e sd a5,24(sp) + 83f46bfc: 863e mv a2,a5 + 83f46bfe: 876e mv a4,s11 + vad = false; + } + + /* log_sigma_k calculation for mmse vad */ + for (i = 0; i < 321; i++) { + tmp_fft_out[i] = 1.0F + ksi[i]; + 83f46c00: 00072787 flw fa5,0(a4) + for (i = 0; i < 321; i++) { + 83f46c04: 0611 addi a2,a2,4 + 83f46c06: 0711 addi a4,a4,4 + tmp_fft_out[i] = 1.0F + ksi[i]; + 83f46c08: 0157f7d3 fadd.s fa5,fa5,fs5 + 83f46c0c: fef62e27 fsw fa5,-4(a2) + for (i = 0; i < 321; i++) { + 83f46c10: feec98e3 bne s9,a4,83f46c00 + } + b_log(tmp_fft_out); /* C = log(1+ksi) */ + 83f46c14: 00014517 auipc a0,0x14 + 83f46c18: 05c50513 addi a0,a0,92 # 83f5ac70 + 83f46c1c: 200050ef jal ra,83f4be1c + + for (k = 0; k < 321; k++) { + 83f46c20: 00012417 auipc s0,0x12 + 83f46c24: 73040413 addi s0,s0,1840 # 83f59350 + if (0.0F == (1.0F + ksi[k])) + 83f46c28: f00005d3 fmv.w.x fa1,zero + b_log(tmp_fft_out); /* C = log(1+ksi) */ + 83f46c2c: 00014597 auipc a1,0x14 + 83f46c30: 04458593 addi a1,a1,68 # 83f5ac70 + 83f46c34: 8522 mv a0,s0 + 83f46c36: 00013617 auipc a2,0x13 + 83f46c3a: c2260613 addi a2,a2,-990 # 83f59858 + tmp_fft_out[k] = gammak[k] * ksi[k] / ((float)3.3495873e-008) - tmp_fft_out[k]; /* assign a small value to avoid dividing by zero */ + 83f46c3e: 0000b797 auipc a5,0xb + 83f46c42: 6f67a507 flw fa0,1782(a5) # 83f52334 <__func__.1+0x13c> + 83f46c46: a821 j 83f46c5e + 83f46c48: 18a7f7d3 fdiv.s fa5,fa5,fa0 + for (k = 0; k < 321; k++) { + 83f46c4c: 0591 addi a1,a1,4 + 83f46c4e: 0611 addi a2,a2,4 + 83f46c50: 0511 addi a0,a0,4 + tmp_fft_out[k] = gammak[k] * ksi[k] / ((float)3.3495873e-008) - tmp_fft_out[k]; /* assign a small value to avoid dividing by zero */ + 83f46c52: 08e7f7d3 fsub.s fa5,fa5,fa4 + 83f46c56: fef5ae27 fsw fa5,-4(a1) + for (k = 0; k < 321; k++) { + 83f46c5a: 02cc8b63 beq s9,a2,83f46c90 + if (0.0F == (1.0F + ksi[k])) + 83f46c5e: 00062787 flw fa5,0(a2) + tmp_fft_out[k] = gammak[k] * ksi[k] / ((float)3.3495873e-008) - tmp_fft_out[k]; /* assign a small value to avoid dividing by zero */ + 83f46c62: 00052607 flw fa2,0(a0) + 83f46c66: 0005a707 flw fa4,0(a1) + if (0.0F == (1.0F + ksi[k])) + 83f46c6a: 0157f6d3 fadd.s fa3,fa5,fs5 + tmp_fft_out[k] = gammak[k] * ksi[k] / ((float)3.3495873e-008) - tmp_fft_out[k]; /* assign a small value to avoid dividing by zero */ + 83f46c6e: 10c7f7d3 fmul.s fa5,fa5,fa2 + if (0.0F == (1.0F + ksi[k])) + 83f46c72: a0b6a8d3 feq.s a7,fa3,fa1 + 83f46c76: fc0899e3 bnez a7,83f46c48 + else + tmp_fft_out[k] = gammak[k] * ksi[k] / (1.0F + ksi[k]) - tmp_fft_out[k]; /* log_sigma_k */ + 83f46c7a: 18d7f7d3 fdiv.s fa5,fa5,fa3 + for (k = 0; k < 321; k++) { + 83f46c7e: 0591 addi a1,a1,4 + 83f46c80: 0611 addi a2,a2,4 + 83f46c82: 0511 addi a0,a0,4 + tmp_fft_out[k] = gammak[k] * ksi[k] / (1.0F + ksi[k]) - tmp_fft_out[k]; /* log_sigma_k */ + 83f46c84: 08e7f7d3 fsub.s fa5,fa5,fa4 + 83f46c88: fef5ae27 fsw fa5,-4(a1) + for (k = 0; k < 321; k++) { + 83f46c8c: fccc99e3 bne s9,a2,83f46c5e + } + + xtmp_im = c_sum(tmp_fft_out, nFFT/2); /* here only consider log_sigma_k(1:nFFT/2) */ + 83f46c90: 85ce mv a1,s3 + 83f46c92: 00014517 auipc a0,0x14 + 83f46c96: fde50513 addi a0,a0,-34 # 83f5ac70 + 83f46c9a: 5bc020ef jal ra,83f49256 + xtmp_im = xtmp_im/(nFFT/2.0F); + 83f46c9e: 189574d3 fdiv.s fs1,fa0,fs1 + + if (xtmp_im <= st->eta) { + 83f46ca2: 080ba787 flw fa5,128(s7) + 83f46ca6: a0f48653 fle.s a2,fs1,fa5 + 83f46caa: 5a060963 beqz a2,83f4725c + st->vad_mmse_cnt = MAX(0.0F, st->vad_mmse_cnt - 1.0F); + 83f46cae: 07cba787 flw fa5,124(s7) + 83f46cb2: f0000753 fmv.w.x fa4,zero + 83f46cb6: 0957f7d3 fsub.s fa5,fa5,fs5 + 83f46cba: a0f71653 flt.s a2,fa4,fa5 + 83f46cbe: 64060763 beqz a2,83f4730c + if (st->vad_mmse_cnt == 0.0F) { + st->vad_mmse = 0.0F; + } + } else { + st->vad_mmse = 1.0F; + st->vad_mmse_cnt = st->vad_mmse_cnt_para; + 83f46cc2: 06fbae27 fsw fa5,124(s7) + } + + /* noise power estimate correction when it is too high */ + /* small speech in quiet after big statioanry noise, correct wrong */ + st->amp_inst_sum_hist[2] = st->amp_inst_sum_hist[1]; + 83f46cc6: 058bb603 ld a2,88(s7) + st->amp_inst_sum_hist[1] = st->amp_inst_sum_hist[0]; + st->amp_inst_sum_hist[0] = c_sum(st->amp_inst_band, 5); + 83f46cca: 4595 li a1,5 + st->amp_inst_sum_hist[2] = st->amp_inst_sum_hist[1]; + 83f46ccc: 00462787 flw fa5,4(a2) + 83f46cd0: 00f62427 fsw fa5,8(a2) + st->amp_inst_sum_hist[1] = st->amp_inst_sum_hist[0]; + 83f46cd4: 058bb603 ld a2,88(s7) + 83f46cd8: 00062787 flw fa5,0(a2) + 83f46cdc: 00f62227 fsw fa5,4(a2) + st->amp_inst_sum_hist[0] = c_sum(st->amp_inst_band, 5); + 83f46ce0: 040bb503 ld a0,64(s7) + 83f46ce4: 058bbb03 ld s6,88(s7) + 83f46ce8: 56e020ef jal ra,83f49256 + 83f46cec: 00ab2027 fsw fa0,0(s6) + //fprintf(fp_test, "%f \n", st->amp_inst_sum_hist[0]); + + c_power(st->amp_inst_sum_hist, b_c, 3); /* power based */ + 83f46cf0: 058bb503 ld a0,88(s7) + 83f46cf4: 460d li a2,3 + 83f46cf6: 088c addi a1,sp,80 + 83f46cf8: 43c020ef jal ra,83f49134 + /*for (k = 0; k < 3; k++) + fprintf(fp_test, "%f \n", b_c[k]);*/ + + for (k = 0; k < 3; k++) { + b_c[k] *= 0.3333F; /* average power */ + 83f46cfc: 05012607 flw fa2,80(sp) + 83f46d00: 05412687 flw fa3,84(sp) + 83f46d04: 0000b797 auipc a5,0xb + 83f46d08: 6387a787 flw fa5,1592(a5) # 83f5233c <__func__.1+0x144> + 83f46d0c: 10f67653 fmul.s fa2,fa2,fa5 + 83f46d10: 10f6f6d3 fmul.s fa3,fa3,fa5 + 83f46d14: 05812707 flw fa4,88(sp) + xtmp_im = b_c[0]; + for (k = 0; k < 2; k++) { + xtmp_im += b_c[k + 1]; + } + + absar = st->noise_mu2[4]; + 83f46d18: 038bb503 ld a0,56(s7) + b_c[k] *= 0.3333F; /* average power */ + 83f46d1c: 10f77753 fmul.s fa4,fa4,fa5 + xtmp_im += b_c[k + 1]; + 83f46d20: 00d675d3 fadd.s fa1,fa2,fa3 + absar = st->noise_mu2[4]; + 83f46d24: 01052787 flw fa5,16(a0) + b_c[k] *= 0.3333F; /* average power */ + 83f46d28: 04c12827 fsw fa2,80(sp) + 83f46d2c: 04d12a27 fsw fa3,84(sp) + 83f46d30: 04e12c27 fsw fa4,88(sp) + xtmp_im += b_c[k + 1]; + 83f46d34: 00e5f5d3 fadd.s fa1,fa1,fa4 + for (k = 0; k < 315; k++) { + 83f46d38: 01450613 addi a2,a0,20 + 83f46d3c: 50050593 addi a1,a0,1280 + absar += st->noise_mu2[k + 5]; + 83f46d40: 00062707 flw fa4,0(a2) + for (k = 0; k < 315; k++) { + 83f46d44: 0611 addi a2,a2,4 + absar += st->noise_mu2[k + 5]; + 83f46d46: 00e7f7d3 fadd.s fa5,fa5,fa4 + for (k = 0; k < 315; k++) { + 83f46d4a: fec59be3 bne a1,a2,83f46d40 + } + + if (absar / 8.0F > xtmp_im) { /* +/-18dB for statioanry noise variance for the whole signals, assumption */ + 83f46d4e: 0000b797 auipc a5,0xb + 83f46d52: 5f27a707 flw fa4,1522(a5) # 83f52340 <__func__.1+0x148> + 83f46d56: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f46d5a: a0f59653 flt.s a2,fa1,fa5 + 83f46d5e: c231 beqz a2,83f46da2 + 83f46d60: 00015597 auipc a1,0x15 + 83f46d64: 91858593 addi a1,a1,-1768 # 83f5b678 + 83f46d68: 4601 li a2,0 + 83f46d6a: 0000b797 auipc a5,0xb + 83f46d6e: 5da7a607 flw fa2,1498(a5) # 83f52344 <__func__.1+0x14c> + 83f46d72: 0000b797 auipc a5,0xb + 83f46d76: 5327a687 flw fa3,1330(a5) # 83f522a4 <__func__.1+0xac> + for (k = 0; k < 321; k++) { + 83f46d7a: 50400893 li a7,1284 + 83f46d7e: a019 j 83f46d84 + st->noise_mu2[k] = 0.8F * st->noise_mu2[k] + 0.2F * tmp_ifft_out[k]; /* here faster to update noise power */ + 83f46d80: 038bb503 ld a0,56(s7) + 83f46d84: 0005a707 flw fa4,0(a1) + 83f46d88: 9532 add a0,a0,a2 + 83f46d8a: 00052787 flw fa5,0(a0) + 83f46d8e: 10c77753 fmul.s fa4,fa4,fa2 + for (k = 0; k < 321; k++) { + 83f46d92: 0611 addi a2,a2,4 + 83f46d94: 0591 addi a1,a1,4 + st->noise_mu2[k] = 0.8F * st->noise_mu2[k] + 0.2F * tmp_ifft_out[k]; /* here faster to update noise power */ + 83f46d96: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + 83f46d9a: 00f52027 fsw fa5,0(a0) + for (k = 0; k < 321; k++) { + 83f46d9e: ff1611e3 bne a2,a7,83f46d80 + } + } + + /* %% keep better speech quality, not too easy to update noise power %% */ + *speech_vad = true; + 83f46da2: 4605 li a2,1 + 83f46da4: 00ca0023 sb a2,0(s4) + if ((st->vad_mmse == 0.0F) || (!vad)) { + 83f46da8: 078ba707 flw fa4,120(s7) + 83f46dac: f00007d3 fmv.w.x fa5,zero + 83f46db0: a0f72653 feq.s a2,fa4,fa5 + 83f46db4: ea59 bnez a2,83f46e4a + 83f46db6: 080a8a63 beqz s5,83f46e4a + 83f46dba: 00015a17 auipc s4,0x15 + 83f46dbe: 8bea0a13 addi s4,s4,-1858 # 83f5b678 + /* === end of vad === */ + + + /* v(k) calculation */ + for (k = 0; k < 321; k++) { + if (0.0F == (1.0F + ksi[k])) + 83f46dc2: f0000953 fmv.w.x fs2,zero + if (absar / 8.0F > xtmp_im) { /* +/-18dB for statioanry noise variance for the whole signals, assumption */ + 83f46dc6: 00014d17 auipc s10,0x14 + 83f46dca: eaad0d13 addi s10,s10,-342 # 83f5ac70 + 83f46dce: 8c52 mv s8,s4 + 83f46dd0: 00012b17 auipc s6,0x12 + 83f46dd4: 580b0b13 addi s6,s6,1408 # 83f59350 + 83f46dd8: 00013a97 auipc s5,0x13 + 83f46ddc: a80a8a93 addi s5,s5,-1408 # 83f59858 + 83f46de0: 0000b797 auipc a5,0xb + 83f46de4: 4987a487 flw fs1,1176(a5) # 83f52278 <__func__.1+0x80> + xtmp_im = ksi[k] * gammak[k] / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46de8: 0000b797 auipc a5,0xb + 83f46dec: 54c7a987 flw fs3,1356(a5) # 83f52334 <__func__.1+0x13c> + 83f46df0: a80d j 83f46e22 + 83f46df2: 1937f7d3 fdiv.s fa5,fa5,fs3 + else + xtmp_im = ksi[k] * gammak[k] / (1.0F + ksi[k]); /* v(k) */ + tmp_ifft_out[k] = xtmp_im; + tmp_fft_out[321+k] = xtmp_im / 2.0F; + tmp_fft_out[k] = (float)exp(-0.5F * xtmp_im); /* C = exp(-0.5*vk) */ + 83f46df6: 1097f553 fmul.s fa0,fa5,fs1 + tmp_fft_out[321+k] = xtmp_im / 2.0F; + 83f46dfa: 1087f753 fmul.s fa4,fa5,fs0 + tmp_ifft_out[k] = xtmp_im; + 83f46dfe: 00fc2027 fsw fa5,0(s8) + for (k = 0; k < 321; k++) { + 83f46e02: 0a91 addi s5,s5,4 + 83f46e04: 0d11 addi s10,s10,4 + tmp_fft_out[k] = (float)exp(-0.5F * xtmp_im); /* C = exp(-0.5*vk) */ + 83f46e06: 42050553 fcvt.d.s fa0,fa0 + tmp_fft_out[321+k] = xtmp_im / 2.0F; + 83f46e0a: 50ed2027 fsw fa4,1280(s10) + for (k = 0; k < 321; k++) { + 83f46e0e: 0c11 addi s8,s8,4 + tmp_fft_out[k] = (float)exp(-0.5F * xtmp_im); /* C = exp(-0.5*vk) */ + 83f46e10: dd1f90ef jal ra,83f40be0 + 83f46e14: 40157553 fcvt.s.d fa0,fa0 + for (k = 0; k < 321; k++) { + 83f46e18: 0b11 addi s6,s6,4 + tmp_fft_out[k] = (float)exp(-0.5F * xtmp_im); /* C = exp(-0.5*vk) */ + 83f46e1a: fead2e27 fsw fa0,-4(s10) + for (k = 0; k < 321; k++) { + 83f46e1e: 075c8563 beq s9,s5,83f46e88 + if (0.0F == (1.0F + ksi[k])) + 83f46e22: 000aa787 flw fa5,0(s5) + xtmp_im = ksi[k] * gammak[k] / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46e26: 000b2687 flw fa3,0(s6) + if (0.0F == (1.0F + ksi[k])) + 83f46e2a: 0157f753 fadd.s fa4,fa5,fs5 + xtmp_im = ksi[k] * gammak[k] / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46e2e: 10d7f7d3 fmul.s fa5,fa5,fa3 + if (0.0F == (1.0F + ksi[k])) + 83f46e32: a12728d3 feq.s a7,fa4,fs2 + 83f46e36: fa089ee3 bnez a7,83f46df2 + xtmp_im = ksi[k] * gammak[k] / (1.0F + ksi[k]); /* v(k) */ + 83f46e3a: 18e7f7d3 fdiv.s fa5,fa5,fa4 + 83f46e3e: bf65 j 83f46df6 + gammak[i] = 40.0F; + 83f46e40: 00082787 flw fa5,0(a6) + 83f46e44: 00f52027 fsw fa5,0(a0) + 83f46e48: b90d j 83f46a7a + 83f46e4a: 00015517 auipc a0,0x15 + 83f46e4e: 82e50513 addi a0,a0,-2002 # 83f5b678 + if (absar / 8.0F > xtmp_im) { /* +/-18dB for statioanry noise variance for the whole signals, assumption */ + 83f46e52: 4581 li a1,0 + for (k = 0; k < 321; k++) { + 83f46e54: 50400893 li a7,1284 + st->noise_mu2[k] = st->mu * st->noise_mu2[k] + (1.0F - st->mu) * tmp_ifft_out[k]; /* update noise power */ + 83f46e58: 08cba787 flw fa5,140(s7) + 83f46e5c: 00052607 flw fa2,0(a0) + 83f46e60: 038bb603 ld a2,56(s7) + 83f46e64: 08faf753 fsub.s fa4,fs5,fa5 + for (k = 0; k < 321; k++) { + 83f46e68: 0511 addi a0,a0,4 + st->noise_mu2[k] = st->mu * st->noise_mu2[k] + (1.0F - st->mu) * tmp_ifft_out[k]; /* update noise power */ + 83f46e6a: 962e add a2,a2,a1 + 83f46e6c: 00062687 flw fa3,0(a2) + for (k = 0; k < 321; k++) { + 83f46e70: 0591 addi a1,a1,4 + st->noise_mu2[k] = st->mu * st->noise_mu2[k] + (1.0F - st->mu) * tmp_ifft_out[k]; /* update noise power */ + 83f46e72: 10c77753 fmul.s fa4,fa4,fa2 + 83f46e76: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + 83f46e7a: 00f62027 fsw fa5,0(a2) + for (k = 0; k < 321; k++) { + 83f46e7e: fd159de3 bne a1,a7,83f46e58 + *speech_vad = false; + 83f46e82: 000a0023 sb zero,0(s4) + 83f46e86: bf15 j 83f46dba + } + + d_power(tmp_ifft_out, &tmp_ifft_out[321]); /* vk.^0.5 */ + 83f46e88: 00015597 auipc a1,0x15 + 83f46e8c: cf458593 addi a1,a1,-780 # 83f5bb7c + 83f46e90: 00014517 auipc a0,0x14 + 83f46e94: 7e850513 addi a0,a0,2024 # 83f5b678 + 83f46e98: 2c8020ef jal ra,83f49160 + for (i = 0; i < 321; i++) { + 83f46e9c: 00015c97 auipc s9,0x15 + 83f46ea0: ce0c8c93 addi s9,s9,-800 # 83f5bb7c + //if ((tmp_ifft_out[321+i] == 0.0F) && (gammak[i] == 0.0F)) { /* bug fixed to avoid zero denominator */ + if ((gammak[i] == 0.0F)) { + 83f46ea4: f00006d3 fmv.w.x fa3,zero + d_power(tmp_ifft_out, &tmp_ifft_out[321]); /* vk.^0.5 */ + 83f46ea8: 00014597 auipc a1,0x14 + 83f46eac: dc858593 addi a1,a1,-568 # 83f5ac70 + 83f46eb0: 86e6 mv a3,s9 + tmp_ifft_out[321+i] = 0.0F; + } else { + tmp_ifft_out[321+i] = (c * tmp_ifft_out[321+i] * tmp_fft_out[i]) / gammak[i]; + 83f46eb2: 0000b797 auipc a5,0xb + 83f46eb6: 4967a587 flw fa1,1174(a5) # 83f52348 <__func__.1+0x150> + 83f46eba: a801 j 83f46eca + tmp_ifft_out[321+i] = 0.0F; + 83f46ebc: 0006a023 sw zero,0(a3) + for (i = 0; i < 321; i++) { + 83f46ec0: 0411 addi s0,s0,4 + 83f46ec2: 0691 addi a3,a3,4 + 83f46ec4: 0591 addi a1,a1,4 + 83f46ec6: 02848863 beq s1,s0,83f46ef6 + if ((gammak[i] == 0.0F)) { + 83f46eca: 00042707 flw fa4,0(s0) + 83f46ece: a0d72553 feq.s a0,fa4,fa3 + 83f46ed2: f56d bnez a0,83f46ebc + tmp_ifft_out[321+i] = (c * tmp_ifft_out[321+i] * tmp_fft_out[i]) / gammak[i]; + 83f46ed4: 0006a787 flw fa5,0(a3) + 83f46ed8: 0005a607 flw fa2,0(a1) + for (i = 0; i < 321; i++) { + 83f46edc: 0411 addi s0,s0,4 + tmp_ifft_out[321+i] = (c * tmp_ifft_out[321+i] * tmp_fft_out[i]) / gammak[i]; + 83f46ede: 10b7f7d3 fmul.s fa5,fa5,fa1 + for (i = 0; i < 321; i++) { + 83f46ee2: 0691 addi a3,a3,4 + 83f46ee4: 0591 addi a1,a1,4 + tmp_ifft_out[321+i] = (c * tmp_ifft_out[321+i] * tmp_fft_out[i]) / gammak[i]; + 83f46ee6: 10c7f7d3 fmul.s fa5,fa5,fa2 + 83f46eea: 18e7f7d3 fdiv.s fa5,fa5,fa4 + 83f46eee: fef6ae27 fsw fa5,-4(a3) + for (i = 0; i < 321; i++) { + 83f46ef2: fc849ce3 bne s1,s0,83f46eca + } + } + + bessel_function(0.0F, &tmp_fft_out[321], tmp_fft_out); /* zero order modified Bessel function */ + 83f46ef6: f0000553 fmv.w.x fa0,zero + 83f46efa: 00014597 auipc a1,0x14 + 83f46efe: d7658593 addi a1,a1,-650 # 83f5ac70 + 83f46f02: 00014517 auipc a0,0x14 + 83f46f06: 27250513 addi a0,a0,626 # 83f5b174 + 83f46f0a: 341020ef jal ra,83f49a4a + bessel_function(1.0F, &tmp_fft_out[321], &tmp_fft_out[321]); /* first order modified Bessel function */ + 83f46f0e: 215a8553 fmv.s fa0,fs5 + 83f46f12: 00014597 auipc a1,0x14 + 83f46f16: 26258593 addi a1,a1,610 # 83f5b174 + 83f46f1a: 852e mv a0,a1 + 83f46f1c: 32f020ef jal ra,83f49a4a + + /* G(ksi, gammak) estimation */ + for (k = 0; k < 321; k++) { + 83f46f20: 0000b797 auipc a5,0xb + 83f46f24: 42c7a987 flw fs3,1068(a5) # 83f5234c <__func__.1+0x154> + tmp = tmp_ifft_out[321+k]; + xtmp_re = tmp_fft_out[k] * (1.0F + tmp_ifft_out[k]); + tmp1 = tmp_fft_out[321+k] * tmp_ifft_out[k]; + if (0.0F == (1.0F + ksi[k])) + lambda = qkr * (float)exp(tmp_ifft_out[k]) / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46f28: 0000b797 auipc a5,0xb + 83f46f2c: 40c7a907 flw fs2,1036(a5) # 83f52334 <__func__.1+0x13c> + 83f46f30: 00014a97 auipc s5,0x14 + 83f46f34: 838a8a93 addi s5,s5,-1992 # 83f5a768 + else + tmp = lambda / (1.0F + lambda) * xtmp_re; /* estimated amplitude of clean speech */ + + //Xk_prev[k].re = c_sig[k].re * c_sig[k].re - c_sig[k].im * c_sig[k].im; /* use for updating ksi in next frame */ + //Xk_prev[k].im = c_sig[k].re * c_sig[k].im + c_sig[k].im * c_sig[k].re; /* use for updating ksi in next frame */ + st->Xk_prev[k] = tmp * tmp; /* use for updating ksi in next frame */ + 83f46f38: afc00513 li a0,-1284 + 83f46f3c: 00014797 auipc a5,0x14 + 83f46f40: d3478793 addi a5,a5,-716 # 83f5ac70 + if (0.0F == (1.0F + ksi[k])) + 83f46f44: f00004d3 fmv.w.x fs1,zero + 83f46f48: 00014b17 auipc s6,0x14 + 83f46f4c: 22cb0b13 addi s6,s6,556 # 83f5b174 + 83f46f50: 00014497 auipc s1,0x14 + 83f46f54: 72848493 addi s1,s1,1832 # 83f5b678 + bessel_function(1.0F, &tmp_fft_out[321], &tmp_fft_out[321]); /* first order modified Bessel function */ + 83f46f58: 00015c17 auipc s8,0x15 + 83f46f5c: c24c0c13 addi s8,s8,-988 # 83f5bb7c + 83f46f60: 8d56 mv s10,s5 + st->Xk_prev[k] = tmp * tmp; /* use for updating ksi in next frame */ + 83f46f62: 40f50433 sub s0,a0,a5 + 83f46f66: a891 j 83f46fba + lambda = qkr * (float)exp(tmp_ifft_out[k]) / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46f68: c79f90ef jal ra,83f40be0 + 83f46f6c: 40157553 fcvt.s.d fa0,fa0 + xtmp_re = nr_sig[k] * (tmp * (xtmp_re + tmp1)); + 83f46f70: 01647453 fadd.s fs0,fs0,fs6 + 83f46f74: 000d2707 flw fa4,0(s10) + lambda = qkr * (float)exp(tmp_ifft_out[k]) / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46f78: 11357553 fmul.s fa0,fa0,fs3 + xtmp_re = nr_sig[k] * (tmp * (xtmp_re + tmp1)); + 83f46f7c: 117477d3 fmul.s fa5,fs0,fs7 + lambda = qkr * (float)exp(tmp_ifft_out[k]) / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46f80: 19257553 fdiv.s fa0,fa0,fs2 + xtmp_re = nr_sig[k] * (tmp * (xtmp_re + tmp1)); + 83f46f84: 10e7f7d3 fmul.s fa5,fa5,fa4 + if (0.0F == (1.0F + lambda)) + 83f46f88: 01557753 fadd.s fa4,fa0,fs5 + 83f46f8c: a0972553 feq.s a0,fa4,fs1 + 83f46f90: c549 beqz a0,83f4701a + tmp = lambda / ((float)3.3495873e-008) * xtmp_re; /* assign a small value to avoid dividing by zero */ + 83f46f92: 19257553 fdiv.s fa0,fa0,fs2 + 83f46f96: 10f577d3 fmul.s fa5,fa0,fa5 + st->Xk_prev[k] = tmp * tmp; /* use for updating ksi in next frame */ + 83f46f9a: 028bb503 ld a0,40(s7) + 83f46f9e: 10f7f753 fmul.s fa4,fa5,fa5 + tmp_ifft_out[321+k] = tmp; + 83f46fa2: 00fc2027 fsw fa5,0(s8) + st->Xk_prev[k] = tmp * tmp; /* use for updating ksi in next frame */ + 83f46fa6: 955a add a0,a0,s6 + 83f46fa8: 9522 add a0,a0,s0 + for (k = 0; k < 321; k++) { + 83f46faa: 0b11 addi s6,s6,4 + st->Xk_prev[k] = tmp * tmp; /* use for updating ksi in next frame */ + 83f46fac: 00e52027 fsw fa4,0(a0) + for (k = 0; k < 321; k++) { + 83f46fb0: 0d91 addi s11,s11,4 + 83f46fb2: 0d11 addi s10,s10,4 + 83f46fb4: 0c11 addi s8,s8,4 + 83f46fb6: 07648763 beq s1,s6,83f47024 + if (0.0F == (1.0F + ksi[k])) + 83f46fba: 000da787 flw fa5,0(s11) + xtmp_re = tmp_fft_out[k] * (1.0F + tmp_ifft_out[k]); + 83f46fbe: afcc2707 flw fa4,-1284(s8) + 83f46fc2: afcb2687 flw fa3,-1284(s6) + if (0.0F == (1.0F + ksi[k])) + 83f46fc6: 0157f7d3 fadd.s fa5,fa5,fs5 + xtmp_re = tmp_fft_out[k] * (1.0F + tmp_ifft_out[k]); + 83f46fca: 01577453 fadd.s fs0,fa4,fs5 + tmp1 = tmp_fft_out[321+k] * tmp_ifft_out[k]; + 83f46fce: 000b2b07 flw fs6,0(s6) + tmp = tmp_ifft_out[321+k]; + 83f46fd2: 000c2b87 flw fs7,0(s8) + lambda = qkr * (float)exp(tmp_ifft_out[k]) / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + 83f46fd6: 42070553 fcvt.d.s fa0,fa4 + if (0.0F == (1.0F + ksi[k])) + 83f46fda: a097a553 feq.s a0,fa5,fs1 + xtmp_re = tmp_fft_out[k] * (1.0F + tmp_ifft_out[k]); + 83f46fde: 10d47453 fmul.s fs0,fs0,fa3 + tmp1 = tmp_fft_out[321+k] * tmp_ifft_out[k]; + 83f46fe2: 11677b53 fmul.s fs6,fa4,fs6 + if (0.0F == (1.0F + ksi[k])) + 83f46fe6: f149 bnez a0,83f46f68 + lambda = qkr * (float)exp(tmp_ifft_out[k]) / (1.0F + ksi[k]); + 83f46fe8: bf9f90ef jal ra,83f40be0 + 83f46fec: 000da787 flw fa5,0(s11) + 83f46ff0: 40157553 fcvt.s.d fa0,fa0 + xtmp_re = nr_sig[k] * (tmp * (xtmp_re + tmp1)); + 83f46ff4: 01647453 fadd.s fs0,fs0,fs6 + lambda = qkr * (float)exp(tmp_ifft_out[k]) / (1.0F + ksi[k]); + 83f46ff8: 0157f7d3 fadd.s fa5,fa5,fs5 + 83f46ffc: 11357553 fmul.s fa0,fa0,fs3 + xtmp_re = nr_sig[k] * (tmp * (xtmp_re + tmp1)); + 83f47000: 000d2707 flw fa4,0(s10) + lambda = qkr * (float)exp(tmp_ifft_out[k]) / (1.0F + ksi[k]); + 83f47004: 18f57553 fdiv.s fa0,fa0,fa5 + xtmp_re = nr_sig[k] * (tmp * (xtmp_re + tmp1)); + 83f47008: 117477d3 fmul.s fa5,fs0,fs7 + 83f4700c: 10e7f7d3 fmul.s fa5,fa5,fa4 + if (0.0F == (1.0F + lambda)) + 83f47010: 01557753 fadd.s fa4,fa0,fs5 + 83f47014: a0972553 feq.s a0,fa4,fs1 + 83f47018: fd2d bnez a0,83f46f92 + tmp = lambda / (1.0F + lambda) * xtmp_re; /* estimated amplitude of clean speech */ + 83f4701a: 18e57553 fdiv.s fa0,fa0,fa4 + 83f4701e: 10f577d3 fmul.s fa5,fa0,fa5 + 83f47022: bfa5 j 83f46f9a + } + + for (k = 0; k < (nFFT/2+1); k++) { + 83f47024: 67c2 ld a5,16(sp) + 83f47026: 577d li a4,-1 + 83f47028: 08e7cc63 blt a5,a4,83f470c0 + 83f4702c: 00013417 auipc s0,0x13 + 83f47030: d3440413 addi s0,s0,-716 # 83f59d60 + 83f47034: 84a2 mv s1,s0 + 83f47036: f022 sd s0,32(sp) + 83f47038: 00013d17 auipc s10,0x13 + 83f4703c: 730d0d13 addi s10,s10,1840 # 83f5a768 + 83f47040: 4d81 li s11,0 + nr_sig[k] = (float)atan2(nr_fd_half[k].im, nr_fd_half[k].re); /* theta */ + 83f47042: 0004a587 flw fa1,0(s1) + 83f47046: 0044a507 flw fa0,4(s1) + for (k = 0; k < (nFFT/2+1); k++) { + 83f4704a: 0d11 addi s10,s10,4 + nr_sig[k] = (float)atan2(nr_fd_half[k].im, nr_fd_half[k].re); /* theta */ + 83f4704c: 420585d3 fcvt.d.s fa1,fa1 + 83f47050: 42050553 fcvt.d.s fa0,fa0 + for (k = 0; k < (nFFT/2+1); k++) { + 83f47054: 2d85 addiw s11,s11,1 + 83f47056: 04a1 addi s1,s1,8 + nr_sig[k] = (float)atan2(nr_fd_half[k].im, nr_fd_half[k].re); /* theta */ + 83f47058: b87f90ef jal ra,83f40bde + 83f4705c: 40157553 fcvt.s.d fa0,fa0 + 83f47060: fead2e27 fsw fa0,-4(s10) + for (k = 0; k < (nFFT/2+1); k++) { + 83f47064: fdb9dfe3 bge s3,s11,83f47042 + } + + for (k = 0; k < (nFFT/2+1); k++) { + if (nr_sig[k] == 0.0F) { + 83f47068: f00004d3 fmv.w.x fs1,zero + 83f4706c: 4481 li s1,0 + 83f4706e: a809 j 83f47080 + xtmp_im = 0.0F; + } else { + xtmp_re = (float)cos(nr_sig[k]); /* Euler's formula */ + xtmp_im = (float)sin(nr_sig[k]); /* Euler's formula */ + } + nr_fd_half[k].re = xtmp_re; /* phase part */ + 83f47070: 00842027 fsw fs0,0(s0) + nr_fd_half[k].im = xtmp_im; /* phase part */ + 83f47074: 00f42227 fsw fa5,4(s0) + for (k = 0; k < (nFFT/2+1); k++) { + 83f47078: 0a91 addi s5,s5,4 + 83f4707a: 0421 addi s0,s0,8 + 83f4707c: 0499c263 blt s3,s1,83f470c0 + if (nr_sig[k] == 0.0F) { + 83f47080: 000aa507 flw fa0,0(s5) + xtmp_im = 0.0F; + 83f47084: f00007d3 fmv.w.x fa5,zero + xtmp_re = 1.0F; + 83f47088: 215a8453 fmv.s fs0,fs5 + if (nr_sig[k] == 0.0F) { + 83f4708c: a0952753 feq.s a4,fa0,fs1 + for (k = 0; k < (nFFT/2+1); k++) { + 83f47090: 2485 addiw s1,s1,1 + if (nr_sig[k] == 0.0F) { + 83f47092: ff79 bnez a4,83f47070 + xtmp_re = (float)cos(nr_sig[k]); /* Euler's formula */ + 83f47094: 42050553 fcvt.d.s fa0,fa0 + for (k = 0; k < (nFFT/2+1); k++) { + 83f47098: 0a91 addi s5,s5,4 + 83f4709a: 0421 addi s0,s0,8 + xtmp_re = (float)cos(nr_sig[k]); /* Euler's formula */ + 83f4709c: 837f90ef jal ra,83f408d2 + xtmp_im = (float)sin(nr_sig[k]); /* Euler's formula */ + 83f470a0: ffcaa787 flw fa5,-4(s5) + xtmp_re = (float)cos(nr_sig[k]); /* Euler's formula */ + 83f470a4: 40157453 fcvt.s.d fs0,fa0 + xtmp_im = (float)sin(nr_sig[k]); /* Euler's formula */ + 83f470a8: 42078553 fcvt.d.s fa0,fa5 + 83f470ac: abbf90ef jal ra,83f40b66 + 83f470b0: 401577d3 fcvt.s.d fa5,fa0 + nr_fd_half[k].re = xtmp_re; /* phase part */ + 83f470b4: fe842c27 fsw fs0,-8(s0) + nr_fd_half[k].im = xtmp_im; /* phase part */ + 83f470b8: fef42e27 fsw fa5,-4(s0) + for (k = 0; k < (nFFT/2+1); k++) { + 83f470bc: fc99d2e3 bge s3,s1,83f47080 + 83f470c0: 00013717 auipc a4,0x13 + 83f470c4: ca070713 addi a4,a4,-864 # 83f59d60 + 83f470c8: 00013697 auipc a3,0x13 + 83f470cc: 6a068693 addi a3,a3,1696 # 83f5a768 + for (k = 0; k < 321; k++) { + //tmp1 = c_sig[k].re; + //c_sig[k].re = c_sig[k].re * nr_fd_half[k].re - c_sig[k].im * nr_fd_half[k].im; /* estimated clean speech signal */ + //c_sig[k].im = tmp1 * nr_fd_half[k].im + c_sig[k].im * nr_fd_half[k].re; /* estimated clean speech signal */ + tmp = tmp_ifft_out[321+k]; + nr_fd_half[k].re = tmp * nr_fd_half[k].re; /* estimated clean speech signal */ + 83f470d0: 00072707 flw fa4,0(a4) + nr_fd_half[k].im = tmp * nr_fd_half[k].im; /* estimated clean speech signal */ + 83f470d4: 00472787 flw fa5,4(a4) + tmp = tmp_ifft_out[321+k]; + 83f470d8: 000ca687 flw fa3,0(s9) + for (k = 0; k < 321; k++) { + 83f470dc: 0721 addi a4,a4,8 + 83f470de: 0c91 addi s9,s9,4 + nr_fd_half[k].re = tmp * nr_fd_half[k].re; /* estimated clean speech signal */ + 83f470e0: 10d77753 fmul.s fa4,fa4,fa3 + nr_fd_half[k].im = tmp * nr_fd_half[k].im; /* estimated clean speech signal */ + 83f470e4: 10d7f7d3 fmul.s fa5,fa5,fa3 + nr_fd_half[k].re = tmp * nr_fd_half[k].re; /* estimated clean speech signal */ + 83f470e8: fee72c27 fsw fa4,-8(a4) + nr_fd_half[k].im = tmp * nr_fd_half[k].im; /* estimated clean speech signal */ + 83f470ec: fef72e27 fsw fa5,-4(a4) + for (k = 0; k < 321; k++) { + 83f470f0: fee690e3 bne a3,a4,83f470d0 + } + + tmp_fft_out[0] = nr_fd_half[0].re; + 83f470f4: 7782 ld a5,32(sp) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f470f6: 458d li a1,3 + 83f470f8: 00013697 auipc a3,0x13 + 83f470fc: c7068693 addi a3,a3,-912 # 83f59d68 + tmp_fft_out[0] = nr_fd_half[0].re; + 83f47100: 0007a787 flw fa5,0(a5) + 83f47104: 67e2 ld a5,24(sp) + 83f47106: 00014717 auipc a4,0x14 + 83f4710a: b6e70713 addi a4,a4,-1170 # 83f5ac74 + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f4710e: 4605 li a2,1 + tmp_fft_out[0] = nr_fd_half[0].re; + 83f47110: 00f7a027 fsw fa5,0(a5) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f47114: 67c2 ld a5,16(sp) + 83f47116: 00f5df63 bge a1,a5,83f47134 + tmp_fft_out[k] = nr_fd_half[j].re; + 83f4711a: 0006a707 flw fa4,0(a3) + tmp_fft_out[k+1] = nr_fd_half[j].im; + 83f4711e: 0046a787 flw fa5,4(a3) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f47122: 2605 addiw a2,a2,1 + tmp_fft_out[k] = nr_fd_half[j].re; + 83f47124: 00e72027 fsw fa4,0(a4) + tmp_fft_out[k+1] = nr_fd_half[j].im; + 83f47128: 00f72227 fsw fa5,4(a4) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f4712c: 06a1 addi a3,a3,8 + 83f4712e: 0721 addi a4,a4,8 + 83f47130: ff3645e3 blt a2,s3,83f4711a + } + tmp_fft_out[nFFT-1] = nr_fd_half[nFFT/2].re; + 83f47134: 7782 ld a5,32(sp) + 83f47136: 7762 ld a4,56(sp) + + /* restore nFFT points before doing inverse FFT, do conjugate symmetric for the lower half points inside speech_ifft() */ + speech_ifft(st->nr_fft_table, tmp_fft_out, tmp_ifft_out); /* faster than matlab ifft(), in/out not use the same buffer */ + 83f47138: 00014617 auipc a2,0x14 + 83f4713c: 54060613 addi a2,a2,1344 # 83f5b678 + 83f47140: 00014597 auipc a1,0x14 + 83f47144: b3058593 addi a1,a1,-1232 # 83f5ac70 + tmp_fft_out[nFFT-1] = nr_fd_half[nFFT/2].re; + 83f47148: 00e78c33 add s8,a5,a4 + 83f4714c: 67e2 ld a5,24(sp) + 83f4714e: 6706 ld a4,64(sp) + 83f47150: 000c2787 flw fa5,0(s8) + 83f47154: 97ba add a5,a5,a4 + 83f47156: 00f7a027 fsw fa5,0(a5) + speech_ifft(st->nr_fft_table, tmp_fft_out, tmp_ifft_out); /* faster than matlab ifft(), in/out not use the same buffer */ + 83f4715a: 000bb503 ld a0,0(s7) + 83f4715e: 7ab010ef jal ra,83f49108 + for (k = 0; k < len; k++) { /* ignore output samples from (len+1) to (2*len) */ + 83f47162: 77c2 ld a5,48(sp) + 83f47164: 02f05b63 blez a5,83f4719a + 83f47168: 47b6 lw a5,76(sp) + 83f4716a: 00014717 auipc a4,0x14 + 83f4716e: 51270713 addi a4,a4,1298 # 83f5b67c + 83f47172: fff7869b addiw a3,a5,-1 + 83f47176: 02069793 slli a5,a3,0x20 + 83f4717a: 01e7d693 srli a3,a5,0x1e + 83f4717e: 96ba add a3,a3,a4 + 83f47180: 00014717 auipc a4,0x14 + 83f47184: 4f870713 addi a4,a4,1272 # 83f5b678 + tmp_ifft_out[k] /= nFFT; /* divide by nFFT to get values as in matlab */ + 83f47188: 00072787 flw fa5,0(a4) + for (k = 0; k < len; k++) { /* ignore output samples from (len+1) to (2*len) */ + 83f4718c: 0711 addi a4,a4,4 + tmp_ifft_out[k] /= nFFT; /* divide by nFFT to get values as in matlab */ + 83f4718e: 1947f7d3 fdiv.s fa5,fa5,fs4 + 83f47192: fef72e27 fsw fa5,-4(a4) + for (k = 0; k < len; k++) { /* ignore output samples from (len+1) to (2*len) */ + 83f47196: fee699e3 bne a3,a4,83f47188 + } + + for (k = 0; k < len1; k++) { + 83f4719a: 77a2 ld a5,40(sp) + 83f4719c: 4701 li a4,0 + 83f4719e: 00279593 slli a1,a5,0x2 + 83f471a2: 04f05b63 blez a5,83f471f8 + y[k] = st->y_old[k] + (tmp_ifft_out[k] * st->syn_win[k]); /* apply synthesis window and 50% OLA for output */ + 83f471a6: 010bb603 ld a2,16(s7) + 83f471aa: 020bb683 ld a3,32(s7) + 83f471ae: 000a2787 flw fa5,0(s4) + 83f471b2: 963a add a2,a2,a4 + 83f471b4: 96ba add a3,a3,a4 + 83f471b6: 0006a707 flw fa4,0(a3) + 83f471ba: 00062687 flw fa3,0(a2) + 83f471be: 67a2 ld a5,8(sp) + st->y_old[k] = tmp_ifft_out[len1 + k] * st->syn_win[len1 + k]; /* apply synthesis window and update output OLA buffer */ + 83f471c0: 00ba0633 add a2,s4,a1 + y[k] = st->y_old[k] + (tmp_ifft_out[k] * st->syn_win[k]); /* apply synthesis window and 50% OLA for output */ + 83f471c4: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + 83f471c8: 00e786b3 add a3,a5,a4 + st->y_old[k] = tmp_ifft_out[len1 + k] * st->syn_win[len1 + k]; /* apply synthesis window and update output OLA buffer */ + 83f471cc: 0a11 addi s4,s4,4 + y[k] = st->y_old[k] + (tmp_ifft_out[k] * st->syn_win[k]); /* apply synthesis window and 50% OLA for output */ + 83f471ce: 00f6a027 fsw fa5,0(a3) + st->y_old[k] = tmp_ifft_out[len1 + k] * st->syn_win[len1 + k]; /* apply synthesis window and update output OLA buffer */ + 83f471d2: 010bb683 ld a3,16(s7) + 83f471d6: 00062707 flw fa4,0(a2) + 83f471da: 020bb603 ld a2,32(s7) + 83f471de: 96ae add a3,a3,a1 + 83f471e0: 96ba add a3,a3,a4 + 83f471e2: 0006a787 flw fa5,0(a3) + 83f471e6: 00e606b3 add a3,a2,a4 + for (k = 0; k < len1; k++) { + 83f471ea: 0711 addi a4,a4,4 + st->y_old[k] = tmp_ifft_out[len1 + k] * st->syn_win[len1 + k]; /* apply synthesis window and update output OLA buffer */ + 83f471ec: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f471f0: 00f6a027 fsw fa5,0(a3) + for (k = 0; k < len1; k++) { + 83f471f4: fae599e3 bne a1,a4,83f471a6 + } + + if (1 == (unsigned short)*frame) + 83f471f8: 00092787 flw fa5,0(s2) + 83f471fc: 4685 li a3,1 + 83f471fe: c0179753 fcvt.wu.s a4,fa5,rtz + 83f47202: 1742 slli a4,a4,0x30 + 83f47204: 9341 srli a4,a4,0x30 + 83f47206: 02d71163 bne a4,a3,83f47228 + st->nr_frame1_last_sample = y[st->frame_size-1]; + 83f4720a: 098ba703 lw a4,152(s7) + 83f4720e: 67a2 ld a5,8(sp) + 83f47210: 070a slli a4,a4,0x2 + 83f47212: 973e add a4,a4,a5 + 83f47214: ffc72787 flw fa5,-4(a4) + 83f47218: 08fbaa27 fsw fa5,148(s7) + if (2 == (unsigned short)*frame) { + 83f4721c: 00092787 flw fa5,0(s2) + 83f47220: c0179753 fcvt.wu.s a4,fa5,rtz + 83f47224: 1742 slli a4,a4,0x30 + 83f47226: 9341 srli a4,a4,0x30 + 83f47228: 4689 li a3,2 + 83f4722a: 0ed70463 beq a4,a3,83f47312 + SSP_SAFE_FREE_BUF(tmp_fft_out); + SSP_SAFE_FREE_BUF(tmp_ifft_out); + SSP_SAFE_FREE_BUF(nr_sig); + SSP_SAFE_FREE_BUF(nr_fd_half); +#endif +} + 83f4722e: 60b2 ld ra,264(sp) + 83f47230: 6412 ld s0,256(sp) + 83f47232: 74ee ld s1,248(sp) + 83f47234: 794e ld s2,240(sp) + 83f47236: 79ae ld s3,232(sp) + 83f47238: 7a0e ld s4,224(sp) + 83f4723a: 6aee ld s5,216(sp) + 83f4723c: 6b4e ld s6,208(sp) + 83f4723e: 6bae ld s7,200(sp) + 83f47240: 6c0e ld s8,192(sp) + 83f47242: 7cea ld s9,184(sp) + 83f47244: 7d4a ld s10,176(sp) + 83f47246: 7daa ld s11,168(sp) + 83f47248: 246a fld fs0,152(sp) + 83f4724a: 24ca fld fs1,144(sp) + 83f4724c: 292a fld fs2,136(sp) + 83f4724e: 298a fld fs3,128(sp) + 83f47250: 3a66 fld fs4,120(sp) + 83f47252: 3ac6 fld fs5,112(sp) + 83f47254: 3b26 fld fs6,104(sp) + 83f47256: 3b86 fld fs7,96(sp) + 83f47258: 6151 addi sp,sp,272 + 83f4725a: 8082 ret + st->vad_mmse = 1.0F; + 83f4725c: 0000b797 auipc a5,0xb + 83f47260: ff47a707 flw fa4,-12(a5) # 83f52250 <__func__.1+0x58> + st->vad_mmse_cnt = st->vad_mmse_cnt_para; + 83f47264: 090ba787 flw fa5,144(s7) + st->vad_mmse = 1.0F; + 83f47268: 06ebac27 fsw fa4,120(s7) + 83f4726c: bc99 j 83f46cc2 + xtmp_im = MAX(xtmp_im, 0.0F); + 83f4726e: f00005d3 fmv.w.x fa1,zero + 83f47272: 00012517 auipc a0,0x12 + 83f47276: 0de50513 addi a0,a0,222 # 83f59350 + 83f4727a: 00012717 auipc a4,0x12 + 83f4727e: 5de70713 addi a4,a4,1502 # 83f59858 + 83f47282: 00013c97 auipc s9,0x13 + 83f47286: adac8c93 addi s9,s9,-1318 # 83f59d5c + if (*frame == 1.0F) { /* priori SNR for the first frame */ + 83f4728a: 4601 li a2,0 + xtmp_im = gammak[k] - 1.0F; + 83f4728c: 00052687 flw fa3,0(a0) + for (k = 0; k < 321; k++) { + 83f47290: 0511 addi a0,a0,4 + xtmp_im = gammak[k] - 1.0F; + 83f47292: 0956f6d3 fsub.s fa3,fa3,fs5 + xtmp_im = MAX(xtmp_im, 0.0F); + 83f47296: a0b695d3 flt.s a1,fa3,fa1 + 83f4729a: c199 beqz a1,83f472a0 + 83f4729c: f00006d3 fmv.w.x fa3,zero + if (0.0F == st->noise_mu2[k]) + 83f472a0: 038bb583 ld a1,56(s7) + 83f472a4: 95b2 add a1,a1,a2 + 83f472a6: 0005a607 flw fa2,0(a1) + 83f472aa: a0b62853 feq.s a6,fa2,fa1 + 83f472ae: 00080b63 beqz a6,83f472c4 + st->noise_mu2[k] = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + 83f472b2: 00042787 flw fa5,0(s0) + 83f472b6: 00f5a027 fsw fa5,0(a1) + ksi[k] = st->aa * st->Xk_prev[k] / st->noise_mu2[k] + (1.0F - st->aa) * xtmp_im; + 83f472ba: 038bb583 ld a1,56(s7) + 83f472be: 95b2 add a1,a1,a2 + 83f472c0: 0005a607 flw fa2,0(a1) + 83f472c4: 028bb583 ld a1,40(s7) + 83f472c8: 088ba787 flw fa5,136(s7) + 83f472cc: 95b2 add a1,a1,a2 + 83f472ce: 0005a507 flw fa0,0(a1) + 83f472d2: 08faf753 fsub.s fa4,fs5,fa5 + for (k = 0; k < 321; k++) { + 83f472d6: 0611 addi a2,a2,4 + ksi[k] = st->aa * st->Xk_prev[k] / st->noise_mu2[k] + (1.0F - st->aa) * xtmp_im; + 83f472d8: 10a7f7d3 fmul.s fa5,fa5,fa0 + 83f472dc: 18c7f7d3 fdiv.s fa5,fa5,fa2 + 83f472e0: 78d777c3 fmadd.s fa5,fa4,fa3,fa5 + 83f472e4: 00f72027 fsw fa5,0(a4) + ksi[k] = MAX(ksi[k], st->ksi_min); /* limit ksi greater than -25dB in power */ + 83f472e8: 084ba707 flw fa4,132(s7) + 83f472ec: a0e795d3 flt.s a1,fa5,fa4 + 83f472f0: e199 bnez a1,83f472f6 + 83f472f2: 20f78753 fmv.s fa4,fa5 + for (k = 0; k < 321; k++) { + 83f472f6: 0711 addi a4,a4,4 + ksi[k] = MAX(ksi[k], st->ksi_min); /* limit ksi greater than -25dB in power */ + 83f472f8: fee72e27 fsw fa4,-4(a4) + for (k = 0; k < 321; k++) { + 83f472fc: f8ec98e3 bne s9,a4,83f4728c + 83f47300: 00012497 auipc s1,0x12 + 83f47304: 55448493 addi s1,s1,1364 # 83f59854 + 83f47308: 81fff06f j 83f46b26 + st->vad_mmse = 0.0F; + 83f4730c: 060bbc23 sd zero,120(s7) + 83f47310: ba5d j 83f46cc6 + y[0] = alpha * st->nr_frame1_last_sample + alpha2 * y[0]; + 83f47312: 67a2 ld a5,8(sp) + 83f47314: 0000b717 auipc a4,0xb + 83f47318: 03c72687 flw fa3,60(a4) # 83f52350 <__func__.1+0x158> + 83f4731c: 094ba707 flw fa4,148(s7) + 83f47320: 0007a787 flw fa5,0(a5) + 83f47324: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f47328: 0000b717 auipc a4,0xb + 83f4732c: 02c72687 flw fa3,44(a4) # 83f52354 <__func__.1+0x15c> + for (i = 0; i < st->frame_size-1; i++) { + 83f47330: 4705 li a4,1 + y[0] = alpha * st->nr_frame1_last_sample + alpha2 * y[0]; + 83f47332: 78d77743 fmadd.s fa4,fa4,fa3,fa5 + 83f47336: 00e7a027 fsw fa4,0(a5) + for (i = 0; i < st->frame_size-1; i++) { + 83f4733a: 098ba683 lw a3,152(s7) + 83f4733e: eed758e3 bge a4,a3,83f4722e + 83f47342: 00478b13 addi s6,a5,4 + 83f47346: 4701 li a4,0 + 83f47348: 0000b797 auipc a5,0xb + 83f4734c: 0107a587 flw fa1,16(a5) # 83f52358 <__func__.1+0x160> + alpha2 = (float)(1.0F + i)/160.0F; + 83f47350: d00777d3 fcvt.s.w fa5,a4 + y[i+1] = alpha * y[i] + alpha2 * y[i+1]; + 83f47354: 000b2607 flw fa2,0(s6) + for (i = 0; i < st->frame_size-1; i++) { + 83f47358: 0b11 addi s6,s6,4 + alpha2 = (float)(1.0F + i)/160.0F; + 83f4735a: 0157f7d3 fadd.s fa5,fa5,fs5 + 83f4735e: 2705 addiw a4,a4,1 + 83f47360: 18b7f7d3 fdiv.s fa5,fa5,fa1 + alpha = 1 - alpha2; + 83f47364: 08faf6d3 fsub.s fa3,fs5,fa5 + y[i+1] = alpha * y[i] + alpha2 * y[i+1]; + 83f47368: 10c7f7d3 fmul.s fa5,fa5,fa2 + 83f4736c: 78e6f743 fmadd.s fa4,fa3,fa4,fa5 + 83f47370: feeb2e27 fsw fa4,-4(s6) + for (i = 0; i < st->frame_size-1; i++) { + 83f47374: 098ba683 lw a3,152(s7) + 83f47378: 36fd addiw a3,a3,-1 + 83f4737a: fcd74be3 blt a4,a3,83f47350 + 83f4737e: bd45 j 83f4722e + speech_fft(st->nr_fft_table, tmp_ifft_out, tmp_fft_out); /* faster than matlab fft() */ + 83f47380: 000bb503 ld a0,0(s7) + 83f47384: 00014617 auipc a2,0x14 + 83f47388: 8ec60613 addi a2,a2,-1812 # 83f5ac70 + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f4738c: 8432 mv s0,a2 + 83f4738e: ec32 sd a2,24(sp) + speech_fft(st->nr_fft_table, tmp_ifft_out, tmp_fft_out); /* faster than matlab fft() */ + 83f47390: 50d010ef jal ra,83f4909c + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f47394: 00042787 flw fa5,0(s0) + 83f47398: d004fa53 fcvt.s.w fs4,s1 + nr_fd_half[0].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + 83f4739c: 0000b417 auipc s0,0xb + 83f473a0: f9840413 addi s0,s0,-104 # 83f52334 <__func__.1+0x13c> + 83f473a4: 00042707 flw fa4,0(s0) + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f473a8: 1147f7d3 fmul.s fa5,fa5,fs4 + 83f473ac: 00013797 auipc a5,0x13 + 83f473b0: 9b478793 addi a5,a5,-1612 # 83f59d60 + 83f473b4: f03e sd a5,32(sp) + nr_fd_half[0].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + 83f473b6: 00e7a227 fsw fa4,4(a5) + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + 83f473ba: 00f7a027 fsw fa5,0(a5) + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + 83f473be: cf0ff06f j 83f468ae + +0000000083f473c2 : + //*nenr_silence_time = para_obj->para_nr_init_sile_time*2; + //} else { + //*nenr_silence_time = para_obj->para_nr_init_sile_time; + //} + + temp = MIN(MAX(para_obj->para_nr_snr_coeff, 0), 25); + 83f473c2: 01255703 lhu a4,18(a0) + para_obj->para_nr_noise_coeff = 2; + 83f473c6: 4789 li a5,2 + 83f473c8: 00f51f23 sh a5,30(a0) + temp = MIN(MAX(para_obj->para_nr_snr_coeff, 0), 25); + 83f473cc: 46e5 li a3,25 + 83f473ce: 87ba mv a5,a4 + 83f473d0: 0007081b sext.w a6,a4 + 83f473d4: 00e6f363 bgeu a3,a4,83f473da + 83f473d8: 47e5 li a5,25 + 83f473da: 17c2 slli a5,a5,0x30 + 83f473dc: 93c1 srli a5,a5,0x30 + //if (temp >= 0 && temp <= 3) { /* for low SNR, [0, 3] = > [0.6, 0.9] */ + if (temp <= 3) { /* for low SNR, [0, 3] = > [0.6, 0.9] */ + 83f473de: 468d li a3,3 + *aa = (float)(0.60 + temp * 0.1); /* the speed of priori SNR tracking */ + 83f473e0: 0007871b sext.w a4,a5 + if (temp <= 3) { /* for low SNR, [0, 3] = > [0.6, 0.9] */ + 83f473e4: 0506ea63 bltu a3,a6,83f47438 + *aa = (float)(0.60 + temp * 0.1); /* the speed of priori SNR tracking */ + 83f473e8: d2070753 fcvt.d.w fa4,a4 + 83f473ec: 0000b797 auipc a5,0xb + 83f473f0: f747b687 fld fa3,-140(a5) # 83f52360 <__func__.1+0x168> + 83f473f4: 0000b797 auipc a5,0xb + 83f473f8: f747b787 fld fa5,-140(a5) # 83f52368 <__func__.1+0x170> + 83f473fc: 7ad77743 fmadd.d fa4,fa4,fa3,fa5 + 83f47400: 0000b797 auipc a5,0xb + 83f47404: f987b607 fld fa2,-104(a5) # 83f52398 <__func__.1+0x1a0> + 83f47408: 0000b797 auipc a5,0xb + 83f4740c: f687b687 fld fa3,-152(a5) # 83f52370 <__func__.1+0x178> + 83f47410: 40177753 fcvt.s.d fa4,fa4 + 83f47414: 00e5a027 fsw fa4,0(a1) + } + else { /* for higher SNR, [21, 25] => [0.991, 0.995] */ + *aa = (float)(0.99 + (temp - 20) * 0.001); /* the speed of priori SNR tracking */ + } + + temp = MIN(MAX(para_obj->para_nr_noise_coeff, 0), 14); + 83f47418: 01e55683 lhu a3,30(a0) + 83f4741c: 4739 li a4,14 + 83f4741e: 87b6 mv a5,a3 + 83f47420: 00d77363 bgeu a4,a3,83f47426 + 83f47424: 47b9 li a5,14 + *mu = (float)(0.99 - temp * 0.01); + 83f47426: d20787d3 fcvt.d.w fa5,a5 + 83f4742a: 62d7f7cb fnmsub.d fa5,fa5,fa3,fa2 + 83f4742e: 4017f7d3 fcvt.s.d fa5,fa5 + 83f47432: 00f62027 fsw fa5,0(a2) + +} + 83f47436: 8082 ret + else if (temp > 3 && temp <= 10) { /* for middle SNR, [4, 10] => [0.91, 0.97] */ + 83f47438: ffc7869b addiw a3,a5,-4 + 83f4743c: 16c2 slli a3,a3,0x30 + 83f4743e: 92c1 srli a3,a3,0x30 + 83f47440: 4819 li a6,6 + 83f47442: 02d86863 bltu a6,a3,83f47472 + *aa = (float)(0.90 + (temp - 3) * 0.01); /* the speed of priori SNR tracking */ + 83f47446: 3775 addiw a4,a4,-3 + 83f47448: d20707d3 fcvt.d.w fa5,a4 + 83f4744c: 0000b797 auipc a5,0xb + 83f47450: f247b687 fld fa3,-220(a5) # 83f52370 <__func__.1+0x178> + 83f47454: 0000b797 auipc a5,0xb + 83f47458: f247b707 fld fa4,-220(a5) # 83f52378 <__func__.1+0x180> + 83f4745c: 72d7f7c3 fmadd.d fa5,fa5,fa3,fa4 + 83f47460: 0000b797 auipc a5,0xb + 83f47464: f387b607 fld fa2,-200(a5) # 83f52398 <__func__.1+0x1a0> + 83f47468: 4017f7d3 fcvt.s.d fa5,fa5 + 83f4746c: 00f5a027 fsw fa5,0(a1) + 83f47470: b765 j 83f47418 + else if (temp > 10 && temp <= 20) { /* for high SNR, [11, 20] => [0.972, 0.99] */ + 83f47472: 37d5 addiw a5,a5,-11 + 83f47474: 17c2 slli a5,a5,0x30 + 83f47476: 93c1 srli a5,a5,0x30 + 83f47478: 46a5 li a3,9 + 83f4747a: 02f6ec63 bltu a3,a5,83f474b2 + *aa = (float)(0.97 + (temp - 10) * 0.002); /* the speed of priori SNR tracking */ + 83f4747e: 3759 addiw a4,a4,-10 + 83f47480: d20707d3 fcvt.d.w fa5,a4 + 83f47484: 0000b797 auipc a5,0xb + 83f47488: efc7b687 fld fa3,-260(a5) # 83f52380 <__func__.1+0x188> + 83f4748c: 0000b797 auipc a5,0xb + 83f47490: efc7b707 fld fa4,-260(a5) # 83f52388 <__func__.1+0x190> + 83f47494: 72d7f7c3 fmadd.d fa5,fa5,fa3,fa4 + 83f47498: 0000b797 auipc a5,0xb + 83f4749c: f007b607 fld fa2,-256(a5) # 83f52398 <__func__.1+0x1a0> + 83f474a0: 0000b797 auipc a5,0xb + 83f474a4: ed07b687 fld fa3,-304(a5) # 83f52370 <__func__.1+0x178> + 83f474a8: 4017f7d3 fcvt.s.d fa5,fa5 + 83f474ac: 00f5a027 fsw fa5,0(a1) + 83f474b0: b7a5 j 83f47418 + *aa = (float)(0.99 + (temp - 20) * 0.001); /* the speed of priori SNR tracking */ + 83f474b2: 3731 addiw a4,a4,-20 + 83f474b4: d20707d3 fcvt.d.w fa5,a4 + 83f474b8: 0000b797 auipc a5,0xb + 83f474bc: ed87b707 fld fa4,-296(a5) # 83f52390 <__func__.1+0x198> + 83f474c0: 0000b797 auipc a5,0xb + 83f474c4: ed87b607 fld fa2,-296(a5) # 83f52398 <__func__.1+0x1a0> + 83f474c8: 62e7f7c3 fmadd.d fa5,fa5,fa4,fa2 + 83f474cc: 0000b797 auipc a5,0xb + 83f474d0: ea47b687 fld fa3,-348(a5) # 83f52370 <__func__.1+0x178> + 83f474d4: 4017f7d3 fcvt.s.d fa5,fa5 + 83f474d8: 00f5a027 fsw fa5,0(a1) + 83f474dc: bf35 j 83f47418 + +0000000083f474de : + +EXPORT NRState *NR_init(int frame_size, float fs, float aa, float mu) +{ + 83f474de: 7139 addi sp,sp,-64 + 83f474e0: f426 sd s1,40(sp) + 83f474e2: 84aa mv s1,a0 + uintptr_t *ptr = pvPortMalloc(size); + 83f474e4: 0a000513 li a0,160 + 83f474e8: fc06 sd ra,56(sp) + 83f474ea: f822 sd s0,48(sp) + 83f474ec: f04a sd s2,32(sp) + 83f474ee: ac22 fsd fs0,24(sp) + 83f474f0: a826 fsd fs1,16(sp) + 83f474f2: 20a50453 fmv.s fs0,fa0 + 83f474f6: 20c604d3 fmv.s fs1,fa2 + 83f474fa: a44a fsd fs2,8(sp) + 83f474fc: 20b58953 fmv.s fs2,fa1 + 83f47500: 084070ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47504: 0a000613 li a2,160 + 83f47508: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4750a: 842a mv s0,a0 + memset(ptr, 0, size); + 83f4750c: 271040ef jal ra,83f4bf7c + st->Fs = fs; + st->frame_size = frame_size; + st->aa = aa; + st->mu = mu; + + st->nr_fft_table = speech_fft_init(2*2*st->frame_size); + 83f47510: 0024951b slliw a0,s1,0x2 + st->frame_size = frame_size; + 83f47514: 08942c23 sw s1,152(s0) + st->Fs = fs; + 83f47518: 08842e27 fsw fs0,156(s0) + st->aa = aa; + 83f4751c: 09242427 fsw fs2,136(s0) + st->mu = mu; + 83f47520: 08942627 fsw fs1,140(s0) + st->nr_fft_table = speech_fft_init(2*2*st->frame_size); + 83f47524: 333010ef jal ra,83f49056 + st->ana_win = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + 83f47528: 09842483 lw s1,152(s0) + st->nr_fft_table = speech_fft_init(2*2*st->frame_size); + 83f4752c: e008 sd a0,0(s0) + uintptr_t *ptr = pvPortMalloc(size); + 83f4752e: 0034949b slliw s1,s1,0x3 + 83f47532: 8526 mv a0,s1 + 83f47534: 050070ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47538: 8626 mv a2,s1 + 83f4753a: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4753c: 892a mv s2,a0 + memset(ptr, 0, size); + 83f4753e: 23f040ef jal ra,83f4bf7c + st->syn_win = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + 83f47542: 09842483 lw s1,152(s0) + st->ana_win = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + 83f47546: 01243423 sd s2,8(s0) + uintptr_t *ptr = pvPortMalloc(size); + 83f4754a: 0034949b slliw s1,s1,0x3 + 83f4754e: 8526 mv a0,s1 + 83f47550: 034070ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47554: 8626 mv a2,s1 + 83f47556: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47558: 892a mv s2,a0 + memset(ptr, 0, size); + 83f4755a: 223040ef jal ra,83f4bf7c + st->x_old = (short*)mem_alloc(st->frame_size*sizeof(short)); + 83f4755e: 09842483 lw s1,152(s0) + st->syn_win = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + 83f47562: 01243823 sd s2,16(s0) + st->x_old = (short*)mem_alloc(st->frame_size*sizeof(short)); + 83f47566: 0014949b slliw s1,s1,0x1 + uintptr_t *ptr = pvPortMalloc(size); + 83f4756a: 8526 mv a0,s1 + 83f4756c: 018070ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47570: 8626 mv a2,s1 + 83f47572: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47574: 892a mv s2,a0 + memset(ptr, 0, size); + 83f47576: 207040ef jal ra,83f4bf7c + st->y_old = (float*)mem_alloc(st->frame_size*sizeof(float)); + 83f4757a: 09842483 lw s1,152(s0) + st->x_old = (short*)mem_alloc(st->frame_size*sizeof(short)); + 83f4757e: 01243c23 sd s2,24(s0) + st->y_old = (float*)mem_alloc(st->frame_size*sizeof(float)); + 83f47582: 0024949b slliw s1,s1,0x2 + uintptr_t *ptr = pvPortMalloc(size); + 83f47586: 8526 mv a0,s1 + 83f47588: 7fd060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4758c: 8626 mv a2,s1 + 83f4758e: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47590: 892a mv s2,a0 + memset(ptr, 0, size); + 83f47592: 1eb040ef jal ra,83f4bf7c + st->Xk_prev = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f47596: 09842483 lw s1,152(s0) + st->y_old = (float*)mem_alloc(st->frame_size*sizeof(float)); + 83f4759a: 03243023 sd s2,32(s0) + st->Xk_prev = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f4759e: 0034949b slliw s1,s1,0x3 + uintptr_t *ptr = pvPortMalloc(size); + 83f475a2: 2491 addiw s1,s1,4 + 83f475a4: 8526 mv a0,s1 + 83f475a6: 7df060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f475aa: 8626 mv a2,s1 + 83f475ac: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f475ae: 892a mv s2,a0 + memset(ptr, 0, size); + 83f475b0: 1cd040ef jal ra,83f4bf7c + st->noise_mean = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f475b4: 09842483 lw s1,152(s0) + st->Xk_prev = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f475b8: 03243423 sd s2,40(s0) + st->noise_mean = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f475bc: 0034949b slliw s1,s1,0x3 + uintptr_t *ptr = pvPortMalloc(size); + 83f475c0: 2491 addiw s1,s1,4 + 83f475c2: 8526 mv a0,s1 + 83f475c4: 7c1060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f475c8: 8626 mv a2,s1 + 83f475ca: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f475cc: 892a mv s2,a0 + memset(ptr, 0, size); + 83f475ce: 1af040ef jal ra,83f4bf7c + st->noise_mu2 = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f475d2: 09842483 lw s1,152(s0) + st->noise_mean = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f475d6: 03243823 sd s2,48(s0) + st->noise_mu2 = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + 83f475da: 0034949b slliw s1,s1,0x3 + uintptr_t *ptr = pvPortMalloc(size); + 83f475de: 2491 addiw s1,s1,4 + 83f475e0: 8526 mv a0,s1 + 83f475e2: 7a3060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f475e6: 8626 mv a2,s1 + 83f475e8: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f475ea: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f475ec: 191040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f475f0: 03c00513 li a0,60 + 83f475f4: fc04 sd s1,56(s0) + 83f475f6: 78f060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f475fa: 03c00613 li a2,60 + 83f475fe: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47600: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f47602: 17b040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47606: 4551 li a0,20 + st->amp_inst_band = (float*)mem_alloc(5*3*sizeof(float)); + 83f47608: e024 sd s1,64(s0) + 83f4760a: 77b060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4760e: 4651 li a2,20 + 83f47610: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47612: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f47614: 169040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47618: 4551 li a0,20 + st->noisy_st_trough = (float*)mem_alloc(5*sizeof(float)); + 83f4761a: e424 sd s1,72(s0) + 83f4761c: 769060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47620: 4651 li a2,20 + 83f47622: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47624: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f47626: 157040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4762a: 4531 li a0,12 + st->noisy_st_peak = (float*)mem_alloc(5*sizeof(float)); + 83f4762c: e824 sd s1,80(s0) + 83f4762e: 757060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47632: 4631 li a2,12 + 83f47634: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47636: 892a mv s2,a0 + memset(ptr, 0, size); + 83f47638: 145040ef jal ra,83f4bf7c + st->amp_inst_sum_hist = (float*)mem_alloc(3*sizeof(float)); + st->float_x = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + 83f4763c: 09842483 lw s1,152(s0) + st->amp_inst_sum_hist = (float*)mem_alloc(3*sizeof(float)); + 83f47640: 05243c23 sd s2,88(s0) + uintptr_t *ptr = pvPortMalloc(size); + 83f47644: 0034949b slliw s1,s1,0x3 + 83f47648: 8526 mv a0,s1 + 83f4764a: 73b060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4764e: 8626 mv a2,s1 + 83f47650: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47652: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f47654: 129040ef jal ra,83f4bf7c + + for (i = 0; i < 2*st->frame_size; i++) { + 83f47658: 09842703 lw a4,152(s0) + st->float_x = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + 83f4765c: f024 sd s1,96(s0) + for (i = 0; i < 2*st->frame_size; i++) { + 83f4765e: 08e05363 blez a4,83f476e4 + 83f47662: 0000a517 auipc a0,0xa + 83f47666: ed250513 addi a0,a0,-302 # 83f51534 + 83f4766a: 0000a597 auipc a1,0xa + 83f4766e: 3ca58593 addi a1,a1,970 # 83f51a34 + 83f47672: 4781 li a5,0 + 83f47674: 0000b717 auipc a4,0xb + 83f47678: d3472707 flw fa4,-716(a4) # 83f523a8 <__func__.1+0x1b0> + 83f4767c: 0000b717 auipc a4,0xb + 83f47680: d3072787 flw fa5,-720(a4) # 83f523ac <__func__.1+0x1b4> + 83f47684: a039 j 83f47692 + st->ana_win[i] = fv0[i]; + 83f47686: 00052787 flw fa5,0(a0) + st->syn_win[i] = fv1[i]; + 83f4768a: 0005a707 flw fa4,0(a1) + 83f4768e: 0511 addi a0,a0,4 + 83f47690: 0591 addi a1,a1,4 + st->ana_win[i] = fv0[i]; + 83f47692: 6414 ld a3,8(s0) + 83f47694: 00279613 slli a2,a5,0x2 + for (i = 0; i < 2*st->frame_size; i++) { + 83f47698: 0785 addi a5,a5,1 + st->ana_win[i] = fv0[i]; + 83f4769a: 96b2 add a3,a3,a2 + 83f4769c: 00f6a027 fsw fa5,0(a3) + st->syn_win[i] = fv1[i]; + 83f476a0: 6818 ld a4,16(s0) + for (i = 0; i < 2*st->frame_size; i++) { + 83f476a2: 0007881b sext.w a6,a5 + st->syn_win[i] = fv1[i]; + 83f476a6: 9732 add a4,a4,a2 + 83f476a8: 00e72027 fsw fa4,0(a4) + for (i = 0; i < 2*st->frame_size; i++) { + 83f476ac: 09842703 lw a4,152(s0) + 83f476b0: 0017169b slliw a3,a4,0x1 + 83f476b4: fcd849e3 blt a6,a3,83f47686 + } + + for (i = 0; i < st->frame_size; i++) { + 83f476b8: 02e05663 blez a4,83f476e4 + 83f476bc: 4781 li a5,0 + st->x_old[i] = 0; + 83f476be: 6c14 ld a3,24(s0) + 83f476c0: 00179713 slli a4,a5,0x1 + st->y_old[i] = 0.0F; + 83f476c4: 00279613 slli a2,a5,0x2 + st->x_old[i] = 0; + 83f476c8: 96ba add a3,a3,a4 + 83f476ca: 00069023 sh zero,0(a3) + st->y_old[i] = 0.0F; + 83f476ce: 7018 ld a4,32(s0) + for (i = 0; i < st->frame_size; i++) { + 83f476d0: 0785 addi a5,a5,1 + 83f476d2: 0007869b sext.w a3,a5 + st->y_old[i] = 0.0F; + 83f476d6: 9732 add a4,a4,a2 + 83f476d8: 00072023 sw zero,0(a4) + for (i = 0; i < st->frame_size; i++) { + 83f476dc: 09842703 lw a4,152(s0) + 83f476e0: fce6cfe3 blt a3,a4,83f476be + } + + for (i = 0; i < 2*st->frame_size+1; i++) { + 83f476e4: 4781 li a5,0 + 83f476e6: 02074963 bltz a4,83f47718 + //Xk_prev[i].re = 0.0F; + //Xk_prev[i].im = 0.0F; + st->Xk_prev[i] = 0.0F; + 83f476ea: 7418 ld a4,40(s0) + 83f476ec: 00279693 slli a3,a5,0x2 + for (i = 0; i < 2*st->frame_size+1; i++) { + 83f476f0: 0785 addi a5,a5,1 + st->Xk_prev[i] = 0.0F; + 83f476f2: 9736 add a4,a4,a3 + 83f476f4: 00072023 sw zero,0(a4) + st->noise_mean[i] = 0.0F; + 83f476f8: 7818 ld a4,48(s0) + for (i = 0; i < 2*st->frame_size+1; i++) { + 83f476fa: 0007861b sext.w a2,a5 + st->noise_mean[i] = 0.0F; + 83f476fe: 9736 add a4,a4,a3 + 83f47700: 00072023 sw zero,0(a4) + st->noise_mu2[i] = 0.0F; + 83f47704: 7c18 ld a4,56(s0) + 83f47706: 9736 add a4,a4,a3 + 83f47708: 00072023 sw zero,0(a4) + for (i = 0; i < 2*st->frame_size+1; i++) { + 83f4770c: 09842703 lw a4,152(s0) + 83f47710: 0017171b slliw a4,a4,0x1 + 83f47714: fcc75be3 bge a4,a2,83f476ea + 83f47718: 4781 li a5,0 + } + + for (i = 0; i < 15; i++) { + 83f4771a: 03c00693 li a3,60 + st->amp_inst_band[i] = 0.0F; + 83f4771e: 6038 ld a4,64(s0) + 83f47720: 973e add a4,a4,a5 + 83f47722: 00072023 sw zero,0(a4) + for (i = 0; i < 15; i++) { + 83f47726: 0791 addi a5,a5,4 + 83f47728: fed79be3 bne a5,a3,83f4771e + 83f4772c: 4781 li a5,0 + } + + for (i = 0; i < 5; i++) { + 83f4772e: 46d1 li a3,20 + st->noisy_st_trough[i] = 0.0F; + 83f47730: 6438 ld a4,72(s0) + 83f47732: 973e add a4,a4,a5 + 83f47734: 00072023 sw zero,0(a4) + st->noisy_st_peak[i] = 0.0F; + 83f47738: 6838 ld a4,80(s0) + 83f4773a: 973e add a4,a4,a5 + 83f4773c: 00072023 sw zero,0(a4) + for (i = 0; i < 5; i++) { + 83f47740: 0791 addi a5,a5,4 + 83f47742: fed797e3 bne a5,a3,83f47730 + } + + for (i = 0; i < 3; i++) { + st->amp_inst_sum_hist[i] = 0.0F; + 83f47746: 6c38 ld a4,88(s0) + st->vad_slope = 0.0F; + st->vad_dr_cnt = 0.0F; + st->vad_dr = 0.0F; + st->vad_mmse = 0.0F; + st->vad_mmse_cnt = 0.0F; + if (fs == 16000) + 83f47748: 0000b797 auipc a5,0xb + 83f4774c: b0c7a787 flw fa5,-1268(a5) # 83f52254 <__func__.1+0x5c> + 83f47750: a0f427d3 feq.s a5,fs0,fa5 + st->amp_inst_sum_hist[i] = 0.0F; + 83f47754: 00072023 sw zero,0(a4) + 83f47758: 6c38 ld a4,88(s0) + 83f4775a: 00072223 sw zero,4(a4) + 83f4775e: 6c38 ld a4,88(s0) + 83f47760: 00072423 sw zero,8(a4) + st->eta = 0.15F; + 83f47764: 0000b717 auipc a4,0xb + 83f47768: c3c73703 ld a4,-964(a4) # 83f523a0 <__func__.1+0x1a8> + st->vad_slope_cnt = 0.0F; + 83f4776c: 06043423 sd zero,104(s0) + st->vad_dr_cnt = 0.0F; + 83f47770: 06043823 sd zero,112(s0) + st->vad_mmse = 0.0F; + 83f47774: 06043c23 sd zero,120(s0) + st->eta = 0.15F; + 83f47778: e058 sd a4,128(s0) + if (fs == 16000) + 83f4777a: c38d beqz a5,83f4779c + st->vad_mmse_cnt_para = 4; /* last at least 40ms, once the mmse vad goes up, keep the circumstance a period of time to get better speech quality */ + 83f4777c: 0000b797 auipc a5,0xb + 83f47780: c347a787 flw fa5,-972(a5) # 83f523b0 <__func__.1+0x1b8> + 83f47784: 08f42827 fsw fa5,144(s0) + else if (fs == 8000) + st->vad_mmse_cnt_para = 2; /* last at least 40ms, once the mmse vad goes up, keep the circumstance a period of time to get better speech quality */ + + return st; + +} + 83f47788: 70e2 ld ra,56(sp) + 83f4778a: 8522 mv a0,s0 + 83f4778c: 7442 ld s0,48(sp) + 83f4778e: 74a2 ld s1,40(sp) + 83f47790: 7902 ld s2,32(sp) + 83f47792: 2462 fld fs0,24(sp) + 83f47794: 24c2 fld fs1,16(sp) + 83f47796: 2922 fld fs2,8(sp) + 83f47798: 6121 addi sp,sp,64 + 83f4779a: 8082 ret + else if (fs == 8000) + 83f4779c: 0000b797 auipc a5,0xb + 83f477a0: c187a787 flw fa5,-1000(a5) # 83f523b4 <__func__.1+0x1bc> + 83f477a4: a0f427d3 feq.s a5,fs0,fa5 + 83f477a8: d3e5 beqz a5,83f47788 + st->vad_mmse_cnt_para = 2; /* last at least 40ms, once the mmse vad goes up, keep the circumstance a period of time to get better speech quality */ + 83f477aa: 0000b797 auipc a5,0xb + 83f477ae: ae27a787 flw fa5,-1310(a5) # 83f5228c <__func__.1+0x94> + 83f477b2: 08f42827 fsw fa5,144(s0) + return st; + 83f477b6: bfc9 j 83f47788 + +0000000083f477b8 : + +EXPORT void NR_free(NRState *st) +{ + 83f477b8: 1141 addi sp,sp,-16 + 83f477ba: e406 sd ra,8(sp) + 83f477bc: e022 sd s0,0(sp) + 83f477be: 842a mv s0,a0 + speech_fft_free(st->nr_fft_table); + 83f477c0: 6108 ld a0,0(a0) + 83f477c2: 0c3010ef jal ra,83f49084 + vPortFree(ptr); + 83f477c6: 6408 ld a0,8(s0) + 83f477c8: 723060ef jal ra,83f4e6ea + 83f477cc: 6808 ld a0,16(s0) + 83f477ce: 71d060ef jal ra,83f4e6ea + 83f477d2: 6c08 ld a0,24(s0) + 83f477d4: 717060ef jal ra,83f4e6ea + 83f477d8: 7008 ld a0,32(s0) + 83f477da: 711060ef jal ra,83f4e6ea + 83f477de: 7408 ld a0,40(s0) + 83f477e0: 70b060ef jal ra,83f4e6ea + 83f477e4: 7808 ld a0,48(s0) + 83f477e6: 705060ef jal ra,83f4e6ea + 83f477ea: 7c08 ld a0,56(s0) + 83f477ec: 6ff060ef jal ra,83f4e6ea + 83f477f0: 6028 ld a0,64(s0) + 83f477f2: 6f9060ef jal ra,83f4e6ea + 83f477f6: 6428 ld a0,72(s0) + 83f477f8: 6f3060ef jal ra,83f4e6ea + 83f477fc: 6828 ld a0,80(s0) + 83f477fe: 6ed060ef jal ra,83f4e6ea + 83f47802: 6c28 ld a0,88(s0) + 83f47804: 6e7060ef jal ra,83f4e6ea + 83f47808: 7028 ld a0,96(s0) + 83f4780a: 6e1060ef jal ra,83f4e6ea + 83f4780e: 8522 mv a0,s0 + mem_free(st->amp_inst_sum_hist); + mem_free(st->float_x); + + mem_free(st); + +} + 83f47810: 6402 ld s0,0(sp) + 83f47812: 60a2 ld ra,8(sp) + 83f47814: 0141 addi sp,sp,16 + 83f47816: 6d50606f j 83f4e6ea + +0000000083f4781a : + unsigned short tmp; + + /* NLP AES Parameters */ + para_obj = para; + + tmp = MIN(MAX(para_obj->para_aes_std_thrd, 0), 39); /* the threshold level for residual echo */ + 83f4781a: 00c55803 lhu a6,12(a0) + 83f4781e: 02700713 li a4,39 + 83f47822: 87c2 mv a5,a6 + 83f47824: 01077463 bgeu a4,a6,83f4782c + 83f47828: 02700793 li a5,39 + *std_thrd = 0.6f + tmp * 0.01f; /* [0.6, 0.99], each step 0.01 */ + 83f4782c: d007f7d3 fcvt.s.w fa5,a5 + 83f47830: 0000b797 auipc a5,0xb + 83f47834: b887a687 flw fa3,-1144(a5) # 83f523b8 <__func__.1+0x1c0> + 83f47838: 0000b797 auipc a5,0xb + 83f4783c: a807a707 flw fa4,-1408(a5) # 83f522b8 <__func__.1+0xc0> + 83f47840: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + + tmp = MIN(MAX(para_obj->para_aes_supp_coeff, 0), 100); /* the suppression level for residual echo */ + 83f47844: 06400713 li a4,100 + *std_thrd = 0.6f + tmp * 0.01f; /* [0.6, 0.99], each step 0.01 */ + 83f47848: 00f5a027 fsw fa5,0(a1) + tmp = MIN(MAX(para_obj->para_aes_supp_coeff, 0), 100); /* the suppression level for residual echo */ + 83f4784c: 00e55583 lhu a1,14(a0) + 83f47850: 87ae mv a5,a1 + 83f47852: 00b77463 bgeu a4,a1,83f4785a + 83f47856: 06400793 li a5,100 + *aes_supp_coef1 = 1.0f + tmp * 0.125f; /* [1.0, 13.5], each step 0.125 */ + 83f4785a: d007f7d3 fcvt.s.w fa5,a5 + 83f4785e: 0000b797 auipc a5,0xb + 83f47862: 9f27a687 flw fa3,-1550(a5) # 83f52250 <__func__.1+0x58> + 83f47866: 0000b797 auipc a5,0xb + 83f4786a: ada7a707 flw fa4,-1318(a5) # 83f52340 <__func__.1+0x148> + 83f4786e: 68e7f743 fmadd.s fa4,fa5,fa4,fa3 + *aes_supp_coef2 = 2.0f + tmp * 0.25f; /* [2.0, 27.0], each step 0.25 */ + 83f47872: 0000b797 auipc a5,0xb + 83f47876: a6e7a607 flw fa2,-1426(a5) # 83f522e0 <__func__.1+0xe8> + 83f4787a: 0000b797 auipc a5,0xb + 83f4787e: a127a687 flw fa3,-1518(a5) # 83f5228c <__func__.1+0x94> + 83f47882: 68c7f7c3 fmadd.s fa5,fa5,fa2,fa3 + *aes_supp_coef1 = 1.0f + tmp * 0.125f; /* [1.0, 13.5], each step 0.125 */ + 83f47886: 00e62027 fsw fa4,0(a2) + *aes_supp_coef2 = 2.0f + tmp * 0.25f; /* [2.0, 27.0], each step 0.25 */ + 83f4788a: 00f6a027 fsw fa5,0(a3) + +} + 83f4788e: 8082 ret + +0000000083f47890 : + +EXPORT NonLinearEchoState *NLP_AES_init(int frame_size, float sampling_rate, float std_thrd, float aes_supp_coef1, float aes_supp_coef2) +{ + 83f47890: 711d addi sp,sp,-96 + 83f47892: e0ca sd s2,64(sp) + 83f47894: 892a mv s2,a0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47896: 0e800513 li a0,232 + 83f4789a: ec86 sd ra,88(sp) + 83f4789c: e8a2 sd s0,80(sp) + 83f4789e: e4a6 sd s1,72(sp) + 83f478a0: fc4e sd s3,56(sp) + 83f478a2: f852 sd s4,48(sp) + 83f478a4: f456 sd s5,40(sp) + 83f478a6: ac22 fsd fs0,24(sp) + 83f478a8: a826 fsd fs1,16(sp) + 83f478aa: 20a50453 fmv.s fs0,fa0 + 83f478ae: 20d684d3 fmv.s fs1,fa3 + 83f478b2: a44a fsd fs2,8(sp) + 83f478b4: a04e fsd fs3,0(sp) + 83f478b6: 20c60953 fmv.s fs2,fa2 + 83f478ba: 20b589d3 fmv.s fs3,fa1 + 83f478be: 4c7060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f478c2: 0e800613 li a2,232 + 83f478c6: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f478c8: 842a mv s0,a0 + memset(ptr, 0, size); + 83f478ca: 6b2040ef jal ra,83f4bf7c + st->aes_supp_coef2 = aes_supp_coef2; + st->frame_size = frame_size; + st->ps_size = st->frame_size; + N = st->ps_size; /* power spectrum size */ + N3 = 2*N - st->frame_size; + st->sampling_rate = (int)sampling_rate; + 83f478ce: c00417d3 fcvt.w.s a5,fs0,rtz + + st->echo_state = NULL; + st->nbands = 2; + M = st->nbands; + st->bank = filterbank_create(M, sampling_rate, N, 1); + 83f478d2: 20840553 fmv.s fa0,fs0 + 83f478d6: 4605 li a2,1 + st->sampling_rate = (int)sampling_rate; + 83f478d8: c41c sw a5,8(s0) + st->nbands = 2; + 83f478da: 4789 li a5,2 + 83f478dc: 0af42823 sw a5,176(s0) + st->bank = filterbank_create(M, sampling_rate, N, 1); + 83f478e0: 85ca mv a1,s2 + st->fdstd_thrd = std_thrd; + 83f478e2: 0d342a27 fsw fs3,212(s0) + st->aes_supp_coef1 = aes_supp_coef1; + 83f478e6: 0d242e27 fsw fs2,220(s0) + st->aes_supp_coef2 = aes_supp_coef2; + 83f478ea: 0e942027 fsw fs1,224(s0) + st->frame_size = frame_size; + 83f478ee: 01242023 sw s2,0(s0) + st->ps_size = st->frame_size; + 83f478f2: 01242223 sw s2,4(s0) + st->echo_state = NULL; + 83f478f6: 00043c23 sd zero,24(s0) + st->bank = filterbank_create(M, sampling_rate, N, 1); + 83f478fa: 4509 li a0,2 + 83f478fc: 669000ef jal ra,83f48764 + st->frame = (float*)mem_alloc(2*N*sizeof(float)); + 83f47900: 0039149b slliw s1,s2,0x3 + st->bank = filterbank_create(M, sampling_rate, N, 1); + 83f47904: e808 sd a0,16(s0) + uintptr_t *ptr = pvPortMalloc(size); + 83f47906: 8526 mv a0,s1 + 83f47908: 47d060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4790c: 8626 mv a2,s1 + 83f4790e: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47910: 8a2a mv s4,a0 + memset(ptr, 0, size); + 83f47912: 66a040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47916: 8526 mv a0,s1 + st->frame = (float*)mem_alloc(2*N*sizeof(float)); + 83f47918: 03443023 sd s4,32(s0) + 83f4791c: 469060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47920: 8626 mv a2,s1 + 83f47922: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47924: 8a2a mv s4,a0 + memset(ptr, 0, size); + 83f47926: 656040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4792a: 8526 mv a0,s1 + st->window = (float*)mem_alloc(2*N*sizeof(float)); + 83f4792c: 05443423 sd s4,72(s0) + 83f47930: 455060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47934: 8626 mv a2,s1 + 83f47936: 4581 li a1,0 + st->ft = (float*)mem_alloc(2*N*sizeof(float)); + st->ps = (float*)mem_alloc((N+M)*sizeof(float)); + 83f47938: 00290a1b addiw s4,s2,2 + uintptr_t *ptr = pvPortMalloc(size); + 83f4793c: 002a149b slliw s1,s4,0x2 + 83f47940: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f47942: 63a040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47946: 8526 mv a0,s1 + st->ft = (float*)mem_alloc(2*N*sizeof(float)); + 83f47948: 03543423 sd s5,40(s0) + 83f4794c: 439060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47950: 8626 mv a2,s1 + 83f47952: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47954: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f47956: 626040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4795a: 8526 mv a0,s1 + st->ps = (float*)mem_alloc((N+M)*sizeof(float)); + 83f4795c: 03543823 sd s5,48(s0) + 83f47960: 425060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47964: 8626 mv a2,s1 + 83f47966: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47968: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f4796a: 612040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4796e: 8526 mv a0,s1 + st->echo_noise = (float*)mem_alloc((N+M)*sizeof(float)); + 83f47970: 07543c23 sd s5,120(s0) + 83f47974: 411060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47978: 8626 mv a2,s1 + 83f4797a: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4797c: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f4797e: 5fe040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47982: 8526 mv a0,s1 + st->residual_echo = (float*)mem_alloc((N+M)*sizeof(float)); + 83f47984: 09543023 sd s5,128(s0) + 83f47988: 3fd060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4798c: 8626 mv a2,s1 + 83f4798e: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47990: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f47992: 5ea040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47996: 8526 mv a0,s1 + st->old_ps = (float*)mem_alloc((N+M)*sizeof(float)); + 83f47998: 05543823 sd s5,80(s0) + 83f4799c: 3e9060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f479a0: 8626 mv a2,s1 + 83f479a2: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f479a4: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f479a6: 5d6040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f479aa: 8526 mv a0,s1 + st->prior = (float*)mem_alloc((N+M)*sizeof(float)); + 83f479ac: 07543023 sd s5,96(s0) + 83f479b0: 3d5060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f479b4: 8626 mv a2,s1 + 83f479b6: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f479b8: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f479ba: 5c2040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f479be: 8526 mv a0,s1 + st->post = (float*)mem_alloc((N+M)*sizeof(float)); + 83f479c0: 07543423 sd s5,104(s0) + 83f479c4: 3c1060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f479c8: 8626 mv a2,s1 + 83f479ca: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f479cc: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f479ce: 5ae040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f479d2: 8526 mv a0,s1 + st->gain = (float*)mem_alloc((N+M)*sizeof(float)); + 83f479d4: 05543c23 sd s5,88(s0) + 83f479d8: 3ad060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f479dc: 8626 mv a2,s1 + 83f479de: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f479e0: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f479e2: 59a040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f479e6: 8526 mv a0,s1 + st->gain2 = (float*)mem_alloc((N+M)*sizeof(float)); + 83f479e8: 03543c23 sd s5,56(s0) + 83f479ec: 399060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f479f0: 8626 mv a2,s1 + 83f479f2: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f479f4: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f479f6: 586040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f479fa: 8526 mv a0,s1 + st->gain_floor = (float*)mem_alloc((N+M)*sizeof(float)); + 83f479fc: 05543023 sd s5,64(s0) + 83f47a00: 385060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47a04: 8626 mv a2,s1 + 83f47a06: 4581 li a1,0 + st->zeta = (float*)mem_alloc((N+M)*sizeof(float)); + + st->inbuf = (float*)mem_alloc(N3*sizeof(float)); + 83f47a08: 0029149b slliw s1,s2,0x2 + uintptr_t *ptr = pvPortMalloc(size); + 83f47a0c: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f47a0e: 56e040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47a12: 8526 mv a0,s1 + st->zeta = (float*)mem_alloc((N+M)*sizeof(float)); + 83f47a14: 07543823 sd s5,112(s0) + 83f47a18: 36d060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47a1c: 8626 mv a2,s1 + 83f47a1e: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47a20: 8aaa mv s5,a0 + memset(ptr, 0, size); + 83f47a22: 55a040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47a26: 8526 mv a0,s1 + st->inbuf = (float*)mem_alloc(N3*sizeof(float)); + 83f47a28: 09543823 sd s5,144(s0) + 83f47a2c: 359060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47a30: 4581 li a1,0 + 83f47a32: 8626 mv a2,s1 + uintptr_t *ptr = pvPortMalloc(size); + 83f47a34: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f47a36: 546040ef jal ra,83f4bf7c + st->outbuf = (float*)mem_alloc(N3*sizeof(float)); + + aes_conj_window(st->window, 2*N3); + 83f47a3a: 6428 ld a0,72(s0) + N3 = 2*N - st->frame_size; + 83f47a3c: 0019199b slliw s3,s2,0x1 + st->outbuf = (float*)mem_alloc(N3*sizeof(float)); + 83f47a40: ec44 sd s1,152(s0) + aes_conj_window(st->window, 2*N3); + 83f47a42: 85ce mv a1,s3 + st->inbuf = (float*)mem_alloc(N3*sizeof(float)); + 83f47a44: 0009049b sext.w s1,s2 + aes_conj_window(st->window, 2*N3); + 83f47a48: 028010ef jal ra,83f48a70 + + for (i=0;i + 83f47a50: 0019069b addiw a3,s2,1 + 83f47a54: 02069793 slli a5,a3,0x20 + 83f47a58: 01e7d693 srli a3,a5,0x1e + 83f47a5c: 0691 addi a3,a3,4 + 83f47a5e: 4781 li a5,0 + st->old_ps[i] = FLOAT_ONE; + 83f47a60: 0000a717 auipc a4,0xa + 83f47a64: 7f072787 flw fa5,2032(a4) # 83f52250 <__func__.1+0x58> + 83f47a68: 6838 ld a4,80(s0) + 83f47a6a: 973e add a4,a4,a5 + 83f47a6c: 00f72027 fsw fa5,0(a4) + st->gain[i] = FLOAT_ONE; + 83f47a70: 6c38 ld a4,88(s0) + 83f47a72: 973e add a4,a4,a5 + 83f47a74: 00f72027 fsw fa5,0(a4) + st->post[i] = FLOAT_ONE; + 83f47a78: 7438 ld a4,104(s0) + 83f47a7a: 973e add a4,a4,a5 + 83f47a7c: 00f72027 fsw fa5,0(a4) + st->prior[i] = FLOAT_ONE; + 83f47a80: 7038 ld a4,96(s0) + 83f47a82: 973e add a4,a4,a5 + 83f47a84: 00f72027 fsw fa5,0(a4) + st->echo_noise[i] = FLOAT_ZERO; + 83f47a88: 7c38 ld a4,120(s0) + 83f47a8a: 973e add a4,a4,a5 + 83f47a8c: 00072023 sw zero,0(a4) + st->zeta[0] = FLOAT_ZERO; + 83f47a90: 7838 ld a4,112(s0) + for (i=0;izeta[0] = FLOAT_ZERO; + 83f47a94: 00072023 sw zero,0(a4) + for (i=0;i + } + + st->echo_sup = -40; + 83f47a9c: 57e5 li a5,-7 + 83f47a9e: 1786 slli a5,a5,0x21 + 83f47aa0: fd878793 addi a5,a5,-40 + 83f47aa4: e45c sd a5,136(s0) + st->echo_sup_active = -15; + + for (i=0;i + st->inbuf[i] = 0; + 83f47ab0: 6858 ld a4,144(s0) + 83f47ab2: 973e add a4,a4,a5 + 83f47ab4: 00072023 sw zero,0(a4) + st->outbuf[i] = 0; + 83f47ab8: 6c58 ld a4,152(s0) + 83f47aba: 973e add a4,a4,a5 + 83f47abc: 00072023 sw zero,0(a4) + for (i=0;i + } + + st->fft_lookup = speech_fft_init(2*N); + 83f47ac6: 854e mv a0,s3 + 83f47ac8: 58e010ef jal ra,83f49056 + + st->nb_adapt = 0; + st->min_count = 0; + + /* STD/DTD */ + st->aes_std_in = (short*)mem_alloc(frame_size*sizeof(short)); + 83f47acc: 0014949b slliw s1,s1,0x1 + st->fft_lookup = speech_fft_init(2*N); + 83f47ad0: f448 sd a0,168(s0) + st->nb_adapt = 0; + 83f47ad2: 0a043023 sd zero,160(s0) + uintptr_t *ptr = pvPortMalloc(size); + 83f47ad6: 8526 mv a0,s1 + 83f47ad8: 2ad060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47adc: 8626 mv a2,s1 + 83f47ade: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47ae0: 892a mv s2,a0 + memset(ptr, 0, size); + 83f47ae2: 49a040ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f47ae6: 8526 mv a0,s1 + st->aes_std_in = (short*)mem_alloc(frame_size*sizeof(short)); + 83f47ae8: 0d243023 sd s2,192(s0) + 83f47aec: 299060ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f47af0: 8626 mv a2,s1 + 83f47af2: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f47af4: 84aa mv s1,a0 + memset(ptr, 0, size); + 83f47af6: 486040ef jal ra,83f4bf7c + st->mic_raw_ola = (short*)mem_alloc(frame_size*sizeof(short)); + //st->fdstd_mic_in_sm = (float*)mem_alloc(frame_size*sizeof(float)); + //st->fdstd_linear_echo_sm = (float*)mem_alloc(frame_size*sizeof(float)); + + for (i=0;i < st->frame_size;i++) { + 83f47afa: 4018 lw a4,0(s0) + st->mic_raw_ola = (short*)mem_alloc(frame_size*sizeof(short)); + 83f47afc: e464 sd s1,200(s0) + for (i=0;i < st->frame_size;i++) { + 83f47afe: 4781 li a5,0 + 83f47b00: 00e04463 bgtz a4,83f47b08 + 83f47b04: a829 j 83f47b1e + st->mic_raw_ola[i] = 0; + 83f47b06: 6464 ld s1,200(s0) + 83f47b08: 00179513 slli a0,a5,0x1 + 83f47b0c: 94aa add s1,s1,a0 + 83f47b0e: 00049023 sh zero,0(s1) + for (i=0;i < st->frame_size;i++) { + 83f47b12: 4014 lw a3,0(s0) + 83f47b14: 0785 addi a5,a5,1 + 83f47b16: 0007871b sext.w a4,a5 + 83f47b1a: fed746e3 blt a4,a3,83f47b06 + //st->fdstd_mic_in_sm[i] = FLOAT_ZERO; + //st->fdstd_linear_echo_sm[i] = FLOAT_ZERO; + } + st->RER_smooth = FLOAT_ZERO; + 83f47b1e: 0a042a23 sw zero,180(s0) + st->RER_vad = 0; + 83f47b22: 0a043c23 sd zero,184(s0) + st->st_vad = 0; + st->fdstd_vad = 0; + 83f47b26: 0c042c23 sw zero,216(s0) + st->frame1_last_sample = 0; + 83f47b2a: 0e042223 sw zero,228(s0) + + return st; + +} + 83f47b2e: 60e6 ld ra,88(sp) + 83f47b30: 8522 mv a0,s0 + 83f47b32: 6446 ld s0,80(sp) + 83f47b34: 64a6 ld s1,72(sp) + 83f47b36: 6906 ld s2,64(sp) + 83f47b38: 79e2 ld s3,56(sp) + 83f47b3a: 7a42 ld s4,48(sp) + 83f47b3c: 7aa2 ld s5,40(sp) + 83f47b3e: 2462 fld fs0,24(sp) + 83f47b40: 24c2 fld fs1,16(sp) + 83f47b42: 2922 fld fs2,8(sp) + 83f47b44: 2982 fld fs3,0(sp) + 83f47b46: 6125 addi sp,sp,96 + 83f47b48: 8082 ret + +0000000083f47b4a : + +EXPORT void NLP_AES_free(NonLinearEchoState *st) +{ + 83f47b4a: 1141 addi sp,sp,-16 + 83f47b4c: e406 sd ra,8(sp) + 83f47b4e: e022 sd s0,0(sp) + 83f47b50: 842a mv s0,a0 + vPortFree(ptr); + 83f47b52: 7108 ld a0,32(a0) + 83f47b54: 397060ef jal ra,83f4e6ea + 83f47b58: 7408 ld a0,40(s0) + 83f47b5a: 391060ef jal ra,83f4e6ea + 83f47b5e: 7808 ld a0,48(s0) + 83f47b60: 38b060ef jal ra,83f4e6ea + 83f47b64: 7c08 ld a0,56(s0) + 83f47b66: 385060ef jal ra,83f4e6ea + 83f47b6a: 6028 ld a0,64(s0) + 83f47b6c: 37f060ef jal ra,83f4e6ea + 83f47b70: 6428 ld a0,72(s0) + 83f47b72: 379060ef jal ra,83f4e6ea + 83f47b76: 6828 ld a0,80(s0) + 83f47b78: 373060ef jal ra,83f4e6ea + 83f47b7c: 6c28 ld a0,88(s0) + 83f47b7e: 36d060ef jal ra,83f4e6ea + 83f47b82: 7028 ld a0,96(s0) + 83f47b84: 367060ef jal ra,83f4e6ea + 83f47b88: 7428 ld a0,104(s0) + 83f47b8a: 361060ef jal ra,83f4e6ea + 83f47b8e: 7c28 ld a0,120(s0) + 83f47b90: 35b060ef jal ra,83f4e6ea + 83f47b94: 6048 ld a0,128(s0) + 83f47b96: 355060ef jal ra,83f4e6ea + 83f47b9a: 7828 ld a0,112(s0) + 83f47b9c: 34f060ef jal ra,83f4e6ea + 83f47ba0: 6848 ld a0,144(s0) + 83f47ba2: 349060ef jal ra,83f4e6ea + 83f47ba6: 6c48 ld a0,152(s0) + 83f47ba8: 343060ef jal ra,83f4e6ea + mem_free(st->zeta); + + mem_free(st->inbuf); + mem_free(st->outbuf); + + speech_fft_free(st->fft_lookup); + 83f47bac: 7448 ld a0,168(s0) + 83f47bae: 4d6010ef jal ra,83f49084 + filterbank_free(st->bank); + 83f47bb2: 6808 ld a0,16(s0) + 83f47bb4: 5bd000ef jal ra,83f48970 + 83f47bb8: 6068 ld a0,192(s0) + 83f47bba: 331060ef jal ra,83f4e6ea + 83f47bbe: 6468 ld a0,200(s0) + 83f47bc0: 32b060ef jal ra,83f4e6ea + 83f47bc4: 8522 mv a0,s0 + //SSP_SAFE_FREE_BUF(mic_raw_std); + SSP_SAFE_FREE_BUF(tmp1); + SSP_SAFE_FREE_BUF(tmp2); +#endif + +} + 83f47bc6: 6402 ld s0,0(sp) + 83f47bc8: 60a2 ld ra,8(sp) + 83f47bca: 0141 addi sp,sp,16 + 83f47bcc: 31f0606f j 83f4e6ea + +0000000083f47bd0 : + +void std_residual_echo(NonLinearEchoState *st, float *residual_echo, int len, boolean_T speech_vad) +{ + 83f47bd0: 81010113 addi sp,sp,-2032 + 83f47bd4: 7e813023 sd s0,2016(sp) + 83f47bd8: 7c913c23 sd s1,2008(sp) + 83f47bdc: 7d313423 sd s3,1992(sp) + 83f47be0: 7e113423 sd ra,2024(sp) + 83f47be4: 7d213823 sd s2,2000(sp) + 83f47be8: 7d413023 sd s4,1984(sp) + 83f47bec: 7b513c23 sd s5,1976(sp) + 83f47bf0: 7b613823 sd s6,1968(sp) + 83f47bf4: 7b713423 sd s7,1960(sp) + 83f47bf8: 7b813023 sd s8,1952(sp) + 83f47bfc: 79913c23 sd s9,1944(sp) + 83f47c00: 78813427 fsd fs0,1928(sp) + 83f47c04: 78913027 fsd fs1,1920(sp) + int i; + float leak2; + int N; + //float rer_coef; + + N = st->echo_state->window_size; + 83f47c08: 6d18 ld a4,24(a0) +{ + 83f47c0a: d7010113 addi sp,sp,-656 + 83f47c0e: 842a mv s0,a0 + N = st->echo_state->window_size; + 83f47c10: 00472903 lw s2,4(a4) +{ + 83f47c14: 84ae mv s1,a1 + 83f47c16: 89b6 mv s3,a3 + len = len; + /* Apply hanning window (should pre-compute it) */ + for (i=0;i + 83f47c1c: fff9059b addiw a1,s2,-1 + 83f47c20: 02059793 slli a5,a1,0x20 + 83f47c24: 01e7d593 srli a1,a5,0x1e + 83f47c28: 4781 li a5,0 + 83f47c2a: a011 j 83f47c2e + 83f47c2c: 0791 addi a5,a5,4 + st->echo_state->y[i] = st->echo_state->window[i] * st->echo_state->last_y[i]; + 83f47c2e: 7770 ld a2,232(a4) + 83f47c30: 7334 ld a3,96(a4) + 83f47c32: 6f38 ld a4,88(a4) + 83f47c34: 963e add a2,a2,a5 + 83f47c36: 96be add a3,a3,a5 + 83f47c38: 00062787 flw fa5,0(a2) + 83f47c3c: 0006a707 flw fa4,0(a3) + 83f47c40: 973e add a4,a4,a5 + 83f47c42: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f47c46: 00f72027 fsw fa5,0(a4) + 83f47c4a: 6c18 ld a4,24(s0) + for (i=0;i + + /* Compute power spectrum of the linear echo in each bin */ + speech_fft(st->echo_state->fft_table, st->echo_state->y, st->echo_state->Y); + 83f47c50: 7730 ld a2,104(a4) + 83f47c52: 6f2c ld a1,88(a4) + 83f47c54: 7f68 ld a0,248(a4) + 83f47c56: 446010ef jal ra,83f4909c + bin_power_spectrum(st->echo_state->Y, residual_echo, N); /* powe-based linear echo */ + 83f47c5a: 6c1c ld a5,24(s0) + 83f47c5c: 864a mv a2,s2 + 83f47c5e: 85a6 mv a1,s1 + 83f47c60: 77a8 ld a0,104(a5) + 83f47c62: eaefe0ef jal ra,83f46310 + + //rer_coef = 0.75f; + //st->RER_smooth = rer_coef*st->RER_smooth + (FLOAT_ONE-rer_coef)*st->echo_state->RER; /* not better */ + //if (st->RER_smooth*32767 > 2000) + if (st->echo_state->RER*32767 > 3000) + 83f47c66: 6c08 ld a0,24(s0) + 83f47c68: 0000a797 auipc a5,0xa + 83f47c6c: 6047a687 flw fa3,1540(a5) # 83f5226c <__func__.1+0x74> + 83f47c70: 0000a797 auipc a5,0xa + 83f47c74: 74c7a707 flw fa4,1868(a5) # 83f523bc <__func__.1+0x1c4> + 83f47c78: 14452787 flw fa5,324(a0) + float tmp1[320], tmp2[320]; +#endif + float fdstd_tau, fdstd_tau_sum; + int start_f, end_f; + + for (i=0;i < st->frame_size;i++) { + 83f47c7c: 401c lw a5,0(s0) + if (st->echo_state->RER*32767 > 3000) + 83f47c7e: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f47c82: a0f71753 flt.s a4,fa4,fa5 + 83f47c86: 0ae42c23 sw a4,184(s0) + for (i=0;i < st->frame_size;i++) { + 83f47c8a: 06f05363 blez a5,83f47cf0 + 83f47c8e: 6605 lui a2,0x1 + 83f47c90: a0060713 addi a4,a2,-1536 # a00 <_EL1_STACK_SIZE+0x200> + 83f47c94: 0808 addi a0,sp,16 + tmp1[i] = st->mic_raw_ola[i]; /* previous frame */ + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + 83f47c96: a0060613 addi a2,a2,-1536 + 83f47c9a: 76fd lui a3,0xfffff + 83f47c9c: 962a add a2,a2,a0 + 83f47c9e: 60068593 addi a1,a3,1536 # fffffffffffff600 <_end+0xffffffff7bfff8c0> + 83f47ca2: 972a add a4,a4,a0 + 83f47ca4: 96b2 add a3,a3,a2 + 83f47ca6: 95ba add a1,a1,a4 + 83f47ca8: e436 sd a3,8(sp) + for (i=0;i < st->frame_size;i++) { + 83f47caa: 4701 li a4,0 + tmp1[i] = st->mic_raw_ola[i]; /* previous frame */ + 83f47cac: 6470 ld a2,200(s0) + 83f47cae: 00171513 slli a0,a4,0x1 + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + 83f47cb2: 6074 ld a3,192(s0) + tmp1[i] = st->mic_raw_ola[i]; /* previous frame */ + 83f47cb4: 962a add a2,a2,a0 + 83f47cb6: 00061803 lh a6,0(a2) + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + 83f47cba: 96aa add a3,a3,a0 + 83f47cbc: 6522 ld a0,8(sp) + tmp1[i] = st->mic_raw_ola[i]; /* previous frame */ + 83f47cbe: d00877d3 fcvt.s.w fa5,a6 + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + 83f47cc2: 9fb9 addw a5,a5,a4 + 83f47cc4: 078a slli a5,a5,0x2 + tmp1[i] = st->mic_raw_ola[i]; /* previous frame */ + 83f47cc6: 00f5a027 fsw fa5,0(a1) + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + 83f47cca: 00069803 lh a6,0(a3) + 83f47cce: 97aa add a5,a5,a0 + for (i=0;i < st->frame_size;i++) { + 83f47cd0: 0705 addi a4,a4,1 + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + 83f47cd2: d00877d3 fcvt.s.w fa5,a6 + for (i=0;i < st->frame_size;i++) { + 83f47cd6: 0007051b sext.w a0,a4 + 83f47cda: 0591 addi a1,a1,4 + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + 83f47cdc: 60f7a027 fsw fa5,1536(a5) + st->mic_raw_ola[i] = st->aes_std_in[i]; /* update input overlap data */ + 83f47ce0: 00069783 lh a5,0(a3) + 83f47ce4: 00f61023 sh a5,0(a2) + for (i=0;i < st->frame_size;i++) { + 83f47ce8: 401c lw a5,0(s0) + 83f47cea: fcf541e3 blt a0,a5,83f47cac + } + + for (i=0;iecho_state->window[i] * tmp1[i]; + speech_fft(st->echo_state->fft_table, tmp1, tmp2); + 83f47cee: 6c08 ld a0,24(s0) + for (i=0;i + 83f47cf4: 6785 lui a5,0x1 + 83f47cf6: 0818 addi a4,sp,16 + 83f47cf8: 76fd lui a3,0xfffff + 83f47cfa: a0078793 addi a5,a5,-1536 # a00 <_EL1_STACK_SIZE+0x200> + 83f47cfe: 97ba add a5,a5,a4 + 83f47d00: fff9059b addiw a1,s2,-1 + 83f47d04: 60068693 addi a3,a3,1536 # fffffffffffff600 <_end+0xffffffff7bfff8c0> + 83f47d08: 96be add a3,a3,a5 + 83f47d0a: 02059793 slli a5,a1,0x20 + 83f47d0e: 01e7d593 srli a1,a5,0x1e + 83f47d12: 00468713 addi a4,a3,4 + 83f47d16: 95ba add a1,a1,a4 + 83f47d18: 4601 li a2,0 + 83f47d1a: a011 j 83f47d1e + 83f47d1c: 0711 addi a4,a4,4 + tmp1[i] = st->echo_state->window[i] * tmp1[i]; + 83f47d1e: 757c ld a5,232(a0) + 83f47d20: 0006a787 flw fa5,0(a3) + 83f47d24: 97b2 add a5,a5,a2 + 83f47d26: 0007a707 flw fa4,0(a5) + for (i=0;iecho_state->window[i] * tmp1[i]; + 83f47d2c: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f47d30: 00f6a027 fsw fa5,0(a3) + for (i=0;i + speech_fft(st->echo_state->fft_table, tmp1, tmp2); + 83f47d3a: 6785 lui a5,0x1 + 83f47d3c: 0818 addi a4,sp,16 + 83f47d3e: 7a7d lui s4,0xfffff + 83f47d40: a0078793 addi a5,a5,-1536 # a00 <_EL1_STACK_SIZE+0x200> + 83f47d44: 97ba add a5,a5,a4 + 83f47d46: 7d68 ld a0,248(a0) + 83f47d48: 600a0a13 addi s4,s4,1536 # fffffffffffff600 <_end+0xffffffff7bfff8c0> + 83f47d4c: 9a3e add s4,s4,a5 + 83f47d4e: 51010613 addi a2,sp,1296 + 83f47d52: 85d2 mv a1,s4 + 83f47d54: 348010ef jal ra,83f4909c + bin_power_spectrum(tmp2, tmp1, N); + 83f47d58: 864a mv a2,s2 + 83f47d5a: 85d2 mv a1,s4 + 83f47d5c: 51010513 addi a0,sp,1296 + 83f47d60: db0fe0ef jal ra,83f46310 + + fdstd_tau_sum = FLOAT_ZERO; + start_f = (int)(ceil(100 * N / st->sampling_rate)); + 83f47d64: 06400793 li a5,100 + 83f47d68: 032787bb mulw a5,a5,s2 + 83f47d6c: 4418 lw a4,8(s0) + fdstd_tau_sum = FLOAT_ZERO; + 83f47d6e: f0000453 fmv.w.x fs0,zero + start_f = (int)(ceil(100 * N / st->sampling_rate)); + 83f47d72: 02e7c7bb divw a5,a5,a4 + 83f47d76: d2078553 fcvt.d.w fa0,a5 + 83f47d7a: a21f80ef jal ra,83f4079a + end_f = (int)(floor(3800 * N / st->sampling_rate)); + 83f47d7e: 6785 lui a5,0x1 + 83f47d80: ed87879b addiw a5,a5,-296 + 83f47d84: 02f9093b mulw s2,s2,a5 + 83f47d88: 441c lw a5,8(s0) + start_f = (int)(ceil(100 * N / st->sampling_rate)); + 83f47d8a: c2051bd3 fcvt.w.d s7,fa0,rtz + 83f47d8e: 000b8c1b sext.w s8,s7 + end_f = (int)(floor(3800 * N / st->sampling_rate)); + 83f47d92: 02f9493b divw s2,s2,a5 + 83f47d96: d2090553 fcvt.d.w fa0,s2 + 83f47d9a: bc9f80ef jal ra,83f40962 + 83f47d9e: c2051b53 fcvt.w.d s6,fa0,rtz + 83f47da2: 000b0a9b sext.w s5,s6 + for (i = start_f; i <= end_f; i++) { + 83f47da6: 058ac063 blt s5,s8,83f47de6 + 83f47daa: 002c1913 slli s2,s8,0x2 + 83f47dae: 01248cb3 add s9,s1,s2 + 83f47db2: 0000a797 auipc a5,0xa + 83f47db6: 60e7a487 flw fs1,1550(a5) # 83f523c0 <__func__.1+0x1c8> + 83f47dba: 9952 add s2,s2,s4 + fdstd_tau = (float)sqrt(residual_echo[i]/(tmp1[i] + 0.000000000465f)); /* add small DC to avoid zero denominator */ + 83f47dbc: 00092787 flw fa5,0(s2) + 83f47dc0: 000ca507 flw fa0,0(s9) + for (i = start_f; i <= end_f; i++) { + 83f47dc4: 2c05 addiw s8,s8,1 + fdstd_tau = (float)sqrt(residual_echo[i]/(tmp1[i] + 0.000000000465f)); /* add small DC to avoid zero denominator */ + 83f47dc6: 0097f7d3 fadd.s fa5,fa5,fs1 + for (i = start_f; i <= end_f; i++) { + 83f47dca: 0c91 addi s9,s9,4 + 83f47dcc: 0911 addi s2,s2,4 + fdstd_tau = (float)sqrt(residual_echo[i]/(tmp1[i] + 0.000000000465f)); /* add small DC to avoid zero denominator */ + 83f47dce: 18f57553 fdiv.s fa0,fa0,fa5 + 83f47dd2: 42050553 fcvt.d.s fa0,fa0 + 83f47dd6: 81cf90ef jal ra,83f40df2 + 83f47dda: 40157553 fcvt.s.d fa0,fa0 + fdstd_tau_sum += fdstd_tau; + 83f47dde: 00a47453 fadd.s fs0,fs0,fa0 + for (i = start_f; i <= end_f; i++) { + 83f47de2: fd8adde3 bge s5,s8,83f47dbc + } + + if (fdstd_tau_sum > (float)(end_f - start_f + 1)) /* fix abnormal situation */ + 83f47de6: 417b0b3b subw s6,s6,s7 + 83f47dea: 2b05 addiw s6,s6,1 + 83f47dec: d00b77d3 fcvt.s.w fa5,s6 + 83f47df0: a08797d3 flt.s a5,fa5,fs0 + 83f47df4: c399 beqz a5,83f47dfa + fdstd_tau_sum = (float)(end_f - start_f + 1); + 83f47df6: 20f78453 fmv.s fs0,fa5 + + st->fdstd_tau_mean = fdstd_tau_sum/(end_f - start_f + 1); /* frame-based */ + 83f47dfa: 18f47453 fdiv.s fs0,fs0,fa5 + if (st->fdstd_tau_mean > st->fdstd_thrd) + 83f47dfe: 0d442787 flw fa5,212(s0) + st->fdstd_vad = 1; + else + st->fdstd_vad = 0; + + if ((st->RER_vad) && (st->fdstd_vad)) + 83f47e02: 0b842783 lw a5,184(s0) + if (st->fdstd_tau_mean > st->fdstd_thrd) + 83f47e06: a0879753 flt.s a4,fa5,fs0 + st->fdstd_tau_mean = fdstd_tau_sum/(end_f - start_f + 1); /* frame-based */ + 83f47e0a: 0c842827 fsw fs0,208(s0) + if (st->fdstd_tau_mean > st->fdstd_thrd) + 83f47e0e: 0ce42c23 sw a4,216(s0) + if ((st->RER_vad) && (st->fdstd_vad)) + 83f47e12: cbd1 beqz a5,83f47ea6 + 83f47e14: c379 beqz a4,83f47eda + st->st_vad = 0; + + } + + if (st->st_vad) { + if (st->echo_state->leak_estimate > .5) /* the bigger the value, the more abrupt the signal */ + 83f47e16: 6c1c ld a5,24(s0) + st->st_vad = 1; + 83f47e18: 4705 li a4,1 + 83f47e1a: 0ae42e23 sw a4,188(s0) + if (st->echo_state->leak_estimate > .5) /* the bigger the value, the more abrupt the signal */ + 83f47e1e: 0307a707 flw fa4,48(a5) + 83f47e22: 0000a797 auipc a5,0xa + 83f47e26: 44e7a787 flw fa5,1102(a5) # 83f52270 <__func__.1+0x78> + 83f47e2a: a0e797d3 flt.s a5,fa5,fa4 + 83f47e2e: c3cd beqz a5,83f47ed0 + leak2 = st->aes_supp_coef1; + 83f47e30: 0dc42707 flw fa4,220(s0) + else + leak2 = 2.0f * st->echo_state->leak_estimate; + } + } + + for (i=0;i<=st->frame_size;i++) { + 83f47e34: 4018 lw a4,0(s0) + 83f47e36: 4781 li a5,0 + 83f47e38: 02074863 bltz a4,83f47e68 + if (st->st_vad) + residual_echo[i] = leak2 * residual_echo[i]; + 83f47e3c: 0004a787 flw fa5,0(s1) + if (st->st_vad) + 83f47e40: 0bc42703 lw a4,188(s0) + residual_echo[i] = leak2 * residual_echo[i]; + 83f47e44: 10f777d3 fmul.s fa5,fa4,fa5 + if (st->st_vad) + 83f47e48: eb09 bnez a4,83f47e5a + else + residual_echo[i] = (short)(leak2 * residual_echo[i]); + 83f47e4a: c0079753 fcvt.w.s a4,fa5,rtz + 83f47e4e: 0107171b slliw a4,a4,0x10 + 83f47e52: 4107571b sraiw a4,a4,0x10 + 83f47e56: d00777d3 fcvt.s.w fa5,a4 + 83f47e5a: 00f4a027 fsw fa5,0(s1) + for (i=0;i<=st->frame_size;i++) { + 83f47e5e: 4018 lw a4,0(s0) + 83f47e60: 2785 addiw a5,a5,1 + 83f47e62: 0491 addi s1,s1,4 + 83f47e64: fcf75ce3 bge a4,a5,83f47e3c + } + +} + 83f47e68: 29010113 addi sp,sp,656 + 83f47e6c: 7e813083 ld ra,2024(sp) + 83f47e70: 7e013403 ld s0,2016(sp) + 83f47e74: 7d813483 ld s1,2008(sp) + 83f47e78: 7d013903 ld s2,2000(sp) + 83f47e7c: 7c813983 ld s3,1992(sp) + 83f47e80: 7c013a03 ld s4,1984(sp) + 83f47e84: 7b813a83 ld s5,1976(sp) + 83f47e88: 7b013b03 ld s6,1968(sp) + 83f47e8c: 7a813b83 ld s7,1960(sp) + 83f47e90: 7a013c03 ld s8,1952(sp) + 83f47e94: 79813c83 ld s9,1944(sp) + 83f47e98: 78813407 fld fs0,1928(sp) + 83f47e9c: 78013487 fld fs1,1920(sp) + 83f47ea0: 7f010113 addi sp,sp,2032 + 83f47ea4: 8082 ret + st->st_vad = 0; + 83f47ea6: 0a042e23 sw zero,188(s0) + leak2 = 0.0f; /* keep clean speech signal not to be attenuated */ + 83f47eaa: f0000753 fmv.w.x fa4,zero + if (!(st->RER_vad) && (speech_vad)) { + 83f47eae: f80993e3 bnez s3,83f47e34 + if (st->echo_state->leak_estimate > .5) + 83f47eb2: 6c1c ld a5,24(s0) + 83f47eb4: 0000a717 auipc a4,0xa + 83f47eb8: 3bc72787 flw fa5,956(a4) # 83f52270 <__func__.1+0x78> + 83f47ebc: 0307a707 flw fa4,48(a5) + 83f47ec0: a0e797d3 flt.s a5,fa5,fa4 + 83f47ec4: c79d beqz a5,83f47ef2 + leak2 = 1.0f; + 83f47ec6: 0000a797 auipc a5,0xa + 83f47eca: 38a7a707 flw fa4,906(a5) # 83f52250 <__func__.1+0x58> + 83f47ece: b79d j 83f47e34 + leak2 = st->aes_supp_coef2 * st->echo_state->leak_estimate; + 83f47ed0: 0e042787 flw fa5,224(s0) + 83f47ed4: 10f77753 fmul.s fa4,fa4,fa5 + 83f47ed8: bfb1 j 83f47e34 + if (st->echo_state->leak_estimate > .5) + 83f47eda: 6c1c ld a5,24(s0) + st->st_vad = 0; + 83f47edc: 0a042e23 sw zero,188(s0) + if (st->echo_state->leak_estimate > .5) + 83f47ee0: 0000a717 auipc a4,0xa + 83f47ee4: 39072787 flw fa5,912(a4) # 83f52270 <__func__.1+0x78> + 83f47ee8: 0307a707 flw fa4,48(a5) + 83f47eec: a0e797d3 flt.s a5,fa5,fa4 + 83f47ef0: fbf9 bnez a5,83f47ec6 + leak2 = 2.0f * st->echo_state->leak_estimate; + 83f47ef2: 00e77753 fadd.s fa4,fa4,fa4 + 83f47ef6: bf3d j 83f47e34 + +0000000083f47ef8 : + +EXPORT void NLP_AES(NonLinearEchoState *aes_state, short *y, float aes_frame, boolean_T speech_vad) +{ + 83f47ef8: ce010113 addi sp,sp,-800 + 83f47efc: 30813823 sd s0,784(sp) + 83f47f00: 31213023 sd s2,768(sp) + 83f47f04: 2d713c23 sd s7,728(sp) + 83f47f08: 2d813823 sd s8,720(sp) + 83f47f0c: 2b213427 fsd fs2,680(sp) + 83f47f10: 30113c23 sd ra,792(sp) + 83f47f14: 30913423 sd s1,776(sp) + 83f47f18: 2f313c23 sd s3,760(sp) + 83f47f1c: 2f413823 sd s4,752(sp) + 83f47f20: 2f513423 sd s5,744(sp) + 83f47f24: 2f613023 sd s6,736(sp) + 83f47f28: 2d913423 sd s9,712(sp) + 83f47f2c: 2da13023 sd s10,704(sp) + 83f47f30: 2a813c27 fsd fs0,696(sp) + 83f47f34: 2a913827 fsd fs1,688(sp) + 83f47f38: 2b313027 fsd fs3,672(sp) + 83f47f3c: 29413c27 fsd fs4,664(sp) + 83f47f40: 29513827 fsd fs5,656(sp) + 83f47f44: 29613427 fsd fs6,648(sp) + 83f47f48: 29713027 fsd fs7,640(sp) + NonLinearEchoState *st; + float alpha, alpha2; + float y_tmp[160]; + + st = aes_state; + N = st->ps_size; + 83f47f4c: 00452b03 lw s6,4(a0) + N3 = 2*N - st->frame_size; + 83f47f50: 00052a83 lw s5,0(a0) + ps = st->ps; + + st->nb_adapt++; + 83f47f54: 0a052703 lw a4,160(a0) + N3 = 2*N - st->frame_size; + 83f47f58: 001b1c1b slliw s8,s6,0x1 + if (st->nb_adapt>20000) + 83f47f5c: 6795 lui a5,0x5 +{ + 83f47f5e: 842a mv s0,a0 + N3 = 2*N - st->frame_size; + 83f47f60: 415c0bbb subw s7,s8,s5 + st->nb_adapt++; + 83f47f64: 0017051b addiw a0,a4,1 + if (st->nb_adapt>20000) + 83f47f68: e2078793 addi a5,a5,-480 # 4e20 <_EL1_STACK_SIZE+0x4620> +{ + 83f47f6c: 20a50953 fmv.s fs2,fa0 + ps = st->ps; + 83f47f70: 03043a03 ld s4,48(s0) + N3 = 2*N - st->frame_size; + 83f47f74: 8ade mv s5,s7 +{ + 83f47f76: 892e mv s2,a1 + 83f47f78: 86b2 mv a3,a2 + if (st->nb_adapt>20000) + 83f47f7a: 50a7c263 blt a5,a0,83f4847e + st->nb_adapt = 20000; + st->min_count++; + 83f47f7e: 0a442783 lw a5,164(s0) + + beta = MAX(.03f, (float)(FLOAT_ONE / st->nb_adapt)); + beta_1 = FLOAT_ONE - beta; + beta_1 = beta_1; + M = st->nbands; + 83f47f82: 0b042483 lw s1,176(s0) + + /* Deal with residual echo if provided */ + if (st->echo_state) { + 83f47f86: 6c18 ld a4,24(s0) + st->min_count++; + 83f47f88: 2785 addiw a5,a5,1 + st->nb_adapt++; + 83f47f8a: 0aa42023 sw a0,160(s0) + st->min_count++; + 83f47f8e: 0af42223 sw a5,164(s0) + + for (i=0;iecho_noise[i] = MAX(.6f * st->echo_noise[i], st->residual_echo[i]); /* power-based */ + filterbank_linear2sb(st->bank, st->echo_noise, st->echo_noise+N); + } else { + for (i=0;ibank, st->echo_noise, st->echo_noise+N); + 83f47f96: 002b1993 slli s3,s6,0x2 + if (st->echo_state) { + 83f47f9a: 50070263 beqz a4,83f4849e + std_residual_echo(st, st->residual_echo, N, speech_vad); + 83f47f9e: 604c ld a1,128(s0) + 83f47fa0: 865a mv a2,s6 + 83f47fa2: 8522 mv a0,s0 + 83f47fa4: c2dff0ef jal ra,83f47bd0 + if (!(st->residual_echo[0] >=0 && st->residual_echo[0] + 83f47fb8: d00b77d3 fcvt.s.w fa5,s6 + 83f47fbc: 0000a717 auipc a4,0xa + 83f47fc0: 41072687 flw fa3,1040(a4) # 83f523cc <__func__.1+0x1d4> + 83f47fc4: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f47fc8: a0f71753 flt.s a4,fa4,fa5 + 83f47fcc: 76071e63 bnez a4,83f48748 + for (i=0;i + 83f47fe2: a0b1 j 83f4802e + 83f47fe4: 0711 addi a4,a4,4 + st->residual_echo[i] = 0; + 83f47fe6: 97ba add a5,a5,a4 + 83f47fe8: 0007a023 sw zero,0(a5) + 83f47fec: 605c ld a5,128(s0) + for (i=0;i + st->echo_noise[i] = MAX(.6f * st->echo_noise[i], st->residual_echo[i]); /* power-based */ + 83f47ff2: 0007a707 flw fa4,0(a5) + for (i=0;i + 83f48002: a029 j 83f4800c + st->echo_noise[i] = MAX(.6f * st->echo_noise[i], st->residual_echo[i]); /* power-based */ + 83f48004: 605c ld a5,128(s0) + 83f48006: 97ba add a5,a5,a4 + 83f48008: 0007a707 flw fa4,0(a5) + 83f4800c: 7c3c ld a5,120(s0) + for (i=0;iecho_noise[i] = MAX(.6f * st->echo_noise[i], st->residual_echo[i]); /* power-based */ + 83f48010: 97ba add a5,a5,a4 + 83f48012: 0007a787 flw fa5,0(a5) + for (i=0;iecho_noise[i] = MAX(.6f * st->echo_noise[i], st->residual_echo[i]); /* power-based */ + 83f48018: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f4801c: a0e79653 flt.s a2,fa5,fa4 + 83f48020: e219 bnez a2,83f48026 + 83f48022: 20f78753 fmv.s fa4,fa5 + 83f48026: 00e7a027 fsw fa4,0(a5) + for (i=0;i + filterbank_linear2sb(st->bank, st->echo_noise, st->echo_noise+N); + 83f4802e: 7c2c ld a1,120(s0) + 83f48030: 6808 ld a0,16(s0) + 83f48032: 01358633 add a2,a1,s3 + 83f48036: 167000ef jal ra,83f4899c + st->echo_noise[i] = 0; + } + + aes_analysis(st, y); + 83f4803a: 85ca mv a1,s2 + 83f4803c: 8522 mv a0,s0 + 83f4803e: 4e1000ef jal ra,83f48d1e + + /* Special case for first frame */ + if (st->nb_adapt==1) + 83f48042: 0a042703 lw a4,160(s0) + 83f48046: 4785 li a5,1 + 83f48048: 48f70263 beq a4,a5,83f484cc + for (i=0;iold_ps[i] = ps[i]; + + for (i=0;i + + /* Update gamma */ + gamma = .1f + .89f * SQR(st->old_ps[i] / (st->old_ps[i] + tot_noise)); + + /* Priori SNR */ + st->prior[i] = gamma * MAX(0, st->post[i]) + (FLOAT_ONE-gamma) * (st->old_ps[i] / tot_noise); + 83f48050: f0000053 fmv.w.x ft0,zero + 83f48054: 86d2 mv a3,s4 + for (i=0;i + 83f48060: 0000a797 auipc a5,0xa + 83f48064: 3647a607 flw fa2,868(a5) # 83f523c4 <__func__.1+0x1cc> + 83f48068: 0000a797 auipc a5,0xa + 83f4806c: 3687a507 flw fa0,872(a5) # 83f523d0 <__func__.1+0x1d8> + 83f48070: 0000a797 auipc a5,0xa + 83f48074: 2b87aa87 flw fs5,696(a5) # 83f52328 <__func__.1+0x130> + float tot_noise = 1.f + st->echo_noise[i]; + 83f48078: 7c30 ld a2,120(s0) + 83f4807a: 00271793 slli a5,a4,0x2 + st->post[i] = ps[i] / tot_noise - 1.f; + 83f4807e: 0006a787 flw fa5,0(a3) + float tot_noise = 1.f + st->echo_noise[i]; + 83f48082: 963e add a2,a2,a5 + 83f48084: 00062707 flw fa4,0(a2) + st->post[i] = ps[i] / tot_noise - 1.f; + 83f48088: 742c ld a1,104(s0) + for (i=0;iecho_noise[i]; + 83f4808c: 00877753 fadd.s fa4,fa4,fs0 + st->post[i] = ps[i] / tot_noise - 1.f; + 83f48090: 95be add a1,a1,a5 + for (i=0;ipost[i] = ps[i] / tot_noise - 1.f; + 83f48098: 18e7f7d3 fdiv.s fa5,fa5,fa4 + 83f4809c: 0887f7d3 fsub.s fa5,fa5,fs0 + 83f480a0: 00f5a027 fsw fa5,0(a1) + st->post[i]=MIN(st->post[i], 100.f); + 83f480a4: 742c ld a1,104(s0) + 83f480a6: 95be add a1,a1,a5 + 83f480a8: 0005a787 flw fa5,0(a1) + 83f480ac: a0f61553 flt.s a0,fa2,fa5 + 83f480b0: c119 beqz a0,83f480b6 + 83f480b2: 20c607d3 fmv.s fa5,fa2 + 83f480b6: 00f5a027 fsw fa5,0(a1) + gamma = .1f + .89f * SQR(st->old_ps[i] / (st->old_ps[i] + tot_noise)); + 83f480ba: 6828 ld a0,80(s0) + st->prior[i] = gamma * MAX(0, st->post[i]) + (FLOAT_ONE-gamma) * (st->old_ps[i] / tot_noise); + 83f480bc: 742c ld a1,104(s0) + gamma = .1f + .89f * SQR(st->old_ps[i] / (st->old_ps[i] + tot_noise)); + 83f480be: 953e add a0,a0,a5 + 83f480c0: 00052787 flw fa5,0(a0) + st->prior[i] = gamma * MAX(0, st->post[i]) + (FLOAT_ONE-gamma) * (st->old_ps[i] / tot_noise); + 83f480c4: 95be add a1,a1,a5 + 83f480c6: 0005a687 flw fa3,0(a1) + 83f480ca: 18e7f5d3 fdiv.s fa1,fa5,fa4 + gamma = .1f + .89f * SQR(st->old_ps[i] / (st->old_ps[i] + tot_noise)); + 83f480ce: 00e7f753 fadd.s fa4,fa5,fa4 + st->prior[i] = gamma * MAX(0, st->post[i]) + (FLOAT_ONE-gamma) * (st->old_ps[i] / tot_noise); + 83f480d2: a0d015d3 flt.s a1,ft0,fa3 + gamma = .1f + .89f * SQR(st->old_ps[i] / (st->old_ps[i] + tot_noise)); + 83f480d6: 18e7f7d3 fdiv.s fa5,fa5,fa4 + 83f480da: 10f7f7d3 fmul.s fa5,fa5,fa5 + 83f480de: a8a7f7c3 fmadd.s fa5,fa5,fa0,fs5 + st->prior[i] = gamma * MAX(0, st->post[i]) + (FLOAT_ONE-gamma) * (st->old_ps[i] / tot_noise); + 83f480e2: e199 bnez a1,83f480e8 + 83f480e4: f00006d3 fmv.w.x fa3,zero + 83f480e8: 08f47753 fsub.s fa4,fs0,fa5 + 83f480ec: 702c ld a1,96(s0) + 83f480ee: 95be add a1,a1,a5 + 83f480f0: 10b77753 fmul.s fa4,fa4,fa1 + 83f480f4: 70f6f7c3 fmadd.s fa5,fa3,fa5,fa4 + 83f480f8: 00f5a027 fsw fa5,0(a1) + st->prior[i] = MIN(st->prior[i], 100.f); + 83f480fc: 702c ld a1,96(s0) + 83f480fe: 97ae add a5,a5,a1 + 83f48100: 0007a787 flw fa5,0(a5) + 83f48104: a0f615d3 flt.s a1,fa2,fa5 + 83f48108: c199 beqz a1,83f4810e + 83f4810a: 20c607d3 fmv.s fa5,fa2 + 83f4810e: 00f7a027 fsw fa5,0(a5) + for (i=0;i + } + + /* Recursive average of the priori SNR */ + st->zeta[0] = .7f * st->zeta[0] + .3f * st->prior[0]; + 83f48116: 7038 ld a4,96(s0) + 83f48118: 783c ld a5,112(s0) + 83f4811a: 0000a697 auipc a3,0xa + 83f4811e: 1c26a007 flw ft0,450(a3) # 83f522dc <__func__.1+0xe4> + 83f48122: 00072707 flw fa4,0(a4) + 83f48126: 0007a787 flw fa5,0(a5) + 83f4812a: 0000a717 auipc a4,0xa + 83f4812e: 15e72587 flw fa1,350(a4) # 83f52288 <__func__.1+0x90> + 83f48132: 10077753 fmul.s fa4,fa4,ft0 + for (i=1;izeta[0] = .7f * st->zeta[0] + .3f * st->prior[0]; + 83f48138: 70b7f7c3 fmadd.s fa5,fa5,fa1,fa4 + 83f4813c: 00f7a027 fsw fa5,0(a5) + for (i=1;i + 83f48144: ffdb059b addiw a1,s6,-3 + 83f48148: 02059793 slli a5,a1,0x20 + 83f4814c: 01e7d593 srli a1,a5,0x1e + 83f48150: 05a1 addi a1,a1,8 + 83f48152: 4791 li a5,4 + 83f48154: 0000a717 auipc a4,0xa + 83f48158: 16872087 flw ft1,360(a4) # 83f522bc <__func__.1+0xc4> + 83f4815c: 0000a717 auipc a4,0xa + 83f48160: 27872507 flw fa0,632(a4) # 83f523d4 <__func__.1+0x1dc> + st->zeta[i] = .7f * st->zeta[i] + .15f * st->prior[i] + .075f * st->prior[i-1] + .075f * st->prior[i+1]; + 83f48164: 7034 ld a3,96(s0) + 83f48166: 7838 ld a4,112(s0) + 83f48168: 00f68633 add a2,a3,a5 + 83f4816c: 00062787 flw fa5,0(a2) + 83f48170: 973e add a4,a4,a5 + 83f48172: 00072687 flw fa3,0(a4) + 83f48176: 1017f653 fmul.s fa2,fa5,ft1 + 83f4817a: ffc62707 flw fa4,-4(a2) + 83f4817e: 0791 addi a5,a5,4 + 83f48180: 96be add a3,a3,a5 + 83f48182: 0006a787 flw fa5,0(a3) + 83f48186: 60b6f6c3 fmadd.s fa3,fa3,fa1,fa2 + 83f4818a: 68a77743 fmadd.s fa4,fa4,fa0,fa3 + 83f4818e: 70a7f7c3 fmadd.s fa5,fa5,fa0,fa4 + 83f48192: 00f72027 fsw fa5,0(a4) + for (i=1;i + for (i=N-1;i + 83f4819e: 02049613 slli a2,s1,0x20 + 83f481a2: 9201 srli a2,a2,0x20 + 83f481a4: 965a add a2,a2,s6 + 83f481a6: ffc98793 addi a5,s3,-4 + 83f481aa: 060a slli a2,a2,0x2 + st->zeta[i] = .7f * st->zeta[i] + .3f * st->prior[i]; + 83f481ac: 7034 ld a3,96(s0) + 83f481ae: 7838 ld a4,112(s0) + 83f481b0: 96be add a3,a3,a5 + 83f481b2: 0006a707 flw fa4,0(a3) + 83f481b6: 973e add a4,a4,a5 + 83f481b8: 00072787 flw fa5,0(a4) + 83f481bc: 10077753 fmul.s fa4,fa4,ft0 + for (i=N-1;izeta[i] = .7f * st->zeta[i] + .3f * st->prior[i]; + 83f481c2: 70b7f7c3 fmadd.s fa5,fa5,fa1,fa4 + 83f481c6: 00f72027 fsw fa5,0(a4) + for (i=N-1;i + + Zframe = 0; + 83f481ce: f00007d3 fmv.w.x fa5,zero + for (i=N;i + 83f481d6: fff4871b addiw a4,s1,-1 + Zframe = Zframe + st->zeta[i]; + 83f481da: 783c ld a5,112(s0) + 83f481dc: 1702 slli a4,a4,0x20 + 83f481de: 9301 srli a4,a4,0x20 + 83f481e0: 975a add a4,a4,s6 + Zframe = 0; + 83f481e2: f00007d3 fmv.w.x fa5,zero + 83f481e6: 00478693 addi a3,a5,4 + 83f481ea: 070a slli a4,a4,0x2 + 83f481ec: 97ce add a5,a5,s3 + 83f481ee: 9736 add a4,a4,a3 + Zframe = Zframe + st->zeta[i]; + 83f481f0: 0007a707 flw fa4,0(a5) + for (i=N;izeta[i]; + 83f481f6: 00e7f7d3 fadd.s fa5,fa5,fa4 + for (i=N;i + + Pframe = .1f + .899f * aes_qcurve(Zframe / st->nbands); + 83f481fe: 0b042783 lw a5,176(s0) + 83f48202: d007f553 fcvt.s.w fa0,a5 + 83f48206: 18a7f553 fdiv.s fa0,fa5,fa0 + 83f4820a: 25f000ef jal ra,83f48c68 + effective_echo_suppress = (FLOAT_ONE - Pframe) * st->echo_sup + Pframe * st->echo_sup_active; + 83f4820e: 08c42783 lw a5,140(s0) + Pframe = .1f + .899f * aes_qcurve(Zframe / st->nbands); + 83f48212: 0000a717 auipc a4,0xa + 83f48216: 1c672787 flw fa5,454(a4) # 83f523d8 <__func__.1+0x1e0> + 83f4821a: a8f57ac3 fmadd.s fs5,fa0,fa5,fs5 + effective_echo_suppress = (FLOAT_ONE - Pframe) * st->echo_sup + Pframe * st->echo_sup_active; + 83f4821e: d007f7d3 fcvt.s.w fa5,a5 + 83f48222: 08842783 lw a5,136(s0) + aes_gain_floor(effective_echo_suppress, st->echo_noise+N, st->gain_floor+N, M); + 83f48226: 602c ld a1,64(s0) + 83f48228: 7c28 ld a0,120(s0) + effective_echo_suppress = (FLOAT_ONE - Pframe) * st->echo_sup + Pframe * st->echo_sup_active; + 83f4822a: 09547553 fsub.s fa0,fs0,fs5 + 83f4822e: 1157f7d3 fmul.s fa5,fa5,fs5 + 83f48232: d007f753 fcvt.s.w fa4,a5 + aes_gain_floor(effective_echo_suppress, st->echo_noise+N, st->gain_floor+N, M); + 83f48236: 8626 mv a2,s1 + 83f48238: 95ce add a1,a1,s3 + 83f4823a: 954e add a0,a0,s3 + 83f4823c: 78e57543 fmadd.s fa0,fa0,fa4,fa5 + 83f48240: 247000ef jal ra,83f48c86 + + /* Compute speech probability of presence */ + for (i=N;i + 83f48248: 34fd addiw s1,s1,-1 + 83f4824a: 1482 slli s1,s1,0x20 + 83f4824c: 001b0c93 addi s9,s6,1 + 83f48250: 9081 srli s1,s1,0x20 + 83f48252: 94e6 add s1,s1,s9 + 83f48254: 00249c93 slli s9,s1,0x2 + 83f48258: 0000a797 auipc a5,0xa + 83f4825c: 04c7a987 flw fs3,76(a5) # 83f522a4 <__func__.1+0xac> + 83f48260: 84ce mv s1,s3 + 83f48262: 0000a797 auipc a5,0xa + 83f48266: 0e27aa07 flw fs4,226(a5) # 83f52344 <__func__.1+0x14c> + 83f4826a: 0000a797 auipc a5,0xa + 83f4826e: 1727ab07 flw fs6,370(a5) # 83f523dc <__func__.1+0x1e4> + float MM; /* gain from hypergeometric function */ + float prior_ratio; /* Weiner filter gain */ + float P1; /* priority probability of speech presence */ + float q; /* speech absence the priori probability */ + + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f48272: 7038 ld a4,96(s0) + theta = prior_ratio * (1.f + st->post[i]); + 83f48274: 743c ld a5,104(s0) + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f48276: 9726 add a4,a4,s1 + 83f48278: 00072507 flw fa0,0(a4) + theta = prior_ratio * (1.f + st->post[i]); + 83f4827c: 97a6 add a5,a5,s1 + 83f4827e: 0007ab87 flw fs7,0(a5) + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f48282: 008574d3 fadd.s fs1,fa0,fs0 + theta = prior_ratio * (1.f + st->post[i]); + 83f48286: 008bfbd3 fadd.s fs7,fs7,fs0 + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f4828a: 189574d3 fdiv.s fs1,fa0,fs1 + theta = prior_ratio * (1.f + st->post[i]); + 83f4828e: 109bfbd3 fmul.s fs7,fs7,fs1 + + MM = aes_hypergeom_gain(theta); + 83f48292: 217b8553 fmv.s fa0,fs7 + 83f48296: 10d000ef jal ra,83f48ba2 + st->gain[i] = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + 83f4829a: 10a4f553 fmul.s fa0,fs1,fa0 + st->old_ps[i] = .2f * st->old_ps[i] + .8f * SQR(st->gain[i]) * ps[i]; /* save old power spectrum */ + 83f4829e: 009a06b3 add a3,s4,s1 + st->gain[i] = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + 83f482a2: a08517d3 flt.s a5,fa0,fs0 + 83f482a6: e399 bnez a5,83f482ac + 83f482a8: 20840553 fmv.s fa0,fs0 + 83f482ac: 6c3c ld a5,88(s0) + + P1 = .199f + .8f * aes_qcurve(st->zeta[i]); + q = FLOAT_ONE - Pframe * P1; + st->gain2[i] = 1/(1.f + (q/(1.f-q))*(1+st->prior[i])*(float)exp(-theta)); /* lambda/(1+lambda) */ + 83f482ae: 217b9bd3 fneg.s fs7,fs7 + st->gain[i] = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + 83f482b2: 97a6 add a5,a5,s1 + 83f482b4: 00a7a027 fsw fa0,0(a5) + st->old_ps[i] = .2f * st->old_ps[i] + .8f * SQR(st->gain[i]) * ps[i]; /* save old power spectrum */ + 83f482b8: 6c38 ld a4,88(s0) + 83f482ba: 0006a687 flw fa3,0(a3) + 83f482be: 683c ld a5,80(s0) + 83f482c0: 9726 add a4,a4,s1 + 83f482c2: 00072787 flw fa5,0(a4) + 83f482c6: 97a6 add a5,a5,s1 + 83f482c8: 0007a707 flw fa4,0(a5) + 83f482cc: 10f7f7d3 fmul.s fa5,fa5,fa5 + 83f482d0: 1137f7d3 fmul.s fa5,fa5,fs3 + 83f482d4: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f482d8: 794777c3 fmadd.s fa5,fa4,fs4,fa5 + 83f482dc: 00f7a027 fsw fa5,0(a5) + P1 = .199f + .8f * aes_qcurve(st->zeta[i]); + 83f482e0: 783c ld a5,112(s0) + 83f482e2: 97a6 add a5,a5,s1 + 83f482e4: 0007a507 flw fa0,0(a5) + 83f482e8: 181000ef jal ra,83f48c68 + 83f482ec: b13574c3 fmadd.s fs1,fa0,fs3,fs6 + st->gain2[i] = 1/(1.f + (q/(1.f-q))*(1+st->prior[i])*(float)exp(-theta)); /* lambda/(1+lambda) */ + 83f482f0: 703c ld a5,96(s0) + 83f482f2: 420b8553 fcvt.d.s fa0,fs7 + 83f482f6: 97a6 add a5,a5,s1 + q = FLOAT_ONE - Pframe * P1; + 83f482f8: 409af4cb fnmsub.s fs1,fs5,fs1,fs0 + st->gain2[i] = 1/(1.f + (q/(1.f-q))*(1+st->prior[i])*(float)exp(-theta)); /* lambda/(1+lambda) */ + 83f482fc: 0007a787 flw fa5,0(a5) + 83f48300: 0087f7d3 fadd.s fa5,fa5,fs0 + 83f48304: 08947753 fsub.s fa4,fs0,fs1 + 83f48308: 18e4f4d3 fdiv.s fs1,fs1,fa4 + 83f4830c: 1097f4d3 fmul.s fs1,fa5,fs1 + 83f48310: 8d1f80ef jal ra,83f40be0 + 83f48314: 40157553 fcvt.s.d fa0,fa0 + 83f48318: 7c1c ld a5,56(s0) + 83f4831a: 40a4f4c3 fmadd.s fs1,fs1,fa0,fs0 + 83f4831e: 97a6 add a5,a5,s1 + for (i=N;igain2[i] = 1/(1.f + (q/(1.f-q))*(1+st->prior[i])*(float)exp(-theta)); /* lambda/(1+lambda) */ + 83f48322: 189474d3 fdiv.s fs1,fs0,fs1 + 83f48326: 0097a027 fsw fs1,0(a5) + for (i=N;i + + } + + filterbank_sb2linear(st->bank,st->gain2+N, st->gain2); + 83f4832e: 7c10 ld a2,56(s0) + 83f48330: 6808 ld a0,16(s0) + 83f48332: 013605b3 add a1,a2,s3 + 83f48336: 6e2000ef jal ra,83f48a18 + filterbank_sb2linear(st->bank,st->gain+N, st->gain); + 83f4833a: 6c30 ld a2,88(s0) + 83f4833c: 6808 ld a0,16(s0) + 83f4833e: 013605b3 add a1,a2,s3 + 83f48342: 6d6000ef jal ra,83f48a18 + filterbank_sb2linear(st->bank,st->gain_floor+N, st->gain_floor); + 83f48346: 6030 ld a2,64(s0) + 83f48348: 6808 ld a0,16(s0) + 83f4834a: 013605b3 add a1,a2,s3 + 83f4834e: 6ca000ef jal ra,83f48a18 + + /* Compute gain */ + for (i=0;i + 83f48356: 4481 li s1,0 + 83f48358: 0000a797 auipc a5,0xa + 83f4835c: f4c7a987 flw fs3,-180(a5) # 83f522a4 <__func__.1+0xac> + 83f48360: 0000a797 auipc a5,0xa + 83f48364: fe47aa07 flw fs4,-28(a5) # 83f52344 <__func__.1+0x14c> + 83f48368: 0000a797 auipc a5,0xa + 83f4836c: 0607aa87 flw fs5,96(a5) # 83f523c8 <__func__.1+0x1d0> + g = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + p = st->gain2[i]; /* interpolated speech probability of presence */ + + /* Constrain the gain to be close to the scale gain */ + if ((.333f *g) > st->gain[i]) + g = 3.f * st->gain[i]; + 83f48370: 0000a797 auipc a5,0xa + 83f48374: f607ab07 flw fs6,-160(a5) # 83f522d0 <__func__.1+0xd8> + 83f48378: a0f1 j 83f48444 + g = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + 83f4837a: 20840553 fmv.s fa0,fs0 + if ((.333f *g) > st->gain[i]) + 83f4837e: 6c3c ld a5,88(s0) + p = st->gain2[i]; /* interpolated speech probability of presence */ + 83f48380: 7c18 ld a4,56(s0) + st->gain[i] = g; + + /* save old power spectrum */ + st->old_ps[i] = .2f * st->old_ps[i] + .8f * SQR(st->gain[i]) * ps[i]; + 83f48382: 009a06b3 add a3,s4,s1 + if ((.333f *g) > st->gain[i]) + 83f48386: 97a6 add a5,a5,s1 + 83f48388: 0007a787 flw fa5,0(a5) + p = st->gain2[i]; /* interpolated speech probability of presence */ + 83f4838c: 9726 add a4,a4,s1 + 83f4838e: 00072b87 flw fs7,0(a4) + if ((.333f *g) > st->gain[i]) + 83f48392: a0e79753 flt.s a4,fa5,fa4 + 83f48396: c319 beqz a4,83f4839c + g = 3.f * st->gain[i]; + 83f48398: 1167f553 fmul.s fa0,fa5,fs6 + st->gain[i] = g; + 83f4839c: 00a7a027 fsw fa0,0(a5) + st->old_ps[i] = .2f * st->old_ps[i] + .8f * SQR(st->gain[i]) * ps[i]; + 83f483a0: 6c38 ld a4,88(s0) + 83f483a2: 0006a787 flw fa5,0(a3) + 83f483a6: 683c ld a5,80(s0) + 83f483a8: 9726 add a4,a4,s1 + 83f483aa: 00072707 flw fa4,0(a4) + 83f483ae: 97a6 add a5,a5,s1 + 83f483b0: 0007a687 flw fa3,0(a5) + 83f483b4: 10e77753 fmul.s fa4,fa4,fa4 + 83f483b8: 11377753 fmul.s fa4,fa4,fs3 + 83f483bc: 10f77753 fmul.s fa4,fa4,fa5 + 83f483c0: 7146f743 fmadd.s fa4,fa3,fs4,fa4 + 83f483c4: 00e7a027 fsw fa4,0(a5) + + /* Apply gain floor */ + if (st->gain[i] < st->gain_floor[i]) + 83f483c8: 6c3c ld a5,88(s0) + 83f483ca: 6038 ld a4,64(s0) + 83f483cc: 97a6 add a5,a5,s1 + 83f483ce: 9726 add a4,a4,s1 + 83f483d0: 0007a507 flw fa0,0(a5) + 83f483d4: 00072787 flw fa5,0(a4) + 83f483d8: a0f51753 flt.s a4,fa0,fa5 + 83f483dc: c719 beqz a4,83f483ea + st->gain[i] = st->gain_floor[i]; + 83f483de: 00f7a027 fsw fa5,0(a5) + + /* Take into account speech probability of presence */ + tmp = p * (float)math_sqrt(st->gain[i]) + (FLOAT_ONE -p) * (float)math_sqrt(st->gain_floor[i]); + 83f483e2: 6c3c ld a5,88(s0) + 83f483e4: 97a6 add a5,a5,s1 + 83f483e6: 0007a507 flw fa0,0(a5) + 83f483ea: 42050553 fcvt.d.s fa0,fa0 + 83f483ee: a05f80ef jal ra,83f40df2 + 83f483f2: 603c ld a5,64(s0) + 83f483f4: 22a504d3 fmv.d fs1,fa0 + 83f483f8: 97a6 add a5,a5,s1 + 83f483fa: 0007a507 flw fa0,0(a5) + 83f483fe: 42050553 fcvt.d.s fa0,fa0 + 83f48402: 9f1f80ef jal ra,83f40df2 + 83f48406: 09747753 fsub.s fa4,fs0,fs7 + 83f4840a: 401577d3 fcvt.s.d fa5,fa0 + 83f4840e: 4014f4d3 fcvt.s.d fs1,fs1 + st->gain2[i] = SQR(tmp); + 83f48412: 7c1c ld a5,56(s0) + tmp = p * (float)math_sqrt(st->gain[i]) + (FLOAT_ONE -p) * (float)math_sqrt(st->gain_floor[i]); + 83f48414: 10f777d3 fmul.s fa5,fa4,fa5 + st->gain2[i] = SQR(tmp); + 83f48418: 97a6 add a5,a5,s1 + tmp = p * (float)math_sqrt(st->gain[i]) + (FLOAT_ONE -p) * (float)math_sqrt(st->gain_floor[i]); + 83f4841a: 7974f7c3 fmadd.s fa5,fs1,fs7,fa5 + st->gain2[i] = SQR(tmp); + 83f4841e: 10f7f7d3 fmul.s fa5,fa5,fa5 + 83f48422: 00f7a027 fsw fa5,0(a5) + + //if (st->st_vad) + //if (st->RER_vad) + st->gain2[i] = st->gain2[i] * st->gain[i]; + 83f48426: 7c1c ld a5,56(s0) + 83f48428: 6c38 ld a4,88(s0) + 83f4842a: 97a6 add a5,a5,s1 + 83f4842c: 9726 add a4,a4,s1 + 83f4842e: 0007a787 flw fa5,0(a5) + 83f48432: 00072707 flw fa4,0(a4) + for (i=0;igain2[i] = st->gain2[i] * st->gain[i]; + 83f48438: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f4843c: 00f7a027 fsw fa5,0(a5) + for (i=0;i + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f48444: 7038 ld a4,96(s0) + theta = prior_ratio * (1.f + st->post[i]); + 83f48446: 743c ld a5,104(s0) + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f48448: 9726 add a4,a4,s1 + 83f4844a: 00072487 flw fs1,0(a4) + theta = prior_ratio * (1.f + st->post[i]); + 83f4844e: 97a6 add a5,a5,s1 + 83f48450: 0007a507 flw fa0,0(a5) + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f48454: 0084f7d3 fadd.s fa5,fs1,fs0 + theta = prior_ratio * (1.f + st->post[i]); + 83f48458: 00857553 fadd.s fa0,fa0,fs0 + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + 83f4845c: 18f4f4d3 fdiv.s fs1,fs1,fa5 + MM = aes_hypergeom_gain(theta); + 83f48460: 10957553 fmul.s fa0,fa0,fs1 + 83f48464: 73e000ef jal ra,83f48ba2 + g = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + 83f48468: 10a4f553 fmul.s fa0,fs1,fa0 + 83f4846c: 215a8753 fmv.s fa4,fs5 + 83f48470: a08517d3 flt.s a5,fa0,fs0 + 83f48474: f00783e3 beqz a5,83f4837a + if ((.333f *g) > st->gain[i]) + 83f48478: 11557753 fmul.s fa4,fa0,fs5 + 83f4847c: b709 j 83f4837e + st->nb_adapt = 20000; + 83f4847e: 0af42023 sw a5,160(s0) + st->min_count++; + 83f48482: 0a442783 lw a5,164(s0) + M = st->nbands; + 83f48486: 0b042483 lw s1,176(s0) + if (st->echo_state) { + 83f4848a: 6c18 ld a4,24(s0) + st->min_count++; + 83f4848c: 2785 addiw a5,a5,1 + 83f4848e: 0af42223 sw a5,164(s0) + for (i=0;ibank, st->echo_noise, st->echo_noise+N); + 83f48496: 002b1993 slli s3,s6,0x2 + if (st->echo_state) { + 83f4849a: b00712e3 bnez a4,83f47f9e + for (i=0;i + st->echo_noise[i] = 0; + 83f484a8: 7c38 ld a4,120(s0) + 83f484aa: 973e add a4,a4,a5 + 83f484ac: 00072023 sw zero,0(a4) + for (i=0;i + aes_analysis(st, y); + 83f484b6: 85ca mv a1,s2 + 83f484b8: 8522 mv a0,s0 + 83f484ba: 065000ef jal ra,83f48d1e + if (st->nb_adapt==1) + 83f484be: 0a042703 lw a4,160(s0) + 83f484c2: 4785 li a5,1 + 83f484c4: fffb0c9b addiw s9,s6,-1 + 83f484c8: b8f712e3 bne a4,a5,83f4804c + for (i=0;i + st->old_ps[i] = ps[i]; + 83f484d6: 6838 ld a4,80(s0) + 83f484d8: 00fa06b3 add a3,s4,a5 + 83f484dc: 0006a787 flw fa5,0(a3) + 83f484e0: 973e add a4,a4,a5 + for (i=0;iold_ps[i] = ps[i]; + 83f484e4: 00f72027 fsw fa5,0(a4) + for (i=0;i + 83f484ec: b695 j 83f48050 + + } + + + for (i=1;i + st->ft[2*i-1] = st->gain2[i] * st->ft[2*i-1]; + 83f484f8: 7414 ld a3,40(s0) + 83f484fa: 7c10 ld a2,56(s0) + st->ft[2*i] = st->gain2[i] * st->ft[2*i]; + 83f484fc: 00179513 slli a0,a5,0x1 + st->ft[2*i-1] = st->gain2[i] * st->ft[2*i-1]; + 83f48500: 96ae add a3,a3,a1 + 83f48502: 963e add a2,a2,a5 + 83f48504: 0006a787 flw fa5,0(a3) + 83f48508: 00062707 flw fa4,0(a2) + for (i=1;ift[2*i-1] = st->gain2[i] * st->ft[2*i-1]; + 83f4850e: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f48512: 00f6a027 fsw fa5,0(a3) + st->ft[2*i] = st->gain2[i] * st->ft[2*i]; + 83f48516: 7418 ld a4,40(s0) + 83f48518: 7c14 ld a3,56(s0) + 83f4851a: 972a add a4,a4,a0 + 83f4851c: 96be add a3,a3,a5 + 83f4851e: 00072787 flw fa5,0(a4) + 83f48522: 0006a707 flw fa4,0(a3) + for (i=1;ift[2*i] = st->gain2[i] * st->ft[2*i]; + 83f48528: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f4852c: 00f72027 fsw fa5,0(a4) + for (i=1;i + } + st->ft[0] = st->gain2[0] * st->ft[0]; + 83f48534: 7418 ld a4,40(s0) + 83f48536: 7c1c ld a5,56(s0) + st->ft[2*N-1] = st->gain2[N-1] * st->ft[2*N-1]; + 83f48538: 002c1493 slli s1,s8,0x2 + st->ft[0] = st->gain2[0] * st->ft[0]; + 83f4853c: 00072787 flw fa5,0(a4) + 83f48540: 0007a707 flw fa4,0(a5) + st->ft[2*N-1] = st->gain2[N-1] * st->ft[2*N-1]; + 83f48544: ffc48693 addi a3,s1,-4 + st->ft[0] = st->gain2[0] * st->ft[0]; + 83f48548: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f4854c: 00f72027 fsw fa5,0(a4) + st->ft[2*N-1] = st->gain2[N-1] * st->ft[2*N-1]; + 83f48550: 741c ld a5,40(s0) + 83f48552: 7c18 ld a4,56(s0) + 83f48554: 97b6 add a5,a5,a3 + 83f48556: 99ba add s3,s3,a4 + 83f48558: 0007a787 flw fa5,0(a5) + 83f4855c: ffc9a707 flw fa4,-4(s3) + 83f48560: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f48564: 00f7a027 fsw fa5,0(a5) + + speech_ifft(st->fft_lookup, st->ft, st->frame); + 83f48568: 7010 ld a2,32(s0) + 83f4856a: 740c ld a1,40(s0) + 83f4856c: 7448 ld a0,168(s0) + 83f4856e: 39b000ef jal ra,83f49108 + + /* Apply synthesis window (for WOLA) */ + for (i=0;i<2*N;i++) + 83f48572: 4781 li a5,0 + 83f48574: 03805163 blez s8,83f48596 + st->frame[i] = st->frame[i] * st->window[i]; + 83f48578: 7018 ld a4,32(s0) + 83f4857a: 6434 ld a3,72(s0) + 83f4857c: 973e add a4,a4,a5 + 83f4857e: 96be add a3,a3,a5 + 83f48580: 00072787 flw fa5,0(a4) + 83f48584: 0006a707 flw fa4,0(a3) + for (i=0;i<2*N;i++) + 83f48588: 0791 addi a5,a5,4 + st->frame[i] = st->frame[i] * st->window[i]; + 83f4858a: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f4858e: 00f72027 fsw fa5,0(a4) + for (i=0;i<2*N;i++) + 83f48592: fef493e3 bne s1,a5,83f48578 + + /* Perform overlap and add */ + for (i=0;i + 83f4859a: 6c50 ld a2,152(s0) + 83f4859c: fffa859b addiw a1,s5,-1 + 83f485a0: 02059793 slli a5,a1,0x20 + 83f485a4: 01e7d593 srli a1,a5,0x1e + 83f485a8: 00460793 addi a5,a2,4 + 83f485ac: 7014 ld a3,32(s0) + 83f485ae: 870a mv a4,sp + 83f485b0: 95be add a1,a1,a5 + 83f485b2: a011 j 83f485b6 + 83f485b4: 0791 addi a5,a5,4 + y_tmp[i] = st->outbuf[i] + st->frame[i]; + 83f485b6: 00062787 flw fa5,0(a2) + 83f485ba: 0006a707 flw fa4,0(a3) + for (i=0;ioutbuf[i] + st->frame[i]; + 83f485c2: 00e7f7d3 fadd.s fa5,fa5,fa4 + for (i=0;ioutbuf[i] + st->frame[i]; + 83f485c8: fef72e27 fsw fa5,-4(a4) + for (i=0;i + } + + if (1 == (unsigned short)aes_frame) + 83f485d0: c01917d3 fcvt.wu.s a5,fs2,rtz + 83f485d4: 4705 li a4,1 + 83f485d6: 17c2 slli a5,a5,0x30 + 83f485d8: 93c1 srli a5,a5,0x30 + 83f485da: 14e78d63 beq a5,a4,83f48734 + st->frame1_last_sample = y_tmp[N3-1]; + if (2 == (unsigned short)aes_frame) { + 83f485de: 4709 li a4,2 + 83f485e0: 06e79263 bne a5,a4,83f48644 + alpha2 = 1.0F/160.0F; + alpha = 1 - alpha2; + y_tmp[0] = alpha * st->frame1_last_sample + alpha2 * y_tmp[0]; + 83f485e4: 00012787 flw fa5,0(sp) + 83f485e8: 0000a797 auipc a5,0xa + 83f485ec: d687a687 flw fa3,-664(a5) # 83f52350 <__func__.1+0x158> + 83f485f0: 0e442707 flw fa4,228(s0) + 83f485f4: 10d7f7d3 fmul.s fa5,fa5,fa3 + 83f485f8: 0000a797 auipc a5,0xa + 83f485fc: d5c7a687 flw fa3,-676(a5) # 83f52354 <__func__.1+0x15c> + for (i = 0; i < N3-1; i++) { + 83f48600: fffa869b addiw a3,s5,-1 + y_tmp[0] = alpha * st->frame1_last_sample + alpha2 * y_tmp[0]; + 83f48604: 78d77743 fmadd.s fa4,fa4,fa3,fa5 + 83f48608: 00e12027 fsw fa4,0(sp) + for (i = 0; i < N3-1; i++) { + 83f4860c: 02d05c63 blez a3,83f48644 + 83f48610: 0058 addi a4,sp,4 + 83f48612: 4781 li a5,0 + 83f48614: 0000a617 auipc a2,0xa + 83f48618: d4462587 flw fa1,-700(a2) # 83f52358 <__func__.1+0x160> + alpha2 = (float)(1.0F + i)/160.0F; + 83f4861c: d007f7d3 fcvt.s.w fa5,a5 + alpha = 1 - alpha2; + y_tmp[i+1] = alpha * y_tmp[i] + alpha2 * y_tmp[i+1]; + 83f48620: 00072607 flw fa2,0(a4) + for (i = 0; i < N3-1; i++) { + 83f48624: 0711 addi a4,a4,4 + alpha2 = (float)(1.0F + i)/160.0F; + 83f48626: 0087f7d3 fadd.s fa5,fa5,fs0 + y_tmp[i+1] = alpha * y_tmp[i] + alpha2 * y_tmp[i+1]; + 83f4862a: 2785 addiw a5,a5,1 + alpha2 = (float)(1.0F + i)/160.0F; + 83f4862c: 18b7f7d3 fdiv.s fa5,fa5,fa1 + alpha = 1 - alpha2; + 83f48630: 08f476d3 fsub.s fa3,fs0,fa5 + y_tmp[i+1] = alpha * y_tmp[i] + alpha2 * y_tmp[i+1]; + 83f48634: 10c7f7d3 fmul.s fa5,fa5,fa2 + 83f48638: 78e6f743 fmadd.s fa4,fa3,fa4,fa5 + 83f4863c: fee72e27 fsw fa4,-4(a4) + for (i = 0; i < N3-1; i++) { + 83f48640: fcd79ee3 bne a5,a3,83f4861c + } + } + + for (i=0;i + 83f48648: 3afd addiw s5,s5,-1 + 83f4864a: 020a9793 slli a5,s5,0x20 + 83f4864e: 01e7da93 srli s5,a5,0x1e + y[i] = (short)WORD2INT(y_tmp[i]); + 83f48652: 69a1 lui s3,0x8 + 83f48654: 005c addi a5,sp,4 + 83f48656: 9abe add s5,s5,a5 + 83f48658: 848a mv s1,sp + 83f4865a: 0000a797 auipc a5,0xa + 83f4865e: c367a407 flw fs0,-970(a5) # 83f52290 <__func__.1+0x98> + 83f48662: 0000a797 auipc a5,0xa + 83f48666: c327a487 flw fs1,-974(a5) # 83f52294 <__func__.1+0x9c> + 83f4866a: 19fd addi s3,s3,-1 + 83f4866c: 0000a797 auipc a5,0xa + 83f48670: c2c7b907 fld fs2,-980(a5) # 83f52298 <__func__.1+0xa0> + 83f48674: a031 j 83f48680 + 83f48676: 00f91023 sh a5,0(s2) + for (i=0;i + y[i] = (short)WORD2INT(y_tmp[i]); + 83f48680: 0004a507 flw fa0,0(s1) + 83f48684: 77e1 lui a5,0xffff8 + for (i=0;i + 83f4868e: a0a49753 flt.s a4,fs1,fa0 + 83f48692: 87ce mv a5,s3 + 83f48694: f36d bnez a4,83f48676 + 83f48696: 42050553 fcvt.d.s fa0,fa0 + for (i=0;i + 83f486a4: c20517d3 fcvt.w.d a5,fa0,rtz + 83f486a8: 0107979b slliw a5,a5,0x10 + 83f486ac: 4107d79b sraiw a5,a5,0x10 + 83f486b0: fef91f23 sh a5,-2(s2) + for (i=0;i + 83f486b8: 4701 li a4,0 + + /* Update OLA outbuf */ + for (i=0;ioutbuf[i] = st->frame[st->frame_size+i]; /* output 50% OLA */ + 83f486ba: 401c lw a5,0(s0) + 83f486bc: 7010 ld a2,32(s0) + 83f486be: 6c54 ld a3,152(s0) + 83f486c0: 9fb9 addw a5,a5,a4 + 83f486c2: 078a slli a5,a5,0x2 + 83f486c4: 97b2 add a5,a5,a2 + 83f486c6: 0007a787 flw fa5,0(a5) # ffffffffffff8000 <_end+0xffffffff7bff82c0> + 83f486ca: 00271793 slli a5,a4,0x2 + 83f486ce: 97b6 add a5,a5,a3 + for (i=0;ioutbuf[i] = st->frame[st->frame_size+i]; /* output 50% OLA */ + 83f486d2: 00f7a027 fsw fa5,0(a5) + for (i=0;i + +} + 83f486de: 31813083 ld ra,792(sp) + 83f486e2: 31013403 ld s0,784(sp) + 83f486e6: 30813483 ld s1,776(sp) + 83f486ea: 30013903 ld s2,768(sp) + 83f486ee: 2f813983 ld s3,760(sp) + 83f486f2: 2f013a03 ld s4,752(sp) + 83f486f6: 2e813a83 ld s5,744(sp) + 83f486fa: 2e013b03 ld s6,736(sp) + 83f486fe: 2d813b83 ld s7,728(sp) + 83f48702: 2d013c03 ld s8,720(sp) + 83f48706: 2c813c83 ld s9,712(sp) + 83f4870a: 2c013d03 ld s10,704(sp) + 83f4870e: 2b813407 fld fs0,696(sp) + 83f48712: 2b013487 fld fs1,688(sp) + 83f48716: 2a813907 fld fs2,680(sp) + 83f4871a: 2a013987 fld fs3,672(sp) + 83f4871e: 29813a07 fld fs4,664(sp) + 83f48722: 29013a87 fld fs5,656(sp) + 83f48726: 28813b07 fld fs6,648(sp) + 83f4872a: 28013b87 fld fs7,640(sp) + 83f4872e: 32010113 addi sp,sp,800 + 83f48732: 8082 ret + st->frame1_last_sample = y_tmp[N3-1]; + 83f48734: fffa879b addiw a5,s5,-1 + 83f48738: 078a slli a5,a5,0x2 + 83f4873a: 0518 addi a4,sp,640 + 83f4873c: 97ba add a5,a5,a4 + 83f4873e: d807a787 flw fa5,-640(a5) + 83f48742: 0ef42227 fsw fa5,228(s0) + if (2 == (unsigned short)aes_frame) { + 83f48746: bdfd j 83f48644 + for (i=0;i + 83f48750: b8f9 j 83f4802e + 83f48752: 0000a797 auipc a5,0xa + 83f48756: afe7a407 flw fs0,-1282(a5) # 83f52250 <__func__.1+0x58> + 83f4875a: 0000a797 auipc a5,0xa + 83f4875e: bce7aa87 flw fs5,-1074(a5) # 83f52328 <__func__.1+0x130> + 83f48762: ba55 j 83f48116 + +0000000083f48764 : +#include "packfft.h" +#include "nlpaes_subfun.h" + +/* Function Definitions */ +FilterBank *filterbank_create(int banks, float sampling, int len, int type) +{ + 83f48764: 7135 addi sp,sp,-160 + 83f48766: aca2 fsd fs0,88(sp) + int id1; + int id2; + + type = type; + df = sampling / (float)(2 * len); + max_mel = (float)toBARK(sampling/2); + 83f48768: 0000a797 auipc a5,0xa + 83f4876c: b087a407 flw fs0,-1272(a5) # 83f52270 <__func__.1+0x78> + 83f48770: 10857453 fmul.s fs0,fa0,fs0 +{ + 83f48774: b856 fsd fs5,48(sp) + max_mel = (float)toBARK(sampling/2); + 83f48776: 0000a797 auipc a5,0xa + 83f4877a: c6a7aa87 flw fs5,-918(a5) # 83f523e0 <__func__.1+0x1e8> + df = sampling / (float)(2 * len); + 83f4877e: 0015979b slliw a5,a1,0x1 +{ + 83f48782: bc52 fsd fs4,56(sp) + max_mel = (float)toBARK(sampling/2); + 83f48784: 115477d3 fmul.s fa5,fs0,fs5 + df = sampling / (float)(2 * len); + 83f48788: d007fa53 fcvt.s.w fs4,a5 +{ + 83f4878c: ed06 sd ra,152(sp) + 83f4878e: e922 sd s0,144(sp) + df = sampling / (float)(2 * len); + 83f48790: 19457a53 fdiv.s fs4,fa0,fs4 + max_mel = (float)toBARK(sampling/2); + 83f48794: 42078553 fcvt.d.s fa0,fa5 +{ + 83f48798: e526 sd s1,136(sp) + 83f4879a: e14a sd s2,128(sp) + 83f4879c: 84ae mv s1,a1 + 83f4879e: 892a mv s2,a0 + 83f487a0: fcce sd s3,120(sp) + 83f487a2: f4d6 sd s5,104(sp) + 83f487a4: f0da sd s6,96(sp) + 83f487a6: a8a6 fsd fs1,80(sp) + 83f487a8: a4ca fsd fs2,72(sp) + 83f487aa: a0ce fsd fs3,64(sp) + 83f487ac: b45a fsd fs6,40(sp) + 83f487ae: b05e fsd fs7,32(sp) + 83f487b0: ac62 fsd fs8,24(sp) + 83f487b2: a866 fsd fs9,16(sp) + 83f487b4: f8d2 sd s4,112(sp) + 83f487b6: a46a fsd fs10,8(sp) + max_mel = (float)toBARK(sampling/2); + 83f487b8: dd9f70ef jal ra,83f40590 + 83f487bc: 108477d3 fmul.s fa5,fs0,fs0 + 83f487c0: 0000a797 auipc a5,0xa + 83f487c4: c247ab07 flw fs6,-988(a5) # 83f523e4 <__func__.1+0x1ec> + 83f487c8: 22a504d3 fmv.d fs1,fa0 + mel_interval = max_mel / (float)(banks - 1); + + bank = (FilterBank*)mem_alloc(sizeof(FilterBank)); + bank->nb_banks = banks; + bank->len = len; + bank->bank_left = (int*)mem_alloc(len*sizeof(int)); + 83f487cc: 00249a9b slliw s5,s1,0x2 + mel_interval = max_mel / (float)(banks - 1); + 83f487d0: fff9041b addiw s0,s2,-1 + max_mel = (float)toBARK(sampling/2); + 83f487d4: 1167f553 fmul.s fa0,fa5,fs6 + 83f487d8: 42050553 fcvt.d.s fa0,fa0 + 83f487dc: db5f70ef jal ra,83f40590 + 83f487e0: 0000a797 auipc a5,0xa + 83f487e4: c187bb87 fld fs7,-1000(a5) # 83f523f8 <__func__.1+0x200> + 83f487e8: 13757553 fmul.d fa0,fa0,fs7 + 83f487ec: 0000a797 auipc a5,0xa + 83f487f0: c147bc07 fld fs8,-1004(a5) # 83f52400 <__func__.1+0x208> + uintptr_t *ptr = pvPortMalloc(size); + 83f487f4: 02800513 li a0,40 + 83f487f8: 0000a797 auipc a5,0xa + 83f487fc: bf07ac87 flw fs9,-1040(a5) # 83f523e8 <__func__.1+0x1f0> + 83f48800: 11947953 fmul.s fs2,fs0,fs9 + mel_interval = max_mel / (float)(banks - 1); + 83f48804: d00479d3 fcvt.s.w fs3,s0 + max_mel = (float)toBARK(sampling/2); + 83f48808: 5384f4c3 fmadd.d fs1,fs1,fs8,fa0 + 83f4880c: 579050ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f48810: 02800613 li a2,40 + 83f48814: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f48816: 89aa mv s3,a0 + memset(ptr, 0, size); + 83f48818: 764030ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4881c: 8556 mv a0,s5 + bank->nb_banks = banks; + 83f4881e: 0329a023 sw s2,32(s3) # 8020 <_EL1_STACK_SIZE+0x7820> + bank->len = len; + 83f48822: 0299a223 sw s1,36(s3) + 83f48826: 55f050ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4882a: 8656 mv a2,s5 + 83f4882c: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4882e: 8b2a mv s6,a0 + max_mel = (float)toBARK(sampling/2); + 83f48830: 42090953 fcvt.d.s fs2,fs2 + memset(ptr, 0, size); + 83f48834: 748030ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f48838: 8556 mv a0,s5 + bank->bank_left = (int*)mem_alloc(len*sizeof(int)); + 83f4883a: 0169b023 sd s6,0(s3) + 83f4883e: 547050ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f48842: 8656 mv a2,s5 + 83f48844: 4581 li a1,0 + max_mel = (float)toBARK(sampling/2); + 83f48846: 02997953 fadd.d fs2,fs2,fs1 + uintptr_t *ptr = pvPortMalloc(size); + 83f4884a: 8b2a mv s6,a0 + memset(ptr, 0, size); + 83f4884c: 730030ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f48850: 8556 mv a0,s5 + bank->bank_right = (int*)mem_alloc(len*sizeof(int)); + 83f48852: 0169b423 sd s6,8(s3) + 83f48856: 52f050ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4885a: 8656 mv a2,s5 + 83f4885c: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4885e: 8b2a mv s6,a0 + memset(ptr, 0, size); + 83f48860: 71c030ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f48864: 8556 mv a0,s5 + bank->filter_left = (float*)mem_alloc(len*sizeof(float)); + 83f48866: 0169b823 sd s6,16(s3) + 83f4886a: 51b050ef jal ra,83f4e584 + max_mel = (float)toBARK(sampling/2); + 83f4886e: 40197953 fcvt.s.d fs2,fs2 + 83f48872: 8b2a mv s6,a0 + memset(ptr, 0, size); + 83f48874: 8656 mv a2,s5 + 83f48876: 4581 li a1,0 + 83f48878: 704030ef jal ra,83f4bf7c + bank->filter_right = (float*)mem_alloc(len*sizeof(float)); + 83f4887c: 0169bc23 sd s6,24(s3) + mel_interval = max_mel / (float)(banks - 1); + 83f48880: 193979d3 fdiv.s fs3,fs2,fs3 + + //bank->scaling = (float*)mem_alloc(banks*sizeof(float)); + + for (i=0;i + 83f48888: 4a01 li s4,0 + } else { + val = (mel - id1*mel_interval) / mel_interval; + } + id2 = id1+1; + bank->bank_left[i] = id1; + bank->filter_left[i] = FLOAT_ONE - val; + 83f4888a: 0000a797 auipc a5,0xa + 83f4888e: 9c67ad07 flw fs10,-1594(a5) # 83f52250 <__func__.1+0x58> + id1 = banks-2; + 83f48892: 3979 addiw s2,s2,-2 + 83f48894: a80d j 83f488c6 + 83f48896: 86ca mv a3,s2 + bank->bank_left[i] = id1; + 83f48898: 0009b703 ld a4,0(s3) + 83f4889c: 002a1793 slli a5,s4,0x2 + for (i=0;ibank_left[i] = id1; + 83f488a2: 973e add a4,a4,a5 + 83f488a4: c314 sw a3,0(a4) + bank->filter_left[i] = FLOAT_ONE - val; + 83f488a6: 0109b703 ld a4,16(s3) + 83f488aa: 973e add a4,a4,a5 + 83f488ac: 00e72027 fsw fa4,0(a4) + bank->bank_right[i] = id2; + 83f488b0: 0089b703 ld a4,8(s3) + 83f488b4: 973e add a4,a4,a5 + 83f488b6: c310 sw a2,0(a4) + bank->filter_right[i] = val; + 83f488b8: 0189b703 ld a4,24(s3) + 83f488bc: 97ba add a5,a5,a4 + 83f488be: 00f7a027 fsw fa5,0(a5) + for (i=0;i + curr_freq = (float)(i * df); + 83f488c6: d00a7453 fcvt.s.w fs0,s4 + 83f488ca: 11447453 fmul.s fs0,fs0,fs4 + mel = (float)toBARK(curr_freq); + 83f488ce: 11547553 fmul.s fa0,fs0,fs5 + 83f488d2: 42050553 fcvt.d.s fa0,fa0 + 83f488d6: cbbf70ef jal ra,83f40590 + 83f488da: 108477d3 fmul.s fa5,fs0,fs0 + 83f488de: 22a504d3 fmv.d fs1,fa0 + 83f488e2: 1167f553 fmul.s fa0,fa5,fs6 + 83f488e6: 42050553 fcvt.d.s fa0,fa0 + 83f488ea: ca7f70ef jal ra,83f40590 + 83f488ee: 13757553 fmul.d fa0,fa0,fs7 + 83f488f2: 11947453 fmul.s fs0,fs0,fs9 + 83f488f6: 42040453 fcvt.d.s fs0,fs0 + 83f488fa: 5384f4c3 fmadd.d fs1,fs1,fs8,fa0 + 83f488fe: 02947453 fadd.d fs0,fs0,fs1 + 83f48902: 40147453 fcvt.s.d fs0,fs0 + if (mel > max_mel) + 83f48906: a08917d3 flt.s a5,fs2,fs0 + 83f4890a: ef8d bnez a5,83f48944 + id1 = (int)(floor(mel/mel_interval)); + 83f4890c: 19347553 fdiv.s fa0,fs0,fs3 + 83f48910: 42050553 fcvt.d.s fa0,fa0 + 83f48914: 84ef80ef jal ra,83f40962 + 83f48918: c20517d3 fcvt.w.d a5,fa0,rtz + 83f4891c: f0000753 fmv.w.x fa4,zero + val = FLOAT_ONE; + 83f48920: 21ad07d3 fmv.s fa5,fs10 + id1 = (int)(floor(mel/mel_interval)); + 83f48924: 0007869b sext.w a3,a5 + if (id1>banks-2) { + 83f48928: 8622 mv a2,s0 + 83f4892a: f686d6e3 bge a3,s0,83f48896 + val = (mel - id1*mel_interval) / mel_interval; + 83f4892e: d007f7d3 fcvt.s.w fa5,a5 + id2 = id1+1; + 83f48932: 0017861b addiw a2,a5,1 + val = (mel - id1*mel_interval) / mel_interval; + 83f48936: 4137f7cb fnmsub.s fa5,fa5,fs3,fs0 + 83f4893a: 1937f7d3 fdiv.s fa5,fa5,fs3 + bank->filter_left[i] = FLOAT_ONE - val; + 83f4893e: 08fd7753 fsub.s fa4,fs10,fa5 + 83f48942: bf99 j 83f48898 + for (i=0;inb_banks;i++) + bank->scaling[i] = FLOAT_ONE/(bank->scaling[i]); + #endif + + return bank; +} + 83f48944: 60ea ld ra,152(sp) + 83f48946: 644a ld s0,144(sp) + 83f48948: 64aa ld s1,136(sp) + 83f4894a: 690a ld s2,128(sp) + 83f4894c: 7a46 ld s4,112(sp) + 83f4894e: 7aa6 ld s5,104(sp) + 83f48950: 7b06 ld s6,96(sp) + 83f48952: 2466 fld fs0,88(sp) + 83f48954: 24c6 fld fs1,80(sp) + 83f48956: 2926 fld fs2,72(sp) + 83f48958: 2986 fld fs3,64(sp) + 83f4895a: 3a62 fld fs4,56(sp) + 83f4895c: 3ac2 fld fs5,48(sp) + 83f4895e: 3b22 fld fs6,40(sp) + 83f48960: 3b82 fld fs7,32(sp) + 83f48962: 2c62 fld fs8,24(sp) + 83f48964: 2cc2 fld fs9,16(sp) + 83f48966: 2d22 fld fs10,8(sp) + 83f48968: 854e mv a0,s3 + 83f4896a: 79e6 ld s3,120(sp) + 83f4896c: 610d addi sp,sp,160 + 83f4896e: 8082 ret + +0000000083f48970 : + +inline void filterbank_free(FilterBank *bank) +{ + 83f48970: 1141 addi sp,sp,-16 + 83f48972: e406 sd ra,8(sp) + 83f48974: e022 sd s0,0(sp) + 83f48976: 842a mv s0,a0 + vPortFree(ptr); + 83f48978: 6108 ld a0,0(a0) + 83f4897a: 571050ef jal ra,83f4e6ea + 83f4897e: 6408 ld a0,8(s0) + 83f48980: 56b050ef jal ra,83f4e6ea + 83f48984: 6808 ld a0,16(s0) + 83f48986: 565050ef jal ra,83f4e6ea + 83f4898a: 6c08 ld a0,24(s0) + 83f4898c: 55f050ef jal ra,83f4e6ea + 83f48990: 8522 mv a0,s0 + mem_free(bank->bank_right); + mem_free(bank->filter_left); + mem_free(bank->filter_right); + //mem_free(bank->scaling); + mem_free(bank); +} + 83f48992: 6402 ld s0,0(sp) + 83f48994: 60a2 ld ra,8(sp) + 83f48996: 0141 addi sp,sp,16 + 83f48998: 5530506f j 83f4e6ea + +0000000083f4899c : + +inline void filterbank_linear2sb(FilterBank *bank, float *ps, float *mel) +{ + int i; + for (i=0;inb_banks;i++) + 83f4899c: 511c lw a5,32(a0) + 83f4899e: 00f05b63 blez a5,83f489b4 + 83f489a2: 8732 mv a4,a2 + 83f489a4: 4781 li a5,0 + mel[i] = 0; + 83f489a6: 00072023 sw zero,0(a4) + for (i=0;inb_banks;i++) + 83f489aa: 5114 lw a3,32(a0) + 83f489ac: 2785 addiw a5,a5,1 + 83f489ae: 0711 addi a4,a4,4 + 83f489b0: fed7cbe3 blt a5,a3,83f489a6 + + for (i=0;ilen;i++) { + 83f489b4: 515c lw a5,36(a0) + 83f489b6: 06f05063 blez a5,83f48a16 + 83f489ba: 4681 li a3,0 + int id; + id = bank->bank_left[i]; + 83f489bc: 611c ld a5,0(a0) + 83f489be: 00269713 slli a4,a3,0x2 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f489c2: 01053803 ld a6,16(a0) + id = bank->bank_left[i]; + 83f489c6: 97ba add a5,a5,a4 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f489c8: 439c lw a5,0(a5) + 83f489ca: 983a add a6,a6,a4 + 83f489cc: 0005a687 flw fa3,0(a1) + 83f489d0: 078a slli a5,a5,0x2 + 83f489d2: 97b2 add a5,a5,a2 + 83f489d4: 0007a707 flw fa4,0(a5) + 83f489d8: 00082787 flw fa5,0(a6) + for (i=0;ilen;i++) { + 83f489dc: 0591 addi a1,a1,4 + 83f489de: 0685 addi a3,a3,1 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f489e0: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + for (i=0;ilen;i++) { + 83f489e4: 0006889b sext.w a7,a3 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f489e8: 00f7a027 fsw fa5,0(a5) + id = bank->bank_right[i]; + 83f489ec: 651c ld a5,8(a0) + mel[id] += (bank->filter_right[i] * ps[i]); + 83f489ee: 01853803 ld a6,24(a0) + 83f489f2: ffc5a687 flw fa3,-4(a1) + id = bank->bank_right[i]; + 83f489f6: 97ba add a5,a5,a4 + mel[id] += (bank->filter_right[i] * ps[i]); + 83f489f8: 439c lw a5,0(a5) + 83f489fa: 9742 add a4,a4,a6 + 83f489fc: 00072787 flw fa5,0(a4) + 83f48a00: 078a slli a5,a5,0x2 + 83f48a02: 97b2 add a5,a5,a2 + 83f48a04: 0007a707 flw fa4,0(a5) + 83f48a08: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + 83f48a0c: 00f7a027 fsw fa5,0(a5) + for (i=0;ilen;i++) { + 83f48a10: 515c lw a5,36(a0) + 83f48a12: faf8c5e3 blt a7,a5,83f489bc + + /*for (i=0;inb_banks;i++) + mel[i] = (bank->scaling[i]) * mel[i]; + */ + +} + 83f48a16: 8082 ret + +0000000083f48a18 : + +inline void filterbank_sb2linear(FilterBank *bank, float *mel, float *ps) +{ + int i; + for (i=0;ilen;i++) { + 83f48a18: 515c lw a5,36(a0) + 83f48a1a: 04f05a63 blez a5,83f48a6e + 83f48a1e: 88b2 mv a7,a2 + 83f48a20: 4601 li a2,0 + float tmp; + int id1, id2; + id1 = bank->bank_left[i]; + id2 = bank->bank_right[i]; + 83f48a22: 6518 ld a4,8(a0) + 83f48a24: 00261693 slli a3,a2,0x2 + id1 = bank->bank_left[i]; + 83f48a28: 611c ld a5,0(a0) + id2 = bank->bank_right[i]; + 83f48a2a: 9736 add a4,a4,a3 + tmp = mel[id1] * bank->filter_left[i]; + tmp += (mel[id2] * bank->filter_right[i]); + 83f48a2c: 4318 lw a4,0(a4) + 83f48a2e: 01853803 ld a6,24(a0) + id1 = bank->bank_left[i]; + 83f48a32: 97b6 add a5,a5,a3 + tmp += (mel[id2] * bank->filter_right[i]); + 83f48a34: 070a slli a4,a4,0x2 + 83f48a36: 972e add a4,a4,a1 + 83f48a38: 9836 add a6,a6,a3 + 83f48a3a: 00072787 flw fa5,0(a4) + tmp = mel[id1] * bank->filter_left[i]; + 83f48a3e: 439c lw a5,0(a5) + tmp += (mel[id2] * bank->filter_right[i]); + 83f48a40: 00082707 flw fa4,0(a6) + tmp = mel[id1] * bank->filter_left[i]; + 83f48a44: 6918 ld a4,16(a0) + 83f48a46: 078a slli a5,a5,0x2 + tmp += (mel[id2] * bank->filter_right[i]); + 83f48a48: 10e7f753 fmul.s fa4,fa5,fa4 + tmp = mel[id1] * bank->filter_left[i]; + 83f48a4c: 97ae add a5,a5,a1 + 83f48a4e: 96ba add a3,a3,a4 + tmp += (mel[id2] * bank->filter_right[i]); + 83f48a50: 0007a787 flw fa5,0(a5) + 83f48a54: 0006a687 flw fa3,0(a3) + for (i=0;ilen;i++) { + 83f48a58: 0891 addi a7,a7,4 + 83f48a5a: 0605 addi a2,a2,1 + tmp += (mel[id2] * bank->filter_right[i]); + 83f48a5c: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + for (i=0;ilen;i++) { + 83f48a60: 0006079b sext.w a5,a2 + ps[i] = tmp; + 83f48a64: fef8ae27 fsw fa5,-4(a7) + for (i=0;ilen;i++) { + 83f48a68: 5158 lw a4,36(a0) + 83f48a6a: fae7cce3 blt a5,a4,83f48a22 + } +} + 83f48a6e: 8082 ret + +0000000083f48a70 : + +inline void aes_conj_window(float *w, int len) /* Hanning */ +{ + int i; + for (i=0;i +{ + 83f48a74: 711d addi sp,sp,-96 + 83f48a76: e8a2 sd s0,80(sp) + 83f48a78: e4a6 sd s1,72(sp) + 83f48a7a: e0ca sd s2,64(sp) + 83f48a7c: bc22 fsd fs0,56(sp) + 83f48a7e: b826 fsd fs1,48(sp) + 83f48a80: b44a fsd fs2,40(sp) + 83f48a82: b04e fsd fs3,32(sp) + 83f48a84: ac52 fsd fs4,24(sp) + 83f48a86: a856 fsd fs5,16(sp) + 83f48a88: a45a fsd fs6,8(sp) + 83f48a8a: a05e fsd fs7,0(sp) + float tmp; + float x = (float)(4.f * i) / (float)len; + 83f48a8c: d005fb53 fcvt.s.w fs6,a1 +{ + 83f48a90: ec86 sd ra,88(sp) + 83f48a92: 84ae mv s1,a1 + 83f48a94: 842a mv s0,a0 + for (i=0;i + 83f48aa0: 00009797 auipc a5,0x9 + 83f48aa4: 7b07a487 flw fs1,1968(a5) # 83f52250 <__func__.1+0x58> + 83f48aa8: 0000a797 auipc a5,0xa + 83f48aac: 9447aa87 flw fs5,-1724(a5) # 83f523ec <__func__.1+0x1f4> + 83f48ab0: 0000a797 auipc a5,0xa + 83f48ab4: 9587ba07 fld fs4,-1704(a5) # 83f52408 <__func__.1+0x210> + 83f48ab8: 00009797 auipc a5,0x9 + 83f48abc: 7b87a407 flw fs0,1976(a5) # 83f52270 <__func__.1+0x78> + int inv = 0; + if (x<1.f) { + } else if (x<2.f) { + 83f48ac0: 00009797 auipc a5,0x9 + 83f48ac4: 7cc7a987 flw fs3,1996(a5) # 83f5228c <__func__.1+0x94> + x = 2.f-x; + inv = 1; + } else if (x<3.f) { + 83f48ac8: 0000a797 auipc a5,0xa + 83f48acc: 8087ab87 flw fs7,-2040(a5) # 83f522d0 <__func__.1+0xd8> + 83f48ad0: a081 j 83f48b10 + } else if (x<2.f) { + 83f48ad2: a13517d3 flt.s a5,fa0,fs3 + 83f48ad6: cfd1 beqz a5,83f48b72 + x = 2.f-x; + 83f48ad8: 08a9f553 fsub.s fa0,fs3,fa0 + x = x-2.f; + inv = 1; + } else { + x = 4.f-x; + } + x = 1.271903f * x; + 83f48adc: 11557553 fmul.s fa0,fa0,fs5 + for (i=0;i + 83f48af0: 40157553 fcvt.s.d fa0,fa0 + 83f48af4: 4085754b fnmsub.s fa0,fa0,fs0,fs0 + tmp = tmp * tmp; + if (inv) + tmp = FLOAT_ONE - tmp; + 83f48af8: 48a5754b fnmsub.s fa0,fa0,fa0,fs1 + w[i] = (float)math_sqrt(tmp); + 83f48afc: 42050553 fcvt.d.s fa0,fa0 + 83f48b00: af2f80ef jal ra,83f40df2 + 83f48b04: 40157553 fcvt.s.d fa0,fa0 + 83f48b08: fea42e27 fsw fa0,-4(s0) + for (i=0;i + float x = (float)(4.f * i) / (float)len; + 83f48b10: d0097553 fcvt.s.w fa0,s2 + 83f48b14: 11257553 fmul.s fa0,fa0,fs2 + 83f48b18: 19657553 fdiv.s fa0,fa0,fs6 + if (x<1.f) { + 83f48b1c: a09517d3 flt.s a5,fa0,fs1 + 83f48b20: dbcd beqz a5,83f48ad2 + x = 1.271903f * x; + 83f48b22: 11557553 fmul.s fa0,fa0,fs5 + tmp = .5f-.5f * (float)math_cos_norm(x); /* Hanning */ + 83f48b26: 42050553 fcvt.d.s fa0,fa0 + 83f48b2a: 13457553 fmul.d fa0,fa0,fs4 + 83f48b2e: da5f70ef jal ra,83f408d2 + 83f48b32: 40157553 fcvt.s.d fa0,fa0 + 83f48b36: 4085754b fnmsub.s fa0,fa0,fs0,fs0 + tmp = tmp * tmp; + 83f48b3a: 10a57553 fmul.s fa0,fa0,fa0 + w[i] = (float)math_sqrt(tmp); + 83f48b3e: 42050553 fcvt.d.s fa0,fa0 + for (i=0;i + 83f48b4a: 40157553 fcvt.s.d fa0,fa0 + 83f48b4e: fea42e27 fsw fa0,-4(s0) + for (i=0;i + + } +} + 83f48b56: 60e6 ld ra,88(sp) + 83f48b58: 6446 ld s0,80(sp) + 83f48b5a: 64a6 ld s1,72(sp) + 83f48b5c: 6906 ld s2,64(sp) + 83f48b5e: 3462 fld fs0,56(sp) + 83f48b60: 34c2 fld fs1,48(sp) + 83f48b62: 3922 fld fs2,40(sp) + 83f48b64: 3982 fld fs3,32(sp) + 83f48b66: 2a62 fld fs4,24(sp) + 83f48b68: 2ac2 fld fs5,16(sp) + 83f48b6a: 2b22 fld fs6,8(sp) + 83f48b6c: 2b82 fld fs7,0(sp) + 83f48b6e: 6125 addi sp,sp,96 + 83f48b70: 8082 ret + } else if (x<3.f) { + 83f48b72: a17517d3 flt.s a5,fa0,fs7 + 83f48b76: c781 beqz a5,83f48b7e + x = x-2.f; + 83f48b78: 09357553 fsub.s fa0,fa0,fs3 + inv = 1; + 83f48b7c: b785 j 83f48adc + x = 4.f-x; + 83f48b7e: 08a97553 fsub.s fa0,fs2,fa0 + x = 1.271903f * x; + 83f48b82: 11557553 fmul.s fa0,fa0,fs5 + tmp = .5f-.5f * (float)math_cos_norm(x); /* Hanning */ + 83f48b86: 42050553 fcvt.d.s fa0,fa0 + 83f48b8a: 13457553 fmul.d fa0,fa0,fs4 + 83f48b8e: d45f70ef jal ra,83f408d2 + 83f48b92: 40157553 fcvt.s.d fa0,fa0 + 83f48b96: 4085754b fnmsub.s fa0,fa0,fs0,fs0 + tmp = tmp * tmp; + 83f48b9a: 10a57553 fmul.s fa0,fa0,fa0 + if (inv) + 83f48b9e: b745 j 83f48b3e + 83f48ba0: 8082 ret + +0000000083f48ba2 : + +inline float aes_hypergeom_gain(float vk) +{ + 83f48ba2: 1101 addi sp,sp,-32 + 83f48ba4: a422 fsd fs0,8(sp) + 0.82157f, 1.02017f, 1.20461f, 1.37534f, 1.53363f, 1.68092f, 1.81865f, + 1.94811f, 2.07038f, 2.18638f, 2.29688f, 2.40255f, 2.50391f, 2.60144f, + 2.69551f, 2.78647f, 2.87458f, 2.96015f, 3.04333f, 3.12431f, 3.20326f}; + + x = AES_EXPIN_SCALING*vk; + integer = (float)floor(2*x); + 83f48ba6: 00a57453 fadd.s fs0,fa0,fa0 +{ + 83f48baa: a026 fsd fs1,0(sp) + 83f48bac: 20a504d3 fmv.s fs1,fa0 + 83f48bb0: ec06 sd ra,24(sp) + integer = (float)floor(2*x); + 83f48bb2: 42040553 fcvt.d.s fa0,fs0 + 83f48bb6: dadf70ef jal ra,83f40962 + 83f48bba: 40157553 fcvt.s.d fa0,fa0 + ind = (int)integer; + 83f48bbe: c00517d3 fcvt.w.s a5,fa0,rtz + 83f48bc2: 0007871b sext.w a4,a5 + if (ind<0) + 83f48bc6: 08074863 bltz a4,83f48c56 + return AES_FRAC_SCALING; + if (ind>19) + 83f48bca: 46cd li a3,19 + 83f48bcc: 02e6d763 bge a3,a4,83f48bfa + return (float)(AES_FRAC_SCALING*(1.f+.1296/x)); + 83f48bd0: 420484d3 fcvt.d.s fs1,fs1 + 83f48bd4: 0000a797 auipc a5,0xa + 83f48bd8: 83c7b507 fld fa0,-1988(a5) # 83f52410 <__func__.1+0x218> + 83f48bdc: 00009797 auipc a5,0x9 + 83f48be0: 7347b787 fld fa5,1844(a5) # 83f52310 <__func__.1+0x118> + 83f48be4: 1a957553 fdiv.d fa0,fa0,fs1 + frac = 2*x-integer; + return (float)(AES_FRAC_SCALING*((1.f-frac)*table[ind] + frac*table[ind+1])/sqrt(x+.0001f)); + +} + 83f48be8: 60e2 ld ra,24(sp) + 83f48bea: 2422 fld fs0,8(sp) + 83f48bec: 2482 fld fs1,0(sp) + 83f48bee: 6105 addi sp,sp,32 + return (float)(AES_FRAC_SCALING*(1.f+.1296/x)); + 83f48bf0: 02f57553 fadd.d fa0,fa0,fa5 + 83f48bf4: 40157553 fcvt.s.d fa0,fa0 +} + 83f48bf8: 8082 ret + return (float)(AES_FRAC_SCALING*((1.f-frac)*table[ind] + frac*table[ind+1])/sqrt(x+.0001f)); + 83f48bfa: 2785 addiw a5,a5,1 + frac = 2*x-integer; + 83f48bfc: 08a47553 fsub.s fa0,fs0,fa0 + return (float)(AES_FRAC_SCALING*((1.f-frac)*table[ind] + frac*table[ind+1])/sqrt(x+.0001f)); + 83f48c00: 00009697 auipc a3,0x9 + 83f48c04: 33068693 addi a3,a3,816 # 83f51f30 + 83f48c08: 078a slli a5,a5,0x2 + 83f48c0a: 97b6 add a5,a5,a3 + 83f48c0c: 0007a787 flw fa5,0(a5) + 83f48c10: 00009797 auipc a5,0x9 + 83f48c14: 6407a407 flw fs0,1600(a5) # 83f52250 <__func__.1+0x58> + 83f48c18: 08a47453 fsub.s fs0,fs0,fa0 + 83f48c1c: 10f577d3 fmul.s fa5,fa0,fa5 + 83f48c20: 070a slli a4,a4,0x2 + 83f48c22: 9736 add a4,a4,a3 + 83f48c24: 00009797 auipc a5,0x9 + 83f48c28: 7c47a507 flw fa0,1988(a5) # 83f523e8 <__func__.1+0x1f0> + 83f48c2c: 00a4f553 fadd.s fa0,fs1,fa0 + 83f48c30: 00072707 flw fa4,0(a4) + 83f48c34: 78e47443 fmadd.s fs0,fs0,fa4,fa5 + 83f48c38: 42050553 fcvt.d.s fa0,fa0 + 83f48c3c: 9b6f80ef jal ra,83f40df2 + 83f48c40: 42040453 fcvt.d.s fs0,fs0 +} + 83f48c44: 60e2 ld ra,24(sp) + 83f48c46: 2482 fld fs1,0(sp) + return (float)(AES_FRAC_SCALING*((1.f-frac)*table[ind] + frac*table[ind+1])/sqrt(x+.0001f)); + 83f48c48: 1aa47553 fdiv.d fa0,fs0,fa0 +} + 83f48c4c: 2422 fld fs0,8(sp) + 83f48c4e: 6105 addi sp,sp,32 + return (float)(AES_FRAC_SCALING*((1.f-frac)*table[ind] + frac*table[ind+1])/sqrt(x+.0001f)); + 83f48c50: 40157553 fcvt.s.d fa0,fa0 +} + 83f48c54: 8082 ret + 83f48c56: 60e2 ld ra,24(sp) + 83f48c58: 2422 fld fs0,8(sp) + 83f48c5a: 2482 fld fs1,0(sp) + return AES_FRAC_SCALING; + 83f48c5c: 00009797 auipc a5,0x9 + 83f48c60: 5f47a507 flw fa0,1524(a5) # 83f52250 <__func__.1+0x58> +} + 83f48c64: 6105 addi sp,sp,32 + 83f48c66: 8082 ret + +0000000083f48c68 : + +inline float aes_qcurve(float x) +{ + return 1.f/(1.f+.15f/(AES_SNR_SCALING*x)); + 83f48c68: 00009797 auipc a5,0x9 + 83f48c6c: 6547a787 flw fa5,1620(a5) # 83f522bc <__func__.1+0xc4> + 83f48c70: 18a7f7d3 fdiv.s fa5,fa5,fa0 + 83f48c74: 00009797 auipc a5,0x9 + 83f48c78: 5dc7a707 flw fa4,1500(a5) # 83f52250 <__func__.1+0x58> + 83f48c7c: 00e7f7d3 fadd.s fa5,fa5,fa4 +} + 83f48c80: 18f77553 fdiv.s fa0,fa4,fa5 + 83f48c84: 8082 ret + +0000000083f48c86 : +inline void aes_gain_floor(float effective_echo_suppress, float *echo, float *gain_floor, int len) +{ + int i; + float echo_floor; + + echo_floor = (float)exp(.2302585f * effective_echo_suppress); + 83f48c86: 00009797 auipc a5,0x9 + 83f48c8a: 76a7a787 flw fa5,1898(a5) # 83f523f0 <__func__.1+0x1f8> + 83f48c8e: 10f57553 fmul.s fa0,fa0,fa5 +{ + 83f48c92: 7139 addi sp,sp,-64 + 83f48c94: f04a sd s2,32(sp) + 83f48c96: 8932 mv s2,a2 + 83f48c98: f822 sd s0,48(sp) + echo_floor = (float)exp(.2302585f * effective_echo_suppress); + 83f48c9a: 42050553 fcvt.d.s fa0,fa0 +{ + 83f48c9e: f426 sd s1,40(sp) + 83f48ca0: fc06 sd ra,56(sp) + 83f48ca2: ac22 fsd fs0,24(sp) + 83f48ca4: a826 fsd fs1,16(sp) + 83f48ca6: a44a fsd fs2,8(sp) + 83f48ca8: 842a mv s0,a0 + 83f48caa: 84ae mv s1,a1 + echo_floor = (float)exp(.2302585f * effective_echo_suppress); + 83f48cac: f35f70ef jal ra,83f40be0 + + /* Compute the gain floor for the residual echo */ + for (i=0;i + 83f48cb4: 397d addiw s2,s2,-1 + 83f48cb6: 02091793 slli a5,s2,0x20 + 83f48cba: 401574d3 fcvt.s.d fs1,fa0 + 83f48cbe: 01e7d913 srli s2,a5,0x1e + 83f48cc2: 00440793 addi a5,s0,4 + 83f48cc6: 993e add s2,s2,a5 + 83f48cc8: 00009797 auipc a5,0x9 + 83f48ccc: 5887a907 flw fs2,1416(a5) # 83f52250 <__func__.1+0x58> + gain_floor[i] = AES_FRAC_SCALING * (float)sqrt(echo_floor * echo[i]) / (float)sqrt(1.f + echo[i]); + 83f48cd0: 00042507 flw fa0,0(s0) + for (i=0;i + 83f48ce4: ffc42787 flw fa5,-4(s0) + 83f48ce8: 22a50453 fmv.d fs0,fa0 + 83f48cec: 0127f553 fadd.s fa0,fa5,fs2 + 83f48cf0: 42050553 fcvt.d.s fa0,fa0 + 83f48cf4: 8fef80ef jal ra,83f40df2 + 83f48cf8: 40157553 fcvt.s.d fa0,fa0 + 83f48cfc: 40147453 fcvt.s.d fs0,fs0 + 83f48d00: 18a47453 fdiv.s fs0,fs0,fa0 + 83f48d04: fe84ae27 fsw fs0,-4(s1) + for (i=0;i +} + 83f48d0c: 70e2 ld ra,56(sp) + 83f48d0e: 7442 ld s0,48(sp) + 83f48d10: 74a2 ld s1,40(sp) + 83f48d12: 7902 ld s2,32(sp) + 83f48d14: 2462 fld fs0,24(sp) + 83f48d16: 24c2 fld fs1,16(sp) + 83f48d18: 2922 fld fs2,8(sp) + 83f48d1a: 6121 addi sp,sp,64 + 83f48d1c: 8082 ret + +0000000083f48d1e : + +inline void aes_analysis(NonLinearEchoState *st, short *x) +{ + 83f48d1e: 1101 addi sp,sp,-32 + 83f48d20: e822 sd s0,16(sp) + 83f48d22: ec06 sd ra,24(sp) + 83f48d24: e426 sd s1,8(sp) + 83f48d26: e04a sd s2,0(sp) + int i; + int N = st->ps_size; + 83f48d28: 00452903 lw s2,4(a0) + int N3 = 2*N - st->frame_size; + 83f48d2c: 411c lw a5,0(a0) + float *ps = st->ps; + 83f48d2e: 7904 ld s1,48(a0) + int N3 = 2*N - st->frame_size; + 83f48d30: 0019189b slliw a7,s2,0x1 +{ + 83f48d34: 842a mv s0,a0 + int N3 = 2*N - st->frame_size; + 83f48d36: 40f8853b subw a0,a7,a5 + + /* Build input buffer for windowing */ + for (i=0;iframe_size;i++) { + 83f48d3a: 04f05663 blez a5,83f48d86 + 83f48d3e: 050a slli a0,a0,0x2 + 83f48d40: 4781 li a5,0 + st->frame[i] = st->inbuf[i]; /* take data in previous frame */ + 83f48d42: 6850 ld a2,144(s0) + 83f48d44: 00279693 slli a3,a5,0x2 + 83f48d48: 7018 ld a4,32(s0) + 83f48d4a: 9636 add a2,a2,a3 + 83f48d4c: 00062787 flw fa5,0(a2) + 83f48d50: 9736 add a4,a4,a3 + for (i=0;iframe_size;i++) { + 83f48d52: 0589 addi a1,a1,2 + st->frame[i] = st->inbuf[i]; /* take data in previous frame */ + 83f48d54: 00f72027 fsw fa5,0(a4) + st->frame[N3+i] = x[i]; /* take data in current frame */ + 83f48d58: ffe59803 lh a6,-2(a1) + 83f48d5c: 7018 ld a4,32(s0) + for (i=0;iframe_size;i++) { + 83f48d5e: 0785 addi a5,a5,1 + st->frame[N3+i] = x[i]; /* take data in current frame */ + 83f48d60: d00877d3 fcvt.s.w fa5,a6 + 83f48d64: 972a add a4,a4,a0 + for (i=0;iframe_size;i++) { + 83f48d66: 0007861b sext.w a2,a5 + st->frame[N3+i] = x[i]; /* take data in current frame */ + 83f48d6a: 00f72027 fsw fa5,0(a4) + st->inbuf[i] = x[i]; /* update data in previous frame */ + 83f48d6e: ffe59803 lh a6,-2(a1) + 83f48d72: 6858 ld a4,144(s0) + for (i=0;iframe_size;i++) { + 83f48d74: 0511 addi a0,a0,4 + st->inbuf[i] = x[i]; /* update data in previous frame */ + 83f48d76: d00877d3 fcvt.s.w fa5,a6 + 83f48d7a: 9736 add a4,a4,a3 + 83f48d7c: 00f72027 fsw fa5,0(a4) + for (i=0;iframe_size;i++) { + 83f48d80: 4018 lw a4,0(s0) + 83f48d82: fce640e3 blt a2,a4,83f48d42 + } + + /* Windowing */ + for (i=0;i<2*N;i++) + 83f48d86: 03105463 blez a7,83f48dae + 83f48d8a: 00289613 slli a2,a7,0x2 + 83f48d8e: 4781 li a5,0 + st->frame[i] = st->frame[i] * st->window[i]; + 83f48d90: 7018 ld a4,32(s0) + 83f48d92: 6434 ld a3,72(s0) + 83f48d94: 973e add a4,a4,a5 + 83f48d96: 96be add a3,a3,a5 + 83f48d98: 00072787 flw fa5,0(a4) + 83f48d9c: 0006a707 flw fa4,0(a3) + for (i=0;i<2*N;i++) + 83f48da0: 0791 addi a5,a5,4 + st->frame[i] = st->frame[i] * st->window[i]; + 83f48da2: 10e7f7d3 fmul.s fa5,fa5,fa4 + 83f48da6: 00f72027 fsw fa5,0(a4) + for (i=0;i<2*N;i++) + 83f48daa: fef613e3 bne a2,a5,83f48d90 + + /* Perform FFT */ + speech_fft(st->fft_lookup, st->frame, st->ft); + 83f48dae: 7410 ld a2,40(s0) + 83f48db0: 700c ld a1,32(s0) + 83f48db2: 7448 ld a0,168(s0) + 83f48db4: 2e8000ef jal ra,83f4909c + + /* Power spectrum */ + ps[0] = st->ft[0] * st->ft[0]; /* re^2 */ + 83f48db8: 7418 ld a4,40(s0) + for (i=1;ift[0] * st->ft[0]; /* re^2 */ + 83f48dbc: 00072787 flw fa5,0(a4) + 83f48dc0: 10f7f7d3 fmul.s fa5,fa5,fa5 + 83f48dc4: 00f4a027 fsw fa5,0(s1) + for (i=1;i + 83f48dcc: ffe9061b addiw a2,s2,-2 + 83f48dd0: 02061793 slli a5,a2,0x20 + 83f48dd4: 01d7d613 srli a2,a5,0x1d + 83f48dd8: 00448693 addi a3,s1,4 + 83f48ddc: 0631 addi a2,a2,12 + 83f48dde: 4711 li a4,4 + ps[i] = st->ft[2*i-1] * st->ft[2*i-1] + st->ft[2*i] * st->ft[2*i]; /* re^2 + im^2 */ + 83f48de0: 741c ld a5,40(s0) + for (i=1;ift[2*i-1] * st->ft[2*i-1] + st->ft[2*i] * st->ft[2*i]; /* re^2 + im^2 */ + 83f48de4: 97ba add a5,a5,a4 + 83f48de6: 0047a707 flw fa4,4(a5) + 83f48dea: 0007a787 flw fa5,0(a5) + for (i=1;ift[2*i-1] * st->ft[2*i-1] + st->ft[2*i] * st->ft[2*i]; /* re^2 + im^2 */ + 83f48df0: 10e77753 fmul.s fa4,fa4,fa4 + 83f48df4: 70f7f7c3 fmadd.s fa5,fa5,fa5,fa4 + 83f48df8: fef6ae27 fsw fa5,-4(a3) + for (i=1;i + + filterbank_linear2sb(st->bank, ps, ps+N); + 83f48e00: 6818 ld a4,16(s0) + 83f48e02: 090a slli s2,s2,0x2 + 83f48e04: 9926 add s2,s2,s1 + for (i=0;inb_banks;i++) + 83f48e06: 531c lw a5,32(a4) + 83f48e08: 00f05b63 blez a5,83f48e1e + 83f48e0c: 86ca mv a3,s2 + 83f48e0e: 4781 li a5,0 + mel[i] = 0; + 83f48e10: 0006a023 sw zero,0(a3) + for (i=0;inb_banks;i++) + 83f48e14: 5310 lw a2,32(a4) + 83f48e16: 2785 addiw a5,a5,1 + 83f48e18: 0691 addi a3,a3,4 + 83f48e1a: fec7cbe3 blt a5,a2,83f48e10 + for (i=0;ilen;i++) { + 83f48e1e: 535c lw a5,36(a4) + 83f48e20: 04f05f63 blez a5,83f48e7e + 83f48e24: 8626 mv a2,s1 + 83f48e26: 4581 li a1,0 + id = bank->bank_left[i]; + 83f48e28: 631c ld a5,0(a4) + 83f48e2a: 00259693 slli a3,a1,0x2 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f48e2e: 6b08 ld a0,16(a4) + id = bank->bank_left[i]; + 83f48e30: 97b6 add a5,a5,a3 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f48e32: 439c lw a5,0(a5) + 83f48e34: 9536 add a0,a0,a3 + 83f48e36: 00062687 flw fa3,0(a2) + 83f48e3a: 078a slli a5,a5,0x2 + 83f48e3c: 97ca add a5,a5,s2 + 83f48e3e: 0007a707 flw fa4,0(a5) + 83f48e42: 00052787 flw fa5,0(a0) + for (i=0;ilen;i++) { + 83f48e46: 0611 addi a2,a2,4 + 83f48e48: 0585 addi a1,a1,1 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f48e4a: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + for (i=0;ilen;i++) { + 83f48e4e: 0005881b sext.w a6,a1 + mel[id] += (bank->filter_left[i] * ps[i]); + 83f48e52: 00f7a027 fsw fa5,0(a5) + id = bank->bank_right[i]; + 83f48e56: 671c ld a5,8(a4) + mel[id] += (bank->filter_right[i] * ps[i]); + 83f48e58: 6f08 ld a0,24(a4) + 83f48e5a: ffc62687 flw fa3,-4(a2) + id = bank->bank_right[i]; + 83f48e5e: 97b6 add a5,a5,a3 + mel[id] += (bank->filter_right[i] * ps[i]); + 83f48e60: 439c lw a5,0(a5) + 83f48e62: 96aa add a3,a3,a0 + 83f48e64: 0006a787 flw fa5,0(a3) + 83f48e68: 078a slli a5,a5,0x2 + 83f48e6a: 97ca add a5,a5,s2 + 83f48e6c: 0007a707 flw fa4,0(a5) + 83f48e70: 70d7f7c3 fmadd.s fa5,fa5,fa3,fa4 + 83f48e74: 00f7a027 fsw fa5,0(a5) + for (i=0;ilen;i++) { + 83f48e78: 535c lw a5,36(a4) + 83f48e7a: faf847e3 blt a6,a5,83f48e28 + +} + 83f48e7e: 60e2 ld ra,24(sp) + 83f48e80: 6442 ld s0,16(sp) + 83f48e82: 64a2 ld s1,8(sp) + 83f48e84: 6902 ld s2,0(sp) + 83f48e86: 6105 addi sp,sp,32 + 83f48e88: 8082 ret + +0000000083f48e8a : + {8192,0,8192,0,-16096, 16240} + }; + + /* Notch Filter Parameter */ + para_obj = para; + tmp = MIN(MAX(para_obj->para_notch_freq, 0), 1); /* the notch freq, 0 for 1kHz and 1 for 4kHz */ + 83f48e8a: 01c5d783 lhu a5,28(a1) + 83f48e8e: 0107971b slliw a4,a5,0x10 + 83f48e92: 4107571b sraiw a4,a4,0x10 + 83f48e96: c311 beqz a4,83f48e9a + 83f48e98: 4785 li a5,1 + if (Fs == 8000.0F) + 83f48e9a: 00009717 auipc a4,0x9 + 83f48e9e: 51a72787 flw fa5,1306(a4) # 83f523b4 <__func__.1+0x1bc> + 83f48ea2: 03079713 slli a4,a5,0x30 + 83f48ea6: 9341 srli a4,a4,0x30 + 83f48ea8: a0f526d3 feq.s a3,fa0,fa5 + 83f48eac: 00171793 slli a5,a4,0x1 + 83f48eb0: 97ba add a5,a5,a4 + 83f48eb2: 078a slli a5,a5,0x2 + 83f48eb4: ca81 beqz a3,83f48ec4 + notch_obj->qcoef = &nb_notch_coef[tmp][0]; + 83f48eb6: 0000a717 auipc a4,0xa + 83f48eba: 20a70713 addi a4,a4,522 # 83f530c0 + 83f48ebe: 97ba add a5,a5,a4 + 83f48ec0: e11c sd a5,0(a0) + else + notch_obj->qcoef = &wb_notch_coef[tmp][0]; + +} + 83f48ec2: 8082 ret + notch_obj->qcoef = &wb_notch_coef[tmp][0]; + 83f48ec4: 0000a717 auipc a4,0xa + 83f48ec8: 21470713 addi a4,a4,532 # 83f530d8 + 83f48ecc: 97ba add a5,a5,a4 + 83f48ece: e11c sd a5,0(a0) +} + 83f48ed0: 8082 ret + +0000000083f48ed2 : +void notch_init(qfilter_struct *notch_obj, int *notch_state) +{ + unsigned short i; + + for(i=0; i<4;i++) { + notch_state[i] = 0; + 83f48ed2: 0005a023 sw zero,0(a1) + 83f48ed6: 0005a223 sw zero,4(a1) + 83f48eda: 0005a423 sw zero,8(a1) + 83f48ede: 0005a623 sw zero,12(a1) + } + + notch_obj->nq = 1; + 83f48ee2: 4785 li a5,1 + 83f48ee4: 00f51823 sh a5,16(a0) + notch_obj->pstate = notch_state; + 83f48ee8: e50c sd a1,8(a0) + +} + 83f48eea: 8082 ret + +0000000083f48eec : + + //initialize + acc0 =0; + + ptr1 = pin; + ptr2 = pout; + 83f48eec: 00169793 slli a5,a3,0x1 +{ + 83f48ef0: 7159 addi sp,sp,-112 + 83f48ef2: 97aa add a5,a5,a0 + 83f48ef4: f4a2 sd s0,104(sp) + 83f48ef6: f0a6 sd s1,96(sp) + 83f48ef8: ecca sd s2,88(sp) + 83f48efa: e8ce sd s3,80(sp) + 83f48efc: e4d2 sd s4,72(sp) + 83f48efe: e0d6 sd s5,64(sp) + 83f48f00: fc5a sd s6,56(sp) + 83f48f02: f85e sd s7,48(sp) + 83f48f04: f462 sd s8,40(sp) + 83f48f06: f066 sd s9,32(sp) + 83f48f08: ec6a sd s10,24(sp) + 83f48f0a: e86e sd s11,16(sp) + 83f48f0c: e43e sd a5,8(sp) + + for(i = frame_size; i > 0; i--) { + 83f48f0e: 10d05a63 blez a3,83f49022 + acc0 = (((int)((int)acc0>>16)) * (*pcoef)); + else + acc0 = -(((int)(-(int)acc0>>16)) * (*pcoef)); /* remove zero-inputs-limit-cycle osicillation */ + + //acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, (((int)acc0)<<3)))); + acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, ((acc0)<<3)))); /* Q3.13 */ + 83f48f12: 80000db7 lui s11,0x80000 + acc0 = ((unsigned short)(xn))*(*pcoef++); /* low part */ + 83f48f16: 63c1 lui t2,0x10 + 83f48f18: 8baa mv s7,a0 + 83f48f1a: 8c2e mv s8,a1 + 83f48f1c: 8cb2 mv s9,a2 + 83f48f1e: 4781 li a5,0 + 83f48f20: 13fd addi t2,t2,-1 + acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, ((acc0)<<3)))); /* Q3.13 */ + 83f48f22: fffdcd13 not s10,s11 + xn = (((int) (*ptr1++))<<16); + 83f48f26: 000b9e83 lh t4,0(s7) + for(j = filter->nq; j > 0; j--) { + 83f48f2a: 010cdb03 lhu s6,16(s9) + pcoef = filter->qcoef; + 83f48f2e: 000cba83 ld s5,0(s9) + pst = filter->pstate; + 83f48f32: 008cb703 ld a4,8(s9) + xn = (((int) (*ptr1++))<<16); + 83f48f36: 0b89 addi s7,s7,2 + 83f48f38: 010e9e9b slliw t4,t4,0x10 + for(j = filter->nq; j > 0; j--) { + 83f48f3c: 100b0a63 beqz s6,83f49050 + 83f48f40: 004b1a13 slli s4,s6,0x4 + 83f48f44: 9a3a add s4,s4,a4 + pcoef = filter->qcoef; + 83f48f46: 8356 mv t1,s5 + xn1 = *pst; /* take x(n-1) */ + 83f48f48: 4314 lw a3,0(a4) + acc0 = ((unsigned short)(xn))*(*pcoef++); /* low part */ + 83f48f4a: 00031983 lh s3,0(t1) + *pst++ = xn; /* update x(n-1)*/ + 83f48f4e: 01d72023 sw t4,0(a4) + acc0 += ((unsigned short)(xn1))*(*pcoef++); /* low part */ + 83f48f52: 00231903 lh s2,2(t1) + xn2 = *pst; /* take x(n-2) */ + 83f48f56: 00472803 lw a6,4(a4) + *pst++ = xn1; /* update x(n-2) */ + 83f48f5a: c354 sw a3,4(a4) + acc0 += ((unsigned short)(xn2))*(*pcoef++); /* low part */ + 83f48f5c: 00431483 lh s1,4(t1) + yn1 = *pst++; /* take y(n-1) */ + 83f48f60: 470c lw a1,8(a4) + acc0 += ((unsigned short)(yn1))*(*pcoef++); /* low part */ + 83f48f62: 00631403 lh s0,6(t1) + yn2 = *pst; /* take y(n-2) */ + 83f48f66: 475c lw a5,12(a4) + acc0 = ((unsigned short)(xn))*(*pcoef++); /* low part */ + 83f48f68: 007ef633 and a2,t4,t2 + acc0 += ((unsigned short)(xn1))*(*pcoef++); /* low part */ + 83f48f6c: 0076f2b3 and t0,a3,t2 + coef_tmp5 = *pcoef; /* for high part */ + 83f48f70: 00831503 lh a0,8(t1) + acc0 += ((unsigned short)(xn2))*(*pcoef++); /* low part */ + 83f48f74: 00787fb3 and t6,a6,t2 + acc0 = ((unsigned short)(xn))*(*pcoef++); /* low part */ + 83f48f78: 02c9863b mulw a2,s3,a2 + acc0 += ((unsigned short)(yn1))*(*pcoef++); /* low part */ + 83f48f7c: 0075ff33 and t5,a1,t2 + acc0 += ((unsigned short)(yn2))*(*pcoef++); /* low part */ + 83f48f80: 0077f8b3 and a7,a5,t2 + state_tmp1 = ((short)(xn>>0x10)); /* for high part */ + 83f48f84: 410ede9b sraiw t4,t4,0x10 + state_tmp2 = ((short)(xn1>>0x10)); /* for high part */ + 83f48f88: 4106d69b sraiw a3,a3,0x10 + state_tmp3 = ((short)(xn2>>0x10)); /* for high part */ + 83f48f8c: 4108581b sraiw a6,a6,0x10 + state_tmp4 = ((short)(yn1>>0x10)); /* for high part */ + 83f48f90: 4105de1b sraiw t3,a1,0x10 + state_tmp5 = ((short)(yn2>>0x10)); /* for high part */ + 83f48f94: 4107d79b sraiw a5,a5,0x10 + 83f48f98: 0741 addi a4,a4,16 + *pst++ = yn1; /* update y(n-2) */ + 83f48f9a: feb72e23 sw a1,-4(a4) + acc0 += ((unsigned short)(xn1))*(*pcoef++); /* low part */ + 83f48f9e: 025902bb mulw t0,s2,t0 + 83f48fa2: 0329 addi t1,t1,10 + acc0 += ((unsigned short)(xn2))*(*pcoef++); /* low part */ + 83f48fa4: 03f48fbb mulw t6,s1,t6 + acc0 += ((unsigned short)(xn1))*(*pcoef++); /* low part */ + 83f48fa8: 9616 add a2,a2,t0 + acc0 += ((unsigned short)(yn1))*(*pcoef++); /* low part */ + 83f48faa: 03e40f3b mulw t5,s0,t5 + acc0 += ((unsigned short)(xn2))*(*pcoef++); /* low part */ + 83f48fae: 9fb2 add t6,t6,a2 + acc0 += ((unsigned short)(yn2))*(*pcoef++); /* low part */ + 83f48fb0: 02a888bb mulw a7,a7,a0 + acc0 += ((unsigned short)(yn1))*(*pcoef++); /* low part */ + 83f48fb4: 9f7e add t5,t5,t6 + acc0 += ((short)(state_tmp1))*coef_tmp1; /* high part */ + 83f48fb6: 033e8ebb mulw t4,t4,s3 + acc0 += ((unsigned short)(yn2))*(*pcoef++); /* low part */ + 83f48fba: 98fa add a7,a7,t5 + acc0 >>= 0x10; /* be low part */ + 83f48fbc: 4108d893 srai a7,a7,0x10 + acc0 += ((short)(state_tmp2))*coef_tmp2; /* high part */ + 83f48fc0: 032686bb mulw a3,a3,s2 + acc0 += ((short)(state_tmp1))*coef_tmp1; /* high part */ + 83f48fc4: 9ec6 add t4,t4,a7 + acc0 += ((short)(state_tmp3))*coef_tmp3; /* high part */ + 83f48fc6: 0298083b mulw a6,a6,s1 + acc0 += ((short)(state_tmp2))*coef_tmp2; /* high part */ + 83f48fca: 9eb6 add t4,t4,a3 + acc0 += ((short)(state_tmp4))*coef_tmp4; /* high part */ + 83f48fcc: 028e0e3b mulw t3,t3,s0 + acc0 += ((short)(state_tmp3))*coef_tmp3; /* high part */ + 83f48fd0: 9876 add a6,a6,t4 + acc0 += ((short)(state_tmp5))*coef_tmp5; /* high part */ + 83f48fd2: 02a78ebb mulw t4,a5,a0 + acc0 += ((short)(state_tmp4))*coef_tmp4; /* high part */ + 83f48fd6: 9e42 add t3,t3,a6 + acc0 += ((short)(state_tmp5))*coef_tmp5; /* high part */ + 83f48fd8: 9ef2 add t4,t4,t3 + acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, (((int)acc0)<<2)))); /* Q2.14 */ + 83f48fda: 002e9e9b slliw t4,t4,0x2 + pst[-2] = (int)acc0 ; /* update y(n-1) */ + 83f48fde: ffd72c23 sw t4,-8(a4) + for(j = filter->nq; j > 0; j--) { + 83f48fe2: f74713e3 bne a4,s4,83f48f48 + acc0 += ((unsigned short)(yn2))*(*pcoef++); /* low part */ + 83f48fe6: 002b1793 slli a5,s6,0x2 + 83f48fea: 9b3e add s6,s6,a5 + 83f48fec: 0b06 slli s6,s6,0x1 + 83f48fee: 9ada add s5,s5,s6 + acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, (((int)acc0)<<2)))); /* Q2.14 */ + 83f48ff0: 87f6 mv a5,t4 + acc0 = (((int)((int)acc0>>16)) * (*pcoef)); + 83f48ff2: 000a9703 lh a4,0(s5) + if(acc0>=0) + 83f48ff6: 0407c463 bltz a5,83f4903e + acc0 = (((int)((int)acc0>>16)) * (*pcoef)); + 83f48ffa: 410ed79b sraiw a5,t4,0x10 + 83f48ffe: 02e787bb mulw a5,a5,a4 + acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, ((acc0)<<3)))); /* Q3.13 */ + 83f49002: 078e slli a5,a5,0x3 + 83f49004: 00fd5363 bge s10,a5,83f4900a + 83f49008: 87ea mv a5,s10 + 83f4900a: 01b7d463 bge a5,s11,83f49012 + 83f4900e: 800007b7 lui a5,0x80000 + *ptr2++ = (short)(acc0>>16); + 83f49012: 4107d713 srai a4,a5,0x10 + 83f49016: 00ec1023 sh a4,0(s8) + for(i = frame_size; i > 0; i--) { + 83f4901a: 6722 ld a4,8(sp) + *ptr2++ = (short)(acc0>>16); + 83f4901c: 0c09 addi s8,s8,2 + for(i = frame_size; i > 0; i--) { + 83f4901e: f0eb94e3 bne s7,a4,83f48f26 + + } + +} + 83f49022: 7426 ld s0,104(sp) + 83f49024: 7486 ld s1,96(sp) + 83f49026: 6966 ld s2,88(sp) + 83f49028: 69c6 ld s3,80(sp) + 83f4902a: 6a26 ld s4,72(sp) + 83f4902c: 6a86 ld s5,64(sp) + 83f4902e: 7b62 ld s6,56(sp) + 83f49030: 7bc2 ld s7,48(sp) + 83f49032: 7c22 ld s8,40(sp) + 83f49034: 7c82 ld s9,32(sp) + 83f49036: 6d62 ld s10,24(sp) + 83f49038: 6dc2 ld s11,16(sp) + 83f4903a: 6165 addi sp,sp,112 + 83f4903c: 8082 ret + acc0 = -(((int)(-(int)acc0>>16)) * (*pcoef)); /* remove zero-inputs-limit-cycle osicillation */ + 83f4903e: 41d00ebb negw t4,t4 + 83f49042: 410ed79b sraiw a5,t4,0x10 + 83f49046: 02e787bb mulw a5,a5,a4 + 83f4904a: 40f007bb negw a5,a5 + 83f4904e: bf55 j 83f49002 + acc0 = (((int)((int)acc0>>16)) * (*pcoef)); + 83f49050: 00078e9b sext.w t4,a5 + 83f49054: bf79 j 83f48ff2 + +0000000083f49056 : +#include "fftcore.h" +#include "packfft.h" + +/* Function Definitions */ +void *speech_fft_init(int size) +{ + 83f49056: 1101 addi sp,sp,-32 + 83f49058: e426 sd s1,8(sp) + 83f4905a: 84aa mv s1,a0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4905c: 4561 li a0,24 + 83f4905e: ec06 sd ra,24(sp) + 83f49060: e822 sd s0,16(sp) + 83f49062: 522050ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f49066: 4661 li a2,24 + 83f49068: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4906a: 842a mv s0,a0 + memset(ptr, 0, size); + 83f4906c: 711020ef jal ra,83f4bf7c + struct drft_lookup *table; + table = mem_alloc(sizeof(struct drft_lookup)); + core_drft_init((struct drft_lookup *)table, size); + 83f49070: 8522 mv a0,s0 + 83f49072: 85a6 mv a1,s1 + 83f49074: 375020ef jal ra,83f4bbe8 + return (void*)table; +} + 83f49078: 60e2 ld ra,24(sp) + 83f4907a: 8522 mv a0,s0 + 83f4907c: 6442 ld s0,16(sp) + 83f4907e: 64a2 ld s1,8(sp) + 83f49080: 6105 addi sp,sp,32 + 83f49082: 8082 ret + +0000000083f49084 : + +void speech_fft_free(void *table) +{ + 83f49084: 1141 addi sp,sp,-16 + 83f49086: e022 sd s0,0(sp) + 83f49088: e406 sd ra,8(sp) + 83f4908a: 842a mv s0,a0 + core_drft_clear(table); + 83f4908c: 567020ef jal ra,83f4bdf2 + vPortFree(ptr); + 83f49090: 8522 mv a0,s0 + mem_free(table); +} + 83f49092: 6402 ld s0,0(sp) + 83f49094: 60a2 ld ra,8(sp) + 83f49096: 0141 addi sp,sp,16 + 83f49098: 6520506f j 83f4e6ea + +0000000083f4909c : + +void speech_fft(void *table, float *in, float *out) +{ + if (in==out) { + int i; + float scale = (float)(1./((struct drft_lookup *)table)->n); + 83f4909c: 00052803 lw a6,0(a0) + 83f490a0: 00009797 auipc a5,0x9 + 83f490a4: 2707b707 fld fa4,624(a5) # 83f52310 <__func__.1+0x118> +{ + 83f490a8: 87ae mv a5,a1 + float scale = (float)(1./((struct drft_lookup *)table)->n); + 83f490aa: d20807d3 fcvt.d.w fa5,a6 +{ + 83f490ae: 85b2 mv a1,a2 + float scale = (float)(1./((struct drft_lookup *)table)->n); + 83f490b0: 1af77753 fdiv.d fa4,fa4,fa5 + 83f490b4: 40177753 fcvt.s.d fa4,fa4 + if (in==out) { + 83f490b8: 02c78563 beq a5,a2,83f490e2 + for (i=0;i<((struct drft_lookup *)table)->n;i++) + out[i] = scale*in[i]; + } else { + int i; + float scale = (float)(1./((struct drft_lookup *)table)->n); + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490bc: 03005163 blez a6,83f490de + 83f490c0: 86b2 mv a3,a2 + 83f490c2: 4701 li a4,0 + out[i] = scale*in[i]; + 83f490c4: 0007a787 flw fa5,0(a5) + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490c8: 0691 addi a3,a3,4 + 83f490ca: 2705 addiw a4,a4,1 + out[i] = scale*in[i]; + 83f490cc: 10e7f7d3 fmul.s fa5,fa5,fa4 + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490d0: 0791 addi a5,a5,4 + out[i] = scale*in[i]; + 83f490d2: fef6ae27 fsw fa5,-4(a3) + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490d6: 00052803 lw a6,0(a0) + 83f490da: ff0745e3 blt a4,a6,83f490c4 + } + core_drft_forward((struct drft_lookup *)table, out); + 83f490de: 0070206f j 83f4b8e4 + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490e2: 86b2 mv a3,a2 + 83f490e4: 8732 mv a4,a2 + 83f490e6: 4781 li a5,0 + 83f490e8: ff005be3 blez a6,83f490de + out[i] = scale*in[i]; + 83f490ec: 0006a787 flw fa5,0(a3) + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490f0: 0711 addi a4,a4,4 + 83f490f2: 2785 addiw a5,a5,1 + out[i] = scale*in[i]; + 83f490f4: 10e7f7d3 fmul.s fa5,fa5,fa4 + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490f8: 0691 addi a3,a3,4 + out[i] = scale*in[i]; + 83f490fa: fef72e27 fsw fa5,-4(a4) + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f490fe: 4110 lw a2,0(a0) + 83f49100: fec7c6e3 blt a5,a2,83f490ec + core_drft_forward((struct drft_lookup *)table, out); + 83f49104: 7e00206f j 83f4b8e4 + +0000000083f49108 : +} + +void speech_ifft(void *table, float *in, float *out) +{ + 83f49108: 87ae mv a5,a1 + 83f4910a: 85b2 mv a1,a2 + if (in==out) { + 83f4910c: 02c78263 beq a5,a2,83f49130 + //speech_warning("FFT should not be done in-place"); + } else { + int i; + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f49110: 4118 lw a4,0(a0) + 83f49112: 00e05f63 blez a4,83f49130 + 83f49116: 86b2 mv a3,a2 + 83f49118: 4701 li a4,0 + out[i] = in[i]; + 83f4911a: 0007a787 flw fa5,0(a5) + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f4911e: 2705 addiw a4,a4,1 + 83f49120: 0791 addi a5,a5,4 + out[i] = in[i]; + 83f49122: 00f6a027 fsw fa5,0(a3) + for (i=0;i<((struct drft_lookup *)table)->n;i++) + 83f49126: 00052803 lw a6,0(a0) + 83f4912a: 0691 addi a3,a3,4 + 83f4912c: ff0747e3 blt a4,a6,83f4911a + } + core_drft_backward((struct drft_lookup *)table, out); + 83f49130: 1290206f j 83f4ba58 + +0000000083f49134 : + +/* Function Definitions */ +void c_power(const float a[], float y[], int N) +{ + int k; + for (k = 0; k < N; k++) { + 83f49134: 02c05563 blez a2,83f4915e + 83f49138: fff6079b addiw a5,a2,-1 + 83f4913c: 02079713 slli a4,a5,0x20 + 83f49140: 01e75793 srli a5,a4,0x1e + 83f49144: 00450713 addi a4,a0,4 + 83f49148: 97ba add a5,a5,a4 + y[k] = a[k] * a[k]; + 83f4914a: 00052787 flw fa5,0(a0) + for (k = 0; k < N; k++) { + 83f4914e: 0591 addi a1,a1,4 + 83f49150: 0511 addi a0,a0,4 + y[k] = a[k] * a[k]; + 83f49152: 10f7f7d3 fmul.s fa5,fa5,fa5 + 83f49156: fef5ae27 fsw fa5,-4(a1) + for (k = 0; k < N; k++) { + 83f4915a: fef518e3 bne a0,a5,83f4914a + } +} + 83f4915e: 8082 ret + +0000000083f49160 : + +void d_power(const float a[321], float y[321]) +{ + 83f49160: 1101 addi sp,sp,-32 + 83f49162: e822 sd s0,16(sp) + 83f49164: e426 sd s1,8(sp) + 83f49166: e04a sd s2,0(sp) + 83f49168: ec06 sd ra,24(sp) + 83f4916a: 842a mv s0,a0 + 83f4916c: 84ae mv s1,a1 + 83f4916e: 50450913 addi s2,a0,1284 + int k; + for (k = 0; k < 321; k++) { + y[k] = (float)sqrt(a[k]); + 83f49172: 00042507 flw fa0,0(s0) + for (k = 0; k < 321; k++) { + 83f49176: 0491 addi s1,s1,4 + 83f49178: 0411 addi s0,s0,4 + y[k] = (float)sqrt(a[k]); + 83f4917a: 42050553 fcvt.d.s fa0,fa0 + 83f4917e: c75f70ef jal ra,83f40df2 + 83f49182: 40157553 fcvt.s.d fa0,fa0 + 83f49186: fea4ae27 fsw fa0,-4(s1) + for (k = 0; k < 321; k++) { + 83f4918a: ff2414e3 bne s0,s2,83f49172 + } +} + 83f4918e: 60e2 ld ra,24(sp) + 83f49190: 6442 ld s0,16(sp) + 83f49192: 64a2 ld s1,8(sp) + 83f49194: 6902 ld s2,0(sp) + 83f49196: 6105 addi sp,sp,32 + 83f49198: 8082 ret + +0000000083f4919a : + float temp; + + /* signal power change based VAD */ + /* consider small speech at the biginning, ensure it is not suppressed */ + instant_slope = 0; + for (k = 0; k < 5; k++) { /* subband based */ + 83f4919a: 613c ld a5,64(a0) + temp = st->amp_inst_band[k] / 4.0F; + if ((temp - st->amp_inst_band[5 + k] > 0.0F) || (temp - st->amp_inst_band[10 + k] > 0.0F)) { + 83f4919c: f00006d3 fmv.w.x fa3,zero + instant_slope = 0; + 83f491a0: 4681 li a3,0 + 83f491a2: 01478613 addi a2,a5,20 + 83f491a6: 00009717 auipc a4,0x9 + 83f491aa: 13a72607 flw fa2,314(a4) # 83f522e0 <__func__.1+0xe8> + temp = st->amp_inst_band[k] / 4.0F; + 83f491ae: 0007a787 flw fa5,0(a5) + if ((temp - st->amp_inst_band[5 + k] > 0.0F) || (temp - st->amp_inst_band[10 + k] > 0.0F)) { + 83f491b2: 0147a707 flw fa4,20(a5) + temp = st->amp_inst_band[k] / 4.0F; + 83f491b6: 10c7f7d3 fmul.s fa5,fa5,fa2 + if ((temp - st->amp_inst_band[5 + k] > 0.0F) || (temp - st->amp_inst_band[10 + k] > 0.0F)) { + 83f491ba: 08e7f753 fsub.s fa4,fa5,fa4 + 83f491be: a0e69753 flt.s a4,fa3,fa4 + 83f491c2: cb0d beqz a4,83f491f4 + instant_slope = 1; + 83f491c4: 4685 li a3,1 + for (k = 0; k < 5; k++) { /* subband based */ + 83f491c6: 0791 addi a5,a5,4 + 83f491c8: fef613e3 bne a2,a5,83f491ae + } + } + + if (instant_slope == 0) { + 83f491cc: ee85 bnez a3,83f49204 + temp = st->vad_slope_cnt - 1.0F; + 83f491ce: 06852787 flw fa5,104(a0) + 83f491d2: 00009797 auipc a5,0x9 + 83f491d6: 07e7a687 flw fa3,126(a5) # 83f52250 <__func__.1+0x58> + if (0.0F > temp) { + 83f491da: f0000753 fmv.w.x fa4,zero + temp = st->vad_slope_cnt - 1.0F; + 83f491de: 08d7f7d3 fsub.s fa5,fa5,fa3 + if (0.0F > temp) { + 83f491e2: a0e797d3 flt.s a5,fa5,fa4 + 83f491e6: e3bd bnez a5,83f4924c + temp = 0.0F; + } + + st->vad_slope_cnt = temp; + if (temp == 0.0F) { + 83f491e8: a0e7a7d3 feq.s a5,fa5,fa4 + st->vad_slope_cnt = temp; + 83f491ec: 06f52427 fsw fa5,104(a0) + if (temp == 0.0F) { + 83f491f0: e3a5 bnez a5,83f49250 + st->vad_slope_cnt = 4.0F; + } + } + } + +} + 83f491f2: 8082 ret + if ((temp - st->amp_inst_band[5 + k] > 0.0F) || (temp - st->amp_inst_band[10 + k] > 0.0F)) { + 83f491f4: 0287a707 flw fa4,40(a5) + 83f491f8: 08e7f7d3 fsub.s fa5,fa5,fa4 + 83f491fc: a0f69753 flt.s a4,fa3,fa5 + 83f49200: f371 bnez a4,83f491c4 + 83f49202: b7d1 j 83f491c6 + if (st->Fs == 16000.0F) { + 83f49204: 09c52787 flw fa5,156(a0) + st->vad_slope = 1.0F; + 83f49208: 00009797 auipc a5,0x9 + 83f4920c: 0487a707 flw fa4,72(a5) # 83f52250 <__func__.1+0x58> + if (st->Fs == 16000.0F) { + 83f49210: 00009797 auipc a5,0x9 + 83f49214: 0447a687 flw fa3,68(a5) # 83f52254 <__func__.1+0x5c> + 83f49218: a0d7a7d3 feq.s a5,fa5,fa3 + st->vad_slope = 1.0F; + 83f4921c: 06e52627 fsw fa4,108(a0) + if (st->Fs == 16000.0F) { + 83f49220: cb81 beqz a5,83f49230 + st->vad_slope_cnt = 8.0F; + 83f49222: 00009797 auipc a5,0x9 + 83f49226: 1f67a787 flw fa5,502(a5) # 83f52418 <__func__.1+0x220> + 83f4922a: 06f52427 fsw fa5,104(a0) + 83f4922e: 8082 ret + if (st->Fs == 8000.0F) { + 83f49230: 00009797 auipc a5,0x9 + 83f49234: 1847a707 flw fa4,388(a5) # 83f523b4 <__func__.1+0x1bc> + 83f49238: a0e7a7d3 feq.s a5,fa5,fa4 + 83f4923c: dbdd beqz a5,83f491f2 + st->vad_slope_cnt = 4.0F; + 83f4923e: 00009797 auipc a5,0x9 + 83f49242: 1727a787 flw fa5,370(a5) # 83f523b0 <__func__.1+0x1b8> + 83f49246: 06f52427 fsw fa5,104(a0) +} + 83f4924a: 8082 ret + st->vad_slope_cnt = temp; + 83f4924c: 06052423 sw zero,104(a0) + st->vad_slope = 0.0F; + 83f49250: 06052623 sw zero,108(a0) + 83f49254: 8082 ret + +0000000083f49256 : +float c_sum(const float x[], int N) +{ + float y; + int k; + y = x[0]; + for (k = 0; k < N-1; k++) { + 83f49256: 4785 li a5,1 + y = x[0]; + 83f49258: 00052507 flw fa0,0(a0) + for (k = 0; k < N-1; k++) { + 83f4925c: 02b7d363 bge a5,a1,83f49282 + 83f49260: ffe5879b addiw a5,a1,-2 + 83f49264: 02079713 slli a4,a5,0x20 + 83f49268: 01e75793 srli a5,a4,0x1e + 83f4926c: 00850713 addi a4,a0,8 + 83f49270: 97ba add a5,a5,a4 + 83f49272: 0511 addi a0,a0,4 + y += x[k + 1]; + 83f49274: 00052787 flw fa5,0(a0) + for (k = 0; k < N-1; k++) { + 83f49278: 0511 addi a0,a0,4 + y += x[k + 1]; + 83f4927a: 00f57553 fadd.s fa0,fa0,fa5 + for (k = 0; k < N-1; k++) { + 83f4927e: fef51be3 bne a0,a5,83f49274 + } + + return y; +} + 83f49282: 8082 ret + +0000000083f49284 : + +/* Function Definitions */ +void a_abs(const creal32_T a[321], float y[321], int N) +{ + int k; + for (k = 0; k < N; k++) { + 83f49284: 04c05463 blez a2,83f492cc +{ + 83f49288: 1101 addi sp,sp,-32 + 83f4928a: e04a sd s2,0(sp) + 83f4928c: fff6091b addiw s2,a2,-1 + 83f49290: 02091793 slli a5,s2,0x20 + 83f49294: 01d7d913 srli s2,a5,0x1d + 83f49298: 00850793 addi a5,a0,8 + 83f4929c: e822 sd s0,16(sp) + 83f4929e: e426 sd s1,8(sp) + 83f492a0: ec06 sd ra,24(sp) + 83f492a2: 842a mv s0,a0 + 83f492a4: 84ae mv s1,a1 + 83f492a6: 993e add s2,s2,a5 + y[k] = rt_hypotf(a[k].re, a[k].im); + 83f492a8: 00442587 flw fa1,4(s0) + 83f492ac: 00042507 flw fa0,0(s0) + for (k = 0; k < N; k++) { + 83f492b0: 0491 addi s1,s1,4 + 83f492b2: 0421 addi s0,s0,8 + y[k] = rt_hypotf(a[k].re, a[k].im); + 83f492b4: 39b020ef jal ra,83f4be4e + 83f492b8: fea4ae27 fsw fa0,-4(s1) + for (k = 0; k < N; k++) { + 83f492bc: ff2416e3 bne s0,s2,83f492a8 + } +} + 83f492c0: 60e2 ld ra,24(sp) + 83f492c2: 6442 ld s0,16(sp) + 83f492c4: 64a2 ld s1,8(sp) + 83f492c6: 6902 ld s2,0(sp) + 83f492c8: 6105 addi sp,sp,32 + 83f492ca: 8082 ret + 83f492cc: 8082 ret + +0000000083f492ce : +#include "agc_init.h" +#include "agc.h" + +/* Function Definitions */ +void AGC(short *sin, short *sout, agc_struct *agc_obj, ssp_para_struct *para_obj, boolean_T speech_vad, boolean_T st_vad, int nenr_silence_time, int nenr_silence_cnt, short path) +{ + 83f492ce: 7175 addi sp,sp,-144 + 83f492d0: f86a sd s10,48(sp) + short sig_out; + short sig_err; + int temp32; + int diff; + + if (1 == path) { + 83f492d2: 09011d03 lh s10,144(sp) +{ + 83f492d6: e122 sd s0,128(sp) + 83f492d8: fca6 sd s1,120(sp) + 83f492da: e4de sd s7,72(sp) + 83f492dc: e506 sd ra,136(sp) + 83f492de: f8ca sd s2,112(sp) + 83f492e0: f4ce sd s3,104(sp) + 83f492e2: f0d2 sd s4,96(sp) + 83f492e4: ecd6 sd s5,88(sp) + 83f492e6: e8da sd s6,80(sp) + 83f492e8: e0e2 sd s8,64(sp) + 83f492ea: fc66 sd s9,56(sp) + 83f492ec: f46e sd s11,40(sp) + if (1 == path) { + 83f492ee: 4305 li t1,1 +{ + 83f492f0: e436 sd a3,8(sp) + 83f492f2: 84aa mv s1,a0 + 83f492f4: 842e mv s0,a1 + 83f492f6: 8bb2 mv s7,a2 + if (1 == path) { + 83f492f8: 386d0263 beq s10,t1,83f4967c + } + #endif + } + } + + if (nenr_silence_cnt < nenr_silence_time) { /* be in silence to solve CODEC initial random signal issue and not to perform AGC as well */ + 83f492fc: 0108d663 bge a7,a6,83f49308 + agc_obj->agc_vad1 = false; + 83f49300: 020b8423 sb zero,40(s7) + agc_obj->agc_vad1_cnt = 0; + 83f49304: 020b9523 sh zero,42(s7) + } + + agc_obj->env = envelope(sin, agc_obj->frame_size); /* calculate once every 20ms@NB or 10ms@WB */ + 83f49308: 032b9583 lh a1,50(s7) + 83f4930c: 8526 mv a0,s1 + 83f4930e: 6a4000ef jal ra,83f499b2 + + unit_gain = (1L << (agc_obj->max_gain)); + 83f49312: 000b9703 lh a4,0(s7) + + frame_signal_identify = 0; + if (agc_obj->env > agc_obj->pcb_noise_thrd) + 83f49316: 018b9683 lh a3,24(s7) + unit_gain = (1L << (agc_obj->max_gain)); + 83f4931a: 4305 li t1,1 + frame_signal_identify = 1; /* no matter it is noise or speech signals */ + + for (i = 0; i < agc_obj->frame_size; i++) { + 83f4931c: 032b9783 lh a5,50(s7) + unit_gain = (1L << (agc_obj->max_gain)); + 83f49320: 00e31333 sll t1,t1,a4 + 83f49324: 01031b1b slliw s6,t1,0x10 + agc_obj->env = envelope(sin, agc_obj->frame_size); /* calculate once every 20ms@NB or 10ms@WB */ + 83f49328: e82a sd a0,16(sp) + 83f4932a: 00ab9423 sh a0,8(s7) + if (agc_obj->env > agc_obj->pcb_noise_thrd) + 83f4932e: ec36 sd a3,24(sp) + unit_gain = (1L << (agc_obj->max_gain)); + 83f49330: 410b5b1b sraiw s6,s6,0x10 + for (i = 0; i < agc_obj->frame_size; i++) { + 83f49334: 28f05763 blez a5,83f495c2 + + #if (1) /* smooth output to avoid pop noise when unit gain changed */ + if (agc_obj->smooth_cnt) { + sig_out = ((agc_obj->alpha * agc_obj->sout_hist) >> 15) + ((agc_obj->alpha2 * sig_out) >> 15); + agc_obj->alpha -= 3276; /* each step 1/10 */ + agc_obj ->alpha2 += 3276; /* each step 1/10 */ + 83f49338: 6905 lui s2,0x1 + 83f4933a: ccc9071b addiw a4,s2,-820 + for (i = 0; i < agc_obj->frame_size; i++) { + 83f4933e: 4c81 li s9,0 + agc_obj ->alpha2 += 3276; /* each step 1/10 */ + 83f49340: c23a sw a4,4(sp) + if (agc_obj->unit_gain_change_det == true) { + 83f49342: 01fbc703 lbu a4,31(s7) + sig_in = sin[i]; + 83f49346: 001c9a13 slli s4,s9,0x1 + agc_obj->gain32 = (((int)(agc_obj->gain32 >> 16) * MINUS_halfdB) << 1); /* MINUS_halfdB is Q1.15, so gain32 is Q1.31 */ + 83f4934a: 6c21 lui s8,0x8 + agc_obj->alpha -= 3276; /* each step 1/10 */ + 83f4934c: 79fd lui s3,0xfffff + sig_in = sin[i]; + 83f4934e: 01448933 add s2,s1,s4 + if (agc_obj->unit_gain_change_det == true) { + 83f49352: 4a85 li s5,1 + sig_in = sin[i]; + 83f49354: 00091d83 lh s11,0(s2) # 1000 <_EL1_STACK_SIZE+0x800> + for (i = 0; i < agc_obj->frame_size; i++) { + 83f49358: 87aa mv a5,a0 + agc_obj->gain32 = (((int)(agc_obj->gain32 >> 16) * MINUS_halfdB) << 1); /* MINUS_halfdB is Q1.15, so gain32 is Q1.31 */ + 83f4935a: 8d4c0c1b addiw s8,s8,-1836 + agc_obj->alpha -= 3276; /* each step 1/10 */ + 83f4935e: 3349899b addiw s3,s3,820 + if (agc_obj->unit_gain_change_det == true) { + 83f49362: 15570563 beq a4,s5,83f494ac + tmp16 = agc_obj->gain32 >> 16; /* leave space for gain>1, gain has Q format, unit_gain is 1 */ + 83f49366: 004baf03 lw t5,4(s7) + agc_obj->target_high = (agc_obj->env*unit_gain) >> 15; /* better for keeping speech fidelity */ + 83f4936a: 2781 sext.w a5,a5 + if (1 == path) { + 83f4936c: 1b5d0a63 beq s10,s5,83f49520 + if ( agc_obj->pcb_noise_cnt < agc_obj->pcb_noise_hold_time) { + 83f49370: 01ab9583 lh a1,26(s7) + 83f49374: 01cb9683 lh a3,28(s7) + tmp16 = agc_obj->gain32 >> 16; /* leave space for gain>1, gain has Q format, unit_gain is 1 */ + 83f49378: 410f571b sraiw a4,t5,0x10 + 83f4937c: 410f5e93 srai t4,t5,0x10 + if ( agc_obj->pcb_noise_cnt < agc_obj->pcb_noise_hold_time) { + 83f49380: 04d5d563 bge a1,a3,83f493ca + tmp16 = (agc_obj->env*unit_gain) >> 15; + 83f49384: 02fb053b mulw a0,s6,a5 + if (tmp16 < agc_obj->target_low) + 83f49388: 00ab9583 lh a1,10(s7) + if (tmp16 > agc_obj->target_high) + 83f4938c: 00eb9683 lh a3,14(s7) + sig_err = ((int)agc_obj->env)*((int)tmp16) >> 15; /* use the MSB */ + 83f49390: 02f707bb mulw a5,a4,a5 + tmp16 = (agc_obj->env*unit_gain) >> 15; + 83f49394: 40f5551b sraiw a0,a0,0xf + 83f49398: 0105171b slliw a4,a0,0x10 + 83f4939c: 4107571b sraiw a4,a4,0x10 + if (tmp16 < agc_obj->target_low) + 83f493a0: 00070e9b sext.w t4,a4 + sig_err = ((int)agc_obj->env)*((int)tmp16) >> 15; /* use the MSB */ + 83f493a4: 40f7d51b sraiw a0,a5,0xf + diff = (agc_obj->target_low) - sig_err; + 83f493a8: 0105151b slliw a0,a0,0x10 + 83f493ac: 4105579b sraiw a5,a0,0x10 + 83f493b0: 853e mv a0,a5 + if (tmp16 < agc_obj->target_low) + 83f493b2: 26b75363 bge a4,a1,83f49618 + if (tmp16 > agc_obj->target_high) + 83f493b6: 27d6c363 blt a3,t4,83f4961c + diff = (agc_obj->target_low) - sig_err; + 83f493ba: 40f5853b subw a0,a1,a5 + update_gain(diff, agc_obj); /* update agc_obj->gain32 sample by sample */ + 83f493be: 85de mv a1,s7 + 83f493c0: 648000ef jal ra,83f49a08 + temp32 = ((int)(agc_obj->gain32 >> 16)* (int)(sig_in)) >> agc_obj->unit_gain; + 83f493c4: 006b9e83 lh t4,6(s7) + 83f493c8: 8776 mv a4,t4 + 83f493ca: 03dd87bb mulw a5,s11,t4 + 83f493ce: 002b9683 lh a3,2(s7) + while (ABS(temp32) > 32767L) { /* overflow limiter */ + 83f493d2: 6521 lui a0,0x8 + temp32 = ((int)(agc_obj->gain32 >> 16)* (int)(sig_in)) >> agc_obj->unit_gain; + 83f493d4: 000d859b sext.w a1,s11 + 83f493d8: 40d7d7bb sraw a5,a5,a3 + while (ABS(temp32) > 32767L) { /* overflow limiter */ + 83f493dc: 41f7df1b sraiw t5,a5,0x1f + 83f493e0: 00ff47b3 xor a5,t5,a5 + 83f493e4: 41e787bb subw a5,a5,t5 + 83f493e8: 02a7c863 blt a5,a0,83f49418 + agc_obj->gain32 = (((int)(agc_obj->gain32 >> 16) * MINUS_halfdB) << 1); /* MINUS_halfdB is Q1.15, so gain32 is Q1.31 */ + 83f493ec: 0387073b mulw a4,a4,s8 + 83f493f0: 00171f1b slliw t5,a4,0x1 + temp32 = ((int)(agc_obj->gain32 >> 16)*(int)(sig_in)) >> agc_obj->unit_gain; + 83f493f4: 410f5e9b sraiw t4,t5,0x10 + 83f493f8: 03d587bb mulw a5,a1,t4 + while (ABS(temp32) > 32767L) { /* overflow limiter */ + 83f493fc: 410f571b sraiw a4,t5,0x10 + temp32 = ((int)(agc_obj->gain32 >> 16)*(int)(sig_in)) >> agc_obj->unit_gain; + 83f49400: 40d7d7bb sraw a5,a5,a3 + while (ABS(temp32) > 32767L) { /* overflow limiter */ + 83f49404: 41f7df9b sraiw t6,a5,0x1f + 83f49408: 00ffc7b3 xor a5,t6,a5 + 83f4940c: 41f787bb subw a5,a5,t6 + 83f49410: fca7dee3 bge a5,a0,83f493ec + 83f49414: 01eba223 sw t5,4(s7) + sig_out = sin[i]*(agc_obj->gain32 >> 16) >> agc_obj->unit_gain; + 83f49418: 00091783 lh a5,0(s2) + if (agc_obj->smooth_cnt) { + 83f4941c: 022b9703 lh a4,34(s7) + sig_out = sin[i]*(agc_obj->gain32 >> 16) >> agc_obj->unit_gain; + 83f49420: 03d78ebb mulw t4,a5,t4 + 83f49424: 40ded6bb sraw a3,t4,a3 + 83f49428: 0106969b slliw a3,a3,0x10 + 83f4942c: 4106d69b sraiw a3,a3,0x10 + if (agc_obj->smooth_cnt) { + 83f49430: cf1d beqz a4,83f4946e + sig_out = ((agc_obj->alpha * agc_obj->sout_hist) >> 15) + ((agc_obj->alpha2 * sig_out) >> 15); + 83f49432: 026b9583 lh a1,38(s7) + 83f49436: 024b9883 lh a7,36(s7) + 83f4943a: 020b9783 lh a5,32(s7) + 83f4943e: 02d5853b mulw a0,a1,a3 + agc_obj ->alpha2 += 3276; /* each step 1/10 */ + 83f49442: 4692 lw a3,4(sp) + agc_obj->alpha -= 3276; /* each step 1/10 */ + 83f49444: 01198ebb addw t4,s3,a7 + agc_obj->smooth_cnt--; + 83f49448: 377d addiw a4,a4,-1 + agc_obj ->alpha2 += 3276; /* each step 1/10 */ + 83f4944a: 9db5 addw a1,a1,a3 + agc_obj->alpha -= 3276; /* each step 1/10 */ + 83f4944c: 03db9223 sh t4,36(s7) + agc_obj ->alpha2 += 3276; /* each step 1/10 */ + 83f49450: 02bb9323 sh a1,38(s7) + agc_obj->smooth_cnt--; + 83f49454: 02eb9123 sh a4,34(s7) + sig_out = ((agc_obj->alpha * agc_obj->sout_hist) >> 15) + ((agc_obj->alpha2 * sig_out) >> 15); + 83f49458: 031786bb mulw a3,a5,a7 + 83f4945c: 40f5579b sraiw a5,a0,0xf + 83f49460: 40f6d69b sraiw a3,a3,0xf + 83f49464: 9ebd addw a3,a3,a5 + 83f49466: 0106969b slliw a3,a3,0x10 + 83f4946a: 4106d69b sraiw a3,a3,0x10 + } + #endif + + sout[i] = sig_out; + 83f4946e: 01440633 add a2,s0,s4 + 83f49472: 00d61023 sh a3,0(a2) + + /* modify for release processing, automaticly drop 6dB on max gain if big signal come in */ + if (agc_obj->unit_gain_change == true) { + 83f49476: 01ebc783 lbu a5,30(s7) + 83f4947a: 11578963 beq a5,s5,83f4958c + if (ABS(sig_in) > (short)(0.223*32768)) { + agc_obj->unit_gain_change = false; + agc_obj->unit_gain_change_det = true; + } + } + agc_obj->sout_hist = sig_out; /* update y(n-1) */ + 83f4947e: 2c85 addiw s9,s9,1 + for (i = 0; i < agc_obj->frame_size; i++) { + 83f49480: 032b9783 lh a5,50(s7) + 83f49484: 010c9c9b slliw s9,s9,0x10 + agc_obj->sout_hist = sig_out; /* update y(n-1) */ + 83f49488: 02db9023 sh a3,32(s7) + for (i = 0; i < agc_obj->frame_size; i++) { + 83f4948c: 410cdc9b sraiw s9,s9,0x10 + 83f49490: 12fcd963 bge s9,a5,83f495c2 + if (agc_obj->unit_gain_change_det == true) { + 83f49494: 01fbc703 lbu a4,31(s7) + sig_in = sin[i]; + 83f49498: 001c9a13 slli s4,s9,0x1 + 83f4949c: 01448933 add s2,s1,s4 + if (ABS(agc_obj->env) < (short)(0.0316*32768)) { + 83f494a0: 008b9783 lh a5,8(s7) + sig_in = sin[i]; + 83f494a4: 00091d83 lh s11,0(s2) + if (agc_obj->unit_gain_change_det == true) { + 83f494a8: eb571fe3 bne a4,s5,83f49366 + if (ABS(agc_obj->env) < (short)(0.0316*32768)) { + 83f494ac: 40f7d69b sraiw a3,a5,0xf + 83f494b0: 00d7c733 xor a4,a5,a3 + 83f494b4: 9f15 subw a4,a4,a3 + 83f494b6: 1742 slli a4,a4,0x30 + 83f494b8: 9341 srli a4,a4,0x30 + 83f494ba: 40a00693 li a3,1034 + 83f494be: eae6e4e3 bltu a3,a4,83f49366 + agc_obj->max_gain++; /* drop 6dB to max gain */ + 83f494c2: 000bd703 lhu a4,0(s7) + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + 83f494c6: 00cb9683 lh a3,12(s7) + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + 83f494ca: 010b9583 lh a1,16(s7) + agc_obj->max_gain++; /* drop 6dB to max gain */ + 83f494ce: 2705 addiw a4,a4,1 + 83f494d0: 0107171b slliw a4,a4,0x10 + 83f494d4: 4107571b sraiw a4,a4,0x10 + unit_gain = (1L << (agc_obj->max_gain)); + 83f494d8: 00ea9533 sll a0,s5,a4 + 83f494dc: 01051b1b slliw s6,a0,0x10 + 83f494e0: 410b5b1b sraiw s6,s6,0x10 + agc_obj->max_gain++; /* drop 6dB to max gain */ + 83f494e4: 00eb9023 sh a4,0(s7) + agc_obj->unit_gain = agc_obj->max_gain; + 83f494e8: 00eb9123 sh a4,2(s7) + agc_obj->smooth_cnt = 10; + 83f494ec: 4729 li a4,10 + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + 83f494ee: 036585bb mulw a1,a1,s6 + agc_obj->smooth_cnt = 10; + 83f494f2: 02eb9123 sh a4,34(s7) + agc_obj->gain32 = unit_gain << 16; + 83f494f6: 0105151b slliw a0,a0,0x10 + 83f494fa: 00aba223 sw a0,4(s7) + agc_obj->unit_gain_change_det = false; + 83f494fe: 000b8fa3 sb zero,31(s7) + agc_obj->gain32 = unit_gain << 16; + 83f49502: 010b1f13 slli t5,s6,0x10 + agc_obj->target_high = (agc_obj->env*unit_gain) >> 15; /* better for keeping speech fidelity */ + 83f49506: 2781 sext.w a5,a5 + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + 83f49508: 0366873b mulw a4,a3,s6 + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + 83f4950c: 40f5d69b sraiw a3,a1,0xf + 83f49510: 00db9723 sh a3,14(s7) + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + 83f49514: 40f7571b sraiw a4,a4,0xf + 83f49518: 00eb9523 sh a4,10(s7) + if (1 == path) { + 83f4951c: e55d1ae3 bne s10,s5,83f49370 + if (para_obj->para_agc_vad_ena == true) { + 83f49520: 6722 ld a4,8(sp) + 83f49522: 01a74703 lbu a4,26(a4) + 83f49526: e5a715e3 bne a4,s10,83f49370 + if ((agc_obj->agc_vad1 == true) && (agc_obj->agc_vad2 == true)) { + 83f4952a: 028bc683 lbu a3,40(s7) + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + 83f4952e: 000b071b sext.w a4,s6 + if ((agc_obj->agc_vad1 == true) && (agc_obj->agc_vad2 == true)) { + 83f49532: 17a68b63 beq a3,s10,83f496a8 + agc_obj->target_high = (agc_obj->env*unit_gain) >> 15; /* better for keeping speech fidelity */ + 83f49536: 02e786bb mulw a3,a5,a4 + if ( agc_obj->pcb_noise_cnt < agc_obj->pcb_noise_hold_time) { + 83f4953a: 01cb9503 lh a0,28(s7) + 83f4953e: 01ab9583 lh a1,26(s7) + agc_obj->agc_vad3 = false; + 83f49542: 020b8823 sb zero,48(s7) + tmp16 = agc_obj->gain32 >> 16; /* leave space for gain>1, gain has Q format, unit_gain is 1 */ + 83f49546: 410f571b sraiw a4,t5,0x10 + 83f4954a: 410f5e93 srai t4,t5,0x10 + agc_obj->target_high = (agc_obj->env*unit_gain) >> 15; /* better for keeping speech fidelity */ + 83f4954e: 40f6d69b sraiw a3,a3,0xf + 83f49552: 0106969b slliw a3,a3,0x10 + 83f49556: 4106d69b sraiw a3,a3,0x10 + 83f4955a: 00db9723 sh a3,14(s7) + agc_obj->target_low = (agc_obj->env*unit_gain) >> 15; /* better for keeping speech fidelity */ + 83f4955e: 00db9523 sh a3,10(s7) + if ( agc_obj->pcb_noise_cnt < agc_obj->pcb_noise_hold_time) { + 83f49562: e6a5d4e3 bge a1,a0,83f493ca + tmp16 = (agc_obj->env*unit_gain) >> 15; + 83f49566: 02fb06bb mulw a3,s6,a5 + sig_err = ((int)agc_obj->env)*((int)tmp16) >> 15; /* use the MSB */ + 83f4956a: 02f707bb mulw a5,a4,a5 + tmp16 = (agc_obj->env*unit_gain) >> 15; + 83f4956e: 40f6d71b sraiw a4,a3,0xf + 83f49572: 0107171b slliw a4,a4,0x10 + 83f49576: 4107571b sraiw a4,a4,0x10 + sig_err = ((int)agc_obj->env)*((int)tmp16) >> 15; /* use the MSB */ + 83f4957a: 40f7d79b sraiw a5,a5,0xf + diff = (agc_obj->target_low) - sig_err; + 83f4957e: 0107979b slliw a5,a5,0x10 + 83f49582: 4107d79b sraiw a5,a5,0x10 + diff = tmp16 - sig_err; + 83f49586: 40f7053b subw a0,a4,a5 + 83f4958a: bd15 j 83f493be + if (ABS(sig_in) > (short)(0.223*32768)) { + 83f4958c: 40fdd71b sraiw a4,s11,0xf + 83f49590: 00edc7b3 xor a5,s11,a4 + 83f49594: 9f99 subw a5,a5,a4 + 83f49596: 17c2 slli a5,a5,0x30 + 83f49598: 6709 lui a4,0x2 + 83f4959a: 93c1 srli a5,a5,0x30 + 83f4959c: c8b70713 addi a4,a4,-885 # 1c8b <_EL1_STACK_SIZE+0x148b> + 83f495a0: ecf77fe3 bgeu a4,a5,83f4947e + agc_obj->unit_gain_change = false; + 83f495a4: 10000793 li a5,256 + 83f495a8: 00fb9f23 sh a5,30(s7) + agc_obj->sout_hist = sig_out; /* update y(n-1) */ + 83f495ac: 2c85 addiw s9,s9,1 + for (i = 0; i < agc_obj->frame_size; i++) { + 83f495ae: 032b9783 lh a5,50(s7) + 83f495b2: 010c9c9b slliw s9,s9,0x10 + agc_obj->sout_hist = sig_out; /* update y(n-1) */ + 83f495b6: 02db9023 sh a3,32(s7) + for (i = 0; i < agc_obj->frame_size; i++) { + 83f495ba: 410cdc9b sraiw s9,s9,0x10 + 83f495be: ecfccbe3 blt s9,a5,83f49494 + + } + + #if (1) + if (frame_signal_identify == 0) { + 83f495c2: 44c2 lw s1,16(sp) + 83f495c4: 67e2 ld a5,24(sp) + agc_obj->pcb_noise_cnt++; + agc_obj->pcb_noise_cnt = MIN(agc_obj->pcb_noise_hold_time, agc_obj->pcb_noise_cnt); + 83f495c6: 01cb9703 lh a4,28(s7) + if (frame_signal_identify == 0) { + 83f495ca: 0497cc63 blt a5,s1,83f49622 + agc_obj->pcb_noise_cnt++; + 83f495ce: 01abd783 lhu a5,26(s7) + agc_obj->pcb_noise_cnt = MIN(agc_obj->pcb_noise_hold_time, agc_obj->pcb_noise_cnt); + 83f495d2: 0007069b sext.w a3,a4 + agc_obj->pcb_noise_cnt++; + 83f495d6: 2785 addiw a5,a5,1 + agc_obj->pcb_noise_cnt = MIN(agc_obj->pcb_noise_hold_time, agc_obj->pcb_noise_cnt); + 83f495d8: 0107961b slliw a2,a5,0x10 + 83f495dc: 4106561b sraiw a2,a2,0x10 + 83f495e0: 0cc74263 blt a4,a2,83f496a4 + 83f495e4: 0107979b slliw a5,a5,0x10 + 83f495e8: 4107d79b sraiw a5,a5,0x10 + 83f495ec: 00fb9d23 sh a5,26(s7) + } + else + agc_obj->pcb_noise_cnt = 0; + + if ( agc_obj->pcb_noise_cnt == agc_obj->pcb_noise_hold_time) { + 83f495f0: 04d78063 beq a5,a3,83f49630 + if ((agc_obj->gain32 >> 16) < unit_gain) + agc_obj->gain32 = unit_gain << 16; + } + #endif + + if (1 == path) { + 83f495f4: 4785 li a5,1 + 83f495f6: 06fd0963 beq s10,a5,83f49668 + if (para_obj->para_agc_vad_ena == true) { + agc_obj->agc_vad_hist = agc_obj->agc_vad3; + } + } + +} + 83f495fa: 60aa ld ra,136(sp) + 83f495fc: 640a ld s0,128(sp) + 83f495fe: 74e6 ld s1,120(sp) + 83f49600: 7946 ld s2,112(sp) + 83f49602: 79a6 ld s3,104(sp) + 83f49604: 7a06 ld s4,96(sp) + 83f49606: 6ae6 ld s5,88(sp) + 83f49608: 6b46 ld s6,80(sp) + 83f4960a: 6ba6 ld s7,72(sp) + 83f4960c: 6c06 ld s8,64(sp) + 83f4960e: 7ce2 ld s9,56(sp) + 83f49610: 7d42 ld s10,48(sp) + 83f49612: 7da2 ld s11,40(sp) + 83f49614: 6149 addi sp,sp,144 + 83f49616: 8082 ret + if (tmp16 > agc_obj->target_high) + 83f49618: f7d6d7e3 bge a3,t4,83f49586 + diff = (agc_obj->target_high) - sig_err; + 83f4961c: 40a6853b subw a0,a3,a0 + if (tmp16 >= agc_obj->target_low && tmp16 <= agc_obj->target_high) + 83f49620: bb79 j 83f493be + agc_obj->pcb_noise_cnt = 0; + 83f49622: 4781 li a5,0 + 83f49624: 0007069b sext.w a3,a4 + 83f49628: 00fb9d23 sh a5,26(s7) + if ( agc_obj->pcb_noise_cnt == agc_obj->pcb_noise_hold_time) { + 83f4962c: fcd794e3 bne a5,a3,83f495f4 + tmp16 = (agc_obj->gain32 >> 16) >> 7; + 83f49630: 004ba783 lw a5,4(s7) + 83f49634: 4177d713 srai a4,a5,0x17 + tmp16 = MAX(tmp16, 1); + 83f49638: 86ba mv a3,a4 + tmp16 = (agc_obj->gain32 >> 16) - tmp16; + 83f4963a: 4107d79b sraiw a5,a5,0x10 + tmp16 = MAX(tmp16, 1); + 83f4963e: 00e04363 bgtz a4,83f49644 + 83f49642: 4685 li a3,1 + tmp16 = (agc_obj->gain32 >> 16) - tmp16; + 83f49644: 9f95 subw a5,a5,a3 + agc_obj->gain32 = ((long)tmp16) << 16; /* cut down gain32 */ + 83f49646: 0107979b slliw a5,a5,0x10 + 83f4964a: 4107d79b sraiw a5,a5,0x10 + 83f4964e: 01079693 slli a3,a5,0x10 + if ((agc_obj->gain32 >> 16) < unit_gain) + 83f49652: 000b071b sext.w a4,s6 + 83f49656: 0967d063 bge a5,s6,83f496d6 + agc_obj->gain32 = unit_gain << 16; + 83f4965a: 0107171b slliw a4,a4,0x10 + 83f4965e: 00eba223 sw a4,4(s7) + if (1 == path) { + 83f49662: 4785 li a5,1 + 83f49664: f8fd1be3 bne s10,a5,83f495fa + if (para_obj->para_agc_vad_ena == true) { + 83f49668: 67a2 ld a5,8(sp) + 83f4966a: 01a7c783 lbu a5,26(a5) + 83f4966e: f9a796e3 bne a5,s10,83f495fa + agc_obj->agc_vad_hist = agc_obj->agc_vad3; + 83f49672: 030bc783 lbu a5,48(s7) + 83f49676: 02fb88a3 sb a5,49(s7) +} + 83f4967a: b741 j 83f495fa + if (para_obj->para_agc_vad_ena == true) { + 83f4967c: 01a6c683 lbu a3,26(a3) + 83f49680: c7a69ee3 bne a3,s10,83f492fc + if (speech_vad == false) { + 83f49684: ef21 bnez a4,83f496dc + agc_obj->agc_vad1_cnt = MAX(0, agc_obj->agc_vad1_cnt - 1); + 83f49686: 02a61703 lh a4,42(a2) + 83f4968a: 06ed5863 bge s10,a4,83f496fa + 83f4968e: 377d addiw a4,a4,-1 + 83f49690: 02e61523 sh a4,42(a2) + if (st_vad == false) { + 83f49694: e3c1 bnez a5,83f49714 + agc_obj->agc_vad2 = true; + 83f49696: 4785 li a5,1 + 83f49698: 02fb8623 sb a5,44(s7) + agc_obj->agc_vad2_cnt = 3; + 83f4969c: 478d li a5,3 + 83f4969e: 02fb9723 sh a5,46(s7) + 83f496a2: b9a9 j 83f492fc + agc_obj->pcb_noise_cnt = MIN(agc_obj->pcb_noise_hold_time, agc_obj->pcb_noise_cnt); + 83f496a4: 87ba mv a5,a4 + 83f496a6: bf3d j 83f495e4 + if ((agc_obj->agc_vad1 == true) && (agc_obj->agc_vad2 == true)) { + 83f496a8: 02cbc683 lbu a3,44(s7) + 83f496ac: e95695e3 bne a3,s5,83f49536 + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + 83f496b0: 00cb9683 lh a3,12(s7) + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + 83f496b4: 010b9583 lh a1,16(s7) + agc_obj->agc_vad3 = true; + 83f496b8: 03ab8823 sb s10,48(s7) + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + 83f496bc: 02e585bb mulw a1,a1,a4 + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + 83f496c0: 02e6873b mulw a4,a3,a4 + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + 83f496c4: 40f5d69b sraiw a3,a1,0xf + 83f496c8: 00db9723 sh a3,14(s7) + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + 83f496cc: 40f7571b sraiw a4,a4,0xf + 83f496d0: 00eb9523 sh a4,10(s7) + agc_obj->agc_vad3 = true; + 83f496d4: b971 j 83f49370 + agc_obj->gain32 = ((long)tmp16) << 16; /* cut down gain32 */ + 83f496d6: 00dba223 sw a3,4(s7) + 83f496da: bf29 j 83f495f4 + if (agc_obj->Fs == 16000) + 83f496dc: 03461683 lh a3,52(a2) + 83f496e0: 6711 lui a4,0x4 + agc_obj->agc_vad1 = true; + 83f496e2: 03a60423 sb s10,40(a2) + if (agc_obj->Fs == 16000) + 83f496e6: e8070713 addi a4,a4,-384 # 3e80 <_EL1_STACK_SIZE+0x3680> + 83f496ea: 00e68d63 beq a3,a4,83f49704 + agc_obj->agc_vad1_cnt = para_obj->para_agc_vad_cnt; /* keep it longer than speech vad in order to have better speech fidelity at the end of speech segment */ + 83f496ee: 6722 ld a4,8(sp) + 83f496f0: 02075703 lhu a4,32(a4) + 83f496f4: 02e61523 sh a4,42(a2) + 83f496f8: bf71 j 83f49694 + agc_obj->agc_vad1_cnt = MAX(0, agc_obj->agc_vad1_cnt - 1); + 83f496fa: 02061523 sh zero,42(a2) + agc_obj->agc_vad1 = false; + 83f496fe: 02060423 sb zero,40(a2) + 83f49702: bf49 j 83f49694 + agc_obj->agc_vad1_cnt = para_obj->para_agc_vad_cnt * 2; /* keep it longer than speech vad in order to have better speech fidelity at the end of speech segment */ + 83f49704: 6722 ld a4,8(sp) + 83f49706: 02075703 lhu a4,32(a4) + 83f4970a: 0017171b slliw a4,a4,0x1 + 83f4970e: 02e61523 sh a4,42(a2) + 83f49712: b749 j 83f49694 + agc_obj->agc_vad2_cnt = MAX(0, agc_obj->agc_vad2_cnt - 1); + 83f49714: 02eb9783 lh a5,46(s7) + 83f49718: 4705 li a4,1 + 83f4971a: 00f75663 bge a4,a5,83f49726 + 83f4971e: 37fd addiw a5,a5,-1 + 83f49720: 02fb9723 sh a5,46(s7) + if (!agc_obj->agc_vad2_cnt) + 83f49724: bee1 j 83f492fc + agc_obj->agc_vad2_cnt = MAX(0, agc_obj->agc_vad2_cnt - 1); + 83f49726: 020b9723 sh zero,46(s7) + agc_obj->agc_vad2 = false; + 83f4972a: 020b8623 sb zero,44(s7) + 83f4972e: b6f9 j 83f492fc + +0000000083f49730 : + agc_obj = agc; + agc_obj->Fs = (short)Fs; + agc_obj->frame_size = (short)frame_size; + agc_obj->env = 0L; + + agc_obj->fixed_step_size = 1 << 10; + 83f49730: 40000713 li a4,1024 + agc_obj->Fs = (short)Fs; + 83f49734: c00517d3 fcvt.w.s a5,fa0,rtz + agc_obj->fixed_step_size = 1 << 10; + 83f49738: 00e51923 sh a4,18(a0) # 8012 <_EL1_STACK_SIZE+0x7812> + agc_obj->stepsize_release = agc_obj->fixed_step_size; + 83f4973c: 20000737 lui a4,0x20000 + 83f49740: 40070713 addi a4,a4,1024 # 20000400 + agc_obj->Fs = (short)Fs; + 83f49744: 0107979b slliw a5,a5,0x10 + agc_obj->stepsize_release = agc_obj->fixed_step_size; + 83f49748: c958 sw a4,20(a0) + agc_obj->stepsize_attack = MAX( agc_obj->fixed_step_size, (1 << 13)); + + agc_obj->pcb_noise_thrd = 38; + 83f4974a: 02600713 li a4,38 + agc_obj->Fs = (short)Fs; + 83f4974e: 4107d79b sraiw a5,a5,0x10 + agc_obj->pcb_noise_thrd = 38; + 83f49752: 00e51c23 sh a4,24(a0) + if (agc_obj->Fs == 16000) /* WB */ + 83f49756: 6711 lui a4,0x4 + agc_obj->frame_size = (short)frame_size; + 83f49758: 02c51923 sh a2,50(a0) + agc_obj->Fs = (short)Fs; + 83f4975c: 02f51a23 sh a5,52(a0) + agc_obj->env = 0L; + 83f49760: 00051423 sh zero,8(a0) + if (agc_obj->Fs == 16000) /* WB */ + 83f49764: e8070713 addi a4,a4,-384 # 3e80 <_EL1_STACK_SIZE+0x3680> + agc_obj->pcb_noise_hold_time = 50*(3+1); /* unit is frame */ + 83f49768: 0c800613 li a2,200 + if (agc_obj->Fs == 16000) /* WB */ + 83f4976c: 00e78463 beq a5,a4,83f49774 + else /* NB */ + agc_obj->pcb_noise_hold_time = 25*(3+1); /* unit is frame */ + 83f49770: 06400613 li a2,100 + 83f49774: 00c51e23 sh a2,28(a0) + agc_obj->pcb_noise_cnt = 0; + 83f49778: 00051d23 sh zero,26(a0) + + if (1 == path) { + 83f4977c: 4785 li a5,1 + 83f4977e: 02f68863 beq a3,a5,83f497ae + agc_obj->unit_gain_change = para_obj->para_agc_cut6_ena; /* allow to drop unit gain 6dB and only for one time, controlled here!!! */ + if (!para_obj->para_agc_max_gain) + agc_obj->unit_gain_change = false; + 83f49782: 00050f23 sb zero,30(a0) + } + + agc_obj->unit_gain_change_det = false; + agc_obj->sout_hist = 0; + agc_obj->smooth_cnt = 0; + agc_obj->alpha = (short)((float)(9.0F/10.0F) * 32767); /* coef for Lagrange Interpolation */ + 83f49786: 0ccd77b7 lui a5,0xccd7 + 83f4978a: 33278793 addi a5,a5,818 # ccd7332 + agc_obj->unit_gain_change_det = false; + 83f4978e: 00050fa3 sb zero,31(a0) + agc_obj->sout_hist = 0; + 83f49792: 02052023 sw zero,32(a0) + agc_obj->alpha = (short)((float)(9.0F/10.0F) * 32767); /* coef for Lagrange Interpolation */ + 83f49796: d15c sw a5,36(a0) + agc_obj->alpha2 = 32767 - agc_obj->alpha; + + agc_obj->agc_vad1 = false; + 83f49798: 02050423 sb zero,40(a0) + agc_obj->agc_vad1_cnt = 0; + 83f4979c: 02051523 sh zero,42(a0) + agc_obj->agc_vad2 = false; + 83f497a0: 02050623 sb zero,44(a0) + agc_obj->agc_vad2_cnt = 0; + 83f497a4: 02051723 sh zero,46(a0) + agc_obj->agc_vad_hist = false; + 83f497a8: 020508a3 sb zero,49(a0) + +} + 83f497ac: 8082 ret + agc_obj->unit_gain_change = para_obj->para_agc_cut6_ena; /* allow to drop unit gain 6dB and only for one time, controlled here!!! */ + 83f497ae: 0225c783 lbu a5,34(a1) + 83f497b2: 00f50f23 sb a5,30(a0) + if (!para_obj->para_agc_max_gain) + 83f497b6: 0145d783 lhu a5,20(a1) + 83f497ba: f7f1 bnez a5,83f49786 + 83f497bc: b7d9 j 83f49782 + +0000000083f497be : + +void AGC_para(agc_struct *agc, ssp_para_struct *para, short path) +{ + 83f497be: 1101 addi sp,sp,-32 + 83f497c0: e822 sd s0,16(sp) + 83f497c2: e426 sd s1,8(sp) + 83f497c4: ec06 sd ra,24(sp) + + /* restrict parameter range */ + para_obj = para; + agc_obj = agc; + + if (1 == path) { + 83f497c6: 4785 li a5,1 +{ + 83f497c8: 84aa mv s1,a0 + 83f497ca: 842e mv s0,a1 + if (1 == path) { + 83f497cc: 10f60763 beq a2,a5,83f498da + agc_obj->target_low = db_to_linear(para_obj->para_agc_target_low); + } else { + para_obj->para_spk_agc_cut6_ena = 0; + para_obj->para_spk_agc_vad_ena = 0; + para_obj->para_spk_agc_vad_cnt = 7; + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f497d0: 0265d783 lhu a5,38(a1) + para_obj->para_spk_agc_vad_cnt = 7; + 83f497d4: 471d li a4,7 + 83f497d6: 04e59723 sh a4,78(a1) + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f497da: 03079693 slli a3,a5,0x30 + para_obj->para_spk_agc_cut6_ena = 0; + 83f497de: 04058823 sb zero,80(a1) + para_obj->para_spk_agc_vad_ena = 0; + 83f497e2: 04058623 sb zero,76(a1) + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f497e6: 92c1 srli a3,a3,0x30 + 83f497e8: 4719 li a4,6 + 83f497ea: 0cd76963 bltu a4,a3,83f498bc + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f497ee: 02845703 lhu a4,40(s0) + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f497f2: 02f41323 sh a5,38(s0) + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f497f6: 02400693 li a3,36 + 83f497fa: 03071613 slli a2,a4,0x30 + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f497fe: 17c2 slli a5,a5,0x30 + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f49800: 9241 srli a2,a2,0x30 + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f49802: 93c1 srli a5,a5,0x30 + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f49804: 08c6ee63 bltu a3,a2,83f498a0 + para_obj->para_spk_agc_target_low = MIN(MAX(para_obj->para_spk_agc_target_low, 0), 72); + 83f49808: 02a45683 lhu a3,42(s0) + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f4980c: 02e41423 sh a4,40(s0) + para_obj->para_spk_agc_target_low = MIN(MAX(para_obj->para_spk_agc_target_low, 0), 72); + 83f49810: 04800713 li a4,72 + 83f49814: 03069613 slli a2,a3,0x30 + 83f49818: 9241 srli a2,a2,0x30 + 83f4981a: 08c76063 bltu a4,a2,83f4989a + agc_obj->max_gain = agc_gain_table[para_obj->para_spk_agc_max_gain]; + 83f4981e: 00008717 auipc a4,0x8 + 83f49822: 76a70713 addi a4,a4,1898 # 83f51f88 + 83f49826: 0786 slli a5,a5,0x1 + 83f49828: 97ba add a5,a5,a4 + 83f4982a: 0007d783 lhu a5,0(a5) + para_obj->para_spk_agc_target_low = MIN(MAX(para_obj->para_spk_agc_target_low, 0), 72); + 83f4982e: 02d41523 sh a3,42(s0) + agc_obj->max_gain = agc_gain_table[para_obj->para_spk_agc_max_gain]; + 83f49832: 00f49023 sh a5,0(s1) + agc_obj->target_high = db_to_linear(para_obj->para_spk_agc_target_high); + 83f49836: 02841503 lh a0,40(s0) + 83f4983a: 32e000ef jal ra,83f49b68 + 83f4983e: 00a49723 sh a0,14(s1) + agc_obj->target_low = db_to_linear(para_obj->para_spk_agc_target_low); + 83f49842: 02a41503 lh a0,42(s0) + 83f49846: 322000ef jal ra,83f49b68 + } + + unit_gain = (1L << (agc_obj->max_gain)); /* if max is Q3.13, i.e 2^13=8192 */ + 83f4984a: 00049703 lh a4,0(s1) + agc_obj->unit_gain = agc_obj->max_gain; + agc_obj->gain32 = unit_gain << 16; /* start from unit gain */ + + agc_obj->target_high_Q15 = agc_obj->target_high; /* target high in Q1.15 format */ + 83f4984e: 00e49783 lh a5,14(s1) + unit_gain = (1L << (agc_obj->max_gain)); /* if max is Q3.13, i.e 2^13=8192 */ + 83f49852: 66c1 lui a3,0x10 + agc_obj->gain32 = unit_gain << 16; /* start from unit gain */ + 83f49854: 00e696b3 sll a3,a3,a4 + agc_obj->unit_gain = agc_obj->max_gain; + 83f49858: 00e49123 sh a4,2(s1) + agc_obj->gain32 = unit_gain << 16; /* start from unit gain */ + 83f4985c: c0d4 sw a3,4(s1) + agc_obj->target_high_Q15 = agc_obj->target_high; /* target high in Q1.15 format */ + 83f4985e: 00f49823 sh a5,16(s1) + + agc_obj->target_low = MIN(agc_obj->target_low, agc_obj->target_high); + 83f49862: 0005069b sext.w a3,a0 + unit_gain = (1L << (agc_obj->max_gain)); /* if max is Q3.13, i.e 2^13=8192 */ + 83f49866: 2701 sext.w a4,a4 + agc_obj->target_low = MIN(agc_obj->target_low, agc_obj->target_high); + 83f49868: 863e mv a2,a5 + 83f4986a: 00f6d363 bge a3,a5,83f49870 + 83f4986e: 862a mv a2,a0 + 83f49870: 0106169b slliw a3,a2,0x10 + 83f49874: 4106d69b sraiw a3,a3,0x10 + agc_obj->target_low_Q15 = agc_obj->target_low; /* target low in Q1.15 format */ + + agc_obj->target_high = (short)((agc_obj->target_high*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + 83f49878: 00e797b3 sll a5,a5,a4 + agc_obj->target_low = (short)((agc_obj->target_low*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + 83f4987c: 00e69733 sll a4,a3,a4 + agc_obj->target_high = (short)((agc_obj->target_high*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + 83f49880: 87bd srai a5,a5,0xf + agc_obj->target_low = (short)((agc_obj->target_low*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + 83f49882: 873d srai a4,a4,0xf + agc_obj->target_low_Q15 = agc_obj->target_low; /* target low in Q1.15 format */ + 83f49884: 00c49623 sh a2,12(s1) + agc_obj->target_high = (short)((agc_obj->target_high*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + 83f49888: 00f49723 sh a5,14(s1) + agc_obj->target_low = (short)((agc_obj->target_low*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + 83f4988c: 00e49523 sh a4,10(s1) + +} + 83f49890: 60e2 ld ra,24(sp) + 83f49892: 6442 ld s0,16(sp) + 83f49894: 64a2 ld s1,8(sp) + 83f49896: 6105 addi sp,sp,32 + 83f49898: 8082 ret + para_obj->para_spk_agc_target_low = MIN(MAX(para_obj->para_spk_agc_target_low, 0), 72); + 83f4989a: 04800693 li a3,72 + 83f4989e: b741 j 83f4981e + 83f498a0: 02a45683 lhu a3,42(s0) + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f498a4: 02400713 li a4,36 + 83f498a8: 02e41423 sh a4,40(s0) + para_obj->para_spk_agc_target_low = MIN(MAX(para_obj->para_spk_agc_target_low, 0), 72); + 83f498ac: 03069613 slli a2,a3,0x30 + 83f498b0: 04800713 li a4,72 + 83f498b4: 9241 srli a2,a2,0x30 + 83f498b6: f6c774e3 bgeu a4,a2,83f4981e + 83f498ba: b7c5 j 83f4989a + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f498bc: 02845703 lhu a4,40(s0) + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f498c0: 4799 li a5,6 + 83f498c2: 02f41323 sh a5,38(s0) + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f498c6: 03071613 slli a2,a4,0x30 + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f498ca: 17c2 slli a5,a5,0x30 + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f498cc: 02400693 li a3,36 + 83f498d0: 9241 srli a2,a2,0x30 + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + 83f498d2: 93c1 srli a5,a5,0x30 + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + 83f498d4: f2c6fae3 bgeu a3,a2,83f49808 + 83f498d8: b7e1 j 83f498a0 + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f498da: 0145d783 lhu a5,20(a1) + para_obj->para_agc_vad_cnt = 7; + 83f498de: 471d li a4,7 + 83f498e0: 02e59023 sh a4,32(a1) + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f498e4: 03079693 slli a3,a5,0x30 + para_obj->para_agc_cut6_ena = 1; + 83f498e8: 02c58123 sb a2,34(a1) + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f498ec: 92c1 srli a3,a3,0x30 + 83f498ee: 4719 li a4,6 + 83f498f0: 0ad76263 bltu a4,a3,83f49994 + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f498f4: 01645683 lhu a3,22(s0) + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f498f8: 00f41a23 sh a5,20(s0) + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f498fc: 02400713 li a4,36 + 83f49900: 03069613 slli a2,a3,0x30 + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f49904: 17c2 slli a5,a5,0x30 + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f49906: 9241 srli a2,a2,0x30 + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f49908: 93c1 srli a5,a5,0x30 + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f4990a: 06c76763 bltu a4,a2,83f49978 + para_obj->para_agc_target_low = MIN(MAX(para_obj->para_agc_target_low, 0), 72); + 83f4990e: 01845703 lhu a4,24(s0) + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f49912: 00d41b23 sh a3,22(s0) + para_obj->para_agc_target_low = MIN(MAX(para_obj->para_agc_target_low, 0), 72); + 83f49916: 04800693 li a3,72 + 83f4991a: 03071613 slli a2,a4,0x30 + 83f4991e: 9241 srli a2,a2,0x30 + 83f49920: 04c6e263 bltu a3,a2,83f49964 + para_obj->para_agc_vad_ena = MIN(MAX(para_obj->para_agc_vad_ena, 0), 1); + 83f49924: 01a44683 lbu a3,26(s0) + para_obj->para_agc_target_low = MIN(MAX(para_obj->para_agc_target_low, 0), 72); + 83f49928: 00e41c23 sh a4,24(s0) + para_obj->para_agc_vad_ena = MIN(MAX(para_obj->para_agc_vad_ena, 0), 1); + 83f4992c: 0ff6f713 andi a4,a3,255 + 83f49930: eb05 bnez a4,83f49960 + agc_obj->max_gain = agc_gain_table[para_obj->para_agc_max_gain]; + 83f49932: 00008717 auipc a4,0x8 + 83f49936: 65670713 addi a4,a4,1622 # 83f51f88 + 83f4993a: 0786 slli a5,a5,0x1 + 83f4993c: 97ba add a5,a5,a4 + 83f4993e: 0007d783 lhu a5,0(a5) + para_obj->para_agc_vad_ena = MIN(MAX(para_obj->para_agc_vad_ena, 0), 1); + 83f49942: 00d40d23 sb a3,26(s0) + agc_obj->max_gain = agc_gain_table[para_obj->para_agc_max_gain]; + 83f49946: 00f49023 sh a5,0(s1) + agc_obj->target_high = db_to_linear(para_obj->para_agc_target_high); + 83f4994a: 01641503 lh a0,22(s0) + 83f4994e: 21a000ef jal ra,83f49b68 + 83f49952: 00a49723 sh a0,14(s1) + agc_obj->target_low = db_to_linear(para_obj->para_agc_target_low); + 83f49956: 01841503 lh a0,24(s0) + 83f4995a: 20e000ef jal ra,83f49b68 + 83f4995e: b5f5 j 83f4984a + para_obj->para_agc_vad_ena = MIN(MAX(para_obj->para_agc_vad_ena, 0), 1); + 83f49960: 4685 li a3,1 + 83f49962: bfc1 j 83f49932 + 83f49964: 01a44683 lbu a3,26(s0) + para_obj->para_agc_target_low = MIN(MAX(para_obj->para_agc_target_low, 0), 72); + 83f49968: 04800713 li a4,72 + 83f4996c: 00e41c23 sh a4,24(s0) + para_obj->para_agc_vad_ena = MIN(MAX(para_obj->para_agc_vad_ena, 0), 1); + 83f49970: 0ff6f713 andi a4,a3,255 + 83f49974: df5d beqz a4,83f49932 + 83f49976: b7ed j 83f49960 + para_obj->para_agc_target_low = MIN(MAX(para_obj->para_agc_target_low, 0), 72); + 83f49978: 01845703 lhu a4,24(s0) + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f4997c: 02400693 li a3,36 + 83f49980: 00d41b23 sh a3,22(s0) + para_obj->para_agc_target_low = MIN(MAX(para_obj->para_agc_target_low, 0), 72); + 83f49984: 03071613 slli a2,a4,0x30 + 83f49988: 04800693 li a3,72 + 83f4998c: 9241 srli a2,a2,0x30 + 83f4998e: f8c6fbe3 bgeu a3,a2,83f49924 + 83f49992: bfc9 j 83f49964 + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f49994: 01645683 lhu a3,22(s0) + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f49998: 4799 li a5,6 + 83f4999a: 00f41a23 sh a5,20(s0) + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f4999e: 03069613 slli a2,a3,0x30 + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f499a2: 17c2 slli a5,a5,0x30 + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f499a4: 02400713 li a4,36 + 83f499a8: 9241 srli a2,a2,0x30 + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + 83f499aa: 93c1 srli a5,a5,0x30 + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + 83f499ac: f6c771e3 bgeu a4,a2,83f4990e + 83f499b0: b7e1 j 83f49978 + +0000000083f499b2 : +#include "define.h" +#include "agc_subfun.h" + +/* Function Definitions */ +short envelope(short* sin, short frame_size) /* Envelope detector based on frame */ +{ + 83f499b2: 86aa mv a3,a0 + short *ptr_sin; + //int y1, y2; + + ptr_sin = sin; + temp_max = 0x4; /* keep a minimal DC here */ + for (i = 0; i < frame_size; i++) { + 83f499b4: 04b05863 blez a1,83f49a04 + 83f499b8: 0586 slli a1,a1,0x1 + temp = *ptr_sin++; + if (temp == (short)0x8000) + temp = (short)0x8001; + temp = ABS(temp); + 83f499ba: 7861 lui a6,0xffff8 + 83f499bc: 00b50633 add a2,a0,a1 + 83f499c0: 2805 addiw a6,a6,1 + temp_max = 0x4; /* keep a minimal DC here */ + 83f499c2: 4511 li a0,4 + temp = ABS(temp); + 83f499c4: 75e1 lui a1,0xffff8 + temp = *ptr_sin++; + 83f499c6: 00069703 lh a4,0(a3) # 10000 <_EL1_STACK_SIZE+0xf800> + 83f499ca: 0689 addi a3,a3,2 + temp = ABS(temp); + 83f499cc: 87ba mv a5,a4 + 83f499ce: 00e5c363 blt a1,a4,83f499d4 + 83f499d2: 87c2 mv a5,a6 + 83f499d4: 0107971b slliw a4,a5,0x10 + 83f499d8: 4107571b sraiw a4,a4,0x10 + 83f499dc: 40f7571b sraiw a4,a4,0xf + 83f499e0: 8fb9 xor a5,a5,a4 + 83f499e2: 9f99 subw a5,a5,a4 + 83f499e4: 17c2 slli a5,a5,0x30 + 83f499e6: 93c1 srli a5,a5,0x30 + if (temp > temp_max) + 83f499e8: 0107971b slliw a4,a5,0x10 + 83f499ec: 4107571b sraiw a4,a4,0x10 + 83f499f0: 00a75363 bge a4,a0,83f499f6 + 83f499f4: 87aa mv a5,a0 + 83f499f6: 0107951b slliw a0,a5,0x10 + 83f499fa: 4105551b sraiw a0,a0,0x10 + for (i = 0; i < frame_size; i++) { + 83f499fe: fcd614e3 bne a2,a3,83f499c6 + 83f49a02: 8082 ret + temp_max = 0x4; /* keep a minimal DC here */ + 83f49a04: 4511 li a0,4 + y = (y1 + y2) >> 16; + #endif + + return y; + +} + 83f49a06: 8082 ret + +0000000083f49a08 : +{ + int delta32; + int gain32; + short step_size; + + if (diff > 32767) + 83f49a08: 67a1 lui a5,0x8 + 83f49a0a: 00f55963 bge a0,a5,83f49a1c + diff = 32767; + else if (diff < -32768) + 83f49a0e: 77e1 lui a5,0xffff8 + 83f49a10: 02f55863 bge a0,a5,83f49a40 + diff = -32768; + + if (diff > 0) /* attack time and release time constants should be separated here!!! */ + step_size = agc_obj->stepsize_release; /* usually gain slowly increase, so release time constant here slowly */ + else + step_size = agc_obj->stepsize_attack; /* usually gain quickly decrease, so attack time constant here quickly */ + 83f49a14: 01659783 lh a5,22(a1) # ffffffffffff8016 <_end+0xffffffff7bff82d6> + diff = -32768; + 83f49a18: 7561 lui a0,0xffff8 + step_size = agc_obj->stepsize_attack; /* usually gain quickly decrease, so attack time constant here quickly */ + 83f49a1a: a029 j 83f49a24 + diff = 32767; + 83f49a1c: fff78513 addi a0,a5,-1 # ffffffffffff7fff <_end+0xffffffff7bff82bf> + step_size = agc_obj->stepsize_release; /* usually gain slowly increase, so release time constant here slowly */ + 83f49a20: 01459783 lh a5,20(a1) + + delta32 = ((int)(step_size) * (int)(diff)) << 1; + 83f49a24: 02a787bb mulw a5,a5,a0 + gain32 = agc_obj->gain32 + delta32; + 83f49a28: 41d4 lw a3,4(a1) + + //if(gain32 <0) + // printf(""); + if (((unsigned int)gain32) > 32767*65536) /* saturation restriction */ + 83f49a2a: 7fff0737 lui a4,0x7fff0 + delta32 = ((int)(step_size) * (int)(diff)) << 1; + 83f49a2e: 0017979b slliw a5,a5,0x1 + gain32 = agc_obj->gain32 + delta32; + 83f49a32: 9fb5 addw a5,a5,a3 + if (((unsigned int)gain32) > 32767*65536) /* saturation restriction */ + 83f49a34: 00f77463 bgeu a4,a5,83f49a3c + gain32 = 32767*65536; /* 0x7FFF0000 */ + 83f49a38: 7fff07b7 lui a5,0x7fff0 + + agc_obj->gain32 = gain32; + 83f49a3c: c1dc sw a5,4(a1) + + } + 83f49a3e: 8082 ret + if (diff > 0) /* attack time and release time constants should be separated here!!! */ + 83f49a40: fea040e3 bgtz a0,83f49a20 + step_size = agc_obj->stepsize_attack; /* usually gain quickly decrease, so attack time constant here quickly */ + 83f49a44: 01659783 lh a5,22(a1) + 83f49a48: bff1 j 83f49a24 + +0000000083f49a4a : + double tmp2_d; + boolean_T short_iteration; + int i, m; + float tmp1; + + if (v == 0.0F) { + 83f49a4a: f0000753 fmv.w.x fa4,zero +{ + 83f49a4e: 862e mv a2,a1 + if (v == 0.0F) { + 83f49a50: a0e527d3 feq.s a5,fa0,fa4 + 83f49a54: 10079163 bnez a5,83f49b56 + bessel_f_ptr0 = &bessel_v0_f[0]; + bessel_d_ptr0 = &bessel_v0_d[0]; + } else { + bessel_f_ptr0 = &bessel_v1_f[0]; + bessel_d_ptr0 = &bessel_v1_d[0]; + 83f49a58: 00009e17 auipc t3,0x9 + 83f49a5c: 6f8e0e13 addi t3,t3,1784 # 83f53150 + bessel_f_ptr0 = &bessel_v1_f[0]; + 83f49a60: 00009817 auipc a6,0x9 + 83f49a64: 71880813 addi a6,a6,1816 # 83f53178 + bessel_f_ptr++; + } + + if (short_iteration == true) { + /* bessel(i,1) = ((x/2)^v)*acc0 */ + if (v == 0.0F) { + 83f49a68: f0000753 fmv.w.x fa4,zero + 83f49a6c: 85aa mv a1,a0 + 83f49a6e: 50460893 addi a7,a2,1284 + 83f49a72: a0e52353 feq.s t1,fa0,fa4 + 83f49a76: 03480693 addi a3,a6,52 + 83f49a7a: 00008797 auipc a5,0x8 + 83f49a7e: 7d67a187 flw ft3,2006(a5) # 83f52250 <__func__.1+0x58> + 83f49a82: 00009797 auipc a5,0x9 + 83f49a86: 99e7b587 fld fa1,-1634(a5) # 83f52420 <__func__.1+0x228> + bessel[i] = acc0_f; + } else { + bessel[i] = x[i] / 2.0F * acc0_f; + 83f49a8a: 00008797 auipc a5,0x8 + 83f49a8e: 7e67a207 flw ft4,2022(a5) # 83f52270 <__func__.1+0x78> + 83f49a92: 028e0513 addi a0,t3,40 + 83f49a96: 00009797 auipc a5,0x9 + 83f49a9a: 9927b107 fld ft2,-1646(a5) # 83f52428 <__func__.1+0x230> + tmp1 = x[i] * x[i]; + 83f49a9e: 0005a507 flw fa0,0(a1) + tmp2_f = 1.0F; + 83f49aa2: 20318753 fmv.s fa4,ft3 + acc0_f = 1.0F; /* result for m = 0 */ + 83f49aa6: 203186d3 fmv.s fa3,ft3 + tmp1 = x[i] * x[i]; + 83f49aaa: 10a57653 fmul.s fa2,fa0,fa0 + bessel_f_ptr = bessel_f_ptr0; + 83f49aae: 87c2 mv a5,a6 + if ((double)(tmp2_f*tmp1) > 3.4E+38) /* positive for sure */ + 83f49ab0: 10c77753 fmul.s fa4,fa4,fa2 + 83f49ab4: 420707d3 fcvt.d.s fa5,fa4 + 83f49ab8: a2f59753 flt.d a4,fa1,fa5 + 83f49abc: c709 beqz a4,83f49ac6 + tmp2_f = (float)3.4E+38; + 83f49abe: 00009717 auipc a4,0x9 + 83f49ac2: 95e72707 flw fa4,-1698(a4) # 83f5241c <__func__.1+0x224> + acc0_f = acc0_f + tmp2_f / (*bessel_f_ptr); + 83f49ac6: 0007a787 flw fa5,0(a5) + bessel_f_ptr++; + 83f49aca: 0791 addi a5,a5,4 + acc0_f = acc0_f + tmp2_f / (*bessel_f_ptr); + 83f49acc: 18f777d3 fdiv.s fa5,fa4,fa5 + 83f49ad0: 00d7f7d3 fadd.s fa5,fa5,fa3 + if (acc0_f == acc1_f) { + 83f49ad4: a0d7a753 feq.s a4,fa5,fa3 + acc0_f = acc0_f + tmp2_f / (*bessel_f_ptr); + 83f49ad8: 20f786d3 fmv.s fa3,fa5 + if (acc0_f == acc1_f) { + 83f49adc: e32d bnez a4,83f49b3e + for (m = 0; m < 13; m++) { + 83f49ade: fcd799e3 bne a5,a3,83f49ab0 + } + goto bessel_end; + } + + tmp2_d = (double)tmp2_f; + 83f49ae2: 42070753 fcvt.d.s fa4,fa4 + acc0_d = (double)acc0_f; + 83f49ae6: 420787d3 fcvt.d.s fa5,fa5 + acc1_d = acc0_d; + bessel_d_ptr = bessel_d_ptr0; + + for (m = 0; m < 5; m++) { + tmp2_d *= tmp1; /* positive for sure */ + 83f49aea: 42060653 fcvt.d.s fa2,fa2 + bessel_d_ptr = bessel_d_ptr0; + 83f49aee: 87f2 mv a5,t3 + tmp2_d *= tmp1; /* positive for sure */ + 83f49af0: 12c77753 fmul.d fa4,fa4,fa2 + if (tmp2_d > 1.7E+200) /* 1.7E+308 */ + 83f49af4: a2e11753 flt.d a4,ft2,fa4 + 83f49af8: ef21 bnez a4,83f49b50 + break; + acc0_d = acc0_d + tmp2_d / (*bessel_d_ptr); + 83f49afa: 2394 fld fa3,0(a5) + if ((float)(acc0_d) == (float)(acc1_d)) + 83f49afc: 4017f053 fcvt.s.d ft0,fa5 + break; + acc1_d = acc0_d; + bessel_d_ptr++; + 83f49b00: 07a1 addi a5,a5,8 + acc0_d = acc0_d + tmp2_d / (*bessel_d_ptr); + 83f49b02: 1ad776d3 fdiv.d fa3,fa4,fa3 + 83f49b06: 02f6f6d3 fadd.d fa3,fa3,fa5 + if ((float)(acc0_d) == (float)(acc1_d)) + 83f49b0a: 4016f0d3 fcvt.s.d ft1,fa3 + acc0_d = acc0_d + tmp2_d / (*bessel_d_ptr); + 83f49b0e: 22d687d3 fmv.d fa5,fa3 + if ((float)(acc0_d) == (float)(acc1_d)) + 83f49b12: a000a753 feq.s a4,ft1,ft0 + 83f49b16: e319 bnez a4,83f49b1c + for (m = 0; m < 5; m++) { + 83f49b18: fca79ce3 bne a5,a0,83f49af0 + } + + /* bessel(i,1) = ((x/2)^v)*acc0 */ + if (v == 0.0F) { + 83f49b1c: 00031863 bnez t1,83f49b2c + bessel[i] = (float)(acc0_d); + } else { + bessel[i] = (float)(x[i] / 2.0F * acc0_d); + 83f49b20: 10457553 fmul.s fa0,fa0,ft4 + 83f49b24: 42050553 fcvt.d.s fa0,fa0 + 83f49b28: 12d576d3 fmul.d fa3,fa0,fa3 + 83f49b2c: 4016f6d3 fcvt.s.d fa3,fa3 + 83f49b30: 00d62027 fsw fa3,0(a2) + for (i = 0; i < 321; i++) { /* input vector length */ + 83f49b34: 0611 addi a2,a2,4 + 83f49b36: 0591 addi a1,a1,4 + 83f49b38: f71613e3 bne a2,a7,83f49a9e + 83f49b3c: 8082 ret + if (v == 0.0F) { + 83f49b3e: 00031663 bnez t1,83f49b4a + bessel[i] = x[i] / 2.0F * acc0_f; + 83f49b42: 10457553 fmul.s fa0,fa0,ft4 + 83f49b46: 10f577d3 fmul.s fa5,fa0,fa5 + 83f49b4a: 00f62027 fsw fa5,0(a2) + 83f49b4e: b7dd j 83f49b34 + 83f49b50: 22f786d3 fmv.d fa3,fa5 + 83f49b54: b7e1 j 83f49b1c + bessel_d_ptr0 = &bessel_v0_d[0]; + 83f49b56: 00009e17 auipc t3,0x9 + 83f49b5a: 59ae0e13 addi t3,t3,1434 # 83f530f0 + bessel_f_ptr0 = &bessel_v0_f[0]; + 83f49b5e: 00009817 auipc a6,0x9 + 83f49b62: 5ba80813 addi a6,a6,1466 # 83f53118 + 83f49b66: b709 j 83f49a68 + +0000000083f49b68 : +{ + short i; + short tmp16; + + tmp16 = 0x7fff; + db_num = MAX(0,db_num); + 83f49b68: fff54713 not a4,a0 + 83f49b6c: 977d srai a4,a4,0x3f + 83f49b6e: 8f69 and a4,a4,a0 + for (i = 0; i < db_num; i++) + 83f49b70: 02a05863 blez a0,83f49ba0 + tmp16 = 0x7fff; + 83f49b74: 6521 lui a0,0x8 + tmp16 = (short)(((long)tmp16 * (long)29204) >> 15); + 83f49b76: 669d lui a3,0x7 + tmp16 = 0x7fff; + 83f49b78: 157d addi a0,a0,-1 + for (i = 0; i < db_num; i++) + 83f49b7a: 4781 li a5,0 + 83f49b7c: 2701 sext.w a4,a4 + tmp16 = (short)(((long)tmp16 * (long)29204) >> 15); + 83f49b7e: 21468693 addi a3,a3,532 # 7214 <_EL1_STACK_SIZE+0x6a14> + 83f49b82: 02d50533 mul a0,a0,a3 + 83f49b86: 2785 addiw a5,a5,1 + 83f49b88: 0107979b slliw a5,a5,0x10 + 83f49b8c: 4107d79b sraiw a5,a5,0x10 + 83f49b90: 853d srai a0,a0,0xf + 83f49b92: 0105151b slliw a0,a0,0x10 + 83f49b96: 4105551b sraiw a0,a0,0x10 + for (i = 0; i < db_num; i++) + 83f49b9a: fee7c4e3 blt a5,a4,83f49b82 + 83f49b9e: 8082 ret + tmp16 = 0x7fff; + 83f49ba0: 6521 lui a0,0x8 + 83f49ba2: 157d addi a0,a0,-1 + return tmp16; + +} + 83f49ba4: 8082 ret + +0000000083f49ba6 : + int k; + float alpha; + + /* DR based VAD is good at low and high SNRs, but not good for tone */ + /* alike signals and also sensitive to DC setup */ + DR_bin_cnt = 0.0F; + 83f49ba6: f0000153 fmv.w.x ft2,zero + for (k = 0; k < 5; k++) { + if (st->amp_inst_band[k] - st->noisy_st_trough[k] > 0.0F) { + 83f49baa: 6538 ld a4,72(a0) + 83f49bac: 4781 li a5,0 + 83f49bae: 202105d3 fmv.s fa1,ft2 + 83f49bb2: 00009697 auipc a3,0x9 + 83f49bb6: 8926a807 flw fa6,-1902(a3) # 83f52444 <__func__.1+0x24c> + 83f49bba: 00009697 auipc a3,0x9 + 83f49bbe: 8926a387 flw ft7,-1902(a3) # 83f5244c <__func__.1+0x254> + 83f49bc2: 00009697 auipc a3,0x9 + 83f49bc6: 86e6a307 flw ft6,-1938(a3) # 83f52430 <__func__.1+0x238> + alpha = 0.98F; + 83f49bca: 00009697 auipc a3,0x9 + 83f49bce: 86a6a287 flw ft5,-1942(a3) # 83f52434 <__func__.1+0x23c> + if (st->amp_inst_band[k] - st->noisy_st_trough[k] > 0.0F) { + 83f49bd2: 00008697 auipc a3,0x8 + 83f49bd6: 69e6a887 flw fa7,1694(a3) # 83f52270 <__func__.1+0x78> + 83f49bda: 00009697 auipc a3,0x9 + 83f49bde: 85e6a207 flw ft4,-1954(a3) # 83f52438 <__func__.1+0x240> + alpha = 0.5F; + } + + st->noisy_st_trough[k] = alpha * st->noisy_st_trough[k] + (1.0F - alpha) * st->amp_inst_band[k]; + if (st->amp_inst_band[k] - st->noisy_st_peak[k] > 0.0F) { + alpha = 0.9F; + 83f49be2: 00008697 auipc a3,0x8 + 83f49be6: 69e6a187 flw ft3,1694(a3) # 83f52280 <__func__.1+0x88> + if (st->amp_inst_band[k] - st->noisy_st_peak[k] > 0.0F) { + 83f49bea: 00009697 auipc a3,0x9 + 83f49bee: 8526af87 flw ft11,-1966(a3) # 83f5243c <__func__.1+0x244> + } else { + alpha = 0.93F; + 83f49bf2: 00009697 auipc a3,0x9 + 83f49bf6: 84e6af07 flw ft10,-1970(a3) # 83f52440 <__func__.1+0x248> + + st->noisy_st_peak[k] = alpha * st->noisy_st_peak[k] + (1.0F - alpha) * st->amp_inst_band[k]; + + /* to make sure noisy_st_peak cannot go up too much, now maximal 24 dB range */ + if (st->noisy_st_peak[k] / 16.0F - st->noisy_st_trough[k] > 0.0F) { + st->noisy_st_peak[k] = st->noisy_st_trough[k] * 16.0F; + 83f49bfa: 00009697 auipc a3,0x9 + 83f49bfe: 84e6ae87 flw ft9,-1970(a3) # 83f52448 <__func__.1+0x250> + } + + /* the smaller the threshold, the faster to suppress noise but easily introduce more speech distortion as trade-off */ + if (st->noisy_st_peak[k] * 0.5012F - st->noisy_st_trough[k] > 0.0F) { + DR_bin_cnt++; + 83f49c02: 00008697 auipc a3,0x8 + 83f49c06: 64e6ae07 flw ft8,1614(a3) # 83f52250 <__func__.1+0x58> + for (k = 0; k < 5; k++) { + 83f49c0a: 4651 li a2,20 + if (st->amp_inst_band[k] - st->noisy_st_trough[k] > 0.0F) { + 83f49c0c: 6134 ld a3,64(a0) + 83f49c0e: 973e add a4,a4,a5 + 83f49c10: 00072687 flw fa3,0(a4) + 83f49c14: 96be add a3,a3,a5 + 83f49c16: 0006a607 flw fa2,0(a3) + 83f49c1a: 20630753 fmv.s fa4,ft6 + alpha = 0.98F; + 83f49c1e: 205287d3 fmv.s fa5,ft5 + if (st->amp_inst_band[k] - st->noisy_st_trough[k] > 0.0F) { + 83f49c22: 08d670d3 fsub.s ft1,fa2,fa3 + 83f49c26: 20420053 fmv.s ft0,ft4 + alpha = 0.9F; + 83f49c2a: 20318553 fmv.s fa0,ft3 + if (st->amp_inst_band[k] - st->noisy_st_trough[k] > 0.0F) { + 83f49c2e: a01596d3 flt.s a3,fa1,ft1 + 83f49c32: e689 bnez a3,83f49c3c + 83f49c34: 21188753 fmv.s fa4,fa7 + alpha = 0.5F; + 83f49c38: 211887d3 fmv.s fa5,fa7 + st->noisy_st_trough[k] = alpha * st->noisy_st_trough[k] + (1.0F - alpha) * st->amp_inst_band[k]; + 83f49c3c: 10e67653 fmul.s fa2,fa2,fa4 + 83f49c40: 60f6f6c3 fmadd.s fa3,fa3,fa5,fa2 + 83f49c44: 00d72027 fsw fa3,0(a4) + if (st->amp_inst_band[k] - st->noisy_st_peak[k] > 0.0F) { + 83f49c48: 6134 ld a3,64(a0) + 83f49c4a: 6938 ld a4,80(a0) + 83f49c4c: 96be add a3,a3,a5 + 83f49c4e: 973e add a4,a4,a5 + 83f49c50: 0006a707 flw fa4,0(a3) + 83f49c54: 00072787 flw fa5,0(a4) + 83f49c58: 08f776d3 fsub.s fa3,fa4,fa5 + 83f49c5c: a0d596d3 flt.s a3,fa1,fa3 + 83f49c60: e689 bnez a3,83f49c6a + 83f49c62: 21ff8053 fmv.s ft0,ft11 + alpha = 0.93F; + 83f49c66: 21ef0553 fmv.s fa0,ft10 + st->noisy_st_peak[k] = alpha * st->noisy_st_peak[k] + (1.0F - alpha) * st->amp_inst_band[k]; + 83f49c6a: 10077753 fmul.s fa4,fa4,ft0 + 83f49c6e: 70a7f7c3 fmadd.s fa5,fa5,fa0,fa4 + 83f49c72: 00f72027 fsw fa5,0(a4) + if (st->noisy_st_peak[k] / 16.0F - st->noisy_st_trough[k] > 0.0F) { + 83f49c76: 6538 ld a4,72(a0) + 83f49c78: 6934 ld a3,80(a0) + 83f49c7a: 00f705b3 add a1,a4,a5 + 83f49c7e: 96be add a3,a3,a5 + 83f49c80: 0005a707 flw fa4,0(a1) + 83f49c84: 0006a787 flw fa5,0(a3) + 83f49c88: 7107f6c7 fmsub.s fa3,fa5,fa6,fa4 + 83f49c8c: a0d595d3 flt.s a1,fa1,fa3 + 83f49c90: cd91 beqz a1,83f49cac + st->noisy_st_peak[k] = st->noisy_st_trough[k] * 16.0F; + 83f49c92: 11d77753 fmul.s fa4,fa4,ft9 + 83f49c96: 00e6a027 fsw fa4,0(a3) + if (st->noisy_st_peak[k] * 0.5012F - st->noisy_st_trough[k] > 0.0F) { + 83f49c9a: 6934 ld a3,80(a0) + 83f49c9c: 6538 ld a4,72(a0) + 83f49c9e: 96be add a3,a3,a5 + 83f49ca0: 00f705b3 add a1,a4,a5 + 83f49ca4: 0006a787 flw fa5,0(a3) + 83f49ca8: 0005a707 flw fa4,0(a1) + 83f49cac: 7077f7c7 fmsub.s fa5,fa5,ft7,fa4 + for (k = 0; k < 5; k++) { + 83f49cb0: 0791 addi a5,a5,4 + if (st->noisy_st_peak[k] * 0.5012F - st->noisy_st_trough[k] > 0.0F) { + 83f49cb2: a0f596d3 flt.s a3,fa1,fa5 + 83f49cb6: c299 beqz a3,83f49cbc + DR_bin_cnt++; + 83f49cb8: 01c17153 fadd.s ft2,ft2,ft8 + for (k = 0; k < 5; k++) { + 83f49cbc: f4c798e3 bne a5,a2,83f49c0c + } + } + + if (DR_bin_cnt == 0.0F) { + 83f49cc0: f00007d3 fmv.w.x fa5,zero + 83f49cc4: a0f127d3 feq.s a5,ft2,fa5 + 83f49cc8: c395 beqz a5,83f49cec + DR_bin_cnt = st->vad_dr_cnt - 1.0F; + 83f49cca: 07052707 flw fa4,112(a0) # 8070 <_EL1_STACK_SIZE+0x7870> + 83f49cce: 00008797 auipc a5,0x8 + 83f49cd2: 5827a687 flw fa3,1410(a5) # 83f52250 <__func__.1+0x58> + 83f49cd6: 08d77753 fsub.s fa4,fa4,fa3 + if (0.0F > DR_bin_cnt) { + 83f49cda: a0f717d3 flt.s a5,fa4,fa5 + 83f49cde: e7a9 bnez a5,83f49d28 + DR_bin_cnt = 0.0F; + } + + st->vad_dr_cnt = DR_bin_cnt; + if (DR_bin_cnt == 0.0F) { + 83f49ce0: a0f727d3 feq.s a5,fa4,fa5 + st->vad_dr_cnt = DR_bin_cnt; + 83f49ce4: 06e52827 fsw fa4,112(a0) + if (DR_bin_cnt == 0.0F) { + 83f49ce8: e3b1 bnez a5,83f49d2c + st->vad_dr_cnt = 7.0F; + } + } + } + +} + 83f49cea: 8082 ret + if (st->Fs == 16000.0F) { + 83f49cec: 09c52787 flw fa5,156(a0) + st->vad_dr = 1.0F; + 83f49cf0: 00008797 auipc a5,0x8 + 83f49cf4: 5607a707 flw fa4,1376(a5) # 83f52250 <__func__.1+0x58> + if (st->Fs == 16000.0F) { + 83f49cf8: 00008797 auipc a5,0x8 + 83f49cfc: 55c7a687 flw fa3,1372(a5) # 83f52254 <__func__.1+0x5c> + 83f49d00: a0d7a7d3 feq.s a5,fa5,fa3 + st->vad_dr = 1.0F; + 83f49d04: 06e52a27 fsw fa4,116(a0) + if (st->Fs == 16000.0F) { + 83f49d08: cb81 beqz a5,83f49d18 + st->vad_dr_cnt = 7.0F; + 83f49d0a: 00008797 auipc a5,0x8 + 83f49d0e: 5527a787 flw fa5,1362(a5) # 83f5225c <__func__.1+0x64> + 83f49d12: 06f52827 fsw fa5,112(a0) + 83f49d16: 8082 ret + if (st->Fs == 8000.0F) { + 83f49d18: 00008797 auipc a5,0x8 + 83f49d1c: 69c7a707 flw fa4,1692(a5) # 83f523b4 <__func__.1+0x1bc> + 83f49d20: a0e7a7d3 feq.s a5,fa5,fa4 + 83f49d24: f3fd bnez a5,83f49d0a + 83f49d26: 8082 ret + st->vad_dr_cnt = DR_bin_cnt; + 83f49d28: 06052823 sw zero,112(a0) + st->vad_dr = 0.0F; + 83f49d2c: 06052a23 sw zero,116(a0) + 83f49d30: 8082 ret + +0000000083f49d32 : + + if (n == 1) return; + drfti1(n, wsave+n, ifac); +} + +static void dradf2(int ido,int l1,float *cc,float *ch,float *wa1){ + 83f49d32: 7139 addi sp,sp,-64 + 83f49d34: f04e sd s3,32(sp) + int i,k; + float ti2,tr2; + int t0,t1,t2,t3,t4,t5,t6; + + t1=0; + t0=(t2=l1*ido); + 83f49d36: 02a589bb mulw s3,a1,a0 +static void dradf2(int ido,int l1,float *cc,float *ch,float *wa1){ + 83f49d3a: f44a sd s2,40(sp) + 83f49d3c: ec52 sd s4,24(sp) + t3=ido<<1; + 83f49d3e: 0015129b slliw t0,a0,0x1 +static void dradf2(int ido,int l1,float *cc,float *ch,float *wa1){ + 83f49d42: fc22 sd s0,56(sp) + 83f49d44: f826 sd s1,48(sp) + 83f49d46: e856 sd s5,16(sp) + 83f49d48: e45a sd s6,8(sp) + t3=ido<<1; + 83f49d4a: 8916 mv s2,t0 + t0=(t2=l1*ido); + 83f49d4c: 8a4e mv s4,s3 + for(k=0;k + 83f49d52: 00299813 slli a6,s3,0x2 + 83f49d56: 00251f13 slli t5,a0,0x2 + 83f49d5a: 88b2 mv a7,a2 + 83f49d5c: 9832 add a6,a6,a2 + 83f49d5e: 4781 li a5,0 + 83f49d60: 4e81 li t4,0 + ch[t1<<1]=cc[t1]+cc[t2]; + 83f49d62: 00082707 flw fa4,0(a6) + 83f49d66: 0008a787 flw fa5,0(a7) + 83f49d6a: 00279e13 slli t3,a5,0x2 + 83f49d6e: 9e36 add t3,t3,a3 + 83f49d70: 00e7f7d3 fadd.s fa5,fa5,fa4 + ch[(t1<<1)+t3-1]=cc[t1]-cc[t2]; + 83f49d74: 00f287bb addw a5,t0,a5 + 83f49d78: 00279313 slli t1,a5,0x2 + 83f49d7c: 9336 add t1,t1,a3 + for(k=0;k + t1+=ido; + t2+=ido; + } + + if(ido<2)return; + 83f49d9c: 4785 li a5,1 + 83f49d9e: 0ea7d563 bge a5,a0,83f49e88 + if(ido==2)goto L105; + 83f49da2: 4789 li a5,2 + 83f49da4: 0ef50b63 beq a0,a5,83f49e9a + } + t1+=ido; + t2+=ido; + } + + if(ido%2==1)return; + 83f49da8: 00157b13 andi s6,a0,1 + for(k=0;k + 83f49db0: 8496 mv s1,t0 + 83f49db2: 00251f13 slli t5,a0,0x2 + 83f49db6: 8fb2 mv t6,a2 + 83f49db8: 00291a93 slli s5,s2,0x2 + 83f49dbc: 8436 mv s0,a3 + 83f49dbe: 098a slli s3,s3,0x2 + 83f49dc0: 4381 li t2,0 + for(i=2;i + for(k=0;k + if(ido%2==1)return; + 83f49e42: 040b1363 bnez s6,83f49e88 + + L105: + t3=(t2=(t1=ido)-1); + 83f49e46: fff5081b addiw a6,a0,-1 + t2+=t0; + 83f49e4a: 01480a3b addw s4,a6,s4 + for(k=0;k + t1+=ido<<1; + t2+=ido; + t3+=ido; + } +} + 83f49e88: 7462 ld s0,56(sp) + 83f49e8a: 74c2 ld s1,48(sp) + 83f49e8c: 7922 ld s2,40(sp) + 83f49e8e: 7982 ld s3,32(sp) + 83f49e90: 6a62 ld s4,24(sp) + 83f49e92: 6ac2 ld s5,16(sp) + 83f49e94: 6b22 ld s6,8(sp) + 83f49e96: 6121 addi sp,sp,64 + 83f49e98: 8082 ret + for(k=0;k + t2+=t0; + 83f49e9e: 2a05 addiw s4,s4,1 + t3=(t2=(t1=ido)-1); + 83f49ea0: 4805 li a6,1 + 83f49ea2: 4f21 li t5,8 + 83f49ea4: b76d j 83f49e4e + +0000000083f49ea6 : +static void dradf4(int ido,int l1,float *cc,float *ch,float *wa1, + float *wa2,float *wa3){ + static float hsqt2 = .70710678118654752f; + int i,k,t0,t1,t2,t3,t4,t5,t6; + float ci2,ci3,ci4,cr2,cr3,cr4,ti1,ti2,ti3,ti4,tr1,tr2,tr3,tr4; + t0=l1*ido; + 83f49ea6: 02a588bb mulw a7,a1,a0 + float *wa2,float *wa3){ + 83f49eaa: 7119 addi sp,sp,-128 + 83f49eac: fca2 sd s0,120(sp) + 83f49eae: f8a6 sd s1,112(sp) + 83f49eb0: f4ca sd s2,104(sp) + 83f49eb2: f0ce sd s3,96(sp) + 83f49eb4: ecd2 sd s4,88(sp) + 83f49eb6: e8d6 sd s5,80(sp) + 83f49eb8: e4da sd s6,72(sp) + 83f49eba: e0de sd s7,64(sp) + + t1=t0; + t4=t1<<1; + 83f49ebc: 00189e9b slliw t4,a7,0x1 + float *wa2,float *wa3){ + 83f49ec0: fc62 sd s8,56(sp) + 83f49ec2: f866 sd s9,48(sp) + 83f49ec4: f46a sd s10,40(sp) + 83f49ec6: f06e sd s11,32(sp) + t0=l1*ido; + 83f49ec8: c446 sw a7,8(sp) + t4=t1<<1; + 83f49eca: c676 sw t4,12(sp) + t0=l1*ido; + 83f49ecc: e046 sd a7,0(sp) + t2=t1+(t1<<1); + 83f49ece: 01d88f3b addw t5,a7,t4 + t3=0; + + for(k=0;k + 83f49ed6: 6882 ld a7,0(sp) + 83f49ed8: 0f0a slli t5,t5,0x2 + 83f49eda: 0e8a slli t4,t4,0x2 + 83f49edc: 00289f93 slli t6,a7,0x2 + tr1=cc[t1]+cc[t2]; + tr2=cc[t3]+cc[t4]; + + ch[t5=t3<<2]=tr1+tr2; + ch[(ido<<2)+t5-1]=tr2-tr1; + 83f49ee0: 0025141b slliw s0,a0,0x2 + ch[(t5+=(ido<<1))-1]=cc[t3]-cc[t4]; + 83f49ee4: 0015149b slliw s1,a0,0x1 + 83f49ee8: 00251a13 slli s4,a0,0x2 + 83f49eec: 9fb2 add t6,t6,a2 + 83f49eee: 9f32 add t5,t5,a2 + 83f49ef0: 82b2 mv t0,a2 + 83f49ef2: 9eb2 add t4,t4,a2 + 83f49ef4: 4e01 li t3,0 + for(k=0;k + t2+=ido; + t3+=ido; + t4+=ido; + } + + if(ido<2)return; + 83f49f68: 4885 li a7,1 + 83f49f6a: 20a8d563 bge a7,a0,83f4a174 + if(ido==2)goto L105; + 83f49f6e: 4889 li a7,2 + 83f49f70: 23150063 beq a0,a7,83f4a190 + ch[t5+t6-1]=tr2-tr1; + ch[t5+t6]=ti1-ti2; + } + t1+=ido; + } + if(ido&1)return; + 83f49f74: 00157413 andi s0,a0,1 + 83f49f78: ec22 sd s0,24(sp) + for(k=0;k + 83f49f7e: 6402 ld s0,0(sp) + t5=(t6=ido<<1)+t4; + 83f49f80: 00151a9b slliw s5,a0,0x1 + 83f49f84: 00251a13 slli s4,a0,0x2 + 83f49f88: 408004b3 neg s1,s0 + 83f49f8c: 00241c93 slli s9,s0,0x2 + 83f49f90: e826 sd s1,16(sp) + 83f49f92: 01960b33 add s6,a2,s9 + 83f49f96: 00341d93 slli s11,s0,0x3 + 83f49f9a: 00249d13 slli s10,s1,0x2 + t1=0; + 83f49f9e: 4c01 li s8,0 + for(k=0;k + 83f49fe8: 0082a187 flw ft3,8(t0) + cr2=wa1[i-2]*cc[t3-1]+wa1[i-1]*cc[t3]; + 83f49fec: 004f2087 flw ft1,4(t5) + 83f49ff0: 00492587 flw fa1,4(s2) + cr3=wa2[i-2]*cc[t3-1]+wa2[i-1]*cc[t3]; + 83f49ff4: 0044a507 flw fa0,4(s1) + cr4=wa3[i-2]*cc[t3-1]+wa3[i-1]*cc[t3]; + 83f49ff8: 0042a787 flw fa5,4(t0) + cr2=wa1[i-2]*cc[t3-1]+wa1[i-1]*cc[t3]; + 83f49ffc: 1055f853 fmul.s fa6,fa1,ft5 + cr3=wa2[i-2]*cc[t3-1]+wa2[i-1]*cc[t3]; + 83f4a000: 104573d3 fmul.s ft7,fa0,ft4 + ci4=wa3[i-2]*cc[t3]-wa3[i-1]*cc[t3-1]; + 83f4a004: 1007f153 fmul.s ft2,fa5,ft0 + ci2=wa1[i-2]*cc[t3]-wa1[i-1]*cc[t3-1]; + 83f4a008: 10b0f5d3 fmul.s fa1,ft1,fa1 + cr4=wa3[i-2]*cc[t3-1]+wa3[i-1]*cc[t3]; + 83f4a00c: 10307353 fmul.s ft6,ft0,ft3 + ci3=wa2[i-2]*cc[t3]-wa2[i-1]*cc[t3-1]; + 83f4a010: 10a67553 fmul.s fa0,fa2,fa0 + cr3=wa2[i-2]*cc[t3-1]+wa2[i-1]*cc[t3]; + 83f4a014: 0004a687 flw fa3,0(s1) + cr2=wa1[i-2]*cc[t3-1]+wa1[i-1]*cc[t3]; + 83f4a018: 00092707 flw fa4,0(s2) + cr4=wa3[i-2]*cc[t3-1]+wa3[i-1]*cc[t3]; + 83f4a01c: 0003a007 flw ft0,0(t2) + cr3=wa2[i-2]*cc[t3-1]+wa2[i-1]*cc[t3]; + 83f4a020: 38c6f3c3 fmadd.s ft7,fa3,fa2,ft7 + cr2=wa1[i-2]*cc[t3-1]+wa1[i-1]*cc[t3]; + 83f4a024: 801770c3 fmadd.s ft1,fa4,ft1,fa6 + ci3=wa2[i-2]*cc[t3]-wa2[i-1]*cc[t3-1]; + 83f4a028: 5046f547 fmsub.s fa0,fa3,ft4,fa0 + ci2=wa1[i-2]*cc[t3]-wa1[i-1]*cc[t3-1]; + 83f4a02c: 58577747 fmsub.s fa4,fa4,ft5,fa1 + cr4=wa3[i-2]*cc[t3-1]+wa3[i-1]*cc[t3]; + 83f4a030: 30f077c3 fmadd.s fa5,ft0,fa5,ft6 + ci4=wa3[i-2]*cc[t3]-wa3[i-1]*cc[t3-1]; + 83f4a034: 10307047 fmsub.s ft0,ft0,ft3,ft2 + ti2=cc[t2]+ci3; + 83f4a038: 008fa687 flw fa3,8(t6) + tr2=cc[t2-1]+cr3; + 83f4a03c: 004fa607 flw fa2,4(t6) + for(i=2;i + for(k=0;k + if(ido&1)return; + 83f4a0c8: 67e2 ld a5,24(sp) + 83f4a0ca: e7cd bnez a5,83f4a174 + + L105: + + t2=(t1=t0+ido-1)+(t0<<1); + 83f4a0cc: 47a2 lw a5,8(sp) + 83f4a0ce: 4432 lw s0,12(sp) + t3=ido<<2; + 83f4a0d0: 0025189b slliw a7,a0,0x2 + t2=(t1=t0+ido-1)+(t0<<1); + 83f4a0d4: 9fa9 addw a5,a5,a0 + 83f4a0d6: fff7871b addiw a4,a5,-1 + 83f4a0da: 00870e3b addw t3,a4,s0 + t4=ido; + t5=ido<<1; + t6=ido; + + for(k=0;k + 83f4a114: 00008517 auipc a0,0x8 + 83f4a118: 34052587 flw fa1,832(a0) # 83f52454 <__func__.1+0x25c> + ti1=-hsqt2*(cc[t1]+cc[t2]); + 83f4a11c: 01d78533 add a0,a5,t4 + 83f4a120: 01e60333 add t1,a2,t5 + 83f4a124: 9572 add a0,a0,t3 + 83f4a126: 00032787 flw fa5,0(t1) + 83f4a12a: 00052607 flw fa2,0(a0) + tr1=hsqt2*(cc[t1]-cc[t2]); + + ch[t4-1]=tr1+cc[t6-1]; + 83f4a12e: ffc7a687 flw fa3,-4(a5) + for(k=0;k + t1+=ido; + t2+=ido; + t4+=t3; + t6+=ido; + } +} + 83f4a174: 7466 ld s0,120(sp) + 83f4a176: 74c6 ld s1,112(sp) + 83f4a178: 7926 ld s2,104(sp) + 83f4a17a: 7986 ld s3,96(sp) + 83f4a17c: 6a66 ld s4,88(sp) + 83f4a17e: 6ac6 ld s5,80(sp) + 83f4a180: 6b26 ld s6,72(sp) + 83f4a182: 6b86 ld s7,64(sp) + 83f4a184: 7c62 ld s8,56(sp) + 83f4a186: 7cc2 ld s9,48(sp) + 83f4a188: 7d22 ld s10,40(sp) + 83f4a18a: 7d82 ld s11,32(sp) + 83f4a18c: 6109 addi sp,sp,128 + 83f4a18e: 8082 ret + for(k=0;k + t2=(t1=t0+ido-1)+(t0<<1); + 83f4a194: 47a2 lw a5,8(sp) + t5=ido<<1; + 83f4a196: 4a91 li s5,4 + t3=ido<<2; + 83f4a198: 48a1 li a7,8 + t2=(t1=t0+ido-1)+(t0<<1); + 83f4a19a: 0017871b addiw a4,a5,1 + 83f4a19e: 47b2 lw a5,12(sp) + 83f4a1a0: 4a21 li s4,8 + 83f4a1a2: 00e78e3b addw t3,a5,a4 + 83f4a1a6: 6782 ld a5,0(sp) + 83f4a1a8: 40f007b3 neg a5,a5 + 83f4a1ac: e83e sd a5,16(sp) + 83f4a1ae: bf05 j 83f4a0de + +0000000083f4a1b0 : + if(na==1)return; + + for(i=0;i + 83f4a1c4: fffe841b addiw s0,t4,-1 + 83f4a1c8: 00251293 slli t0,a0,0x2 + 83f4a1cc: 88b6 mv a7,a3 + 83f4a1ce: 00291f93 slli t6,s2,0x2 + 83f4a1d2: 8e76 mv t3,t4 + t2=0; + 83f4a1d4: 4801 li a6,0 + for(k=0;k + } + + if(ido<2)return; + 83f4a21a: 4785 li a5,1 + 83f4a21c: 0ea7d863 bge a5,a0,83f4a30c + if(ido==2)goto L105; + 83f4a220: 4789 li a5,2 + 83f4a222: 0ef50a63 beq a0,a5,83f4a316 + ch[t6]=wa1[i-2]*ti2+wa1[i-1]*tr2; + } + t2=(t1+=ido)<<1; + } + + if(ido%2==1)return; + 83f4a226: 00157493 andi s1,a0,1 + for(k=0;k + 83f4a22e: 00251293 slli t0,a0,0x2 + 83f4a232: 8f36 mv t5,a3 + 83f4a234: 00291f93 slli t6,s2,0x2 + t2=0; + 83f4a238: 4781 li a5,0 + t1=0; + 83f4a23a: 4401 li s0,0 + for(k=0;k + t2=(t1+=ido)<<1; + 83f4a2c4: 9c29 addw s0,s0,a0 + for(k=0;k + +L105: + t1=ido-1; + 83f4a2d2: fff5079b addiw a5,a0,-1 + if(ido%2==1)return; + 83f4a2d6: e89d bnez s1,83f4a30c + 83f4a2d8: 078a slli a5,a5,0x2 + 83f4a2da: 963e add a2,a2,a5 + 83f4a2dc: 96be add a3,a3,a5 + 83f4a2de: 0e8a slli t4,t4,0x2 + t1=ido-1; + 83f4a2e0: 4781 li a5,0 + t2=ido-1; + for(k=0;k + t1+=ido; + t2+=ido<<1; + } +} + 83f4a30c: 6462 ld s0,24(sp) + 83f4a30e: 64c2 ld s1,16(sp) + 83f4a310: 6922 ld s2,8(sp) + 83f4a312: 6105 addi sp,sp,32 + 83f4a314: 8082 ret + for(k=0;k + t1=ido-1; + 83f4a31a: 4785 li a5,1 + 83f4a31c: 42a1 li t0,8 + 83f4a31e: 00291f93 slli t6,s2,0x2 + 83f4a322: bf5d j 83f4a2d8 + +0000000083f4a324 : + +static void dradb3(int ido,int l1,float *cc,float *ch,float *wa1, + float *wa2){ + 83f4a324: 7139 addi sp,sp,-64 + 83f4a326: f04e sd s3,32(sp) + 83f4a328: ec52 sd s4,24(sp) + float ci2,ci3,di2,di3,cr2,cr3,dr2,dr3,ti2,tr2; + t0=l1*ido; + + t1=0; + t2=t0<<1; + t3=ido<<1; + 83f4a32a: 0015199b slliw s3,a0,0x1 + float *wa2){ + 83f4a32e: fc22 sd s0,56(sp) + 83f4a330: f826 sd s1,48(sp) + 83f4a332: f44a sd s2,40(sp) + 83f4a334: e856 sd s5,16(sp) + 83f4a336: e45a sd s6,8(sp) + t0=l1*ido; + 83f4a338: 02a58a3b mulw s4,a1,a0 + t4=ido+(ido<<1); + 83f4a33c: 00a98ebb addw t4,s3,a0 + t5=0; + for(k=0;k + 83f4a344: 893a mv s2,a4 + 83f4a346: 001a1e1b slliw t3,s4,0x1 + 83f4a34a: 00299713 slli a4,s3,0x2 + 83f4a34e: 41300f33 neg t5,s3 + 83f4a352: 8abe mv s5,a5 + 83f4a354: 8432 mv s0,a2 + 83f4a356: 9732 add a4,a4,a2 + 83f4a358: 82b6 mv t0,a3 + 83f4a35a: 0e8a slli t4,t4,0x2 + 83f4a35c: 00251613 slli a2,a0,0x2 + 83f4a360: 0f0a slli t5,t5,0x2 + 83f4a362: 002a1493 slli s1,s4,0x2 + 83f4a366: 0e0a slli t3,t3,0x2 + 83f4a368: 4801 li a6,0 + 83f4a36a: 00008797 auipc a5,0x8 + 83f4a36e: f0e7a107 flw ft2,-242(a5) # 83f52278 <__func__.1+0x80> + 83f4a372: 00008797 auipc a5,0x8 + 83f4a376: 0e67a587 flw fa1,230(a5) # 83f52458 <__func__.1+0x260> + tr2=cc[t3-1]+cc[t3-1]; + 83f4a37a: ffc72787 flw fa5,-4(a4) + cr2=cc[t5]+(taur*tr2); + 83f4a37e: 01e707b3 add a5,a4,t5 + 83f4a382: 0007a707 flw fa4,0(a5) + tr2=cc[t3-1]+cc[t3-1]; + 83f4a386: 00f7f7d3 fadd.s fa5,fa5,fa5 + ch[t1]=cc[t5]+tr2; + ci3=taui*(cc[t3]+cc[t3]); + ch[t1+t0]=cr2-ci3; + 83f4a38a: 00968333 add t1,a3,s1 + ch[t1+t2]=cr2+ci3; + 83f4a38e: 01c688b3 add a7,a3,t3 + 83f4a392: 87c2 mv a5,a6 + for(k=0;k + t1+=ido; + t3+=t4; + t5+=t4; + } + + if(ido==1)return; + 83f4a3c2: 4705 li a4,1 + 83f4a3c4: 10e50d63 beq a0,a4,83f4a4de + 83f4a3c8: ffd5071b addiw a4,a0,-3 + 83f4a3cc: 0017571b srliw a4,a4,0x1 + 83f4a3d0: 070e slli a4,a4,0x3 + 83f4a3d2: 00890f93 addi t6,s2,8 + 83f4a3d6: 9fba add t6,t6,a4 + 83f4a3d8: 0a0e slli s4,s4,0x3 + 83f4a3da: 4381 li t2,0 + 83f4a3dc: 4701 li a4,0 + t7=t1+(t1<<1); + t6=(t5=t7+t3); + t8=t1; + t10=(t9=t1+t0)+t0; + + for(i=2;i + 83f4a3f0: 068a slli a3,a3,0x2 + 83f4a3f2: 96a2 add a3,a3,s0 + 83f4a3f4: 030a slli t1,t1,0x2 + 83f4a3f6: 9322 add t1,t1,s0 + 83f4a3f8: 00928f33 add t5,t0,s1 + 83f4a3fc: 88d6 mv a7,s5 + 83f4a3fe: 005a0eb3 add t4,s4,t0 + 83f4a402: 85ca mv a1,s2 + 83f4a404: 8e16 mv t3,t0 + 83f4a406: 8836 mv a6,a3 + t6-=2; + t7+=2; + t8+=2; + t9+=2; + t10+=2; + tr2=cc[t5-1]+cc[t6-1]; + 83f4a408: ff482707 flw fa4,-12(a6) + 83f4a40c: 0046a787 flw fa5,4(a3) + cr2=cc[t7-1]+(taur*tr2); + 83f4a410: 00432687 flw fa3,4(t1) + for(i=2;i + } + t1+=ido; + 83f4a4cc: 007503bb addw t2,a0,t2 + for(k=0;k + 83f4a4da: 8736 mv a4,a3 + 83f4a4dc: b711 j 83f4a3e0 + } +} + 83f4a4de: 7462 ld s0,56(sp) + 83f4a4e0: 74c2 ld s1,48(sp) + 83f4a4e2: 7922 ld s2,40(sp) + 83f4a4e4: 7982 ld s3,32(sp) + 83f4a4e6: 6a62 ld s4,24(sp) + 83f4a4e8: 6ac2 ld s5,16(sp) + 83f4a4ea: 6b22 ld s6,8(sp) + 83f4a4ec: 6121 addi sp,sp,64 + 83f4a4ee: 8082 ret + +0000000083f4a4f0 : + +static void dradb4(int ido,int l1,float *cc,float *ch,float *wa1, + float *wa2,float *wa3){ + 83f4a4f0: 7175 addi sp,sp,-144 + int i,k,t0,t1,t2,t3,t4,t5,t6,t7,t8; + float ci2,ci3,ci4,cr2,cr3,cr4,ti1,ti2,ti3,ti4,tr1,tr2,tr3,tr4; + t0=l1*ido; + + t1=0; + t2=ido<<2; + 83f4a4f2: 0025189b slliw a7,a0,0x2 + float *wa2,float *wa3){ + 83f4a4f6: fc6a sd s10,56(sp) + 83f4a4f8: e436 sd a3,8(sp) + t3=0; + t6=ido<<1; + 83f4a4fa: 00151d1b slliw s10,a0,0x1 + t2=ido<<2; + 83f4a4fe: 0008869b sext.w a3,a7 + float *wa2,float *wa3){ + 83f4a502: e0e6 sd s9,64(sp) + 83f4a504: e522 sd s0,136(sp) + 83f4a506: e126 sd s1,128(sp) + 83f4a508: fcca sd s2,120(sp) + 83f4a50a: f8ce sd s3,112(sp) + 83f4a50c: f4d2 sd s4,104(sp) + 83f4a50e: f0d6 sd s5,96(sp) + 83f4a510: ecda sd s6,88(sp) + 83f4a512: e8de sd s7,80(sp) + 83f4a514: e4e2 sd s8,72(sp) + 83f4a516: f86e sd s11,48(sp) + t6=ido<<1; + 83f4a518: ce6a sw s10,28(sp) + t2=ido<<2; + 83f4a51a: e836 sd a3,16(sp) + t0=l1*ido; + 83f4a51c: 02a58cbb mulw s9,a1,a0 + for(k=0;k + 83f4a524: 001c9693 slli a3,s9,0x1 + 83f4a528: 01968fb3 add t6,a3,s9 + 83f4a52c: 66c2 ld a3,16(sp) + 83f4a52e: 002d1293 slli t0,s10,0x2 + 83f4a532: 41a00f33 neg t5,s10 + 83f4a536: 00269393 slli t2,a3,0x2 + 83f4a53a: 66a2 ld a3,8(sp) + 83f4a53c: 005608b3 add a7,a2,t0 + 83f4a540: 00251a13 slli s4,a0,0x2 + 83f4a544: 0f0a slli t5,t5,0x2 + 83f4a546: 002c9a93 slli s5,s9,0x2 + 83f4a54a: 003c9b13 slli s6,s9,0x3 + 83f4a54e: 0f8a slli t6,t6,0x2 + 83f4a550: 4301 li t1,0 + 83f4a552: 00008417 auipc s0,0x8 + 83f4a556: d3a42607 flw fa2,-710(s0) # 83f5228c <__func__.1+0x94> + t4=t3+t6; + t5=t1; + tr3=cc[t4-1]+cc[t4-1]; + tr4=cc[t4]+cc[t4]; + tr1=cc[t3]-cc[(t4+=t6)-1]; + 83f4a55a: 01e88eb3 add t4,a7,t5 + 83f4a55e: 00588e33 add t3,a7,t0 + 83f4a562: 000ea787 flw fa5,0(t4) + 83f4a566: ffce2507 flw fa0,-4(t3) + tr3=cc[t4-1]+cc[t4-1]; + 83f4a56a: ffc8a687 flw fa3,-4(a7) + tr4=cc[t4]+cc[t4]; + 83f4a56e: 0008a707 flw fa4,0(a7) + tr2=cc[t3]+cc[t4-1]; + 83f4a572: 00a7f5d3 fadd.s fa1,fa5,fa0 + tr1=cc[t3]-cc[(t4+=t6)-1]; + 83f4a576: 08a7f7d3 fsub.s fa5,fa5,fa0 + ch[t5]=tr2+tr3; + ch[t5+=t0]=tr1-tr4; + 83f4a57a: 01568433 add s0,a3,s5 + ch[t5+=t0]=tr2-tr3; + 83f4a57e: 01668eb3 add t4,a3,s6 + ch[t5+=t0]=tr1+tr4; + 83f4a582: 01f68e33 add t3,a3,t6 + ch[t5]=tr2+tr3; + 83f4a586: 58c6f043 fmadd.s ft0,fa3,fa2,fa1 + ch[t5+=t0]=tr1-tr4; + 83f4a58a: 78c7754b fnmsub.s fa0,fa4,fa2,fa5 + ch[t5+=t0]=tr2-tr3; + 83f4a58e: 58c6f6cb fnmsub.s fa3,fa3,fa2,fa1 + ch[t5+=t0]=tr1+tr4; + 83f4a592: 78c777c3 fmadd.s fa5,fa4,fa2,fa5 + for(k=0;k + t1+=ido; + t3+=t2; + } + + if(ido<2)return; + 83f4a5b0: 4685 li a3,1 + 83f4a5b2: 20a6d363 bge a3,a0,83f4a7b8 + if(ido==2)goto L105; + 83f4a5b6: 4689 li a3,2 + 83f4a5b8: 20d50e63 beq a0,a3,83f4a7d4 + ch[t8]=wa3[i-2]*ci4+wa3[i-1]*cr4; + } + t1+=ido; + } + + if(ido%2 == 1)return; + 83f4a5bc: 00157693 andi a3,a0,1 + 83f4a5c0: f436 sd a3,40(sp) + for(k=0;k + 83f4a5c6: 001c9693 slli a3,s9,0x1 + 83f4a5ca: 69a2 ld s3,8(sp) + 83f4a5cc: 01968db3 add s11,a3,s9 + 83f4a5d0: f036 sd a3,32(sp) + 83f4a5d2: 00251a13 slli s4,a0,0x2 + 83f4a5d6: 002c9a93 slli s5,s9,0x2 + 83f4a5da: 003c9b13 slli s6,s9,0x3 + 83f4a5de: 0d8a slli s11,s11,0x2 + t1=0; + 83f4a5e0: 4c01 li s8,0 + for(k=0;k + for(k=0;k + if(ido%2 == 1)return; + 83f4a71c: 77a2 ld a5,40(sp) + 83f4a71e: efc9 bnez a5,83f4a7b8 + L105: + + t1=ido; + t2=ido<<2; + t3=ido-1; + t4=ido+(ido<<1); + 83f4a720: 4772 lw a4,28(sp) + t3=ido-1; + 83f4a722: fff5079b addiw a5,a0,-1 + t4=ido+(ido<<1); + 83f4a726: 9d39 addw a0,a0,a4 + for(k=0;k + 83f4a740: 00271513 slli a0,a4,0x2 + 83f4a744: 01460733 add a4,a2,s4 + 83f4a748: 9636 add a2,a2,a3 + 83f4a74a: 66a2 ld a3,8(sp) + 83f4a74c: 00008417 auipc s0,0x8 + 83f4a750: d1442507 flw fa0,-748(s0) # 83f52460 <__func__.1+0x268> + 83f4a754: 97b6 add a5,a5,a3 + t3=ido-1; + 83f4a756: 4681 li a3,0 + t5=t3; + ti1=cc[t1]+cc[t4]; + 83f4a758: 00072587 flw fa1,0(a4) + ti2=cc[t4]-cc[t1]; + tr1=cc[t1-1]-cc[t4-1]; + 83f4a75c: ffc62607 flw fa2,-4(a2) + ti1=cc[t1]+cc[t4]; + 83f4a760: 00062787 flw fa5,0(a2) + tr1=cc[t1-1]-cc[t4-1]; + 83f4a764: ffc72707 flw fa4,-4(a4) + tr2=cc[t1-1]+cc[t4-1]; + ch[t5]=tr2+tr2; + ch[t5+=t0]=sqrt2*(tr1-ti1); + 83f4a768: 01578333 add t1,a5,s5 + ti1=cc[t1]+cc[t4]; + 83f4a76c: 00f5f6d3 fadd.s fa3,fa1,fa5 + ti2=cc[t4]-cc[t1]; + 83f4a770: 08b7f7d3 fsub.s fa5,fa5,fa1 + tr1=cc[t1-1]-cc[t4-1]; + 83f4a774: 08c775d3 fsub.s fa1,fa4,fa2 + tr2=cc[t1-1]+cc[t4-1]; + 83f4a778: 00c77753 fadd.s fa4,fa4,fa2 + ch[t5+=t0]=ti2+ti2; + 83f4a77c: 016788b3 add a7,a5,s6 + ch[t5+=t0]=-sqrt2*(tr1+ti1); + 83f4a780: 01c78833 add a6,a5,t3 + ch[t5+=t0]=ti2+ti2; + 83f4a784: 00f7f7d3 fadd.s fa5,fa5,fa5 + ch[t5+=t0]=sqrt2*(tr1-ti1); + 83f4a788: 08d5f653 fsub.s fa2,fa1,fa3 + ch[t5+=t0]=-sqrt2*(tr1+ti1); + 83f4a78c: 00b6f6d3 fadd.s fa3,fa3,fa1 + ch[t5]=tr2+tr2; + 83f4a790: 00e77753 fadd.s fa4,fa4,fa4 + for(k=0;k + + t3+=ido; + t1+=t2; + t4+=t2; + } +} + 83f4a7b8: 642a ld s0,136(sp) + 83f4a7ba: 648a ld s1,128(sp) + 83f4a7bc: 7966 ld s2,120(sp) + 83f4a7be: 79c6 ld s3,112(sp) + 83f4a7c0: 7a26 ld s4,104(sp) + 83f4a7c2: 7a86 ld s5,96(sp) + 83f4a7c4: 6b66 ld s6,88(sp) + 83f4a7c6: 6bc6 ld s7,80(sp) + 83f4a7c8: 6c26 ld s8,72(sp) + 83f4a7ca: 6c86 ld s9,64(sp) + 83f4a7cc: 7d62 ld s10,56(sp) + 83f4a7ce: 7dc2 ld s11,48(sp) + 83f4a7d0: 6149 addi sp,sp,144 + 83f4a7d2: 8082 ret + for(k=0;k + t4=ido+(ido<<1); + 83f4a7d8: 47f2 lw a5,28(sp) + 83f4a7da: 001c9713 slli a4,s9,0x1 + 83f4a7de: 4a21 li s4,8 + 83f4a7e0: 0027851b addiw a0,a5,2 + 83f4a7e4: 002c9a93 slli s5,s9,0x2 + t3=ido-1; + 83f4a7e8: 4785 li a5,1 + 83f4a7ea: 003c9b13 slli s6,s9,0x3 + 83f4a7ee: f03a sd a4,32(sp) + 83f4a7f0: bf25 j 83f4a728 + +0000000083f4a7f2 : + float *c2,float *ch,float *ch2,float *wa){ + 83f4a7f2: 7155 addi sp,sp,-208 + 83f4a7f4: aca2 fsd fs0,88(sp) + arg=tpi/(float)ip; + 83f4a7f6: d005f453 fcvt.s.w fs0,a1 + float *c2,float *ch,float *ch2,float *wa){ + 83f4a7fa: ed56 sd s5,152(sp) + 83f4a7fc: 8aae mv s5,a1 + arg=tpi/(float)ip; + 83f4a7fe: 00008597 auipc a1,0x8 + 83f4a802: c665a787 flw fa5,-922(a1) # 83f52464 <__func__.1+0x26c> + 83f4a806: 1887f453 fdiv.s fs0,fa5,fs0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4a80a: e1a2 sd s0,192(sp) + 83f4a80c: fd26 sd s1,184(sp) + 83f4a80e: 8432 mv s0,a2 + 83f4a810: 84aa mv s1,a0 + 83f4a812: e55e sd s7,136(sp) + t0=l1*ido; + 83f4a814: 02848bbb mulw s7,s1,s0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4a818: e586 sd ra,200(sp) + 83f4a81a: f94a sd s2,176(sp) + 83f4a81c: f54e sd s3,168(sp) + 83f4a81e: f152 sd s4,160(sp) + 83f4a820: 89b6 mv s3,a3 + 83f4a822: 8a3e mv s4,a5 + 83f4a824: e95a sd s6,144(sp) + 83f4a826: fce6 sd s9,120(sp) + 83f4a828: f8ea sd s10,112(sp) + 83f4a82a: f4ee sd s11,104(sp) + 83f4a82c: 8d3a mv s10,a4 + 83f4a82e: 8b42 mv s6,a6 + 83f4a830: 8946 mv s2,a7 + dcp=(float)cos(arg); + 83f4a832: 42040453 fcvt.d.s fs0,fs0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4a836: 6cce ld s9,208(sp) + 83f4a838: 6dee ld s11,216(sp) + dcp=(float)cos(arg); + 83f4a83a: 22840553 fmv.d fa0,fs0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4a83e: e162 sd s8,128(sp) + dcp=(float)cos(arg); + 83f4a840: 892f60ef jal ra,83f408d2 + 83f4a844: 22a507d3 fmv.d fa5,fa0 + dsp=(float)sin(arg); + 83f4a848: 22840553 fmv.d fa0,fs0 + dcp=(float)cos(arg); + 83f4a84c: 4017f453 fcvt.s.d fs0,fa5 + dsp=(float)sin(arg); + 83f4a850: b16f60ef jal ra,83f40b66 + nbd=(ido-1)>>1; + 83f4a854: fff4869b addiw a3,s1,-1 + 83f4a858: c4b6 sw a3,72(sp) + 83f4a85a: 4016d69b sraiw a3,a3,0x1 + t2=ipp2*t0; + 83f4a85e: 035b873b mulw a4,s7,s5 + nbd=(ido-1)>>1; + 83f4a862: fc36 sd a3,56(sp) + ipph=(ip+1)>>1; + 83f4a864: 001a8e1b addiw t3,s5,1 + t0=l1*ido; + 83f4a868: d25e sw s7,36(sp) + if(ido==1)goto L119; + 83f4a86a: 4785 li a5,1 + dsp=(float)sin(arg); + 83f4a86c: 401576d3 fcvt.s.d fa3,fa0 + ipph=(ip+1)>>1; + 83f4a870: 401e5e1b sraiw t3,t3,0x1 + t10=ip*ido; + 83f4a874: 029a86bb mulw a3,s5,s1 + t2=ipp2*t0; + 83f4a878: f83a sd a4,48(sp) + t10=ip*ido; + 83f4a87a: f436 sd a3,40(sp) + if(ido==1)goto L119; + 83f4a87c: 04f48ce3 beq s1,a5,83f4b0d4 + for(ik=0;ik + 83f4a884: fff9869b addiw a3,s3,-1 + 83f4a888: 02069793 slli a5,a3,0x20 + 83f4a88c: 01e7d693 srli a3,a5,0x1e + 83f4a890: 004b0613 addi a2,s6,4 + 83f4a894: 87da mv a5,s6 + 83f4a896: 8766 mv a4,s9 + 83f4a898: 96b2 add a3,a3,a2 + 83f4a89a: 0007a787 flw fa5,0(a5) + 83f4a89e: 0791 addi a5,a5,4 + 83f4a8a0: 0711 addi a4,a4,4 + 83f4a8a2: fef72e27 fsw fa5,-4(a4) + 83f4a8a6: fed79ae3 bne a5,a3,83f4a89a + for(j=1;j + 83f4a8b4: 002b9e93 slli t4,s7,0x2 + 83f4a8b8: 01da0533 add a0,s4,t4 + 83f4a8bc: 01d905b3 add a1,s2,t4 + 83f4a8c0: 00249793 slli a5,s1,0x2 + 83f4a8c4: 4f05 li t5,1 + for(k=0;k + ch[t2]=c1[t2]; + 83f4a8d0: 0006a787 flw fa5,0(a3) + for(k=0;k + for(j=1;j + 83f4a8ee: 8f3a mv t5,a4 + 83f4a8f0: bfd9 j 83f4a8c6 + if(nbd>l1){ + 83f4a8f2: 7762 ld a4,56(sp) + 83f4a8f4: 0ae45863 bge s0,a4,83f4a9a4 + 83f4a8f8: ffd4871b addiw a4,s1,-3 + 83f4a8fc: 0017571b srliw a4,a4,0x1 + 83f4a900: 0706 slli a4,a4,0x1 + 83f4a902: 0004869b sext.w a3,s1 + 83f4a906: e83a sd a4,16(sp) + 83f4a908: 008d8713 addi a4,s11,8 # ffffffff80000008 <_end+0xfffffffefc0002c8> + 83f4a90c: e436 sd a3,8(sp) + 83f4a90e: 9fa6 add t6,t6,s1 + 83f4a910: 8c76 mv s8,t4 + 83f4a912: 53fd li t2,-1 + 83f4a914: 4285 li t0,1 + 83f4a916: ec3a sd a4,24(sp) + for(i=2;i + 83f4a91e: 6742 ld a4,16(sp) + 83f4a920: 00239893 slli a7,t2,0x2 + 83f4a924: 0891 addi a7,a7,4 + 83f4a926: 01f705b3 add a1,a4,t6 + 83f4a92a: 6762 ld a4,24(sp) + 83f4a92c: 058a slli a1,a1,0x2 + 83f4a92e: 98ee add a7,a7,s11 + 83f4a930: 95ba add a1,a1,a4 + idij=is-1; + 83f4a932: 8562 mv a0,s8 + for(k=0;k + ch[t3-1]=wa[idij-1]*c1[t3-1]+wa[idij]*c1[t3]; + 83f4a944: 00472707 flw fa4,4(a4) + 83f4a948: 0086a587 flw fa1,8(a3) + 83f4a94c: 00072787 flw fa5,0(a4) + 83f4a950: 0046a607 flw fa2,4(a3) + 83f4a954: 10b77753 fmul.s fa4,fa4,fa1 + for(i=2;i + for(k=0;k + for(j=1;j + 83f4a9a0: 82ba mv t0,a4 + 83f4a9a2: bfa5 j 83f4a91a + for(j=1;jl1){ + 83f4a9b0: 537d li t1,-1 + t1=0; + 83f4a9b2: 4e81 li t4,0 + for(j=1;j + 83f4a9c6: 00271613 slli a2,a4,0x2 + 83f4a9ca: 0611 addi a2,a2,4 + 83f4a9cc: 966e add a2,a2,s11 + 83f4a9ce: 01d2883b addw a6,t0,t4 + t2=t1; + 83f4a9d2: 8576 mv a0,t4 + t2+=2; + 83f4a9d4: 2509 addiw a0,a0,2 + for(k=0;k + 83f4a9da: 00251693 slli a3,a0,0x2 + 83f4a9de: 00da0733 add a4,s4,a3 + 83f4a9e2: 4581 li a1,0 + 83f4a9e4: 96ca add a3,a3,s2 + ch[t3-1]=wa[idij-1]*c1[t3-1]+wa[idij]*c1[t3]; + 83f4a9e6: 00072587 flw fa1,0(a4) + 83f4a9ea: 00462707 flw fa4,4(a2) + 83f4a9ee: ffc72607 flw fa2,-4(a4) + 83f4a9f2: 00062787 flw fa5,0(a2) + 83f4a9f6: 10b77753 fmul.s fa4,fa4,fa1 + for(k=0;k + for(i=2;i + for(j=1;j + if(nbd + for(j=1;j + 83f4aa44: 77c2 ld a5,48(sp) + 83f4aa46: 5692 lw a3,36(sp) + 83f4aa48: ffd4871b addiw a4,s1,-3 + 83f4aa4c: 41778fb3 sub t6,a5,s7 + 83f4aa50: 40d00dbb negw s11,a3 + 83f4aa54: 001b9e93 slli t4,s7,0x1 + 83f4aa58: 9b79 andi a4,a4,-2 + 83f4aa5a: 41bb8c33 sub s8,s7,s11 + 83f4aa5e: 40fe8eb3 sub t4,t4,a5 + 83f4aa62: 0f89 addi t6,t6,2 + 83f4aa64: 2711 addiw a4,a4,4 + 83f4aa66: c86e sw s11,16(sp) + 83f4aa68: 0c0a slli s8,s8,0x2 + 83f4aa6a: 0e8a slli t4,t4,0x2 + 83f4aa6c: 409682bb subw t0,a3,s1 + 83f4aa70: 0d8a slli s11,s11,0x2 + 83f4aa72: 0f8a slli t6,t6,0x2 + 83f4aa74: 00249793 slli a5,s1,0x2 + 83f4aa78: 4385 li t2,1 + 83f4aa7a: c43a sw a4,8(sp) + for(i=2;i + 83f4aa82: 4722 lw a4,8(sp) + 83f4aa84: 0022831b addiw t1,t0,2 + 83f4aa88: 01f908b3 add a7,s2,t6 + 83f4aa8c: 01fa0833 add a6,s4,t6 + 83f4aa90: 00570f3b addw t5,a4,t0 + for(k=0;k + 83f4aa98: 01d886b3 add a3,a7,t4 + 83f4aa9c: 01d805b3 add a1,a6,t4 + 83f4aaa0: 8642 mv a2,a6 + 83f4aaa2: 8746 mv a4,a7 + 83f4aaa4: 4501 li a0,0 + c1[t5-1]=ch[t5-1]+ch[t6-1]; + 83f4aaa6: ffc72707 flw fa4,-4(a4) + 83f4aaaa: ffc6a787 flw fa5,-4(a3) + for(k=0;k + for(i=2;i + for(j=1;j + t2=ipp2*idl1; + 83f4ab0c: 033a8c3b mulw s8,s5,s3 + for(ik=0;ik + 83f4ab14: 86e6 mv a3,s9 + 83f4ab16: 875a mv a4,s6 + for(k=0;k + for(j=1;j + 83f4ab3e: 4f42 lw t5,16(sp) + 83f4ab40: 009b88b3 add a7,s7,s1 + 83f4ab44: 418888b3 sub a7,a7,s8 + 83f4ab48: 41e00fb3 neg t6,t5 + 83f4ab4c: 409b8833 sub a6,s7,s1 + 83f4ab50: 417c0733 sub a4,s8,s7 + 83f4ab54: 0f8a slli t6,t6,0x2 + 83f4ab56: 088a slli a7,a7,0x2 + 83f4ab58: 002b9293 slli t0,s7,0x2 + 83f4ab5c: 080a slli a6,a6,0x2 + 83f4ab5e: 0f0a slli t5,t5,0x2 + 83f4ab60: 00271313 slli t1,a4,0x2 + 83f4ab64: 00f903b3 add t2,s2,a5 + for(k=0;k + 83f4ab6e: 00780633 add a2,a6,t2 + 83f4ab72: 006906b3 add a3,s2,t1 + 83f4ab76: 006a0733 add a4,s4,t1 + 83f4ab7a: 4501 li a0,0 + c1[t3]=ch[t3]+ch[t4]; + 83f4ab7c: 0006a707 flw fa4,0(a3) + 83f4ab80: 00062787 flw fa5,0(a2) + 83f4ab84: 011705b3 add a1,a4,a7 + 83f4ab88: 95c2 add a1,a1,a6 + 83f4ab8a: 00e7f7d3 fadd.s fa5,fa5,fa4 + for(k=0;k + for(j=1;j + t3=(ip-1)*idl1; + 83f4abba: fffa8f9b addiw t6,s5,-1 + 83f4abbe: 033f8fbb mulw t6,t6,s3 + 83f4abc2: fff98a1b addiw s4,s3,-1 + 83f4abc6: 1a02 slli s4,s4,0x20 + 83f4abc8: 020a5a13 srli s4,s4,0x20 + 83f4abcc: 0019979b slliw a5,s3,0x1 + 83f4abd0: 01478533 add a0,a5,s4 + 83f4abd4: 40f007b3 neg a5,a5 + 83f4abd8: 078a slli a5,a5,0x2 + 83f4abda: 413c0eb3 sub t4,s8,s3 + 83f4abde: 004b0713 addi a4,s6,4 + 83f4abe2: 413f86b3 sub a3,t6,s3 + 83f4abe6: 4130083b negw a6,s3 + 83f4abea: 050a slli a0,a0,0x2 + 83f4abec: ec3e sd a5,24(sp) + 83f4abee: f0000053 fmv.w.x ft0,zero + 83f4abf2: 00269793 slli a5,a3,0x2 + 83f4abf6: 002a1893 slli a7,s4,0x2 + 83f4abfa: 00299313 slli t1,s3,0x2 + 83f4abfe: 0e8a slli t4,t4,0x2 + 83f4ac00: 413005b3 neg a1,s3 + 83f4ac04: fffa4a13 not s4,s4 + 83f4ac08: 00281d93 slli s11,a6,0x2 + 83f4ac0c: e43e sd a5,8(sp) + 83f4ac0e: 00e507b3 add a5,a0,a4 + 83f4ac12: e83e sd a5,16(sp) + 83f4ac14: e0c6 sd a7,64(sp) + 83f4ac16: 006c8f33 add t5,s9,t1 + 83f4ac1a: 9ee6 add t4,t4,s9 + 83f4ac1c: 01170ab3 add s5,a4,a7 + 83f4ac20: 0f8a slli t6,t6,0x2 + 83f4ac22: 00259393 slli t2,a1,0x2 + 83f4ac26: 82ee mv t0,s11 + 83f4ac28: 00007797 auipc a5,0x7 + 83f4ac2c: 6287a507 flw fa0,1576(a5) # 83f52250 <__func__.1+0x58> + 83f4ac30: 4c05 li s8,1 + 83f4ac32: 0a0a slli s4,s4,0x2 + ar1h=dcp*ar1-dsp*ai1; + 83f4ac34: 1006f753 fmul.s fa4,fa3,ft0 + ai1=dcp*ai1+dsp*ar1; + 83f4ac38: 10a6f7d3 fmul.s fa5,fa3,fa0 + for(ik=0;ik + ch2[t4++]=c2[ik]+ar1*c2[t7++]; + 83f4ac4e: 00678633 add a2,a5,t1 + 83f4ac52: 0007a707 flw fa4,0(a5) + 83f4ac56: 00062787 flw fa5,0(a2) + for(ik=0;ik + for(j=2;j + ar2=ar1; + 83f4ac82: 20a505d3 fmv.s fa1,fa0 + ai2=ai1; + 83f4ac86: 20000653 fmv.s fa2,ft0 + for(j=2;j + ch2[t6++]+=ar2*c2[t8++]; + 83f4acae: 00072707 flw fa4,0(a4) + 83f4acb2: 0007a787 flw fa5,0(a5) + ch2[t7++]+=ai2*c2[t9++]; + 83f4acb6: 00a78633 add a2,a5,a0 + for(ik=0;ik + for(j=2;j + for(l=1;l + 83f4acf4: 6786 ld a5,64(sp) + 83f4acf6: 004c8693 addi a3,s9,4 + 83f4acfa: 9b1a add s6,s6,t1 + 83f4acfc: 96be add a3,a3,a5 + 83f4acfe: 4605 li a2,1 + for(ik=0;ik + 83f4ad08: 0007a787 flw fa5,0(a5) + 83f4ad0c: 00072707 flw fa4,0(a4) + 83f4ad10: 0791 addi a5,a5,4 + 83f4ad12: 0711 addi a4,a4,4 + 83f4ad14: 00e7f7d3 fadd.s fa5,fa5,fa4 + 83f4ad18: fef7ae27 fsw fa5,-4(a5) + 83f4ad1c: fef696e3 bne a3,a5,83f4ad08 + for(j=1;j + if(ido + for(i=0;i + 83f4ad30: 77a2 ld a5,40(sp) + 83f4ad32: 88ca mv a7,s2 + 83f4ad34: 886a mv a6,s10 + 83f4ad36: 00249593 slli a1,s1,0x2 + 83f4ad3a: 00279613 slli a2,a5,0x2 + 83f4ad3e: 4501 li a0,0 + for(k=0;k + cc[t2]=ch[t1]; + 83f4ad4a: 00072787 flw fa5,0(a4) + for(k=0;k + for(i=0;i + t2=ido<<1; + 83f4ad66: 00149c1b slliw s8,s1,0x1 + for(j=1;j + 83f4ad72: 5792 lw a5,36(sp) + 83f4ad74: 41700fb3 neg t6,s7 + 83f4ad78: 002b9a13 slli s4,s7,0x2 + 83f4ad7c: 40f003bb negw t2,a5 + 83f4ad80: 77c2 ld a5,48(sp) + 83f4ad82: 002c1993 slli s3,s8,0x2 + 83f4ad86: 0f8a slli t6,t6,0x2 + 83f4ad88: 417785b3 sub a1,a5,s7 + 83f4ad8c: 77a2 ld a5,40(sp) + 83f4ad8e: 01490f33 add t5,s2,s4 + 83f4ad92: 013d0eb3 add t4,s10,s3 + 83f4ad96: 038a slli t2,t2,0x2 + 83f4ad98: 058a slli a1,a1,0x2 + 83f4ad9a: 00249893 slli a7,s1,0x2 + 83f4ad9e: 00279813 slli a6,a5,0x2 + 83f4ada2: 857e mv a0,t6 + 83f4ada4: 4305 li t1,1 + for(k=0;k + cc[t5-1]=ch[t6]; + 83f4adb0: 0007a787 flw fa5,0(a5) + cc[t5]=ch[t7]; + 83f4adb4: 00f506b3 add a3,a0,a5 + 83f4adb8: 96ae add a3,a3,a1 + cc[t5-1]=ch[t6]; + 83f4adba: fef72e27 fsw fa5,-4(a4) + cc[t5]=ch[t7]; + 83f4adbe: 0006a787 flw fa5,0(a3) + for(k=0;k + for(j=1;j + if(ido==1)return; + 83f4adde: 4785 li a5,1 + 83f4ade0: 0ef48563 beq s1,a5,83f4aeca + if(nbd + for(j=1;j + 83f4adf2: 5792 lw a5,36(sp) + 83f4adf4: 7742 ld a4,48(sp) + 83f4adf6: ffd4829b addiw t0,s1,-3 + 83f4adfa: 40f007bb negw a5,a5 + 83f4adfe: 417787b3 sub a5,a5,s7 + 83f4ae02: 078a slli a5,a5,0x2 + 83f4ae04: e43e sd a5,8(sp) + 83f4ae06: 77a2 ld a5,40(sp) + 83f4ae08: 41770f33 sub t5,a4,s7 + 83f4ae0c: 417f0f33 sub t5,t5,s7 + 83f4ae10: 9ce2 add s9,s9,s8 + 83f4ae12: 0012d29b srliw t0,t0,0x1 + 83f4ae16: 0f0a slli t5,t5,0x2 + 83f4ae18: 9ca6 add s9,s9,s1 + 83f4ae1a: 00249993 slli s3,s1,0x2 + 83f4ae1e: 00279393 slli t2,a5,0x2 + 83f4ae22: 0286 slli t0,t0,0x1 + 83f4ae24: 8b62 mv s6,s8 + 83f4ae26: 8ade mv s5,s7 + 83f4ae28: 4d85 li s11,1 + for(i=2;i + 83f4ae34: 002a9813 slli a6,s5,0x2 + 83f4ae38: 002b1513 slli a0,s6,0x2 + 83f4ae3c: 416c8eb3 sub t4,s9,s6 + 83f4ae40: 984a add a6,a6,s2 + 83f4ae42: 956a add a0,a0,s10 + 83f4ae44: 0e8a slli t4,t4,0x2 + 83f4ae46: 8356 mv t1,s5 + 83f4ae48: 4881 li a7,0 + for(i=2;i + 83f4ae4e: 005305b3 add a1,t1,t0 + 83f4ae52: 058a slli a1,a1,0x2 + 83f4ae54: 010f0733 add a4,t5,a6 + 83f4ae58: 00ae8633 add a2,t4,a0 + 83f4ae5c: 95d2 add a1,a1,s4 + 83f4ae5e: 86aa mv a3,a0 + 83f4ae60: 87c2 mv a5,a6 + cc[i+t7-1]=ch[i+t8-1]+ch[i+t9-1]; + 83f4ae62: 0047a787 flw fa5,4(a5) + 83f4ae66: 00472707 flw fa4,4(a4) + for(i=2;i + for(k=0;k + for(j=1;j +} + 83f4aeca: 60ae ld ra,200(sp) + 83f4aecc: 640e ld s0,192(sp) + 83f4aece: 74ea ld s1,184(sp) + 83f4aed0: 794a ld s2,176(sp) + 83f4aed2: 79aa ld s3,168(sp) + 83f4aed4: 7a0a ld s4,160(sp) + 83f4aed6: 6aea ld s5,152(sp) + 83f4aed8: 6b4a ld s6,144(sp) + 83f4aeda: 6baa ld s7,136(sp) + 83f4aedc: 6c0a ld s8,128(sp) + 83f4aede: 7ce6 ld s9,120(sp) + 83f4aee0: 7d46 ld s10,112(sp) + 83f4aee2: 7da6 ld s11,104(sp) + 83f4aee4: 2466 fld fs0,88(sp) + 83f4aee6: 6169 addi sp,sp,208 + 83f4aee8: 8082 ret + for(k=0;k + 83f4aeee: 67a6 ld a5,72(sp) + 83f4aef0: 00249813 slli a6,s1,0x2 + 83f4aef4: 854a mv a0,s2 + 83f4aef6: 02079713 slli a4,a5,0x20 + 83f4aefa: 01e75693 srli a3,a4,0x1e + 83f4aefe: 7722 ld a4,40(sp) + 83f4af00: 00490793 addi a5,s2,4 + 83f4af04: 85ea mv a1,s10 + 83f4af06: 00271893 slli a7,a4,0x2 + 83f4af0a: 96be add a3,a3,a5 + 83f4af0c: 4601 li a2,0 + for(i=0;i + 83f4af16: 0007a787 flw fa5,0(a5) + 83f4af1a: 0791 addi a5,a5,4 + 83f4af1c: 0711 addi a4,a4,4 + 83f4af1e: fef72e27 fsw fa5,-4(a4) + 83f4af22: fef69ae3 bne a3,a5,83f4af16 + for(k=0;k + 83f4af32: bd15 j 83f4ad66 + if(nbd>l1){ + 83f4af34: 77e2 ld a5,56(sp) + 83f4af36: b0f451e3 bge s0,a5,83f4aa38 + for(j=1;j + 83f4af40: 5792 lw a5,36(sp) + 83f4af42: ffd48e9b addiw t4,s1,-3 + 83f4af46: 001ede9b srliw t4,t4,0x1 + 83f4af4a: 40f00dbb negw s11,a5 + 83f4af4e: 77c2 ld a5,48(sp) + 83f4af50: c86e sw s11,16(sp) + 83f4af52: 0e86 slli t4,t4,0x1 + 83f4af54: 417782b3 sub t0,a5,s7 + 83f4af58: 0d8a slli s11,s11,0x2 + 83f4af5a: 028a slli t0,t0,0x2 + 83f4af5c: 00249793 slli a5,s1,0x2 + 83f4af60: 8c5e mv s8,s7 + 83f4af62: 4385 li t2,1 + for(i=2;i + for(i=2;i + 83f4af78: 010e8533 add a0,t4,a6 + 83f4af7c: 00281613 slli a2,a6,0x2 + 83f4af80: 050a slli a0,a0,0x2 + 83f4af82: 00c906b3 add a3,s2,a2 + 83f4af86: 01288733 add a4,a7,s2 + 83f4af8a: 9652 add a2,a2,s4 + 83f4af8c: 014885b3 add a1,a7,s4 + 83f4af90: 957e add a0,a0,t6 + c1[t5-1]=ch[t5-1]+ch[t6-1]; + 83f4af92: 0046a787 flw fa5,4(a3) + 83f4af96: 00472707 flw fa4,4(a4) + for(i=2;i + for(k=0;k + for(j=1;j + 83f4aff2: be29 j 83f4ab0c + for(j=1;j + 83f4aff8: 76c2 ld a3,48(sp) + 83f4affa: 5792 lw a5,36(sp) + 83f4affc: 001b9f13 slli t5,s7,0x1 + 83f4b000: 41768733 sub a4,a3,s7 + 83f4b004: 0709 addi a4,a4,2 + 83f4b006: 070a slli a4,a4,0x2 + 83f4b008: 993a add s2,s2,a4 + 83f4b00a: 7722 ld a4,40(sp) + 83f4b00c: 40f00abb negw s5,a5 + 83f4b010: ffd4879b addiw a5,s1,-3 + 83f4b014: 415b8b33 sub s6,s7,s5 + 83f4b018: 40df0f33 sub t5,t5,a3 + 83f4b01c: 9bf9 andi a5,a5,-2 + 83f4b01e: 5bf1 li s7,-4 + 83f4b020: 0b0a slli s6,s6,0x2 + 83f4b022: 0f0a slli t5,t5,0x2 + 83f4b024: 0a8a slli s5,s5,0x2 + 83f4b026: 00249513 slli a0,s1,0x2 + 83f4b02a: 00271393 slli t2,a4,0x2 + 83f4b02e: 8a62 mv s4,s8 + 83f4b030: 4985 li s3,1 + for(i=2;i + 83f4b03c: 005a0eb3 add t4,s4,t0 + 83f4b040: ffe28813 addi a6,t0,-2 + 83f4b044: 0e86 slli t4,t4,0x1 + 83f4b046: 080a slli a6,a6,0x2 + 83f4b048: 9eea add t4,t4,s10 + 83f4b04a: ffe2831b addiw t1,t0,-2 + 83f4b04e: 986a add a6,a6,s10 + 83f4b050: 005b8fbb addw t6,s7,t0 + 83f4b054: 0e86 slli t4,t4,0x1 + t6=idp2+t1-i; + 83f4b056: 88ca mv a7,s2 + for(k=0;k + 83f4b05c: 011f0733 add a4,t5,a7 + 83f4b060: 410e8633 sub a2,t4,a6 + 83f4b064: 86c2 mv a3,a6 + 83f4b066: 87c6 mv a5,a7 + 83f4b068: 4581 li a1,0 + cc[t7-1]=ch[t8-1]+ch[t9-1]; + 83f4b06a: ffc7a707 flw fa4,-4(a5) + 83f4b06e: ffc72787 flw fa5,-4(a4) + for(k=0;k + for(i=2;i + for(j=1;j + 83f4b0d2: bbe5 j 83f4aeca + t2=ipp2*idl1; + 83f4b0d4: 033a8c3b mulw s8,s5,s3 + for(ik=0;ik + 83f4b0dc: bc81 j 83f4ab2c + t2=ipp2*idl1; + 83f4b0de: 033a8c3b mulw s8,s5,s3 + for(ik=0;ik + 83f4b0e6: b189 j 83f4ad28 + +0000000083f4b0e8 : + +static void dradbg(int ido,int ip,int l1,int idl1,float *cc,float *c1, + float *c2,float *ch,float *ch2,float *wa){ + 83f4b0e8: 7115 addi sp,sp,-224 + 83f4b0ea: b4a2 fsd fs0,104(sp) + float dcp,arg,dsp,ar1h,ar2h; + int ipp2; + + t10=ip*ido; + t0=l1*ido; + arg=tpi/(float)ip; + 83f4b0ec: d005f453 fcvt.s.w fs0,a1 + float *c2,float *ch,float *ch2,float *wa){ + 83f4b0f0: e9a2 sd s0,208(sp) + arg=tpi/(float)ip; + 83f4b0f2: 00007417 auipc s0,0x7 + 83f4b0f6: 37242787 flw fa5,882(s0) # 83f52464 <__func__.1+0x26c> + 83f4b0fa: 1887f453 fdiv.s fs0,fa5,fs0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4b0fe: e566 sd s9,136(sp) + t0=l1*ido; + 83f4b100: 02c50cbb mulw s9,a0,a2 + float *c2,float *ch,float *ch2,float *wa){ + 83f4b104: ed86 sd ra,216(sp) + 83f4b106: e5a6 sd s1,200(sp) + 83f4b108: e1ca sd s2,192(sp) + 83f4b10a: fd4e sd s3,184(sp) + 83f4b10c: 892a mv s2,a0 + 83f4b10e: 89be mv s3,a5 + 83f4b110: f952 sd s4,176(sp) + 83f4b112: f556 sd s5,168(sp) + 83f4b114: f15a sd s6,160(sp) + 83f4b116: 8aba mv s5,a4 + 83f4b118: ed5e sd s7,152(sp) + 83f4b11a: e962 sd s8,144(sp) + t10=ip*ido; + 83f4b11c: 02a58bbb mulw s7,a1,a0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4b120: e16a sd s10,128(sp) + 83f4b122: e42e sd a1,8(sp) + 83f4b124: 8d2e mv s10,a1 + 83f4b126: 8432 mv s0,a2 + dcp=(float)cos(arg); + 83f4b128: 42040453 fcvt.d.s fs0,fs0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4b12c: 8a36 mv s4,a3 + 83f4b12e: e8c2 sd a6,80(sp) + dcp=(float)cos(arg); + 83f4b130: 22840553 fmv.d fa0,fs0 + float *c2,float *ch,float *ch2,float *wa){ + 83f4b134: 84c6 mv s1,a7 + 83f4b136: 7c0e ld s8,224(sp) + 83f4b138: fcee sd s11,120(sp) + dcp=(float)cos(arg); + 83f4b13a: f98f50ef jal ra,83f408d2 + 83f4b13e: 22a507d3 fmv.d fa5,fa0 + dsp=(float)sin(arg); + 83f4b142: 22840553 fmv.d fa0,fs0 + t0=l1*ido; + 83f4b146: 8b66 mv s6,s9 + dcp=(float)cos(arg); + 83f4b148: 4017f453 fcvt.s.d fs0,fa5 + dsp=(float)sin(arg); + 83f4b14c: a1bf50ef jal ra,83f40b66 + nbd=(ido-1)>>1; + 83f4b150: fff9079b addiw a5,s2,-1 + 83f4b154: 4017d71b sraiw a4,a5,0x1 + ipp2=ip; + ipph=(ip+1)>>1; + 83f4b158: 001d0f1b addiw t5,s10,1 + nbd=(ido-1)>>1; + 83f4b15c: fc3a sd a4,56(sp) + dsp=(float)sin(arg); + 83f4b15e: 401575d3 fcvt.s.d fa1,fa0 + ipph=(ip+1)>>1; + 83f4b162: 401f5f1b sraiw t5,t5,0x1 + if(ido + + t1=0; + t2=0; + for(k=0;k + 83f4b16e: 02079713 slli a4,a5,0x20 + 83f4b172: 01e75793 srli a5,a4,0x1e + 83f4b176: 004a8693 addi a3,s5,4 + 83f4b17a: 002b9813 slli a6,s7,0x2 + 83f4b17e: 8556 mv a0,s5 + 83f4b180: 00291893 slli a7,s2,0x2 + 83f4b184: 85a6 mv a1,s1 + 83f4b186: 96be add a3,a3,a5 + 83f4b188: 4601 li a2,0 + t3=t1; + t4=t2; + for(i=0;i + ch[t3]=cc[t4]; + 83f4b192: 0007a787 flw fa5,0(a5) + for(i=0;i + for(k=0;k + t1++; + } + + L106: + t1=0; + t2=ipp2*t0; + 83f4b1ae: 6722 ld a4,8(sp) + t7=(t5=ido<<1); + for(j=1;j + 83f4b1c0: 419007b3 neg a5,s9 + 83f4b1c4: 41600fbb negw t6,s6 + 83f4b1c8: 00279293 slli t0,a5,0x2 + 83f4b1cc: ecbe sd a5,88(sp) + 83f4b1ce: 002d9b13 slli s6,s11,0x2 + 83f4b1d2: 419707b3 sub a5,a4,s9 + 83f4b1d6: 002c9d13 slli s10,s9,0x2 + 83f4b1da: c2fe sw t6,68(sp) + 83f4b1dc: e4be sd a5,72(sp) + 83f4b1de: 016a8eb3 add t4,s5,s6 + 83f4b1e2: 01a48e33 add t3,s1,s10 + 83f4b1e6: 0f8a slli t6,t6,0x2 + 83f4b1e8: 00279893 slli a7,a5,0x2 + 83f4b1ec: 002b9513 slli a0,s7,0x2 + 83f4b1f0: 00291713 slli a4,s2,0x2 + 83f4b1f4: 8816 mv a6,t0 + 83f4b1f6: 4305 li t1,1 + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + t6=t5; + for(k=0;k + ch[t3]=cc[t6-1]+cc[t6-1]; + 83f4b202: ffc7a787 flw fa5,-4(a5) + ch[t4]=cc[t6]+cc[t6]; + 83f4b206: 01068633 add a2,a3,a6 + 83f4b20a: 9646 add a2,a2,a7 + ch[t3]=cc[t6-1]+cc[t6-1]; + 83f4b20c: 00f7f7d3 fadd.s fa5,fa5,fa5 + for(k=0;k + for(j=1;j + t6+=t10; + } + t5+=t7; + } + + if (ido == 1)goto L116; + 83f4b238: 4785 li a5,1 + 83f4b23a: 0af90d63 beq s2,a5,83f4b2f4 + if(nbd + 83f4b244: ffd9079b addiw a5,s2,-3 + 83f4b248: 9bf9 andi a5,a5,-2 + } + goto L116; + + L112: + t1=0; + t2=ipp2*t0; + 83f4b24a: 6b42 ld s6,16(sp) + 83f4b24c: 2789 addiw a5,a5,2 + t7=0; + 83f4b24e: 4281 li t0,0 + t1=0; + 83f4b250: 4b81 li s7,0 + for(j=1;j + 83f4b268: 47e2 lw a5,24(sp) + t9=t7; + 83f4b26a: 8e96 mv t4,t0 + t8=t7; + 83f4b26c: 8e16 mv t3,t0 + 83f4b26e: 01778fbb addw t6,a5,s7 + t4=t2; + 83f4b272: 835a mv t1,s6 + t3=t1; + 83f4b274: 88de mv a7,s7 + t3+=2; + 83f4b276: 2889 addiw a7,a7,2 + t4+=2; + 83f4b278: 2309 addiw t1,t1,2 + t8+=2; + 83f4b27a: 2e09 addiw t3,t3,2 + t9-=2; + 83f4b27c: 3ef9 addiw t4,t4,-2 + t5=t3; + t6=t4; + t11=t8; + t12=t9; + for(k=0;k + 83f4b282: 002e1693 slli a3,t3,0x2 + 83f4b286: 002e9793 slli a5,t4,0x2 + 83f4b28a: 00289593 slli a1,a7,0x2 + 83f4b28e: 00231613 slli a2,t1,0x2 + 83f4b292: 96d6 add a3,a3,s5 + 83f4b294: 97d6 add a5,a5,s5 + 83f4b296: 95a6 add a1,a1,s1 + 83f4b298: 9626 add a2,a2,s1 + 83f4b29a: 4801 li a6,0 + ch[t5-1]=cc[t11-1]+cc[t12-1]; + 83f4b29c: ffc7a707 flw fa4,-4(a5) + 83f4b2a0: ffc6a787 flw fa5,-4(a3) + for(k=0;k + for(i=2;i + for(j=1;j + ar1=1.f; + ai1=0.f; + t1=0; + t9=(t2=ipp2*idl1); + t3=(ip-1)*idl1; + for(l=1;l + 83f4b314: 00261e93 slli t4,a2,0x2 + 83f4b318: 068a slli a3,a3,0x2 + 83f4b31a: 4140083b negw a6,s4 + 83f4b31e: 41450533 sub a0,a0,s4 + 83f4b322: 00251b13 slli s6,a0,0x2 + 83f4b326: 088a slli a7,a7,0x2 + 83f4b328: 41450533 sub a0,a0,s4 + t9=(t2=ipp2*idl1); + 83f4b32c: f0000053 fmv.w.x ft0,zero + 83f4b330: 080a slli a6,a6,0x2 + 83f4b332: 002a1e13 slli t3,s4,0x2 + 83f4b336: 414005b3 neg a1,s4 + 83f4b33a: fff64613 not a2,a2 + 83f4b33e: 9ebe add t4,t4,a5 + 83f4b340: f836 sd a3,48(sp) + 83f4b342: 97c6 add a5,a5,a7 + 83f4b344: 00251693 slli a3,a0,0x2 + 83f4b348: 01cf82b3 add t0,t6,t3 + 83f4b34c: f03e sd a5,32(sp) + 83f4b34e: f442 sd a6,40(sp) + 83f4b350: 9fda add t6,t6,s6 + 83f4b352: 00259a93 slli s5,a1,0x2 + 83f4b356: 83c2 mv t2,a6 + 83f4b358: ec36 sd a3,24(sp) + 83f4b35a: 00007797 auipc a5,0x7 + 83f4b35e: ef67a507 flw fa0,-266(a5) # 83f52250 <__func__.1+0x58> + 83f4b362: 4d85 li s11,1 + 83f4b364: 00261b93 slli s7,a2,0x2 + t1+=idl1; + t2-=idl1; + + ar1h=dcp*ar1-dsp*ai1; + 83f4b368: 1005f753 fmul.s fa4,fa1,ft0 + ai1=dcp*ai1+dsp*ar1; + 83f4b36c: 10a5f7d3 fmul.s fa5,fa1,fa0 + t4=t1; + t5=t2; + t6=0; + t7=idl1; + t8=t3; + for(ik=0;ik + c2[t4++]=ch2[t6++]+ar1*ch2[t7++]; + 83f4b382: 01c785b3 add a1,a5,t3 + 83f4b386: 0007a707 flw fa4,0(a5) + 83f4b38a: 0005a787 flw fa5,0(a1) + for(ik=0;ik + ar2=ar1; + ai2=ai1; + + t6=idl1; + t7=t9-idl1; + for(j=2;j + ar2=ar1; + 83f4b3b6: 20a50653 fmv.s fa2,fa0 + ai2=ai1; + 83f4b3ba: 200006d3 fmv.s fa3,ft0 + for(j=2;j + c2[t4++]+=ar2*ch2[t11++]; + 83f4b3e2: 0006a707 flw fa4,0(a3) + 83f4b3e6: 0007a787 flw fa5,0(a5) + c2[t5++]+=ai2*ch2[t12++]; + 83f4b3ea: 010785b3 add a1,a5,a6 + for(ik=0;ik + for(j=2;j + for(l=1;l + for(ik=0;ik + 83f4b434: 00c786b3 add a3,a5,a2 + 83f4b438: 0007a787 flw fa5,0(a5) + 83f4b43c: 0006a707 flw fa4,0(a3) + 83f4b440: 0791 addi a5,a5,4 + 83f4b442: 00e7f7d3 fadd.s fa5,fa5,fa4 + 83f4b446: fef7ae27 fsw fa5,-4(a5) + 83f4b44a: ffd795e3 bne a5,t4,83f4b434 + for(j=1;j + 83f4b456: 67e6 ld a5,88(sp) + 83f4b458: 4f96 lw t6,68(sp) + 83f4b45a: 01a98eb3 add t4,s3,s10 + 83f4b45e: 00279293 slli t0,a5,0x2 + 83f4b462: 67a6 ld a5,72(sp) + 83f4b464: 01a48e33 add t3,s1,s10 + 83f4b468: 0f8a slli t6,t6,0x2 + 83f4b46a: 00279813 slli a6,a5,0x2 + 83f4b46e: 8896 mv a7,t0 + 83f4b470: 4305 li t1,1 + for(j=1;j + 83f4b476: 01098633 add a2,s3,a6 + 83f4b47a: 86f2 mv a3,t3 + 83f4b47c: 87f6 mv a5,t4 + 83f4b47e: 4501 li a0,0 + ch[t3]=c1[t3]-c1[t4]; + 83f4b480: 00062707 flw fa4,0(a2) + 83f4b484: 0007a787 flw fa5,0(a5) + ch[t4]=c1[t3]+c1[t4]; + 83f4b488: 00d885b3 add a1,a7,a3 + 83f4b48c: 95c2 add a1,a1,a6 + ch[t3]=c1[t3]-c1[t4]; + 83f4b48e: 08e7f7d3 fsub.s fa5,fa5,fa4 + for(k=0;k + for(j=1;j + t3+=ido; + t4+=ido; + } + } + + if(ido==1)goto L132; + 83f4b4c0: 4785 li a5,1 + 83f4b4c2: 1af90863 beq s2,a5,83f4b672 + if(nbd + goto L132; + + L128: + t1=0; + t2=ipp2*t0; + for(j=1;j + 83f4b4d4: ffd90f9b addiw t6,s2,-3 + 83f4b4d8: ffefff93 andi t6,t6,-2 + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + for(i=2;i + t4=t2; + 83f4b4f0: 68c2 ld a7,16(sp) + 83f4b4f2: 01df833b addw t1,t6,t4 + t3=t1; + 83f4b4f6: 8876 mv a6,t4 + t3+=2; + 83f4b4f8: 2809 addiw a6,a6,2 + t4+=2; + 83f4b4fa: 2889 addiw a7,a7,2 + t5=t3; + t6=t4; + for(k=0;k + 83f4b500: 00281593 slli a1,a6,0x2 + 83f4b504: 00289613 slli a2,a7,0x2 + 83f4b508: 00b986b3 add a3,s3,a1 + 83f4b50c: 00c987b3 add a5,s3,a2 + 83f4b510: 95a6 add a1,a1,s1 + 83f4b512: 9626 add a2,a2,s1 + 83f4b514: 4501 li a0,0 + ch[t5-1]=c1[t5-1]-c1[t6]; + 83f4b516: 0007a707 flw fa4,0(a5) + 83f4b51a: ffc6a787 flw fa5,-4(a3) + for(k=0;k + for(i=2;i + for(j=1;j + } + +L132: + if(ido==1)return; + + for(ik=0;ik + 83f4b572: fffa071b addiw a4,s4,-1 + 83f4b576: 02071793 slli a5,a4,0x20 + 83f4b57a: 01e7d713 srli a4,a5,0x1e + 83f4b57e: 67c6 ld a5,80(sp) + 83f4b580: 004c0693 addi a3,s8,4 + 83f4b584: 9736 add a4,a4,a3 + 83f4b586: 000c2787 flw fa5,0(s8) + 83f4b58a: 0c11 addi s8,s8,4 + 83f4b58c: 0791 addi a5,a5,4 + 83f4b58e: fef7ae27 fsw fa5,-4(a5) + 83f4b592: ff871ae3 bne a4,s8,83f4b586 + + t1=0; + for(j=1;j + 83f4b59e: 002c9513 slli a0,s9,0x2 + 83f4b5a2: 00a48333 add t1,s1,a0 + 83f4b5a6: 00a988b3 add a7,s3,a0 + 83f4b5aa: 00291713 slli a4,s2,0x2 + 83f4b5ae: 8e46 mv t3,a7 + 83f4b5b0: 859a mv a1,t1 + 83f4b5b2: 4805 li a6,1 + t2=(t1+=t0); + for(k=0;k + c1[t2]=ch[t2]; + 83f4b5be: 0006a787 flw fa5,0(a3) + for(k=0;k + for(j=1;j + 83f4b5de: 883e mv a6,a5 + 83f4b5e0: bfd1 j 83f4b5b4 + t2+=ido; + } + } + + if(nbd>l1)goto L139; + 83f4b5e2: 77e2 ld a5,56(sp) + 83f4b5e4: 26f44563 blt s0,a5,83f4b84e + + is= -ido-1; + t1=0; + for(j=1;j + 83f4b606: 006e883b addw a6,t4,t1 + 83f4b60a: 8672 mv a2,t3 + t2=t1; + 83f4b60c: 851a mv a0,t1 + t2+=2; + 83f4b60e: 2509 addiw a0,a0,2 + idij+=2; + t3=t2; + for(k=0;k + 83f4b614: 00251693 slli a3,a0,0x2 + 83f4b618: 00d487b3 add a5,s1,a3 + 83f4b61c: 4581 li a1,0 + 83f4b61e: 96ce add a3,a3,s3 + c1[t3-1]=wa[idij-1]*ch[t3-1]-wa[idij]*ch[t3]; + 83f4b620: 0007a607 flw fa2,0(a5) + 83f4b624: 00862707 flw fa4,8(a2) + 83f4b628: ffc7a687 flw fa3,-4(a5) + 83f4b62c: 00462787 flw fa5,4(a2) + 83f4b630: 10c77753 fmul.s fa4,fa4,fa2 + for(k=0;k + for(i=2;i + for(j=1;j + c1[t3]=wa[idij-1]*ch[t3]+wa[idij]*ch[t3-1]; + } + t2+=ido; + } + } +} + 83f4b672: 60ee ld ra,216(sp) + 83f4b674: 644e ld s0,208(sp) + 83f4b676: 64ae ld s1,200(sp) + 83f4b678: 690e ld s2,192(sp) + 83f4b67a: 79ea ld s3,184(sp) + 83f4b67c: 7a4a ld s4,176(sp) + 83f4b67e: 7aaa ld s5,168(sp) + 83f4b680: 7b0a ld s6,160(sp) + 83f4b682: 6bea ld s7,152(sp) + 83f4b684: 6c4a ld s8,144(sp) + 83f4b686: 6caa ld s9,136(sp) + 83f4b688: 6d0a ld s10,128(sp) + 83f4b68a: 7de6 ld s11,120(sp) + 83f4b68c: 3426 fld fs0,104(sp) + 83f4b68e: 612d addi sp,sp,224 + 83f4b690: 8082 ret + for(i=0;i + 83f4b696: 88d6 mv a7,s5 + 83f4b698: 8826 mv a6,s1 + 83f4b69a: 002b9593 slli a1,s7,0x2 + 83f4b69e: 00291613 slli a2,s2,0x2 + 83f4b6a2: 4501 li a0,0 + for(k=0;k + ch[t2]=cc[t3]; + 83f4b6ae: 00072787 flw fa5,0(a4) + for(k=0;k + t1++; + 83f4b6c0: 2505 addiw a0,a0,1 + for(i=0;i + t2=ipp2*t0; + 83f4b6ca: 6722 ld a4,8(sp) + for(j=1;j + if (ido == 1)goto L116; + 83f4b6dc: e8f919e3 bne s2,a5,83f4b56e + 83f4b6e0: bf49 j 83f4b672 + for(j=1;j + 83f4b6e6: 4a96 lw s5,68(sp) + 83f4b6e8: 67a6 ld a5,72(sp) + 83f4b6ea: ffd90e1b addiw t3,s2,-3 + 83f4b6ee: 001e5e1b srliw t3,t3,0x1 + 83f4b6f2: 0a8a slli s5,s5,0x2 + 83f4b6f4: 00279b13 slli s6,a5,0x2 + 83f4b6f8: 0e06 slli t3,t3,0x1 + 83f4b6fa: 83e6 mv t2,s9 + 83f4b6fc: 4285 li t0,1 + for(i=2;i + for(i=2;i + 83f4b712: 01c80533 add a0,a6,t3 + 83f4b716: 00281613 slli a2,a6,0x2 + 83f4b71a: 050a slli a0,a0,0x2 + 83f4b71c: 013606b3 add a3,a2,s3 + 83f4b720: 011987b3 add a5,s3,a7 + 83f4b724: 9626 add a2,a2,s1 + 83f4b726: 011485b3 add a1,s1,a7 + 83f4b72a: 957e add a0,a0,t6 + ch[t5-1]=c1[t5-1]-c1[t6]; + 83f4b72c: 0046a787 flw fa5,4(a3) + 83f4b730: 0087a707 flw fa4,8(a5) + for(i=2;i + for(k=0;k + for(j=1;j + 83f4b78c: b3cd j 83f4b56e + for(j=1;j + 83f4b7c0: 6362 ld t1,24(sp) + 83f4b7c2: 002b9893 slli a7,s7,0x2 + 83f4b7c6: 98a6 add a7,a7,s1 + 83f4b7c8: 8ede mv t4,s7 + 83f4b7ca: 4e01 li t3,0 + for(i=2;i + 83f4b7d0: 01d28833 add a6,t0,t4 + 83f4b7d4: 080a slli a6,a6,0x2 + 83f4b7d6: 01f885b3 add a1,a7,t6 + 83f4b7da: 9856 add a6,a6,s5 + 83f4b7dc: 8646 mv a2,a7 + 83f4b7de: 869a mv a3,t1 + 83f4b7e0: 879a mv a5,t1 + ch[t5-1]=cc[t9-1]+cc[t11-1]; + 83f4b7e2: 0047a787 flw fa5,4(a5) + 83f4b7e6: ff46a707 flw fa4,-12(a3) + for(i=2;i + for(k=0;k + for(j=1;j + 83f4b84c: b465 j 83f4b2f4 + 83f4b84e: 77ae ld a5,232(sp) + 83f4b850: ffd9049b addiw s1,s2,-3 + 83f4b854: 0014d49b srliw s1,s1,0x1 + 83f4b858: ffc78f13 addi t5,a5,-4 + 83f4b85c: 0486 slli s1,s1,0x1 + if(nbd>l1)goto L139; + 83f4b85e: 53fd li t2,-1 + 83f4b860: 4285 li t0,1 + 83f4b862: 00878993 addi s3,a5,8 + for(i=2;i + 83f4b86c: 007485b3 add a1,s1,t2 + 83f4b870: 058a slli a1,a1,0x2 + 83f4b872: 95ce add a1,a1,s3 + 83f4b874: 8a46 mv s4,a7 + 83f4b876: 8e9a mv t4,t1 + 83f4b878: 4e01 li t3,0 + for(i=2;i + c1[t3-1]=wa[idij-1]*ch[t3-1]-wa[idij]*ch[t3]; + 83f4b884: 0087a707 flw fa4,8(a5) + 83f4b888: 0086a607 flw fa2,8(a3) + 83f4b88c: 0047a787 flw fa5,4(a5) + 83f4b890: 0046a687 flw fa3,4(a3) + 83f4b894: 10c77753 fmul.s fa4,fa4,fa2 + for(i=2;i + for(k=0;k + for(j=1;j + 83f4b8e0: 82be mv t0,a5 + 83f4b8e2: b759 j 83f4b868 + +0000000083f4b8e4 : + if(na==0)return; + + for(i=0;in==1)return; + 83f4b900: 4100 lw s0,0(a0) + 83f4b902: 4785 li a5,1 + 83f4b904: 0ef40a63 beq s0,a5,83f4b9f8 + drftf1(l->n,data,l->trigcache,l->trigcache+l->n,l->splitcache); + 83f4b908: 01053c83 ld s9,16(a0) + 83f4b90c: 00853b83 ld s7,8(a0) + 83f4b910: 00241493 slli s1,s0,0x2 + nf=ifac[1]; + 83f4b914: 004ca783 lw a5,4(s9) + drftf1(l->n,data,l->trigcache,l->trigcache+l->n,l->splitcache); + 83f4b918: 94de add s1,s1,s7 + for(k1=0;k1 + 83f4b91e: 00178713 addi a4,a5,1 + 83f4b922: 070a slli a4,a4,0x2 + 83f4b924: 37fd addiw a5,a5,-1 + 83f4b926: ffc70913 addi s2,a4,-4 + 83f4b92a: 02079693 slli a3,a5,0x20 + 83f4b92e: 9966 add s2,s2,s9 + 83f4b930: 01e6d793 srli a5,a3,0x1e + 83f4b934: 8c2e mv s8,a1 + 83f4b936: 9cba add s9,s9,a4 + 83f4b938: 40f90933 sub s2,s2,a5 + 83f4b93c: 8d22 mv s10,s0 + 83f4b93e: 8da2 mv s11,s0 + na=1; + 83f4b940: 4605 li a2,1 + na=1-na; + 83f4b942: 4a05 li s4,1 + if(ip!=4)goto L102; + 83f4b944: 4991 li s3,4 + if(ip!=2)goto L104; + 83f4b946: 4a89 li s5,2 + 83f4b948: a805 j 83f4b978 + 83f4b94a: 0d558663 beq a1,s5,83f4ba16 + if(ido==1)na=1-na; + 83f4b94e: 4805 li a6,1 + 83f4b950: 01051363 bne a0,a6,83f4b956 + 83f4b954: 8b32 mv s6,a2 + dradfg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + 83f4b956: e43a sd a4,8(sp) + idl1=ido*l1; + 83f4b958: 02d786bb mulw a3,a5,a3 + if(na!=0)goto L109; + 83f4b95c: 0e0b0463 beqz s6,83f4ba44 + dradfg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + 83f4b960: 866e mv a2,s11 + 83f4b962: e062 sd s8,0(sp) + 83f4b964: 88e2 mv a7,s8 + 83f4b966: 885e mv a6,s7 + 83f4b968: 87de mv a5,s7 + 83f4b96a: 875e mv a4,s7 + 83f4b96c: e87fe0ef jal ra,83f4a7f2 + na=0; + 83f4b970: 4601 li a2,0 + for(k1=0;k1 + ido=n/l2; + 83f4b978: 03b4453b divw a0,s0,s11 + ip=ifac[kh+1]; + 83f4b97c: 000ca583 lw a1,0(s9) + na=1-na; + 83f4b980: 40ca0b3b subw s6,s4,a2 + iw-=(ip-1)*ido; + 83f4b984: fff5831b addiw t1,a1,-1 + l1=l2/ip; + 83f4b988: 02bdcdbb divw s11,s11,a1 + ido=n/l2; + 83f4b98c: 86aa mv a3,a0 + iw-=(ip-1)*ido; + 83f4b98e: 02a3033b mulw t1,t1,a0 + l1=l2/ip; + 83f4b992: 87ee mv a5,s11 + iw-=(ip-1)*ido; + 83f4b994: 406d0d3b subw s10,s10,t1 + dradfg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + 83f4b998: 002d1713 slli a4,s10,0x2 + 83f4b99c: 1771 addi a4,a4,-4 + 83f4b99e: 9726 add a4,a4,s1 + if(ip!=4)goto L102; + 83f4b9a0: fb3595e3 bne a1,s3,83f4b94a + ix2=iw+ido; + 83f4b9a4: 01a507bb addw a5,a0,s10 + dradf4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4b9a8: 00f5083b addw a6,a0,a5 + 83f4b9ac: 080a slli a6,a6,0x2 + 83f4b9ae: 078a slli a5,a5,0x2 + 83f4b9b0: 17f1 addi a5,a5,-4 + 83f4b9b2: 1871 addi a6,a6,-4 + 83f4b9b4: 97a6 add a5,a5,s1 + 83f4b9b6: 9826 add a6,a6,s1 + if(na!=0) + 83f4b9b8: 060b0863 beqz s6,83f4ba28 + dradf4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4b9bc: 865e mv a2,s7 + 83f4b9be: 86e2 mv a3,s8 + 83f4b9c0: 85ee mv a1,s11 + 83f4b9c2: ce4fe0ef jal ra,83f49ea6 + for(k1=0;k1 + if(na==1)return; + 83f4b9ce: 4785 li a5,1 + 83f4b9d0: 02f60463 beq a2,a5,83f4b9f8 + for(i=0;i + 83f4b9d8: 347d addiw s0,s0,-1 + 83f4b9da: 02041793 slli a5,s0,0x20 + 83f4b9de: 01e7d413 srli s0,a5,0x1e + 83f4b9e2: 004b8793 addi a5,s7,4 + 83f4b9e6: 943e add s0,s0,a5 + 83f4b9e8: 000ba787 flw fa5,0(s7) + 83f4b9ec: 0b91 addi s7,s7,4 + 83f4b9ee: 0c11 addi s8,s8,4 + 83f4b9f0: fefc2e27 fsw fa5,-4(s8) + 83f4b9f4: ff741ae3 bne s0,s7,83f4b9e8 +} + 83f4b9f8: 70e6 ld ra,120(sp) + 83f4b9fa: 7446 ld s0,112(sp) + 83f4b9fc: 74a6 ld s1,104(sp) + 83f4b9fe: 7906 ld s2,96(sp) + 83f4ba00: 69e6 ld s3,88(sp) + 83f4ba02: 6a46 ld s4,80(sp) + 83f4ba04: 6aa6 ld s5,72(sp) + 83f4ba06: 6b06 ld s6,64(sp) + 83f4ba08: 7be2 ld s7,56(sp) + 83f4ba0a: 7c42 ld s8,48(sp) + 83f4ba0c: 7ca2 ld s9,40(sp) + 83f4ba0e: 7d02 ld s10,32(sp) + 83f4ba10: 6de2 ld s11,24(sp) + 83f4ba12: 6109 addi sp,sp,128 + 83f4ba14: 8082 ret + if(na!=0)goto L103; + 83f4ba16: 020b0063 beqz s6,83f4ba36 + dradf2(ido,l1,ch,c,wa+iw-1); + 83f4ba1a: 865e mv a2,s7 + 83f4ba1c: 86e2 mv a3,s8 + 83f4ba1e: 85ee mv a1,s11 + 83f4ba20: b12fe0ef jal ra,83f49d32 + goto L110; + 83f4ba24: 865a mv a2,s6 + 83f4ba26: b7b1 j 83f4b972 + dradf4(ido,l1,c,ch,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4ba28: 8662 mv a2,s8 + 83f4ba2a: 86de mv a3,s7 + 83f4ba2c: 85ee mv a1,s11 + 83f4ba2e: c78fe0ef jal ra,83f49ea6 + 83f4ba32: 4601 li a2,0 + 83f4ba34: bf3d j 83f4b972 + dradf2(ido,l1,c,ch,wa+iw-1); + 83f4ba36: 8662 mv a2,s8 + 83f4ba38: 86de mv a3,s7 + 83f4ba3a: 85ee mv a1,s11 + 83f4ba3c: af6fe0ef jal ra,83f49d32 + na=1-na; + 83f4ba40: 4601 li a2,0 + goto L110; + 83f4ba42: bf05 j 83f4b972 + dradfg(ido,ip,l1,idl1,c,c,c,ch,ch,wa+iw-1); + 83f4ba44: 866e mv a2,s11 + 83f4ba46: e05e sd s7,0(sp) + 83f4ba48: 88de mv a7,s7 + 83f4ba4a: 8862 mv a6,s8 + 83f4ba4c: 87e2 mv a5,s8 + 83f4ba4e: 8762 mv a4,s8 + 83f4ba50: da3fe0ef jal ra,83f4a7f2 + na=1; + 83f4ba54: 4605 li a2,1 + goto L110; + 83f4ba56: bf31 j 83f4b972 + +0000000083f4ba58 : + +void core_drft_backward(struct drft_lookup *l,float *data){ + 83f4ba58: 7175 addi sp,sp,-144 + 83f4ba5a: e506 sd ra,136(sp) + 83f4ba5c: e122 sd s0,128(sp) + 83f4ba5e: fca6 sd s1,120(sp) + 83f4ba60: f8ca sd s2,112(sp) + 83f4ba62: f4ce sd s3,104(sp) + 83f4ba64: f0d2 sd s4,96(sp) + 83f4ba66: ecd6 sd s5,88(sp) + 83f4ba68: e8da sd s6,80(sp) + 83f4ba6a: e4de sd s7,72(sp) + 83f4ba6c: e0e2 sd s8,64(sp) + 83f4ba6e: fc66 sd s9,56(sp) + 83f4ba70: f86a sd s10,48(sp) + 83f4ba72: f46e sd s11,40(sp) + if (l->n==1)return; + 83f4ba74: 4104 lw s1,0(a0) + 83f4ba76: 4785 li a5,1 + 83f4ba78: 10f48063 beq s1,a5,83f4bb78 + drftb1(l->n,data,l->trigcache,l->trigcache+l->n,l->splitcache); + 83f4ba7c: 01053c83 ld s9,16(a0) + 83f4ba80: 00853d03 ld s10,8(a0) + 83f4ba84: 00249913 slli s2,s1,0x2 + nf=ifac[1]; + 83f4ba88: 004ca983 lw s3,4(s9) + drftb1(l->n,data,l->trigcache,l->trigcache+l->n,l->splitcache); + 83f4ba8c: 996a add s2,s2,s10 + for(k1=0;k1 + 83f4ba92: 39fd addiw s3,s3,-1 + 83f4ba94: 02099793 slli a5,s3,0x20 + 83f4ba98: 01e7d993 srli s3,a5,0x1e + 83f4ba9c: 00cc8793 addi a5,s9,12 + 83f4baa0: 8dae mv s11,a1 + 83f4baa2: 0ca1 addi s9,s9,8 + 83f4baa4: 99be add s3,s3,a5 + na=0; + 83f4baa6: 4c01 li s8,0 + iw=1; + 83f4baa8: 4b05 li s6,1 + l1=1; + 83f4baaa: 4b85 li s7,1 + if(ip!=4)goto L103; + 83f4baac: 4a11 li s4,4 + 83f4baae: a0a1 j 83f4baf6 + if(ip!=2)goto L106; + 83f4bab0: 4789 li a5,2 + 83f4bab2: 0ef40263 beq s0,a5,83f4bb96 + if(ip!=3)goto L109; + 83f4bab6: 478d li a5,3 + 83f4bab8: 0ef40b63 beq s0,a5,83f4bbae + idl1=ido*l1; + 83f4babc: 02b506bb mulw a3,a0,a1 + if(na!=0) + 83f4bac0: 100c0363 beqz s8,83f4bbc6 + dradbg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + 83f4bac4: e43a sd a4,8(sp) + 83f4bac6: e06e sd s11,0(sp) + 83f4bac8: 88ee mv a7,s11 + 83f4baca: 886a mv a6,s10 + 83f4bacc: 87ea mv a5,s10 + 83f4bace: 876a mv a4,s10 + dradbg(ido,ip,l1,idl1,c,c,c,ch,ch,wa+iw-1); + 83f4bad0: 862e mv a2,a1 + 83f4bad2: 85a2 mv a1,s0 + 83f4bad4: ec2a sd a0,24(sp) + 83f4bad6: e12ff0ef jal ra,83f4b0e8 + 83f4bada: 6562 ld a0,24(sp) + if(ido==1)na=1-na; + 83f4badc: 4785 li a5,1 + 83f4bade: 00f51463 bne a0,a5,83f4bae6 + 83f4bae2: 41878c3b subw s8,a5,s8 + iw+=(ip-1)*ido; + 83f4bae6: 347d addiw s0,s0,-1 + 83f4bae8: 0354043b mulw s0,s0,s5 + for(k1=0;k1 + ip=ifac[k1 + 2]; + 83f4baf6: 000ca403 lw s0,0(s9) + dradbg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + 83f4bafa: 002b1713 slli a4,s6,0x2 + 83f4bafe: 1771 addi a4,a4,-4 + l2=ip*l1; + 83f4bb00: 037407bb mulw a5,s0,s7 + 83f4bb04: 85de mv a1,s7 + dradbg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + 83f4bb06: 974a add a4,a4,s2 + ido=n/l2; + 83f4bb08: 02f4c53b divw a0,s1,a5 + l2=ip*l1; + 83f4bb0c: 00078b9b sext.w s7,a5 + ido=n/l2; + 83f4bb10: 8aaa mv s5,a0 + if(ip!=4)goto L103; + 83f4bb12: f9441fe3 bne s0,s4,83f4bab0 + ix2=iw+ido; + 83f4bb16: 016506bb addw a3,a0,s6 + dradb4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4bb1a: 00d5083b addw a6,a0,a3 + dradb3(ido,l1,ch,c,wa+iw-1,wa+ix2-1); + 83f4bb1e: 00269793 slli a5,a3,0x2 + dradb4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4bb22: 080a slli a6,a6,0x2 + dradb3(ido,l1,ch,c,wa+iw-1,wa+ix2-1); + 83f4bb24: 17f1 addi a5,a5,-4 + dradb4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4bb26: 1871 addi a6,a6,-4 + dradb3(ido,l1,ch,c,wa+iw-1,wa+ix2-1); + 83f4bb28: 97ca add a5,a5,s2 + dradb4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4bb2a: 984a add a6,a6,s2 + if(na!=0) + 83f4bb2c: 060c0c63 beqz s8,83f4bba4 + dradb4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4bb30: 86ee mv a3,s11 + 83f4bb32: 866a mv a2,s10 + 83f4bb34: 9bdfe0ef jal ra,83f4a4f0 + iw+=(ip-1)*ido; + 83f4bb38: 347d addiw s0,s0,-1 + 83f4bb3a: 0354043b mulw s0,s0,s5 + na=1-na; + 83f4bb3e: 4785 li a5,1 + for(k1=0;k1 + if(na==0)return; + 83f4bb4e: 020c0563 beqz s8,83f4bb78 + for(i=0;i + 83f4bb56: 34fd addiw s1,s1,-1 + 83f4bb58: 02049793 slli a5,s1,0x20 + 83f4bb5c: 01e7d493 srli s1,a5,0x1e + 83f4bb60: 004d0793 addi a5,s10,4 + 83f4bb64: 856a mv a0,s10 + 83f4bb66: 94be add s1,s1,a5 + 83f4bb68: 00052787 flw fa5,0(a0) + 83f4bb6c: 0511 addi a0,a0,4 + 83f4bb6e: 0d91 addi s11,s11,4 + 83f4bb70: fefdae27 fsw fa5,-4(s11) + 83f4bb74: fea49ae3 bne s1,a0,83f4bb68 +} + 83f4bb78: 60aa ld ra,136(sp) + 83f4bb7a: 640a ld s0,128(sp) + 83f4bb7c: 74e6 ld s1,120(sp) + 83f4bb7e: 7946 ld s2,112(sp) + 83f4bb80: 79a6 ld s3,104(sp) + 83f4bb82: 7a06 ld s4,96(sp) + 83f4bb84: 6ae6 ld s5,88(sp) + 83f4bb86: 6b46 ld s6,80(sp) + 83f4bb88: 6ba6 ld s7,72(sp) + 83f4bb8a: 6c06 ld s8,64(sp) + 83f4bb8c: 7ce2 ld s9,56(sp) + 83f4bb8e: 7d42 ld s10,48(sp) + 83f4bb90: 7da2 ld s11,40(sp) + 83f4bb92: 6149 addi sp,sp,144 + 83f4bb94: 8082 ret + if(na!=0) + 83f4bb96: 020c0f63 beqz s8,83f4bbd4 + dradb2(ido,l1,ch,c,wa+iw-1); + 83f4bb9a: 86ee mv a3,s11 + 83f4bb9c: 866a mv a2,s10 + 83f4bb9e: e12fe0ef jal ra,83f4a1b0 + 83f4bba2: bf59 j 83f4bb38 + dradb4(ido,l1,c,ch,wa+iw-1,wa+ix2-1,wa+ix3-1); + 83f4bba4: 86ea mv a3,s10 + 83f4bba6: 866e mv a2,s11 + 83f4bba8: 949fe0ef jal ra,83f4a4f0 + 83f4bbac: b771 j 83f4bb38 + dradb3(ido,l1,ch,c,wa+iw-1,wa+ix2-1); + 83f4bbae: 016507bb addw a5,a0,s6 + 83f4bbb2: 078a slli a5,a5,0x2 + 83f4bbb4: 17f1 addi a5,a5,-4 + 83f4bbb6: 97ca add a5,a5,s2 + if(na!=0) + 83f4bbb8: 020c0363 beqz s8,83f4bbde + dradb3(ido,l1,ch,c,wa+iw-1,wa+ix2-1); + 83f4bbbc: 86ee mv a3,s11 + 83f4bbbe: 866a mv a2,s10 + 83f4bbc0: f64fe0ef jal ra,83f4a324 + 83f4bbc4: bf95 j 83f4bb38 + dradbg(ido,ip,l1,idl1,c,c,c,ch,ch,wa+iw-1); + 83f4bbc6: e43a sd a4,8(sp) + 83f4bbc8: e06a sd s10,0(sp) + 83f4bbca: 88ea mv a7,s10 + 83f4bbcc: 886e mv a6,s11 + 83f4bbce: 87ee mv a5,s11 + 83f4bbd0: 876e mv a4,s11 + 83f4bbd2: bdfd j 83f4bad0 + dradb2(ido,l1,c,ch,wa+iw-1); + 83f4bbd4: 86ea mv a3,s10 + 83f4bbd6: 866e mv a2,s11 + 83f4bbd8: dd8fe0ef jal ra,83f4a1b0 + 83f4bbdc: bfb1 j 83f4bb38 + dradb3(ido,l1,c,ch,wa+iw-1,wa+ix2-1); + 83f4bbde: 86ea mv a3,s10 + 83f4bbe0: 866e mv a2,s11 + 83f4bbe2: f42fe0ef jal ra,83f4a324 + 83f4bbe6: bf89 j 83f4bb38 + +0000000083f4bbe8 : + +void core_drft_init(struct drft_lookup *l,int n) +{ + l->n=n; + l->trigcache=(float*)mem_alloc(3*n*sizeof(*l->trigcache)); + 83f4bbe8: 0015979b slliw a5,a1,0x1 +{ + 83f4bbec: 7115 addi sp,sp,-224 + l->trigcache=(float*)mem_alloc(3*n*sizeof(*l->trigcache)); + 83f4bbee: 9fad addw a5,a5,a1 +{ + 83f4bbf0: ed86 sd ra,216(sp) + 83f4bbf2: e9a2 sd s0,208(sp) + 83f4bbf4: e5a6 sd s1,200(sp) + uintptr_t *ptr = pvPortMalloc(size); + 83f4bbf6: 0027941b slliw s0,a5,0x2 + 83f4bbfa: e1ca sd s2,192(sp) + 83f4bbfc: fd4e sd s3,184(sp) + 83f4bbfe: f952 sd s4,176(sp) + 83f4bc00: f556 sd s5,168(sp) + 83f4bc02: f15a sd s6,160(sp) + 83f4bc04: ed5e sd s7,152(sp) + 83f4bc06: e962 sd s8,144(sp) + 83f4bc08: e566 sd s9,136(sp) + 83f4bc0a: e16a sd s10,128(sp) + 83f4bc0c: fcee sd s11,120(sp) + 83f4bc0e: b4a2 fsd fs0,104(sp) + 83f4bc10: b0a6 fsd fs1,96(sp) + 83f4bc12: acca fsd fs2,88(sp) + 83f4bc14: a8ce fsd fs3,80(sp) + 83f4bc16: a4d2 fsd fs4,72(sp) + 83f4bc18: 84aa mv s1,a0 + l->n=n; + 83f4bc1a: c10c sw a1,0(a0) + 83f4bc1c: 8522 mv a0,s0 +{ + 83f4bc1e: 892e mv s2,a1 + 83f4bc20: f82e sd a1,48(sp) + 83f4bc22: 163020ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4bc26: 8622 mv a2,s0 + 83f4bc28: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4bc2a: 842a mv s0,a0 + memset(ptr, 0, size); + 83f4bc2c: 350000ef jal ra,83f4bf7c + uintptr_t *ptr = pvPortMalloc(size); + 83f4bc30: 08000513 li a0,128 + l->trigcache=(float*)mem_alloc(3*n*sizeof(*l->trigcache)); + 83f4bc34: e480 sd s0,8(s1) + 83f4bc36: 14f020ef jal ra,83f4e584 + memset(ptr, 0, size); + 83f4bc3a: 08000613 li a2,128 + 83f4bc3e: 4581 li a1,0 + uintptr_t *ptr = pvPortMalloc(size); + 83f4bc40: 842a mv s0,a0 + memset(ptr, 0, size); + 83f4bc42: 33a000ef jal ra,83f4bf7c + if (n == 1) return; + 83f4bc46: 4785 li a5,1 + l->splitcache=(int*)mem_alloc(32*sizeof(*l->splitcache)); + 83f4bc48: e880 sd s0,16(s1) + if (n == 1) return; + 83f4bc4a: 16f90a63 beq s2,a5,83f4bdbe + fdrffti(n, l->trigcache, l->splitcache); + 83f4bc4e: 6484 ld s1,8(s1) + int nf=0; + 83f4bc50: 00006297 auipc t0,0x6 + 83f4bc54: 34828293 addi t0,t0,840 # 83f51f98 + fdrffti(n, l->trigcache, l->splitcache); + 83f4bc58: 8a4a mv s4,s2 + int nf=0; + 83f4bc5a: 4581 li a1,0 + int ntry=0,i,j=-1; + 83f4bc5c: 5ffd li t6,-1 + 83f4bc5e: 4501 li a0,0 + if (j < 4) + 83f4bc60: 438d li t2,3 + if(ntry!=2)goto L107; + 83f4bc62: 4e89 li t4,2 + if(nf==1)goto L107; + 83f4bc64: 4e05 li t3,1 + j++; + 83f4bc66: 2f85 addiw t6,t6,1 + if (j < 4) + 83f4bc68: 19f3c363 blt t2,t6,83f4bdee + ntry=ntryh[j]; + 83f4bc6c: 0002a503 lw a0,0(t0) + 83f4bc70: 00259813 slli a6,a1,0x2 + 83f4bc74: 832e mv t1,a1 + 83f4bc76: 9822 add a6,a6,s0 + nq=nl/ntry; + 83f4bc78: 02aa673b remw a4,s4,a0 + 83f4bc7c: 87d2 mv a5,s4 + 83f4bc7e: 8f2e mv t5,a1 + nf++; + 83f4bc80: 2585 addiw a1,a1,1 + nq=nl/ntry; + 83f4bc82: 02aa4a3b divw s4,s4,a0 + if (nr!=0) goto L101; + 83f4bc86: 16071063 bnez a4,83f4bde6 + ifac[nf+1]=ntry; + 83f4bc8a: 00a82423 sw a0,8(a6) + if(ntry!=2)goto L107; + 83f4bc8e: 03d51463 bne a0,t4,83f4bcb6 + if(nf==1)goto L107; + 83f4bc92: 03c58263 beq a1,t3,83f4bcb6 + 83f4bc96: 00259793 slli a5,a1,0x2 + 83f4bc9a: 97a2 add a5,a5,s0 + 83f4bc9c: 4701 li a4,0 + 83f4bc9e: 0003089b sext.w a7,t1 + ifac[ib+1]=ifac[ib]; + 83f4bca2: 4390 lw a2,0(a5) + for (i=1;i + ifac[2] = 2; + 83f4bcb2: 01d42423 sw t4,8(s0) + if(nl!=1)goto L104; + 83f4bcb6: 0305 addi t1,t1,1 + 83f4bcb8: 0811 addi a6,a6,4 + 83f4bcba: fbca1fe3 bne s4,t3,83f4bc78 + ifac[0]=n; + 83f4bcbe: 77c2 ld a5,48(sp) + ifac[1]=nf; + 83f4bcc0: c04c sw a1,4(s0) + ifac[0]=n; + 83f4bcc2: c01c sw a5,0(s0) + if(nfm1==0)return; + 83f4bcc4: 0e0f0d63 beqz t5,83f4bdbe + argh=tpi/n; + 83f4bcc8: d007f7d3 fcvt.s.w fa5,a5 + 83f4bccc: 00006717 auipc a4,0x6 + 83f4bcd0: 79872a07 flw fs4,1944(a4) # 83f52464 <__func__.1+0x26c> + drfti1(n, wsave+n, ifac); + 83f4bcd4: 00279713 slli a4,a5,0x2 + argh=tpi/n; + 83f4bcd8: 18fa7a53 fdiv.s fs4,fs4,fa5 + 83f4bcdc: ffff079b addiw a5,t5,-1 + drfti1(n, wsave+n, ifac); + 83f4bce0: 00e48d33 add s10,s1,a4 + 83f4bce4: 02079713 slli a4,a5,0x20 + 83f4bce8: 01e75793 srli a5,a4,0x1e + 83f4bcec: 00c40713 addi a4,s0,12 + 83f4bcf0: 97ba add a5,a5,a4 + 83f4bcf2: 00840693 addi a3,s0,8 + 83f4bcf6: fc3e sd a5,56(sp) + 83f4bcf8: 008d0793 addi a5,s10,8 + 83f4bcfc: e43e sd a5,8(sp) + 83f4bcfe: e836 sd a3,16(sp) + is=0; + 83f4bd00: ec02 sd zero,24(sp) + for (ii=2;ii + ip=ifac[k1+2]; + 83f4bd0c: 67c2 ld a5,16(sp) + 83f4bd0e: 8c52 mv s8,s4 + ido=n/l2; + 83f4bd10: 7742 ld a4,48(sp) + ip=ifac[k1+2]; + 83f4bd12: 439c lw a5,0(a5) + l2=l1*ip; + 83f4bd14: 03478a3b mulw s4,a5,s4 + ipm=ip-1; + 83f4bd18: fff78b9b addiw s7,a5,-1 + ido=n/l2; + 83f4bd1c: 03474abb divw s5,a4,s4 + 83f4bd20: d256 sw s5,36(sp) + for (j=0;j + 83f4bd26: ffda8b1b addiw s6,s5,-3 + 83f4bd2a: 6962 ld s2,24(sp) + 83f4bd2c: 001b5b1b srliw s6,s6,0x1 + 83f4bd30: 2781 sext.w a5,a5 + 83f4bd32: f43e sd a5,40(sp) + 83f4bd34: 0b06 slli s6,s6,0x1 + 83f4bd36: 4981 li s3,0 + ld=0; + 83f4bd38: 4481 li s1,0 + ld+=l1; + 83f4bd3a: 018484bb addw s1,s1,s8 + argld=(float)ld*argh; + 83f4bd3e: d004f953 fcvt.s.w fs2,s1 + 83f4bd42: 11497953 fmul.s fs2,fs2,fs4 + for (ii=2;ii + 83f4bd4a: 00291793 slli a5,s2,0x2 + 83f4bd4e: 01a78db3 add s11,a5,s10 + 83f4bd52: 67a2 ld a5,8(sp) + 83f4bd54: 01690433 add s0,s2,s6 + fi=0.f; + 83f4bd58: f00004d3 fmv.w.x fs1,zero + 83f4bd5c: 040a slli s0,s0,0x2 + 83f4bd5e: 943e add s0,s0,a5 + fi+=1.f; + 83f4bd60: 0134f4d3 fadd.s fs1,fs1,fs3 + for (ii=2;ii + 83f4bd76: 22a507d3 fmv.d fa5,fa0 + wa[i++]=(float)sin(arg); + 83f4bd7a: 22840553 fmv.d fa0,fs0 + wa[i++]=(float)cos(arg); + 83f4bd7e: 4017f7d3 fcvt.s.d fa5,fa5 + 83f4bd82: fefdac27 fsw fa5,-8(s11) + wa[i++]=(float)sin(arg); + 83f4bd86: de1f40ef jal ra,83f40b66 + 83f4bd8a: 40157553 fcvt.s.d fa0,fa0 + 83f4bd8e: feadae27 fsw fa0,-4(s11) + for (ii=2;ii + for (j=0;j + is+=ido; + 83f4bd9e: 77a2 ld a5,40(sp) + 83f4bda0: 66e2 ld a3,24(sp) + 83f4bda2: ffe7871b addiw a4,a5,-2 + 83f4bda6: 5792 lw a5,36(sp) + 83f4bda8: 02f7073b mulw a4,a4,a5 + 83f4bdac: 9fb5 addw a5,a5,a3 + 83f4bdae: 9fb9 addw a5,a5,a4 + 83f4bdb0: ec3e sd a5,24(sp) + for (k1=0;k1 +} + 83f4bdbe: 60ee ld ra,216(sp) + 83f4bdc0: 644e ld s0,208(sp) + 83f4bdc2: 64ae ld s1,200(sp) + 83f4bdc4: 690e ld s2,192(sp) + 83f4bdc6: 79ea ld s3,184(sp) + 83f4bdc8: 7a4a ld s4,176(sp) + 83f4bdca: 7aaa ld s5,168(sp) + 83f4bdcc: 7b0a ld s6,160(sp) + 83f4bdce: 6bea ld s7,152(sp) + 83f4bdd0: 6c4a ld s8,144(sp) + 83f4bdd2: 6caa ld s9,136(sp) + 83f4bdd4: 6d0a ld s10,128(sp) + 83f4bdd6: 7de6 ld s11,120(sp) + 83f4bdd8: 3426 fld fs0,104(sp) + 83f4bdda: 3486 fld fs1,96(sp) + 83f4bddc: 2966 fld fs2,88(sp) + 83f4bdde: 29c6 fld fs3,80(sp) + 83f4bde0: 2a26 fld fs4,72(sp) + 83f4bde2: 612d addi sp,sp,224 + 83f4bde4: 8082 ret + 83f4bde6: 0291 addi t0,t0,4 + if (nr!=0) goto L101; + 83f4bde8: 85fa mv a1,t5 + 83f4bdea: 8a3e mv s4,a5 + 83f4bdec: bdad j 83f4bc66 + ntry+=2; + 83f4bdee: 2509 addiw a0,a0,2 + 83f4bdf0: b541 j 83f4bc70 + +0000000083f4bdf2 : + +void core_drft_clear(struct drft_lookup *l) +{ + if(l) + 83f4bdf2: c505 beqz a0,83f4be1a +{ + 83f4bdf4: 1141 addi sp,sp,-16 + 83f4bdf6: e022 sd s0,0(sp) + 83f4bdf8: e406 sd ra,8(sp) + 83f4bdfa: 842a mv s0,a0 + { + if(l->trigcache) + 83f4bdfc: 6508 ld a0,8(a0) + 83f4bdfe: c119 beqz a0,83f4be04 + vPortFree(ptr); + 83f4be00: 0eb020ef jal ra,83f4e6ea + mem_free(l->trigcache); + if(l->splitcache) + 83f4be04: 6808 ld a0,16(s0) + 83f4be06: c511 beqz a0,83f4be12 + mem_free(l->splitcache); + } +} + 83f4be08: 6402 ld s0,0(sp) + 83f4be0a: 60a2 ld ra,8(sp) + 83f4be0c: 0141 addi sp,sp,16 + 83f4be0e: 0dd0206f j 83f4e6ea + 83f4be12: 60a2 ld ra,8(sp) + 83f4be14: 6402 ld s0,0(sp) + 83f4be16: 0141 addi sp,sp,16 + 83f4be18: 8082 ret + 83f4be1a: 8082 ret + +0000000083f4be1c : + } +#endif + +/* Function Definitions */ +void b_log(float x[321]) +{ + 83f4be1c: 1101 addi sp,sp,-32 + 83f4be1e: e822 sd s0,16(sp) + 83f4be20: e426 sd s1,8(sp) + 83f4be22: ec06 sd ra,24(sp) + 83f4be24: 842a mv s0,a0 + 83f4be26: 50450493 addi s1,a0,1284 + int k; + for (k = 0; k < 321; k++) { +#ifdef FAST_MATH_CALC + x[k] = (float)fast_log(x[k]); +#else + x[k] = (float)log(x[k]); + 83f4be2a: 00042507 flw fa0,0(s0) + for (k = 0; k < 321; k++) { + 83f4be2e: 0411 addi s0,s0,4 + x[k] = (float)log(x[k]); + 83f4be30: 42050553 fcvt.d.s fa0,fa0 + 83f4be34: e27f40ef jal ra,83f40c5a + 83f4be38: 40157553 fcvt.s.d fa0,fa0 + 83f4be3c: fea42e27 fsw fa0,-4(s0) + for (k = 0; k < 321; k++) { + 83f4be40: fe9415e3 bne s0,s1,83f4be2a +#endif + } +} + 83f4be44: 60e2 ld ra,24(sp) + 83f4be46: 6442 ld s0,16(sp) + 83f4be48: 64a2 ld s1,8(sp) + 83f4be4a: 6105 addi sp,sp,32 + 83f4be4c: 8082 ret + +0000000083f4be4e : + + return y; +} + +float rt_hypotf(float u0, float u1) +{ + 83f4be4e: 1101 addi sp,sp,-32 + 83f4be50: a422 fsd fs0,8(sp) + 83f4be52: 20a50453 fmv.s fs0,fa0 + float b; + + #if 1 + a = u0; + b = u1; + y = (float)sqrt(a * a + b * b); + 83f4be56: 10b5f553 fmul.s fa0,fa1,fa1 +{ + 83f4be5a: a026 fsd fs1,0(sp) + 83f4be5c: ec06 sd ra,24(sp) + 83f4be5e: 20b584d3 fmv.s fs1,fa1 + y = (float)sqrt(a * a + b * b); + 83f4be62: 50847543 fmadd.s fa0,fs0,fs0,fa0 + 83f4be66: 42050553 fcvt.d.s fa0,fa0 + 83f4be6a: f89f40ef jal ra,83f40df2 + 83f4be6e: 40157553 fcvt.s.d fa0,fa0 + if (y == 0.0F) /* can avoid y to be zero if as denominator */ + 83f4be72: f00007d3 fmv.w.x fa5,zero + 83f4be76: a0f527d3 feq.s a5,fa0,fa5 + 83f4be7a: e791 bnez a5,83f4be86 + y = a * 1.41421354F; + } + #endif + + return y; +} + 83f4be7c: 60e2 ld ra,24(sp) + 83f4be7e: 2422 fld fs0,8(sp) + 83f4be80: 2482 fld fs1,0(sp) + 83f4be82: 6105 addi sp,sp,32 + 83f4be84: 8082 ret + a = (float)fabs(u0); + 83f4be86: 42040553 fcvt.d.s fa0,fs0 + 83f4be8a: abff40ef jal ra,83f40948 + 83f4be8e: 22a50453 fmv.d fs0,fa0 + b = (float)fabs(u1); + 83f4be92: 42048553 fcvt.d.s fa0,fs1 + a = (float)fabs(u0); + 83f4be96: 40147453 fcvt.s.d fs0,fs0 + b = (float)fabs(u1); + 83f4be9a: aaff40ef jal ra,83f40948 + 83f4be9e: 401574d3 fcvt.s.d fs1,fa0 + if (a < b) { + 83f4bea2: a09417d3 flt.s a5,fs0,fs1 + 83f4bea6: e3a1 bnez a5,83f4bee6 + } else if (a > b) { + 83f4bea8: a08497d3 flt.s a5,fs1,fs0 + 83f4beac: ef81 bnez a5,83f4bec4 +} + 83f4beae: 60e2 ld ra,24(sp) + y = a * 1.41421354F; + 83f4beb0: 00006797 auipc a5,0x6 + 83f4beb4: 5ac7a507 flw fa0,1452(a5) # 83f5245c <__func__.1+0x264> + 83f4beb8: 10a47553 fmul.s fa0,fs0,fa0 +} + 83f4bebc: 2482 fld fs1,0(sp) + 83f4bebe: 2422 fld fs0,8(sp) + 83f4bec0: 6105 addi sp,sp,32 + 83f4bec2: 8082 ret + b /= a; + 83f4bec4: 1884f553 fdiv.s fa0,fs1,fs0 + y = a * (float)sqrt(b * b + 1.0F); + 83f4bec8: 00006797 auipc a5,0x6 + 83f4becc: 3887a487 flw fs1,904(a5) # 83f52250 <__func__.1+0x58> + 83f4bed0: 48a57543 fmadd.s fa0,fa0,fa0,fs1 + 83f4bed4: 42050553 fcvt.d.s fa0,fa0 + 83f4bed8: f1bf40ef jal ra,83f40df2 + 83f4bedc: 40157553 fcvt.s.d fa0,fa0 + 83f4bee0: 10857553 fmul.s fa0,fa0,fs0 + 83f4bee4: bf61 j 83f4be7c + a /= b; + 83f4bee6: 18947553 fdiv.s fa0,fs0,fs1 + y = b * (float)sqrt(a * a + 1.0F); + 83f4beea: 00006797 auipc a5,0x6 + 83f4beee: 3667a407 flw fs0,870(a5) # 83f52250 <__func__.1+0x58> + 83f4bef2: 40a57543 fmadd.s fa0,fa0,fa0,fs0 + 83f4bef6: 42050553 fcvt.d.s fa0,fa0 + 83f4befa: ef9f40ef jal ra,83f40df2 +} + 83f4befe: 60e2 ld ra,24(sp) + y = b * (float)sqrt(a * a + 1.0F); + 83f4bf00: 40157553 fcvt.s.d fa0,fa0 +} + 83f4bf04: 2422 fld fs0,8(sp) + y = b * (float)sqrt(a * a + 1.0F); + 83f4bf06: 10957553 fmul.s fa0,fa0,fs1 +} + 83f4bf0a: 2482 fld fs1,0(sp) + 83f4bf0c: 6105 addi sp,sp,32 + 83f4bf0e: 8082 ret + +0000000083f4bf10 : + 83f4bf10: 03f58793 addi a5,a1,63 + 83f4bf14: 97aa add a5,a5,a0 + 83f4bf16: fc07f793 andi a5,a5,-64 + 83f4bf1a: fc057513 andi a0,a0,-64 + 83f4bf1e: 00f57863 bgeu a0,a5,83f4bf2e + 83f4bf22: 02a5000b dcache.ipa a0 + 83f4bf26: 04050513 addi a0,a0,64 + 83f4bf2a: fef56ce3 bltu a0,a5,83f4bf22 + 83f4bf2e: 0190000b sync.s + 83f4bf32: 8082 ret + +0000000083f4bf34 : + 83f4bf34: 03f58793 addi a5,a1,63 + 83f4bf38: 97aa add a5,a5,a0 + 83f4bf3a: fc07f793 andi a5,a5,-64 + 83f4bf3e: fc057513 andi a0,a0,-64 + 83f4bf42: 00f57863 bgeu a0,a5,83f4bf52 + 83f4bf46: 0295000b dcache.cpa a0 + 83f4bf4a: 04050513 addi a0,a0,64 + 83f4bf4e: fef56ce3 bltu a0,a5,83f4bf46 + 83f4bf52: 0190000b sync.s + 83f4bf56: 8082 ret + +0000000083f4bf58 : + 83f4bf58: 03f58793 addi a5,a1,63 + 83f4bf5c: 97aa add a5,a5,a0 + 83f4bf5e: fc07f793 andi a5,a5,-64 + 83f4bf62: fc057513 andi a0,a0,-64 + 83f4bf66: 00f57863 bgeu a0,a5,83f4bf76 + 83f4bf6a: 02b5000b dcache.cipa a0 + 83f4bf6e: 04050513 addi a0,a0,64 + 83f4bf72: fef56ce3 bltu a0,a5,83f4bf6a + 83f4bf76: 0190000b sync.s + 83f4bf7a: 8082 ret + +0000000083f4bf7c : + 83f4bf7c: 0ff5f593 andi a1,a1,255 + 83f4bf80: 00c507b3 add a5,a0,a2 + 83f4bf84: c611 beqz a2,83f4bf90 + 83f4bf86: 0505 addi a0,a0,1 + 83f4bf88: feb50fa3 sb a1,-1(a0) + 83f4bf8c: fef51de3 bne a0,a5,83f4bf86 + 83f4bf90: 4501 li a0,0 + 83f4bf92: 8082 ret + +0000000083f4bf94 : + 83f4bf94: 7111 addi sp,sp,-256 + 83f4bf96: f526 sd s1,168(sp) + 83f4bf98: e5ae sd a1,200(sp) + 83f4bf9a: 84aa mv s1,a0 + 83f4bf9c: 4581 li a1,0 + 83f4bf9e: 0808 addi a0,sp,16 + 83f4bfa0: fd06 sd ra,184(sp) + 83f4bfa2: f922 sd s0,176(sp) + 83f4bfa4: f9c2 sd a6,240(sp) + 83f4bfa6: fdc6 sd a7,248(sp) + 83f4bfa8: f5be sd a5,232(sp) + 83f4bfaa: e9b2 sd a2,208(sp) + 83f4bfac: edb6 sd a3,216(sp) + 83f4bfae: f1ba sd a4,224(sp) + 83f4bfb0: 2e0000ef jal ra,83f4c290 + 83f4bfb4: 6762 ld a4,24(sp) + 83f4bfb6: 66c2 ld a3,16(sp) + 83f4bfb8: 00006617 auipc a2,0x6 + 83f4bfbc: ff060613 addi a2,a2,-16 # 83f51fa8 + 83f4bfc0: 07f00593 li a1,127 + 83f4bfc4: 1008 addi a0,sp,32 + 83f4bfc6: 2aa000ef jal ra,83f4c270 + 83f4bfca: 101c addi a5,sp,32 + 83f4bfcc: 07f00593 li a1,127 + 83f4bfd0: 01b4 addi a3,sp,200 + 83f4bfd2: 842a mv s0,a0 + 83f4bfd4: 8626 mv a2,s1 + 83f4bfd6: 8d89 sub a1,a1,a0 + 83f4bfd8: 953e add a0,a0,a5 + 83f4bfda: e436 sd a3,8(sp) + 83f4bfdc: 01e000ef jal ra,83f4bffa + 83f4bfe0: 1008 addi a0,sp,32 + 83f4bfe2: 08010fa3 sb zero,159(sp) + 83f4bfe6: 776000ef jal ra,83f4c75c + 83f4bfea: 70ea ld ra,184(sp) + 83f4bfec: 9d21 addw a0,a0,s0 + 83f4bfee: 744a ld s0,176(sp) + 83f4bff0: 74aa ld s1,168(sp) + 83f4bff2: 6111 addi sp,sp,256 + 83f4bff4: 8082 ret + +0000000083f4bff6 : + 83f4bff6: 0f80406f j 83f500ee + +0000000083f4bffa : + 83f4bffa: 00064703 lbu a4,0(a2) + 83f4bffe: 832a mv t1,a0 + 83f4c000: 24070a63 beqz a4,83f4c254 + 83f4c004: 7139 addi sp,sp,-64 + 83f4c006: fc22 sd s0,56(sp) + 83f4c008: f826 sd s1,48(sp) + 83f4c00a: f44a sd s2,40(sp) + 83f4c00c: f04e sd s3,32(sp) + 83f4c00e: ec52 sd s4,24(sp) + 83f4c010: e856 sd s5,16(sp) + 83f4c012: e45a sd s6,8(sp) + 83f4c014: 4501 li a0,0 + 83f4c016: 4801 li a6,0 + 83f4c018: 4981 li s3,0 + 83f4c01a: 4881 li a7,0 + 83f4c01c: 02500393 li t2,37 + 83f4c020: 42d5 li t0,21 + 83f4c022: 00006f17 auipc t5,0x6 + 83f4c026: f92f0f13 addi t5,t5,-110 # 83f51fb4 + 83f4c02a: 4e29 li t3,10 + 83f4c02c: 03000413 li s0,48 + 83f4c030: 02d00913 li s2,45 + 83f4c034: 4fa5 li t6,9 + 83f4c036: 5ef1 li t4,-4 + 83f4c038: 07800493 li s1,120 + 83f4c03c: 16088363 beqz a7,83f4c1a2 + 83f4c040: f9d7079b addiw a5,a4,-99 + 83f4c044: 0ff7f793 andi a5,a5,255 + 83f4c048: 00f2e763 bltu t0,a5,83f4c056 + 83f4c04c: 078a slli a5,a5,0x2 + 83f4c04e: 97fa add a5,a5,t5 + 83f4c050: 439c lw a5,0(a5) + 83f4c052: 97fa add a5,a5,t5 + 83f4c054: 8782 jr a5 + 83f4c056: fd07051b addiw a0,a4,-48 + 83f4c05a: 00164703 lbu a4,1(a2) + 83f4c05e: 0605 addi a2,a2,1 + 83f4c060: ff71 bnez a4,83f4c03c + 83f4c062: 0008051b sext.w a0,a6 + 83f4c066: 14b86d63 bltu a6,a1,83f4c1c0 + 83f4c06a: c589 beqz a1,83f4c074 + 83f4c06c: 00b30833 add a6,t1,a1 + 83f4c070: fe080fa3 sb zero,-1(a6) + 83f4c074: 7462 ld s0,56(sp) + 83f4c076: 74c2 ld s1,48(sp) + 83f4c078: 7922 ld s2,40(sp) + 83f4c07a: 7982 ld s3,32(sp) + 83f4c07c: 6a62 ld s4,24(sp) + 83f4c07e: 6ac2 ld s5,16(sp) + 83f4c080: 6b22 ld s6,8(sp) + 83f4c082: 6121 addi sp,sp,64 + 83f4c084: 8082 ret + 83f4c086: 00868793 addi a5,a3,8 + 83f4c08a: 14099d63 bnez s3,83f4c1e4 + 83f4c08e: 0006aa83 lw s5,0(a3) + 83f4c092: 4b1d li s6,7 + 83f4c094: 86be mv a3,a5 + 83f4c096: 002b1713 slli a4,s6,0x2 + 83f4c09a: 87c2 mv a5,a6 + 83f4c09c: 0785 addi a5,a5,1 + 83f4c09e: 02b7f063 bgeu a5,a1,83f4c0be + 83f4c0a2: 40ead8b3 sra a7,s5,a4 + 83f4c0a6: 00f8fa13 andi s4,a7,15 + 83f4c0aa: 057a0993 addi s3,s4,87 + 83f4c0ae: 014fc463 blt t6,s4,83f4c0b6 + 83f4c0b2: 030a0993 addi s3,s4,48 + 83f4c0b6: 00f308b3 add a7,t1,a5 + 83f4c0ba: ff388fa3 sb s3,-1(a7) + 83f4c0be: 3771 addiw a4,a4,-4 + 83f4c0c0: fdd71ee3 bne a4,t4,83f4c09c + 83f4c0c4: 0805 addi a6,a6,1 + 83f4c0c6: 985a add a6,a6,s6 + 83f4c0c8: 4981 li s3,0 + 83f4c0ca: 4881 li a7,0 + 83f4c0cc: b779 j 83f4c05a + 83f4c0ce: 0006b883 ld a7,0(a3) + 83f4c0d2: 06a1 addi a3,a3,8 + 83f4c0d4: 0008c703 lbu a4,0(a7) + 83f4c0d8: c305 beqz a4,83f4c0f8 + 83f4c0da: 87c2 mv a5,a6 + 83f4c0dc: 0785 addi a5,a5,1 + 83f4c0de: 00b7f663 bgeu a5,a1,83f4c0ea + 83f4c0e2: 00f309b3 add s3,t1,a5 + 83f4c0e6: fee98fa3 sb a4,-1(s3) # ffffffffffffefff <_end+0xffffffff7bfff2bf> + 83f4c0ea: 41078733 sub a4,a5,a6 + 83f4c0ee: 9746 add a4,a4,a7 + 83f4c0f0: 00074703 lbu a4,0(a4) + 83f4c0f4: f765 bnez a4,83f4c0dc + 83f4c0f6: 883e mv a6,a5 + 83f4c0f8: 4981 li s3,0 + 83f4c0fa: 4881 li a7,0 + 83f4c0fc: bfb9 j 83f4c05a + 83f4c0fe: 00180793 addi a5,a6,1 + 83f4c102: 00b7f663 bgeu a5,a1,83f4c10e + 83f4c106: 01030733 add a4,t1,a6 + 83f4c10a: 00870023 sb s0,0(a4) + 83f4c10e: 0809 addi a6,a6,2 + 83f4c110: 00868713 addi a4,a3,8 + 83f4c114: 00b87563 bgeu a6,a1,83f4c11e + 83f4c118: 979a add a5,a5,t1 + 83f4c11a: 00978023 sb s1,0(a5) + 83f4c11e: 0006ba83 ld s5,0(a3) + 83f4c122: 4b3d li s6,15 + 83f4c124: 86ba mv a3,a4 + 83f4c126: bf85 j 83f4c096 + 83f4c128: 00868893 addi a7,a3,8 + 83f4c12c: 08098e63 beqz s3,83f4c1c8 + 83f4c130: 6294 ld a3,0(a3) + 83f4c132: 0806ce63 bltz a3,83f4c1ce + 83f4c136: 03c6c7b3 div a5,a3,t3 + 83f4c13a: 4705 li a4,1 + 83f4c13c: cbdd beqz a5,83f4c1f2 + 83f4c13e: 03c7c7b3 div a5,a5,t3 + 83f4c142: 0705 addi a4,a4,1 + 83f4c144: ffed bnez a5,83f4c13e + 83f4c146: e55d bnez a0,83f4c1f4 + 83f4c148: fff7051b addiw a0,a4,-1 + 83f4c14c: 02054863 bltz a0,83f4c17c + 83f4c150: 00180a13 addi s4,a6,1 + 83f4c154: 00aa07b3 add a5,s4,a0 + 83f4c158: 00b7fb63 bgeu a5,a1,83f4c16e + 83f4c15c: 03c6e7b3 rem a5,a3,t3 + 83f4c160: 00a809b3 add s3,a6,a0 + 83f4c164: 999a add s3,s3,t1 + 83f4c166: 0307879b addiw a5,a5,48 + 83f4c16a: 00f98023 sb a5,0(s3) + 83f4c16e: 157d addi a0,a0,-1 + 83f4c170: 0005079b sext.w a5,a0 + 83f4c174: 03c6c6b3 div a3,a3,t3 + 83f4c178: fc07dee3 bgez a5,83f4c154 + 83f4c17c: 86c6 mv a3,a7 + 83f4c17e: 983a add a6,a6,a4 + 83f4c180: 4501 li a0,0 + 83f4c182: 4981 li s3,0 + 83f4c184: 4881 li a7,0 + 83f4c186: bdd1 j 83f4c05a + 83f4c188: 00180793 addi a5,a6,1 + 83f4c18c: f6b7f5e3 bgeu a5,a1,83f4c0f6 + 83f4c190: 4298 lw a4,0(a3) + 83f4c192: 981a add a6,a6,t1 + 83f4c194: 06a1 addi a3,a3,8 + 83f4c196: 00e80023 sb a4,0(a6) + 83f4c19a: 4981 li s3,0 + 83f4c19c: 883e mv a6,a5 + 83f4c19e: 4881 li a7,0 + 83f4c1a0: bd6d j 83f4c05a + 83f4c1a2: 00770b63 beq a4,t2,83f4c1b8 + 83f4c1a6: 00180793 addi a5,a6,1 + 83f4c1aa: 00b7f963 bgeu a5,a1,83f4c1bc + 83f4c1ae: 981a add a6,a6,t1 + 83f4c1b0: 00e80023 sb a4,0(a6) + 83f4c1b4: 883e mv a6,a5 + 83f4c1b6: b555 j 83f4c05a + 83f4c1b8: 4885 li a7,1 + 83f4c1ba: b545 j 83f4c05a + 83f4c1bc: 883e mv a6,a5 + 83f4c1be: bd71 j 83f4c05a + 83f4c1c0: 981a add a6,a6,t1 + 83f4c1c2: 00080023 sb zero,0(a6) + 83f4c1c6: b57d j 83f4c074 + 83f4c1c8: 4294 lw a3,0(a3) + 83f4c1ca: f606d6e3 bgez a3,83f4c136 + 83f4c1ce: 00180793 addi a5,a6,1 + 83f4c1d2: 40d006b3 neg a3,a3 + 83f4c1d6: 06b7fd63 bgeu a5,a1,83f4c250 + 83f4c1da: 981a add a6,a6,t1 + 83f4c1dc: 01280023 sb s2,0(a6) + 83f4c1e0: 883e mv a6,a5 + 83f4c1e2: bf91 j 83f4c136 + 83f4c1e4: 0006ba83 ld s5,0(a3) + 83f4c1e8: 4b3d li s6,15 + 83f4c1ea: 86be mv a3,a5 + 83f4c1ec: b56d j 83f4c096 + 83f4c1ee: 89c6 mv s3,a7 + 83f4c1f0: b5ad j 83f4c05a + 83f4c1f2: dd39 beqz a0,83f4c150 + 83f4c1f4: fff5079b addiw a5,a0,-1 + 83f4c1f8: 0407c663 bltz a5,83f4c244 + 83f4c1fc: 00f809b3 add s3,a6,a5 + 83f4c200: 999a add s3,s3,t1 + 83f4c202: 00180a13 addi s4,a6,1 + 83f4c206: 40e50733 sub a4,a0,a4 + 83f4c20a: a839 j 83f4c228 + 83f4c20c: 03c6eab3 rem s5,a3,t3 + 83f4c210: 03c6c6b3 div a3,a3,t3 + 83f4c214: 030a8a9b addiw s5,s5,48 + 83f4c218: 01598023 sb s5,0(s3) + 83f4c21c: 17fd addi a5,a5,-1 + 83f4c21e: 00078a9b sext.w s5,a5 + 83f4c222: 19fd addi s3,s3,-1 + 83f4c224: 020ac063 bltz s5,83f4c244 + 83f4c228: 00fa0ab3 add s5,s4,a5 + 83f4c22c: febaf8e3 bgeu s5,a1,83f4c21c + 83f4c230: fce7dee3 bge a5,a4,83f4c20c + 83f4c234: 17fd addi a5,a5,-1 + 83f4c236: 00898023 sb s0,0(s3) + 83f4c23a: 00078a9b sext.w s5,a5 + 83f4c23e: 19fd addi s3,s3,-1 + 83f4c240: fe0ad4e3 bgez s5,83f4c228 + 83f4c244: 982a add a6,a6,a0 + 83f4c246: 86c6 mv a3,a7 + 83f4c248: 4501 li a0,0 + 83f4c24a: 4981 li s3,0 + 83f4c24c: 4881 li a7,0 + 83f4c24e: b531 j 83f4c05a + 83f4c250: 883e mv a6,a5 + 83f4c252: b5d5 j 83f4c136 + 83f4c254: 4801 li a6,0 + 83f4c256: 4501 li a0,0 + 83f4c258: 00b87663 bgeu a6,a1,83f4c264 + 83f4c25c: 981a add a6,a6,t1 + 83f4c25e: 00080023 sb zero,0(a6) + 83f4c262: 8082 ret + 83f4c264: c589 beqz a1,83f4c26e + 83f4c266: 00b30833 add a6,t1,a1 + 83f4c26a: fe080fa3 sb zero,-1(a6) + 83f4c26e: 8082 ret + +0000000083f4c270 : + 83f4c270: 715d addi sp,sp,-80 + 83f4c272: 02810313 addi t1,sp,40 + 83f4c276: f436 sd a3,40(sp) + 83f4c278: 869a mv a3,t1 + 83f4c27a: ec06 sd ra,24(sp) + 83f4c27c: f83a sd a4,48(sp) + 83f4c27e: fc3e sd a5,56(sp) + 83f4c280: e0c2 sd a6,64(sp) + 83f4c282: e4c6 sd a7,72(sp) + 83f4c284: e41a sd t1,8(sp) + 83f4c286: d75ff0ef jal ra,83f4bffa + 83f4c28a: 60e2 ld ra,24(sp) + 83f4c28c: 6161 addi sp,sp,80 + 83f4c28e: 8082 ret + +0000000083f4c290 : + 83f4c290: 86aa mv a3,a0 + 83f4c292: c0102773 rdtime a4 + 83f4c296: 017d87b7 lui a5,0x17d8 + 83f4c29a: 84078793 addi a5,a5,-1984 # 17d7840 + 83f4c29e: 02f757b3 divu a5,a4,a5 + 83f4c2a2: 4665 li a2,25 + 83f4c2a4: 00b035b3 snez a1,a1 + 83f4c2a8: 40b00533 neg a0,a1 + 83f4c2ac: 02c75733 divu a4,a4,a2 + 83f4c2b0: 000f4637 lui a2,0xf4 + 83f4c2b4: 24060613 addi a2,a2,576 # f4240 + 83f4c2b8: e29c sd a5,0(a3) + 83f4c2ba: 02c787b3 mul a5,a5,a2 + 83f4c2be: 40f707b3 sub a5,a4,a5 + 83f4c2c2: e69c sd a5,8(a3) + 83f4c2c4: 8082 ret + +0000000083f4c2c6 : + 83f4c2c6: 702007b7 lui a5,0x70200 + 83f4c2ca: 43c8 lw a0,4(a5) + 83f4c2cc: 2501 sext.w a0,a0 + 83f4c2ce: 0820000f fence i,r + 83f4c2d2: 8082 ret + +0000000083f4c2d4 : + 83f4c2d4: 0140000f fence w,o + 83f4c2d8: 702007b7 lui a5,0x70200 + 83f4c2dc: c3c8 sw a0,4(a5) + 83f4c2de: 8082 ret + +0000000083f4c2e0 : + 83f4c2e0: 0140000f fence w,o + 83f4c2e4: 1c0007b7 lui a5,0x1c000 + 83f4c2e8: 9d3d addw a0,a0,a5 + 83f4c2ea: 0025151b slliw a0,a0,0x2 + 83f4c2ee: c10c sw a1,0(a0) + 83f4c2f0: 8082 ret + +0000000083f4c2f2 : + 83f4c2f2: 0140000f fence w,o + 83f4c2f6: 702007b7 lui a5,0x70200 + 83f4c2fa: c388 sw a0,0(a5) + 83f4c2fc: 8082 ret + +0000000083f4c2fe : + 83f4c2fe: 47bd li a5,15 + 83f4c300: 0005059b sext.w a1,a0 + 83f4c304: 02a7da63 bge a5,a0,83f4c338 + 83f4c308: 1c001637 lui a2,0x1c001 + 83f4c30c: 0055d79b srliw a5,a1,0x5 + 83f4c310: 8006061b addiw a2,a2,-2048 + 83f4c314: 9fb1 addw a5,a5,a2 + 83f4c316: 0027979b slliw a5,a5,0x2 + 83f4c31a: 1782 slli a5,a5,0x20 + 83f4c31c: 9381 srli a5,a5,0x20 + 83f4c31e: 4398 lw a4,0(a5) + 83f4c320: 2701 sext.w a4,a4 + 83f4c322: 0820000f fence i,r + 83f4c326: 4685 li a3,1 + 83f4c328: 00b696bb sllw a3,a3,a1 + 83f4c32c: 8f55 or a4,a4,a3 + 83f4c32e: 2701 sext.w a4,a4 + 83f4c330: 0140000f fence w,o + 83f4c334: c398 sw a4,0(a5) + 83f4c336: 8082 ret + 83f4c338: 85aa mv a1,a0 + 83f4c33a: 00006517 auipc a0,0x6 + 83f4c33e: cd650513 addi a0,a0,-810 # 83f52010 + 83f4c342: c53ff06f j 83f4bf94 + +0000000083f4c346 : + 83f4c346: 1101 addi sp,sp,-32 + 83f4c348: e822 sd s0,16(sp) + 83f4c34a: e426 sd s1,8(sp) + 83f4c34c: 01900437 lui s0,0x1900 + 83f4c350: 00011497 auipc s1,0x11 + 83f4c354: 13048493 addi s1,s1,304 # 83f5d480 + 83f4c358: 04000613 li a2,64 + 83f4c35c: 40040593 addi a1,s0,1024 # 1900400 + 83f4c360: 8526 mv a0,s1 + 83f4c362: ec06 sd ra,24(sp) + 83f4c364: d9df30ef jal ra,83f40100 + 83f4c368: 04000613 li a2,64 + 83f4c36c: 4581 li a1,0 + 83f4c36e: 40040513 addi a0,s0,1024 + 83f4c372: c0bff0ef jal ra,83f4bf7c + 83f4c376: 40d4 lw a3,4(s1) + 83f4c378: cec1 beqz a3,83f4c410 + 83f4c37a: 1682 slli a3,a3,0x20 + 83f4c37c: 9281 srli a3,a3,0x20 + 83f4c37e: 96a6 add a3,a3,s1 + 83f4c380: 87a6 mv a5,s1 + 83f4c382: 4401 li s0,0 + 83f4c384: 0007c703 lbu a4,0(a5) # 70200000 + 83f4c388: 0785 addi a5,a5,1 + 83f4c38a: 9c39 addw s0,s0,a4 + 83f4c38c: 1442 slli s0,s0,0x30 + 83f4c38e: 9041 srli s0,s0,0x30 + 83f4c390: fef69ae3 bne a3,a5,83f4c384 + 83f4c394: 0244d583 lhu a1,36(s1) + 83f4c398: 0004061b sext.w a2,s0 + 83f4c39c: 04858763 beq a1,s0,83f4c3ea + 83f4c3a0: 00006517 auipc a0,0x6 + 83f4c3a4: c8850513 addi a0,a0,-888 # 83f52028 + 83f4c3a8: bedff0ef jal ra,83f4bf94 + 83f4c3ac: 00006517 auipc a0,0x6 + 83f4c3b0: c9450513 addi a0,a0,-876 # 83f52040 + 83f4c3b4: be1ff0ef jal ra,83f4bf94 + 83f4c3b8: 00006797 auipc a5,0x6 + 83f4c3bc: 0b07b783 ld a5,176(a5) # 83f52468 <__func__.1+0x270> + 83f4c3c0: e09c sd a5,0(s1) + 83f4c3c2: 00006797 auipc a5,0x6 + 83f4c3c6: 0ae7b783 ld a5,174(a5) # 83f52470 <__func__.1+0x278> + 83f4c3ca: e49c sd a5,8(s1) + 83f4c3cc: 00006797 auipc a5,0x6 + 83f4c3d0: 0ac7b783 ld a5,172(a5) # 83f52478 <__func__.1+0x280> + 83f4c3d4: e89c sd a5,16(s1) + 83f4c3d6: 008297b7 lui a5,0x829 + 83f4c3da: 07a2 slli a5,a5,0x8 + 83f4c3dc: ec9c sd a5,24(s1) + 83f4c3de: 6785 lui a5,0x1 + 83f4c3e0: c0078793 addi a5,a5,-1024 # c00 <_EL1_STACK_SIZE+0x400> + 83f4c3e4: d09c sw a5,32(s1) + 83f4c3e6: 02849223 sh s0,36(s1) + 83f4c3ea: 1fe000ef jal ra,83f4c5e8 + 83f4c3ee: 6785 lui a5,0x1 + 83f4c3f0: 6442 ld s0,16(sp) + 83f4c3f2: 80478793 addi a5,a5,-2044 # 804 <_EL1_STACK_SIZE+0x4> + 83f4c3f6: 60e2 ld ra,24(sp) + 83f4c3f8: 02f49323 sh a5,38(s1) + 83f4c3fc: 64a2 ld s1,8(sp) + 83f4c3fe: 04000593 li a1,64 + 83f4c402: 00011517 auipc a0,0x11 + 83f4c406: 07e50513 addi a0,a0,126 # 83f5d480 + 83f4c40a: 6105 addi sp,sp,32 + 83f4c40c: b4dff06f j 83f4bf58 + 83f4c410: 4401 li s0,0 + 83f4c412: b749 j 83f4c394 + +0000000083f4c414 : + 83f4c414: 1141 addi sp,sp,-16 + 83f4c416: 00006517 auipc a0,0x6 + 83f4c41a: c4a50513 addi a0,a0,-950 # 83f52060 + 83f4c41e: e406 sd ra,8(sp) + 83f4c420: b75ff0ef jal ra,83f4bf94 + 83f4c424: 60a2 ld ra,8(sp) + 83f4c426: 0141 addi sp,sp,16 + 83f4c428: f1fff06f j 83f4c346 + +0000000083f4c42c : + 83f4c42c: 1141 addi sp,sp,-16 + 83f4c42e: e406 sd ra,8(sp) + 83f4c430: 30405073 csrwi mie,0 + 83f4c434: 34405073 csrwi mip,0 + 83f4c438: 700007b7 lui a5,0x70000 + 83f4c43c: 02078713 addi a4,a5,32 # 70000020 + 83f4c440: 0140000f fence w,o + 83f4c444: 0007a023 sw zero,0(a5) + 83f4c448: 0791 addi a5,a5,4 + 83f4c44a: fee79be3 bne a5,a4,83f4c440 + 83f4c44e: 700017b7 lui a5,0x70001 + 83f4c452: 6605 lui a2,0x1 + 83f4c454: 01478693 addi a3,a5,20 # 70001014 + 83f4c458: 0140000f fence w,o + 83f4c45c: 0007a023 sw zero,0(a5) + 83f4c460: 0140000f fence w,o + 83f4c464: 00c78733 add a4,a5,a2 + 83f4c468: 00072023 sw zero,0(a4) + 83f4c46c: 0791 addi a5,a5,4 + 83f4c46e: fed795e3 bne a5,a3,83f4c458 + 83f4c472: 40060613 addi a2,a2,1024 # 1400 <_EL1_STACK_SIZE+0xc00> + 83f4c476: 4581 li a1,0 + 83f4c478: 00010517 auipc a0,0x10 + 83f4c47c: c0850513 addi a0,a0,-1016 # 83f5c080 + 83f4c480: afdff0ef jal ra,83f4bf7c + 83f4c484: 4501 li a0,0 + 83f4c486: e6dff0ef jal ra,83f4c2f2 + 83f4c48a: 300467f3 csrrsi a5,mstatus,8 + 83f4c48e: 60a2 ld ra,8(sp) + 83f4c490: 0141 addi sp,sp,16 + 83f4c492: 8082 ret + +0000000083f4c494 : + 83f4c494: 1141 addi sp,sp,-16 + 83f4c496: e406 sd ra,8(sp) + 83f4c498: 0f0000ef jal ra,83f4c588 + 83f4c49c: 0ee000ef jal ra,83f4c58a + 83f4c4a0: f8dff0ef jal ra,83f4c42c + 83f4c4a4: 60a2 ld ra,8(sp) + 83f4c4a6: 00006517 auipc a0,0x6 + 83f4c4aa: bd250513 addi a0,a0,-1070 # 83f52078 + 83f4c4ae: 0141 addi sp,sp,16 + 83f4c4b0: ae5ff06f j 83f4bf94 + +0000000083f4c4b4 : + 83f4c4b4: 7139 addi sp,sp,-64 + 83f4c4b6: f04a sd s2,32(sp) + 83f4c4b8: 00251913 slli s2,a0,0x2 + 83f4c4bc: f822 sd s0,48(sp) + 83f4c4be: 842a mv s0,a0 + 83f4c4c0: 954a add a0,a0,s2 + 83f4c4c2: f426 sd s1,40(sp) + 83f4c4c4: 050e slli a0,a0,0x3 + 83f4c4c6: 00010497 auipc s1,0x10 + 83f4c4ca: bba48493 addi s1,s1,-1094 # 83f5c080 + 83f4c4ce: ec4e sd s3,24(sp) + 83f4c4d0: e852 sd s4,16(sp) + 83f4c4d2: e456 sd s5,8(sp) + 83f4c4d4: fc06 sd ra,56(sp) + 83f4c4d6: 00a48ab3 add s5,s1,a0 + 83f4c4da: 00bab023 sd a1,0(s5) + 83f4c4de: 8a32 mv s4,a2 + 83f4c4e0: 89ba mv s3,a4 + 83f4c4e2: ca89 beqz a3,83f4c4f4 + 83f4c4e4: 0561 addi a0,a0,24 + 83f4c4e6: 4641 li a2,16 + 83f4c4e8: 85b6 mv a1,a3 + 83f4c4ea: 9526 add a0,a0,s1 + 83f4c4ec: c15f30ef jal ra,83f40100 + 83f4c4f0: 020a83a3 sb zero,39(s5) + 83f4c4f4: 008907b3 add a5,s2,s0 + 83f4c4f8: 078e slli a5,a5,0x3 + 83f4c4fa: 97a6 add a5,a5,s1 + 83f4c4fc: 8522 mv a0,s0 + 83f4c4fe: c7c0 sw s0,12(a5) + 83f4c500: 0147a423 sw s4,8(a5) + 83f4c504: 0137b823 sd s3,16(a5) + 83f4c508: 459d li a1,7 + 83f4c50a: dd7ff0ef jal ra,83f4c2e0 + 83f4c50e: 8522 mv a0,s0 + 83f4c510: defff0ef jal ra,83f4c2fe + 83f4c514: 70e2 ld ra,56(sp) + 83f4c516: 7442 ld s0,48(sp) + 83f4c518: 74a2 ld s1,40(sp) + 83f4c51a: 7902 ld s2,32(sp) + 83f4c51c: 69e2 ld s3,24(sp) + 83f4c51e: 6a42 ld s4,16(sp) + 83f4c520: 6aa2 ld s5,8(sp) + 83f4c522: 4501 li a0,0 + 83f4c524: 6121 addi sp,sp,64 + 83f4c526: 8082 ret + +0000000083f4c528 : + 83f4c528: 1101 addi sp,sp,-32 + 83f4c52a: e426 sd s1,8(sp) + 83f4c52c: e04a sd s2,0(sp) + 83f4c52e: ec06 sd ra,24(sp) + 83f4c530: e822 sd s0,16(sp) + 83f4c532: 00010497 auipc s1,0x10 + 83f4c536: b4e48493 addi s1,s1,-1202 # 83f5c080 + 83f4c53a: 00006917 auipc s2,0x6 + 83f4c53e: b5690913 addi s2,s2,-1194 # 83f52090 + 83f4c542: d85ff0ef jal ra,83f4c2c6 + 83f4c546: 00251793 slli a5,a0,0x2 + 83f4c54a: 97aa add a5,a5,a0 + 83f4c54c: 078e slli a5,a5,0x3 + 83f4c54e: 97a6 add a5,a5,s1 + 83f4c550: 6398 ld a4,0(a5) + 83f4c552: 842a mv s0,a0 + 83f4c554: cf09 beqz a4,83f4c56e + 83f4c556: e50d bnez a0,83f4c580 + 83f4c558: 6785 lui a5,0x1 + 83f4c55a: 8007879b addiw a5,a5,-2048 + 83f4c55e: 3447b7f3 csrrc a5,mip,a5 + 83f4c562: 60e2 ld ra,24(sp) + 83f4c564: 6442 ld s0,16(sp) + 83f4c566: 64a2 ld s1,8(sp) + 83f4c568: 6902 ld s2,0(sp) + 83f4c56a: 6105 addi sp,sp,32 + 83f4c56c: 8082 ret + 83f4c56e: 85aa mv a1,a0 + 83f4c570: 854a mv a0,s2 + 83f4c572: d07d beqz s0,83f4c558 + 83f4c574: a21ff0ef jal ra,83f4bf94 + 83f4c578: 8522 mv a0,s0 + 83f4c57a: d5bff0ef jal ra,83f4c2d4 + 83f4c57e: b7d1 j 83f4c542 + 83f4c580: 6b8c ld a1,16(a5) + 83f4c582: 47c8 lw a0,12(a5) + 83f4c584: 9702 jalr a4 + 83f4c586: bfcd j 83f4c578 + +0000000083f4c588 : + 83f4c588: 8082 ret + +0000000083f4c58a : + 83f4c58a: 017d8637 lui a2,0x17d8 + 83f4c58e: 65f1 lui a1,0x1c + 83f4c590: 84060613 addi a2,a2,-1984 # 17d7840 + 83f4c594: 20058593 addi a1,a1,512 # 1c200 <_EL1_STACK_SIZE+0x1ba00> + 83f4c598: 4501 li a0,0 + 83f4c59a: 6f70106f j 83f4e490 + +0000000083f4c59e : + 83f4c59e: c521 beqz a0,83f4c5e6 + 83f4c5a0: 1101 addi sp,sp,-32 + 83f4c5a2: e426 sd s1,8(sp) + 83f4c5a4: ec06 sd ra,24(sp) + 83f4c5a6: e822 sd s0,16(sp) + 83f4c5a8: e04a sd s2,0(sp) + 83f4c5aa: 00054403 lbu s0,0(a0) + 83f4c5ae: 84aa mv s1,a0 + 83f4c5b0: c40d beqz s0,83f4c5da + 83f4c5b2: 4929 li s2,10 + 83f4c5b4: a039 j 83f4c5c2 + 83f4c5b6: 8522 mv a0,s0 + 83f4c5b8: 767010ef jal ra,83f4e51e + 83f4c5bc: 0004c403 lbu s0,0(s1) + 83f4c5c0: cc09 beqz s0,83f4c5da + 83f4c5c2: 0485 addi s1,s1,1 + 83f4c5c4: ff2419e3 bne s0,s2,83f4c5b6 + 83f4c5c8: 4535 li a0,13 + 83f4c5ca: 755010ef jal ra,83f4e51e + 83f4c5ce: 8522 mv a0,s0 + 83f4c5d0: 74f010ef jal ra,83f4e51e + 83f4c5d4: 0004c403 lbu s0,0(s1) + 83f4c5d8: f46d bnez s0,83f4c5c2 + 83f4c5da: 60e2 ld ra,24(sp) + 83f4c5dc: 6442 ld s0,16(sp) + 83f4c5de: 64a2 ld s1,8(sp) + 83f4c5e0: 6902 ld s2,0(sp) + 83f4c5e2: 6105 addi sp,sp,32 + 83f4c5e4: 8082 ret + 83f4c5e6: 8082 ret + +0000000083f4c5e8 : + 83f4c5e8: 7179 addi sp,sp,-48 + 83f4c5ea: ec26 sd s1,24(sp) + 83f4c5ec: 00013497 auipc s1,0x13 + 83f4c5f0: 63c48493 addi s1,s1,1596 # 83f5fc28 + 83f4c5f4: 4090 lw a2,0(s1) + 83f4c5f6: f022 sd s0,32(sp) + 83f4c5f8: f406 sd ra,40(sp) + 83f4c5fa: e84a sd s2,16(sp) + 83f4c5fc: e44e sd s3,8(sp) + 83f4c5fe: 00011417 auipc s0,0x11 + 83f4c602: e8240413 addi s0,s0,-382 # 83f5d480 + 83f4c606: ea3d bnez a2,83f4c67c + 83f4c608: 02144703 lbu a4,33(s0) + 83f4c60c: 4695 li a3,5 + 83f4c60e: ff47079b addiw a5,a4,-12 + 83f4c612: 0ff7f793 andi a5,a5,255 + 83f4c616: 04f6ee63 bltu a3,a5,83f4c672 + 83f4c61a: 4505 li a0,1 + 83f4c61c: 00e5193b sllw s2,a0,a4 + 83f4c620: 0409051b addiw a0,s2,64 + 83f4c624: 761010ef jal ra,83f4e584 + 83f4c628: cd15 beqz a0,83f4c664 + 83f4c62a: 03f50513 addi a0,a0,63 + 83f4c62e: 57fd li a5,-1 + 83f4c630: fc057513 andi a0,a0,-64 + 83f4c634: 9381 srli a5,a5,0x20 + 83f4c636: 00013997 auipc s3,0x13 + 83f4c63a: 5ea98993 addi s3,s3,1514 # 83f5fc20 + 83f4c63e: 8fe9 and a5,a5,a0 + 83f4c640: 07c9 addi a5,a5,18 + 83f4c642: 00a9b023 sd a0,0(s3) + 83f4c646: 3939 addiw s2,s2,-18 + 83f4c648: e11c sd a5,0(a0) + 83f4c64a: 00052623 sw zero,12(a0) + 83f4c64e: 4785 li a5,1 + 83f4c650: 000508a3 sb zero,17(a0) + 83f4c654: 01252423 sw s2,8(a0) + 83f4c658: c09c sw a5,0(s1) + 83f4c65a: 02044783 lbu a5,32(s0) + 83f4c65e: ef95 bnez a5,83f4c69a + 83f4c660: 0009b503 ld a0,0(s3) + 83f4c664: 70a2 ld ra,40(sp) + 83f4c666: 7402 ld s0,32(sp) + 83f4c668: 64e2 ld s1,24(sp) + 83f4c66a: 6942 ld s2,16(sp) + 83f4c66c: 69a2 ld s3,8(sp) + 83f4c66e: 6145 addi sp,sp,48 + 83f4c670: 8082 ret + 83f4c672: 6505 lui a0,0x1 + 83f4c674: 04050513 addi a0,a0,64 # 1040 <_EL1_STACK_SIZE+0x840> + 83f4c678: 6905 lui s2,0x1 + 83f4c67a: b76d j 83f4c624 + 83f4c67c: 02044583 lbu a1,32(s0) + 83f4c680: 00006517 auipc a0,0x6 + 83f4c684: a2850513 addi a0,a0,-1496 # 83f520a8 + 83f4c688: 00013997 auipc s3,0x13 + 83f4c68c: 59898993 addi s3,s3,1432 # 83f5fc20 + 83f4c690: 905ff0ef jal ra,83f4bf94 + 83f4c694: 02044783 lbu a5,32(s0) + 83f4c698: d7e1 beqz a5,83f4c660 + 83f4c69a: 00006517 auipc a0,0x6 + 83f4c69e: a4650513 addi a0,a0,-1466 # 83f520e0 + 83f4c6a2: 8f3ff0ef jal ra,83f4bf94 + 83f4c6a6: 0009b503 ld a0,0(s3) + 83f4c6aa: 00007797 auipc a5,0x7 + 83f4c6ae: b007ad23 sw zero,-1254(a5) # 83f531c4 + 83f4c6b2: 4785 li a5,1 + 83f4c6b4: 00f50823 sb a5,16(a0) + 83f4c6b8: 70a2 ld ra,40(sp) + 83f4c6ba: 7402 ld s0,32(sp) + 83f4c6bc: 64e2 ld s1,24(sp) + 83f4c6be: 6942 ld s2,16(sp) + 83f4c6c0: 69a2 ld s3,8(sp) + 83f4c6c2: 6145 addi sp,sp,48 + 83f4c6c4: 8082 ret + +0000000083f4c6c6 : + 83f4c6c6: 00013797 auipc a5,0x13 + 83f4c6ca: 55a7b783 ld a5,1370(a5) # 83f5fc20 + 83f4c6ce: 4705 li a4,1 + 83f4c6d0: 00e78823 sb a4,16(a5) + 83f4c6d4: 00007797 auipc a5,0x7 + 83f4c6d8: ae07a823 sw zero,-1296(a5) # 83f531c4 + 83f4c6dc: 8082 ret + +0000000083f4c6de : + 83f4c6de: 00013797 auipc a5,0x13 + 83f4c6e2: 5427b783 ld a5,1346(a5) # 83f5fc20 + 83f4c6e6: 00078823 sb zero,16(a5) + 83f4c6ea: 4785 li a5,1 + 83f4c6ec: 00007717 auipc a4,0x7 + 83f4c6f0: acf72c23 sw a5,-1320(a4) # 83f531c4 + 83f4c6f4: 8082 ret + +0000000083f4c6f6 : + 83f4c6f6: 00011717 auipc a4,0x11 + 83f4c6fa: dab74703 lbu a4,-597(a4) # 83f5d4a1 + 83f4c6fe: 1101 addi sp,sp,-32 + 83f4c700: ff47079b addiw a5,a4,-12 + 83f4c704: e426 sd s1,8(sp) + 83f4c706: ec06 sd ra,24(sp) + 83f4c708: e822 sd s0,16(sp) + 83f4c70a: e04a sd s2,0(sp) + 83f4c70c: 0ff7f793 andi a5,a5,255 + 83f4c710: 4695 li a3,5 + 83f4c712: 6485 lui s1,0x1 + 83f4c714: 00f6e563 bltu a3,a5,83f4c71e + 83f4c718: 4485 li s1,1 + 83f4c71a: 00e494bb sllw s1,s1,a4 + 83f4c71e: 00013517 auipc a0,0x13 + 83f4c722: 51250513 addi a0,a0,1298 # 83f5fc30 + 83f4c726: 4fc000ef jal ra,83f4cc22 <_hw_raw_spin_lock_irqsave> + 83f4c72a: 00013917 auipc s2,0x13 + 83f4c72e: 4f690913 addi s2,s2,1270 # 83f5fc20 + 83f4c732: 842a mv s0,a0 + 83f4c734: 00093503 ld a0,0(s2) + 83f4c738: 85a6 mv a1,s1 + 83f4c73a: 81fff0ef jal ra,83f4bf58 + 83f4c73e: 85a2 mv a1,s0 + 83f4c740: 00013517 auipc a0,0x13 + 83f4c744: 4f050513 addi a0,a0,1264 # 83f5fc30 + 83f4c748: 540000ef jal ra,83f4cc88 <_hw_raw_spin_unlock_irqrestore> + 83f4c74c: 60e2 ld ra,24(sp) + 83f4c74e: 6442 ld s0,16(sp) + 83f4c750: 00093503 ld a0,0(s2) + 83f4c754: 64a2 ld s1,8(sp) + 83f4c756: 6902 ld s2,0(sp) + 83f4c758: 6105 addi sp,sp,32 + 83f4c75a: 8082 ret + +0000000083f4c75c : + 83f4c75c: 7179 addi sp,sp,-48 + 83f4c75e: e84a sd s2,16(sp) + 83f4c760: 892a mv s2,a0 + 83f4c762: 00013517 auipc a0,0x13 + 83f4c766: 4ce50513 addi a0,a0,1230 # 83f5fc30 + 83f4c76a: f022 sd s0,32(sp) + 83f4c76c: f406 sd ra,40(sp) + 83f4c76e: ec26 sd s1,24(sp) + 83f4c770: e44e sd s3,8(sp) + 83f4c772: e052 sd s4,0(sp) + 83f4c774: 4ae000ef jal ra,83f4cc22 <_hw_raw_spin_lock_irqsave> + 83f4c778: 00007797 auipc a5,0x7 + 83f4c77c: a4c7a783 lw a5,-1460(a5) # 83f531c4 + 83f4c780: 842a mv s0,a0 + 83f4c782: 30079463 bnez a5,83f4ca8a + 83f4c786: 00013897 auipc a7,0x13 + 83f4c78a: 49a88893 addi a7,a7,1178 # 83f5fc20 + 83f4c78e: 0008b783 ld a5,0(a7) + 83f4c792: 0017ce83 lbu t4,1(a5) + 83f4c796: 0007c683 lbu a3,0(a5) + 83f4c79a: 0027ce03 lbu t3,2(a5) + 83f4c79e: 00d7c503 lbu a0,13(a5) + 83f4c7a2: 0037c303 lbu t1,3(a5) + 83f4c7a6: 00c7cf03 lbu t5,12(a5) + 83f4c7aa: 00e7c583 lbu a1,14(a5) + 83f4c7ae: 0047c603 lbu a2,4(a5) + 83f4c7b2: 0ea2 slli t4,t4,0x8 + 83f4c7b4: 00f7c703 lbu a4,15(a5) + 83f4c7b8: 0057c803 lbu a6,5(a5) + 83f4c7bc: 00deeeb3 or t4,t4,a3 + 83f4c7c0: 0e42 slli t3,t3,0x10 + 83f4c7c2: 0067c683 lbu a3,6(a5) + 83f4c7c6: 01de6e33 or t3,t3,t4 + 83f4c7ca: 0362 slli t1,t1,0x18 + 83f4c7cc: 0522 slli a0,a0,0x8 + 83f4c7ce: 0077ce83 lbu t4,7(a5) + 83f4c7d2: 01e56533 or a0,a0,t5 + 83f4c7d6: 01c36333 or t1,t1,t3 + 83f4c7da: 1602 slli a2,a2,0x20 + 83f4c7dc: 05c2 slli a1,a1,0x10 + 83f4c7de: 8dc9 or a1,a1,a0 + 83f4c7e0: 00666633 or a2,a2,t1 + 83f4c7e4: 1822 slli a6,a6,0x28 + 83f4c7e6: 0762 slli a4,a4,0x18 + 83f4c7e8: 8f4d or a4,a4,a1 + 83f4c7ea: 00c86833 or a6,a6,a2 + 83f4c7ee: 16c2 slli a3,a3,0x30 + 83f4c7f0: 0017061b addiw a2,a4,1 + 83f4c7f4: 0106e6b3 or a3,a3,a6 + 83f4c7f8: 038e9813 slli a6,t4,0x38 + 83f4c7fc: 00d86833 or a6,a6,a3 + 83f4c800: 0086551b srliw a0,a2,0x8 + 83f4c804: 0106559b srliw a1,a2,0x10 + 83f4c808: 0186569b srliw a3,a2,0x18 + 83f4c80c: 00a786a3 sb a0,13(a5) + 83f4c810: 00c78623 sb a2,12(a5) + 83f4c814: 00b78723 sb a1,14(a5) + 83f4c818: 00d787a3 sb a3,15(a5) + 83f4c81c: 9742 add a4,a4,a6 + 83f4c81e: 05200793 li a5,82 + 83f4c822: 00f70023 sb a5,0(a4) + 83f4c826: 0008b703 ld a4,0(a7) + 83f4c82a: 00d74603 lbu a2,13(a4) + 83f4c82e: 00c74583 lbu a1,12(a4) + 83f4c832: 00e74683 lbu a3,14(a4) + 83f4c836: 00f74783 lbu a5,15(a4) + 83f4c83a: 0622 slli a2,a2,0x8 + 83f4c83c: 8e4d or a2,a2,a1 + 83f4c83e: 06c2 slli a3,a3,0x10 + 83f4c840: 8ed1 or a3,a3,a2 + 83f4c842: 07e2 slli a5,a5,0x18 + 83f4c844: 8fd5 or a5,a5,a3 + 83f4c846: 0017869b addiw a3,a5,1 + 83f4c84a: 0086d51b srliw a0,a3,0x8 + 83f4c84e: 0106d59b srliw a1,a3,0x10 + 83f4c852: 0186d61b srliw a2,a3,0x18 + 83f4c856: 00d70623 sb a3,12(a4) + 83f4c85a: 00a706a3 sb a0,13(a4) + 83f4c85e: 00b70723 sb a1,14(a4) + 83f4c862: 00c707a3 sb a2,15(a4) + 83f4c866: 97c2 add a5,a5,a6 + 83f4c868: 05400713 li a4,84 + 83f4c86c: 00e78023 sb a4,0(a5) + 83f4c870: 0008b703 ld a4,0(a7) + 83f4c874: 00d74603 lbu a2,13(a4) + 83f4c878: 00c74583 lbu a1,12(a4) + 83f4c87c: 00e74683 lbu a3,14(a4) + 83f4c880: 00f74783 lbu a5,15(a4) + 83f4c884: 0622 slli a2,a2,0x8 + 83f4c886: 8e4d or a2,a2,a1 + 83f4c888: 06c2 slli a3,a3,0x10 + 83f4c88a: 8ed1 or a3,a3,a2 + 83f4c88c: 07e2 slli a5,a5,0x18 + 83f4c88e: 8fd5 or a5,a5,a3 + 83f4c890: 0017869b addiw a3,a5,1 + 83f4c894: 0086d51b srliw a0,a3,0x8 + 83f4c898: 0106d59b srliw a1,a3,0x10 + 83f4c89c: 0186d61b srliw a2,a3,0x18 + 83f4c8a0: 00d70623 sb a3,12(a4) + 83f4c8a4: 00a706a3 sb a0,13(a4) + 83f4c8a8: 00b70723 sb a1,14(a4) + 83f4c8ac: 00c707a3 sb a2,15(a4) + 83f4c8b0: 97c2 add a5,a5,a6 + 83f4c8b2: 04400713 li a4,68 + 83f4c8b6: 00e78023 sb a4,0(a5) + 83f4c8ba: 0008b703 ld a4,0(a7) + 83f4c8be: 00d74603 lbu a2,13(a4) + 83f4c8c2: 00c74583 lbu a1,12(a4) + 83f4c8c6: 00e74683 lbu a3,14(a4) + 83f4c8ca: 00f74783 lbu a5,15(a4) + 83f4c8ce: 0622 slli a2,a2,0x8 + 83f4c8d0: 8e4d or a2,a2,a1 + 83f4c8d2: 06c2 slli a3,a3,0x10 + 83f4c8d4: 8ed1 or a3,a3,a2 + 83f4c8d6: 07e2 slli a5,a5,0x18 + 83f4c8d8: 8fd5 or a5,a5,a3 + 83f4c8da: 0017869b addiw a3,a5,1 + 83f4c8de: 0086d51b srliw a0,a3,0x8 + 83f4c8e2: 0106d59b srliw a1,a3,0x10 + 83f4c8e6: 0186d61b srliw a2,a3,0x18 + 83f4c8ea: 00d70623 sb a3,12(a4) + 83f4c8ee: 00a706a3 sb a0,13(a4) + 83f4c8f2: 00b70723 sb a1,14(a4) + 83f4c8f6: 00c707a3 sb a2,15(a4) + 83f4c8fa: 97c2 add a5,a5,a6 + 83f4c8fc: 03a00713 li a4,58 + 83f4c900: 00e78023 sb a4,0(a5) + 83f4c904: 0008b703 ld a4,0(a7) + 83f4c908: 00d74603 lbu a2,13(a4) + 83f4c90c: 00c74583 lbu a1,12(a4) + 83f4c910: 00e74683 lbu a3,14(a4) + 83f4c914: 00f74783 lbu a5,15(a4) + 83f4c918: 0622 slli a2,a2,0x8 + 83f4c91a: 8e4d or a2,a2,a1 + 83f4c91c: 06c2 slli a3,a3,0x10 + 83f4c91e: 8ed1 or a3,a3,a2 + 83f4c920: 07e2 slli a5,a5,0x18 + 83f4c922: 8fd5 or a5,a5,a3 + 83f4c924: 0017869b addiw a3,a5,1 + 83f4c928: 0106d59b srliw a1,a3,0x10 + 83f4c92c: 0086d51b srliw a0,a3,0x8 + 83f4c930: 0186d61b srliw a2,a3,0x18 + 83f4c934: 00d70623 sb a3,12(a4) + 83f4c938: 00a706a3 sb a0,13(a4) + 83f4c93c: 00b70723 sb a1,14(a4) + 83f4c940: 00c707a3 sb a2,15(a4) + 83f4c944: 97c2 add a5,a5,a6 + 83f4c946: 02000713 li a4,32 + 83f4c94a: 00e78023 sb a4,0(a5) + 83f4c94e: 00094583 lbu a1,0(s2) + 83f4c952: 18058c63 beqz a1,83f4caea + 83f4c956: 0008b783 ld a5,0(a7) + 83f4c95a: 4305 li t1,1 + 83f4c95c: 854a mv a0,s2 + 83f4c95e: 4e29 li t3,10 + 83f4c960: 4f35 li t5,13 + 83f4c962: 4123033b subw t1,t1,s2 + 83f4c966: 4e85 li t4,1 + 83f4c968: 00d7c603 lbu a2,13(a5) + 83f4c96c: 00c7cf83 lbu t6,12(a5) + 83f4c970: 00e7c683 lbu a3,14(a5) + 83f4c974: 00f7c703 lbu a4,15(a5) + 83f4c978: 0622 slli a2,a2,0x8 + 83f4c97a: 01f66633 or a2,a2,t6 + 83f4c97e: 06c2 slli a3,a3,0x10 + 83f4c980: 8ed1 or a3,a3,a2 + 83f4c982: 0762 slli a4,a4,0x18 + 83f4c984: 8f55 or a4,a4,a3 + 83f4c986: 0017061b addiw a2,a4,1 + 83f4c98a: 0006069b sext.w a3,a2 + 83f4c98e: 9742 add a4,a4,a6 + 83f4c990: 05c59563 bne a1,t3,83f4c9da + 83f4c994: 0106559b srliw a1,a2,0x10 + 83f4c998: 0186569b srliw a3,a2,0x18 + 83f4c99c: 00865f9b srliw t6,a2,0x8 + 83f4c9a0: 00c78623 sb a2,12(a5) + 83f4c9a4: 00b78723 sb a1,14(a5) + 83f4c9a8: 00d787a3 sb a3,15(a5) + 83f4c9ac: 01f786a3 sb t6,13(a5) + 83f4c9b0: 01e70023 sb t5,0(a4) + 83f4c9b4: 0008b783 ld a5,0(a7) + 83f4c9b8: 00d7c603 lbu a2,13(a5) + 83f4c9bc: 00c7c583 lbu a1,12(a5) + 83f4c9c0: 00e7c683 lbu a3,14(a5) + 83f4c9c4: 00f7c703 lbu a4,15(a5) + 83f4c9c8: 0622 slli a2,a2,0x8 + 83f4c9ca: 8e4d or a2,a2,a1 + 83f4c9cc: 06c2 slli a3,a3,0x10 + 83f4c9ce: 8ed1 or a3,a3,a2 + 83f4c9d0: 0762 slli a4,a4,0x18 + 83f4c9d2: 8f55 or a4,a4,a3 + 83f4c9d4: 0017069b addiw a3,a4,1 + 83f4c9d8: 9742 add a4,a4,a6 + 83f4c9da: 0086df9b srliw t6,a3,0x8 + 83f4c9de: 0106d59b srliw a1,a3,0x10 + 83f4c9e2: 0186d61b srliw a2,a3,0x18 + 83f4c9e6: 00d78623 sb a3,12(a5) + 83f4c9ea: 01f786a3 sb t6,13(a5) + 83f4c9ee: 00c787a3 sb a2,15(a5) + 83f4c9f2: 00b78723 sb a1,14(a5) + 83f4c9f6: 00054783 lbu a5,0(a0) + 83f4c9fa: 00a304bb addw s1,t1,a0 + 83f4c9fe: 0505 addi a0,a0,1 + 83f4ca00: 00f70023 sb a5,0(a4) + 83f4ca04: 0008b783 ld a5,0(a7) + 83f4ca08: 00d7c283 lbu t0,13(a5) + 83f4ca0c: 0097cf83 lbu t6,9(a5) + 83f4ca10: 00c7c083 lbu ra,12(a5) + 83f4ca14: 00e7c583 lbu a1,14(a5) + 83f4ca18: 0087c383 lbu t2,8(a5) + 83f4ca1c: 00a7c603 lbu a2,10(a5) + 83f4ca20: 00f7c683 lbu a3,15(a5) + 83f4ca24: 00b7c703 lbu a4,11(a5) + 83f4ca28: 02a2 slli t0,t0,0x8 + 83f4ca2a: 0fa2 slli t6,t6,0x8 + 83f4ca2c: 0012e2b3 or t0,t0,ra + 83f4ca30: 05c2 slli a1,a1,0x10 + 83f4ca32: 007fefb3 or t6,t6,t2 + 83f4ca36: 0642 slli a2,a2,0x10 + 83f4ca38: 0055e5b3 or a1,a1,t0 + 83f4ca3c: 06e2 slli a3,a3,0x18 + 83f4ca3e: 01f66633 or a2,a2,t6 + 83f4ca42: 0762 slli a4,a4,0x18 + 83f4ca44: 8ecd or a3,a3,a1 + 83f4ca46: 8f51 or a4,a4,a2 + 83f4ca48: 2681 sext.w a3,a3 + 83f4ca4a: 2701 sext.w a4,a4 + 83f4ca4c: 00e6ec63 bltu a3,a4,83f4ca64 + 83f4ca50: 01d788a3 sb t4,17(a5) + 83f4ca54: 00078623 sb zero,12(a5) + 83f4ca58: 000786a3 sb zero,13(a5) + 83f4ca5c: 00078723 sb zero,14(a5) + 83f4ca60: 000787a3 sb zero,15(a5) + 83f4ca64: 00054583 lbu a1,0(a0) + 83f4ca68: f181 bnez a1,83f4c968 + 83f4ca6a: 85a2 mv a1,s0 + 83f4ca6c: 00013517 auipc a0,0x13 + 83f4ca70: 1c450513 addi a0,a0,452 # 83f5fc30 + 83f4ca74: 214000ef jal ra,83f4cc88 <_hw_raw_spin_unlock_irqrestore> + 83f4ca78: 70a2 ld ra,40(sp) + 83f4ca7a: 7402 ld s0,32(sp) + 83f4ca7c: 6942 ld s2,16(sp) + 83f4ca7e: 69a2 ld s3,8(sp) + 83f4ca80: 6a02 ld s4,0(sp) + 83f4ca82: 8526 mv a0,s1 + 83f4ca84: 64e2 ld s1,24(sp) + 83f4ca86: 6145 addi sp,sp,48 + 83f4ca88: 8082 ret + 83f4ca8a: 05200493 li s1,82 + 83f4ca8e: 00005997 auipc s3,0x5 + 83f4ca92: 67b98993 addi s3,s3,1659 # 83f52109 + 83f4ca96: 4a29 li s4,10 + 83f4ca98: 8526 mv a0,s1 + 83f4ca9a: 285010ef jal ra,83f4e51e + 83f4ca9e: 0009c483 lbu s1,0(s3) + 83f4caa2: 0985 addi s3,s3,1 + 83f4caa4: cc89 beqz s1,83f4cabe + 83f4caa6: ff4499e3 bne s1,s4,83f4ca98 + 83f4caaa: 4535 li a0,13 + 83f4caac: 273010ef jal ra,83f4e51e + 83f4cab0: 8526 mv a0,s1 + 83f4cab2: 26d010ef jal ra,83f4e51e + 83f4cab6: 0009c483 lbu s1,0(s3) + 83f4caba: 0985 addi s3,s3,1 + 83f4cabc: f4ed bnez s1,83f4caa6 + 83f4cabe: 00094503 lbu a0,0(s2) + 83f4cac2: 49a9 li s3,10 + 83f4cac4: 0905 addi s2,s2,1 + 83f4cac6: e901 bnez a0,83f4cad6 + 83f4cac8: a00d j 83f4caea + 83f4caca: 255010ef jal ra,83f4e51e + 83f4cace: fff94503 lbu a0,-1(s2) + 83f4cad2: 2485 addiw s1,s1,1 + 83f4cad4: d959 beqz a0,83f4ca6a + 83f4cad6: 0905 addi s2,s2,1 + 83f4cad8: ff3519e3 bne a0,s3,83f4caca + 83f4cadc: 4535 li a0,13 + 83f4cade: 241010ef jal ra,83f4e51e + 83f4cae2: 4529 li a0,10 + 83f4cae4: 23b010ef jal ra,83f4e51e + 83f4cae8: b749 j 83f4ca6a + 83f4caea: 4481 li s1,0 + 83f4caec: bfbd j 83f4ca6a + +0000000083f4caee : + 83f4caee: 1141 addi sp,sp,-16 + 83f4caf0: 460d li a2,3 + 83f4caf2: 4581 li a1,0 + 83f4caf4: 4505 li a0,1 + 83f4caf6: e022 sd s0,0(sp) + 83f4caf8: e406 sd ra,8(sp) + 83f4cafa: 00013417 auipc s0,0x13 + 83f4cafe: 13e40413 addi s0,s0,318 # 83f5fc38 + 83f4cb02: 6d9010ef jal ra,83f4e9da + 83f4cb06: e008 sd a0,0(s0) + 83f4cb08: c51d beqz a0,83f4cb36 + 83f4cb0a: 4581 li a1,0 + 83f4cb0c: 4681 li a3,0 + 83f4cb0e: 4601 li a2,0 + 83f4cb10: 00013797 auipc a5,0x13 + 83f4cb14: 12078223 sb zero,292(a5) # 83f5fc34 + 83f4cb18: 72f010ef jal ra,83f4ea46 + 83f4cb1c: 6402 ld s0,0(sp) + 83f4cb1e: 60a2 ld ra,8(sp) + 83f4cb20: 00005597 auipc a1,0x5 + 83f4cb24: 6a058593 addi a1,a1,1696 # 83f521c0 <__func__.0> + 83f4cb28: 00005517 auipc a0,0x5 + 83f4cb2c: 60850513 addi a0,a0,1544 # 83f52130 + 83f4cb30: 0141 addi sp,sp,16 + 83f4cb32: c62ff06f j 83f4bf94 + 83f4cb36: 00005517 auipc a0,0x5 + 83f4cb3a: 5da50513 addi a0,a0,1498 # 83f52110 + 83f4cb3e: c56ff0ef jal ra,83f4bf94 + 83f4cb42: 6008 ld a0,0(s0) + 83f4cb44: b7d9 j 83f4cb0a + +0000000083f4cb46 : + 83f4cb46: 1101 addi sp,sp,-32 + 83f4cb48: e822 sd s0,16(sp) + 83f4cb4a: ec06 sd ra,24(sp) + 83f4cb4c: e426 sd s1,8(sp) + 83f4cb4e: e04a sd s2,0(sp) + 83f4cb50: 00255703 lhu a4,2(a0) + 83f4cb54: 478d li a5,3 + 83f4cb56: 842a mv s0,a0 + 83f4cb58: 06e7eb63 bltu a5,a4,83f4cbce + 83f4cb5c: c01027f3 rdtime a5 + 83f4cb60: 03079713 slli a4,a5,0x30 + 83f4cb64: 9341 srli a4,a4,0x30 + 83f4cb66: c335 beqz a4,83f4cbca + 83f4cb68: 00f41023 sh a5,0(s0) + 83f4cb6c: 000f44b7 lui s1,0xf4 + 83f4cb70: 24048493 addi s1,s1,576 # f4240 + 83f4cb74: 00006917 auipc s2,0x6 + 83f4cb78: 65490913 addi s2,s2,1620 # 83f531c8 + 83f4cb7c: a021 j 83f4cb84 + 83f4cb7e: c78ff0ef jal ra,83f4bff6 + 83f4cb82: c0d9 beqz s1,83f4cc08 + 83f4cb84: 0140000f fence w,o + 83f4cb88: 00245703 lhu a4,2(s0) + 83f4cb8c: 00093683 ld a3,0(s2) + 83f4cb90: 00045783 lhu a5,0(s0) + 83f4cb94: 070a slli a4,a4,0x2 + 83f4cb96: 9736 add a4,a4,a3 + 83f4cb98: 00f71023 sh a5,0(a4) + 83f4cb9c: 00245783 lhu a5,2(s0) + 83f4cba0: 078a slli a5,a5,0x2 + 83f4cba2: 97b6 add a5,a5,a3 + 83f4cba4: 0007d783 lhu a5,0(a5) + 83f4cba8: 17c2 slli a5,a5,0x30 + 83f4cbaa: 93c1 srli a5,a5,0x30 + 83f4cbac: 0820000f fence i,r + 83f4cbb0: 00045703 lhu a4,0(s0) + 83f4cbb4: 4505 li a0,1 + 83f4cbb6: 14fd addi s1,s1,-1 + 83f4cbb8: fcf713e3 bne a4,a5,83f4cb7e + 83f4cbbc: 60e2 ld ra,24(sp) + 83f4cbbe: 6442 ld s0,16(sp) + 83f4cbc0: 64a2 ld s1,8(sp) + 83f4cbc2: 6902 ld s2,0(sp) + 83f4cbc4: 4505 li a0,1 + 83f4cbc6: 6105 addi sp,sp,32 + 83f4cbc8: 8082 ret + 83f4cbca: 4785 li a5,1 + 83f4cbcc: bf71 j 83f4cb68 + 83f4cbce: 00013497 auipc s1,0x13 + 83f4cbd2: 06a48493 addi s1,s1,106 # 83f5fc38 + 83f4cbd6: 6088 ld a0,0(s1) + 83f4cbd8: 4581 li a1,0 + 83f4cbda: 4601 li a2,0 + 83f4cbdc: 19c020ef jal ra,83f4ed78 + 83f4cbe0: 00013697 auipc a3,0x13 + 83f4cbe4: 05468693 addi a3,a3,84 # 83f5fc34 + 83f4cbe8: 0006c783 lbu a5,0(a3) + 83f4cbec: 4581 li a1,0 + 83f4cbee: 0087971b slliw a4,a5,0x8 + 83f4cbf2: 00276713 ori a4,a4,2 + 83f4cbf6: 00e41023 sh a4,0(s0) + 83f4cbfa: 6088 ld a0,0(s1) + 83f4cbfc: 2785 addiw a5,a5,1 + 83f4cbfe: 00f68023 sb a5,0(a3) + 83f4cc02: 7e9010ef jal ra,83f4ebea + 83f4cc06: b79d j 83f4cb6c + 83f4cc08: 00005517 auipc a0,0x5 + 83f4cc0c: 53850513 addi a0,a0,1336 # 83f52140 + 83f4cc10: 98fff0ef jal ra,83f4c59e + 83f4cc14: 60e2 ld ra,24(sp) + 83f4cc16: 6442 ld s0,16(sp) + 83f4cc18: 64a2 ld s1,8(sp) + 83f4cc1a: 6902 ld s2,0(sp) + 83f4cc1c: 557d li a0,-1 + 83f4cc1e: 6105 addi sp,sp,32 + 83f4cc20: 8082 ret + +0000000083f4cc22 <_hw_raw_spin_lock_irqsave>: + 83f4cc22: 1101 addi sp,sp,-32 + 83f4cc24: e04a sd s2,0(sp) + 83f4cc26: ec06 sd ra,24(sp) + 83f4cc28: e822 sd s0,16(sp) + 83f4cc2a: e426 sd s1,8(sp) + 83f4cc2c: 892a mv s2,a0 + 83f4cc2e: 30002473 csrr s0,mstatus + 83f4cc32: 8821 andi s0,s0,8 + 83f4cc34: 30047073 csrci mstatus,8 + 83f4cc38: f0fff0ef jal ra,83f4cb46 + 83f4cc3c: 57fd li a5,-1 + 83f4cc3e: 00f50963 beq a0,a5,83f4cc50 <_hw_raw_spin_lock_irqsave+0x2e> + 83f4cc42: 60e2 ld ra,24(sp) + 83f4cc44: 8522 mv a0,s0 + 83f4cc46: 6442 ld s0,16(sp) + 83f4cc48: 64a2 ld s1,8(sp) + 83f4cc4a: 6902 ld s2,0(sp) + 83f4cc4c: 6105 addi sp,sp,32 + 83f4cc4e: 8082 ret + 83f4cc50: 84aa mv s1,a0 + 83f4cc52: c019 beqz s0,83f4cc58 <_hw_raw_spin_lock_irqsave+0x36> + 83f4cc54: 30046073 csrsi mstatus,8 + 83f4cc58: 00295783 lhu a5,2(s2) + 83f4cc5c: 00006717 auipc a4,0x6 + 83f4cc60: 56c73703 ld a4,1388(a4) # 83f531c8 + 83f4cc64: 078a slli a5,a5,0x2 + 83f4cc66: 97ba add a5,a5,a4 + 83f4cc68: 0007d583 lhu a1,0(a5) + 83f4cc6c: 15c2 slli a1,a1,0x30 + 83f4cc6e: 91c1 srli a1,a1,0x30 + 83f4cc70: 0820000f fence i,r + 83f4cc74: 00095603 lhu a2,0(s2) + 83f4cc78: 00005517 auipc a0,0x5 + 83f4cc7c: 4e050513 addi a0,a0,1248 # 83f52158 + 83f4cc80: 8426 mv s0,s1 + 83f4cc82: 91dff0ef jal ra,83f4c59e + 83f4cc86: bf75 j 83f4cc42 <_hw_raw_spin_lock_irqsave+0x20> + +0000000083f4cc88 <_hw_raw_spin_unlock_irqrestore>: + 83f4cc88: 00255783 lhu a5,2(a0) + 83f4cc8c: 00006717 auipc a4,0x6 + 83f4cc90: 53c70713 addi a4,a4,1340 # 83f531c8 + 83f4cc94: 6314 ld a3,0(a4) + 83f4cc96: 078a slli a5,a5,0x2 + 83f4cc98: 97b6 add a5,a5,a3 + 83f4cc9a: 0007d783 lhu a5,0(a5) + 83f4cc9e: 17c2 slli a5,a5,0x30 + 83f4cca0: 93c1 srli a5,a5,0x30 + 83f4cca2: 0820000f fence i,r + 83f4cca6: 00055683 lhu a3,0(a0) + 83f4ccaa: 02f69263 bne a3,a5,83f4ccce <_hw_raw_spin_unlock_irqrestore+0x46> + 83f4ccae: 0140000f fence w,o + 83f4ccb2: 00255783 lhu a5,2(a0) + 83f4ccb6: 6314 ld a3,0(a4) + 83f4ccb8: 00055703 lhu a4,0(a0) + 83f4ccbc: 078a slli a5,a5,0x2 + 83f4ccbe: 97b6 add a5,a5,a3 + 83f4ccc0: 00e79023 sh a4,0(a5) + 83f4ccc4: c581 beqz a1,83f4cccc <_hw_raw_spin_unlock_irqrestore+0x44> + 83f4ccc6: 30046073 csrsi mstatus,8 + 83f4ccca: 8082 ret + 83f4cccc: 8082 ret + 83f4ccce: 00255783 lhu a5,2(a0) + 83f4ccd2: 6318 ld a4,0(a4) + 83f4ccd4: 078a slli a5,a5,0x2 + 83f4ccd6: 97ba add a5,a5,a4 + 83f4ccd8: 0007d583 lhu a1,0(a5) + 83f4ccdc: 15c2 slli a1,a1,0x30 + 83f4ccde: 91c1 srli a1,a1,0x30 + 83f4cce0: 0820000f fence i,r + 83f4cce4: 00055603 lhu a2,0(a0) + 83f4cce8: 00005517 auipc a0,0x5 + 83f4ccec: 4a050513 addi a0,a0,1184 # 83f52188 + 83f4ccf0: 8afff06f j 83f4c59e + +0000000083f4ccf4 : + 83f4ccf4: 7ef0006f j 83f4dce2 + +0000000083f4ccf8 : + 83f4ccf8: 00a0106f j 83f4dd02 + +0000000083f4ccfc : + 83f4ccfc: 4302 lw t1,0(sp) + 83f4ccfe: e01a sd t1,0(sp) + 83f4cd00: 0060106f j 83f4dd06 + +0000000083f4cd04 : + 83f4cd04: 06e0106f j 83f4dd72 + +0000000083f4cd08 : + 83f4cd08: 0b60106f j 83f4ddbe + +0000000083f4cd0c : + 83f4cd0c: 7139 addi sp,sp,-64 + 83f4cd0e: f822 sd s0,48(sp) + 83f4cd10: f04a sd s2,32(sp) + 83f4cd12: ec4e sd s3,24(sp) + 83f4cd14: e852 sd s4,16(sp) + 83f4cd16: fc06 sd ra,56(sp) + 83f4cd18: f426 sd s1,40(sp) + 83f4cd1a: e456 sd s5,8(sp) + 83f4cd1c: 651c ld a5,8(a0) + 83f4cd1e: 892a mv s2,a0 + 83f4cd20: 89ae mv s3,a1 + 83f4cd22: 8a32 mv s4,a2 + 83f4cd24: ff078513 addi a0,a5,-16 + 83f4cd28: 4401 li s0,0 + 83f4cd2a: c391 beqz a5,83f4cd2e + 83f4cd2c: 6780 ld s0,8(a5) + 83f4cd2e: 04f90963 beq s2,a5,83f4cd80 + 83f4cd32: 415c lw a5,4(a0) + 83f4cd34: 4481 li s1,0 + 83f4cd36: 4a81 li s5,0 + 83f4cd38: 2485 addiw s1,s1,1 + 83f4cd3a: 02fa5063 bge s4,a5,83f4cd5a + 83f4cd3e: 0299c763 blt s3,s1,83f4cd6c + 83f4cd42: 4781 li a5,0 + 83f4cd44: ff040513 addi a0,s0,-16 + 83f4cd48: c011 beqz s0,83f4cd4c + 83f4cd4a: 641c ld a5,8(s0) + 83f4cd4c: 02890063 beq s2,s0,83f4cd6c + 83f4cd50: 843e mv s0,a5 + 83f4cd52: 415c lw a5,4(a0) + 83f4cd54: 2485 addiw s1,s1,1 + 83f4cd56: fefa44e3 blt s4,a5,83f4cd3e + 83f4cd5a: 6918 ld a4,16(a0) + 83f4cd5c: 6d1c ld a5,24(a0) + 83f4cd5e: 2a85 addiw s5,s5,1 + 83f4cd60: e71c sd a5,8(a4) + 83f4cd62: e398 sd a4,0(a5) + 83f4cd64: 187010ef jal ra,83f4e6ea + 83f4cd68: fc99dde3 bge s3,s1,83f4cd42 + 83f4cd6c: 70e2 ld ra,56(sp) + 83f4cd6e: 7442 ld s0,48(sp) + 83f4cd70: 74a2 ld s1,40(sp) + 83f4cd72: 7902 ld s2,32(sp) + 83f4cd74: 69e2 ld s3,24(sp) + 83f4cd76: 6a42 ld s4,16(sp) + 83f4cd78: 8556 mv a0,s5 + 83f4cd7a: 6aa2 ld s5,8(sp) + 83f4cd7c: 6121 addi sp,sp,64 + 83f4cd7e: 8082 ret + 83f4cd80: 4a81 li s5,0 + 83f4cd82: b7ed j 83f4cd6c + +0000000083f4cd84 : + 83f4cd84: 419c lw a5,0(a1) + 83f4cd86: cbb5 beqz a5,83f4cdfa + 83f4cd88: 7179 addi sp,sp,-48 + 83f4cd8a: f022 sd s0,32(sp) + 83f4cd8c: ec26 sd s1,24(sp) + 83f4cd8e: e84a sd s2,16(sp) + 83f4cd90: e44e sd s3,8(sp) + 83f4cd92: e052 sd s4,0(sp) + 83f4cd94: f406 sd ra,40(sp) + 83f4cd96: 84ae mv s1,a1 + 83f4cd98: 892a mv s2,a0 + 83f4cd9a: 89b2 mv s3,a2 + 83f4cd9c: 4401 li s0,0 + 83f4cd9e: 4a05 li s4,1 + 83f4cda0: 02041713 slli a4,s0,0x20 + 83f4cda4: 01a75513 srli a0,a4,0x1a + 83f4cda8: 954a add a0,a0,s2 + 83f4cdaa: 5d18 lw a4,56(a0) + 83f4cdac: 01374e63 blt a4,s3,83f4cdc8 + 83f4cdb0: 409c lw a5,0(s1) + 83f4cdb2: 2405 addiw s0,s0,1 + 83f4cdb4: fef466e3 bltu s0,a5,83f4cda0 + 83f4cdb8: 70a2 ld ra,40(sp) + 83f4cdba: 7402 ld s0,32(sp) + 83f4cdbc: 64e2 ld s1,24(sp) + 83f4cdbe: 6942 ld s2,16(sp) + 83f4cdc0: 69a2 ld s3,8(sp) + 83f4cdc2: 6a02 ld s4,0(sp) + 83f4cdc4: 6145 addi sp,sp,48 + 83f4cdc6: 8082 ret + 83f4cdc8: 0014059b addiw a1,s0,1 + 83f4cdcc: fff7861b addiw a2,a5,-1 + 83f4cdd0: 9e01 subw a2,a2,s0 + 83f4cdd2: 02059713 slli a4,a1,0x20 + 83f4cdd6: 01a75593 srli a1,a4,0x1a + 83f4cdda: 02061713 slli a4,a2,0x20 + 83f4cdde: 01a75613 srli a2,a4,0x1a + 83f4cde2: 95ca add a1,a1,s2 + 83f4cde4: 00fa7463 bgeu s4,a5,83f4cdec + 83f4cde8: f33f50ef jal ra,83f42d1a + 83f4cdec: 4098 lw a4,0(s1) + 83f4cdee: fff7079b addiw a5,a4,-1 + 83f4cdf2: c09c sw a5,0(s1) + 83f4cdf4: faf466e3 bltu s0,a5,83f4cda0 + 83f4cdf8: b7c1 j 83f4cdb8 + 83f4cdfa: 8082 ret + +0000000083f4cdfc : + 83f4cdfc: 7115 addi sp,sp,-224 + 83f4cdfe: f556 sd s5,168(sp) + 83f4ce00: ed86 sd ra,216(sp) + 83f4ce02: e9a2 sd s0,208(sp) + 83f4ce04: e5a6 sd s1,200(sp) + 83f4ce06: e1ca sd s2,192(sp) + 83f4ce08: fd4e sd s3,184(sp) + 83f4ce0a: f952 sd s4,176(sp) + 83f4ce0c: f15a sd s6,160(sp) + 83f4ce0e: ed5e sd s7,152(sp) + 83f4ce10: e962 sd s8,144(sp) + 83f4ce12: e566 sd s9,136(sp) + 83f4ce14: e16a sd s10,128(sp) + 83f4ce16: fcee sd s11,120(sp) + 83f4ce18: b4a2 fsd fs0,104(sp) + 83f4ce1a: b0a6 fsd fs1,96(sp) + 83f4ce1c: acca fsd fs2,88(sp) + 83f4ce1e: 8ab6 mv s5,a3 + 83f4ce20: 08b05b63 blez a1,83f4ceb6 + 83f4ce24: 00170b9b addiw s7,a4,1 + 83f4ce28: 84be mv s1,a5 + 83f4ce2a: 8a2e mv s4,a1 + 83f4ce2c: 89b2 mv s3,a2 + 83f4ce2e: 893a mv s2,a4 + 83f4ce30: 8d2a mv s10,a0 + 83f4ce32: 4d81 li s11,0 + 83f4ce34: 8b5e mv s6,s7 + 83f4ce36: 4c85 li s9,1 + 83f4ce38: 00005797 auipc a5,0x5 + 83f4ce3c: 4d87b907 fld fs2,1240(a5) # 83f52310 <__func__.1+0x118> + 83f4ce40: fff80c1b addiw s8,a6,-1 + 83f4ce44: 04000613 li a2,64 + 83f4ce48: 85ea mv a1,s10 + 83f4ce4a: 0808 addi a0,sp,16 + 83f4ce4c: ab4f30ef jal ra,83f40100 + 83f4ce50: 47b6 lw a5,76(sp) + 83f4ce52: 0cf94e63 blt s2,a5,83f4cf2e + 83f4ce56: 4726 lw a4,72(sp) + 83f4ce58: 0ce95b63 bge s2,a4,83f4cf2e + 83f4ce5c: 02000513 li a0,32 + 83f4ce60: 724010ef jal ra,83f4e584 + 83f4ce64: 842a mv s0,a0 + 83f4ce66: 2a050663 beqz a0,83f4d112 + 83f4ce6a: 4742 lw a4,16(sp) + 83f4ce6c: e365 bnez a4,83f4cf4c + 83f4ce6e: 4652 lw a2,20(sp) + 83f4ce70: 01040713 addi a4,s0,16 + 83f4ce74: c010 sw a2,0(s0) + 83f4ce76: 47f2 lw a5,28(sp) + 83f4ce78: 01b41423 sh s11,8(s0) + 83f4ce7c: 9fb1 addw a5,a5,a2 + 83f4ce7e: c05c sw a5,4(s0) + 83f4ce80: 0009b783 ld a5,0(s3) + 83f4ce84: 01343c23 sd s3,24(s0) + 83f4ce88: e81c sd a5,16(s0) + 83f4ce8a: e798 sd a4,8(a5) + 83f4ce8c: 00e9b023 sd a4,0(s3) + 83f4ce90: 000aa783 lw a5,0(s5) + 83f4ce94: 4726 lw a4,72(sp) + 83f4ce96: 2785 addiw a5,a5,1 + 83f4ce98: 00faa023 sw a5,0(s5) + 83f4ce9c: 409c lw a5,0(s1) + 83f4ce9e: 0007059b sext.w a1,a4 + 83f4cea2: 0007861b sext.w a2,a5 + 83f4cea6: 08b64263 blt a2,a1,83f4cf2a + 83f4ceaa: c098 sw a4,0(s1) + 83f4ceac: 2d85 addiw s11,s11,1 + 83f4ceae: 040d0d13 addi s10,s10,64 + 83f4ceb2: f94d99e3 bne s11,s4,83f4ce44 + 83f4ceb6: 000aa503 lw a0,0(s5) + 83f4ceba: 60ee ld ra,216(sp) + 83f4cebc: 644e ld s0,208(sp) + 83f4cebe: 64ae ld s1,200(sp) + 83f4cec0: 690e ld s2,192(sp) + 83f4cec2: 79ea ld s3,184(sp) + 83f4cec4: 7a4a ld s4,176(sp) + 83f4cec6: 7aaa ld s5,168(sp) + 83f4cec8: 7b0a ld s6,160(sp) + 83f4ceca: 6bea ld s7,152(sp) + 83f4cecc: 6c4a ld s8,144(sp) + 83f4cece: 6caa ld s9,136(sp) + 83f4ced0: 6d0a ld s10,128(sp) + 83f4ced2: 7de6 ld s11,120(sp) + 83f4ced4: 3426 fld fs0,104(sp) + 83f4ced6: 3486 fld fs1,96(sp) + 83f4ced8: 2966 fld fs2,88(sp) + 83f4ceda: 612d addi sp,sp,224 + 83f4cedc: 8082 ret + 83f4cede: 4762 lw a4,24(sp) + 83f4cee0: 5612 lw a2,36(sp) + 83f4cee2: 00c707bb addw a5,a4,a2 + 83f4cee6: 0cf95163 bge s2,a5,83f4cfa8 + 83f4ceea: 45d2 lw a1,20(sp) + 83f4ceec: 01040613 addi a2,s0,16 + 83f4cef0: c00c sw a1,0(s0) + 83f4cef2: 4772 lw a4,28(sp) + 83f4cef4: 01b41423 sh s11,8(s0) + 83f4cef8: 9f2d addw a4,a4,a1 + 83f4cefa: c058 sw a4,4(s0) + 83f4cefc: 0009b703 ld a4,0(s3) + 83f4cf00: 01343c23 sd s3,24(s0) + 83f4cf04: e818 sd a4,16(s0) + 83f4cf06: e710 sd a2,8(a4) + 83f4cf08: 00c9b023 sd a2,0(s3) + 83f4cf0c: 000aa703 lw a4,0(s5) + 83f4cf10: 2705 addiw a4,a4,1 + 83f4cf12: 00eaa023 sw a4,0(s5) + 83f4cf16: 0127d563 bge a5,s2,83f4cf20 + 83f4cf1a: 4762 lw a4,24(sp) + 83f4cf1c: 5782 lw a5,32(sp) + 83f4cf1e: 9fb9 addw a5,a5,a4 + 83f4cf20: 4098 lw a4,0(s1) + 83f4cf22: 0007061b sext.w a2,a4 + 83f4cf26: f8c7d2e3 bge a5,a2,83f4ceaa + 83f4cf2a: 873e mv a4,a5 + 83f4cf2c: bfbd j 83f4ceaa + 83f4cf2e: 885a mv a6,s6 + 83f4cf30: 00fbd363 bge s7,a5,83f4cf36 + 83f4cf34: 883e mv a6,a5 + 83f4cf36: 409c lw a5,0(s1) + 83f4cf38: 0008061b sext.w a2,a6 + 83f4cf3c: 0007871b sext.w a4,a5 + 83f4cf40: 00c75363 bge a4,a2,83f4cf46 + 83f4cf44: 883e mv a6,a5 + 83f4cf46: 0104a023 sw a6,0(s1) + 83f4cf4a: b78d j 83f4ceac + 83f4cf4c: ffe7079b addiw a5,a4,-2 + 83f4cf50: 9bf5 andi a5,a5,-3 + 83f4cf52: 2781 sext.w a5,a5 + 83f4cf54: cb89 beqz a5,83f4cf66 + 83f4cf56: f99704e3 beq a4,s9,83f4cede + 83f4cf5a: 478d li a5,3 + 83f4cf5c: 0ef70563 beq a4,a5,83f4d046 + 83f4cf60: 78a010ef jal ra,83f4e6ea + 83f4cf64: b7a1 j 83f4ceac + 83f4cf66: 4752 lw a4,20(sp) + 83f4cf68: c018 sw a4,0(s0) + 83f4cf6a: 47f2 lw a5,28(sp) + 83f4cf6c: 01b41423 sh s11,8(s0) + 83f4cf70: 9fb9 addw a5,a5,a4 + 83f4cf72: c05c sw a5,4(s0) + 83f4cf74: 4098 lw a4,0(s1) + 83f4cf76: 47a6 lw a5,72(sp) + 83f4cf78: 0007061b sext.w a2,a4 + 83f4cf7c: 0007859b sext.w a1,a5 + 83f4cf80: 00b65363 bge a2,a1,83f4cf86 + 83f4cf84: 87ba mv a5,a4 + 83f4cf86: c09c sw a5,0(s1) + 83f4cf88: 0009b703 ld a4,0(s3) + 83f4cf8c: 01040793 addi a5,s0,16 + 83f4cf90: 01343c23 sd s3,24(s0) + 83f4cf94: e818 sd a4,16(s0) + 83f4cf96: e71c sd a5,8(a4) + 83f4cf98: 00f9b023 sd a5,0(s3) + 83f4cf9c: 000aa783 lw a5,0(s5) + 83f4cfa0: 2785 addiw a5,a5,1 + 83f4cfa2: 00faa023 sw a5,0(s5) + 83f4cfa6: b719 j 83f4ceac + 83f4cfa8: 5582 lw a1,32(sp) + 83f4cfaa: 9f2d addw a4,a4,a1 + 83f4cfac: 40c705bb subw a1,a4,a2 + 83f4cfb0: f2b95de3 bge s2,a1,83f4ceea + 83f4cfb4: 02000513 li a0,32 + 83f4cfb8: e42e sd a1,8(sp) + 83f4cfba: c22e sw a1,4(sp) + 83f4cfbc: 5c8010ef jal ra,83f4e584 + 83f4cfc0: 4712 lw a4,4(sp) + 83f4cfc2: 65a2 ld a1,8(sp) + 83f4cfc4: 1c050f63 beqz a0,83f4d1a2 + 83f4cfc8: 4352 lw t1,20(sp) + 83f4cfca: 030d9613 slli a2,s11,0x30 + 83f4cfce: 9241 srli a2,a2,0x30 + 83f4cfd0: 00642023 sw t1,0(s0) + 83f4cfd4: 5792 lw a5,36(sp) + 83f4cfd6: 01040893 addi a7,s0,16 + 83f4cfda: 01050813 addi a6,a0,16 + 83f4cfde: 006787bb addw a5,a5,t1 + 83f4cfe2: c05c sw a5,4(s0) + 83f4cfe4: 4372 lw t1,28(sp) + 83f4cfe6: 47d2 lw a5,20(sp) + 83f4cfe8: 006787bb addw a5,a5,t1 + 83f4cfec: c15c sw a5,4(a0) + 83f4cfee: 5312 lw t1,36(sp) + 83f4cff0: 406787bb subw a5,a5,t1 + 83f4cff4: c11c sw a5,0(a0) + 83f4cff6: 00c41423 sh a2,8(s0) + 83f4cffa: 00c51423 sh a2,8(a0) + 83f4cffe: 0009b783 ld a5,0(s3) + 83f4d002: 01343c23 sd s3,24(s0) + 83f4d006: e81c sd a5,16(s0) + 83f4d008: 0117b423 sd a7,8(a5) + 83f4d00c: 0119b023 sd a7,0(s3) + 83f4d010: 000aa783 lw a5,0(s5) + 83f4d014: 2785 addiw a5,a5,1 + 83f4d016: 00faa023 sw a5,0(s5) + 83f4d01a: 0009b783 ld a5,0(s3) + 83f4d01e: 01353c23 sd s3,24(a0) + 83f4d022: e91c sd a5,16(a0) + 83f4d024: 0107b423 sd a6,8(a5) + 83f4d028: 0109b023 sd a6,0(s3) + 83f4d02c: 000aa783 lw a5,0(s5) + 83f4d030: 2785 addiw a5,a5,1 + 83f4d032: 00faa023 sw a5,0(s5) + 83f4d036: 409c lw a5,0(s1) + 83f4d038: 0007861b sext.w a2,a5 + 83f4d03c: 00c5d363 bge a1,a2,83f4d042 + 83f4d040: 87ba mv a5,a4 + 83f4d042: c09c sw a5,0(s1) + 83f4d044: b5a5 j 83f4ceac + 83f4d046: 02012507 flw fa0,32(sp) + 83f4d04a: 42050553 fcvt.d.s fa0,fa0 + 83f4d04e: a53f30ef jal ra,83f40aa0 + 83f4d052: 22a50453 fmv.d fs0,fa0 + 83f4d056: 02412507 flw fa0,36(sp) + 83f4d05a: 42050553 fcvt.d.s fa0,fa0 + 83f4d05e: a43f30ef jal ra,83f40aa0 + 83f4d062: c20417d3 fcvt.w.d a5,fs0,rtz + 83f4d066: 2781 sext.w a5,a5 + 83f4d068: 0af94763 blt s2,a5,83f4d116 + 83f4d06c: c20517d3 fcvt.w.d a5,fa0,rtz + 83f4d070: 02412507 flw fa0,36(sp) + 83f4d074: 2781 sext.w a5,a5 + 83f4d076: 0af95263 bge s2,a5,83f4d11a + 83f4d07a: 02012787 flw fa5,32(sp) + 83f4d07e: d0097453 fcvt.s.w fs0,s2 + 83f4d082: 01412487 flw fs1,20(sp) + 83f4d086: 08f57553 fsub.s fa0,fa0,fa5 + 83f4d08a: 08f47453 fsub.s fs0,fs0,fa5 + 83f4d08e: 03812787 flw fa5,56(sp) + 83f4d092: 18a7f553 fdiv.s fa0,fa5,fa0 + 83f4d096: 01812787 flw fa5,24(sp) + 83f4d09a: 7884f4c3 fmadd.s fs1,fs1,fs0,fa5 + 83f4d09e: 48a4744b fnmsub.s fs0,fs0,fa0,fs1 + 83f4d0a2: a08497d3 flt.s a5,fs1,fs0 + 83f4d0a6: 20948553 fmv.s fa0,fs1 + 83f4d0aa: e399 bnez a5,83f4d0b0 + 83f4d0ac: 20840553 fmv.s fa0,fs0 + 83f4d0b0: 42050553 fcvt.d.s fa0,fa0 + 83f4d0b4: 9edf30ef jal ra,83f40aa0 + 83f4d0b8: c2051553 fcvt.w.d a0,fa0,rtz + 83f4d0bc: 8662 mv a2,s8 + 83f4d0be: 4581 li a1,0 + 83f4d0c0: 2501 sext.w a0,a0 + 83f4d0c2: 507000ef jal ra,83f4ddc8 + 83f4d0c6: a09417d3 flt.s a5,fs0,fs1 + 83f4d0ca: c008 sw a0,0(s0) + 83f4d0cc: e399 bnez a5,83f4d0d2 + 83f4d0ce: 208404d3 fmv.s fs1,fs0 + 83f4d0d2: 42048553 fcvt.d.s fa0,fs1 + 83f4d0d6: 9cbf30ef jal ra,83f40aa0 + 83f4d0da: c2051553 fcvt.w.d a0,fa0,rtz + 83f4d0de: 8662 mv a2,s8 + 83f4d0e0: 4581 li a1,0 + 83f4d0e2: 2501 sext.w a0,a0 + 83f4d0e4: 4e5000ef jal ra,83f4ddc8 + 83f4d0e8: c048 sw a0,4(s0) + 83f4d0ea: 01b41423 sh s11,8(s0) + 83f4d0ee: 0009b703 ld a4,0(s3) + 83f4d0f2: 01040793 addi a5,s0,16 + 83f4d0f6: 01343c23 sd s3,24(s0) + 83f4d0fa: e818 sd a4,16(s0) + 83f4d0fc: e71c sd a5,8(a4) + 83f4d0fe: 00f9b023 sd a5,0(s3) + 83f4d102: 000aa783 lw a5,0(s5) + 83f4d106: 2785 addiw a5,a5,1 + 83f4d108: 00faa023 sw a5,0(s5) + 83f4d10c: 0164a023 sw s6,0(s1) + 83f4d110: bb71 j 83f4ceac + 83f4d112: 557d li a0,-1 + 83f4d114: b35d j 83f4ceba + 83f4d116: 02412507 flw fa0,36(sp) + 83f4d11a: 42050553 fcvt.d.s fa0,fa0 + 83f4d11e: 983f30ef jal ra,83f40aa0 + 83f4d122: 03012787 flw fa5,48(sp) + 83f4d126: 22a50453 fmv.d fs0,fa0 + 83f4d12a: 420787d3 fcvt.d.s fa5,fa5 + 83f4d12e: 0327f553 fadd.d fa0,fa5,fs2 + 83f4d132: 96ff30ef jal ra,83f40aa0 + 83f4d136: c20417d3 fcvt.w.d a5,fs0,rtz + 83f4d13a: 2781 sext.w a5,a5 + 83f4d13c: 02f95d63 bge s2,a5,83f4d176 + 83f4d140: 01412487 flw fs1,20(sp) + 83f4d144: d0097453 fcvt.s.w fs0,s2 + 83f4d148: 03812707 flw fa4,56(sp) + 83f4d14c: 03412787 flw fa5,52(sp) + 83f4d150: 03012687 flw fa3,48(sp) + 83f4d154: 08d7f653 fsub.s fa2,fa5,fa3 + 83f4d158: 02412687 flw fa3,36(sp) + 83f4d15c: 0887f7d3 fsub.s fa5,fa5,fs0 + 83f4d160: 08d476d3 fsub.s fa3,fs0,fa3 + 83f4d164: 18c77453 fdiv.s fs0,fa4,fa2 + 83f4d168: 01c12707 flw fa4,28(sp) + 83f4d16c: 7096f4c3 fmadd.s fs1,fa3,fs1,fa4 + 83f4d170: 4887f443 fmadd.s fs0,fa5,fs0,fs1 + 83f4d174: b73d j 83f4d0a2 + 83f4d176: c20517d3 fcvt.w.d a5,fa0,rtz + 83f4d17a: 01412487 flw fs1,20(sp) + 83f4d17e: d0097453 fcvt.s.w fs0,s2 + 83f4d182: 2781 sext.w a5,a5 + 83f4d184: 03812707 flw fa4,56(sp) + 83f4d188: fcf952e3 bge s2,a5,83f4d14c + 83f4d18c: 02012787 flw fa5,32(sp) + 83f4d190: 01812687 flw fa3,24(sp) + 83f4d194: 08f477d3 fsub.s fa5,fs0,fa5 + 83f4d198: 6897f4c3 fmadd.s fs1,fa5,fs1,fa3 + 83f4d19c: 08e4f453 fsub.s fs0,fs1,fa4 + 83f4d1a0: b709 j 83f4d0a2 + 83f4d1a2: 8522 mv a0,s0 + 83f4d1a4: 546010ef jal ra,83f4e6ea + 83f4d1a8: 557d li a0,-1 + 83f4d1aa: bb01 j 83f4ceba + +0000000083f4d1ac : + 83f4d1ac: 7139 addi sp,sp,-64 + 83f4d1ae: f822 sd s0,48(sp) + 83f4d1b0: f426 sd s1,40(sp) + 83f4d1b2: f04a sd s2,32(sp) + 83f4d1b4: ec4e sd s3,24(sp) + 83f4d1b6: fc06 sd ra,56(sp) + 83f4d1b8: e852 sd s4,16(sp) + 83f4d1ba: e456 sd s5,8(sp) + 83f4d1bc: 892e mv s2,a1 + 83f4d1be: 842a mv s0,a0 + 83f4d1c0: 89b2 mv s3,a2 + 83f4d1c2: 84b6 mv s1,a3 + 83f4d1c4: c1c9 beqz a1,83f4d246 + 83f4d1c6: 00163a13 seqz s4,a2 + 83f4d1ca: 8ad2 mv s5,s4 + 83f4d1cc: 04800613 li a2,72 + 83f4d1d0: 4581 li a1,0 + 83f4d1d2: 8522 mv a0,s0 + 83f4d1d4: da9fe0ef jal ra,83f4bf7c + 83f4d1d8: 4098 lw a4,0(s1) + 83f4d1da: 478d li a5,3 + 83f4d1dc: 1782 slli a5,a5,0x20 + 83f4d1de: c018 sw a4,0(s0) + 83f4d1e0: 40d8 lw a4,4(s1) + 83f4d1e2: 0799 addi a5,a5,6 + 83f4d1e4: ec1c sd a5,24(s0) + 83f4d1e6: c058 sw a4,4(s0) + 83f4d1e8: 4705 li a4,1 + 83f4d1ea: 00e40a23 sb a4,20(s0) + 83f4d1ee: 4488 lw a0,8(s1) + 83f4d1f0: d008 sw a0,32(s0) + 83f4d1f2: 28a010ef jal ra,83f4e47c + 83f4d1f6: d048 sw a0,36(s0) + 83f4d1f8: 0004a623 sw zero,12(s1) + 83f4d1fc: 8522 mv a0,s0 + 83f4d1fe: 21a010ef jal ra,83f4e418 + 83f4d202: 4601 li a2,0 + 83f4d204: 020a8563 beqz s5,83f4d22e + 83f4d208: 86d2 mv a3,s4 + 83f4d20a: 85ca mv a1,s2 + 83f4d20c: 04840513 addi a0,s0,72 + 83f4d210: 3d5000ef jal ra,83f4dde4 + 83f4d214: 4791 li a5,4 + 83f4d216: d43c sw a5,104(s0) + 83f4d218: 57fd li a5,-1 + 83f4d21a: d07c sw a5,100(s0) + 83f4d21c: 70e2 ld ra,56(sp) + 83f4d21e: 7442 ld s0,48(sp) + 83f4d220: 74a2 ld s1,40(sp) + 83f4d222: 7902 ld s2,32(sp) + 83f4d224: 69e2 ld s3,24(sp) + 83f4d226: 6a42 ld s4,16(sp) + 83f4d228: 6aa2 ld s5,8(sp) + 83f4d22a: 6121 addi sp,sp,64 + 83f4d22c: 8082 ret + 83f4d22e: 854a mv a0,s2 + 83f4d230: 85a2 mv a1,s0 + 83f4d232: 7a7000ef jal ra,83f4e1d8 + 83f4d236: 256010ef jal ra,83f4e48c + 83f4d23a: 0005061b sext.w a2,a0 + 83f4d23e: 9932 add s2,s2,a2 + 83f4d240: 40c9863b subw a2,s3,a2 + 83f4d244: b7d1 j 83f4d208 + 83f4d246: 4a05 li s4,1 + 83f4d248: 4a85 li s5,1 + 83f4d24a: b749 j 83f4d1cc + +0000000083f4d24c : + 83f4d24c: 711d addi sp,sp,-96 + 83f4d24e: ec86 sd ra,88(sp) + 83f4d250: e8a2 sd s0,80(sp) + 83f4d252: e4a6 sd s1,72(sp) + 83f4d254: e0ca sd s2,64(sp) + 83f4d256: fc4e sd s3,56(sp) + 83f4d258: f852 sd s4,48(sp) + 83f4d25a: f456 sd s5,40(sp) + 83f4d25c: 87ae mv a5,a1 + 83f4d25e: 528c lw a1,32(a3) + 83f4d260: 8436 mv s0,a3 + 83f4d262: 84b2 mv s1,a2 + 83f4d264: 06468913 addi s2,a3,100 + 83f4d268: 00f11f23 sh a5,30(sp) + 83f4d26c: 06840993 addi s3,s0,104 + 83f4d270: 41b000ef jal ra,83f4de8a + 83f4d274: 06c40a13 addi s4,s0,108 + 83f4d278: 04840a93 addi s5,s0,72 + 83f4d27c: 8826 mv a6,s1 + 83f4d27e: 01e10793 addi a5,sp,30 + 83f4d282: e456 sd s5,8(sp) + 83f4d284: e022 sd s0,0(sp) + 83f4d286: 04000893 li a7,64 + 83f4d28a: 8752 mv a4,s4 + 83f4d28c: 86ce mv a3,s3 + 83f4d28e: 864a mv a2,s2 + 83f4d290: 06040593 addi a1,s0,96 + 83f4d294: 84aa mv s1,a0 + 83f4d296: 0a6010ef jal ra,83f4e33c + 83f4d29a: 01e15783 lhu a5,30(sp) + 83f4d29e: c385 beqz a5,83f4d2be + 83f4d2a0: 04000793 li a5,64 + 83f4d2a4: 88d6 mv a7,s5 + 83f4d2a6: 8822 mv a6,s0 + 83f4d2a8: 01e10713 addi a4,sp,30 + 83f4d2ac: 86d2 mv a3,s4 + 83f4d2ae: 864e mv a2,s3 + 83f4d2b0: 85ca mv a1,s2 + 83f4d2b2: 8526 mv a0,s1 + 83f4d2b4: 7f9000ef jal ra,83f4e2ac + 83f4d2b8: 01e15783 lhu a5,30(sp) + 83f4d2bc: f3f5 bnez a5,83f4d2a0 + 83f4d2be: 60e6 ld ra,88(sp) + 83f4d2c0: 6446 ld s0,80(sp) + 83f4d2c2: 64a6 ld s1,72(sp) + 83f4d2c4: 6906 ld s2,64(sp) + 83f4d2c6: 79e2 ld s3,56(sp) + 83f4d2c8: 7a42 ld s4,48(sp) + 83f4d2ca: 7aa2 ld s5,40(sp) + 83f4d2cc: 6125 addi sp,sp,96 + 83f4d2ce: 8082 ret + +0000000083f4d2d0 : + 83f4d2d0: 7119 addi sp,sp,-128 + 83f4d2d2: f4a6 sd s1,104(sp) + 83f4d2d4: f0ca sd s2,96(sp) + 83f4d2d6: e0da sd s6,64(sp) + 83f4d2d8: fc5e sd s7,56(sp) + 83f4d2da: f06a sd s10,32(sp) + 83f4d2dc: ec6e sd s11,24(sp) + 83f4d2de: fc86 sd ra,120(sp) + 83f4d2e0: f8a2 sd s0,112(sp) + 83f4d2e2: ecce sd s3,88(sp) + 83f4d2e4: e8d2 sd s4,80(sp) + 83f4d2e6: e4d6 sd s5,72(sp) + 83f4d2e8: f862 sd s8,48(sp) + 83f4d2ea: f466 sd s9,40(sp) + 83f4d2ec: 671c ld a5,8(a4) + 83f4d2ee: e42e sd a1,8(sp) + 83f4d2f0: 8b3a mv s6,a4 + 83f4d2f2: 84aa mv s1,a0 + 83f4d2f4: 8bb2 mv s7,a2 + 83f4d2f6: 8d36 mv s10,a3 + 83f4d2f8: fd878d93 addi s11,a5,-40 + 83f4d2fc: 4901 li s2,0 + 83f4d2fe: c399 beqz a5,83f4d304 + 83f4d300: 0087b903 ld s2,8(a5) + 83f4d304: 4981 li s3,0 + 83f4d306: 001d0a1b addiw s4,s10,1 + 83f4d30a: 16fb0663 beq s6,a5,83f4d476 + 83f4d30e: 000dc783 lbu a5,0(s11) + 83f4d312: 002dd583 lhu a1,2(s11) + 83f4d316: c39d beqz a5,83f4d33c + 83f4d318: 14059563 bnez a1,83f4d462 + 83f4d31c: 2985 addiw s3,s3,1 + 83f4d31e: fd890d93 addi s11,s2,-40 + 83f4d322: 4781 li a5,0 + 83f4d324: 00090463 beqz s2,83f4d32c + 83f4d328: 00893783 ld a5,8(s2) + 83f4d32c: 152b0563 beq s6,s2,83f4d476 + 83f4d330: 893e mv s2,a5 + 83f4d332: 000dc783 lbu a5,0(s11) + 83f4d336: 002dd583 lhu a1,2(s11) + 83f4d33a: fff9 bnez a5,83f4d318 + 83f4d33c: 001dc703 lbu a4,1(s11) + 83f4d340: 010db403 ld s0,16(s11) + 83f4d344: 0005879b sext.w a5,a1 + 83f4d348: e355 bnez a4,83f4d3ec + 83f4d34a: 013beab3 or s5,s7,s3 + 83f4d34e: 4301 li t1,0 + 83f4d350: c7c1 beqz a5,83f4d3d8 + 83f4d352: 026d053b mulw a0,s10,t1 + 83f4d356: 406785bb subw a1,a5,t1 + 83f4d35a: fff5861b addiw a2,a1,-1 + 83f4d35e: 9522 add a0,a0,s0 + 83f4d360: 07a05863 blez s10,83f4d3d0 + 83f4d364: 4801 li a6,0 + 83f4d366: 01a508b3 add a7,a0,s10 + 83f4d36a: 010507b3 add a5,a0,a6 + 83f4d36e: 0007c583 lbu a1,0(a5) + 83f4d372: 010887b3 add a5,a7,a6 + 83f4d376: ce01 beqz a2,83f4d38e + 83f4d378: 4701 li a4,0 + 83f4d37a: a021 j 83f4d382 + 83f4d37c: 2705 addiw a4,a4,1 + 83f4d37e: 00c70863 beq a4,a2,83f4d38e + 83f4d382: 0007c683 lbu a3,0(a5) + 83f4d386: 97ea add a5,a5,s10 + 83f4d388: feb68ae3 beq a3,a1,83f4d37c + 83f4d38c: 863a mv a2,a4 + 83f4d38e: 0805 addi a6,a6,1 + 83f4d390: 0008079b sext.w a5,a6 + 83f4d394: fda7cbe3 blt a5,s10,83f4d36a + 83f4d398: 0016059b addiw a1,a2,1 + 83f4d39c: 00658cbb addw s9,a1,t1 + 83f4d3a0: 01536633 or a2,t1,s5 + 83f4d3a4: 2601 sext.w a2,a2 + 83f4d3a6: 15c2 slli a1,a1,0x30 + 83f4d3a8: 86a6 mv a3,s1 + 83f4d3aa: 00163613 seqz a2,a2 + 83f4d3ae: 91c1 srli a1,a1,0x30 + 83f4d3b0: e9dff0ef jal ra,83f4d24c + 83f4d3b4: 002dd783 lhu a5,2(s11) + 83f4d3b8: 00fcde63 bge s9,a5,83f4d3d4 + 83f4d3bc: 8366 mv t1,s9 + 83f4d3be: 026d053b mulw a0,s10,t1 + 83f4d3c2: 406785bb subw a1,a5,t1 + 83f4d3c6: fff5861b addiw a2,a1,-1 + 83f4d3ca: 9522 add a0,a0,s0 + 83f4d3cc: f9a04ce3 bgtz s10,83f4d364 + 83f4d3d0: 8cbe mv s9,a5 + 83f4d3d2: b7f9 j 83f4d3a0 + 83f4d3d4: 010db403 ld s0,16(s11) + 83f4d3d8: 008da783 lw a5,8(s11) + 83f4d3dc: 03a787bb mulw a5,a5,s10 + 83f4d3e0: 1782 slli a5,a5,0x20 + 83f4d3e2: 9381 srli a5,a5,0x20 + 83f4d3e4: 943e add s0,s0,a5 + 83f4d3e6: 008db823 sd s0,16(s11) + 83f4d3ea: bf0d j 83f4d31c + 83f4d3ec: c7a1 beqz a5,83f4d434 + 83f4d3ee: 00140c13 addi s8,s0,1 + 83f4d3f2: 013beab3 or s5,s7,s3 + 83f4d3f6: 4401 li s0,0 + 83f4d3f8: fffc4c83 lbu s9,-1(s8) + 83f4d3fc: 01546633 or a2,s0,s5 + 83f4d400: 408785bb subw a1,a5,s0 + 83f4d404: 2c85 addiw s9,s9,1 + 83f4d406: 000c881b sext.w a6,s9 + 83f4d40a: 8562 mv a0,s8 + 83f4d40c: 86a6 mv a3,s1 + 83f4d40e: 00163613 seqz a2,a2 + 83f4d412: 0105d363 bge a1,a6,83f4d418 + 83f4d416: 8cae mv s9,a1 + 83f4d418: 030c9593 slli a1,s9,0x30 + 83f4d41c: 91c1 srli a1,a1,0x30 + 83f4d41e: e2fff0ef jal ra,83f4d24c + 83f4d422: 002dd783 lhu a5,2(s11) + 83f4d426: 008c843b addw s0,s9,s0 + 83f4d42a: 9c52 add s8,s8,s4 + 83f4d42c: fcf446e3 blt s0,a5,83f4d3f8 + 83f4d430: 010db403 ld s0,16(s11) + 83f4d434: 008db683 ld a3,8(s11) + 83f4d438: 018dd783 lhu a5,24(s11) + 83f4d43c: 6622 ld a2,8(sp) + 83f4d43e: 0006d703 lhu a4,0(a3) + 83f4d442: 079a slli a5,a5,0x6 + 83f4d444: 97b2 add a5,a5,a2 + 83f4d446: 943a add s0,s0,a4 + 83f4d448: 008db823 sd s0,16(s11) + 83f4d44c: 4f98 lw a4,24(a5) + 83f4d44e: 0006d683 lhu a3,0(a3) + 83f4d452: 9f35 addw a4,a4,a3 + 83f4d454: cf98 sw a4,24(a5) + 83f4d456: 008db783 ld a5,8(s11) + 83f4d45a: 0789 addi a5,a5,2 + 83f4d45c: 00fdb423 sd a5,8(s11) + 83f4d460: bd75 j 83f4d31c + 83f4d462: 013be633 or a2,s7,s3 + 83f4d466: 86a6 mv a3,s1 + 83f4d468: 00163613 seqz a2,a2 + 83f4d46c: 010d8513 addi a0,s11,16 + 83f4d470: dddff0ef jal ra,83f4d24c + 83f4d474: b565 j 83f4d31c + 83f4d476: 70e6 ld ra,120(sp) + 83f4d478: 7446 ld s0,112(sp) + 83f4d47a: 74a6 ld s1,104(sp) + 83f4d47c: 7906 ld s2,96(sp) + 83f4d47e: 69e6 ld s3,88(sp) + 83f4d480: 6a46 ld s4,80(sp) + 83f4d482: 6aa6 ld s5,72(sp) + 83f4d484: 6b06 ld s6,64(sp) + 83f4d486: 7be2 ld s7,56(sp) + 83f4d488: 7c42 ld s8,48(sp) + 83f4d48a: 7ca2 ld s9,40(sp) + 83f4d48c: 7d02 ld s10,32(sp) + 83f4d48e: 6de2 ld s11,24(sp) + 83f4d490: 6109 addi sp,sp,128 + 83f4d492: 8082 ret + +0000000083f4d494 : + 83f4d494: 00012e17 auipc t3,0x12 + 83f4d498: 7ade0e13 addi t3,t3,1965 # 83f5fc41 + 83f4d49c: 000e4e83 lbu t4,0(t3) + 83f4d4a0: 7135 addi sp,sp,-160 + 83f4d4a2: e526 sd s1,136(sp) + 83f4d4a4: fcce sd s3,120(sp) + 83f4d4a6: f4d6 sd s5,104(sp) + 83f4d4a8: e8e2 sd s8,80(sp) + 83f4d4aa: ed06 sd ra,152(sp) + 83f4d4ac: e922 sd s0,144(sp) + 83f4d4ae: e14a sd s2,128(sp) + 83f4d4b0: f8d2 sd s4,112(sp) + 83f4d4b2: f0da sd s6,96(sp) + 83f4d4b4: ecde sd s7,88(sp) + 83f4d4b6: e4e6 sd s9,72(sp) + 83f4d4b8: e0ea sd s10,64(sp) + 83f4d4ba: fc6e sd s11,56(sp) + 83f4d4bc: d602 sw zero,44(sp) + 83f4d4be: e836 sd a3,16(sp) + 83f4d4c0: ec3a sd a4,24(sp) + 83f4d4c2: 8aaa mv s5,a0 + 83f4d4c4: 84b2 mv s1,a2 + 83f4d4c6: 8c42 mv s8,a6 + 83f4d4c8: 89c6 mv s3,a7 + 83f4d4ca: 000e9b63 bnez t4,83f4d4e0 + 83f4d4ce: 00010717 auipc a4,0x10 + 83f4d4d2: 00270713 addi a4,a4,2 # 83f5d4d0 + 83f4d4d6: e718 sd a4,8(a4) + 83f4d4d8: e318 sd a4,0(a4) + 83f4d4da: 4705 li a4,1 + 83f4d4dc: 00ee0023 sb a4,0(t3) + 83f4d4e0: 6742 ld a4,16(sp) + 83f4d4e2: 8826 mv a6,s1 + 83f4d4e4: 1074 addi a3,sp,44 + 83f4d4e6: 00010617 auipc a2,0x10 + 83f4d4ea: fea60613 addi a2,a2,-22 # 83f5d4d0 + 83f4d4ee: 8556 mv a0,s5 + 83f4d4f0: 90dff0ef jal ra,83f4cdfc + 83f4d4f4: 24050563 beqz a0,83f4d73e + 83f4d4f8: 4b81 li s7,0 + 83f4d4fa: 5dfd li s11,-1 + 83f4d4fc: 00010d17 auipc s10,0x10 + 83f4d500: fd4d0d13 addi s10,s10,-44 # 83f5d4d0 + 83f4d504: 4a05 li s4,1 + 83f4d506: 0c905b63 blez s1,83f4d5dc + 83f4d50a: 57b2 lw a5,44(sp) + 83f4d50c: 37fd addiw a5,a5,-1 + 83f4d50e: 0e0dc663 bltz s11,83f4d5fa + 83f4d512: 00492c83 lw s9,4(s2) + 83f4d516: 1afdca63 blt s11,a5,83f4d6ca + 83f4d51a: 03800513 li a0,56 + 83f4d51e: 066010ef jal ra,83f4e584 + 83f4d522: 842a mv s0,a0 + 83f4d524: 417c87bb subw a5,s9,s7 + 83f4d528: c955 beqz a0,83f4d5dc + 83f4d52a: 01441023 sh s4,0(s0) + 83f4d52e: 00f41123 sh a5,2(s0) + 83f4d532: 00042423 sw zero,8(s0) + 83f4d536: 01342823 sw s3,16(s0) + 83f4d53a: 00041c23 sh zero,24(s0) + 83f4d53e: 587d li a6,-1 + 83f4d540: 008d3703 ld a4,8(s10) + 83f4d544: 4781 li a5,0 + 83f4d546: ff070613 addi a2,a4,-16 + 83f4d54a: c311 beqz a4,83f4d54e + 83f4d54c: 671c ld a5,8(a4) + 83f4d54e: 03a70d63 beq a4,s10,83f4d588 + 83f4d552: 020d8b63 beqz s11,83f4d588 + 83f4d556: 4681 li a3,0 + 83f4d558: 0016871b addiw a4,a3,1 + 83f4d55c: ff078613 addi a2,a5,-16 + 83f4d560: cf89 beqz a5,83f4d57a + 83f4d562: 6794 ld a3,8(a5) + 83f4d564: 03a78263 beq a5,s10,83f4d588 + 83f4d568: 87b6 mv a5,a3 + 83f4d56a: 01b70f63 beq a4,s11,83f4d588 + 83f4d56e: 86ba mv a3,a4 + 83f4d570: 0016871b addiw a4,a3,1 + 83f4d574: ff078613 addi a2,a5,-16 + 83f4d578: f7ed bnez a5,83f4d562 + 83f4d57a: 21b70163 beq a4,s11,83f4d77c + 83f4d57e: 0026871b addiw a4,a3,2 + 83f4d582: 5641 li a2,-16 + 83f4d584: ffb715e3 bne a4,s11,83f4d56e + 83f4d588: 00865783 lhu a5,8(a2) + 83f4d58c: 079a slli a5,a5,0x6 + 83f4d58e: 97d6 add a5,a5,s5 + 83f4d590: 4398 lw a4,0(a5) + 83f4d592: 3779 addiw a4,a4,-2 + 83f4d594: 9b75 andi a4,a4,-3 + 83f4d596: 2701 sext.w a4,a4 + 83f4d598: cb65 beqz a4,83f4d688 + 83f4d59a: 5b9c lw a5,48(a5) + 83f4d59c: c81c sw a5,16(s0) + 83f4d59e: 85ee mv a1,s11 + 83f4d5a0: 8666 mv a2,s9 + 83f4d5a2: 856a mv a0,s10 + 83f4d5a4: e442 sd a6,8(sp) + 83f4d5a6: f66ff0ef jal ra,83f4cd0c + 83f4d5aa: 57b2 lw a5,44(sp) + 83f4d5ac: 6822 ld a6,8(sp) + 83f4d5ae: 8be6 mv s7,s9 + 83f4d5b0: 40a80dbb subw s11,a6,a0 + 83f4d5b4: 40a7853b subw a0,a5,a0 + 83f4d5b8: d62a sw a0,44(sp) + 83f4d5ba: 120dd263 bgez s11,83f4d6de + 83f4d5be: 501c lw a5,32(s0) + 83f4d5c0: 02840713 addi a4,s0,40 + 83f4d5c4: 2785 addiw a5,a5,1 + 83f4d5c6: d01c sw a5,32(s0) + 83f4d5c8: 000c3783 ld a5,0(s8) + 83f4d5cc: 03843823 sd s8,48(s0) + 83f4d5d0: f41c sd a5,40(s0) + 83f4d5d2: e798 sd a4,8(a5) + 83f4d5d4: 00ec3023 sd a4,0(s8) + 83f4d5d8: f29cc9e3 blt s9,s1,83f4d50a + 83f4d5dc: 60ea ld ra,152(sp) + 83f4d5de: 644a ld s0,144(sp) + 83f4d5e0: 64aa ld s1,136(sp) + 83f4d5e2: 690a ld s2,128(sp) + 83f4d5e4: 79e6 ld s3,120(sp) + 83f4d5e6: 7a46 ld s4,112(sp) + 83f4d5e8: 7aa6 ld s5,104(sp) + 83f4d5ea: 7b06 ld s6,96(sp) + 83f4d5ec: 6be6 ld s7,88(sp) + 83f4d5ee: 6c46 ld s8,80(sp) + 83f4d5f0: 6ca6 ld s9,72(sp) + 83f4d5f2: 6d06 ld s10,64(sp) + 83f4d5f4: 7de2 ld s11,56(sp) + 83f4d5f6: 610d addi sp,sp,160 + 83f4d5f8: 8082 ret + 83f4d5fa: 000d3683 ld a3,0(s10) + 83f4d5fe: ff068713 addi a4,a3,-16 + 83f4d602: 16dd0f63 beq s10,a3,83f4d780 + 83f4d606: 8b3e mv s6,a5 + 83f4d608: 863a mv a2,a4 + 83f4d60a: 420c lw a1,0(a2) + 83f4d60c: 00462c83 lw s9,4(a2) + 83f4d610: 02bbcd63 blt s7,a1,83f4d64a + 83f4d614: 039bdb63 bge s7,s9,83f4d64a + 83f4d618: 5dfd li s11,-1 + 83f4d61a: 04fb4463 blt s6,a5,83f4d662 + 83f4d61e: 03800513 li a0,56 + 83f4d622: 763000ef jal ra,83f4e584 + 83f4d626: 842a mv s0,a0 + 83f4d628: 417c87bb subw a5,s9,s7 + 83f4d62c: d945 beqz a0,83f4d5dc + 83f4d62e: 01451023 sh s4,0(a0) + 83f4d632: 00f51123 sh a5,2(a0) + 83f4d636: 00052423 sw zero,8(a0) + 83f4d63a: 01352823 sw s3,16(a0) + 83f4d63e: 00051c23 sh zero,24(a0) + 83f4d642: 160b5263 bgez s6,83f4d7a6 + 83f4d646: 8be6 mv s7,s9 + 83f4d648: bf9d j 83f4d5be + 83f4d64a: 6a0c ld a1,16(a2) + 83f4d64c: 3b7d addiw s6,s6,-1 + 83f4d64e: ff058613 addi a2,a1,-16 + 83f4d652: fabd1ce3 bne s10,a1,83f4d60a + 83f4d656: 5b7d li s6,-1 + 83f4d658: 8ca6 mv s9,s1 + 83f4d65a: 85de mv a1,s7 + 83f4d65c: 5dfd li s11,-1 + 83f4d65e: fcfb50e3 bge s6,a5,83f4d61e + 83f4d662: 5dfd li s11,-1 + 83f4d664: a031 j 83f4d670 + 83f4d666: 6b10 ld a2,16(a4) + 83f4d668: ff060713 addi a4,a2,-16 + 83f4d66c: fba609e3 beq a2,s10,83f4d61e + 83f4d670: 4310 lw a2,0(a4) + 83f4d672: 00b64763 blt a2,a1,83f4d680 + 83f4d676: 01965563 bge a2,s9,83f4d680 + 83f4d67a: 8dbe mv s11,a5 + 83f4d67c: 893a mv s2,a4 + 83f4d67e: 8cb2 mv s9,a2 + 83f4d680: 37fd addiw a5,a5,-1 + 83f4d682: fefb42e3 blt s6,a5,83f4d666 + 83f4d686: bf61 j 83f4d61e + 83f4d688: 00040023 sb zero,0(s0) + 83f4d68c: 4394 lw a3,0(a5) + 83f4d68e: 65c2 ld a1,16(sp) + 83f4d690: 4509 li a0,2 + 83f4d692: ffe68713 addi a4,a3,-2 + 83f4d696: 00e03733 snez a4,a4 + 83f4d69a: 00e400a3 sb a4,1(s0) + 83f4d69e: 4798 lw a4,8(a5) + 83f4d6a0: 9d99 subw a1,a1,a4 + 83f4d6a2: 872e mv a4,a1 + 83f4d6a4: 06a69f63 bne a3,a0,83f4d722 + 83f4d6a8: 4f94 lw a3,24(a5) + 83f4d6aa: 02d7073b mulw a4,a4,a3 + 83f4d6ae: c414 sw a3,8(s0) + 83f4d6b0: 4214 lw a3,0(a2) + 83f4d6b2: 7b90 ld a2,48(a5) + 83f4d6b4: 40db87bb subw a5,s7,a3 + 83f4d6b8: 9f3d addw a4,a4,a5 + 83f4d6ba: 67e2 ld a5,24(sp) + 83f4d6bc: 02f707bb mulw a5,a4,a5 + 83f4d6c0: 1782 slli a5,a5,0x20 + 83f4d6c2: 9381 srli a5,a5,0x20 + 83f4d6c4: 97b2 add a5,a5,a2 + 83f4d6c6: e81c sd a5,16(s0) + 83f4d6c8: bdd9 j 83f4d59e + 83f4d6ca: 000d3683 ld a3,0(s10) + 83f4d6ce: 00092583 lw a1,0(s2) + 83f4d6d2: ff068713 addi a4,a3,-16 + 83f4d6d6: e4dd02e3 beq s10,a3,83f4d51a + 83f4d6da: 8b6e mv s6,s11 + 83f4d6dc: b759 j 83f4d662 + 83f4d6de: 008d3783 ld a5,8(s10) + 83f4d6e2: 4701 li a4,0 + 83f4d6e4: c391 beqz a5,83f4d6e8 + 83f4d6e6: 6798 ld a4,8(a5) + 83f4d6e8: ff078693 addi a3,a5,-16 + 83f4d6ec: f5a78de3 beq a5,s10,83f4d646 + 83f4d6f0: 4781 li a5,0 + 83f4d6f2: 0a0d8763 beqz s11,83f4d7a0 + 83f4d6f6: 2785 addiw a5,a5,1 + 83f4d6f8: cf09 beqz a4,83f4d712 + 83f4d6fa: 6714 ld a3,8(a4) + 83f4d6fc: f5a705e3 beq a4,s10,83f4d646 + 83f4d700: 00fd8d63 beq s11,a5,83f4d71a + 83f4d704: 8736 mv a4,a3 + 83f4d706: 2785 addiw a5,a5,1 + 83f4d708: fb6d bnez a4,83f4d6fa + 83f4d70a: a021 j 83f4d712 + 83f4d70c: 00dd8763 beq s11,a3,83f4d71a + 83f4d710: 2789 addiw a5,a5,2 + 83f4d712: 0017869b addiw a3,a5,1 + 83f4d716: ffb79be3 bne a5,s11,83f4d70c + 83f4d71a: ff070913 addi s2,a4,-16 + 83f4d71e: 8be6 mv s7,s9 + 83f4d720: bd79 j 83f4d5be + 83f4d722: 0187e683 lwu a3,24(a5) + 83f4d726: 7b98 ld a4,48(a5) + 83f4d728: 0586 slli a1,a1,0x1 + 83f4d72a: 9736 add a4,a4,a3 + 83f4d72c: e818 sd a4,16(s0) + 83f4d72e: 7b9c ld a5,48(a5) + 83f4d730: 95be add a1,a1,a5 + 83f4d732: e40c sd a1,8(s0) + 83f4d734: 00865783 lhu a5,8(a2) + 83f4d738: 00f41c23 sh a5,24(s0) + 83f4d73c: b58d j 83f4d59e + 83f4d73e: 03800513 li a0,56 + 83f4d742: 643000ef jal ra,83f4e584 + 83f4d746: e8050be3 beqz a0,83f4d5dc + 83f4d74a: 511c lw a5,32(a0) + 83f4d74c: 4705 li a4,1 + 83f4d74e: 00e51023 sh a4,0(a0) + 83f4d752: 2785 addiw a5,a5,1 + 83f4d754: 00951123 sh s1,2(a0) + 83f4d758: d11c sw a5,32(a0) + 83f4d75a: 00052423 sw zero,8(a0) + 83f4d75e: 01352823 sw s3,16(a0) + 83f4d762: 00051c23 sh zero,24(a0) + 83f4d766: 000c3703 ld a4,0(s8) + 83f4d76a: 02850793 addi a5,a0,40 + 83f4d76e: 03853823 sd s8,48(a0) + 83f4d772: f518 sd a4,40(a0) + 83f4d774: e71c sd a5,8(a4) + 83f4d776: 00fc3023 sd a5,0(s8) + 83f4d77a: b58d j 83f4d5dc + 83f4d77c: 5641 li a2,-16 + 83f4d77e: b529 j 83f4d588 + 83f4d780: 03800513 li a0,56 + 83f4d784: 601000ef jal ra,83f4e584 + 83f4d788: 4174883b subw a6,s1,s7 + 83f4d78c: e40508e3 beqz a0,83f4d5dc + 83f4d790: 511c lw a5,32(a0) + 83f4d792: 4705 li a4,1 + 83f4d794: 00e51023 sh a4,0(a0) + 83f4d798: 2785 addiw a5,a5,1 + 83f4d79a: 01051123 sh a6,2(a0) + 83f4d79e: bf6d j 83f4d758 + 83f4d7a0: 8936 mv s2,a3 + 83f4d7a2: 8be6 mv s7,s9 + 83f4d7a4: bd29 j 83f4d5be + 83f4d7a6: 886e mv a6,s11 + 83f4d7a8: 8dda mv s11,s6 + 83f4d7aa: bb59 j 83f4d540 + +0000000083f4d7ac : + 83f4d7ac: 716d addi sp,sp,-272 + 83f4d7ae: fda6 sd s1,248(sp) + 83f4d7b0: f9ca sd s2,240(sp) + 83f4d7b2: f5ce sd s3,232(sp) + 83f4d7b4: e5de sd s7,200(sp) + 83f4d7b6: fd66 sd s9,184(sp) + 83f4d7b8: e606 sd ra,264(sp) + 83f4d7ba: e222 sd s0,256(sp) + 83f4d7bc: f1d2 sd s4,224(sp) + 83f4d7be: edd6 sd s5,216(sp) + 83f4d7c0: e9da sd s6,208(sp) + 83f4d7c2: e1e2 sd s8,192(sp) + 83f4d7c4: f96a sd s10,176(sp) + 83f4d7c6: f56e sd s11,168(sp) + 83f4d7c8: ce32 sw a2,28(sp) + 83f4d7ca: 8baa mv s7,a0 + 83f4d7cc: 84b6 mv s1,a3 + 83f4d7ce: 89ba mv s3,a4 + 83f4d7d0: 8cbe mv s9,a5 + 83f4d7d2: 4901 li s2,0 + 83f4d7d4: 16061163 bnez a2,83f4d936 + 83f4d7d8: 00012797 auipc a5,0x12 + 83f4d7dc: 46878793 addi a5,a5,1128 # 83f5fc40 + 83f4d7e0: 0007c703 lbu a4,0(a5) + 83f4d7e4: 12070f63 beqz a4,83f4d922 + 83f4d7e8: 03010a93 addi s5,sp,48 + 83f4d7ec: 86de mv a3,s7 + 83f4d7ee: 864e mv a2,s3 + 83f4d7f0: 85a6 mv a1,s1 + 83f4d7f2: 8556 mv a0,s5 + 83f4d7f4: 9b9ff0ef jal ra,83f4d1ac + 83f4d7f8: 008ba503 lw a0,8(s7) + 83f4d7fc: 481000ef jal ra,83f4e47c + 83f4d800: 004ba303 lw t1,4(s7) + 83f4d804: 14605963 blez t1,83f4d956 + 83f4d808: 00010417 auipc s0,0x10 + 83f4d80c: cb840413 addi s0,s0,-840 # 83f5d4c0 + 83f4d810: 0005099b sext.w s3,a0 + 83f4d814: 4b01 li s6,0 + 83f4d816: 02c10c13 addi s8,sp,44 + 83f4d81a: 00010497 auipc s1,0x10 + 83f4d81e: cb648493 addi s1,s1,-842 # 83f5d4d0 + 83f4d822: 8a22 mv s4,s0 + 83f4d824: 00cba883 lw a7,12(s7) + 83f4d828: 000ba603 lw a2,0(s7) + 83f4d82c: 45f2 lw a1,28(sp) + 83f4d82e: 86da mv a3,s6 + 83f4d830: 87e2 mv a5,s8 + 83f4d832: 874e mv a4,s3 + 83f4d834: 8852 mv a6,s4 + 83f4d836: 854a mv a0,s2 + 83f4d838: d61a sw t1,44(sp) + 83f4d83a: c5bff0ef jal ra,83f4d494 + 83f4d83e: 87da mv a5,s6 + 83f4d840: 5b32 lw s6,44(sp) + 83f4d842: 00078d1b sext.w s10,a5 + 83f4d846: 40fb073b subw a4,s6,a5 + 83f4d84a: 00f70dbb addw s11,a4,a5 + 83f4d84e: 00e05c63 blez a4,83f4d866 + 83f4d852: 866a mv a2,s10 + 83f4d854: 8752 mv a4,s4 + 83f4d856: 2d05 addiw s10,s10,1 + 83f4d858: 86ce mv a3,s3 + 83f4d85a: 85ca mv a1,s2 + 83f4d85c: 8556 mv a0,s5 + 83f4d85e: a73ff0ef jal ra,83f4d2d0 + 83f4d862: ffad98e3 bne s11,s10,83f4d852 + 83f4d866: 854a mv a0,s2 + 83f4d868: fffb061b addiw a2,s6,-1 + 83f4d86c: 086c addi a1,sp,28 + 83f4d86e: d16ff0ef jal ra,83f4cd84 + 83f4d872: 6408 ld a0,8(s0) + 83f4d874: 02850763 beq a0,s0,83f4d8a2 + 83f4d878: 6118 ld a4,0(a0) + 83f4d87a: 651c ld a5,8(a0) + 83f4d87c: fd850513 addi a0,a0,-40 + 83f4d880: e71c sd a5,8(a4) + 83f4d882: e398 sd a4,0(a5) + 83f4d884: 667000ef jal ra,83f4e6ea + 83f4d888: 6408 ld a0,8(s0) + 83f4d88a: fe8517e3 bne a0,s0,83f4d878 + 83f4d88e: 6488 ld a0,8(s1) + 83f4d890: 00950c63 beq a0,s1,83f4d8a8 + 83f4d894: 6118 ld a4,0(a0) + 83f4d896: 651c ld a5,8(a0) + 83f4d898: 1541 addi a0,a0,-16 + 83f4d89a: e71c sd a5,8(a4) + 83f4d89c: e398 sd a4,0(a5) + 83f4d89e: 64d000ef jal ra,83f4e6ea + 83f4d8a2: 6488 ld a0,8(s1) + 83f4d8a4: fe9518e3 bne a0,s1,83f4d894 + 83f4d8a8: 004ba303 lw t1,4(s7) + 83f4d8ac: f66b4ce3 blt s6,t1,83f4d824 + 83f4d8b0: 07810313 addi t1,sp,120 + 83f4d8b4: 04000893 li a7,64 + 83f4d8b8: 4805 li a6,1 + 83f4d8ba: 87e2 mv a5,s8 + 83f4d8bc: 0978 addi a4,sp,156 + 83f4d8be: 0934 addi a3,sp,152 + 83f4d8c0: 0950 addi a2,sp,148 + 83f4d8c2: 090c addi a1,sp,144 + 83f4d8c4: e41a sd t1,8(sp) + 83f4d8c6: 4501 li a0,0 + 83f4d8c8: e056 sd s5,0(sp) + 83f4d8ca: 02011623 sh zero,44(sp) + 83f4d8ce: 26f000ef jal ra,83f4e33c + 83f4d8d2: 440a lw s0,128(sp) + 83f4d8d4: 3b9000ef jal ra,83f4e48c + 83f4d8d8: 241d addiw s0,s0,7 + 83f4d8da: 4034541b sraiw s0,s0,0x3 + 83f4d8de: 1402 slli s0,s0,0x20 + 83f4d8e0: 9001 srli s0,s0,0x20 + 83f4d8e2: 043d addi s0,s0,15 + 83f4d8e4: 00a407b3 add a5,s0,a0 + 83f4d8e8: 8391 srli a5,a5,0x4 + 83f4d8ea: 2785 addiw a5,a5,1 + 83f4d8ec: 0047979b slliw a5,a5,0x4 + 83f4d8f0: 854a mv a0,s2 + 83f4d8f2: 00fca023 sw a5,0(s9) + 83f4d8f6: 5f5000ef jal ra,83f4e6ea + 83f4d8fa: 6566 ld a0,88(sp) + 83f4d8fc: c119 beqz a0,83f4d902 + 83f4d8fe: 5ed000ef jal ra,83f4e6ea + 83f4d902: 452a lw a0,136(sp) + 83f4d904: 60b2 ld ra,264(sp) + 83f4d906: 6412 ld s0,256(sp) + 83f4d908: 74ee ld s1,248(sp) + 83f4d90a: 794e ld s2,240(sp) + 83f4d90c: 79ae ld s3,232(sp) + 83f4d90e: 7a0e ld s4,224(sp) + 83f4d910: 6aee ld s5,216(sp) + 83f4d912: 6b4e ld s6,208(sp) + 83f4d914: 6bae ld s7,200(sp) + 83f4d916: 6c0e ld s8,192(sp) + 83f4d918: 7cea ld s9,184(sp) + 83f4d91a: 7d4a ld s10,176(sp) + 83f4d91c: 7daa ld s11,168(sp) + 83f4d91e: 6151 addi sp,sp,272 + 83f4d920: 8082 ret + 83f4d922: 00010417 auipc s0,0x10 + 83f4d926: b9e40413 addi s0,s0,-1122 # 83f5d4c0 + 83f4d92a: 4705 li a4,1 + 83f4d92c: 00e78023 sb a4,0(a5) + 83f4d930: e400 sd s0,8(s0) + 83f4d932: e000 sd s0,0(s0) + 83f4d934: bd55 j 83f4d7e8 + 83f4d936: 02061793 slli a5,a2,0x20 + 83f4d93a: 01a7d513 srli a0,a5,0x1a + 83f4d93e: e82e sd a1,16(sp) + 83f4d940: 445000ef jal ra,83f4e584 + 83f4d944: 892a mv s2,a0 + 83f4d946: c919 beqz a0,83f4d95c + 83f4d948: 01c16603 lwu a2,28(sp) + 83f4d94c: 65c2 ld a1,16(sp) + 83f4d94e: 061a slli a2,a2,0x6 + 83f4d950: fb0f20ef jal ra,83f40100 + 83f4d954: b551 j 83f4d7d8 + 83f4d956: 02c10c13 addi s8,sp,44 + 83f4d95a: bf99 j 83f4d8b0 + 83f4d95c: 557d li a0,-1 + 83f4d95e: b75d j 83f4d904 + +0000000083f4d960 : + 83f4d960: 7179 addi sp,sp,-48 + 83f4d962: f406 sd ra,40(sp) + 83f4d964: f022 sd s0,32(sp) + 83f4d966: ec26 sd s1,24(sp) + 83f4d968: e84a sd s2,16(sp) + 83f4d96a: e44e sd s3,8(sp) + 83f4d96c: e052 sd s4,0(sp) + 83f4d96e: 84ae mv s1,a1 + 83f4d970: 418c lw a1,0(a1) + 83f4d972: 8832 mv a6,a2 + 83f4d974: 842a mv s0,a0 + 83f4d976: fff5861b addiw a2,a1,-1 + 83f4d97a: 8542 mv a0,a6 + 83f4d97c: 4581 li a1,0 + 83f4d97e: 8a36 mv s4,a3 + 83f4d980: 89ba mv s3,a4 + 83f4d982: 893e mv s2,a5 + 83f4d984: 444000ef jal ra,83f4ddc8 + 83f4d988: c008 sw a0,0(s0) + 83f4d98a: 40d0 lw a2,4(s1) + 83f4d98c: 4581 li a1,0 + 83f4d98e: 8552 mv a0,s4 + 83f4d990: 367d addiw a2,a2,-1 + 83f4d992: 436000ef jal ra,83f4ddc8 + 83f4d996: c048 sw a0,4(s0) + 83f4d998: 401c lw a5,0(s0) + 83f4d99a: 4090 lw a2,0(s1) + 83f4d99c: 4581 li a1,0 + 83f4d99e: 854e mv a0,s3 + 83f4d9a0: 9e1d subw a2,a2,a5 + 83f4d9a2: 426000ef jal ra,83f4ddc8 + 83f4d9a6: c408 sw a0,8(s0) + 83f4d9a8: 40d0 lw a2,4(s1) + 83f4d9aa: 405c lw a5,4(s0) + 83f4d9ac: 854a mv a0,s2 + 83f4d9ae: 4581 li a1,0 + 83f4d9b0: 9e1d subw a2,a2,a5 + 83f4d9b2: 416000ef jal ra,83f4ddc8 + 83f4d9b6: c448 sw a0,12(s0) + 83f4d9b8: 70a2 ld ra,40(sp) + 83f4d9ba: 7402 ld s0,32(sp) + 83f4d9bc: 64e2 ld s1,24(sp) + 83f4d9be: 6942 ld s2,16(sp) + 83f4d9c0: 69a2 ld s3,8(sp) + 83f4d9c2: 6a02 ld s4,0(sp) + 83f4d9c4: 6145 addi sp,sp,48 + 83f4d9c6: 8082 ret + +0000000083f4d9c8 : + 83f4d9c8: 7135 addi sp,sp,-160 + 83f4d9ca: ed06 sd ra,152(sp) + 83f4d9cc: e922 sd s0,144(sp) + 83f4d9ce: e526 sd s1,136(sp) + 83f4d9d0: e14a sd s2,128(sp) + 83f4d9d2: fcce sd s3,120(sp) + 83f4d9d4: f8d2 sd s4,112(sp) + 83f4d9d6: f4d6 sd s5,104(sp) + 83f4d9d8: f0da sd s6,96(sp) + 83f4d9da: ecde sd s7,88(sp) + 83f4d9dc: e8e2 sd s8,80(sp) + 83f4d9de: e4e6 sd s9,72(sp) + 83f4d9e0: bc22 fsd fs0,56(sp) + 83f4d9e2: b826 fsd fs1,48(sp) + 83f4d9e4: b44a fsd fs2,40(sp) + 83f4d9e6: b04e fsd fs3,32(sp) + 83f4d9e8: ac52 fsd fs4,24(sp) + 83f4d9ea: a856 fsd fs5,16(sp) + 83f4d9ec: a45a fsd fs6,8(sp) + 83f4d9ee: a05e fsd fs7,0(sp) + 83f4d9f0: d910 sw a2,48(a0) + 83f4d9f2: 8bb2 mv s7,a2 + 83f4d9f4: 4190 lw a2,0(a1) + 83f4d9f6: 84ae mv s1,a1 + 83f4d9f8: 842a mv s0,a0 + 83f4d9fa: 4581 li a1,0 + 83f4d9fc: 8536 mv a0,a3 + 83f4d9fe: 893a mv s2,a4 + 83f4da00: 8abe mv s5,a5 + 83f4da02: 8a42 mv s4,a6 + 83f4da04: 8b46 mv s6,a7 + 83f4da06: 3c2000ef jal ra,83f4ddc8 + 83f4da0a: 4090 lw a2,0(s1) + 83f4da0c: 4581 li a1,0 + 83f4da0e: 89aa mv s3,a0 + 83f4da10: 8556 mv a0,s5 + 83f4da12: 3b6000ef jal ra,83f4ddc8 + 83f4da16: 40d0 lw a2,4(s1) + 83f4da18: 4581 li a1,0 + 83f4da1a: 8aaa mv s5,a0 + 83f4da1c: 854a mv a0,s2 + 83f4da1e: 3aa000ef jal ra,83f4ddc8 + 83f4da22: 40d0 lw a2,4(s1) + 83f4da24: 4581 li a1,0 + 83f4da26: 892a mv s2,a0 + 83f4da28: 8552 mv a0,s4 + 83f4da2a: 39e000ef jal ra,83f4ddc8 + 83f4da2e: 8a2a mv s4,a0 + 83f4da30: 02000613 li a2,32 + 83f4da34: 855a mv a0,s6 + 83f4da36: 4585 li a1,1 + 83f4da38: 390000ef jal ra,83f4ddc8 + 83f4da3c: 8b2a mv s6,a0 + 83f4da3e: 23598c63 beq s3,s5,83f4dc76 + 83f4da42: 1d490163 beq s2,s4,83f4dc04 + 83f4da46: 478d li a5,3 + 83f4da48: 03742823 sw s7,48(s0) + 83f4da4c: c01c sw a5,0(s0) + 83f4da4e: 00090c9b sext.w s9,s2 + 83f4da52: 012a5463 bge s4,s2,83f4da5a + 83f4da56: 000a0c9b sext.w s9,s4 + 83f4da5a: 01495563 bge s2,s4,83f4da64 + 83f4da5e: 87ce mv a5,s3 + 83f4da60: 89d6 mv s3,s5 + 83f4da62: 8abe mv s5,a5 + 83f4da64: 86ca mv a3,s2 + 83f4da66: 01495363 bge s2,s4,83f4da6c + 83f4da6a: 86d2 mv a3,s4 + 83f4da6c: 4196863b subw a2,a3,s9 + 83f4da70: 41598bbb subw s7,s3,s5 + 83f4da74: d00bf453 fcvt.s.w fs0,s7 + 83f4da78: d0067bd3 fcvt.s.w fs7,a2 + 83f4da7c: 8732 mv a4,a2 + 83f4da7e: 87de mv a5,s7 + 83f4da80: 00068c1b sext.w s8,a3 + 83f4da84: 22060463 beqz a2,83f4dcac + 83f4da88: 197477d3 fdiv.s fa5,fs0,fs7 + 83f4da8c: 02e7073b mulw a4,a4,a4 + 83f4da90: 00005697 auipc a3,0x5 + 83f4da94: 8086b487 fld fs1,-2040(a3) # 83f52298 <__func__.1+0xa0> + 83f4da98: 229485d3 fmv.d fa1,fs1 + 83f4da9c: 00f42227 fsw fa5,4(s0) + 83f4daa0: 00840913 addi s2,s0,8 + 83f4daa4: 01040a13 addi s4,s0,16 + 83f4daa8: 02f787bb mulw a5,a5,a5 + 83f4daac: 9fb9 addw a5,a5,a4 + 83f4daae: d2078553 fcvt.d.w fa0,a5 + 83f4dab2: a10f30ef jal ra,83f40cc2 + 83f4dab6: d20b07d3 fcvt.d.w fa5,s6 + 83f4daba: d00af9d3 fcvt.s.w fs3,s5 + 83f4dabe: d00cfa53 fcvt.s.w fs4,s9 + 83f4dac2: 1297f7d3 fmul.d fa5,fa5,fs1 + 83f4dac6: d009fad3 fcvt.s.w fs5,s3 + 83f4daca: d00c7b53 fcvt.s.w fs6,s8 + 83f4dace: 1aa7f7d3 fdiv.d fa5,fa5,fa0 + 83f4dad2: 4017f7d3 fcvt.s.d fa5,fa5 + 83f4dad6: 10f47453 fmul.s fs0,fs0,fa5 + 83f4dada: 10fbfbd3 fmul.s fs7,fs7,fa5 + 83f4dade: 409c lw a5,0(s1) + 83f4dae0: 217b8953 fmv.s fs2,fs7 + 83f4dae4: 208404d3 fmv.s fs1,fs0 + 83f4dae8: d007f7d3 fcvt.s.w fa5,a5 + 83f4daec: 217b9bd3 fneg.s fs7,fs7 + 83f4daf0: 20841453 fneg.s fs0,fs0 + 83f4daf4: c0079653 fcvt.w.s a2,fa5,rtz + 83f4daf8: 4581 li a1,0 + 83f4dafa: 2601 sext.w a2,a2 + 83f4dafc: 1a0bc363 bltz s7,83f4dca2 + 83f4db00: 0129f7d3 fadd.s fa5,fs3,fs2 + 83f4db04: 208404d3 fmv.s fs1,fs0 + 83f4db08: c0079553 fcvt.w.s a0,fa5,rtz + 83f4db0c: 0911 addi s2,s2,4 + 83f4db0e: 2501 sext.w a0,a0 + 83f4db10: 2b8000ef jal ra,83f4ddc8 + 83f4db14: d00577d3 fcvt.s.w fa5,a0 + 83f4db18: 4581 li a1,0 + 83f4db1a: fef92e27 fsw fa5,-4(s2) + 83f4db1e: 40dc lw a5,4(s1) + 83f4db20: 0144f7d3 fadd.s fa5,fs1,fs4 + 83f4db24: d007f753 fcvt.s.w fa4,a5 + 83f4db28: c0079553 fcvt.w.s a0,fa5,rtz + 83f4db2c: c0071653 fcvt.w.s a2,fa4,rtz + 83f4db30: 2501 sext.w a0,a0 + 83f4db32: 2601 sext.w a2,a2 + 83f4db34: 294000ef jal ra,83f4ddc8 + 83f4db38: d00577d3 fcvt.s.w fa5,a0 + 83f4db3c: 012af953 fadd.s fs2,fs5,fs2 + 83f4db40: 4581 li a1,0 + 83f4db42: 00f92227 fsw fa5,4(s2) + 83f4db46: 409c lw a5,0(s1) + 83f4db48: c0091553 fcvt.w.s a0,fs2,rtz + 83f4db4c: d007f7d3 fcvt.s.w fa5,a5 + 83f4db50: 2501 sext.w a0,a0 + 83f4db52: c0079653 fcvt.w.s a2,fa5,rtz + 83f4db56: 2601 sext.w a2,a2 + 83f4db58: 270000ef jal ra,83f4ddc8 + 83f4db5c: d00577d3 fcvt.s.w fa5,a0 + 83f4db60: 009b74d3 fadd.s fs1,fs6,fs1 + 83f4db64: 4581 li a1,0 + 83f4db66: 00f92627 fsw fa5,12(s2) + 83f4db6a: 40dc lw a5,4(s1) + 83f4db6c: c0049553 fcvt.w.s a0,fs1,rtz + 83f4db70: d007f7d3 fcvt.s.w fa5,a5 + 83f4db74: 2501 sext.w a0,a0 + 83f4db76: c0079653 fcvt.w.s a2,fa5,rtz + 83f4db7a: 2601 sext.w a2,a2 + 83f4db7c: 24c000ef jal ra,83f4ddc8 + 83f4db80: d00577d3 fcvt.s.w fa5,a0 + 83f4db84: 00f92a27 fsw fa5,20(s2) + 83f4db88: f52a1be3 bne s4,s2,83f4dade + 83f4db8c: 01442707 flw fa4,20(s0) + 83f4db90: 01042507 flw fa0,16(s0) + 83f4db94: 00442787 flw fa5,4(s0) + 83f4db98: 00842607 flw fa2,8(s0) + 83f4db9c: 08a775d3 fsub.s fa1,fa4,fa0 + 83f4dba0: 00c42687 flw fa3,12(s0) + 83f4dba4: a0e517d3 flt.s a5,fa0,fa4 + 83f4dba8: 60b7f7c3 fmadd.s fa5,fa5,fa1,fa2 + 83f4dbac: 08d7f7d3 fsub.s fa5,fa5,fa3 + 83f4dbb0: 02f42427 fsw fa5,40(s0) + 83f4dbb4: e399 bnez a5,83f4dbba + 83f4dbb6: 20e70553 fmv.s fa0,fa4 + 83f4dbba: 42050553 fcvt.d.s fa0,fa0 + 83f4dbbe: ee3f20ef jal ra,83f40aa0 + 83f4dbc2: 02442787 flw fa5,36(s0) + 83f4dbc6: c20517d3 fcvt.w.d a5,fa0,rtz + 83f4dbca: 42078553 fcvt.d.s fa0,fa5 + 83f4dbce: dc5c sw a5,60(s0) + 83f4dbd0: ed1f20ef jal ra,83f40aa0 + 83f4dbd4: c20517d3 fcvt.w.d a5,fa0,rtz + 83f4dbd8: dc1c sw a5,56(s0) + 83f4dbda: 60ea ld ra,152(sp) + 83f4dbdc: 644a ld s0,144(sp) + 83f4dbde: 64aa ld s1,136(sp) + 83f4dbe0: 690a ld s2,128(sp) + 83f4dbe2: 79e6 ld s3,120(sp) + 83f4dbe4: 7a46 ld s4,112(sp) + 83f4dbe6: 7aa6 ld s5,104(sp) + 83f4dbe8: 7b06 ld s6,96(sp) + 83f4dbea: 6be6 ld s7,88(sp) + 83f4dbec: 6c46 ld s8,80(sp) + 83f4dbee: 6ca6 ld s9,72(sp) + 83f4dbf0: 3462 fld fs0,56(sp) + 83f4dbf2: 34c2 fld fs1,48(sp) + 83f4dbf4: 3922 fld fs2,40(sp) + 83f4dbf6: 3982 fld fs3,32(sp) + 83f4dbf8: 2a62 fld fs4,24(sp) + 83f4dbfa: 2ac2 fld fs5,16(sp) + 83f4dbfc: 2b22 fld fs6,8(sp) + 83f4dbfe: 2b82 fld fs7,0(sp) + 83f4dc00: 610d addi sp,sp,160 + 83f4dc02: 8082 ret + 83f4dc04: 864e mv a2,s3 + 83f4dc06: 0d3ac263 blt s5,s3,83f4dcca + 83f4dc0a: 401b569b sraiw a3,s6,0x1 + 83f4dc0e: 0006079b sext.w a5,a2 + 83f4dc12: 874e mv a4,s3 + 83f4dc14: 9e15 subw a2,a2,a3 + 83f4dc16: 40d906bb subw a3,s2,a3 + 83f4dc1a: 0b59c663 blt s3,s5,83f4dcc6 + 83f4dc1e: 9f1d subw a4,a4,a5 + 83f4dc20: 0167073b addw a4,a4,s6 + 83f4dc24: 87da mv a5,s6 + 83f4dc26: 85a6 mv a1,s1 + 83f4dc28: 00440513 addi a0,s0,4 + 83f4dc2c: 00042023 sw zero,0(s0) + 83f4dc30: 03742823 sw s7,48(s0) + 83f4dc34: d2dff0ef jal ra,83f4d960 + 83f4dc38: 02000613 li a2,32 + 83f4dc3c: 4585 li a1,1 + 83f4dc3e: 855a mv a0,s6 + 83f4dc40: 188000ef jal ra,83f4ddc8 + 83f4dc44: 445c lw a5,12(s0) + 83f4dc46: 4818 lw a4,16(s0) + 83f4dc48: 0007869b sext.w a3,a5 + 83f4dc4c: 00d75363 bge a4,a3,83f4dc52 + 83f4dc50: 87ba mv a5,a4 + 83f4dc52: 4017d69b sraiw a3,a5,0x1 + 83f4dc56: 87b6 mv a5,a3 + 83f4dc58: 00d04363 bgtz a3,83f4dc5e + 83f4dc5c: 4785 li a5,1 + 83f4dc5e: fff7869b addiw a3,a5,-1 + 83f4dc62: 87b6 mv a5,a3 + 83f4dc64: 00d55363 bge a0,a3,83f4dc6a + 83f4dc68: 87aa mv a5,a0 + 83f4dc6a: 4414 lw a3,8(s0) + 83f4dc6c: c85c sw a5,20(s0) + 83f4dc6e: 9f35 addw a4,a4,a3 + 83f4dc70: dc18 sw a4,56(s0) + 83f4dc72: dc54 sw a3,60(s0) + 83f4dc74: b79d j 83f4dbda + 83f4dc76: 4015571b sraiw a4,a0,0x1 + 83f4dc7a: 40e9863b subw a2,s3,a4 + 83f4dc7e: 86ca mv a3,s2 + 83f4dc80: 052a4163 blt s4,s2,83f4dcc2 + 83f4dc84: 0006859b sext.w a1,a3 + 83f4dc88: 87da mv a5,s6 + 83f4dc8a: 9e99 subw a3,a3,a4 + 83f4dc8c: 875a mv a4,s6 + 83f4dc8e: f9490ce3 beq s2,s4,83f4dc26 + 83f4dc92: 87ca mv a5,s2 + 83f4dc94: 03494163 blt s2,s4,83f4dcb6 + 83f4dc98: 9f8d subw a5,a5,a1 + 83f4dc9a: 016787bb addw a5,a5,s6 + 83f4dc9e: 875a mv a4,s6 + 83f4dca0: b759 j 83f4dc26 + 83f4dca2: 0929f7d3 fsub.s fa5,fs3,fs2 + 83f4dca6: 217b8953 fmv.s fs2,fs7 + 83f4dcaa: bdb9 j 83f4db08 + 83f4dcac: 00004697 auipc a3,0x4 + 83f4dcb0: 7d46a787 flw fa5,2004(a3) # 83f52480 <__func__.1+0x288> + 83f4dcb4: bbe1 j 83f4da8c + 83f4dcb6: 87d2 mv a5,s4 + 83f4dcb8: 9f8d subw a5,a5,a1 + 83f4dcba: 016787bb addw a5,a5,s6 + 83f4dcbe: 875a mv a4,s6 + 83f4dcc0: b79d j 83f4dc26 + 83f4dcc2: 86d2 mv a3,s4 + 83f4dcc4: b7c1 j 83f4dc84 + 83f4dcc6: 8756 mv a4,s5 + 83f4dcc8: bf99 j 83f4dc1e + 83f4dcca: 8656 mv a2,s5 + 83f4dccc: 401b569b sraiw a3,s6,0x1 + 83f4dcd0: 0006079b sext.w a5,a2 + 83f4dcd4: 874e mv a4,s3 + 83f4dcd6: 9e15 subw a2,a2,a3 + 83f4dcd8: 40d906bb subw a3,s2,a3 + 83f4dcdc: f559d1e3 bge s3,s5,83f4dc1e + 83f4dce0: b7dd j 83f4dcc6 + +0000000083f4dce2 : + 83f4dce2: 1101 addi sp,sp,-32 + 83f4dce4: 007c addi a5,sp,12 + 83f4dce6: 4701 li a4,0 + 83f4dce8: 4681 li a3,0 + 83f4dcea: ec06 sd ra,24(sp) + 83f4dcec: c602 sw zero,12(sp) + 83f4dcee: abfff0ef jal ra,83f4d7ac + 83f4dcf2: 47b2 lw a5,12(sp) + 83f4dcf4: 60e2 ld ra,24(sp) + 83f4dcf6: 6505 lui a0,0x1 + 83f4dcf8: 9d3d addw a0,a0,a5 + 83f4dcfa: 9941 andi a0,a0,-16 + 83f4dcfc: 2501 sext.w a0,a0 + 83f4dcfe: 6105 addi sp,sp,32 + 83f4dd00: 8082 ret + +0000000083f4dd02 : + 83f4dd02: aabff06f j 83f4d7ac + +0000000083f4dd06 : + 83f4dd06: 1141 addi sp,sp,-16 + 83f4dd08: e406 sd ra,8(sp) + 83f4dd0a: e022 sd s0,0(sp) + 83f4dd0c: 8332 mv t1,a2 + 83f4dd0e: 842e mv s0,a1 + 83f4dd10: 0018c893 xori a7,a7,1 + 83f4dd14: 85aa mv a1,a0 + 83f4dd16: 8636 mv a2,a3 + 83f4dd18: 00440513 addi a0,s0,4 + 83f4dd1c: 86ba mv a3,a4 + 83f4dd1e: 01142023 sw a7,0(s0) + 83f4dd22: 873e mv a4,a5 + 83f4dd24: 02642823 sw t1,48(s0) + 83f4dd28: 87c2 mv a5,a6 + 83f4dd2a: c37ff0ef jal ra,83f4d960 + 83f4dd2e: 4542 lw a0,16(sp) + 83f4dd30: 02000613 li a2,32 + 83f4dd34: 4585 li a1,1 + 83f4dd36: 092000ef jal ra,83f4ddc8 + 83f4dd3a: 445c lw a5,12(s0) + 83f4dd3c: 4818 lw a4,16(s0) + 83f4dd3e: 0007869b sext.w a3,a5 + 83f4dd42: 00d75363 bge a4,a3,83f4dd48 + 83f4dd46: 87ba mv a5,a4 + 83f4dd48: 4017d69b sraiw a3,a5,0x1 + 83f4dd4c: 87b6 mv a5,a3 + 83f4dd4e: 00d04363 bgtz a3,83f4dd54 + 83f4dd52: 4785 li a5,1 + 83f4dd54: fff7869b addiw a3,a5,-1 + 83f4dd58: 87b6 mv a5,a3 + 83f4dd5a: 00d55363 bge a0,a3,83f4dd60 + 83f4dd5e: 87aa mv a5,a0 + 83f4dd60: 4414 lw a3,8(s0) + 83f4dd62: c85c sw a5,20(s0) + 83f4dd64: 9f35 addw a4,a4,a3 + 83f4dd66: dc18 sw a4,56(s0) + 83f4dd68: dc54 sw a3,60(s0) + 83f4dd6a: 60a2 ld ra,8(sp) + 83f4dd6c: 6402 ld s0,0(sp) + 83f4dd6e: 0141 addi sp,sp,16 + 83f4dd70: 8082 ret + +0000000083f4dd72 : + 83f4dd72: 1101 addi sp,sp,-32 + 83f4dd74: e822 sd s0,16(sp) + 83f4dd76: e426 sd s1,8(sp) + 83f4dd78: ec06 sd ra,24(sp) + 83f4dd7a: 842e mv s0,a1 + 83f4dd7c: 84b2 mv s1,a2 + 83f4dd7e: 85aa mv a1,a0 + 83f4dd80: 8636 mv a2,a3 + 83f4dd82: 86ba mv a3,a4 + 83f4dd84: 873e mv a4,a5 + 83f4dd86: 87c2 mv a5,a6 + 83f4dd88: 02088763 beqz a7,83f4ddb6 + 83f4dd8c: 0018151b slliw a0,a6,0x1 + 83f4dd90: 4811 li a6,4 + 83f4dd92: 01042023 sw a6,0(s0) + 83f4dd96: cc08 sw a0,24(s0) + 83f4dd98: 00440513 addi a0,s0,4 + 83f4dd9c: bc5ff0ef jal ra,83f4d960 + 83f4dda0: 4418 lw a4,8(s0) + 83f4dda2: 481c lw a5,16(s0) + 83f4dda4: f804 sd s1,48(s0) + 83f4dda6: dc58 sw a4,60(s0) + 83f4dda8: 9fb9 addw a5,a5,a4 + 83f4ddaa: dc1c sw a5,56(s0) + 83f4ddac: 60e2 ld ra,24(sp) + 83f4ddae: 6442 ld s0,16(sp) + 83f4ddb0: 64a2 ld s1,8(sp) + 83f4ddb2: 6105 addi sp,sp,32 + 83f4ddb4: 8082 ret + 83f4ddb6: 4509 li a0,2 + 83f4ddb8: c008 sw a0,0(s0) + 83f4ddba: cc18 sw a4,24(s0) + 83f4ddbc: bff1 j 83f4dd98 + +0000000083f4ddbe : + 83f4ddbe: 832a mv t1,a0 + 83f4ddc0: 852e mv a0,a1 + 83f4ddc2: 859a mv a1,t1 + 83f4ddc4: c05ff06f j 83f4d9c8 + +0000000083f4ddc8 : + 83f4ddc8: 87aa mv a5,a0 + 83f4ddca: 8532 mv a0,a2 + 83f4ddcc: 00f64763 blt a2,a5,83f4ddda + 83f4ddd0: 863e mv a2,a5 + 83f4ddd2: 00b7c563 blt a5,a1,83f4dddc + 83f4ddd6: 0006051b sext.w a0,a2 + 83f4ddda: 8082 ret + 83f4dddc: 862e mv a2,a1 + 83f4ddde: 0006051b sext.w a0,a2 + 83f4dde2: bfe5 j 83f4ddda + +0000000083f4dde4 : + 83f4dde4: 87aa mv a5,a0 + 83f4dde6: 4705 li a4,1 + 83f4dde8: 0007a423 sw zero,8(a5) + 83f4ddec: e38c sd a1,0(a5) + 83f4ddee: c7d0 sw a2,12(a5) + 83f4ddf0: cb98 sw a4,16(a5) + 83f4ddf2: 852e mv a0,a1 + 83f4ddf4: c291 beqz a3,83f4ddf8 + 83f4ddf6: 8082 ret + 83f4ddf8: 4581 li a1,0 + 83f4ddfa: 982fe06f j 83f4bf7c + +0000000083f4ddfe : + 83f4ddfe: 451c lw a5,8(a0) + 83f4de00: 4558 lw a4,12(a0) + 83f4de02: 00c786bb addw a3,a5,a2 + 83f4de06: 0037171b slliw a4,a4,0x3 + 83f4de0a: 8336 mv t1,a3 + 83f4de0c: 06e6d863 bge a3,a4,83f4de7c + 83f4de10: 471d li a4,7 + 83f4de12: 06c75a63 bge a4,a2,83f4de86 + 83f4de16: ff86081b addiw a6,a2,-8 + 83f4de1a: 00385e1b srliw t3,a6,0x3 + 83f4de1e: 001e089b addiw a7,t3,1 + 83f4de22: 98ae add a7,a7,a1 + 83f4de24: 6114 ld a3,0(a0) + 83f4de26: 4037d613 srai a2,a5,0x3 + 83f4de2a: 0005c703 lbu a4,0(a1) + 83f4de2e: 96b2 add a3,a3,a2 + 83f4de30: 0006d603 lhu a2,0(a3) + 83f4de34: 8b9d andi a5,a5,7 + 83f4de36: 00f717bb sllw a5,a4,a5 + 83f4de3a: 8fd1 or a5,a5,a2 + 83f4de3c: 00f69023 sh a5,0(a3) + 83f4de40: 451c lw a5,8(a0) + 83f4de42: 0585 addi a1,a1,1 + 83f4de44: 27a1 addiw a5,a5,8 + 83f4de46: c51c sw a5,8(a0) + 83f4de48: fcb89ee3 bne a7,a1,83f4de24 + 83f4de4c: 003e161b slliw a2,t3,0x3 + 83f4de50: 40c8063b subw a2,a6,a2 + 83f4de54: 02c05663 blez a2,83f4de80 + 83f4de58: 4514 lw a3,8(a0) + 83f4de5a: 6118 ld a4,0(a0) + 83f4de5c: 0008c783 lbu a5,0(a7) + 83f4de60: 4036d613 srai a2,a3,0x3 + 83f4de64: 9732 add a4,a4,a2 + 83f4de66: 00075603 lhu a2,0(a4) + 83f4de6a: 8a9d andi a3,a3,7 + 83f4de6c: 00d797bb sllw a5,a5,a3 + 83f4de70: 8fd1 or a5,a5,a2 + 83f4de72: 00f71023 sh a5,0(a4) + 83f4de76: 00652423 sw t1,8(a0) # 1008 <_EL1_STACK_SIZE+0x808> + 83f4de7a: 8082 ret + 83f4de7c: 57fd li a5,-1 + 83f4de7e: c91c sw a5,16(a0) + 83f4de80: 00652423 sw t1,8(a0) + 83f4de84: 8082 ret + 83f4de86: 88ae mv a7,a1 + 83f4de88: b7f1 j 83f4de54 + +0000000083f4de8a : + 83f4de8a: 87aa mv a5,a0 + 83f4de8c: 4501 li a0,0 + 83f4de8e: e199 bnez a1,83f4de94 + 83f4de90: 4388 lw a0,0(a5) + 83f4de92: 8082 ret + 83f4de94: 4715 li a4,5 + 83f4de96: 00e58a63 beq a1,a4,83f4deaa + 83f4de9a: 4711 li a4,4 + 83f4de9c: 04e58763 beq a1,a4,83f4deea + 83f4dea0: 99f5 andi a1,a1,-3 + 83f4dea2: 4721 li a4,8 + 83f4dea4: 02e58e63 beq a1,a4,83f4dee0 + 83f4dea8: 8082 ret + 83f4deaa: 0007d703 lhu a4,0(a5) + 83f4deae: 0007d683 lhu a3,0(a5) + 83f4deb2: 00a7551b srliw a0,a4,0xa + 83f4deb6: 0057579b srliw a5,a4,0x5 + 83f4deba: 897d andi a0,a0,31 + 83f4debc: 8afd andi a3,a3,31 + 83f4debe: 8bfd andi a5,a5,31 + 83f4dec0: 0105151b slliw a0,a0,0x10 + 83f4dec4: 0087979b slliw a5,a5,0x8 + 83f4dec8: 8d55 or a0,a0,a3 + 83f4deca: 8d5d or a0,a0,a5 + 83f4decc: 010007b7 lui a5,0x1000 + 83f4ded0: 17fd addi a5,a5,-1 + 83f4ded2: 00f7571b srliw a4,a4,0xf + 83f4ded6: 0187171b slliw a4,a4,0x18 + 83f4deda: 8d7d and a0,a0,a5 + 83f4dedc: 8d59 or a0,a0,a4 + 83f4dede: 8082 ret + 83f4dee0: 0007c503 lbu a0,0(a5) # 1000000 + 83f4dee4: 0185151b slliw a0,a0,0x18 + 83f4dee8: 8082 ret + 83f4deea: 0007d703 lhu a4,0(a5) + 83f4deee: 0007d683 lhu a3,0(a5) + 83f4def2: 0087551b srliw a0,a4,0x8 + 83f4def6: 0047579b srliw a5,a4,0x4 + 83f4defa: 893d andi a0,a0,15 + 83f4defc: 8abd andi a3,a3,15 + 83f4defe: 8bbd andi a5,a5,15 + 83f4df00: 0105151b slliw a0,a0,0x10 + 83f4df04: 0087979b slliw a5,a5,0x8 + 83f4df08: 8d55 or a0,a0,a3 + 83f4df0a: 8d5d or a0,a0,a5 + 83f4df0c: 010007b7 lui a5,0x1000 + 83f4df10: 17fd addi a5,a5,-1 + 83f4df12: 00c7571b srliw a4,a4,0xc + 83f4df16: 0187171b slliw a4,a4,0x18 + 83f4df1a: 8d7d and a0,a0,a5 + 83f4df1c: 8d59 or a0,a0,a4 + 83f4df1e: 8082 ret + +0000000083f4df20 : + 83f4df20: 10000e13 li t3,256 + 83f4df24: 02be4e3b divw t3,t3,a1 + 83f4df28: 06b05363 blez a1,83f4df8e + 83f4df2c: 00259313 slli t1,a1,0x2 + 83f4df30: 4781 li a5,0 + 83f4df32: 4581 li a1,0 + 83f4df34: 0ff00e93 li t4,255 + 83f4df38: 0107969b slliw a3,a5,0x10 + 83f4df3c: 0187971b slliw a4,a5,0x18 + 83f4df40: 8f55 or a4,a4,a3 + 83f4df42: 0087961b slliw a2,a5,0x8 + 83f4df46: 6114 ld a3,0(a0) + 83f4df48: 8f5d or a4,a4,a5 + 83f4df4a: 8f51 or a4,a4,a2 + 83f4df4c: 0007061b sext.w a2,a4 + 83f4df50: 96ae add a3,a3,a1 + 83f4df52: 00865893 srli a7,a2,0x8 + 83f4df56: 01065813 srli a6,a2,0x10 + 83f4df5a: 8261 srli a2,a2,0x18 + 83f4df5c: 00e68023 sb a4,0(a3) + 83f4df60: 011680a3 sb a7,1(a3) + 83f4df64: 01068123 sb a6,2(a3) + 83f4df68: 00c681a3 sb a2,3(a3) + 83f4df6c: 4518 lw a4,8(a0) + 83f4df6e: 01c786bb addw a3,a5,t3 + 83f4df72: 87b6 mv a5,a3 + 83f4df74: 2705 addiw a4,a4,1 + 83f4df76: c518 sw a4,8(a0) + 83f4df78: 0591 addi a1,a1,4 + 83f4df7a: 0006cb63 bltz a3,83f4df90 + 83f4df7e: 00ded463 bge t4,a3,83f4df86 + 83f4df82: 0ff00793 li a5,255 + 83f4df86: 0ff7f793 andi a5,a5,255 + 83f4df8a: fab317e3 bne t1,a1,83f4df38 + 83f4df8e: 8082 ret + 83f4df90: 4781 li a5,0 + 83f4df92: 4681 li a3,0 + 83f4df94: b7ed j 83f4df7e + +0000000083f4df96 : + 83f4df96: 4514 lw a3,8(a0) + 83f4df98: 611c ld a5,0(a0) + 83f4df9a: 88aa mv a7,a0 + 83f4df9c: 0005831b sext.w t1,a1 + 83f4dfa0: 04d05863 blez a3,83f4dff0 + 83f4dfa4: 873e mv a4,a5 + 83f4dfa6: 4501 li a0,0 + 83f4dfa8: a021 j 83f4dfb0 + 83f4dfaa: 2505 addiw a0,a0,1 + 83f4dfac: 04d50263 beq a0,a3,83f4dff0 + 83f4dfb0: 4310 lw a2,0(a4) + 83f4dfb2: 0711 addi a4,a4,4 + 83f4dfb4: 0006081b sext.w a6,a2 + 83f4dfb8: fe6819e3 bne a6,t1,83f4dfaa + 83f4dfbc: c52d beqz a0,83f4e026 + 83f4dfbe: fff5081b addiw a6,a0,-1 + 83f4dfc2: 1802 slli a6,a6,0x20 + 83f4dfc4: 02085813 srli a6,a6,0x20 + 83f4dfc8: 41050833 sub a6,a0,a6 + 83f4dfcc: 00251713 slli a4,a0,0x2 + 83f4dfd0: 080a slli a6,a6,0x2 + 83f4dfd2: a011 j 83f4dfd6 + 83f4dfd4: 8736 mv a4,a3 + 83f4dfd6: ffc70693 addi a3,a4,-4 + 83f4dfda: 00d785b3 add a1,a5,a3 + 83f4dfde: 418c lw a1,0(a1) + 83f4dfe0: 97ba add a5,a5,a4 + 83f4dfe2: c38c sw a1,0(a5) + 83f4dfe4: 0008b783 ld a5,0(a7) + 83f4dfe8: fee816e3 bne a6,a4,83f4dfd4 + 83f4dfec: c390 sw a2,0(a5) + 83f4dfee: 8082 ret + 83f4dff0: fff6861b addiw a2,a3,-1 + 83f4dff4: 02c05763 blez a2,83f4e022 + 83f4dff8: ffe6871b addiw a4,a3,-2 + 83f4dffc: 1702 slli a4,a4,0x20 + 83f4dffe: 9301 srli a4,a4,0x20 + 83f4e000: 40e68733 sub a4,a3,a4 + 83f4e004: 070a slli a4,a4,0x2 + 83f4e006: 060a slli a2,a2,0x2 + 83f4e008: 1761 addi a4,a4,-8 + 83f4e00a: ffc60693 addi a3,a2,-4 + 83f4e00e: 00d78533 add a0,a5,a3 + 83f4e012: 4108 lw a0,0(a0) + 83f4e014: 97b2 add a5,a5,a2 + 83f4e016: 8636 mv a2,a3 + 83f4e018: c388 sw a0,0(a5) + 83f4e01a: 0008b783 ld a5,0(a7) + 83f4e01e: fed716e3 bne a4,a3,83f4e00a + 83f4e022: c38c sw a1,0(a5) + 83f4e024: 557d li a0,-1 + 83f4e026: 8082 ret + +0000000083f4e028 : + 83f4e028: 7179 addi sp,sp,-48 + 83f4e02a: f406 sd ra,40(sp) + 83f4e02c: c42e sw a1,8(sp) + 83f4e02e: c205 beqz a2,83f4e04e + 83f4e030: 4715 li a4,5 + 83f4e032: 06e60b63 beq a2,a4,83f4e0a8 + 83f4e036: 4711 li a4,4 + 83f4e038: 02e60363 beq a2,a4,83f4e05e + 83f4e03c: 4721 li a4,8 + 83f4e03e: 04e60e63 beq a2,a4,83f4e09a + 83f4e042: 4729 li a4,10 + 83f4e044: 04e60a63 beq a2,a4,83f4e098 + 83f4e048: 70a2 ld ra,40(sp) + 83f4e04a: 6145 addi sp,sp,48 + 83f4e04c: 8082 ret + 83f4e04e: 002c addi a1,sp,8 + 83f4e050: 02000613 li a2,32 + 83f4e054: dabff0ef jal ra,83f4ddfe + 83f4e058: 70a2 ld ra,40(sp) + 83f4e05a: 6145 addi sp,sp,48 + 83f4e05c: 8082 ret + 83f4e05e: 00914683 lbu a3,9(sp) + 83f4e062: 00814783 lbu a5,8(sp) + 83f4e066: 00a14703 lbu a4,10(sp) + 83f4e06a: 00b14603 lbu a2,11(sp) + 83f4e06e: 8abd andi a3,a3,15 + 83f4e070: 0046969b slliw a3,a3,0x4 + 83f4e074: 8bbd andi a5,a5,15 + 83f4e076: 8b3d andi a4,a4,15 + 83f4e078: 0087171b slliw a4,a4,0x8 + 83f4e07c: 8fd5 or a5,a5,a3 + 83f4e07e: 8fd9 or a5,a5,a4 + 83f4e080: 00c6171b slliw a4,a2,0xc + 83f4e084: 8fd9 or a5,a5,a4 + 83f4e086: 082c addi a1,sp,24 + 83f4e088: 4641 li a2,16 + 83f4e08a: 00f11c23 sh a5,24(sp) + 83f4e08e: d71ff0ef jal ra,83f4ddfe + 83f4e092: 70a2 ld ra,40(sp) + 83f4e094: 6145 addi sp,sp,48 + 83f4e096: 8082 ret + 83f4e098: 4611 li a2,4 + 83f4e09a: 00b10593 addi a1,sp,11 + 83f4e09e: d61ff0ef jal ra,83f4ddfe + 83f4e0a2: 70a2 ld ra,40(sp) + 83f4e0a4: 6145 addi sp,sp,48 + 83f4e0a6: 8082 ret + 83f4e0a8: 00914683 lbu a3,9(sp) + 83f4e0ac: 00814783 lbu a5,8(sp) + 83f4e0b0: 00a14703 lbu a4,10(sp) + 83f4e0b4: 00b14603 lbu a2,11(sp) + 83f4e0b8: 8afd andi a3,a3,31 + 83f4e0ba: 0056969b slliw a3,a3,0x5 + 83f4e0be: 8bfd andi a5,a5,31 + 83f4e0c0: 8b7d andi a4,a4,31 + 83f4e0c2: 00a7171b slliw a4,a4,0xa + 83f4e0c6: 8fd5 or a5,a5,a3 + 83f4e0c8: 8fd9 or a5,a5,a4 + 83f4e0ca: 00f6171b slliw a4,a2,0xf + 83f4e0ce: bf5d j 83f4e084 + +0000000083f4e0d0 : + 83f4e0d0: 01474783 lbu a5,20(a4) + 83f4e0d4: 7139 addi sp,sp,-64 + 83f4e0d6: f822 sd s0,48(sp) + 83f4e0d8: f426 sd s1,40(sp) + 83f4e0da: f04a sd s2,32(sp) + 83f4e0dc: ec4e sd s3,24(sp) + 83f4e0de: fc06 sd ra,56(sp) + 83f4e0e0: e852 sd s4,16(sp) + 83f4e0e2: 84ba mv s1,a4 + 83f4e0e4: 89aa mv s3,a0 + 83f4e0e6: 8432 mv s0,a2 + 83f4e0e8: 8936 mv s2,a3 + 83f4e0ea: cbbd beqz a5,83f4e160 + 83f4e0ec: 4785 li a5,1 + 83f4e0ee: 02f58f63 beq a1,a5,83f4e12c + 83f4e0f2: edb9 bnez a1,83f4e150 + 83f4e0f4: 0cc7da63 bge a5,a2,83f4e1c8 + 83f4e0f8: 4f10 lw a2,24(a4) + 83f4e0fa: fff4079b addiw a5,s0,-1 + 83f4e0fe: 0037979b slliw a5,a5,0x3 + 83f4e102: 0047e793 ori a5,a5,4 + 83f4e106: 260d addiw a2,a2,3 + 83f4e108: 00e10593 addi a1,sp,14 + 83f4e10c: 00f11723 sh a5,14(sp) + 83f4e110: cefff0ef jal ra,83f4ddfe + 83f4e114: 7442 ld s0,48(sp) + 83f4e116: 5090 lw a2,32(s1) + 83f4e118: 70e2 ld ra,56(sp) + 83f4e11a: 74a2 ld s1,40(sp) + 83f4e11c: 6a42 ld s4,16(sp) + 83f4e11e: 85ca mv a1,s2 + 83f4e120: 854e mv a0,s3 + 83f4e122: 7902 ld s2,32(sp) + 83f4e124: 69e2 ld s3,24(sp) + 83f4e126: 6121 addi sp,sp,64 + 83f4e128: f01ff06f j 83f4e028 + 83f4e12c: 4f50 lw a2,28(a4) + 83f4e12e: 0885d163 bge a1,s0,83f4e1b0 + 83f4e132: 4f1c lw a5,24(a4) + 83f4e134: 347d addiw s0,s0,-1 + 83f4e136: 0034141b slliw s0,s0,0x3 + 83f4e13a: 278d addiw a5,a5,3 + 83f4e13c: 00f696bb sllw a3,a3,a5 + 83f4e140: 8c55 or s0,s0,a3 + 83f4e142: 9e3d addw a2,a2,a5 + 83f4e144: 00e10593 addi a1,sp,14 + 83f4e148: 00811723 sh s0,14(sp) + 83f4e14c: cb3ff0ef jal ra,83f4ddfe + 83f4e150: 70e2 ld ra,56(sp) + 83f4e152: 7442 ld s0,48(sp) + 83f4e154: 74a2 ld s1,40(sp) + 83f4e156: 7902 ld s2,32(sp) + 83f4e158: 69e2 ld s3,24(sp) + 83f4e15a: 6a42 ld s4,16(sp) + 83f4e15c: 6121 addi sp,sp,64 + 83f4e15e: 8082 ret + 83f4e160: 00262793 slti a5,a2,2 + 83f4e164: 4a05 li s4,1 + 83f4e166: 4605 li a2,1 + 83f4e168: 00d10593 addi a1,sp,13 + 83f4e16c: 00f106a3 sb a5,13(sp) + 83f4e170: c8fff0ef jal ra,83f4ddfe + 83f4e174: 008a4f63 blt s4,s0,83f4e192 + 83f4e178: 5090 lw a2,32(s1) + 83f4e17a: 85ca mv a1,s2 + 83f4e17c: 854e mv a0,s3 + 83f4e17e: eabff0ef jal ra,83f4e028 + 83f4e182: 70e2 ld ra,56(sp) + 83f4e184: 7442 ld s0,48(sp) + 83f4e186: 74a2 ld s1,40(sp) + 83f4e188: 7902 ld s2,32(sp) + 83f4e18a: 69e2 ld s3,24(sp) + 83f4e18c: 6a42 ld s4,16(sp) + 83f4e18e: 6121 addi sp,sp,64 + 83f4e190: 8082 ret + 83f4e192: 4c90 lw a2,24(s1) + 83f4e194: 00e10593 addi a1,sp,14 + 83f4e198: 854e mv a0,s3 + 83f4e19a: 347d addiw s0,s0,-1 + 83f4e19c: 00810723 sb s0,14(sp) + 83f4e1a0: c5fff0ef jal ra,83f4ddfe + 83f4e1a4: 5090 lw a2,32(s1) + 83f4e1a6: 85ca mv a1,s2 + 83f4e1a8: 854e mv a0,s3 + 83f4e1aa: e7fff0ef jal ra,83f4e028 + 83f4e1ae: bfd1 j 83f4e182 + 83f4e1b0: 0026969b slliw a3,a3,0x2 + 83f4e1b4: 0026e693 ori a3,a3,2 + 83f4e1b8: 2609 addiw a2,a2,2 + 83f4e1ba: 00e10593 addi a1,sp,14 + 83f4e1be: 00d11723 sh a3,14(sp) + 83f4e1c2: c3dff0ef jal ra,83f4ddfe + 83f4e1c6: b769 j 83f4e150 + 83f4e1c8: 4605 li a2,1 + 83f4e1ca: 00e10593 addi a1,sp,14 + 83f4e1ce: 00f10723 sb a5,14(sp) + 83f4e1d2: c2dff0ef jal ra,83f4ddfe + 83f4e1d6: bf3d j 83f4e114 + +0000000083f4e1d8 : + 83f4e1d8: 7139 addi sp,sp,-64 + 83f4e1da: f822 sd s0,48(sp) + 83f4e1dc: fc06 sd ra,56(sp) + 83f4e1de: 4198 lw a4,0(a1) + 83f4e1e0: 41dc lw a5,4(a1) + 83f4e1e2: 4685 li a3,1 + 83f4e1e4: 377d addiw a4,a4,-1 + 83f4e1e6: 37fd addiw a5,a5,-1 + 83f4e1e8: 02369813 slli a6,a3,0x23 + 83f4e1ec: 4621 li a2,8 + 83f4e1ee: 842e mv s0,a1 + 83f4e1f0: 4581 li a1,0 + 83f4e1f2: e03a sd a4,0(sp) + 83f4e1f4: e43e sd a5,8(sp) + 83f4e1f6: d436 sw a3,40(sp) + 83f4e1f8: ec2a sd a0,24(sp) + 83f4e1fa: f042 sd a6,32(sp) + 83f4e1fc: d81fd0ef jal ra,83f4bf7c + 83f4e200: 5792 lw a5,36(sp) + 83f4e202: 5702 lw a4,32(sp) + 83f4e204: 0037961b slliw a2,a5,0x3 + 83f4e208: 0087069b addiw a3,a4,8 + 83f4e20c: 87b2 mv a5,a2 + 83f4e20e: 00c6d363 bge a3,a2,83f4e214 + 83f4e212: 87b6 mv a5,a3 + 83f4e214: 4611 li a2,4 + 83f4e216: 02040593 addi a1,s0,32 + 83f4e21a: 0828 addi a0,sp,24 + 83f4e21c: d03e sw a5,32(sp) + 83f4e21e: be1ff0ef jal ra,83f4ddfe + 83f4e222: 5792 lw a5,36(sp) + 83f4e224: 5702 lw a4,32(sp) + 83f4e226: 0037961b slliw a2,a5,0x3 + 83f4e22a: 0037069b addiw a3,a4,3 + 83f4e22e: 87b2 mv a5,a2 + 83f4e230: 00c6d363 bge a3,a2,83f4e236 + 83f4e234: 87b6 mv a5,a3 + 83f4e236: 4c54 lw a3,28(s0) + 83f4e238: 4705 li a4,1 + 83f4e23a: 4621 li a2,8 + 83f4e23c: 00d7173b sllw a4,a4,a3 + 83f4e240: 080c addi a1,sp,16 + 83f4e242: 0828 addi a0,sp,24 + 83f4e244: d03e sw a5,32(sp) + 83f4e246: e83a sd a4,16(sp) + 83f4e248: bb7ff0ef jal ra,83f4ddfe + 83f4e24c: 4609 li a2,2 + 83f4e24e: 01040593 addi a1,s0,16 + 83f4e252: 0828 addi a0,sp,24 + 83f4e254: babff0ef jal ra,83f4ddfe + 83f4e258: 5792 lw a5,36(sp) + 83f4e25a: 5702 lw a4,32(sp) + 83f4e25c: 0037961b slliw a2,a5,0x3 + 83f4e260: 0027069b addiw a3,a4,2 + 83f4e264: 87b2 mv a5,a2 + 83f4e266: 00c6d363 bge a3,a2,83f4e26c + 83f4e26a: 87b6 mv a5,a3 + 83f4e26c: 4609 li a2,2 + 83f4e26e: 00c40593 addi a1,s0,12 + 83f4e272: 0828 addi a0,sp,24 + 83f4e274: d03e sw a5,32(sp) + 83f4e276: b89ff0ef jal ra,83f4ddfe + 83f4e27a: 5792 lw a5,36(sp) + 83f4e27c: 5702 lw a4,32(sp) + 83f4e27e: 0037961b slliw a2,a5,0x3 + 83f4e282: 0027069b addiw a3,a4,2 + 83f4e286: 87b2 mv a5,a2 + 83f4e288: 00c6d363 bge a3,a2,83f4e28e + 83f4e28c: 87b6 mv a5,a3 + 83f4e28e: 858a mv a1,sp + 83f4e290: 0828 addi a0,sp,24 + 83f4e292: 4641 li a2,16 + 83f4e294: d03e sw a5,32(sp) + 83f4e296: b69ff0ef jal ra,83f4ddfe + 83f4e29a: 002c addi a1,sp,8 + 83f4e29c: 0828 addi a0,sp,24 + 83f4e29e: 4641 li a2,16 + 83f4e2a0: b5fff0ef jal ra,83f4ddfe + 83f4e2a4: 70e2 ld ra,56(sp) + 83f4e2a6: 7442 ld s0,48(sp) + 83f4e2a8: 6121 addi sp,sp,64 + 83f4e2aa: 8082 ret + +0000000083f4e2ac : + 83f4e2ac: 7139 addi sp,sp,-64 + 83f4e2ae: f822 sd s0,48(sp) + 83f4e2b0: f426 sd s1,40(sp) + 83f4e2b2: f04a sd s2,32(sp) + 83f4e2b4: ec4e sd s3,24(sp) + 83f4e2b6: e852 sd s4,16(sp) + 83f4e2b8: e456 sd s5,8(sp) + 83f4e2ba: e05a sd s6,0(sp) + 83f4e2bc: fc06 sd ra,56(sp) + 83f4e2be: 84b2 mv s1,a2 + 83f4e2c0: 89ae mv s3,a1 + 83f4e2c2: 4190 lw a2,0(a1) + 83f4e2c4: 8936 mv s2,a3 + 83f4e2c6: 408c lw a1,0(s1) + 83f4e2c8: 4294 lw a3,0(a3) + 83f4e2ca: 843a mv s0,a4 + 83f4e2cc: 8b2a mv s6,a0 + 83f4e2ce: 8742 mv a4,a6 + 83f4e2d0: 8546 mv a0,a7 + 83f4e2d2: 8abe mv s5,a5 + 83f4e2d4: 8a42 mv s4,a6 + 83f4e2d6: dfbff0ef jal ra,83f4e0d0 + 83f4e2da: 00045883 lhu a7,0(s0) + 83f4e2de: 03089793 slli a5,a7,0x30 + 83f4e2e2: 93c1 srli a5,a5,0x30 + 83f4e2e4: 00faf363 bgeu s5,a5,83f4e2ea + 83f4e2e8: 88d6 mv a7,s5 + 83f4e2ea: 18c2 slli a7,a7,0x30 + 83f4e2ec: 0308d893 srli a7,a7,0x30 + 83f4e2f0: 0119a023 sw a7,0(s3) + 83f4e2f4: 00045783 lhu a5,0(s0) + 83f4e2f8: 4705 li a4,1 + 83f4e2fa: 411788bb subw a7,a5,a7 + 83f4e2fe: 01141023 sh a7,0(s0) + 83f4e302: 409c lw a5,0(s1) + 83f4e304: 02e78863 beq a5,a4,83f4e334 + 83f4e308: 014a4783 lbu a5,20(s4) + 83f4e30c: ef99 bnez a5,83f4e32a + 83f4e30e: 01692023 sw s6,0(s2) + 83f4e312: 0004a023 sw zero,0(s1) + 83f4e316: 70e2 ld ra,56(sp) + 83f4e318: 7442 ld s0,48(sp) + 83f4e31a: 74a2 ld s1,40(sp) + 83f4e31c: 7902 ld s2,32(sp) + 83f4e31e: 69e2 ld s3,24(sp) + 83f4e320: 6a42 ld s4,16(sp) + 83f4e322: 6aa2 ld s5,8(sp) + 83f4e324: 6b02 ld s6,0(sp) + 83f4e326: 6121 addi sp,sp,64 + 83f4e328: 8082 ret + 83f4e32a: 00092023 sw zero,0(s2) + 83f4e32e: 4785 li a5,1 + 83f4e330: c09c sw a5,0(s1) + 83f4e332: b7d5 j 83f4e316 + 83f4e334: 00092783 lw a5,0(s2) + 83f4e338: dff9 beqz a5,83f4e316 + 83f4e33a: b7f9 j 83f4e308 + +0000000083f4e33c : + 83f4e33c: 715d addi sp,sp,-80 + 83f4e33e: e0a2 sd s0,64(sp) + 83f4e340: fc26 sd s1,56(sp) + 83f4e342: f84a sd s2,48(sp) + 83f4e344: f44e sd s3,40(sp) + 83f4e346: f052 sd s4,32(sp) + 83f4e348: ec56 sd s5,24(sp) + 83f4e34a: e85a sd s6,16(sp) + 83f4e34c: e45e sd s7,8(sp) + 83f4e34e: e062 sd s8,0(sp) + 83f4e350: e486 sd ra,72(sp) + 83f4e352: 0005a303 lw t1,0(a1) + 83f4e356: 892e mv s2,a1 + 83f4e358: 0005059b sext.w a1,a0 + 83f4e35c: 8bb2 mv s7,a2 + 83f4e35e: 6b46 ld s6,80(sp) + 83f4e360: 4210 lw a2,0(a2) + 83f4e362: 84ae mv s1,a1 + 83f4e364: 8a36 mv s4,a3 + 83f4e366: 8aba mv s5,a4 + 83f4e368: 843e mv s0,a5 + 83f4e36a: 89c6 mv s3,a7 + 83f4e36c: 00088c1b sext.w s8,a7 + 83f4e370: 00b31463 bne t1,a1,83f4e378 + 83f4e374: 06080263 beqz a6,83f4e3d8 + 83f4e378: 000aa683 lw a3,0(s5) + 83f4e37c: 000a2583 lw a1,0(s4) + 83f4e380: 6566 ld a0,88(sp) + 83f4e382: 875a mv a4,s6 + 83f4e384: d4dff0ef jal ra,83f4e0d0 + 83f4e388: 014b4783 lbu a5,20(s6) + 83f4e38c: ebad bnez a5,83f4e3fe + 83f4e38e: 009aa023 sw s1,0(s5) + 83f4e392: 000a2023 sw zero,0(s4) + 83f4e396: 00045783 lhu a5,0(s0) + 83f4e39a: 03079713 slli a4,a5,0x30 + 83f4e39e: 9341 srli a4,a4,0x30 + 83f4e3a0: 02ec6a63 bltu s8,a4,83f4e3d4 + 83f4e3a4: 17c2 slli a5,a5,0x30 + 83f4e3a6: 93c1 srli a5,a5,0x30 + 83f4e3a8: 00fba023 sw a5,0(s7) + 83f4e3ac: 00045703 lhu a4,0(s0) + 83f4e3b0: 40f707bb subw a5,a4,a5 + 83f4e3b4: 00f41023 sh a5,0(s0) + 83f4e3b8: 00992023 sw s1,0(s2) + 83f4e3bc: 60a6 ld ra,72(sp) + 83f4e3be: 6406 ld s0,64(sp) + 83f4e3c0: 74e2 ld s1,56(sp) + 83f4e3c2: 7942 ld s2,48(sp) + 83f4e3c4: 79a2 ld s3,40(sp) + 83f4e3c6: 7a02 ld s4,32(sp) + 83f4e3c8: 6ae2 ld s5,24(sp) + 83f4e3ca: 6b42 ld s6,16(sp) + 83f4e3cc: 6ba2 ld s7,8(sp) + 83f4e3ce: 6c02 ld s8,0(sp) + 83f4e3d0: 6161 addi sp,sp,80 + 83f4e3d2: 8082 ret + 83f4e3d4: 87ce mv a5,s3 + 83f4e3d6: b7f9 j 83f4e3a4 + 83f4e3d8: fac880e3 beq a7,a2,83f4e378 + 83f4e3dc: 0007d783 lhu a5,0(a5) # 1000000 + 83f4e3e0: 9e3d addw a2,a2,a5 + 83f4e3e2: 1642 slli a2,a2,0x30 + 83f4e3e4: 9241 srli a2,a2,0x30 + 83f4e3e6: 87b2 mv a5,a2 + 83f4e3e8: 00cc7363 bgeu s8,a2,83f4e3ee + 83f4e3ec: 87c6 mv a5,a7 + 83f4e3ee: 17c2 slli a5,a5,0x30 + 83f4e3f0: 93c1 srli a5,a5,0x30 + 83f4e3f2: 9e1d subw a2,a2,a5 + 83f4e3f4: 00c41023 sh a2,0(s0) + 83f4e3f8: 00fba023 sw a5,0(s7) + 83f4e3fc: b7c1 j 83f4e3bc + 83f4e3fe: 85a6 mv a1,s1 + 83f4e400: 028b0513 addi a0,s6,40 + 83f4e404: b93ff0ef jal ra,83f4df96 + 83f4e408: f80543e3 bltz a0,83f4e38e + 83f4e40c: 00aaa023 sw a0,0(s5) + 83f4e410: 4785 li a5,1 + 83f4e412: 00fa2023 sw a5,0(s4) + 83f4e416: b741 j 83f4e396 + +0000000083f4e418 : + 83f4e418: 1101 addi sp,sp,-32 + 83f4e41a: e822 sd s0,16(sp) + 83f4e41c: e426 sd s1,8(sp) + 83f4e41e: ec06 sd ra,24(sp) + 83f4e420: 842a mv s0,a0 + 83f4e422: 4d48 lw a0,28(a0) + 83f4e424: 4485 li s1,1 + 83f4e426: 00a4953b sllw a0,s1,a0 + 83f4e42a: 050a slli a0,a0,0x2 + 83f4e42c: 158000ef jal ra,83f4e584 + 83f4e430: f408 sd a0,40(s0) + 83f4e432: 4c50 lw a2,28(s0) + 83f4e434: c115 beqz a0,83f4e458 + 83f4e436: 00c4963b sllw a2,s1,a2 + 83f4e43a: 4581 li a1,0 + 83f4e43c: 060a slli a2,a2,0x2 + 83f4e43e: b3ffd0ef jal ra,83f4bf7c + 83f4e442: 4c4c lw a1,28(s0) + 83f4e444: 02840513 addi a0,s0,40 + 83f4e448: 6442 ld s0,16(sp) + 83f4e44a: 60e2 ld ra,24(sp) + 83f4e44c: 00b495bb sllw a1,s1,a1 + 83f4e450: 64a2 ld s1,8(sp) + 83f4e452: 6105 addi sp,sp,32 + 83f4e454: acdff06f j 83f4df20 + 83f4e458: 6442 ld s0,16(sp) + 83f4e45a: 60e2 ld ra,24(sp) + 83f4e45c: 00c4963b sllw a2,s1,a2 + 83f4e460: 64a2 ld s1,8(sp) + 83f4e462: 00004597 auipc a1,0x4 + 83f4e466: d9658593 addi a1,a1,-618 # 83f521f8 <__func__.1> + 83f4e46a: 00004517 auipc a0,0x4 + 83f4e46e: d6e50513 addi a0,a0,-658 # 83f521d8 <__func__.0+0x18> + 83f4e472: 0026161b slliw a2,a2,0x2 + 83f4e476: 6105 addi sp,sp,32 + 83f4e478: b1dfd06f j 83f4bf94 + +0000000083f4e47c : + 83f4e47c: c511 beqz a0,83f4e488 + 83f4e47e: 3571 addiw a0,a0,-4 + 83f4e480: 00253513 sltiu a0,a0,2 + 83f4e484: 0505 addi a0,a0,1 + 83f4e486: 8082 ret + 83f4e488: 4511 li a0,4 + 83f4e48a: 8082 ret + +0000000083f4e48c : + 83f4e48c: 4521 li a0,8 + 83f4e48e: 8082 ret + +0000000083f4e490 : + 83f4e490: 0045959b slliw a1,a1,0x4 + 83f4e494: 4789 li a5,2 + 83f4e496: 02b6463b divw a2,a2,a1 + 83f4e49a: 04f50f63 beq a0,a5,83f4e4f8 + 83f4e49e: 04a7e363 bltu a5,a0,83f4e4e4 + 83f4e4a2: c53d beqz a0,83f4e510 + 83f4e4a4: 041507b7 lui a5,0x4150 + 83f4e4a8: 00011717 auipc a4,0x11 + 83f4e4ac: 7af73023 sd a5,1952(a4) # 83f5fc48 + 83f4e4b0: 47d8 lw a4,12(a5) + 83f4e4b2: 0ff67693 andi a3,a2,255 + 83f4e4b6: 4086561b sraiw a2,a2,0x8 + 83f4e4ba: 2701 sext.w a4,a4 + 83f4e4bc: 08376713 ori a4,a4,131 + 83f4e4c0: c7d8 sw a4,12(a5) + 83f4e4c2: c394 sw a3,0(a5) + 83f4e4c4: 0ff67613 andi a2,a2,255 + 83f4e4c8: c3d0 sw a2,4(a5) + 83f4e4ca: 47d8 lw a4,12(a5) + 83f4e4cc: 468d li a3,3 + 83f4e4ce: 2701 sext.w a4,a4 + 83f4e4d0: f7f77713 andi a4,a4,-129 + 83f4e4d4: c7d8 sw a4,12(a5) + 83f4e4d6: 0007a223 sw zero,4(a5) # 4150004 + 83f4e4da: cb94 sw a3,16(a5) + 83f4e4dc: 471d li a4,7 + 83f4e4de: c798 sw a4,8(a5) + 83f4e4e0: c7d4 sw a3,12(a5) + 83f4e4e2: 8082 ret + 83f4e4e4: 478d li a5,3 + 83f4e4e6: 02f51063 bne a0,a5,83f4e506 + 83f4e4ea: 041707b7 lui a5,0x4170 + 83f4e4ee: 00011717 auipc a4,0x11 + 83f4e4f2: 74f73d23 sd a5,1882(a4) # 83f5fc48 + 83f4e4f6: bf6d j 83f4e4b0 + 83f4e4f8: 041607b7 lui a5,0x4160 + 83f4e4fc: 00011717 auipc a4,0x11 + 83f4e500: 74f73623 sd a5,1868(a4) # 83f5fc48 + 83f4e504: b775 j 83f4e4b0 + 83f4e506: 00011797 auipc a5,0x11 + 83f4e50a: 7427b783 ld a5,1858(a5) # 83f5fc48 + 83f4e50e: b74d j 83f4e4b0 + 83f4e510: 041407b7 lui a5,0x4140 + 83f4e514: 00011717 auipc a4,0x11 + 83f4e518: 72f73a23 sd a5,1844(a4) # 83f5fc48 + 83f4e51c: bf51 j 83f4e4b0 + +0000000083f4e51e : + 83f4e51e: 00011717 auipc a4,0x11 + 83f4e522: 72a73703 ld a4,1834(a4) # 83f5fc48 + 83f4e526: 4b5c lw a5,20(a4) + 83f4e528: 0207f793 andi a5,a5,32 + 83f4e52c: dfed beqz a5,83f4e526 + 83f4e52e: 2501 sext.w a0,a0 + 83f4e530: c308 sw a0,0(a4) + 83f4e532: 8082 ret + +0000000083f4e534 : + 83f4e534: 0000f797 auipc a5,0xf + 83f4e538: fac78793 addi a5,a5,-84 # 83f5d4e0 + 83f4e53c: 873e mv a4,a5 + 83f4e53e: 639c ld a5,0(a5) + 83f4e540: fea7eee3 bltu a5,a0,83f4e53c + 83f4e544: 6710 ld a2,8(a4) + 83f4e546: 6514 ld a3,8(a0) + 83f4e548: 00c705b3 add a1,a4,a2 + 83f4e54c: 02b50863 beq a0,a1,83f4e57c + 83f4e550: 00d50633 add a2,a0,a3 + 83f4e554: 00c78763 beq a5,a2,83f4e562 + 83f4e558: e11c sd a5,0(a0) + 83f4e55a: 00e50363 beq a0,a4,83f4e560 + 83f4e55e: e308 sd a0,0(a4) + 83f4e560: 8082 ret + 83f4e562: 00011617 auipc a2,0x11 + 83f4e566: 6ee63603 ld a2,1774(a2) # 83f5fc50 + 83f4e56a: fec787e3 beq a5,a2,83f4e558 + 83f4e56e: 679c ld a5,8(a5) + 83f4e570: 96be add a3,a3,a5 + 83f4e572: e514 sd a3,8(a0) + 83f4e574: 631c ld a5,0(a4) + 83f4e576: 639c ld a5,0(a5) + 83f4e578: e11c sd a5,0(a0) + 83f4e57a: b7c5 j 83f4e55a + 83f4e57c: 96b2 add a3,a3,a2 + 83f4e57e: e714 sd a3,8(a4) + 83f4e580: 853a mv a0,a4 + 83f4e582: b7f9 j 83f4e550 + +0000000083f4e584 : + 83f4e584: 7139 addi sp,sp,-64 + 83f4e586: f822 sd s0,48(sp) + 83f4e588: fc06 sd ra,56(sp) + 83f4e58a: f426 sd s1,40(sp) + 83f4e58c: f04a sd s2,32(sp) + 83f4e58e: ec4e sd s3,24(sp) + 83f4e590: e852 sd s4,16(sp) + 83f4e592: e456 sd s5,8(sp) + 83f4e594: 842a mv s0,a0 + 83f4e596: 6a1000ef jal ra,83f4f436 + 83f4e59a: 00011697 auipc a3,0x11 + 83f4e59e: 6b668693 addi a3,a3,1718 # 83f5fc50 + 83f4e5a2: 629c ld a5,0(a3) + 83f4e5a4: cbe1 beqz a5,83f4e674 + 83f4e5a6: 00011917 auipc s2,0x11 + 83f4e5aa: 6b293903 ld s2,1714(s2) # 83f5fc58 + 83f4e5ae: 008977b3 and a5,s2,s0 + 83f4e5b2: e3c5 bnez a5,83f4e652 + 83f4e5b4: fff40793 addi a5,s0,-1 + 83f4e5b8: 5739 li a4,-18 + 83f4e5ba: 08f76c63 bltu a4,a5,83f4e652 + 83f4e5be: 00f47793 andi a5,s0,15 + 83f4e5c2: 0441 addi s0,s0,16 + 83f4e5c4: e3d1 bnez a5,83f4e648 + 83f4e5c6: 00011a97 auipc s5,0x11 + 83f4e5ca: 69aa8a93 addi s5,s5,1690 # 83f5fc60 + 83f4e5ce: 000aba03 ld s4,0(s5) + 83f4e5d2: 088a6063 bltu s4,s0,83f4e652 + 83f4e5d6: 0000f717 auipc a4,0xf + 83f4e5da: f0a70713 addi a4,a4,-246 # 83f5d4e0 + 83f4e5de: 6304 ld s1,0(a4) + 83f4e5e0: a029 j 83f4e5ea + 83f4e5e2: 609c ld a5,0(s1) + 83f4e5e4: c791 beqz a5,83f4e5f0 + 83f4e5e6: 8726 mv a4,s1 + 83f4e5e8: 84be mv s1,a5 + 83f4e5ea: 649c ld a5,8(s1) + 83f4e5ec: fe87ebe3 bltu a5,s0,83f4e5e2 + 83f4e5f0: 629c ld a5,0(a3) + 83f4e5f2: 06978063 beq a5,s1,83f4e652 + 83f4e5f6: 609c ld a5,0(s1) + 83f4e5f8: 00073983 ld s3,0(a4) + 83f4e5fc: 02000693 li a3,32 + 83f4e600: e31c sd a5,0(a4) + 83f4e602: 649c ld a5,8(s1) + 83f4e604: 09c1 addi s3,s3,16 + 83f4e606: 40878733 sub a4,a5,s0 + 83f4e60a: 0ce6e863 bltu a3,a4,83f4e6da + 83f4e60e: 00011717 auipc a4,0x11 + 83f4e612: 65a70713 addi a4,a4,1626 # 83f5fc68 + 83f4e616: 6314 ld a3,0(a4) + 83f4e618: 40fa0a33 sub s4,s4,a5 + 83f4e61c: 014ab023 sd s4,0(s5) + 83f4e620: 00da7463 bgeu s4,a3,83f4e628 + 83f4e624: 01473023 sd s4,0(a4) + 83f4e628: 00011697 auipc a3,0x11 + 83f4e62c: 64868693 addi a3,a3,1608 # 83f5fc70 + 83f4e630: 6298 ld a4,0(a3) + 83f4e632: 00f967b3 or a5,s2,a5 + 83f4e636: e49c sd a5,8(s1) + 83f4e638: 0004b023 sd zero,0(s1) + 83f4e63c: 00170793 addi a5,a4,1 + 83f4e640: e29c sd a5,0(a3) + 83f4e642: 37c010ef jal ra,83f4f9be + 83f4e646: a819 j 83f4e65c + 83f4e648: ff047793 andi a5,s0,-16 + 83f4e64c: 07c1 addi a5,a5,16 + 83f4e64e: 02f46163 bltu s0,a5,83f4e670 + 83f4e652: 36c010ef jal ra,83f4f9be + 83f4e656: ffef40ef jal ra,83f42e54 + 83f4e65a: 4981 li s3,0 + 83f4e65c: 70e2 ld ra,56(sp) + 83f4e65e: 7442 ld s0,48(sp) + 83f4e660: 74a2 ld s1,40(sp) + 83f4e662: 7902 ld s2,32(sp) + 83f4e664: 6a42 ld s4,16(sp) + 83f4e666: 6aa2 ld s5,8(sp) + 83f4e668: 854e mv a0,s3 + 83f4e66a: 69e2 ld s3,24(sp) + 83f4e66c: 6121 addi sp,sp,64 + 83f4e66e: 8082 ret + 83f4e670: 843e mv s0,a5 + 83f4e672: bf91 j 83f4e5c6 + 83f4e674: 00011797 auipc a5,0x11 + 83f4e678: 6cc78793 addi a5,a5,1740 # 83f5fd40 <_ebss> + 83f4e67c: 00f7f713 andi a4,a5,15 + 83f4e680: 863e mv a2,a5 + 83f4e682: c719 beqz a4,83f4e690 + 83f4e684: 00011797 auipc a5,0x11 + 83f4e688: 6cb78793 addi a5,a5,1739 # 83f5fd4f <_ebss+0xf> + 83f4e68c: 9bc1 andi a5,a5,-16 + 83f4e68e: 863e mv a2,a5 + 83f4e690: 00091717 auipc a4,0x91 + 83f4e694: 6a070713 addi a4,a4,1696 # 83fdfd30 <_ebss+0x7fff0> + 83f4e698: 9b41 andi a4,a4,-16 + 83f4e69a: 00073023 sd zero,0(a4) + 83f4e69e: 00073423 sd zero,8(a4) + 83f4e6a2: 597d li s2,-1 + 83f4e6a4: 40f707b3 sub a5,a4,a5 + 83f4e6a8: 0000f597 auipc a1,0xf + 83f4e6ac: e405b023 sd zero,-448(a1) # 83f5d4e8 + 83f4e6b0: 197e slli s2,s2,0x3f + 83f4e6b2: 0000f597 auipc a1,0xf + 83f4e6b6: e2c5b723 sd a2,-466(a1) # 83f5d4e0 + 83f4e6ba: e298 sd a4,0(a3) + 83f4e6bc: e218 sd a4,0(a2) + 83f4e6be: e61c sd a5,8(a2) + 83f4e6c0: 00011717 auipc a4,0x11 + 83f4e6c4: 5af73423 sd a5,1448(a4) # 83f5fc68 + 83f4e6c8: 00011717 auipc a4,0x11 + 83f4e6cc: 58f73c23 sd a5,1432(a4) # 83f5fc60 + 83f4e6d0: 00011797 auipc a5,0x11 + 83f4e6d4: 5927b423 sd s2,1416(a5) # 83f5fc58 + 83f4e6d8: bdd9 j 83f4e5ae + 83f4e6da: 00848533 add a0,s1,s0 + 83f4e6de: e518 sd a4,8(a0) + 83f4e6e0: e480 sd s0,8(s1) + 83f4e6e2: e53ff0ef jal ra,83f4e534 + 83f4e6e6: 649c ld a5,8(s1) + 83f4e6e8: b71d j 83f4e60e + +0000000083f4e6ea : + 83f4e6ea: cd09 beqz a0,83f4e704 + 83f4e6ec: ff853703 ld a4,-8(a0) + 83f4e6f0: 00011797 auipc a5,0x11 + 83f4e6f4: 5687b783 ld a5,1384(a5) # 83f5fc58 + 83f4e6f8: 00f776b3 and a3,a4,a5 + 83f4e6fc: c681 beqz a3,83f4e704 + 83f4e6fe: ff053683 ld a3,-16(a0) + 83f4e702: c291 beqz a3,83f4e706 + 83f4e704: 8082 ret + 83f4e706: 1101 addi sp,sp,-32 + 83f4e708: fff7c793 not a5,a5 + 83f4e70c: ec06 sd ra,24(sp) + 83f4e70e: 8ff9 and a5,a5,a4 + 83f4e710: fef53c23 sd a5,-8(a0) + 83f4e714: e42a sd a0,8(sp) + 83f4e716: 521000ef jal ra,83f4f436 + 83f4e71a: 6522 ld a0,8(sp) + 83f4e71c: 00011717 auipc a4,0x11 + 83f4e720: 54470713 addi a4,a4,1348 # 83f5fc60 + 83f4e724: 6314 ld a3,0(a4) + 83f4e726: ff853783 ld a5,-8(a0) + 83f4e72a: 1541 addi a0,a0,-16 + 83f4e72c: 97b6 add a5,a5,a3 + 83f4e72e: e31c sd a5,0(a4) + 83f4e730: e05ff0ef jal ra,83f4e534 + 83f4e734: 00011717 auipc a4,0x11 + 83f4e738: 54470713 addi a4,a4,1348 # 83f5fc78 + 83f4e73c: 631c ld a5,0(a4) + 83f4e73e: 0785 addi a5,a5,1 + 83f4e740: e31c sd a5,0(a4) + 83f4e742: 60e2 ld ra,24(sp) + 83f4e744: 6105 addi sp,sp,32 + 83f4e746: 2780106f j 83f4f9be + +0000000083f4e74a : + 83f4e74a: 1101 addi sp,sp,-32 + 83f4e74c: e822 sd s0,16(sp) + 83f4e74e: ec06 sd ra,24(sp) + 83f4e750: e426 sd s1,8(sp) + 83f4e752: e04a sd s2,0(sp) + 83f4e754: 615c ld a5,128(a0) + 83f4e756: 7924 ld s1,112(a0) + 83f4e758: 842a mv s0,a0 + 83f4e75a: ef81 bnez a5,83f4e772 + 83f4e75c: 611c ld a5,0(a0) + 83f4e75e: 0485 addi s1,s1,1 + 83f4e760: 4501 li a0,0 + 83f4e762: cfa5 beqz a5,83f4e7da + 83f4e764: f824 sd s1,112(s0) + 83f4e766: 60e2 ld ra,24(sp) + 83f4e768: 6442 ld s0,16(sp) + 83f4e76a: 64a2 ld s1,8(sp) + 83f4e76c: 6902 ld s2,0(sp) + 83f4e76e: 6105 addi sp,sp,32 + 83f4e770: 8082 ret + 83f4e772: 8932 mv s2,a2 + 83f4e774: e61d bnez a2,83f4e7a2 + 83f4e776: 6508 ld a0,8(a0) + 83f4e778: 863e mv a2,a5 + 83f4e77a: 0485 addi s1,s1,1 + 83f4e77c: 985f10ef jal ra,83f40100 + 83f4e780: 641c ld a5,8(s0) + 83f4e782: 6054 ld a3,128(s0) + 83f4e784: 6818 ld a4,16(s0) + 83f4e786: 4501 li a0,0 + 83f4e788: 97b6 add a5,a5,a3 + 83f4e78a: e41c sd a5,8(s0) + 83f4e78c: fce7ece3 bltu a5,a4,83f4e764 + 83f4e790: 601c ld a5,0(s0) + 83f4e792: f824 sd s1,112(s0) + 83f4e794: e41c sd a5,8(s0) + 83f4e796: 60e2 ld ra,24(sp) + 83f4e798: 6442 ld s0,16(sp) + 83f4e79a: 64a2 ld s1,8(sp) + 83f4e79c: 6902 ld s2,0(sp) + 83f4e79e: 6105 addi sp,sp,32 + 83f4e7a0: 8082 ret + 83f4e7a2: 6d08 ld a0,24(a0) + 83f4e7a4: 863e mv a2,a5 + 83f4e7a6: 95bf10ef jal ra,83f40100 + 83f4e7aa: 6058 ld a4,128(s0) + 83f4e7ac: 6c1c ld a5,24(s0) + 83f4e7ae: 6014 ld a3,0(s0) + 83f4e7b0: 40e00633 neg a2,a4 + 83f4e7b4: 8f99 sub a5,a5,a4 + 83f4e7b6: ec1c sd a5,24(s0) + 83f4e7b8: 00d7f563 bgeu a5,a3,83f4e7c2 + 83f4e7bc: 681c ld a5,16(s0) + 83f4e7be: 97b2 add a5,a5,a2 + 83f4e7c0: ec1c sd a5,24(s0) + 83f4e7c2: 4789 li a5,2 + 83f4e7c4: 02f90163 beq s2,a5,83f4e7e6 + 83f4e7c8: 0485 addi s1,s1,1 + 83f4e7ca: f824 sd s1,112(s0) + 83f4e7cc: 60e2 ld ra,24(sp) + 83f4e7ce: 6442 ld s0,16(sp) + 83f4e7d0: 64a2 ld s1,8(sp) + 83f4e7d2: 6902 ld s2,0(sp) + 83f4e7d4: 4501 li a0,0 + 83f4e7d6: 6105 addi sp,sp,32 + 83f4e7d8: 8082 ret + 83f4e7da: 6808 ld a0,16(s0) + 83f4e7dc: 631000ef jal ra,83f4f60c + 83f4e7e0: 00043823 sd zero,16(s0) + 83f4e7e4: b741 j 83f4e764 + 83f4e7e6: c099 beqz s1,83f4e7ec + 83f4e7e8: 4501 li a0,0 + 83f4e7ea: bfad j 83f4e764 + 83f4e7ec: 4485 li s1,1 + 83f4e7ee: 4501 li a0,0 + 83f4e7f0: bf95 j 83f4e764 + +0000000083f4e7f2 : + 83f4e7f2: 1101 addi sp,sp,-32 + 83f4e7f4: e822 sd s0,16(sp) + 83f4e7f6: e426 sd s1,8(sp) + 83f4e7f8: ec06 sd ra,24(sp) + 83f4e7fa: 84aa mv s1,a0 + 83f4e7fc: e04a sd s2,0(sp) + 83f4e7fe: 6b9000ef jal ra,83f4f6b6 + 83f4e802: 0894c783 lbu a5,137(s1) + 83f4e806: 0187941b slliw s0,a5,0x18 + 83f4e80a: 4184541b sraiw s0,s0,0x18 + 83f4e80e: 02805f63 blez s0,83f4e84c + 83f4e812: 04848913 addi s2,s1,72 + 83f4e816: a811 j 83f4e82a + 83f4e818: fff4079b addiw a5,s0,-1 + 83f4e81c: 0187941b slliw s0,a5,0x18 + 83f4e820: 0ff7f713 andi a4,a5,255 + 83f4e824: 4184541b sraiw s0,s0,0x18 + 83f4e828: c315 beqz a4,83f4e84c + 83f4e82a: 64bc ld a5,72(s1) + 83f4e82c: 854a mv a0,s2 + 83f4e82e: cf99 beqz a5,83f4e84c + 83f4e830: 4d5000ef jal ra,83f4f504 + 83f4e834: d175 beqz a0,83f4e818 + 83f4e836: 5cb000ef jal ra,83f4f600 + 83f4e83a: fff4079b addiw a5,s0,-1 + 83f4e83e: 0187941b slliw s0,a5,0x18 + 83f4e842: 0ff7f713 andi a4,a5,255 + 83f4e846: 4184541b sraiw s0,s0,0x18 + 83f4e84a: f365 bnez a4,83f4e82a + 83f4e84c: 57fd li a5,-1 + 83f4e84e: 08f484a3 sb a5,137(s1) + 83f4e852: 687000ef jal ra,83f4f6d8 + 83f4e856: 661000ef jal ra,83f4f6b6 + 83f4e85a: 0884c783 lbu a5,136(s1) + 83f4e85e: 0187941b slliw s0,a5,0x18 + 83f4e862: 4184541b sraiw s0,s0,0x18 + 83f4e866: 02805f63 blez s0,83f4e8a4 + 83f4e86a: 02048913 addi s2,s1,32 + 83f4e86e: a811 j 83f4e882 + 83f4e870: fff4079b addiw a5,s0,-1 + 83f4e874: 0187941b slliw s0,a5,0x18 + 83f4e878: 0ff7f713 andi a4,a5,255 + 83f4e87c: 4184541b sraiw s0,s0,0x18 + 83f4e880: c315 beqz a4,83f4e8a4 + 83f4e882: 709c ld a5,32(s1) + 83f4e884: 854a mv a0,s2 + 83f4e886: cf99 beqz a5,83f4e8a4 + 83f4e888: 47d000ef jal ra,83f4f504 + 83f4e88c: d175 beqz a0,83f4e870 + 83f4e88e: 573000ef jal ra,83f4f600 + 83f4e892: fff4079b addiw a5,s0,-1 + 83f4e896: 0187941b slliw s0,a5,0x18 + 83f4e89a: 0ff7f713 andi a4,a5,255 + 83f4e89e: 4184541b sraiw s0,s0,0x18 + 83f4e8a2: f365 bnez a4,83f4e882 + 83f4e8a4: 57fd li a5,-1 + 83f4e8a6: 08f48423 sb a5,136(s1) + 83f4e8aa: 6442 ld s0,16(sp) + 83f4e8ac: 60e2 ld ra,24(sp) + 83f4e8ae: 64a2 ld s1,8(sp) + 83f4e8b0: 6902 ld s2,0(sp) + 83f4e8b2: 6105 addi sp,sp,32 + 83f4e8b4: 6250006f j 83f4f6d8 + +0000000083f4e8b8 : + 83f4e8b8: 1101 addi sp,sp,-32 + 83f4e8ba: ec06 sd ra,24(sp) + 83f4e8bc: e822 sd s0,16(sp) + 83f4e8be: e42e sd a1,8(sp) + 83f4e8c0: c939 beqz a0,83f4e916 + 83f4e8c2: 7d3c ld a5,120(a0) + 83f4e8c4: 842a mv s0,a0 + 83f4e8c6: 4501 li a0,0 + 83f4e8c8: c3b9 beqz a5,83f4e90e + 83f4e8ca: 6058 ld a4,128(s0) + 83f4e8cc: 02e7b7b3 mulhu a5,a5,a4 + 83f4e8d0: ef9d bnez a5,83f4e90e + 83f4e8d2: 5e5000ef jal ra,83f4f6b6 + 83f4e8d6: 7c3c ld a5,120(s0) + 83f4e8d8: 6050 ld a2,128(s0) + 83f4e8da: 6018 ld a4,0(s0) + 83f4e8dc: fff78693 addi a3,a5,-1 + 83f4e8e0: 02c686b3 mul a3,a3,a2 + 83f4e8e4: 06043823 sd zero,112(s0) + 83f4e8e8: 557d li a0,-1 + 83f4e8ea: 65a2 ld a1,8(sp) + 83f4e8ec: 08a40423 sb a0,136(s0) + 83f4e8f0: e418 sd a4,8(s0) + 83f4e8f2: 08a404a3 sb a0,137(s0) + 83f4e8f6: 02c787b3 mul a5,a5,a2 + 83f4e8fa: 97ba add a5,a5,a4 + 83f4e8fc: 9736 add a4,a4,a3 + 83f4e8fe: e81c sd a5,16(s0) + 83f4e900: ec18 sd a4,24(s0) + 83f4e902: ed99 bnez a1,83f4e920 + 83f4e904: 701c ld a5,32(s0) + 83f4e906: e795 bnez a5,83f4e932 + 83f4e908: 5d1000ef jal ra,83f4f6d8 + 83f4e90c: 4505 li a0,1 + 83f4e90e: 60e2 ld ra,24(sp) + 83f4e910: 6442 ld s0,16(sp) + 83f4e912: 6105 addi sp,sp,32 + 83f4e914: 8082 ret + 83f4e916: 60e2 ld ra,24(sp) + 83f4e918: 6442 ld s0,16(sp) + 83f4e91a: 4501 li a0,0 + 83f4e91c: 6105 addi sp,sp,32 + 83f4e91e: 8082 ret + 83f4e920: 02040513 addi a0,s0,32 + 83f4e924: 6ca010ef jal ra,83f4ffee + 83f4e928: 04840513 addi a0,s0,72 + 83f4e92c: 6c2010ef jal ra,83f4ffee + 83f4e930: bfe1 j 83f4e908 + 83f4e932: 02040513 addi a0,s0,32 + 83f4e936: 3cf000ef jal ra,83f4f504 + 83f4e93a: d579 beqz a0,83f4e908 + 83f4e93c: 00000073 ecall + 83f4e940: b7e1 j 83f4e908 + +0000000083f4e942 : + 83f4e942: cd25 beqz a0,83f4e9ba + 83f4e944: 1141 addi sp,sp,-16 + 83f4e946: e022 sd s0,0(sp) + 83f4e948: e406 sd ra,8(sp) + 83f4e94a: 8436 mv s0,a3 + 83f4e94c: caad beqz a3,83f4e9be + 83f4e94e: ce2d beqz a2,83f4e9c8 + 83f4e950: c5bd beqz a1,83f4e9be + 83f4e952: 02a5b7b3 mulhu a5,a1,a0 + 83f4e956: 4705 li a4,1 + 83f4e958: 08e68523 sb a4,138(a3) + 83f4e95c: e290 sd a2,0(a3) + 83f4e95e: fea8 sd a0,120(a3) + 83f4e960: e2cc sd a1,128(a3) + 83f4e962: e7b9 bnez a5,83f4e9b0 + 83f4e964: 553000ef jal ra,83f4f6b6 + 83f4e968: 7c3c ld a5,120(s0) + 83f4e96a: 6050 ld a2,128(s0) + 83f4e96c: 6018 ld a4,0(s0) + 83f4e96e: fff78693 addi a3,a5,-1 + 83f4e972: 02c686b3 mul a3,a3,a2 + 83f4e976: 55fd li a1,-1 + 83f4e978: 06043823 sd zero,112(s0) + 83f4e97c: 08b40423 sb a1,136(s0) + 83f4e980: e418 sd a4,8(s0) + 83f4e982: 08b404a3 sb a1,137(s0) + 83f4e986: 02040513 addi a0,s0,32 + 83f4e98a: 02c787b3 mul a5,a5,a2 + 83f4e98e: 97ba add a5,a5,a4 + 83f4e990: 9736 add a4,a4,a3 + 83f4e992: e81c sd a5,16(s0) + 83f4e994: ec18 sd a4,24(s0) + 83f4e996: 658010ef jal ra,83f4ffee + 83f4e99a: 04840513 addi a0,s0,72 + 83f4e99e: 650010ef jal ra,83f4ffee + 83f4e9a2: 537000ef jal ra,83f4f6d8 + 83f4e9a6: 60a2 ld ra,8(sp) + 83f4e9a8: 8522 mv a0,s0 + 83f4e9aa: 6402 ld s0,0(sp) + 83f4e9ac: 0141 addi sp,sp,16 + 83f4e9ae: 8082 ret + 83f4e9b0: 60a2 ld ra,8(sp) + 83f4e9b2: 6402 ld s0,0(sp) + 83f4e9b4: 8536 mv a0,a3 + 83f4e9b6: 0141 addi sp,sp,16 + 83f4e9b8: 8082 ret + 83f4e9ba: 4501 li a0,0 + 83f4e9bc: 8082 ret + 83f4e9be: 60a2 ld ra,8(sp) + 83f4e9c0: 6402 ld s0,0(sp) + 83f4e9c2: 4501 li a0,0 + 83f4e9c4: 0141 addi sp,sp,16 + 83f4e9c6: 8082 ret + 83f4e9c8: f9fd bnez a1,83f4e9be + 83f4e9ca: 4785 li a5,1 + 83f4e9cc: 08f68523 sb a5,138(a3) + 83f4e9d0: e014 sd a3,0(s0) + 83f4e9d2: fea8 sd a0,120(a3) + 83f4e9d4: 0806b023 sd zero,128(a3) + 83f4e9d8: b771 j 83f4e964 + +0000000083f4e9da : + 83f4e9da: 1101 addi sp,sp,-32 + 83f4e9dc: ec06 sd ra,24(sp) + 83f4e9de: e822 sd s0,16(sp) + 83f4e9e0: e426 sd s1,8(sp) + 83f4e9e2: e04a sd s2,0(sp) + 83f4e9e4: c929 beqz a0,83f4ea36 + 83f4e9e6: 02a5b7b3 mulhu a5,a1,a0 + 83f4e9ea: 842a mv s0,a0 + 83f4e9ec: 84ae mv s1,a1 + 83f4e9ee: e7a1 bnez a5,83f4ea36 + 83f4e9f0: 02b50533 mul a0,a0,a1 + 83f4e9f4: f6f00793 li a5,-145 + 83f4e9f8: 02a7ef63 bltu a5,a0,83f4ea36 + 83f4e9fc: 09050513 addi a0,a0,144 + 83f4ea00: b85ff0ef jal ra,83f4e584 + 83f4ea04: 892a mv s2,a0 + 83f4ea06: c905 beqz a0,83f4ea36 + 83f4ea08: 08050523 sb zero,138(a0) + 83f4ea0c: 87aa mv a5,a0 + 83f4ea0e: c099 beqz s1,83f4ea14 + 83f4ea10: 09050793 addi a5,a0,144 + 83f4ea14: 06893c23 sd s0,120(s2) + 83f4ea18: 08993023 sd s1,128(s2) + 83f4ea1c: 00f93023 sd a5,0(s2) + 83f4ea20: 854a mv a0,s2 + 83f4ea22: 4585 li a1,1 + 83f4ea24: e95ff0ef jal ra,83f4e8b8 + 83f4ea28: 60e2 ld ra,24(sp) + 83f4ea2a: 6442 ld s0,16(sp) + 83f4ea2c: 64a2 ld s1,8(sp) + 83f4ea2e: 854a mv a0,s2 + 83f4ea30: 6902 ld s2,0(sp) + 83f4ea32: 6105 addi sp,sp,32 + 83f4ea34: 8082 ret + 83f4ea36: 60e2 ld ra,24(sp) + 83f4ea38: 6442 ld s0,16(sp) + 83f4ea3a: 4901 li s2,0 + 83f4ea3c: 64a2 ld s1,8(sp) + 83f4ea3e: 854a mv a0,s2 + 83f4ea40: 6902 ld s2,0(sp) + 83f4ea42: 6105 addi sp,sp,32 + 83f4ea44: 8082 ret + +0000000083f4ea46 : + 83f4ea46: 711d addi sp,sp,-96 + 83f4ea48: e8a2 sd s0,80(sp) + 83f4ea4a: e4a6 sd s1,72(sp) + 83f4ea4c: 842a mv s0,a0 + 83f4ea4e: e0ca sd s2,64(sp) + 83f4ea50: fc4e sd s3,56(sp) + 83f4ea52: f852 sd s4,48(sp) + 83f4ea54: f456 sd s5,40(sp) + 83f4ea56: f05a sd s6,32(sp) + 83f4ea58: ec86 sd ra,88(sp) + 83f4ea5a: 8aae mv s5,a1 + 83f4ea5c: e432 sd a2,8(sp) + 83f4ea5e: 8936 mv s2,a3 + 83f4ea60: 02050a13 addi s4,a0,32 + 83f4ea64: 453000ef jal ra,83f4f6b6 + 83f4ea68: 7838 ld a4,112(s0) + 83f4ea6a: 7c3c ld a5,120(s0) + 83f4ea6c: 4b01 li s6,0 + 83f4ea6e: 4989 li s3,2 + 83f4ea70: 54fd li s1,-1 + 83f4ea72: 06f76e63 bltu a4,a5,83f4eaee + 83f4ea76: 07390c63 beq s2,s3,83f4eaee + 83f4ea7a: 67a2 ld a5,8(sp) + 83f4ea7c: 0c078a63 beqz a5,83f4eb50 + 83f4ea80: 0a0b0c63 beqz s6,83f4eb38 + 83f4ea84: 455000ef jal ra,83f4f6d8 + 83f4ea88: 1af000ef jal ra,83f4f436 + 83f4ea8c: 42b000ef jal ra,83f4f6b6 + 83f4ea90: 08844783 lbu a5,136(s0) + 83f4ea94: 0187979b slliw a5,a5,0x18 + 83f4ea98: 4187d79b sraiw a5,a5,0x18 + 83f4ea9c: 00979463 bne a5,s1,83f4eaa4 + 83f4eaa0: 08040423 sb zero,136(s0) + 83f4eaa4: 08944783 lbu a5,137(s0) + 83f4eaa8: 0187979b slliw a5,a5,0x18 + 83f4eaac: 4187d79b sraiw a5,a5,0x18 + 83f4eab0: 00979463 bne a5,s1,83f4eab8 + 83f4eab4: 080404a3 sb zero,137(s0) + 83f4eab8: 421000ef jal ra,83f4f6d8 + 83f4eabc: 002c addi a1,sp,8 + 83f4eabe: 0808 addi a0,sp,16 + 83f4eac0: 0fa010ef jal ra,83f4fbba + 83f4eac4: e951 bnez a0,83f4eb58 + 83f4eac6: 3f1000ef jal ra,83f4f6b6 + 83f4eaca: 7838 ld a4,112(s0) + 83f4eacc: 7c3c ld a5,120(s0) + 83f4eace: 04f70563 beq a4,a5,83f4eb18 + 83f4ead2: 407000ef jal ra,83f4f6d8 + 83f4ead6: 8522 mv a0,s0 + 83f4ead8: d1bff0ef jal ra,83f4e7f2 + 83f4eadc: 6e3000ef jal ra,83f4f9be + 83f4eae0: 4b05 li s6,1 + 83f4eae2: 3d5000ef jal ra,83f4f6b6 + 83f4eae6: 7838 ld a4,112(s0) + 83f4eae8: 7c3c ld a5,120(s0) + 83f4eaea: f8f776e3 bgeu a4,a5,83f4ea76 + 83f4eaee: 864a mv a2,s2 + 83f4eaf0: 85d6 mv a1,s5 + 83f4eaf2: 8522 mv a0,s0 + 83f4eaf4: c57ff0ef jal ra,83f4e74a + 83f4eaf8: 643c ld a5,72(s0) + 83f4eafa: e3b9 bnez a5,83f4eb40 + 83f4eafc: e539 bnez a0,83f4eb4a + 83f4eafe: 3db000ef jal ra,83f4f6d8 + 83f4eb02: 4505 li a0,1 + 83f4eb04: 60e6 ld ra,88(sp) + 83f4eb06: 6446 ld s0,80(sp) + 83f4eb08: 64a6 ld s1,72(sp) + 83f4eb0a: 6906 ld s2,64(sp) + 83f4eb0c: 79e2 ld s3,56(sp) + 83f4eb0e: 7a42 ld s4,48(sp) + 83f4eb10: 7aa2 ld s5,40(sp) + 83f4eb12: 7b02 ld s6,32(sp) + 83f4eb14: 6125 addi sp,sp,96 + 83f4eb16: 8082 ret + 83f4eb18: 3c1000ef jal ra,83f4f6d8 + 83f4eb1c: 65a2 ld a1,8(sp) + 83f4eb1e: 8552 mv a0,s4 + 83f4eb20: 177000ef jal ra,83f4f496 + 83f4eb24: 8522 mv a0,s0 + 83f4eb26: ccdff0ef jal ra,83f4e7f2 + 83f4eb2a: 695000ef jal ra,83f4f9be + 83f4eb2e: f94d bnez a0,83f4eae0 + 83f4eb30: 00000073 ecall + 83f4eb34: 4b05 li s6,1 + 83f4eb36: b775 j 83f4eae2 + 83f4eb38: 0808 addi a0,sp,16 + 83f4eb3a: 2b1000ef jal ra,83f4f5ea + 83f4eb3e: b799 j 83f4ea84 + 83f4eb40: 04840513 addi a0,s0,72 + 83f4eb44: 1c1000ef jal ra,83f4f504 + 83f4eb48: d95d beqz a0,83f4eafe + 83f4eb4a: 00000073 ecall + 83f4eb4e: bf45 j 83f4eafe + 83f4eb50: 389000ef jal ra,83f4f6d8 + 83f4eb54: 4501 li a0,0 + 83f4eb56: b77d j 83f4eb04 + 83f4eb58: 8522 mv a0,s0 + 83f4eb5a: c99ff0ef jal ra,83f4e7f2 + 83f4eb5e: 661000ef jal ra,83f4f9be + 83f4eb62: 4501 li a0,0 + 83f4eb64: b745 j 83f4eb04 + +0000000083f4eb66 : + 83f4eb66: 7179 addi sp,sp,-48 + 83f4eb68: f022 sd s0,32(sp) + 83f4eb6a: e84a sd s2,16(sp) + 83f4eb6c: f406 sd ra,40(sp) + 83f4eb6e: ec26 sd s1,24(sp) + 83f4eb70: e44e sd s3,8(sp) + 83f4eb72: 7938 ld a4,112(a0) + 83f4eb74: 7d3c ld a5,120(a0) + 83f4eb76: 8932 mv s2,a2 + 83f4eb78: 842a mv s0,a0 + 83f4eb7a: 8636 mv a2,a3 + 83f4eb7c: 00f76d63 bltu a4,a5,83f4eb96 + 83f4eb80: 4789 li a5,2 + 83f4eb82: 4501 li a0,0 + 83f4eb84: 00f68963 beq a3,a5,83f4eb96 + 83f4eb88: 70a2 ld ra,40(sp) + 83f4eb8a: 7402 ld s0,32(sp) + 83f4eb8c: 64e2 ld s1,24(sp) + 83f4eb8e: 6942 ld s2,16(sp) + 83f4eb90: 69a2 ld s3,8(sp) + 83f4eb92: 6145 addi sp,sp,48 + 83f4eb94: 8082 ret + 83f4eb96: 08944483 lbu s1,137(s0) + 83f4eb9a: 783c ld a5,112(s0) + 83f4eb9c: 8522 mv a0,s0 + 83f4eb9e: 0184999b slliw s3,s1,0x18 + 83f4eba2: ba9ff0ef jal ra,83f4e74a + 83f4eba6: 4189d99b sraiw s3,s3,0x18 + 83f4ebaa: 57fd li a5,-1 + 83f4ebac: 02f98163 beq s3,a5,83f4ebce + 83f4ebb0: 2485 addiw s1,s1,1 + 83f4ebb2: 0184949b slliw s1,s1,0x18 + 83f4ebb6: 4184d49b sraiw s1,s1,0x18 + 83f4ebba: 089404a3 sb s1,137(s0) + 83f4ebbe: 70a2 ld ra,40(sp) + 83f4ebc0: 7402 ld s0,32(sp) + 83f4ebc2: 64e2 ld s1,24(sp) + 83f4ebc4: 6942 ld s2,16(sp) + 83f4ebc6: 69a2 ld s3,8(sp) + 83f4ebc8: 4505 li a0,1 + 83f4ebca: 6145 addi sp,sp,48 + 83f4ebcc: 8082 ret + 83f4ebce: 643c ld a5,72(s0) + 83f4ebd0: d7fd beqz a5,83f4ebbe + 83f4ebd2: 04840513 addi a0,s0,72 + 83f4ebd6: 12f000ef jal ra,83f4f504 + 83f4ebda: d175 beqz a0,83f4ebbe + 83f4ebdc: fe0901e3 beqz s2,83f4ebbe + 83f4ebe0: 4785 li a5,1 + 83f4ebe2: 00f93023 sd a5,0(s2) + 83f4ebe6: 4505 li a0,1 + 83f4ebe8: b745 j 83f4eb88 + +0000000083f4ebea : + 83f4ebea: 793c ld a5,112(a0) + 83f4ebec: 7d38 ld a4,120(a0) + 83f4ebee: 02e7f663 bgeu a5,a4,83f4ec1a + 83f4ebf2: 08954703 lbu a4,137(a0) + 83f4ebf6: 0785 addi a5,a5,1 + 83f4ebf8: f93c sd a5,112(a0) + 83f4ebfa: 0187169b slliw a3,a4,0x18 + 83f4ebfe: 4186d69b sraiw a3,a3,0x18 + 83f4ec02: 57fd li a5,-1 + 83f4ec04: 00f68d63 beq a3,a5,83f4ec1e + 83f4ec08: 2705 addiw a4,a4,1 + 83f4ec0a: 0187171b slliw a4,a4,0x18 + 83f4ec0e: 4187571b sraiw a4,a4,0x18 + 83f4ec12: 08e504a3 sb a4,137(a0) + 83f4ec16: 4505 li a0,1 + 83f4ec18: 8082 ret + 83f4ec1a: 4501 li a0,0 + 83f4ec1c: 8082 ret + 83f4ec1e: 653c ld a5,72(a0) + 83f4ec20: e399 bnez a5,83f4ec26 + 83f4ec22: 4505 li a0,1 + 83f4ec24: 8082 ret + 83f4ec26: 1101 addi sp,sp,-32 + 83f4ec28: 04850513 addi a0,a0,72 + 83f4ec2c: ec06 sd ra,24(sp) + 83f4ec2e: e42e sd a1,8(sp) + 83f4ec30: 0d5000ef jal ra,83f4f504 + 83f4ec34: c509 beqz a0,83f4ec3e + 83f4ec36: 65a2 ld a1,8(sp) + 83f4ec38: c199 beqz a1,83f4ec3e + 83f4ec3a: 4785 li a5,1 + 83f4ec3c: e19c sd a5,0(a1) + 83f4ec3e: 60e2 ld ra,24(sp) + 83f4ec40: 4505 li a0,1 + 83f4ec42: 6105 addi sp,sp,32 + 83f4ec44: 8082 ret + +0000000083f4ec46 : + 83f4ec46: 715d addi sp,sp,-80 + 83f4ec48: e0a2 sd s0,64(sp) + 83f4ec4a: 842a mv s0,a0 + 83f4ec4c: f84a sd s2,48(sp) + 83f4ec4e: f44e sd s3,40(sp) + 83f4ec50: e486 sd ra,72(sp) + 83f4ec52: fc26 sd s1,56(sp) + 83f4ec54: f052 sd s4,32(sp) + 83f4ec56: 89ae mv s3,a1 + 83f4ec58: e432 sd a2,8(sp) + 83f4ec5a: 25d000ef jal ra,83f4f6b6 + 83f4ec5e: 07043903 ld s2,112(s0) + 83f4ec62: 0c091563 bnez s2,83f4ed2c + 83f4ec66: 67a2 ld a5,8(sp) + 83f4ec68: c3c1 beqz a5,83f4ece8 + 83f4ec6a: 0808 addi a0,sp,16 + 83f4ec6c: 17f000ef jal ra,83f4f5ea + 83f4ec70: 54fd li s1,-1 + 83f4ec72: 04840a13 addi s4,s0,72 + 83f4ec76: 263000ef jal ra,83f4f6d8 + 83f4ec7a: 7bc000ef jal ra,83f4f436 + 83f4ec7e: 239000ef jal ra,83f4f6b6 + 83f4ec82: 08844783 lbu a5,136(s0) + 83f4ec86: 0187979b slliw a5,a5,0x18 + 83f4ec8a: 4187d79b sraiw a5,a5,0x18 + 83f4ec8e: 00979463 bne a5,s1,83f4ec96 + 83f4ec92: 08040423 sb zero,136(s0) + 83f4ec96: 08944783 lbu a5,137(s0) + 83f4ec9a: 0187979b slliw a5,a5,0x18 + 83f4ec9e: 4187d79b sraiw a5,a5,0x18 + 83f4eca2: 00979463 bne a5,s1,83f4ecaa + 83f4eca6: 080404a3 sb zero,137(s0) + 83f4ecaa: 22f000ef jal ra,83f4f6d8 + 83f4ecae: 002c addi a1,sp,8 + 83f4ecb0: 0808 addi a0,sp,16 + 83f4ecb2: 709000ef jal ra,83f4fbba + 83f4ecb6: e521 bnez a0,83f4ecfe + 83f4ecb8: 1ff000ef jal ra,83f4f6b6 + 83f4ecbc: 783c ld a5,112(s0) + 83f4ecbe: efa1 bnez a5,83f4ed16 + 83f4ecc0: 219000ef jal ra,83f4f6d8 + 83f4ecc4: 65a2 ld a1,8(sp) + 83f4ecc6: 8552 mv a0,s4 + 83f4ecc8: 7ce000ef jal ra,83f4f496 + 83f4eccc: 8522 mv a0,s0 + 83f4ecce: b25ff0ef jal ra,83f4e7f2 + 83f4ecd2: 4ed000ef jal ra,83f4f9be + 83f4ecd6: c921 beqz a0,83f4ed26 + 83f4ecd8: 1df000ef jal ra,83f4f6b6 + 83f4ecdc: 07043903 ld s2,112(s0) + 83f4ece0: 04091663 bnez s2,83f4ed2c + 83f4ece4: 67a2 ld a5,8(sp) + 83f4ece6: fbc1 bnez a5,83f4ec76 + 83f4ece8: 1f1000ef jal ra,83f4f6d8 + 83f4ecec: 60a6 ld ra,72(sp) + 83f4ecee: 6406 ld s0,64(sp) + 83f4ecf0: 74e2 ld s1,56(sp) + 83f4ecf2: 7942 ld s2,48(sp) + 83f4ecf4: 79a2 ld s3,40(sp) + 83f4ecf6: 7a02 ld s4,32(sp) + 83f4ecf8: 4501 li a0,0 + 83f4ecfa: 6161 addi sp,sp,80 + 83f4ecfc: 8082 ret + 83f4ecfe: 8522 mv a0,s0 + 83f4ed00: af3ff0ef jal ra,83f4e7f2 + 83f4ed04: 4bb000ef jal ra,83f4f9be + 83f4ed08: 1af000ef jal ra,83f4f6b6 + 83f4ed0c: 783c ld a5,112(s0) + 83f4ed0e: dfe9 beqz a5,83f4ece8 + 83f4ed10: 1c9000ef jal ra,83f4f6d8 + 83f4ed14: b7d1 j 83f4ecd8 + 83f4ed16: 1c3000ef jal ra,83f4f6d8 + 83f4ed1a: 8522 mv a0,s0 + 83f4ed1c: ad7ff0ef jal ra,83f4e7f2 + 83f4ed20: 49f000ef jal ra,83f4f9be + 83f4ed24: bf55 j 83f4ecd8 + 83f4ed26: 00000073 ecall + 83f4ed2a: b77d j 83f4ecd8 + 83f4ed2c: 6050 ld a2,128(s0) + 83f4ed2e: ca11 beqz a2,83f4ed42 + 83f4ed30: 6c0c ld a1,24(s0) + 83f4ed32: 681c ld a5,16(s0) + 83f4ed34: 95b2 add a1,a1,a2 + 83f4ed36: ec0c sd a1,24(s0) + 83f4ed38: 02f5f563 bgeu a1,a5,83f4ed62 + 83f4ed3c: 854e mv a0,s3 + 83f4ed3e: bc2f10ef jal ra,83f40100 + 83f4ed42: 197d addi s2,s2,-1 + 83f4ed44: 07243823 sd s2,112(s0) + 83f4ed48: 701c ld a5,32(s0) + 83f4ed4a: ef99 bnez a5,83f4ed68 + 83f4ed4c: 18d000ef jal ra,83f4f6d8 + 83f4ed50: 60a6 ld ra,72(sp) + 83f4ed52: 6406 ld s0,64(sp) + 83f4ed54: 74e2 ld s1,56(sp) + 83f4ed56: 7942 ld s2,48(sp) + 83f4ed58: 79a2 ld s3,40(sp) + 83f4ed5a: 7a02 ld s4,32(sp) + 83f4ed5c: 4505 li a0,1 + 83f4ed5e: 6161 addi sp,sp,80 + 83f4ed60: 8082 ret + 83f4ed62: 600c ld a1,0(s0) + 83f4ed64: ec0c sd a1,24(s0) + 83f4ed66: bfd9 j 83f4ed3c + 83f4ed68: 02040513 addi a0,s0,32 + 83f4ed6c: 798000ef jal ra,83f4f504 + 83f4ed70: dd71 beqz a0,83f4ed4c + 83f4ed72: 00000073 ecall + 83f4ed76: bfd9 j 83f4ed4c + +0000000083f4ed78 : + 83f4ed78: 7179 addi sp,sp,-48 + 83f4ed7a: f406 sd ra,40(sp) + 83f4ed7c: f022 sd s0,32(sp) + 83f4ed7e: ec26 sd s1,24(sp) + 83f4ed80: e84a sd s2,16(sp) + 83f4ed82: e44e sd s3,8(sp) + 83f4ed84: e052 sd s4,0(sp) + 83f4ed86: 07053903 ld s2,112(a0) + 83f4ed8a: 00091b63 bnez s2,83f4eda0 + 83f4ed8e: 70a2 ld ra,40(sp) + 83f4ed90: 7402 ld s0,32(sp) + 83f4ed92: 64e2 ld s1,24(sp) + 83f4ed94: 6942 ld s2,16(sp) + 83f4ed96: 69a2 ld s3,8(sp) + 83f4ed98: 6a02 ld s4,0(sp) + 83f4ed9a: 4501 li a0,0 + 83f4ed9c: 6145 addi sp,sp,48 + 83f4ed9e: 8082 ret + 83f4eda0: 08854983 lbu s3,136(a0) + 83f4eda4: 84b2 mv s1,a2 + 83f4eda6: 6150 ld a2,128(a0) + 83f4eda8: 01899a1b slliw s4,s3,0x18 + 83f4edac: 842a mv s0,a0 + 83f4edae: 418a5a1b sraiw s4,s4,0x18 + 83f4edb2: ce01 beqz a2,83f4edca + 83f4edb4: 852e mv a0,a1 + 83f4edb6: 6c0c ld a1,24(s0) + 83f4edb8: 681c ld a5,16(s0) + 83f4edba: 95b2 add a1,a1,a2 + 83f4edbc: ec0c sd a1,24(s0) + 83f4edbe: 00f5e463 bltu a1,a5,83f4edc6 + 83f4edc2: 600c ld a1,0(s0) + 83f4edc4: ec0c sd a1,24(s0) + 83f4edc6: b3af10ef jal ra,83f40100 + 83f4edca: 197d addi s2,s2,-1 + 83f4edcc: 07243823 sd s2,112(s0) + 83f4edd0: 57fd li a5,-1 + 83f4edd2: 02fa0263 beq s4,a5,83f4edf6 + 83f4edd6: 2985 addiw s3,s3,1 + 83f4edd8: 0189999b slliw s3,s3,0x18 + 83f4eddc: 4189d99b sraiw s3,s3,0x18 + 83f4ede0: 09340423 sb s3,136(s0) + 83f4ede4: 70a2 ld ra,40(sp) + 83f4ede6: 7402 ld s0,32(sp) + 83f4ede8: 64e2 ld s1,24(sp) + 83f4edea: 6942 ld s2,16(sp) + 83f4edec: 69a2 ld s3,8(sp) + 83f4edee: 6a02 ld s4,0(sp) + 83f4edf0: 4505 li a0,1 + 83f4edf2: 6145 addi sp,sp,48 + 83f4edf4: 8082 ret + 83f4edf6: 701c ld a5,32(s0) + 83f4edf8: eb91 bnez a5,83f4ee0c + 83f4edfa: 4505 li a0,1 + 83f4edfc: 70a2 ld ra,40(sp) + 83f4edfe: 7402 ld s0,32(sp) + 83f4ee00: 64e2 ld s1,24(sp) + 83f4ee02: 6942 ld s2,16(sp) + 83f4ee04: 69a2 ld s3,8(sp) + 83f4ee06: 6a02 ld s4,0(sp) + 83f4ee08: 6145 addi sp,sp,48 + 83f4ee0a: 8082 ret + 83f4ee0c: 02040513 addi a0,s0,32 + 83f4ee10: 6f4000ef jal ra,83f4f504 + 83f4ee14: d17d beqz a0,83f4edfa + 83f4ee16: d0f5 beqz s1,83f4edfa + 83f4ee18: 4785 li a5,1 + 83f4ee1a: e09c sd a5,0(s1) + 83f4ee1c: 4505 li a0,1 + 83f4ee1e: bff9 j 83f4edfc + +0000000083f4ee20 : + 83f4ee20: c1b9 beqz a1,83f4ee66 + 83f4ee22: 4701 li a4,0 + 83f4ee24: 0000e897 auipc a7,0xe + 83f4ee28: 6cc88893 addi a7,a7,1740 # 83f5d4f0 + 83f4ee2c: 00471793 slli a5,a4,0x4 + 83f4ee30: 00f886b3 add a3,a7,a5 + 83f4ee34: 0086b803 ld a6,8(a3) + 83f4ee38: 4601 li a2,0 + 83f4ee3a: 03200313 li t1,50 + 83f4ee3e: 02a80063 beq a6,a0,83f4ee5e + 83f4ee42: 00170793 addi a5,a4,1 + 83f4ee46: c20d beqz a2,83f4ee68 + 83f4ee48: 873e mv a4,a5 + 83f4ee4a: 00678c63 beq a5,t1,83f4ee62 + 83f4ee4e: 00471793 slli a5,a4,0x4 + 83f4ee52: 00f886b3 add a3,a7,a5 + 83f4ee56: 0086b803 ld a6,8(a3) + 83f4ee5a: fea814e3 bne a6,a0,83f4ee42 + 83f4ee5e: 00f88633 add a2,a7,a5 + 83f4ee62: e20c sd a1,0(a2) + 83f4ee64: e608 sd a0,8(a2) + 83f4ee66: 8082 ret + 83f4ee68: 0006b803 ld a6,0(a3) + 83f4ee6c: 06c1 addi a3,a3,16 + 83f4ee6e: 863a mv a2,a4 + 83f4ee70: 873e mv a4,a5 + 83f4ee72: 00080f63 beqz a6,83f4ee90 + 83f4ee76: fe6788e3 beq a5,t1,83f4ee66 + 83f4ee7a: 6690 ld a2,8(a3) + 83f4ee7c: 00c50f63 beq a0,a2,83f4ee9a + 83f4ee80: 0006b803 ld a6,0(a3) + 83f4ee84: 0785 addi a5,a5,1 + 83f4ee86: 06c1 addi a3,a3,16 + 83f4ee88: 863a mv a2,a4 + 83f4ee8a: 873e mv a4,a5 + 83f4ee8c: fe0815e3 bnez a6,83f4ee76 + 83f4ee90: 0612 slli a2,a2,0x4 + 83f4ee92: 9646 add a2,a2,a7 + 83f4ee94: fa679de3 bne a5,t1,83f4ee4e + 83f4ee98: b7e9 j 83f4ee62 + 83f4ee9a: 0792 slli a5,a5,0x4 + 83f4ee9c: b7c9 j 83f4ee5e + +0000000083f4ee9e : + 83f4ee9e: 1101 addi sp,sp,-32 + 83f4eea0: e822 sd s0,16(sp) + 83f4eea2: e426 sd s1,8(sp) + 83f4eea4: e04a sd s2,0(sp) + 83f4eea6: 842a mv s0,a0 + 83f4eea8: ec06 sd ra,24(sp) + 83f4eeaa: 84ae mv s1,a1 + 83f4eeac: 8932 mv s2,a2 + 83f4eeae: 009000ef jal ra,83f4f6b6 + 83f4eeb2: 08844783 lbu a5,136(s0) + 83f4eeb6: 577d li a4,-1 + 83f4eeb8: 0187979b slliw a5,a5,0x18 + 83f4eebc: 4187d79b sraiw a5,a5,0x18 + 83f4eec0: 00e79463 bne a5,a4,83f4eec8 + 83f4eec4: 08040423 sb zero,136(s0) + 83f4eec8: 08944783 lbu a5,137(s0) + 83f4eecc: 577d li a4,-1 + 83f4eece: 0187979b slliw a5,a5,0x18 + 83f4eed2: 4187d79b sraiw a5,a5,0x18 + 83f4eed6: 00e79463 bne a5,a4,83f4eede + 83f4eeda: 080404a3 sb zero,137(s0) + 83f4eede: 7fa000ef jal ra,83f4f6d8 + 83f4eee2: 783c ld a5,112(s0) + 83f4eee4: cb89 beqz a5,83f4eef6 + 83f4eee6: 8522 mv a0,s0 + 83f4eee8: 6442 ld s0,16(sp) + 83f4eeea: 60e2 ld ra,24(sp) + 83f4eeec: 64a2 ld s1,8(sp) + 83f4eeee: 6902 ld s2,0(sp) + 83f4eef0: 6105 addi sp,sp,32 + 83f4eef2: 901ff06f j 83f4e7f2 + 83f4eef6: 04840513 addi a0,s0,72 + 83f4eefa: 864a mv a2,s2 + 83f4eefc: 85a6 mv a1,s1 + 83f4eefe: 5be000ef jal ra,83f4f4bc + 83f4ef02: 8522 mv a0,s0 + 83f4ef04: 6442 ld s0,16(sp) + 83f4ef06: 60e2 ld ra,24(sp) + 83f4ef08: 64a2 ld s1,8(sp) + 83f4ef0a: 6902 ld s2,0(sp) + 83f4ef0c: 6105 addi sp,sp,32 + 83f4ef0e: 8e5ff06f j 83f4e7f2 + +0000000083f4ef12 : + 83f4ef12: 7179 addi sp,sp,-48 + 83f4ef14: ec26 sd s1,24(sp) + 83f4ef16: 00011497 auipc s1,0x11 + 83f4ef1a: d7248493 addi s1,s1,-654 # 83f5fc88 + 83f4ef1e: e84a sd s2,16(sp) + 83f4ef20: 00011917 auipc s2,0x11 + 83f4ef24: dc893903 ld s2,-568(s2) # 83f5fce8 + 83f4ef28: 6098 ld a4,0(s1) + 83f4ef2a: 609c ld a5,0(s1) + 83f4ef2c: f022 sd s0,32(sp) + 83f4ef2e: e44e sd s3,8(sp) + 83f4ef30: f406 sd ra,40(sp) + 83f4ef32: 842a mv s0,a0 + 83f4ef34: 0a070023 sb zero,160(a4) + 83f4ef38: 00878513 addi a0,a5,8 + 83f4ef3c: 89ae mv s3,a1 + 83f4ef3e: 0f8010ef jal ra,83f50036 + 83f4ef42: ed19 bnez a0,83f4ef60 + 83f4ef44: 609c ld a5,0(s1) + 83f4ef46: 00011717 auipc a4,0x11 + 83f4ef4a: d7a70713 addi a4,a4,-646 # 83f5fcc0 + 83f4ef4e: 6314 ld a3,0(a4) + 83f4ef50: 6fb0 ld a2,88(a5) + 83f4ef52: 4785 li a5,1 + 83f4ef54: 00c797b3 sll a5,a5,a2 + 83f4ef58: fff7c793 not a5,a5 + 83f4ef5c: 8ff5 and a5,a5,a3 + 83f4ef5e: e31c sd a5,0(a4) + 83f4ef60: 57fd li a5,-1 + 83f4ef62: 04f40c63 beq s0,a5,83f4efba + 83f4ef66: 609c ld a5,0(s1) + 83f4ef68: 944a add s0,s0,s2 + 83f4ef6a: e780 sd s0,8(a5) + 83f4ef6c: 03246963 bltu s0,s2,83f4ef9e + 83f4ef70: 00011517 auipc a0,0x11 + 83f4ef74: d2053503 ld a0,-736(a0) # 83f5fc90 + 83f4ef78: 608c ld a1,0(s1) + 83f4ef7a: 05a1 addi a1,a1,8 + 83f4ef7c: 08c010ef jal ra,83f50008 + 83f4ef80: 00011797 auipc a5,0x11 + 83f4ef84: d4878793 addi a5,a5,-696 # 83f5fcc8 + 83f4ef88: 6398 ld a4,0(a5) + 83f4ef8a: 00e47363 bgeu s0,a4,83f4ef90 + 83f4ef8e: e380 sd s0,0(a5) + 83f4ef90: 70a2 ld ra,40(sp) + 83f4ef92: 7402 ld s0,32(sp) + 83f4ef94: 64e2 ld s1,24(sp) + 83f4ef96: 6942 ld s2,16(sp) + 83f4ef98: 69a2 ld s3,8(sp) + 83f4ef9a: 6145 addi sp,sp,48 + 83f4ef9c: 8082 ret + 83f4ef9e: 7402 ld s0,32(sp) + 83f4efa0: 00011517 auipc a0,0x11 + 83f4efa4: cf853503 ld a0,-776(a0) # 83f5fc98 + 83f4efa8: 608c ld a1,0(s1) + 83f4efaa: 70a2 ld ra,40(sp) + 83f4efac: 64e2 ld s1,24(sp) + 83f4efae: 6942 ld s2,16(sp) + 83f4efb0: 69a2 ld s3,8(sp) + 83f4efb2: 05a1 addi a1,a1,8 + 83f4efb4: 6145 addi sp,sp,48 + 83f4efb6: 0520106f j 83f50008 + 83f4efba: fa0986e3 beqz s3,83f4ef66 + 83f4efbe: 0000f797 auipc a5,0xf + 83f4efc2: a0a78793 addi a5,a5,-1526 # 83f5d9c8 + 83f4efc6: 6098 ld a4,0(s1) + 83f4efc8: 6794 ld a3,8(a5) + 83f4efca: 0004b883 ld a7,0(s1) + 83f4efce: 608c ld a1,0(s1) + 83f4efd0: eb14 sd a3,16(a4) + 83f4efd2: 6a88 ld a0,16(a3) + 83f4efd4: 6090 ld a2,0(s1) + 83f4efd6: 0004b803 ld a6,0(s1) + 83f4efda: 6398 ld a4,0(a5) + 83f4efdc: 00a8bc23 sd a0,24(a7) + 83f4efe0: 05a1 addi a1,a1,8 + 83f4efe2: e50c sd a1,8(a0) + 83f4efe4: 0621 addi a2,a2,8 + 83f4efe6: ea90 sd a2,16(a3) + 83f4efe8: 0705 addi a4,a4,1 + 83f4efea: 02f83423 sd a5,40(a6) + 83f4efee: e398 sd a4,0(a5) + 83f4eff0: 70a2 ld ra,40(sp) + 83f4eff2: 7402 ld s0,32(sp) + 83f4eff4: 64e2 ld s1,24(sp) + 83f4eff6: 6942 ld s2,16(sp) + 83f4eff8: 69a2 ld s3,8(sp) + 83f4effa: 6145 addi sp,sp,48 + 83f4effc: 8082 ret + +0000000083f4effe : + 83f4effe: 1101 addi sp,sp,-32 + 83f4f000: e822 sd s0,16(sp) + 83f4f002: 00011797 auipc a5,0x11 + 83f4f006: ce07b723 sd zero,-786(a5) # 83f5fcf0 + 83f4f00a: 00011417 auipc s0,0x11 + 83f4f00e: c7e40413 addi s0,s0,-898 # 83f5fc88 + 83f4f012: 6018 ld a4,0(s0) + 83f4f014: ec06 sd ra,24(sp) + 83f4f016: e426 sd s1,8(sp) + 83f4f018: 7338 ld a4,96(a4) + 83f4f01a: a5a5a7b7 lui a5,0xa5a5a + 83f4f01e: 5a578793 addi a5,a5,1445 # ffffffffa5a5a5a5 <_end+0xffffffff21a5a865> + 83f4f022: 4314 lw a3,0(a4) + 83f4f024: 00f69563 bne a3,a5,83f4f02e + 83f4f028: 435c lw a5,4(a4) + 83f4f02a: 06d78b63 beq a5,a3,83f4f0a0 + 83f4f02e: 6008 ld a0,0(s0) + 83f4f030: 600c ld a1,0(s0) + 83f4f032: 06858593 addi a1,a1,104 + 83f4f036: e39f30ef jal ra,83f42e6e + 83f4f03a: 00011497 auipc s1,0x11 + 83f4f03e: c4648493 addi s1,s1,-954 # 83f5fc80 + 83f4f042: 601c ld a5,0(s0) + 83f4f044: 4098 lw a4,0(s1) + 83f4f046: 00011517 auipc a0,0x11 + 83f4f04a: c7a53503 ld a0,-902(a0) # 83f5fcc0 + 83f4f04e: 1502 slli a0,a0,0x20 + 83f4f050: 0ae7a223 sw a4,164(a5) + 83f4f054: 9101 srli a0,a0,0x20 + 83f4f056: d9bf30ef jal ra,83f42df0 <__clzdi2> + 83f4f05a: 47fd li a5,31 + 83f4f05c: 3501 addiw a0,a0,-32 + 83f4f05e: 40a78533 sub a0,a5,a0 + 83f4f062: 00251793 slli a5,a0,0x2 + 83f4f066: 97aa add a5,a5,a0 + 83f4f068: 0000e717 auipc a4,0xe + 83f4f06c: 7a870713 addi a4,a4,1960 # 83f5d810 + 83f4f070: 078e slli a5,a5,0x3 + 83f4f072: 00f706b3 add a3,a4,a5 + 83f4f076: 6690 ld a2,8(a3) + 83f4f078: 07c1 addi a5,a5,16 + 83f4f07a: 97ba add a5,a5,a4 + 83f4f07c: 6618 ld a4,8(a2) + 83f4f07e: e698 sd a4,8(a3) + 83f4f080: 00f70d63 beq a4,a5,83f4f09a + 83f4f084: 6f1c ld a5,24(a4) + 83f4f086: 60e2 ld ra,24(sp) + 83f4f088: e01c sd a5,0(s0) + 83f4f08a: 601c ld a5,0(s0) + 83f4f08c: 6442 ld s0,16(sp) + 83f4f08e: 0a47a783 lw a5,164(a5) + 83f4f092: c09c sw a5,0(s1) + 83f4f094: 64a2 ld s1,8(sp) + 83f4f096: 6105 addi sp,sp,32 + 83f4f098: 8082 ret + 83f4f09a: 6718 ld a4,8(a4) + 83f4f09c: e698 sd a4,8(a3) + 83f4f09e: b7dd j 83f4f084 + 83f4f0a0: 4714 lw a3,8(a4) + 83f4f0a2: f8f696e3 bne a3,a5,83f4f02e + 83f4f0a6: 475c lw a5,12(a4) + 83f4f0a8: f8d793e3 bne a5,a3,83f4f02e + 83f4f0ac: b779 j 83f4f03a + +0000000083f4f0ae : + 83f4f0ae: 7139 addi sp,sp,-64 + 83f4f0b0: f822 sd s0,48(sp) + 83f4f0b2: f426 sd s1,40(sp) + 83f4f0b4: f04a sd s2,32(sp) + 83f4f0b6: ec4e sd s3,24(sp) + 83f4f0b8: e852 sd s4,16(sp) + 83f4f0ba: e456 sd s5,8(sp) + 83f4f0bc: e05a sd s6,0(sp) + 83f4f0be: fc06 sd ra,56(sp) + 83f4f0c0: 8a2a mv s4,a0 + 83f4f0c2: 06083503 ld a0,96(a6) + 83f4f0c6: 842e mv s0,a1 + 83f4f0c8: 02061593 slli a1,a2,0x20 + 83f4f0cc: 89b2 mv s3,a2 + 83f4f0ce: 01d5d613 srli a2,a1,0x1d + 83f4f0d2: 0a500593 li a1,165 + 83f4f0d6: 84c2 mv s1,a6 + 83f4f0d8: 893a mv s2,a4 + 83f4f0da: 8b3e mv s6,a5 + 83f4f0dc: 8ab6 mv s5,a3 + 83f4f0de: e9ffc0ef jal ra,83f4bf7c + 83f4f0e2: 39fd addiw s3,s3,-1 + 83f4f0e4: 70bc ld a5,96(s1) + 83f4f0e6: 02099713 slli a4,s3,0x20 + 83f4f0ea: 01d75993 srli s3,a4,0x1d + 83f4f0ee: 99be add s3,s3,a5 + 83f4f0f0: ff09f993 andi s3,s3,-16 + 83f4f0f4: cc51 beqz s0,83f4f190 + 83f4f0f6: 85a2 mv a1,s0 + 83f4f0f8: 06848813 addi a6,s1,104 + 83f4f0fc: 01040793 addi a5,s0,16 + 83f4f100: 0005c883 lbu a7,0(a1) + 83f4f104: 0805 addi a6,a6,1 + 83f4f106: 0585 addi a1,a1,1 + 83f4f108: ff180fa3 sb a7,-1(a6) + 83f4f10c: 00088463 beqz a7,83f4f114 + 83f4f110: fef598e3 bne a1,a5,83f4f100 + 83f4f114: 06048ba3 sb zero,119(s1) + 83f4f118: 479d li a5,7 + 83f4f11a: 0127f363 bgeu a5,s2,83f4f120 + 83f4f11e: 491d li s2,7 + 83f4f120: 00848513 addi a0,s1,8 + 83f4f124: 0524bc23 sd s2,88(s1) + 83f4f128: 0924b023 sd s2,128(s1) + 83f4f12c: 0804b423 sd zero,136(s1) + 83f4f130: 6d3000ef jal ra,83f50002 + 83f4f134: 03048513 addi a0,s1,48 + 83f4f138: 6cb000ef jal ra,83f50002 + 83f4f13c: 47a1 li a5,8 + 83f4f13e: 41278433 sub s0,a5,s2 + 83f4f142: 4631 li a2,12 + 83f4f144: 4581 li a1,0 + 83f4f146: f084 sd s1,32(s1) + 83f4f148: f880 sd s0,48(s1) + 83f4f14a: e4a4 sd s1,72(s1) + 83f4f14c: 0604bc23 sd zero,120(s1) + 83f4f150: 09048513 addi a0,s1,144 + 83f4f154: e29fc0ef jal ra,83f4bf7c + 83f4f158: 460d li a2,3 + 83f4f15a: 4581 li a1,0 + 83f4f15c: 09c48513 addi a0,s1,156 + 83f4f160: e1dfc0ef jal ra,83f4bf7c + 83f4f164: 8656 mv a2,s5 + 83f4f166: 0a048023 sb zero,160(s1) + 83f4f16a: 85d2 mv a1,s4 + 83f4f16c: 854e mv a0,s3 + 83f4f16e: b92f10ef jal ra,83f40500 + 83f4f172: e088 sd a0,0(s1) + 83f4f174: 000b0463 beqz s6,83f4f17c + 83f4f178: 009b3023 sd s1,0(s6) + 83f4f17c: 70e2 ld ra,56(sp) + 83f4f17e: 7442 ld s0,48(sp) + 83f4f180: 74a2 ld s1,40(sp) + 83f4f182: 7902 ld s2,32(sp) + 83f4f184: 69e2 ld s3,24(sp) + 83f4f186: 6a42 ld s4,16(sp) + 83f4f188: 6aa2 ld s5,8(sp) + 83f4f18a: 6b02 ld s6,0(sp) + 83f4f18c: 6121 addi sp,sp,64 + 83f4f18e: 8082 ret + 83f4f190: 06048423 sb zero,104(s1) + 83f4f194: b751 j 83f4f118 + +0000000083f4f196 : + 83f4f196: 715d addi sp,sp,-80 + 83f4f198: fc26 sd s1,56(sp) + 83f4f19a: f84a sd s2,48(sp) + 83f4f19c: f44e sd s3,40(sp) + 83f4f19e: f052 sd s4,32(sp) + 83f4f1a0: ec56 sd s5,24(sp) + 83f4f1a2: e85a sd s6,16(sp) + 83f4f1a4: e45e sd s7,8(sp) + 83f4f1a6: e486 sd ra,72(sp) + 83f4f1a8: e0a2 sd s0,64(sp) + 83f4f1aa: 00011497 auipc s1,0x11 + 83f4f1ae: afe48493 addi s1,s1,-1282 # 83f5fca8 + 83f4f1b2: 00011997 auipc s3,0x11 + 83f4f1b6: b2e98993 addi s3,s3,-1234 # 83f5fce0 + 83f4f1ba: 00011a17 auipc s4,0x11 + 83f4f1be: acea0a13 addi s4,s4,-1330 # 83f5fc88 + 83f4f1c2: 0000fa97 auipc s5,0xf + 83f4f1c6: 82ea8a93 addi s5,s5,-2002 # 83f5d9f0 + 83f4f1ca: 00011917 auipc s2,0x11 + 83f4f1ce: ad690913 addi s2,s2,-1322 # 83f5fca0 + 83f4f1d2: 0000eb97 auipc s7,0xe + 83f4f1d6: 63eb8b93 addi s7,s7,1598 # 83f5d810 + 83f4f1da: 4b05 li s6,1 + 83f4f1dc: 609c ld a5,0(s1) + 83f4f1de: cba5 beqz a5,83f4f24e + 83f4f1e0: 30047073 csrci mstatus,8 + 83f4f1e4: 0009b783 ld a5,0(s3) + 83f4f1e8: cb81 beqz a5,83f4f1f8 + 83f4f1ea: 000a3703 ld a4,0(s4) + 83f4f1ee: 000a3783 ld a5,0(s4) + 83f4f1f2: 7f3c ld a5,120(a4) + 83f4f1f4: 0785 addi a5,a5,1 + 83f4f1f6: ff3c sd a5,120(a4) + 83f4f1f8: 018ab783 ld a5,24(s5) + 83f4f1fc: 6f80 ld s0,24(a5) + 83f4f1fe: 00840513 addi a0,s0,8 + 83f4f202: 635000ef jal ra,83f50036 + 83f4f206: 00093783 ld a5,0(s2) + 83f4f20a: 17fd addi a5,a5,-1 + 83f4f20c: 00f93023 sd a5,0(s2) + 83f4f210: 609c ld a5,0(s1) + 83f4f212: 17fd addi a5,a5,-1 + 83f4f214: e09c sd a5,0(s1) + 83f4f216: 0009b783 ld a5,0(s3) + 83f4f21a: c385 beqz a5,83f4f23a + 83f4f21c: 000a3783 ld a5,0(s4) + 83f4f220: 7fbc ld a5,120(a5) + 83f4f222: cf81 beqz a5,83f4f23a + 83f4f224: 000a3703 ld a4,0(s4) + 83f4f228: 000a3683 ld a3,0(s4) + 83f4f22c: 7f3c ld a5,120(a4) + 83f4f22e: 17fd addi a5,a5,-1 + 83f4f230: ff3c sd a5,120(a4) + 83f4f232: 7ebc ld a5,120(a3) + 83f4f234: e399 bnez a5,83f4f23a + 83f4f236: 30046073 csrsi mstatus,8 + 83f4f23a: 09f44783 lbu a5,159(s0) + 83f4f23e: cf99 beqz a5,83f4f25c + 83f4f240: f9679ee3 bne a5,s6,83f4f1dc + 83f4f244: 8522 mv a0,s0 + 83f4f246: ca4ff0ef jal ra,83f4e6ea + 83f4f24a: 609c ld a5,0(s1) + 83f4f24c: fbd1 bnez a5,83f4f1e0 + 83f4f24e: 000bb783 ld a5,0(s7) + 83f4f252: f8fb75e3 bgeu s6,a5,83f4f1dc + 83f4f256: 00000073 ecall + 83f4f25a: b749 j 83f4f1dc + 83f4f25c: 7028 ld a0,96(s0) + 83f4f25e: c8cff0ef jal ra,83f4e6ea + 83f4f262: 8522 mv a0,s0 + 83f4f264: c86ff0ef jal ra,83f4e6ea + 83f4f268: bf95 j 83f4f1dc + +0000000083f4f26a : + 83f4f26a: 00011797 auipc a5,0x11 + 83f4f26e: a7e78793 addi a5,a5,-1410 # 83f5fce8 + 83f4f272: 0007b803 ld a6,0(a5) + 83f4f276: 00011f17 auipc t5,0x11 + 83f4f27a: a52f0f13 addi t5,t5,-1454 # 83f5fcc8 + 83f4f27e: 0805 addi a6,a6,1 + 83f4f280: 0107b023 sd a6,0(a5) + 83f4f284: 16080663 beqz a6,83f4f3f0 + 83f4f288: 000f3783 ld a5,0(t5) + 83f4f28c: 0ef86963 bltu a6,a5,83f4f37e + 83f4f290: 00011897 auipc a7,0x11 + 83f4f294: a0088893 addi a7,a7,-1536 # 83f5fc90 + 83f4f298: 0008b783 ld a5,0(a7) + 83f4f29c: 4501 li a0,0 + 83f4f29e: 0000e597 auipc a1,0xe + 83f4f2a2: 57258593 addi a1,a1,1394 # 83f5d810 + 83f4f2a6: 639c ld a5,0(a5) + 83f4f2a8: 00011e17 auipc t3,0x11 + 83f4f2ac: 9e0e0e13 addi t3,t3,-1568 # 83f5fc88 + 83f4f2b0: 10078a63 beqz a5,83f4f3c4 + 83f4f2b4: 00011317 auipc t1,0x11 + 83f4f2b8: a0c30313 addi t1,t1,-1524 # 83f5fcc0 + 83f4f2bc: 4e85 li t4,1 + 83f4f2be: a069 j 83f4f348 + 83f4f2c0: 0207b423 sd zero,40(a5) + 83f4f2c4: 6314 ld a3,0(a4) + 83f4f2c6: 16fd addi a3,a3,-1 + 83f4f2c8: e314 sd a3,0(a4) + 83f4f2ca: 6bb8 ld a4,80(a5) + 83f4f2cc: c315 beqz a4,83f4f2f0 + 83f4f2ce: 0387bf83 ld t6,56(a5) + 83f4f2d2: 63b4 ld a3,64(a5) + 83f4f2d4: 00dfb823 sd a3,16(t6) + 83f4f2d8: 0387bf83 ld t6,56(a5) + 83f4f2dc: 01f6b423 sd t6,8(a3) + 83f4f2e0: 6714 ld a3,8(a4) + 83f4f2e2: 0e568563 beq a3,t0,83f4f3cc + 83f4f2e6: 0407b823 sd zero,80(a5) + 83f4f2ea: 6314 ld a3,0(a4) + 83f4f2ec: 16fd addi a3,a3,-1 + 83f4f2ee: e314 sd a3,0(a4) + 83f4f2f0: 6fb8 ld a4,88(a5) + 83f4f2f2: 00033f83 ld t6,0(t1) + 83f4f2f6: 00271693 slli a3,a4,0x2 + 83f4f2fa: 96ba add a3,a3,a4 + 83f4f2fc: 068e slli a3,a3,0x3 + 83f4f2fe: 96ae add a3,a3,a1 + 83f4f300: 6694 ld a3,8(a3) + 83f4f302: 00ee9733 sll a4,t4,a4 + 83f4f306: 01f76733 or a4,a4,t6 + 83f4f30a: eb94 sd a3,16(a5) + 83f4f30c: 0106bf83 ld t6,16(a3) + 83f4f310: 00e33023 sd a4,0(t1) + 83f4f314: 01f7bc23 sd t6,24(a5) + 83f4f318: 00cfb423 sd a2,8(t6) + 83f4f31c: ea90 sd a2,16(a3) + 83f4f31e: 6fb4 ld a3,88(a5) + 83f4f320: 00269713 slli a4,a3,0x2 + 83f4f324: 9736 add a4,a4,a3 + 83f4f326: 070e slli a4,a4,0x3 + 83f4f328: 972e add a4,a4,a1 + 83f4f32a: f798 sd a4,40(a5) + 83f4f32c: 6314 ld a3,0(a4) + 83f4f32e: 0685 addi a3,a3,1 + 83f4f330: e314 sd a3,0(a4) + 83f4f332: 000e3683 ld a3,0(t3) + 83f4f336: 6fb8 ld a4,88(a5) + 83f4f338: 6ebc ld a5,88(a3) + 83f4f33a: 00f76363 bltu a4,a5,83f4f340 + 83f4f33e: 4505 li a0,1 + 83f4f340: 0008b783 ld a5,0(a7) + 83f4f344: 639c ld a5,0(a5) + 83f4f346: cfbd beqz a5,83f4f3c4 + 83f4f348: 0008b783 ld a5,0(a7) + 83f4f34c: 6f9c ld a5,24(a5) + 83f4f34e: 6f9c ld a5,24(a5) + 83f4f350: 6798 ld a4,8(a5) + 83f4f352: 00878613 addi a2,a5,8 + 83f4f356: 03078293 addi t0,a5,48 + 83f4f35a: 0ce86563 bltu a6,a4,83f4f424 + 83f4f35e: 0107bf83 ld t6,16(a5) + 83f4f362: 6f94 ld a3,24(a5) + 83f4f364: 7798 ld a4,40(a5) + 83f4f366: 00dfb823 sd a3,16(t6) + 83f4f36a: 0107bf83 ld t6,16(a5) + 83f4f36e: 01f6b423 sd t6,8(a3) + 83f4f372: 6714 ld a3,8(a4) + 83f4f374: f4c696e3 bne a3,a2,83f4f2c0 + 83f4f378: 6f94 ld a3,24(a5) + 83f4f37a: e714 sd a3,8(a4) + 83f4f37c: b791 j 83f4f2c0 + 83f4f37e: 4501 li a0,0 + 83f4f380: 0000e597 auipc a1,0xe + 83f4f384: 49058593 addi a1,a1,1168 # 83f5d810 + 83f4f388: 00011e17 auipc t3,0x11 + 83f4f38c: 900e0e13 addi t3,t3,-1792 # 83f5fc88 + 83f4f390: 000e3783 ld a5,0(t3) + 83f4f394: 4685 li a3,1 + 83f4f396: 6fb8 ld a4,88(a5) + 83f4f398: 00271793 slli a5,a4,0x2 + 83f4f39c: 97ba add a5,a5,a4 + 83f4f39e: 078e slli a5,a5,0x3 + 83f4f3a0: 95be add a1,a1,a5 + 83f4f3a2: 619c ld a5,0(a1) + 83f4f3a4: 00f6f363 bgeu a3,a5,83f4f3aa + 83f4f3a8: 4505 li a0,1 + 83f4f3aa: 00011797 auipc a5,0x11 + 83f4f3ae: 92e7b783 ld a5,-1746(a5) # 83f5fcd8 + 83f4f3b2: c385 beqz a5,83f4f3d2 + 83f4f3b4: 00011797 auipc a5,0x11 + 83f4f3b8: 93c7b783 ld a5,-1732(a5) # 83f5fcf0 + 83f4f3bc: c399 beqz a5,83f4f3c2 + 83f4f3be: 4505 li a0,1 + 83f4f3c0: 8082 ret + 83f4f3c2: 8082 ret + 83f4f3c4: 57fd li a5,-1 + 83f4f3c6: 00ff3023 sd a5,0(t5) + 83f4f3ca: b7d9 j 83f4f390 + 83f4f3cc: 63b4 ld a3,64(a5) + 83f4f3ce: e714 sd a3,8(a4) + 83f4f3d0: bf19 j 83f4f2e6 + 83f4f3d2: 1101 addi sp,sp,-32 + 83f4f3d4: e42a sd a0,8(sp) + 83f4f3d6: ec06 sd ra,24(sp) + 83f4f3d8: abff30ef jal ra,83f42e96 + 83f4f3dc: 00011797 auipc a5,0x11 + 83f4f3e0: 9147b783 ld a5,-1772(a5) # 83f5fcf0 + 83f4f3e4: 6522 ld a0,8(sp) + 83f4f3e6: c391 beqz a5,83f4f3ea + 83f4f3e8: 4505 li a0,1 + 83f4f3ea: 60e2 ld ra,24(sp) + 83f4f3ec: 6105 addi sp,sp,32 + 83f4f3ee: 8082 ret + 83f4f3f0: 00011797 auipc a5,0x11 + 83f4f3f4: 8a078793 addi a5,a5,-1888 # 83f5fc90 + 83f4f3f8: 00011717 auipc a4,0x11 + 83f4f3fc: 8a070713 addi a4,a4,-1888 # 83f5fc98 + 83f4f400: 6390 ld a2,0(a5) + 83f4f402: 630c ld a1,0(a4) + 83f4f404: 00011697 auipc a3,0x11 + 83f4f408: 8cc68693 addi a3,a3,-1844 # 83f5fcd0 + 83f4f40c: e38c sd a1,0(a5) + 83f4f40e: e310 sd a2,0(a4) + 83f4f410: 6298 ld a4,0(a3) + 83f4f412: 0705 addi a4,a4,1 + 83f4f414: e298 sd a4,0(a3) + 83f4f416: 6398 ld a4,0(a5) + 83f4f418: 6318 ld a4,0(a4) + 83f4f41a: eb01 bnez a4,83f4f42a + 83f4f41c: 57fd li a5,-1 + 83f4f41e: 00ff3023 sd a5,0(t5) + 83f4f422: b59d j 83f4f288 + 83f4f424: 00ef3023 sd a4,0(t5) + 83f4f428: b7a5 j 83f4f390 + 83f4f42a: 639c ld a5,0(a5) + 83f4f42c: 6f9c ld a5,24(a5) + 83f4f42e: 639c ld a5,0(a5) + 83f4f430: 00ff3023 sd a5,0(t5) + 83f4f434: bd91 j 83f4f288 + +0000000083f4f436 : + 83f4f436: 00011717 auipc a4,0x11 + 83f4f43a: 87a70713 addi a4,a4,-1926 # 83f5fcb0 + 83f4f43e: 631c ld a5,0(a4) + 83f4f440: 0785 addi a5,a5,1 + 83f4f442: e31c sd a5,0(a4) + 83f4f444: 8082 ret + +0000000083f4f446 : + 83f4f446: 00011517 auipc a0,0x11 + 83f4f44a: 8a253503 ld a0,-1886(a0) # 83f5fce8 + 83f4f44e: 8082 ret + +0000000083f4f450 : + 83f4f450: 00011797 auipc a5,0x11 + 83f4f454: 8607b783 ld a5,-1952(a5) # 83f5fcb0 + 83f4f458: e399 bnez a5,83f4f45e + 83f4f45a: e11ff06f j 83f4f26a + 83f4f45e: 1141 addi sp,sp,-16 + 83f4f460: e406 sd ra,8(sp) + 83f4f462: 00011717 auipc a4,0x11 + 83f4f466: 87670713 addi a4,a4,-1930 # 83f5fcd8 + 83f4f46a: 631c ld a5,0(a4) + 83f4f46c: 0785 addi a5,a5,1 + 83f4f46e: e31c sd a5,0(a4) + 83f4f470: a27f30ef jal ra,83f42e96 + 83f4f474: 60a2 ld ra,8(sp) + 83f4f476: 4501 li a0,0 + 83f4f478: 0141 addi sp,sp,16 + 83f4f47a: 8082 ret + +0000000083f4f47c : + 83f4f47c: 00011797 auipc a5,0x11 + 83f4f480: 8347b783 ld a5,-1996(a5) # 83f5fcb0 + 83f4f484: c799 beqz a5,83f4f492 + 83f4f486: 4785 li a5,1 + 83f4f488: 00011717 auipc a4,0x11 + 83f4f48c: 86f73423 sd a5,-1944(a4) # 83f5fcf0 + 83f4f490: 8082 ret + 83f4f492: b6dff06f j 83f4effe + +0000000083f4f496 : + 83f4f496: 1141 addi sp,sp,-16 + 83f4f498: 00010797 auipc a5,0x10 + 83f4f49c: 7f07b783 ld a5,2032(a5) # 83f5fc88 + 83f4f4a0: e022 sd s0,0(sp) + 83f4f4a2: 842e mv s0,a1 + 83f4f4a4: 03078593 addi a1,a5,48 + 83f4f4a8: e406 sd ra,8(sp) + 83f4f4aa: 35f000ef jal ra,83f50008 + 83f4f4ae: 8522 mv a0,s0 + 83f4f4b0: 6402 ld s0,0(sp) + 83f4f4b2: 60a2 ld ra,8(sp) + 83f4f4b4: 4585 li a1,1 + 83f4f4b6: 0141 addi sp,sp,16 + 83f4f4b8: a5bff06f j 83f4ef12 + +0000000083f4f4bc : + 83f4f4bc: 00010797 auipc a5,0x10 + 83f4f4c0: 7cc78793 addi a5,a5,1996 # 83f5fc88 + 83f4f4c4: 6394 ld a3,0(a5) + 83f4f4c6: 6518 ld a4,8(a0) + 83f4f4c8: 0007b303 ld t1,0(a5) + 83f4f4cc: 0007b803 ld a6,0(a5) + 83f4f4d0: fe98 sd a4,56(a3) + 83f4f4d2: 01073883 ld a7,16(a4) + 83f4f4d6: 6394 ld a3,0(a5) + 83f4f4d8: 03080813 addi a6,a6,48 + 83f4f4dc: 05133023 sd a7,64(t1) + 83f4f4e0: 0007b303 ld t1,0(a5) + 83f4f4e4: 0108b423 sd a6,8(a7) + 83f4f4e8: 03068793 addi a5,a3,48 + 83f4f4ec: eb1c sd a5,16(a4) + 83f4f4ee: 04a33823 sd a0,80(t1) + 83f4f4f2: 611c ld a5,0(a0) + 83f4f4f4: 0785 addi a5,a5,1 + 83f4f4f6: e11c sd a5,0(a0) + 83f4f4f8: 852e mv a0,a1 + 83f4f4fa: c211 beqz a2,83f4f4fe + 83f4f4fc: 557d li a0,-1 + 83f4f4fe: 85b2 mv a1,a2 + 83f4f500: a13ff06f j 83f4ef12 + +0000000083f4f504 : + 83f4f504: 6d1c ld a5,24(a0) + 83f4f506: 6f9c ld a5,24(a5) + 83f4f508: 7f8c ld a1,56(a5) + 83f4f50a: 63b4 ld a3,64(a5) + 83f4f50c: 6bb8 ld a4,80(a5) + 83f4f50e: 03078613 addi a2,a5,48 + 83f4f512: e994 sd a3,16(a1) + 83f4f514: 7f8c ld a1,56(a5) + 83f4f516: e68c sd a1,8(a3) + 83f4f518: 6714 ld a3,8(a4) + 83f4f51a: 0cc68263 beq a3,a2,83f4f5de + 83f4f51e: 0407b823 sd zero,80(a5) + 83f4f522: 6314 ld a3,0(a4) + 83f4f524: 16fd addi a3,a3,-1 + 83f4f526: e314 sd a3,0(a4) + 83f4f528: 00010717 auipc a4,0x10 + 83f4f52c: 78873703 ld a4,1928(a4) # 83f5fcb0 + 83f4f530: eb41 bnez a4,83f4f5c0 + 83f4f532: 6b90 ld a2,16(a5) + 83f4f534: 6f94 ld a3,24(a5) + 83f4f536: 7798 ld a4,40(a5) + 83f4f538: 00878593 addi a1,a5,8 + 83f4f53c: ea14 sd a3,16(a2) + 83f4f53e: 6b90 ld a2,16(a5) + 83f4f540: e690 sd a2,8(a3) + 83f4f542: 6714 ld a3,8(a4) + 83f4f544: 0ab68063 beq a3,a1,83f4f5e4 + 83f4f548: 0207b423 sd zero,40(a5) + 83f4f54c: 6310 ld a2,0(a4) + 83f4f54e: 0000e697 auipc a3,0xe + 83f4f552: 2c268693 addi a3,a3,706 # 83f5d810 + 83f4f556: 00010817 auipc a6,0x10 + 83f4f55a: 76a80813 addi a6,a6,1898 # 83f5fcc0 + 83f4f55e: 167d addi a2,a2,-1 + 83f4f560: e310 sd a2,0(a4) + 83f4f562: 6fa8 ld a0,88(a5) + 83f4f564: 00083883 ld a7,0(a6) + 83f4f568: 00251713 slli a4,a0,0x2 + 83f4f56c: 972a add a4,a4,a0 + 83f4f56e: 070e slli a4,a4,0x3 + 83f4f570: 9736 add a4,a4,a3 + 83f4f572: 6710 ld a2,8(a4) + 83f4f574: 4705 li a4,1 + 83f4f576: 00a71733 sll a4,a4,a0 + 83f4f57a: eb90 sd a2,16(a5) + 83f4f57c: 6a08 ld a0,16(a2) + 83f4f57e: 01176733 or a4,a4,a7 + 83f4f582: 00e83023 sd a4,0(a6) + 83f4f586: ef88 sd a0,24(a5) + 83f4f588: e50c sd a1,8(a0) + 83f4f58a: ea0c sd a1,16(a2) + 83f4f58c: 6fb0 ld a2,88(a5) + 83f4f58e: 00261713 slli a4,a2,0x2 + 83f4f592: 9732 add a4,a4,a2 + 83f4f594: 070e slli a4,a4,0x3 + 83f4f596: 9736 add a4,a4,a3 + 83f4f598: f798 sd a4,40(a5) + 83f4f59a: 6314 ld a3,0(a4) + 83f4f59c: 0685 addi a3,a3,1 + 83f4f59e: e314 sd a3,0(a4) + 83f4f5a0: 00010697 auipc a3,0x10 + 83f4f5a4: 6e86b683 ld a3,1768(a3) # 83f5fc88 + 83f4f5a8: 6fb8 ld a4,88(a5) + 83f4f5aa: 6ebc ld a5,88(a3) + 83f4f5ac: 4501 li a0,0 + 83f4f5ae: 00e7f863 bgeu a5,a4,83f4f5be + 83f4f5b2: 4785 li a5,1 + 83f4f5b4: 00010717 auipc a4,0x10 + 83f4f5b8: 72f73e23 sd a5,1852(a4) # 83f5fcf0 + 83f4f5bc: 4505 li a0,1 + 83f4f5be: 8082 ret + 83f4f5c0: 0000e717 auipc a4,0xe + 83f4f5c4: 3e070713 addi a4,a4,992 # 83f5d9a0 + 83f4f5c8: 6714 ld a3,8(a4) + 83f4f5ca: 630c ld a1,0(a4) + 83f4f5cc: ff94 sd a3,56(a5) + 83f4f5ce: 6a88 ld a0,16(a3) + 83f4f5d0: 0585 addi a1,a1,1 + 83f4f5d2: e30c sd a1,0(a4) + 83f4f5d4: e3a8 sd a0,64(a5) + 83f4f5d6: e510 sd a2,8(a0) + 83f4f5d8: ea90 sd a2,16(a3) + 83f4f5da: ebb8 sd a4,80(a5) + 83f4f5dc: b7d1 j 83f4f5a0 + 83f4f5de: 63b4 ld a3,64(a5) + 83f4f5e0: e714 sd a3,8(a4) + 83f4f5e2: bf35 j 83f4f51e + 83f4f5e4: 6f94 ld a3,24(a5) + 83f4f5e6: e714 sd a3,8(a4) + 83f4f5e8: b785 j 83f4f548 + +0000000083f4f5ea : + 83f4f5ea: 00010717 auipc a4,0x10 + 83f4f5ee: 6e673703 ld a4,1766(a4) # 83f5fcd0 + 83f4f5f2: 00010797 auipc a5,0x10 + 83f4f5f6: 6f67b783 ld a5,1782(a5) # 83f5fce8 + 83f4f5fa: e118 sd a4,0(a0) + 83f4f5fc: e51c sd a5,8(a0) + 83f4f5fe: 8082 ret + +0000000083f4f600 : + 83f4f600: 4785 li a5,1 + 83f4f602: 00010717 auipc a4,0x10 + 83f4f606: 6ef73723 sd a5,1774(a4) # 83f5fcf0 + 83f4f60a: 8082 ret + +0000000083f4f60c : + 83f4f60c: c505 beqz a0,83f4f634 + 83f4f60e: 1101 addi sp,sp,-32 + 83f4f610: e822 sd s0,16(sp) + 83f4f612: ec06 sd ra,24(sp) + 83f4f614: e426 sd s1,8(sp) + 83f4f616: 655c ld a5,136(a0) + 83f4f618: 6d34 ld a3,88(a0) + 83f4f61a: 6158 ld a4,128(a0) + 83f4f61c: 17fd addi a5,a5,-1 + 83f4f61e: e55c sd a5,136(a0) + 83f4f620: 842a mv s0,a0 + 83f4f622: 00e68363 beq a3,a4,83f4f628 + 83f4f626: cb89 beqz a5,83f4f638 + 83f4f628: 60e2 ld ra,24(sp) + 83f4f62a: 6442 ld s0,16(sp) + 83f4f62c: 64a2 ld s1,8(sp) + 83f4f62e: 4501 li a0,0 + 83f4f630: 6105 addi sp,sp,32 + 83f4f632: 8082 ret + 83f4f634: 4501 li a0,0 + 83f4f636: 8082 ret + 83f4f638: 00850493 addi s1,a0,8 + 83f4f63c: 8526 mv a0,s1 + 83f4f63e: 1f9000ef jal ra,83f50036 + 83f4f642: 00010597 auipc a1,0x10 + 83f4f646: 67e58593 addi a1,a1,1662 # 83f5fcc0 + 83f4f64a: e911 bnez a0,83f4f65e + 83f4f64c: 6c34 ld a3,88(s0) + 83f4f64e: 6198 ld a4,0(a1) + 83f4f650: 4785 li a5,1 + 83f4f652: 00d797b3 sll a5,a5,a3 + 83f4f656: fff7c793 not a5,a5 + 83f4f65a: 8ff9 and a5,a5,a4 + 83f4f65c: e19c sd a5,0(a1) + 83f4f65e: 6050 ld a2,128(s0) + 83f4f660: 46a1 li a3,8 + 83f4f662: 0000e717 auipc a4,0xe + 83f4f666: 1ae70713 addi a4,a4,430 # 83f5d810 + 83f4f66a: 00261793 slli a5,a2,0x2 + 83f4f66e: 97b2 add a5,a5,a2 + 83f4f670: 8e91 sub a3,a3,a2 + 83f4f672: 078e slli a5,a5,0x3 + 83f4f674: ec30 sd a2,88(s0) + 83f4f676: f814 sd a3,48(s0) + 83f4f678: 97ba add a5,a5,a4 + 83f4f67a: 679c ld a5,8(a5) + 83f4f67c: 4685 li a3,1 + 83f4f67e: 00c696b3 sll a3,a3,a2 + 83f4f682: e81c sd a5,16(s0) + 83f4f684: 6b88 ld a0,16(a5) + 83f4f686: 0005b803 ld a6,0(a1) + 83f4f68a: ec08 sd a0,24(s0) + 83f4f68c: e504 sd s1,8(a0) + 83f4f68e: eb84 sd s1,16(a5) + 83f4f690: 6c30 ld a2,88(s0) + 83f4f692: 0106e6b3 or a3,a3,a6 + 83f4f696: e194 sd a3,0(a1) + 83f4f698: 00261793 slli a5,a2,0x2 + 83f4f69c: 97b2 add a5,a5,a2 + 83f4f69e: 078e slli a5,a5,0x3 + 83f4f6a0: 97ba add a5,a5,a4 + 83f4f6a2: f41c sd a5,40(s0) + 83f4f6a4: 6398 ld a4,0(a5) + 83f4f6a6: 4505 li a0,1 + 83f4f6a8: 0705 addi a4,a4,1 + 83f4f6aa: e398 sd a4,0(a5) + 83f4f6ac: 60e2 ld ra,24(sp) + 83f4f6ae: 6442 ld s0,16(sp) + 83f4f6b0: 64a2 ld s1,8(sp) + 83f4f6b2: 6105 addi sp,sp,32 + 83f4f6b4: 8082 ret + +0000000083f4f6b6 : + 83f4f6b6: 30047073 csrci mstatus,8 + 83f4f6ba: 00010797 auipc a5,0x10 + 83f4f6be: 6267b783 ld a5,1574(a5) # 83f5fce0 + 83f4f6c2: cb91 beqz a5,83f4f6d6 + 83f4f6c4: 00010797 auipc a5,0x10 + 83f4f6c8: 5c478793 addi a5,a5,1476 # 83f5fc88 + 83f4f6cc: 6398 ld a4,0(a5) + 83f4f6ce: 639c ld a5,0(a5) + 83f4f6d0: 7f3c ld a5,120(a4) + 83f4f6d2: 0785 addi a5,a5,1 + 83f4f6d4: ff3c sd a5,120(a4) + 83f4f6d6: 8082 ret + +0000000083f4f6d8 : + 83f4f6d8: 00010797 auipc a5,0x10 + 83f4f6dc: 6087b783 ld a5,1544(a5) # 83f5fce0 + 83f4f6e0: c38d beqz a5,83f4f702 + 83f4f6e2: 00010797 auipc a5,0x10 + 83f4f6e6: 5a678793 addi a5,a5,1446 # 83f5fc88 + 83f4f6ea: 6398 ld a4,0(a5) + 83f4f6ec: 7f38 ld a4,120(a4) + 83f4f6ee: cb11 beqz a4,83f4f702 + 83f4f6f0: 6398 ld a4,0(a5) + 83f4f6f2: 6394 ld a3,0(a5) + 83f4f6f4: 7f3c ld a5,120(a4) + 83f4f6f6: 17fd addi a5,a5,-1 + 83f4f6f8: ff3c sd a5,120(a4) + 83f4f6fa: 7ebc ld a5,120(a3) + 83f4f6fc: e399 bnez a5,83f4f702 + 83f4f6fe: 30046073 csrsi mstatus,8 + 83f4f702: 8082 ret + +0000000083f4f704 : + 83f4f704: 7139 addi sp,sp,-64 + 83f4f706: f822 sd s0,48(sp) + 83f4f708: fc06 sd ra,56(sp) + 83f4f70a: f426 sd s1,40(sp) + 83f4f70c: f04a sd s2,32(sp) + 83f4f70e: ec4e sd s3,24(sp) + 83f4f710: e852 sd s4,16(sp) + 83f4f712: e456 sd s5,8(sp) + 83f4f714: 842a mv s0,a0 + 83f4f716: 30047073 csrci mstatus,8 + 83f4f71a: 00010997 auipc s3,0x10 + 83f4f71e: 5c698993 addi s3,s3,1478 # 83f5fce0 + 83f4f722: 0009b783 ld a5,0(s3) + 83f4f726: 00010917 auipc s2,0x10 + 83f4f72a: 56290913 addi s2,s2,1378 # 83f5fc88 + 83f4f72e: cb81 beqz a5,83f4f73e + 83f4f730: 00093703 ld a4,0(s2) + 83f4f734: 00093783 ld a5,0(s2) + 83f4f738: 7f3c ld a5,120(a4) + 83f4f73a: 0785 addi a5,a5,1 + 83f4f73c: ff3c sd a5,120(a4) + 83f4f73e: 00010717 auipc a4,0x10 + 83f4f742: 56270713 addi a4,a4,1378 # 83f5fca0 + 83f4f746: 631c ld a5,0(a4) + 83f4f748: 0785 addi a5,a5,1 + 83f4f74a: e31c sd a5,0(a4) + 83f4f74c: 00093783 ld a5,0(s2) + 83f4f750: c3cd beqz a5,83f4f7f2 + 83f4f752: 0009b783 ld a5,0(s3) + 83f4f756: 6c34 ld a3,88(s0) + 83f4f758: 0000e497 auipc s1,0xe + 83f4f75c: 0b848493 addi s1,s1,184 # 83f5d810 + 83f4f760: c3c9 beqz a5,83f4f7e2 + 83f4f762: 00269793 slli a5,a3,0x2 + 83f4f766: 97b6 add a5,a5,a3 + 83f4f768: 078e slli a5,a5,0x3 + 83f4f76a: 97a6 add a5,a5,s1 + 83f4f76c: 6790 ld a2,8(a5) + 83f4f76e: 00840793 addi a5,s0,8 + 83f4f772: 00010597 auipc a1,0x10 + 83f4f776: 54e58593 addi a1,a1,1358 # 83f5fcc0 + 83f4f77a: e810 sd a2,16(s0) + 83f4f77c: 6a08 ld a0,16(a2) + 83f4f77e: 0005b803 ld a6,0(a1) + 83f4f782: 4705 li a4,1 + 83f4f784: ec08 sd a0,24(s0) + 83f4f786: e51c sd a5,8(a0) + 83f4f788: ea1c sd a5,16(a2) + 83f4f78a: 6c30 ld a2,88(s0) + 83f4f78c: 00d71733 sll a4,a4,a3 + 83f4f790: 01076733 or a4,a4,a6 + 83f4f794: 00261793 slli a5,a2,0x2 + 83f4f798: 97b2 add a5,a5,a2 + 83f4f79a: 078e slli a5,a5,0x3 + 83f4f79c: 97a6 add a5,a5,s1 + 83f4f79e: f41c sd a5,40(s0) + 83f4f7a0: e198 sd a4,0(a1) + 83f4f7a2: 6398 ld a4,0(a5) + 83f4f7a4: 00010617 auipc a2,0x10 + 83f4f7a8: 51460613 addi a2,a2,1300 # 83f5fcb8 + 83f4f7ac: 6214 ld a3,0(a2) + 83f4f7ae: 0705 addi a4,a4,1 + 83f4f7b0: e398 sd a4,0(a5) + 83f4f7b2: 0685 addi a3,a3,1 + 83f4f7b4: e214 sd a3,0(a2) + 83f4f7b6: f23ff0ef jal ra,83f4f6d8 + 83f4f7ba: 0009b783 ld a5,0(s3) + 83f4f7be: cb89 beqz a5,83f4f7d0 + 83f4f7c0: 00093703 ld a4,0(s2) + 83f4f7c4: 6c3c ld a5,88(s0) + 83f4f7c6: 6f38 ld a4,88(a4) + 83f4f7c8: 00f77463 bgeu a4,a5,83f4f7d0 + 83f4f7cc: 00000073 ecall + 83f4f7d0: 70e2 ld ra,56(sp) + 83f4f7d2: 7442 ld s0,48(sp) + 83f4f7d4: 74a2 ld s1,40(sp) + 83f4f7d6: 7902 ld s2,32(sp) + 83f4f7d8: 69e2 ld s3,24(sp) + 83f4f7da: 6a42 ld s4,16(sp) + 83f4f7dc: 6aa2 ld s5,8(sp) + 83f4f7de: 6121 addi sp,sp,64 + 83f4f7e0: 8082 ret + 83f4f7e2: 00093783 ld a5,0(s2) + 83f4f7e6: 6fbc ld a5,88(a5) + 83f4f7e8: f6f6ede3 bltu a3,a5,83f4f762 + 83f4f7ec: 00893023 sd s0,0(s2) + 83f4f7f0: bf8d j 83f4f762 + 83f4f7f2: 00893023 sd s0,0(s2) + 83f4f7f6: 6318 ld a4,0(a4) + 83f4f7f8: 4785 li a5,1 + 83f4f7fa: 00f70863 beq a4,a5,83f4f80a + 83f4f7fe: 6c34 ld a3,88(s0) + 83f4f800: 0000e497 auipc s1,0xe + 83f4f804: 01048493 addi s1,s1,16 # 83f5d810 + 83f4f808: bfa9 j 83f4f762 + 83f4f80a: 0000e497 auipc s1,0xe + 83f4f80e: 00648493 addi s1,s1,6 # 83f5d810 + 83f4f812: 8a26 mv s4,s1 + 83f4f814: 0000ea97 auipc s5,0xe + 83f4f818: 13ca8a93 addi s5,s5,316 # 83f5d950 + 83f4f81c: 8552 mv a0,s4 + 83f4f81e: 028a0a13 addi s4,s4,40 + 83f4f822: 7cc000ef jal ra,83f4ffee + 83f4f826: ff4a9be3 bne s5,s4,83f4f81c + 83f4f82a: 0000ea97 auipc s5,0xe + 83f4f82e: 126a8a93 addi s5,s5,294 # 83f5d950 + 83f4f832: 8556 mv a0,s5 + 83f4f834: 7ba000ef jal ra,83f4ffee + 83f4f838: 0000ea17 auipc s4,0xe + 83f4f83c: 140a0a13 addi s4,s4,320 # 83f5d978 + 83f4f840: 8552 mv a0,s4 + 83f4f842: 7ac000ef jal ra,83f4ffee + 83f4f846: 0000e517 auipc a0,0xe + 83f4f84a: 15a50513 addi a0,a0,346 # 83f5d9a0 + 83f4f84e: 7a0000ef jal ra,83f4ffee + 83f4f852: 0000e517 auipc a0,0xe + 83f4f856: 19e50513 addi a0,a0,414 # 83f5d9f0 + 83f4f85a: 794000ef jal ra,83f4ffee + 83f4f85e: 0000e517 auipc a0,0xe + 83f4f862: 16a50513 addi a0,a0,362 # 83f5d9c8 + 83f4f866: 788000ef jal ra,83f4ffee + 83f4f86a: 00010797 auipc a5,0x10 + 83f4f86e: 4357b323 sd s5,1062(a5) # 83f5fc90 + 83f4f872: 6c34 ld a3,88(s0) + 83f4f874: 00010797 auipc a5,0x10 + 83f4f878: 4347b223 sd s4,1060(a5) # 83f5fc98 + 83f4f87c: b5dd j 83f4f762 + +0000000083f4f87e : + 83f4f87e: 02080b63 beqz a6,83f4f8b4 + 83f4f882: 88be mv a7,a5 + 83f4f884: 4781 li a5,0 + 83f4f886: 02088863 beqz a7,83f4f8b6 + 83f4f88a: 1101 addi sp,sp,-32 + 83f4f88c: 07183023 sd a7,96(a6) + 83f4f890: 4889 li a7,2 + 83f4f892: 003c addi a5,sp,8 + 83f4f894: 09180fa3 sb a7,159(a6) + 83f4f898: ec06 sd ra,24(sp) + 83f4f89a: e822 sd s0,16(sp) + 83f4f89c: 8442 mv s0,a6 + 83f4f89e: 811ff0ef jal ra,83f4f0ae + 83f4f8a2: 8522 mv a0,s0 + 83f4f8a4: e61ff0ef jal ra,83f4f704 + 83f4f8a8: 67a2 ld a5,8(sp) + 83f4f8aa: 60e2 ld ra,24(sp) + 83f4f8ac: 6442 ld s0,16(sp) + 83f4f8ae: 853e mv a0,a5 + 83f4f8b0: 6105 addi sp,sp,32 + 83f4f8b2: 8082 ret + 83f4f8b4: 4781 li a5,0 + 83f4f8b6: 853e mv a0,a5 + 83f4f8b8: 8082 ret + +0000000083f4f8ba : + 83f4f8ba: 715d addi sp,sp,-80 + 83f4f8bc: f44e sd s3,40(sp) + 83f4f8be: 89aa mv s3,a0 + 83f4f8c0: 00361513 slli a0,a2,0x3 + 83f4f8c4: fc26 sd s1,56(sp) + 83f4f8c6: f052 sd s4,32(sp) + 83f4f8c8: ec56 sd s5,24(sp) + 83f4f8ca: e85a sd s6,16(sp) + 83f4f8cc: e45e sd s7,8(sp) + 83f4f8ce: e486 sd ra,72(sp) + 83f4f8d0: e0a2 sd s0,64(sp) + 83f4f8d2: f84a sd s2,48(sp) + 83f4f8d4: 84b2 mv s1,a2 + 83f4f8d6: 8a2e mv s4,a1 + 83f4f8d8: 8ab6 mv s5,a3 + 83f4f8da: 8b3a mv s6,a4 + 83f4f8dc: 8bbe mv s7,a5 + 83f4f8de: ca7fe0ef jal ra,83f4e584 + 83f4f8e2: c139 beqz a0,83f4f928 + 83f4f8e4: 842a mv s0,a0 + 83f4f8e6: 0a800513 li a0,168 + 83f4f8ea: c9bfe0ef jal ra,83f4e584 + 83f4f8ee: 892a mv s2,a0 + 83f4f8f0: cd15 beqz a0,83f4f92c + 83f4f8f2: 882a mv a6,a0 + 83f4f8f4: 87de mv a5,s7 + 83f4f8f6: 875a mv a4,s6 + 83f4f8f8: 86d6 mv a3,s5 + 83f4f8fa: 8626 mv a2,s1 + 83f4f8fc: 85d2 mv a1,s4 + 83f4f8fe: f120 sd s0,96(a0) + 83f4f900: 08050fa3 sb zero,159(a0) + 83f4f904: 854e mv a0,s3 + 83f4f906: fa8ff0ef jal ra,83f4f0ae + 83f4f90a: 854a mv a0,s2 + 83f4f90c: df9ff0ef jal ra,83f4f704 + 83f4f910: 4505 li a0,1 + 83f4f912: 60a6 ld ra,72(sp) + 83f4f914: 6406 ld s0,64(sp) + 83f4f916: 74e2 ld s1,56(sp) + 83f4f918: 7942 ld s2,48(sp) + 83f4f91a: 79a2 ld s3,40(sp) + 83f4f91c: 7a02 ld s4,32(sp) + 83f4f91e: 6ae2 ld s5,24(sp) + 83f4f920: 6b42 ld s6,16(sp) + 83f4f922: 6ba2 ld s7,8(sp) + 83f4f924: 6161 addi sp,sp,80 + 83f4f926: 8082 ret + 83f4f928: 557d li a0,-1 + 83f4f92a: b7e5 j 83f4f912 + 83f4f92c: 8522 mv a0,s0 + 83f4f92e: dbdfe0ef jal ra,83f4e6ea + 83f4f932: 557d li a0,-1 + 83f4f934: bff9 j 83f4f912 + +0000000083f4f936 : + 83f4f936: 7179 addi sp,sp,-48 + 83f4f938: 0050 addi a2,sp,4 + 83f4f93a: 080c addi a1,sp,16 + 83f4f93c: 0028 addi a0,sp,8 + 83f4f93e: f022 sd s0,32(sp) + 83f4f940: f406 sd ra,40(sp) + 83f4f942: e402 sd zero,8(sp) + 83f4f944: e802 sd zero,16(sp) + 83f4f946: d52f30ef jal ra,83f42e98 + 83f4f94a: 6422 ld s0,8(sp) + 83f4f94c: c02d beqz s0,83f4f9ae + 83f4f94e: 6542 ld a0,16(sp) + 83f4f950: cd39 beqz a0,83f4f9ae + 83f4f952: 4612 lw a2,4(sp) + 83f4f954: f028 sd a0,96(s0) + 83f4f956: 4509 li a0,2 + 83f4f958: 083c addi a5,sp,24 + 83f4f95a: 8822 mv a6,s0 + 83f4f95c: 4701 li a4,0 + 83f4f95e: 4681 li a3,0 + 83f4f960: 00003597 auipc a1,0x3 + 83f4f964: 8b058593 addi a1,a1,-1872 # 83f52210 <__func__.1+0x18> + 83f4f968: 08a40fa3 sb a0,159(s0) + 83f4f96c: 00000517 auipc a0,0x0 + 83f4f970: 82a50513 addi a0,a0,-2006 # 83f4f196 + 83f4f974: f3aff0ef jal ra,83f4f0ae + 83f4f978: 8522 mv a0,s0 + 83f4f97a: d8bff0ef jal ra,83f4f704 + 83f4f97e: 67e2 ld a5,24(sp) + 83f4f980: c79d beqz a5,83f4f9ae + 83f4f982: 61a000ef jal ra,83f4ff9c + 83f4f986: 4785 li a5,1 + 83f4f988: 02f51363 bne a0,a5,83f4f9ae + 83f4f98c: 30047073 csrci mstatus,8 + 83f4f990: 57fd li a5,-1 + 83f4f992: 00010717 auipc a4,0x10 + 83f4f996: 32f73b23 sd a5,822(a4) # 83f5fcc8 + 83f4f99a: 00010797 auipc a5,0x10 + 83f4f99e: 34a7b323 sd a0,838(a5) # 83f5fce0 + 83f4f9a2: 00010797 auipc a5,0x10 + 83f4f9a6: 3407b323 sd zero,838(a5) # 83f5fce8 + 83f4f9aa: 726000ef jal ra,83f500d0 + 83f4f9ae: 70a2 ld ra,40(sp) + 83f4f9b0: 7402 ld s0,32(sp) + 83f4f9b2: 00004797 auipc a5,0x4 + 83f4f9b6: 81e7b783 ld a5,-2018(a5) # 83f531d0 + 83f4f9ba: 6145 addi sp,sp,48 + 83f4f9bc: 8082 ret + +0000000083f4f9be : + 83f4f9be: 7179 addi sp,sp,-48 + 83f4f9c0: f406 sd ra,40(sp) + 83f4f9c2: f022 sd s0,32(sp) + 83f4f9c4: ec26 sd s1,24(sp) + 83f4f9c6: e84a sd s2,16(sp) + 83f4f9c8: e44e sd s3,8(sp) + 83f4f9ca: e052 sd s4,0(sp) + 83f4f9cc: 30047073 csrci mstatus,8 + 83f4f9d0: 00010797 auipc a5,0x10 + 83f4f9d4: 3107b783 ld a5,784(a5) # 83f5fce0 + 83f4f9d8: cf81 beqz a5,83f4f9f0 + 83f4f9da: 00010897 auipc a7,0x10 + 83f4f9de: 2ae88893 addi a7,a7,686 # 83f5fc88 + 83f4f9e2: 0008b703 ld a4,0(a7) + 83f4f9e6: 0008b783 ld a5,0(a7) + 83f4f9ea: 7f3c ld a5,120(a4) + 83f4f9ec: 0785 addi a5,a5,1 + 83f4f9ee: ff3c sd a5,120(a4) + 83f4f9f0: 00010497 auipc s1,0x10 + 83f4f9f4: 2c048493 addi s1,s1,704 # 83f5fcb0 + 83f4f9f8: 609c ld a5,0(s1) + 83f4f9fa: 17fd addi a5,a5,-1 + 83f4f9fc: e09c sd a5,0(s1) + 83f4f9fe: 609c ld a5,0(s1) + 83f4fa00: 10079263 bnez a5,83f4fb04 + 83f4fa04: 00010797 auipc a5,0x10 + 83f4fa08: 29c7b783 ld a5,668(a5) # 83f5fca0 + 83f4fa0c: cfe5 beqz a5,83f4fb04 + 83f4fa0e: 0000e597 auipc a1,0xe + 83f4fa12: f9258593 addi a1,a1,-110 # 83f5d9a0 + 83f4fa16: 619c ld a5,0(a1) + 83f4fa18: 00010417 auipc s0,0x10 + 83f4fa1c: 2d840413 addi s0,s0,728 # 83f5fcf0 + 83f4fa20: 10078f63 beqz a5,83f4fb3e + 83f4fa24: 00010897 auipc a7,0x10 + 83f4fa28: 26488893 addi a7,a7,612 # 83f5fc88 + 83f4fa2c: 00010817 auipc a6,0x10 + 83f4fa30: 29480813 addi a6,a6,660 # 83f5fcc0 + 83f4fa34: 0000e517 auipc a0,0xe + 83f4fa38: ddc50513 addi a0,a0,-548 # 83f5d810 + 83f4fa3c: 00010417 auipc s0,0x10 + 83f4fa40: 2b440413 addi s0,s0,692 # 83f5fcf0 + 83f4fa44: 4305 li t1,1 + 83f4fa46: a069 j 83f4fad0 + 83f4fa48: 0407b823 sd zero,80(a5) + 83f4fa4c: 6314 ld a3,0(a4) + 83f4fa4e: 16fd addi a3,a3,-1 + 83f4fa50: e314 sd a3,0(a4) + 83f4fa52: 0107be03 ld t3,16(a5) + 83f4fa56: 6f94 ld a3,24(a5) + 83f4fa58: 7798 ld a4,40(a5) + 83f4fa5a: 00878613 addi a2,a5,8 + 83f4fa5e: 00de3823 sd a3,16(t3) + 83f4fa62: 0107be03 ld t3,16(a5) + 83f4fa66: 01c6b423 sd t3,8(a3) + 83f4fa6a: 6714 ld a3,8(a4) + 83f4fa6c: 0ac68863 beq a3,a2,83f4fb1c + 83f4fa70: 0207b423 sd zero,40(a5) + 83f4fa74: 6314 ld a3,0(a4) + 83f4fa76: 16fd addi a3,a3,-1 + 83f4fa78: e314 sd a3,0(a4) + 83f4fa7a: 6fb8 ld a4,88(a5) + 83f4fa7c: 00083e03 ld t3,0(a6) + 83f4fa80: 00271693 slli a3,a4,0x2 + 83f4fa84: 96ba add a3,a3,a4 + 83f4fa86: 068e slli a3,a3,0x3 + 83f4fa88: 96aa add a3,a3,a0 + 83f4fa8a: 6694 ld a3,8(a3) + 83f4fa8c: 00e31733 sll a4,t1,a4 + 83f4fa90: 01c76733 or a4,a4,t3 + 83f4fa94: eb94 sd a3,16(a5) + 83f4fa96: 0106be03 ld t3,16(a3) + 83f4fa9a: 00e83023 sd a4,0(a6) + 83f4fa9e: 01c7bc23 sd t3,24(a5) + 83f4faa2: 00ce3423 sd a2,8(t3) + 83f4faa6: ea90 sd a2,16(a3) + 83f4faa8: 6fb4 ld a3,88(a5) + 83f4faaa: 00269713 slli a4,a3,0x2 + 83f4faae: 9736 add a4,a4,a3 + 83f4fab0: 070e slli a4,a4,0x3 + 83f4fab2: 972a add a4,a4,a0 + 83f4fab4: f798 sd a4,40(a5) + 83f4fab6: 6314 ld a3,0(a4) + 83f4fab8: 0685 addi a3,a3,1 + 83f4faba: e314 sd a3,0(a4) + 83f4fabc: 0008b683 ld a3,0(a7) + 83f4fac0: 6fb8 ld a4,88(a5) + 83f4fac2: 6ebc ld a5,88(a3) + 83f4fac4: 00f76463 bltu a4,a5,83f4facc + 83f4fac8: 00643023 sd t1,0(s0) + 83f4facc: 619c ld a5,0(a1) + 83f4face: cbb1 beqz a5,83f4fb22 + 83f4fad0: 6d9c ld a5,24(a1) + 83f4fad2: 6f9c ld a5,24(a5) + 83f4fad4: 0387be03 ld t3,56(a5) + 83f4fad8: 63b4 ld a3,64(a5) + 83f4fada: 6bb8 ld a4,80(a5) + 83f4fadc: 03078613 addi a2,a5,48 + 83f4fae0: 00de3823 sd a3,16(t3) + 83f4fae4: 0387be03 ld t3,56(a5) + 83f4fae8: 01c6b423 sd t3,8(a3) + 83f4faec: 6714 ld a3,8(a4) + 83f4faee: f4c69de3 bne a3,a2,83f4fa48 + 83f4faf2: 63b4 ld a3,64(a5) + 83f4faf4: e714 sd a3,8(a4) + 83f4faf6: bf89 j 83f4fa48 + 83f4faf8: 00010797 auipc a5,0x10 + 83f4fafc: 1e07b023 sd zero,480(a5) # 83f5fcd8 + 83f4fb00: 601c ld a5,0(s0) + 83f4fb02: ebb5 bnez a5,83f4fb76 + 83f4fb04: 4401 li s0,0 + 83f4fb06: bd3ff0ef jal ra,83f4f6d8 + 83f4fb0a: 70a2 ld ra,40(sp) + 83f4fb0c: 8522 mv a0,s0 + 83f4fb0e: 7402 ld s0,32(sp) + 83f4fb10: 64e2 ld s1,24(sp) + 83f4fb12: 6942 ld s2,16(sp) + 83f4fb14: 69a2 ld s3,8(sp) + 83f4fb16: 6a02 ld s4,0(sp) + 83f4fb18: 6145 addi sp,sp,48 + 83f4fb1a: 8082 ret + 83f4fb1c: 6f94 ld a3,24(a5) + 83f4fb1e: e714 sd a3,8(a4) + 83f4fb20: bf81 j 83f4fa70 + 83f4fb22: 00010797 auipc a5,0x10 + 83f4fb26: 16e78793 addi a5,a5,366 # 83f5fc90 + 83f4fb2a: 6398 ld a4,0(a5) + 83f4fb2c: 6318 ld a4,0(a4) + 83f4fb2e: cb21 beqz a4,83f4fb7e + 83f4fb30: 639c ld a5,0(a5) + 83f4fb32: 6f9c ld a5,24(a5) + 83f4fb34: 639c ld a5,0(a5) + 83f4fb36: 00010717 auipc a4,0x10 + 83f4fb3a: 18f73923 sd a5,402(a4) # 83f5fcc8 + 83f4fb3e: 00010997 auipc s3,0x10 + 83f4fb42: 19a98993 addi s3,s3,410 # 83f5fcd8 + 83f4fb46: 0009b903 ld s2,0(s3) + 83f4fb4a: fa090be3 beqz s2,83f4fb00 + 83f4fb4e: 4a05 li s4,1 + 83f4fb50: a809 j 83f4fb62 + 83f4fb52: f18ff0ef jal ra,83f4f26a + 83f4fb56: c119 beqz a0,83f4fb5c + 83f4fb58: 01443023 sd s4,0(s0) + 83f4fb5c: 197d addi s2,s2,-1 + 83f4fb5e: f8090de3 beqz s2,83f4faf8 + 83f4fb62: 609c ld a5,0(s1) + 83f4fb64: d7fd beqz a5,83f4fb52 + 83f4fb66: 0009b783 ld a5,0(s3) + 83f4fb6a: 0785 addi a5,a5,1 + 83f4fb6c: 00f9b023 sd a5,0(s3) + 83f4fb70: b26f30ef jal ra,83f42e96 + 83f4fb74: b7e5 j 83f4fb5c + 83f4fb76: 00000073 ecall + 83f4fb7a: 4405 li s0,1 + 83f4fb7c: b769 j 83f4fb06 + 83f4fb7e: 57fd li a5,-1 + 83f4fb80: 00010717 auipc a4,0x10 + 83f4fb84: 14f73423 sd a5,328(a4) # 83f5fcc8 + 83f4fb88: bf5d j 83f4fb3e + +0000000083f4fb8a : + 83f4fb8a: e501 bnez a0,83f4fb92 + 83f4fb8c: 00000073 ecall + 83f4fb90: 8082 ret + 83f4fb92: 1141 addi sp,sp,-16 + 83f4fb94: e406 sd ra,8(sp) + 83f4fb96: 00010717 auipc a4,0x10 + 83f4fb9a: 11a70713 addi a4,a4,282 # 83f5fcb0 + 83f4fb9e: 631c ld a5,0(a4) + 83f4fba0: 0785 addi a5,a5,1 + 83f4fba2: e31c sd a5,0(a4) + 83f4fba4: 4581 li a1,0 + 83f4fba6: b6cff0ef jal ra,83f4ef12 + 83f4fbaa: e15ff0ef jal ra,83f4f9be + 83f4fbae: e119 bnez a0,83f4fbb4 + 83f4fbb0: 00000073 ecall + 83f4fbb4: 60a2 ld ra,8(sp) + 83f4fbb6: 0141 addi sp,sp,16 + 83f4fbb8: 8082 ret + +0000000083f4fbba : + 83f4fbba: 1141 addi sp,sp,-16 + 83f4fbbc: e406 sd ra,8(sp) + 83f4fbbe: e022 sd s0,0(sp) + 83f4fbc0: 87aa mv a5,a0 + 83f4fbc2: 30047073 csrci mstatus,8 + 83f4fbc6: 00010697 auipc a3,0x10 + 83f4fbca: 11a6b683 ld a3,282(a3) # 83f5fce0 + 83f4fbce: 00010717 auipc a4,0x10 + 83f4fbd2: 0ba70713 addi a4,a4,186 # 83f5fc88 + 83f4fbd6: c691 beqz a3,83f4fbe2 + 83f4fbd8: 6310 ld a2,0(a4) + 83f4fbda: 6314 ld a3,0(a4) + 83f4fbdc: 7e34 ld a3,120(a2) + 83f4fbde: 0685 addi a3,a3,1 + 83f4fbe0: fe34 sd a3,120(a2) + 83f4fbe2: 00010697 auipc a3,0x10 + 83f4fbe6: 10668693 addi a3,a3,262 # 83f5fce8 + 83f4fbea: 6288 ld a0,0(a3) + 83f4fbec: 6310 ld a2,0(a4) + 83f4fbee: 0a064603 lbu a2,160(a2) + 83f4fbf2: ce01 beqz a2,83f4fc0a + 83f4fbf4: 631c ld a5,0(a4) + 83f4fbf6: 4405 li s0,1 + 83f4fbf8: 0a078023 sb zero,160(a5) + 83f4fbfc: addff0ef jal ra,83f4f6d8 + 83f4fc00: 60a2 ld ra,8(sp) + 83f4fc02: 8522 mv a0,s0 + 83f4fc04: 6402 ld s0,0(sp) + 83f4fc06: 0141 addi sp,sp,16 + 83f4fc08: 8082 ret + 83f4fc0a: 6198 ld a4,0(a1) + 83f4fc0c: 567d li a2,-1 + 83f4fc0e: 4401 li s0,0 + 83f4fc10: fec706e3 beq a4,a2,83f4fbfc + 83f4fc14: 00010817 auipc a6,0x10 + 83f4fc18: 0bc80813 addi a6,a6,188 # 83f5fcd0 + 83f4fc1c: 00083883 ld a7,0(a6) + 83f4fc20: 0007b303 ld t1,0(a5) + 83f4fc24: 6790 ld a2,8(a5) + 83f4fc26: 01130e63 beq t1,a7,83f4fc42 + 83f4fc2a: 00c56c63 bltu a0,a2,83f4fc42 + 83f4fc2e: 0005b023 sd zero,0(a1) + 83f4fc32: aa7ff0ef jal ra,83f4f6d8 + 83f4fc36: 4405 li s0,1 + 83f4fc38: 60a2 ld ra,8(sp) + 83f4fc3a: 8522 mv a0,s0 + 83f4fc3c: 6402 ld s0,0(sp) + 83f4fc3e: 0141 addi sp,sp,16 + 83f4fc40: 8082 ret + 83f4fc42: 40c508b3 sub a7,a0,a2 + 83f4fc46: fee8f4e3 bgeu a7,a4,83f4fc2e + 83f4fc4a: 00083803 ld a6,0(a6) + 83f4fc4e: 8f09 sub a4,a4,a0 + 83f4fc50: 6294 ld a3,0(a3) + 83f4fc52: 9732 add a4,a4,a2 + 83f4fc54: e198 sd a4,0(a1) + 83f4fc56: 0107b023 sd a6,0(a5) + 83f4fc5a: e794 sd a3,8(a5) + 83f4fc5c: a7dff0ef jal ra,83f4f6d8 + 83f4fc60: 4401 li s0,0 + 83f4fc62: 60a2 ld ra,8(sp) + 83f4fc64: 8522 mv a0,s0 + 83f4fc66: 6402 ld s0,0(sp) + 83f4fc68: 0141 addi sp,sp,16 + 83f4fc6a: 8082 ret + +0000000083f4fc6c : + 83f4fc6c: 1101 addi sp,sp,-32 + 83f4fc6e: e822 sd s0,16(sp) + 83f4fc70: ec06 sd ra,24(sp) + 83f4fc72: e426 sd s1,8(sp) + 83f4fc74: e04a sd s2,0(sp) + 83f4fc76: 00010417 auipc s0,0x10 + 83f4fc7a: 09a40413 addi s0,s0,154 # 83f5fd10 + 83f4fc7e: a39ff0ef jal ra,83f4f6b6 + 83f4fc82: 601c ld a5,0(s0) + 83f4fc84: cb81 beqz a5,83f4fc94 + 83f4fc86: 6442 ld s0,16(sp) + 83f4fc88: 60e2 ld ra,24(sp) + 83f4fc8a: 64a2 ld s1,8(sp) + 83f4fc8c: 6902 ld s2,0(sp) + 83f4fc8e: 6105 addi sp,sp,32 + 83f4fc90: a49ff06f j 83f4f6d8 + 83f4fc94: 0000e917 auipc s2,0xe + 83f4fc98: e2490913 addi s2,s2,-476 # 83f5dab8 + 83f4fc9c: 854a mv a0,s2 + 83f4fc9e: 350000ef jal ra,83f4ffee + 83f4fca2: 0000e497 auipc s1,0xe + 83f4fca6: e3e48493 addi s1,s1,-450 # 83f5dae0 + 83f4fcaa: 8526 mv a0,s1 + 83f4fcac: 342000ef jal ra,83f4ffee + 83f4fcb0: 4701 li a4,0 + 83f4fcb2: 0000e697 auipc a3,0xe + 83f4fcb6: e5668693 addi a3,a3,-426 # 83f5db08 + 83f4fcba: 0000e617 auipc a2,0xe + 83f4fcbe: d5e60613 addi a2,a2,-674 # 83f5da18 + 83f4fcc2: 02000593 li a1,32 + 83f4fcc6: 4515 li a0,5 + 83f4fcc8: 00010797 auipc a5,0x10 + 83f4fccc: 0327b823 sd s2,48(a5) # 83f5fcf8 + 83f4fcd0: 00010797 auipc a5,0x10 + 83f4fcd4: 0297b823 sd s1,48(a5) # 83f5fd00 + 83f4fcd8: c6bfe0ef jal ra,83f4e942 + 83f4fcdc: e008 sd a0,0(s0) + 83f4fcde: d545 beqz a0,83f4fc86 + 83f4fce0: 00002597 auipc a1,0x2 + 83f4fce4: 53858593 addi a1,a1,1336 # 83f52218 <__func__.1+0x20> + 83f4fce8: 938ff0ef jal ra,83f4ee20 + 83f4fcec: bf69 j 83f4fc86 + +0000000083f4fcee : + 83f4fcee: 1101 addi sp,sp,-32 + 83f4fcf0: e822 sd s0,16(sp) + 83f4fcf2: e04a sd s2,0(sp) + 83f4fcf4: ec06 sd ra,24(sp) + 83f4fcf6: e426 sd s1,8(sp) + 83f4fcf8: 842a mv s0,a0 + 83f4fcfa: 8932 mv s2,a2 + 83f4fcfc: a031 j 83f4fd08 + 83f4fcfe: 02f76f63 bltu a4,a5,83f4fd3c + 83f4fd02: 603c ld a5,64(s0) + 83f4fd04: 9782 jalr a5 + 83f4fd06: 85a6 mv a1,s1 + 83f4fd08: 781c ld a5,48(s0) + 83f4fd0a: f000 sd s0,32(s0) + 83f4fd0c: 8522 mv a0,s0 + 83f4fd0e: 00b784b3 add s1,a5,a1 + 83f4fd12: e404 sd s1,8(s0) + 83f4fd14: 40b90733 sub a4,s2,a1 + 83f4fd18: fe9973e3 bgeu s2,s1,83f4fcfe + 83f4fd1c: 00b97463 bgeu s2,a1,83f4fd24 + 83f4fd20: feb4f1e3 bgeu s1,a1,83f4fd02 + 83f4fd24: 00840593 addi a1,s0,8 + 83f4fd28: 6442 ld s0,16(sp) + 83f4fd2a: 60e2 ld ra,24(sp) + 83f4fd2c: 64a2 ld s1,8(sp) + 83f4fd2e: 6902 ld s2,0(sp) + 83f4fd30: 00010517 auipc a0,0x10 + 83f4fd34: fc853503 ld a0,-56(a0) # 83f5fcf8 + 83f4fd38: 6105 addi sp,sp,32 + 83f4fd3a: a4f9 j 83f50008 + 83f4fd3c: 00840593 addi a1,s0,8 + 83f4fd40: 6442 ld s0,16(sp) + 83f4fd42: 60e2 ld ra,24(sp) + 83f4fd44: 64a2 ld s1,8(sp) + 83f4fd46: 6902 ld s2,0(sp) + 83f4fd48: 00010517 auipc a0,0x10 + 83f4fd4c: fb853503 ld a0,-72(a0) # 83f5fd00 + 83f4fd50: 6105 addi sp,sp,32 + 83f4fd52: ac5d j 83f50008 + +0000000083f4fd54 : + 83f4fd54: 1101 addi sp,sp,-32 + 83f4fd56: e426 sd s1,8(sp) + 83f4fd58: e04a sd s2,0(sp) + 83f4fd5a: ec06 sd ra,24(sp) + 83f4fd5c: e822 sd s0,16(sp) + 83f4fd5e: 00010797 auipc a5,0x10 + 83f4fd62: f9a7b783 ld a5,-102(a5) # 83f5fcf8 + 83f4fd66: 6f9c ld a5,24(a5) + 83f4fd68: 84aa mv s1,a0 + 83f4fd6a: 892e mv s2,a1 + 83f4fd6c: 6f80 ld s0,24(a5) + 83f4fd6e: 00840513 addi a0,s0,8 + 83f4fd72: 2c4000ef jal ra,83f50036 + 83f4fd76: 04844783 lbu a5,72(s0) + 83f4fd7a: 0047f713 andi a4,a5,4 + 83f4fd7e: ef01 bnez a4,83f4fd96 + 83f4fd80: 9bf9 andi a5,a5,-2 + 83f4fd82: 04f40423 sb a5,72(s0) + 83f4fd86: 603c ld a5,64(s0) + 83f4fd88: 8522 mv a0,s0 + 83f4fd8a: 6442 ld s0,16(sp) + 83f4fd8c: 60e2 ld ra,24(sp) + 83f4fd8e: 64a2 ld s1,8(sp) + 83f4fd90: 6902 ld s2,0(sp) + 83f4fd92: 6105 addi sp,sp,32 + 83f4fd94: 8782 jr a5 + 83f4fd96: 864a mv a2,s2 + 83f4fd98: 85a6 mv a1,s1 + 83f4fd9a: 8522 mv a0,s0 + 83f4fd9c: f53ff0ef jal ra,83f4fcee + 83f4fda0: b7dd j 83f4fd86 + +0000000083f4fda2 : + 83f4fda2: 7159 addi sp,sp,-112 + 83f4fda4: eca6 sd s1,88(sp) + 83f4fda6: e8ca sd s2,80(sp) + 83f4fda8: e4ce sd s3,72(sp) + 83f4fdaa: e0d2 sd s4,64(sp) + 83f4fdac: fc56 sd s5,56(sp) + 83f4fdae: f85a sd s6,48(sp) + 83f4fdb0: f486 sd ra,104(sp) + 83f4fdb2: f0a2 sd s0,96(sp) + 83f4fdb4: f45e sd s7,40(sp) + 83f4fdb6: 00010917 auipc s2,0x10 + 83f4fdba: f4290913 addi s2,s2,-190 # 83f5fcf8 + 83f4fdbe: 00010997 auipc s3,0x10 + 83f4fdc2: f4a98993 addi s3,s3,-182 # 83f5fd08 + 83f4fdc6: 00010a97 auipc s5,0x10 + 83f4fdca: f3aa8a93 addi s5,s5,-198 # 83f5fd00 + 83f4fdce: 00010497 auipc s1,0x10 + 83f4fdd2: f4248493 addi s1,s1,-190 # 83f5fd10 + 83f4fdd6: 00002a17 auipc s4,0x2 + 83f4fdda: 44aa0a13 addi s4,s4,1098 # 83f52220 <__func__.1+0x28> + 83f4fdde: 4b25 li s6,9 + 83f4fde0: 00093783 ld a5,0(s2) + 83f4fde4: 0007bb83 ld s7,0(a5) + 83f4fde8: 140b8c63 beqz s7,83f4ff40 + 83f4fdec: 6f9c ld a5,24(a5) + 83f4fdee: 0007bb83 ld s7,0(a5) + 83f4fdf2: e44ff0ef jal ra,83f4f436 + 83f4fdf6: e50ff0ef jal ra,83f4f446 + 83f4fdfa: 0009b783 ld a5,0(s3) + 83f4fdfe: 842a mv s0,a0 + 83f4fe00: 06f56763 bltu a0,a5,83f4fe6e + 83f4fe04: 00a9b023 sd a0,0(s3) + 83f4fe08: 4601 li a2,0 + 83f4fe0a: 17757763 bgeu a0,s7,83f4ff78 + 83f4fe0e: 6088 ld a0,0(s1) + 83f4fe10: 408b85b3 sub a1,s7,s0 + 83f4fe14: 88aff0ef jal ra,83f4ee9e + 83f4fe18: ba7ff0ef jal ra,83f4f9be + 83f4fe1c: e119 bnez a0,83f4fe22 + 83f4fe1e: 00000073 ecall + 83f4fe22: 6088 ld a0,0(s1) + 83f4fe24: 4601 li a2,0 + 83f4fe26: 858a mv a1,sp + 83f4fe28: e1ffe0ef jal ra,83f4ec46 + 83f4fe2c: d955 beqz a0,83f4fde0 + 83f4fe2e: 6782 ld a5,0(sp) + 83f4fe30: 6442 ld s0,16(sp) + 83f4fe32: 0e07ce63 bltz a5,83f4ff2e + 83f4fe36: 741c ld a5,40(s0) + 83f4fe38: c789 beqz a5,83f4fe42 + 83f4fe3a: 00840513 addi a0,s0,8 + 83f4fe3e: 1f8000ef jal ra,83f50036 + 83f4fe42: e04ff0ef jal ra,83f4f446 + 83f4fe46: 0009b783 ld a5,0(s3) + 83f4fe4a: 8baa mv s7,a0 + 83f4fe4c: 04f56563 bltu a0,a5,83f4fe96 + 83f4fe50: 6782 ld a5,0(sp) + 83f4fe52: 0179b023 sd s7,0(s3) + 83f4fe56: fcfb66e3 bltu s6,a5,83f4fe22 + 83f4fe5a: 078a slli a5,a5,0x2 + 83f4fe5c: 97d2 add a5,a5,s4 + 83f4fe5e: 439c lw a5,0(a5) + 83f4fe60: 97d2 add a5,a5,s4 + 83f4fe62: 8782 jr a5 + 83f4fe64: 6f9c ld a5,24(a5) + 83f4fe66: 55fd li a1,-1 + 83f4fe68: 6388 ld a0,0(a5) + 83f4fe6a: eebff0ef jal ra,83f4fd54 + 83f4fe6e: 00093783 ld a5,0(s2) + 83f4fe72: 6398 ld a4,0(a5) + 83f4fe74: fb65 bnez a4,83f4fe64 + 83f4fe76: 000ab703 ld a4,0(s5) + 83f4fe7a: 0089b023 sd s0,0(s3) + 83f4fe7e: 00fab023 sd a5,0(s5) + 83f4fe82: 00e93023 sd a4,0(s2) + 83f4fe86: b39ff0ef jal ra,83f4f9be + 83f4fe8a: bf61 j 83f4fe22 + 83f4fe8c: 6f9c ld a5,24(a5) + 83f4fe8e: 55fd li a1,-1 + 83f4fe90: 6388 ld a0,0(a5) + 83f4fe92: ec3ff0ef jal ra,83f4fd54 + 83f4fe96: 00093783 ld a5,0(s2) + 83f4fe9a: 6398 ld a4,0(a5) + 83f4fe9c: fb65 bnez a4,83f4fe8c + 83f4fe9e: 000ab703 ld a4,0(s5) + 83f4fea2: 00fab023 sd a5,0(s5) + 83f4fea6: 00e93023 sd a4,0(s2) + 83f4feaa: b75d j 83f4fe50 + 83f4feac: 04844703 lbu a4,72(s0) + 83f4feb0: 67a2 ld a5,8(sp) + 83f4feb2: 780c ld a1,48(s0) + 83f4feb4: 00176693 ori a3,a4,1 + 83f4feb8: 04d40423 sb a3,72(s0) + 83f4febc: 00b786b3 add a3,a5,a1 + 83f4fec0: e414 sd a3,8(s0) + 83f4fec2: f000 sd s0,32(s0) + 83f4fec4: 08dbef63 bltu s7,a3,83f4ff62 + 83f4fec8: 40fb87b3 sub a5,s7,a5 + 83f4fecc: 02b7eb63 bltu a5,a1,83f4ff02 + 83f4fed0: 00477793 andi a5,a4,4 + 83f4fed4: efcd bnez a5,83f4ff8e + 83f4fed6: 9b79 andi a4,a4,-2 + 83f4fed8: 04e40423 sb a4,72(s0) + 83f4fedc: 603c ld a5,64(s0) + 83f4fede: 8522 mv a0,s0 + 83f4fee0: 9782 jalr a5 + 83f4fee2: b781 j 83f4fe22 + 83f4fee4: 6722 ld a4,8(sp) + 83f4fee6: 04844783 lbu a5,72(s0) + 83f4feea: f000 sd s0,32(s0) + 83f4feec: 017706b3 add a3,a4,s7 + 83f4fef0: 0017e793 ori a5,a5,1 + 83f4fef4: 04f40423 sb a5,72(s0) + 83f4fef8: f818 sd a4,48(s0) + 83f4fefa: e414 sd a3,8(s0) + 83f4fefc: 06dbe763 bltu s7,a3,83f4ff6a + 83f4ff00: d30d beqz a4,83f4fe22 + 83f4ff02: 000ab503 ld a0,0(s5) + 83f4ff06: 00840593 addi a1,s0,8 + 83f4ff0a: 0fe000ef jal ra,83f50008 + 83f4ff0e: bf11 j 83f4fe22 + 83f4ff10: 04844783 lbu a5,72(s0) + 83f4ff14: 9bf9 andi a5,a5,-2 + 83f4ff16: 04f40423 sb a5,72(s0) + 83f4ff1a: b721 j 83f4fe22 + 83f4ff1c: 04844783 lbu a5,72(s0) + 83f4ff20: 0027f713 andi a4,a5,2 + 83f4ff24: c32d beqz a4,83f4ff86 + 83f4ff26: 9bf9 andi a5,a5,-2 + 83f4ff28: 04f40423 sb a5,72(s0) + 83f4ff2c: bddd j 83f4fe22 + 83f4ff2e: 67a2 ld a5,8(sp) + 83f4ff30: 45e2 lw a1,24(sp) + 83f4ff32: 8522 mv a0,s0 + 83f4ff34: 9782 jalr a5 + 83f4ff36: 6782 ld a5,0(sp) + 83f4ff38: ee07c5e3 bltz a5,83f4fe22 + 83f4ff3c: 6442 ld s0,16(sp) + 83f4ff3e: bde5 j 83f4fe36 + 83f4ff40: cf6ff0ef jal ra,83f4f436 + 83f4ff44: d02ff0ef jal ra,83f4f446 + 83f4ff48: 0009b783 ld a5,0(s3) + 83f4ff4c: 842a mv s0,a0 + 83f4ff4e: f2f560e3 bltu a0,a5,83f4fe6e + 83f4ff52: 000ab783 ld a5,0(s5) + 83f4ff56: 0089b023 sd s0,0(s3) + 83f4ff5a: 6390 ld a2,0(a5) + 83f4ff5c: 00163613 seqz a2,a2 + 83f4ff60: b57d j 83f4fe0e + 83f4ff62: 00fbf463 bgeu s7,a5,83f4ff6a + 83f4ff66: f6f6f5e3 bgeu a3,a5,83f4fed0 + 83f4ff6a: 00093503 ld a0,0(s2) + 83f4ff6e: 00840593 addi a1,s0,8 + 83f4ff72: 096000ef jal ra,83f50008 + 83f4ff76: b575 j 83f4fe22 + 83f4ff78: a47ff0ef jal ra,83f4f9be + 83f4ff7c: 85a2 mv a1,s0 + 83f4ff7e: 855e mv a0,s7 + 83f4ff80: dd5ff0ef jal ra,83f4fd54 + 83f4ff84: bd79 j 83f4fe22 + 83f4ff86: 8522 mv a0,s0 + 83f4ff88: f62fe0ef jal ra,83f4e6ea + 83f4ff8c: bd59 j 83f4fe22 + 83f4ff8e: 67a2 ld a5,8(sp) + 83f4ff90: 865e mv a2,s7 + 83f4ff92: 8522 mv a0,s0 + 83f4ff94: 95be add a1,a1,a5 + 83f4ff96: d59ff0ef jal ra,83f4fcee + 83f4ff9a: b789 j 83f4fedc + +0000000083f4ff9c : + 83f4ff9c: 7179 addi sp,sp,-48 + 83f4ff9e: f406 sd ra,40(sp) + 83f4ffa0: ccdff0ef jal ra,83f4fc6c + 83f4ffa4: 00010797 auipc a5,0x10 + 83f4ffa8: d6c7b783 ld a5,-660(a5) # 83f5fd10 + 83f4ffac: 4501 li a0,0 + 83f4ffae: cf8d beqz a5,83f4ffe8 + 83f4ffb0: 0070 addi a2,sp,12 + 83f4ffb2: 082c addi a1,sp,24 + 83f4ffb4: 0808 addi a0,sp,16 + 83f4ffb6: e802 sd zero,16(sp) + 83f4ffb8: ec02 sd zero,24(sp) + 83f4ffba: efbf20ef jal ra,83f42eb4 + 83f4ffbe: 67e2 ld a5,24(sp) + 83f4ffc0: 6842 ld a6,16(sp) + 83f4ffc2: 4632 lw a2,12(sp) + 83f4ffc4: 471d li a4,7 + 83f4ffc6: 4681 li a3,0 + 83f4ffc8: 00002597 auipc a1,0x2 + 83f4ffcc: 28058593 addi a1,a1,640 # 83f52248 <__func__.1+0x50> + 83f4ffd0: 00000517 auipc a0,0x0 + 83f4ffd4: dd250513 addi a0,a0,-558 # 83f4fda2 + 83f4ffd8: 8a7ff0ef jal ra,83f4f87e + 83f4ffdc: 00010797 auipc a5,0x10 + 83f4ffe0: d2a7be23 sd a0,-708(a5) # 83f5fd18 + 83f4ffe4: 00a03533 snez a0,a0 + 83f4ffe8: 70a2 ld ra,40(sp) + 83f4ffea: 6145 addi sp,sp,48 + 83f4ffec: 8082 ret + +0000000083f4ffee : + 83f4ffee: 01050793 addi a5,a0,16 + 83f4fff2: 577d li a4,-1 + 83f4fff4: e51c sd a5,8(a0) + 83f4fff6: e918 sd a4,16(a0) + 83f4fff8: ed1c sd a5,24(a0) + 83f4fffa: f11c sd a5,32(a0) + 83f4fffc: 00053023 sd zero,0(a0) + 83f50000: 8082 ret + +0000000083f50002 : + 83f50002: 02053023 sd zero,32(a0) + 83f50006: 8082 ret + +0000000083f50008 : + 83f50008: 6190 ld a2,0(a1) + 83f5000a: 577d li a4,-1 + 83f5000c: 01050793 addi a5,a0,16 + 83f50010: 02e60063 beq a2,a4,83f50030 + 83f50014: 86be mv a3,a5 + 83f50016: 679c ld a5,8(a5) + 83f50018: 6398 ld a4,0(a5) + 83f5001a: fee67de3 bgeu a2,a4,83f50014 + 83f5001e: e59c sd a5,8(a1) + 83f50020: eb8c sd a1,16(a5) + 83f50022: e994 sd a3,16(a1) + 83f50024: e68c sd a1,8(a3) + 83f50026: f188 sd a0,32(a1) + 83f50028: 611c ld a5,0(a0) + 83f5002a: 0785 addi a5,a5,1 + 83f5002c: e11c sd a5,0(a0) + 83f5002e: 8082 ret + 83f50030: 7114 ld a3,32(a0) + 83f50032: 669c ld a5,8(a3) + 83f50034: b7ed j 83f5001e + +0000000083f50036 : + 83f50036: 6514 ld a3,8(a0) + 83f50038: 6918 ld a4,16(a0) + 83f5003a: 711c ld a5,32(a0) + 83f5003c: ea98 sd a4,16(a3) + 83f5003e: 6514 ld a3,8(a0) + 83f50040: e714 sd a3,8(a4) + 83f50042: 6798 ld a4,8(a5) + 83f50044: 00a70963 beq a4,a0,83f50056 + 83f50048: 02053023 sd zero,32(a0) + 83f5004c: 6398 ld a4,0(a5) + 83f5004e: 177d addi a4,a4,-1 + 83f50050: e398 sd a4,0(a5) + 83f50052: 6388 ld a0,0(a5) + 83f50054: 8082 ret + 83f50056: 6918 ld a4,16(a0) + 83f50058: e798 sd a4,8(a5) + 83f5005a: 02053023 sd zero,32(a0) + 83f5005e: 6398 ld a4,0(a5) + 83f50060: 177d addi a4,a4,-1 + 83f50062: e398 sd a4,0(a5) + 83f50064: 6388 ld a0,0(a5) + 83f50066: 8082 ret + +0000000083f50068 : + 83f50068: 1141 addi sp,sp,-16 + 83f5006a: f14027f3 csrr a5,mhartid + 83f5006e: c63e sw a5,12(sp) + 83f50070: 47b2 lw a5,12(sp) + 83f50072: 4732 lw a4,12(sp) + 83f50074: 0e8016b7 lui a3,0xe801 + 83f50078: 1782 slli a5,a5,0x20 + 83f5007a: 80068693 addi a3,a3,-2048 # e800800 + 83f5007e: 9381 srli a5,a5,0x20 + 83f50080: 97b6 add a5,a5,a3 + 83f50082: 02071693 slli a3,a4,0x20 + 83f50086: 01d6d713 srli a4,a3,0x1d + 83f5008a: 740046b7 lui a3,0x74004 + 83f5008e: 0691 addi a3,a3,4 + 83f50090: 9736 add a4,a4,a3 + 83f50092: 078e slli a5,a5,0x3 + 83f50094: 00010597 auipc a1,0x10 + 83f50098: c8c58593 addi a1,a1,-884 # 83f5fd20 + 83f5009c: 00010697 auipc a3,0x10 + 83f500a0: c8f6b623 sd a5,-884(a3) # 83f5fd28 + 83f500a4: e198 sd a4,0(a1) + 83f500a6: c0102773 rdtime a4 + 83f500aa: 667d lui a2,0x1f + 83f500ac: 84860613 addi a2,a2,-1976 # 1e848 <_EL1_STACK_SIZE+0x1e048> + 83f500b0: 00010697 auipc a3,0x10 + 83f500b4: c8068693 addi a3,a3,-896 # 83f5fd30 + 83f500b8: 9732 add a4,a4,a2 + 83f500ba: e298 sd a4,0(a3) + 83f500bc: 2701 sext.w a4,a4 + 83f500be: c398 sw a4,0(a5) + 83f500c0: 42d8 lw a4,4(a3) + 83f500c2: 619c ld a5,0(a1) + 83f500c4: c398 sw a4,0(a5) + 83f500c6: 629c ld a5,0(a3) + 83f500c8: 963e add a2,a2,a5 + 83f500ca: e290 sd a2,0(a3) + 83f500cc: 0141 addi sp,sp,16 + 83f500ce: 8082 ret + +0000000083f500d0 : + 83f500d0: 1141 addi sp,sp,-16 + 83f500d2: e406 sd ra,8(sp) + 83f500d4: f95ff0ef jal ra,83f50068 + 83f500d8: 6785 lui a5,0x1 + 83f500da: 8807879b addiw a5,a5,-1920 + 83f500de: 3047a073 csrs mie,a5 + 83f500e2: b1ef00ef jal ra,83f40400 + 83f500e6: 60a2 ld ra,8(sp) + 83f500e8: 4501 li a0,0 + 83f500ea: 0141 addi sp,sp,16 + 83f500ec: 8082 ret + +0000000083f500ee : + 83f500ee: c01027f3 rdtime a5 + 83f500f2: 00151713 slli a4,a0,0x1 + 83f500f6: 972a add a4,a4,a0 + 83f500f8: 070e slli a4,a4,0x3 + 83f500fa: 972a add a4,a4,a0 + 83f500fc: 973e add a4,a4,a5 + 83f500fe: c01027f3 rdtime a5 + 83f50102: fee7eee3 bltu a5,a4,83f500fe + 83f50106: 8082 ret diff --git a/freertos/cvitek/install/bin/cvirtos.elf b/freertos/cvitek/install/bin/cvirtos.elf new file mode 100755 index 0000000000000000000000000000000000000000..41f0addf9598cea817d8a06080c8d7ea03b852f3 GIT binary patch literal 767560 zcmeFZdt6h;_Bc9wCwor_sDS`Mf)$AnrPhNlu+q|iLVQ$kPD^>6TY3<9JD#t$2AhA{(v_O3D_^sI+s^@pUzk9#;cklhL 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configSYS_CLOCK_HZ ( 25000000 ) +#endif + +#endif // end of __ARCH_CPU__ diff --git a/freertos/cvitek/install/include/arch/arch_helpers.h b/freertos/cvitek/install/include/arch/arch_helpers.h new file mode 100644 index 000000000..e3d9f2b24 --- /dev/null +++ b/freertos/cvitek/install/include/arch/arch_helpers.h @@ -0,0 +1,12 @@ +#ifndef __ARCH_HELPERS_H__ +#define __ARCH_HELPERS_H__ +#include +#include + +void flush_dcache_range(uintptr_t addr, size_t size); +void clean_dcache_range(uintptr_t addr, size_t size); +void inv_dcache_range(uintptr_t addr, size_t size); +void enable_dcache(void); +void disable_dcache(void); + +#endif /* __ARCH_HELPERS_H__ */ diff --git a/freertos/cvitek/install/include/arch/arch_sleep.h b/freertos/cvitek/install/include/arch/arch_sleep.h new file mode 100644 index 000000000..d84cf207a --- /dev/null +++ b/freertos/cvitek/install/include/arch/arch_sleep.h @@ -0,0 +1,7 @@ +#ifndef _ARCH_SLEEP_H +#define _ARCH_SLEEP_H + +void arch_usleep(unsigned long useconds); +void arch_nsleep(unsigned long nseconds); + +#endif // end of _ARCH_SLEEP_H diff --git a/freertos/cvitek/install/include/arch/arch_time.h b/freertos/cvitek/install/include/arch/arch_time.h new file mode 100644 index 000000000..d07c28c33 --- /dev/null +++ b/freertos/cvitek/install/include/arch/arch_time.h @@ -0,0 +1,12 @@ +#ifndef __TIME_L_H__ +#define __TIME_L_H__ + +inline static unsigned long GetSysTime(void) +{ + unsigned long sys_tick = 0; + + asm volatile("rdtime %0": "=r"(sys_tick)); + return sys_tick; +} + +#endif diff --git a/freertos/cvitek/install/include/arch/core_rv64.h b/freertos/cvitek/install/include/arch/core_rv64.h new file mode 100644 index 000000000..bb5367c9e --- /dev/null +++ b/freertos/cvitek/install/include/arch/core_rv64.h @@ -0,0 +1,1068 @@ +/* + * Copyright (C) 2017-2019 Alibaba Group Holding Limited + */ + + +/****************************************************************************** + * @file core_rv64.h + * @brief CSI RV32 Core Peripheral Access Layer Header File + * @version V1.0 + * @date 01. Sep 2018 + ******************************************************************************/ + +#ifndef __CORE_RV32_H_GENERIC +#define __CORE_RV32_H_GENERIC + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/******************************************************************************* + * CSI definitions + ******************************************************************************/ +/** + \ingroup RV32 + @{ + */ + +#ifndef __RV64 +#define __RV64 (0x01U) +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __GNUC__ ) +#if defined (__VFP_FP__) && !defined(__SOFTFP__) +#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" +#endif +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_RV32_H_GENERIC */ + +#ifndef __CSI_GENERIC + +#ifndef __CORE_RV32_H_DEPENDANT +#define __CORE_RV32_H_DEPENDANT + +#ifdef __cplusplus +extern "C" { +#endif + +/* check device defines and use defaults */ +#ifndef __RV64_REV +#define __RV64_REV 0x0000U +#endif + +#ifndef __VIC_PRIO_BITS +#define __VIC_PRIO_BITS 2U +#endif + +#ifndef __Vendor_SysTickConfig +#define __Vendor_SysTickConfig 1U +#endif + +#ifndef __MPU_PRESENT +#define __MPU_PRESENT 1U +#endif + +#ifndef __ICACHE_PRESENT +#define __ICACHE_PRESENT 1U +#endif + +#ifndef __DCACHE_PRESENT +#define __DCACHE_PRESENT 1U +#endif + + +#ifndef __L2CACHE_PRESENT +#define __L2CACHE_PRESENT 1U +#endif + +#include + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CSI_glob_defs CSI Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus +#define __I volatile /*!< Defines 'read only' permissions */ +#else +#define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group C910 */ + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core CLINT Register + ******************************************************************************/ +/** + \defgroup CSI_core_register Defines and Type Definitions + \brief Type definitions and defines for CK80X processor based devices. +*/ + +/** + \ingroup CSI_core_register + \defgroup CSI_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \ingroup CSI_core_register + \defgroup CSI_CLINT Core-Local Interrupt Controller (CLINT) + \brief Type definitions for the CLINT Registers + @{ + */ + +/** + \brief Access to the structure of a vector interrupt controller. + */ +#if 0 +typedef struct { + uint32_t RESERVED0; /*!< Offset: 0x000 (R/W) CLINT configure register */ + __IOM uint32_t PLIC_PRIO[1023]; + __IOM uint32_t PLIC_IP[32]; + uint32_t RESERVED1[3972/4 - 1]; + __IOM uint32_t PLIC_H0_MIE[32]; + __IOM uint32_t PLIC_H0_SIE[32]; + __IOM uint32_t PLIC_H1_MIE[32]; + __IOM uint32_t PLIC_H1_SIE[32]; + __IOM uint32_t PLIC_H2_MIE[32]; + __IOM uint32_t PLIC_H2_SIE[32]; + __IOM uint32_t PLIC_H3_MIE[32]; + __IOM uint32_t PLIC_H3_SIE[32]; + uint32_t RESERVED2[(0x01FFFFC-0x00023FC)/4 - 1]; + __IOM uint32_t PLIC_PER; + __IOM uint32_t PLIC_H0_MTH; + __IOM uint32_t PLIC_H0_MCLAIM; + uint32_t RESERVED3[0xFFC/4 - 1]; + __IOM uint32_t PLIC_H0_STH; + __IOM uint32_t PLIC_H0_SCLAIM; + uint32_t RESERVED4[0xFFC/4 - 1]; + + __IOM uint32_t PLIC_H1_MTH; + __IOM uint32_t PLIC_H1_MCLAIM; + uint32_t RESERVED5[0xFFC/4 - 1]; + __IOM uint32_t PLIC_H1_STH; + __IOM uint32_t PLIC_H1_SCLAIM; + uint32_t RESERVED6[0xFFC/4 - 1]; + + __IOM uint32_t PLIC_H2_MTH; + __IOM uint32_t PLIC_H2_MCLAIM; + uint32_t RESERVED7[0xFFC/4 - 1]; + __IOM uint32_t PLIC_H2_STH; + __IOM uint32_t PLIC_H2_SCLAIM; + uint32_t RESERVED8[0xFFC/4 - 1]; + + __IOM uint32_t PLIC_H3_MTH; + __IOM uint32_t PLIC_H3_MCLAIM; + uint32_t RESERVED9[0xFFC/4 - 1]; + __IOM uint32_t PLIC_H3_STH; + __IOM uint32_t PLIC_H3_SCLAIM; + uint32_t RESERVED10[0xFFC/4 - 1]; +} PLIC_Type; + +#endif +/** + \ingroup CSI_core_register + \defgroup CSI_PMP Physical Memory Protection (PMP) + \brief Type definitions for the PMP Registers + @{ + */ + +#define PMP_PMPCFG_R_Pos 0U /*!< PMP PMPCFG: R Position */ +#define PMP_PMPCFG_R_Msk (0x1UL << PMP_PMPCFG_R_Pos) /*!< PMP PMPCFG: R Mask */ + +#define PMP_PMPCFG_W_Pos 1U /*!< PMP PMPCFG: W Position */ +#define PMP_PMPCFG_W_Msk (0x1UL << PMP_PMPCFG_W_Pos) /*!< PMP PMPCFG: W Mask */ + +#define PMP_PMPCFG_X_Pos 2U /*!< PMP PMPCFG: X Position */ +#define PMP_PMPCFG_X_Msk (0x1UL << PMP_PMPCFG_X_Pos) /*!< PMP PMPCFG: X Mask */ + +#define PMP_PMPCFG_A_Pos 3U /*!< PMP PMPCFG: A Position */ +#define PMP_PMPCFG_A_Msk (0x3UL << PMP_PMPCFG_A_Pos) /*!< PMP PMPCFG: A Mask */ + +#define PMP_PMPCFG_L_Pos 7U /*!< PMP PMPCFG: L Position */ +#define PMP_PMPCFG_L_Msk (0x1UL << PMP_PMPCFG_L_Pos) /*!< PMP PMPCFG: L Mask */ + +typedef enum { + REGION_SIZE_4B = -1, + REGION_SIZE_8B = 0, + REGION_SIZE_16B = 1, + REGION_SIZE_32B = 2, + REGION_SIZE_64B = 3, + REGION_SIZE_128B = 4, + REGION_SIZE_256B = 5, + REGION_SIZE_512B = 6, + REGION_SIZE_1KB = 7, + REGION_SIZE_2KB = 8, + REGION_SIZE_4KB = 9, + REGION_SIZE_8KB = 10, + REGION_SIZE_16KB = 11, + REGION_SIZE_32KB = 12, + REGION_SIZE_64KB = 13, + REGION_SIZE_128KB = 14, + REGION_SIZE_256KB = 15, + REGION_SIZE_512KB = 16, + REGION_SIZE_1MB = 17, + REGION_SIZE_2MB = 18, + REGION_SIZE_4MB = 19, + REGION_SIZE_8MB = 20, + REGION_SIZE_16MB = 21, + REGION_SIZE_32MB = 22, + REGION_SIZE_64MB = 23, + REGION_SIZE_128MB = 24, + REGION_SIZE_256MB = 25, + REGION_SIZE_512MB = 26, + REGION_SIZE_1GB = 27, + REGION_SIZE_2GB = 28, + REGION_SIZE_4GB = 29, + REGION_SIZE_8GB = 30, + REGION_SIZE_16GB = 31 +} region_size_e; + +typedef enum { + ADDRESS_MATCHING_TOR = 1, + ADDRESS_MATCHING_NAPOT = 3 +} address_matching_e; + +typedef struct { + uint32_t r: 1; /* readable enable */ + uint32_t w: 1; /* writeable enable */ + uint32_t x: 1; /* execable enable */ + address_matching_e a: 2; /* address matching mode */ + uint32_t reserved: 2; /* reserved */ + uint32_t l: 1; /* lock enable */ +} mpu_region_attr_t; + +/*@} end of group CSI_PMP */ + +/* CACHE Register Definitions */ +#define CACHE_MHCR_WBR_Pos 8U /*!< CACHE MHCR: WBR Position */ +#define CACHE_MHCR_WBR_Msk (0x1UL << CACHE_MHCR_WBR_Pos) /*!< CACHE MHCR: WBR Mask */ + +#define CACHE_MHCR_IBPE_Pos 7U /*!< CACHE MHCR: IBPE Position */ +#define CACHE_MHCR_IBPE_Msk (0x1UL << CACHE_MHCR_IBPE_Pos) /*!< CACHE MHCR: IBPE Mask */ + +#define CACHE_MHCR_L0BTB_Pos 6U /*!< CACHE MHCR: L0BTB Position */ +#define CACHE_MHCR_L0BTB_Msk (0x1UL << CACHE_MHCR_L0BTB_Pos) /*!< CACHE MHCR: BTB Mask */ + +#define CACHE_MHCR_BPE_Pos 5U /*!< CACHE MHCR: BPE Position */ +#define CACHE_MHCR_BPE_Msk (0x1UL << CACHE_MHCR_BPE_Pos) /*!< CACHE MHCR: BPE Mask */ + +#define CACHE_MHCR_RS_Pos 4U /*!< CACHE MHCR: RS Position */ +#define CACHE_MHCR_RS_Msk (0x1UL << CACHE_MHCR_RS_Pos) /*!< CACHE MHCR: RS Mask */ + +#define CACHE_MHCR_WB_Pos 3U /*!< CACHE MHCR: WB Position */ +#define CACHE_MHCR_WB_Msk (0x1UL << CACHE_MHCR_WB_Pos) /*!< CACHE MHCR: WB Mask */ + +#define CACHE_MHCR_WA_Pos 2U /*!< CACHE MHCR: WA Position */ +#define CACHE_MHCR_WA_Msk (0x1UL << CACHE_MHCR_WA_Pos) /*!< CACHE MHCR: WA Mask */ + +#define CACHE_MHCR_DE_Pos 1U /*!< CACHE MHCR: DE Position */ +#define CACHE_MHCR_DE_Msk (0x1UL << CACHE_MHCR_DE_Pos) /*!< CACHE MHCR: DE Mask */ + +#define CACHE_MHCR_IE_Pos 0U /*!< CACHE MHCR: IE Position */ +#define CACHE_MHCR_IE_Msk (0x1UL << CACHE_MHCR_IE_Pos) /*!< CACHE MHCR: IE Mask */ + +#define CACHE_INV_ADDR_Pos 5U +#define CACHE_INV_ADDR_Msk (0xFFFFFFFFUL << CACHE_INV_ADDR_Pos) + +/*@} end of group CSI_CACHE */ + + +/** + \ingroup CSI_core_register + \defgroup CSI_SysTick System Tick Timer (CORET) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief The data structure of the access system timer. + */ +#if 0 +typedef struct { + __IOM uint32_t MSIP0; + __IOM uint32_t MSIP1; + __IOM uint32_t MSIP2; + __IOM uint32_t MSIP3; + uint32_t RESERVED0[(0x4004000-0x400000C)/4 - 1]; + __IOM uint32_t MTIMECMPL0; + __IOM uint32_t MTIMECMPH0; + __IOM uint32_t MTIMECMPL1; + __IOM uint32_t MTIMECMPH1; + __IOM uint32_t MTIMECMPL2; + __IOM uint32_t MTIMECMPH2; + __IOM uint32_t MTIMECMPL3; + __IOM uint32_t MTIMECMPH3; + uint32_t RESERVED1[(0x400C000-0x400401C)/4 - 1]; + __IOM uint32_t SSIP0; + __IOM uint32_t SSIP1; + __IOM uint32_t SSIP2; + __IOM uint32_t SSIP3; + uint32_t RESERVED2[(0x400D000-0x400C00C)/4 - 1]; + __IOM uint32_t STIMECMPL0; + __IOM uint32_t STIMECMPH0; + __IOM uint32_t STIMECMPL1; + __IOM uint32_t STIMECMPH1; + __IOM uint32_t STIMECMPL2; + __IOM uint32_t STIMECMPH2; + __IOM uint32_t STIMECMPL3; + __IOM uint32_t STIMECMPH3; +} CORET_Type; +/*@} end of group CSI_SysTick */ +#endif + +/** + \ingroup CSI_core_register + \defgroup CSI_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CSI_core_bitfield */ + +/** + \ingroup CSI_core_register + \defgroup CSI_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ +//#define CORET_BASE (PLIC_BASE + 0x40000UL) /*!< CORET Base Address */ +#define PLIC_BASE (0x70000000UL) /*!< PLIC Base Address */ + +//#define CORET ((CORET_Type *) CORET_BASE ) /*!< SysTick configuration struct */ +#define CLINT ((CLINT_Type *) CLINT_BASE ) /*!< CLINT configuration struct */ +#define PLIC ((PLIC_Type *) PLIC_BASE ) /*!< PLIC configuration struct */ + +/*@} */ + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core VIC Functions + - Core CORET Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CSI_Core_FunctionInterface Functions and Instructions Reference +*/ + +/* ########################## VIC functions #################################### */ +/** + \ingroup CSI_Core_FunctionInterface + \defgroup CSI_Core_VICFunctions VIC Functions + \brief Functions that manage interrupts and exceptions via the VIC. + @{ + */ +#if 0 +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 5UL) ) +#define _IP2_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +/** + \brief Enable External Interrupt + \details Enable a device-specific interrupt in the VIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void csi_vic_enable_irq(int32_t IRQn) +{ + PLIC->PLIC_H0_MIE[IRQn/32] = PLIC->PLIC_H0_MIE[IRQn/32] | (0x1 << (IRQn%32)); +} + +/** + \brief Disable External Interrupt + \details Disable a device-specific interrupt in the VIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void csi_vic_disable_irq(int32_t IRQn) +{ + PLIC->PLIC_H0_MIE[IRQn/32] = PLIC->PLIC_H0_MIE[IRQn/32] & (~(0x1 << (IRQn%32))); +} + +/** + \brief Enable External Secure Interrupt + \details Enable a secure device-specific interrupt in the VIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void csi_vic_enable_sirq(int32_t IRQn) +{ + csi_vic_enable_irq(IRQn); +} + +/** + \brief Disable External Secure Interrupt + \details Disable a secure device-specific interrupt in the VIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void csi_vic_disable_sirq(int32_t IRQn) +{ + csi_vic_disable_irq(IRQn); +} + +/** + \brief Check Interrupt is Enabled or not + \details Read the enabled register in the VIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not enabled. + \return 1 Interrupt status is enabled. + */ +__STATIC_INLINE uint32_t csi_vic_get_enabled_irq(int32_t IRQn) +{ + return (uint32_t)((PLIC->PLIC_H0_MIE[IRQn/32] >> IRQn%32) & 0x1); +} + +/** + \brief Check Interrupt is Pending or not + \details Read the pending register in the VIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t csi_vic_get_pending_irq(int32_t IRQn) +{ + return (uint32_t)((PLIC->PLIC_IP[IRQn/32] >> IRQn%32) & 0x1); +} + +/** + \brief Set Pending Interrupt + \details Set the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void csi_vic_set_pending_irq(int32_t IRQn) +{ + PLIC->PLIC_IP[IRQn/32] = PLIC->PLIC_IP[IRQn/32] | (0x1 << (IRQn%32)); +} + +/** + \brief Clear Pending Interrupt + \details Clear the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void csi_vic_clear_pending_irq(int32_t IRQn) +{ + PLIC->PLIC_H0_SCLAIM = IRQn; +} + +/** + \brief Set Interrupt Priority + \details Set the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void csi_vic_set_prio(int32_t IRQn, uint32_t priority) +{ + PLIC->PLIC_PRIO[IRQn] = priority; +} + +/** + \brief Get Interrupt Priority + \details Read the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t csi_vic_get_prio(int32_t IRQn) +{ + uint32_t prio = PLIC->PLIC_PRIO[IRQn]; + return prio; +} + +/** + \brief Set interrupt handler + \details Set the interrupt handler according to the interrupt num, the handler will be filled in irq vectors. + \param [in] IRQn Interrupt number. + \param [in] handler Interrupt handler. + */ +__STATIC_INLINE void csi_vic_set_vector(int32_t IRQn, uint64_t handler) +{ + if (IRQn >= 0 && IRQn < 1024) { + uint64_t *vectors = (uint64_t *)__get_MTVT(); + vectors[IRQn] = handler; + } +} + +/** + \brief Get interrupt handler + \details Get the address of interrupt handler function. + \param [in] IRQn Interrupt number. + */ +__STATIC_INLINE uint32_t csi_vic_get_vector(int32_t IRQn) +{ + if (IRQn >= 0 && IRQn < 1024) { + uint64_t *vectors = (uint64_t *)__get_MTVT(); + return (uint32_t)vectors[IRQn]; + } + + return 0; +} + +/*@} end of CSI_Core_VICFunctions */ + +/* ########################## PMP functions #################################### */ +/** + \ingroup CSI_Core_FunctionInterface + \defgroup CSI_Core_PMPFunctions PMP Functions + \brief Functions that manage interrupts and exceptions via the VIC. + @{ + */ + +/** + \brief configure memory protected region. + \details + \param [in] idx memory protected region (0, 1, 2, ..., 15). + \param [in] base_addr base address must be aligned with page size. + \param [in] size \ref region_size_e. memory protected region size. + \param [in] attr \ref region_size_t. memory protected region attribute. + \param [in] enable enable or disable memory protected region. + */ +__STATIC_INLINE void csi_mpu_config_region(uint32_t idx, uint32_t base_addr, region_size_e size, + mpu_region_attr_t attr, uint32_t enable) +{ + uint8_t pmpxcfg = 0; + uint32_t addr = 0; + + if (idx > 15) { + return; + } + + if (!enable) { + attr.a = 0; + } + + if (attr.a == ADDRESS_MATCHING_TOR) { + addr = base_addr >> 2; + } else { + if (size == REGION_SIZE_4B) { + addr = base_addr >> 2; + attr.a = 2; + } else { + addr = ((base_addr >> 2) & (0xFFFFFFFFU - ((1 << (size + 1)) - 1))) | ((1 << size) - 1); + } + } + + __set_PMPADDRx(idx, addr); + + pmpxcfg |= (attr.r << PMP_PMPCFG_R_Pos) | (attr.w << PMP_PMPCFG_W_Pos) | + (attr.x << PMP_PMPCFG_X_Pos) | (attr.a << PMP_PMPCFG_A_Pos) | + (attr.l << PMP_PMPCFG_L_Pos); + + __set_PMPxCFG(idx, pmpxcfg); +} + +/** + \brief disable mpu region by idx. + \details + \param [in] idx memory protected region (0, 1, 2, ..., 15). + */ +__STATIC_INLINE void csi_mpu_disable_region(uint32_t idx) +{ + __set_PMPxCFG(idx, __get_PMPxCFG(idx) & (~PMP_PMPCFG_A_Msk)); +} + +/*@} end of CSI_Core_PMPFunctions */ + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CSI_Core_FunctionInterface + \defgroup CSI_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + + +/** + \brief CORE timer Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \param [in] IRQn core timer Interrupt number. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t csi_coret_config(uint32_t ticks, int32_t IRQn) +{ + uint64_t value = (((uint64_t)CORET->MTIMECMPH0) << 32) + (uint64_t)CORET->MTIMECMPL0; + + value = value + (uint64_t)ticks; + CORET->MTIMECMPH0 = (uint32_t)(value >> 32); + CORET->MTIMECMPL0 = (uint32_t)value; + return (0UL); +} + +/** + \brief get CORE timer reload value + \return CORE timer counter value. + */ +__STATIC_INLINE uint64_t csi_coret_get_load(void) +{ + uint64_t value = (((uint64_t)CORET->MTIMECMPH0) << 32) + (uint64_t)CORET->MTIMECMPL0; + return value; +} + +/** + \brief get CORE timer reload high value + \return CORE timer counter value. + */ +__STATIC_INLINE uint32_t csi_coret_get_loadh(void) +{ + uint64_t value = (((uint64_t)CORET->MTIMECMPH0) << 32) + (uint64_t)CORET->MTIMECMPL0; + return (value >> 32) & 0xFFFFFFFF; +} + +/** + \brief get CORE timer counter value + \return CORE timer counter value. + */ +__STATIC_INLINE uint64_t csi_coret_get_value(void) +{ + uint64_t result; + __ASM volatile("csrr %0, 0xc01" : "=r"(result)); + return result; +} + +/** + \brief get CORE timer counter high value + \return CORE timer counter value. + */ +__STATIC_INLINE uint32_t csi_coret_get_valueh(void) +{ + uint64_t result; + __ASM volatile("csrr %0, time" : "=r"(result)); + return (result >> 32) & 0xFFFFFFFF; +} + +/*@} end of CSI_core_DebugFunctions */ + +/* ########################## Cache functions #################################### */ +/** + \ingroup CSI_Core_FunctionInterface + \defgroup CSI_Core_CacheFunctions Cache Functions + \brief Functions that configure Instruction and Data cache. + @{ + */ + +/** + \brief Enable I-Cache + \details Turns on I-Cache + */ +__STATIC_INLINE void csi_icache_enable (void) +{ +#if (__ICACHE_PRESENT == 1U) + uint32_t cache; + __DSB(); + __ISB(); + __ICACHE_IALL(); + cache = __get_MHCR(); + cache |= CACHE_MHCR_IE_Msk; + __set_MHCR(cache); + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Disable I-Cache + \details Turns off I-Cache + */ +__STATIC_INLINE void csi_icache_disable (void) +{ +#if (__ICACHE_PRESENT == 1U) + uint32_t cache; + __DSB(); + __ISB(); + cache = __get_MHCR(); + cache &= ~CACHE_MHCR_IE_Msk; /* disable icache */ + __set_MHCR(cache); + __ICACHE_IALL(); /* invalidate all icache */ + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Invalidate I-Cache + \details Invalidates I-Cache + */ +__STATIC_INLINE void csi_icache_invalid (void) +{ +#if (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + __ICACHE_IALL(); /* invalidate all icache */ + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Enable D-Cache + \details Turns on D-Cache + \note I-Cache also turns on. + */ +__STATIC_INLINE void csi_dcache_enable (void) +{ +#if (__DCACHE_PRESENT == 1U) + uint32_t cache; + __DSB(); + __ISB(); + __DCACHE_IALL(); /* invalidate all dcache */ + cache = __get_MHCR(); + cache |= (CACHE_MHCR_DE_Msk | CACHE_MHCR_WB_Msk | CACHE_MHCR_WA_Msk | CACHE_MHCR_RS_Msk | CACHE_MHCR_BPE_Msk | CACHE_MHCR_L0BTB_Msk | CACHE_MHCR_IBPE_Msk | CACHE_MHCR_WBR_Msk); /* enable all Cache */ + __set_MHCR(cache); + + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Disable D-Cache + \details Turns off D-Cache + \note I-Cache also turns off. + */ +__STATIC_INLINE void csi_dcache_disable (void) +{ +#if (__DCACHE_PRESENT == 1U) + uint32_t cache; + __DSB(); + __ISB(); + cache = __get_MHCR(); + cache &= ~(uint32_t)CACHE_MHCR_DE_Msk; /* disable all Cache */ + __set_MHCR(cache); + __DCACHE_IALL(); /* invalidate all Cache */ + __DSB(); + __ISB(); +#endif +} + +/** + \brief Invalidate D-Cache + \details Invalidates D-Cache + \note I-Cache also invalid + */ +__STATIC_INLINE void csi_dcache_invalid (void) +{ +#if (__DCACHE_PRESENT == 1U) + __DSB(); + __ISB(); + __DCACHE_IALL(); /* invalidate all Cache */ + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Clean D-Cache + \details Cleans D-Cache + \note I-Cache also cleans + */ +__STATIC_INLINE void csi_dcache_clean (void) +{ +#if (__DCACHE_PRESENT == 1U) + __DSB(); + __ISB(); + __DCACHE_CALL(); /* clean all Cache */ + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Clean & Invalidate D-Cache + \details Cleans and Invalidates D-Cache + \note I-Cache also flush. + */ +__STATIC_INLINE void csi_dcache_clean_invalid (void) +{ +#if (__DCACHE_PRESENT == 1U) + __DSB(); + __ISB(); + __DCACHE_CIALL(); /* clean and inv all Cache */ + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Invalidate L2-Cache + \details Invalidates L2-Cache + \note + */ +__STATIC_INLINE void csi_l2cache_invalid (void) +{ +#if (__L2CACHE_PRESENT == 1U) + __DSB(); + __ISB(); + __L2CACHE_IALL(); /* invalidate l2 Cache */ + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Clean L2-Cache + \details Cleans L2-Cache + \note + */ +__STATIC_INLINE void csi_l2cache_clean (void) +{ +#if (__L2CACHE_PRESENT == 1U) + __DSB(); + __ISB(); + __L2CACHE_CALL(); /* clean l2 Cache */ + __DSB(); + __ISB(); +#endif +} + + +/** + \brief Clean & Invalidate L2-Cache + \details Cleans and Invalidates L2-Cache + \note + */ +__STATIC_INLINE void csi_l2cache_clean_invalid (void) +{ +#if (__L2CACHE_PRESENT == 1U) + __DSB(); + __ISB(); + __L2CACHE_CIALL(); /* clean and inv l2 Cache */ + __DSB(); + __ISB(); +#endif +} + +/** + \brief D-Cache Invalidate by address + \details Invalidates D-Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void csi_dcache_invalid_range (uint64_t *addr, int64_t dsize) +{ +#if (__DCACHE_PRESENT == 1U) + int64_t op_size = dsize + (uint64_t)addr % 64; + uint64_t op_addr = (uint64_t)addr; + int64_t linesize = 64; + + __DSB(); + + while (op_size > 0) { + __DCACHE_IPA(op_addr); + op_addr += linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); +#endif +} + + +/** + \brief D-Cache Clean by address + \details Cleans D-Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void csi_dcache_clean_range (uint64_t *addr, int64_t dsize) +{ + +#if (__DCACHE_PRESENT == 1) + int64_t op_size = dsize + (uint64_t)addr % 64; + uint64_t op_addr = (uint64_t) addr & CACHE_INV_ADDR_Msk; + int64_t linesize = 64; + + __DSB(); + + while (op_size > 0) { + __DCACHE_CPA(op_addr); + op_addr += linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); +#endif + +} + + +/** + \brief D-Cache Clean and Invalidate by address + \details Cleans and invalidates D_Cache for the given address + \param[in] addr address (aligned to 16-byte boundary) + \param[in] dsize size of memory block (aligned to 16-byte boundary) +*/ +__STATIC_INLINE void csi_dcache_clean_invalid_range (uint64_t *addr, int64_t dsize) +{ +#if (__DCACHE_PRESENT == 1U) + int64_t op_size = dsize + (uint64_t)addr % 64; + uint64_t op_addr = (uint64_t) addr; + int64_t linesize = 64; + + __DSB(); + + while (op_size > 0) { + __DCACHE_CIPA(op_addr); + op_addr += linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); +#endif +} + +/** + \brief setup cacheable range Cache + \details setup Cache range + */ +__STATIC_INLINE void csi_cache_set_range (uint64_t index, uint64_t baseAddr, uint64_t size, uint64_t enable) +{ + ; +} + +/** + \brief Enable cache profile + \details Turns on Cache profile + */ +__STATIC_INLINE void csi_cache_enable_profile (void) +{ + ; +} + +/** + \brief Disable cache profile + \details Turns off Cache profile + */ +__STATIC_INLINE void csi_cache_disable_profile (void) +{ + ; +} + +/** + \brief Reset cache profile + \details Reset Cache profile + */ +__STATIC_INLINE void csi_cache_reset_profile (void) +{ + ; +} + +/** + \brief cache access times + \details Cache access times + \note every 256 access add 1. + \return cache access times, actual times should be multiplied by 256 + */ +__STATIC_INLINE uint64_t csi_cache_get_access_time (void) +{ + return 0; +} + +/** + \brief cache miss times + \details Cache miss times + \note every 256 miss add 1. + \return cache miss times, actual times should be multiplied by 256 + */ +__STATIC_INLINE uint64_t csi_cache_get_miss_time (void) +{ + return 0; +} + +/*@} end of CSI_Core_CacheFunctions */ + +/*@} end of CSI_core_DebugFunctions */ + +/* ################################## IRQ Functions ############################################ */ + +/** + \brief Save the Irq context + \details save the psr result before disable irq. + */ +__STATIC_INLINE uint64_t csi_irq_save(void) +{ + uint64_t result; + result = __get_MSTATUS(); + __disable_irq(); + return(result); +} + +/** + \brief Restore the Irq context + \details restore saved primask state. + \param [in] irq_state psr irq state. + */ +__STATIC_INLINE void csi_irq_restore(uint64_t irq_state) +{ + __set_MSTATUS(irq_state); +} +#endif +/*@} end of IRQ Functions */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_RV32_H_DEPENDANT */ + +#endif /* __CSI_GENERIC */ diff --git a/freertos/cvitek/install/include/arch/csi_core.h b/freertos/cvitek/install/include/arch/csi_core.h new file mode 100644 index 000000000..aa6131f70 --- /dev/null +++ b/freertos/cvitek/install/include/arch/csi_core.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2017-2019 Alibaba Group Holding Limited + */ + + +/****************************************************************************** + * @file csi_core.h + * @brief CSI Core Layer Header File + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CORE_H_ +#define _CORE_H_ + +#include + +#if defined(__CK801__) || defined(__E801__) +#include +#elif defined(__CK802__) || defined(__E802__) || defined(__E802T__) || defined(__S802__) || defined(__S802T__) +#include +#elif defined(__CK804__) || defined(__E804D__) || defined(__E804DT__) || defined(__E804F__) || defined(__E804FT__) || defined (__E804DF__) || defined(__E804DFT__) +#include +#elif defined(__CK803__) || defined(__E803__) || defined(__E803T__) || defined(__S803__) || defined(__S803T__) +#include +#elif defined(__CK805__) || defined(__I805__) || defined(__I805F__) +#include +#elif defined(__CK610__) +#include +#elif defined(__CK810__) || defined(__C810__) || defined(__C810T__) || defined(__C810V__) || defined(__C810VT__) +#include +#elif defined(__CK807__) || defined(__C807__) || defined(__C807F__) || defined(__C807FV__) || defined(__R807__) +#include +#elif defined(__riscv) && defined(CONFIG_CSKY_CORETIM) +#include +#elif defined(__riscv) +#include +#endif + +#ifdef __riscv +#include +#else +#include +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* _CORE_H_ */ diff --git a/freertos/cvitek/install/include/arch/csi_rv64_gcc.h b/freertos/cvitek/install/include/arch/csi_rv64_gcc.h new file mode 100644 index 000000000..0a4142d52 --- /dev/null +++ b/freertos/cvitek/install/include/arch/csi_rv64_gcc.h @@ -0,0 +1,2819 @@ +/* + * Copyright (C) 2017-2019 Alibaba Group Holding Limited + */ + + +/****************************************************************************** + * @file csi_rv64_gcc.h + * @brief CSI Header File for GCC. + * @version V1.0 + * @date 01. Sep 2018 + ******************************************************************************/ + +#ifndef _CSI_RV32_GCC_H_ +#define _CSI_RV32_GCC_H_ + +#include + +#ifndef __ASM +#define __ASM __asm /*!< asm keyword for GNU Compiler */ +#endif + +#ifndef __INLINE +#define __INLINE inline /*!< inline keyword for GNU Compiler */ +#endif + +#ifndef __ALWAYS_STATIC_INLINE +#define __ALWAYS_STATIC_INLINE __attribute__((always_inline)) static inline +#endif + +#ifndef __STATIC_INLINE +#define __STATIC_INLINE static inline +#endif + +/* ########################### Core Function Access ########################### */ +/** \ingroup CSI_Core_FunctionInterface + \defgroup CSI_Core_RegAccFunctions CSI Core Register Access Functions + @{ + */ +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by setting the IE-bit in the PSR. + Can only be executed in Privileged modes. + */ +__ALWAYS_STATIC_INLINE void __enable_irq(void) +{ + __ASM volatile("csrs mstatus, 8"); +} + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by clearing the IE-bit in the PSR. + Can only be executed in Privileged modes. + */ +__ALWAYS_STATIC_INLINE void __disable_irq(void) +{ + __ASM volatile("csrc mstatus, 8"); +} + +/** + \brief Get MXSTATUS + \details Returns the content of the MXSTATUS Register. + \return MXSTATUS Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MXSTATUS(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mxstatus" : "=r"(result)); + return (result); +} + + + +/** + \brief Set MEPC + \details Writes the given value to the MEPC Register. + \param [in] mstatus MEPC Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MEPC(uint64_t mepc) +{ + __ASM volatile("csrw mepc, %0" : : "r"(mepc)); +} + + +/** + \brief Set MXSTATUS + \details Writes the given value to the MXSTATUS Register. + \param [in] mxstatus MXSTATUS Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MXSTATUS(uint64_t mxstatus) +{ + __ASM volatile("csrw mxstatus, %0" : : "r"(mxstatus)); +} + +/** + \brief Get MSTATUS + \details Returns the content of the MSTATUS Register. + \return MSTATUS Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MSTATUS(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mstatus" : "=r"(result)); + return (result); +} + +/** + \brief Set MSTATUS + \details Writes the given value to the MSTATUS Register. + \param [in] mstatus MSTATUS Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MSTATUS(uint64_t mstatus) +{ + __ASM volatile("csrw mstatus, %0" : : "r"(mstatus)); +} + +/** + \brief Get MHCR + \details Returns the content of the MHCR Register. + \return MHCR Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MHCR(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mhcr" : "=r"(result)); + return (result); +} + +/** + \brief Set MHCR + \details Writes the given value to the MHCR Register. + \param [in] mstatus MHCR Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MHCR(uint64_t mhcr) +{ + __ASM volatile("csrw mhcr, %0" : : "r"(mhcr)); +} + +/** + \brief Get MISA Register + \details Returns the content of the MISA Register. + \return MISA Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MISA(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, misa" : "=r"(result)); + return (result); +} + +/** + \brief Set MISA + \details Writes the given value to the MISA Register. + \param [in] misa MISA Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MISA(uint64_t misa) +{ + __ASM volatile("csrw misa, %0" : : "r"(misa)); +} + +/** + \brief Get MIE Register + \details Returns the content of the MIE Register. + \return MIE Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MIE(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mie" : "=r"(result)); + return (result); +} + +/** + \brief Set MIE + \details Writes the given value to the MIE Register. + \param [in] mie MIE Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MIE(uint64_t mie) +{ + __ASM volatile("csrw mie, %0" : : "r"(mie)); +} + +/** + \brief Get MTVEC Register + \details Returns the content of the MTVEC Register. + \return MTVEC Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MTVEC(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mtvec" : "=r"(result)); + return (result); +} + +/** + \brief Set MTVEC + \details Writes the given value to the MTVEC Register. + \param [in] mtvec MTVEC Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MTVEC(uint64_t mtvec) +{ + __ASM volatile("csrw mtvec, %0" : : "r"(mtvec)); +} + +/** + \brief Set MTVT + \details Writes the given value to the MTVT Register. + \param [in] mtvt MTVT Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MTVT(uint64_t mtvt) +{ + __ASM volatile("csrw mtvt, %0" : : "r"(mtvt)); +} + +/** + \brief Get MTVT Register + \details Returns the content of the MTVT Register. + \return MTVT Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MTVT(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mtvt" : "=r"(result)); + return (result); +} + +/** + \brief Get SP + \details Returns the content of the SP Register. + \return SP Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_SP(void) +{ + uint64_t result; + + __ASM volatile("mv %0, sp" : "=r"(result)); + return (result); +} + +/** + \brief Set SP + \details Writes the given value to the SP Register. + \param [in] sp SP Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_SP(uint64_t sp) +{ + __ASM volatile("mv sp, %0" : : "r"(sp): "sp"); +} + +/** + \brief Get MSCRATCH Register + \details Returns the content of the MSCRATCH Register. + \return MSCRATCH Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MSCRATCH(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mscratch" : "=r"(result)); + return (result); +} + +/** + \brief Set MSCRATCH + \details Writes the given value to the MSCRATCH Register. + \param [in] mscratch MSCRATCH Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MSCRATCH(uint64_t mscratch) +{ + __ASM volatile("csrw mscratch, %0" : : "r"(mscratch)); +} + +/** + \brief Get MCAUSE Register + \details Returns the content of the MCAUSE Register. + \return MCAUSE Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MCAUSE(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mcause" : "=r"(result)); + return (result); +} + +/** + \brief Get MNXTI Register + \details Returns the content of the MNXTI Register. + \return MNXTI Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MNXTI(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mnxti" : "=r"(result)); + return (result); +} + +/** + \brief Set MNXTI + \details Writes the given value to the MNXTI Register. + \param [in] mnxti MNXTI Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MNXTI(uint64_t mnxti) +{ + __ASM volatile("csrw mnxti, %0" : : "r"(mnxti)); +} + +/** + \brief Get MINTSTATUS Register + \details Returns the content of the MINTSTATUS Register. + \return MINTSTATUS Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MINTSTATUS(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mintstatus" : "=r"(result)); + return (result); +} + +/** + \brief Get MTVAL Register + \details Returns the content of the MTVAL Register. + \return MTVAL Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MTVAL(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mtval" : "=r"(result)); + return (result); +} + +/** + \brief Get MIP Register + \details Returns the content of the MIP Register. + \return MIP Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MIP(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mip" : "=r"(result)); + return (result); +} + +/** + \brief Set MIP + \details Writes the given value to the MIP Register. + \param [in] mip MIP Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_MIP(uint64_t mip) +{ + __ASM volatile("csrw mip, %0" : : "r"(mip)); +} + +/** + \brief Get MCYCLEL Register + \details Returns the content of the MCYCLEL Register. + \return MCYCLE Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MCYCLE(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mcycle" : "=r"(result)); + return (result); +} + +/** + \brief Get MCYCLEH Register + \details Returns the content of the MCYCLEH Register. + \return MCYCLEH Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MCYCLEH(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mcycleh" : "=r"(result)); + return (result); +} + +/** + \brief Get MINSTRET Register + \details Returns the content of the MINSTRET Register. + \return MINSTRET Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MINSTRET(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, minstret" : "=r"(result)); + return (result); +} + +/** + \brief Get MINSTRETH Register + \details Returns the content of the MINSTRETH Register. + \return MINSTRETH Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MINSTRETH(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, minstreth" : "=r"(result)); + return (result); +} + +/** + \brief Get MVENDORID Register + \details Returns the content of the MVENDROID Register. + \return MVENDORID Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MVENDORID(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mvendorid" : "=r"(result)); + return (result); +} + +/** + \brief Get MARCHID Register + \details Returns the content of the MARCHID Register. + \return MARCHID Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MARCHID(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, marchid" : "=r"(result)); + return (result); +} + +/** + \brief Get MIMPID Register + \details Returns the content of the MIMPID Register. + \return MIMPID Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MIMPID(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mimpid" : "=r"(result)); + return (result); +} + +/** + \brief Get MHARTID Register + \details Returns the content of the MHARTID Register. + \return MHARTID Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_MHARTID(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, mhartid" : "=r"(result)); + return (result); +} + +/** + \brief Get PMPCFGx Register + \details Returns the content of the PMPCFGx Register. + \return PMPCFGx Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_PMPCFG0(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpcfg0" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPCFG1(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpcfg1" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPCFG2(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpcfg2" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPCFG3(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpcfg3" : "=r"(result)); + return (result); +} + +/** + \brief Get PMPxCFG Register by index + \details Returns the content of the PMPxCFG Register. + \param [in] idx PMP region index + \return PMPxCFG Register value + */ +__STATIC_INLINE uint8_t __get_PMPxCFG(uint64_t idx) +{ + uint64_t pmpcfgx = 0; + + if (idx < 4) { + pmpcfgx = __get_PMPCFG0(); + } else if (idx >=4 && idx < 8) { + idx -= 4; + pmpcfgx = __get_PMPCFG1(); + } else if (idx >=8 && idx < 12) { + idx -= 8; + pmpcfgx = __get_PMPCFG2(); + } else if (idx >=12 && idx < 16) { + idx -= 12; + pmpcfgx = __get_PMPCFG3(); + } else { + return 0; + } + + return (uint8_t)((pmpcfgx & (0xFF << (idx << 3))) >> (idx << 3)); +} + +/** + \brief Set PMPCFGx + \details Writes the given value to the PMPCFGx Register. + \param [in] pmpcfg PMPCFGx Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_PMPCFG0(uint64_t pmpcfg) +{ + __ASM volatile("csrw pmpcfg0, %0" : : "r"(pmpcfg)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPCFG1(uint64_t pmpcfg) +{ + __ASM volatile("csrw pmpcfg1, %0" : : "r"(pmpcfg)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPCFG2(uint64_t pmpcfg) +{ + __ASM volatile("csrw pmpcfg2, %0" : : "r"(pmpcfg)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPCFG3(uint64_t pmpcfg) +{ + __ASM volatile("csrw pmpcfg3, %0" : : "r"(pmpcfg)); +} + +/** + \brief Set PMPxCFG by index + \details Writes the given value to the PMPxCFG Register. + \param [in] idx PMPx region index + \param [in] pmpxcfg PMPxCFG Register value to set + */ +__STATIC_INLINE void __set_PMPxCFG(uint64_t idx, uint8_t pmpxcfg) +{ + uint64_t pmpcfgx = 0; + + if (idx < 4) { + pmpcfgx = __get_PMPCFG0(); + pmpcfgx = (pmpcfgx & ~(0xFF << (idx << 3))) | (pmpxcfg << (idx << 3)); + __set_PMPCFG0(pmpcfgx); + } else if (idx >=4 && idx < 8) { + idx -= 4; + pmpcfgx = __get_PMPCFG1(); + pmpcfgx = (pmpcfgx & ~(0xFF << (idx << 3))) | (pmpxcfg << (idx << 3)); + __set_PMPCFG1(pmpcfgx); + } else if (idx >=8 && idx < 12) { + idx -= 8; + pmpcfgx = __get_PMPCFG2(); + pmpcfgx = (pmpcfgx & ~(0xFF << (idx << 3))) | (pmpxcfg << (idx << 3)); + __set_PMPCFG2(pmpcfgx); + } else if (idx >=12 && idx < 16) { + idx -= 12; + pmpcfgx = __get_PMPCFG3(); + pmpcfgx = (pmpcfgx & ~(0xFF << (idx << 3))) | (pmpxcfg << (idx << 3)); + __set_PMPCFG3(pmpcfgx); + } else { + return; + } +} + +/** + \brief Get PMPADDRx Register + \details Returns the content of the PMPADDRx Register. + \return PMPADDRx Register value + */ +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR0(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr0" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR1(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr1" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR2(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr2" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR3(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr3" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR4(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr4" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR5(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr5" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR6(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr6" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR7(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr7" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR8(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr8" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR9(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr9" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR10(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr10" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR11(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr11" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR12(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr12" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR13(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr13" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR14(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr14" : "=r"(result)); + return (result); +} + +__ALWAYS_STATIC_INLINE uint64_t __get_PMPADDR15(void) +{ + uint64_t result; + + __ASM volatile("csrr %0, pmpaddr15" : "=r"(result)); + return (result); +} + +/** + \brief Get PMPADDRx Register by index + \details Returns the content of the PMPADDRx Register. + \param [in] idx PMP region index + \return PMPADDRx Register value + */ +__STATIC_INLINE uint64_t __get_PMPADDRx(uint64_t idx) +{ + switch (idx) { + case 0: return __get_PMPADDR0(); + case 1: return __get_PMPADDR1(); + case 2: return __get_PMPADDR2(); + case 3: return __get_PMPADDR3(); + case 4: return __get_PMPADDR4(); + case 5: return __get_PMPADDR5(); + case 6: return __get_PMPADDR6(); + case 7: return __get_PMPADDR7(); + case 8: return __get_PMPADDR8(); + case 9: return __get_PMPADDR9(); + case 10: return __get_PMPADDR10(); + case 11: return __get_PMPADDR11(); + case 12: return __get_PMPADDR12(); + case 13: return __get_PMPADDR13(); + case 14: return __get_PMPADDR14(); + case 15: return __get_PMPADDR15(); + default: return 0; + } +} + +/** + \brief Set PMPADDRx + \details Writes the given value to the PMPADDRx Register. + \param [in] pmpaddr PMPADDRx Register value to set + */ +__ALWAYS_STATIC_INLINE void __set_PMPADDR0(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr0, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR1(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr1, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR2(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr2, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR3(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr3, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR4(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr4, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR5(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr5, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR6(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr6, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR7(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr7, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR8(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr8, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR9(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr9, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR10(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr10, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR11(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr11, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR12(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr12, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR13(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr13, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR14(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr14, %0" : : "r"(pmpaddr)); +} + +__ALWAYS_STATIC_INLINE void __set_PMPADDR15(uint64_t pmpaddr) +{ + __ASM volatile("csrw pmpaddr15, %0" : : "r"(pmpaddr)); +} + +/** + \brief Set PMPADDRx by index + \details Writes the given value to the PMPADDRx Register. + \param [in] idx PMP region index + \param [in] pmpaddr PMPADDRx Register value to set + */ +__STATIC_INLINE void __set_PMPADDRx(uint64_t idx, uint64_t pmpaddr) +{ + switch (idx) { + case 0: __set_PMPADDR0(pmpaddr); break; + case 1: __set_PMPADDR1(pmpaddr); break; + case 2: __set_PMPADDR2(pmpaddr); break; + case 3: __set_PMPADDR3(pmpaddr); break; + case 4: __set_PMPADDR4(pmpaddr); break; + case 5: __set_PMPADDR5(pmpaddr); break; + case 6: __set_PMPADDR6(pmpaddr); break; + case 7: __set_PMPADDR7(pmpaddr); break; + case 8: __set_PMPADDR8(pmpaddr); break; + case 9: __set_PMPADDR9(pmpaddr); break; + case 10: __set_PMPADDR10(pmpaddr); break; + case 11: __set_PMPADDR11(pmpaddr); break; + case 12: __set_PMPADDR12(pmpaddr); break; + case 13: __set_PMPADDR13(pmpaddr); break; + case 14: __set_PMPADDR14(pmpaddr); break; + case 15: __set_PMPADDR15(pmpaddr); break; + default: return; + } +} + +/** + \brief Enable interrupts and exceptions + \details Enables interrupts and exceptions by setting the IE-bit and EE-bit in the PSR. + Can only be executed in Privileged modes. + */ +__ALWAYS_STATIC_INLINE void __enable_excp_irq(void) +{ + __enable_irq(); +} + + +/** + \brief Disable interrupts and exceptions + \details Disables interrupts and exceptions by clearing the IE-bit and EE-bit in the PSR. + Can only be executed in Privileged modes. + */ +__ALWAYS_STATIC_INLINE void __disable_excp_irq(void) +{ + __disable_irq(); +} + +#define __CSI_GCC_OUT_REG(r) "=r" (r) +#define __CSI_GCC_USE_REG(r) "r" (r) + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +__ALWAYS_STATIC_INLINE void __NOP(void) +{ + __ASM volatile("nop"); +} + + +/** + \brief return from M-MODE + \details return from M-MODE. + */ +__ALWAYS_STATIC_INLINE void __MRET(void) +{ + __ASM volatile("mret"); +} + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +__ALWAYS_STATIC_INLINE void __WFI(void) +{ + __ASM volatile("wfi"); +} + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one interrupt occurs. + */ +__ALWAYS_STATIC_INLINE void __WAIT(void) +{ + __ASM volatile("wfi"); +} + +/** + \brief Doze For Interrupt + \details Doze For Interrupt is a hint instruction that suspends execution until one interrupt occurs. + */ +__ALWAYS_STATIC_INLINE void __DOZE(void) +{ + __ASM volatile("wfi"); +} + +/** + \brief Stop For Interrupt + \details Stop For Interrupt is a hint instruction that suspends execution until one interrupt occurs. + */ +__ALWAYS_STATIC_INLINE void __STOP(void) +{ + __ASM volatile("wfi"); +} + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +__ALWAYS_STATIC_INLINE void __ISB(void) +{ + __ASM volatile("fence"); +} + + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +__ALWAYS_STATIC_INLINE void __DSB(void) +{ + __ASM volatile("fence"); +} + +/** + \brief Invalid all icache + \details invalid all icache. + */ +__ALWAYS_STATIC_INLINE void __ICACHE_IALL(void) +{ + __ASM volatile("icache.iall"); +} + +/** + \brief Invalid Icache by addr + \details Invalid Icache by addr. + \param [in] addr operate addr + */ +__ALWAYS_STATIC_INLINE void __ICACHE_IPA(uint64_t addr) +{ + __ASM volatile("icache.ipa %0" : : "r"(addr)); +} + +/** + \brief Invalid all dcache + \details invalid all dcache. + */ +__ALWAYS_STATIC_INLINE void __DCACHE_IALL(void) +{ + __ASM volatile("dcache.iall"); +} + +/** + \brief Clear all dcache + \details clear all dcache. + */ +__ALWAYS_STATIC_INLINE void __DCACHE_CALL(void) +{ + __ASM volatile("dcache.call"); +} + +/** + \brief Clear&invalid all dcache + \details clear & invalid all dcache. + */ +__ALWAYS_STATIC_INLINE void __DCACHE_CIALL(void) +{ + __ASM volatile("dcache.ciall"); +} + +#if (__L2CACHE_PRESENT == 1U) +/** + \brief Invalid L2 cache + \details invalid L2 cache. + */ +__ALWAYS_STATIC_INLINE void __L2CACHE_IALL(void) +{ + __ASM volatile("l2cache.iall"); +} + +/** + \brief Clear L2cache + \details clear L2cache. + */ +__ALWAYS_STATIC_INLINE void __L2CACHE_CALL(void) +{ + __ASM volatile("l2cache.call"); +} + +/** + \brief Clear&invalid L2cache + \details clear & invalid L2cache. + */ +__ALWAYS_STATIC_INLINE void __L2CACHE_CIALL(void) +{ + __ASM volatile("l2cache.ciall"); +} +#endif + + +/** + \brief Invalid Dcache by addr + \details Invalid Dcache by addr. + \param [in] addr operate addr + */ +__ALWAYS_STATIC_INLINE void __DCACHE_IPA(uint64_t addr) +{ + __ASM volatile("dcache.ipa %0" : : "r"(addr)); +} + +/** + \brief Clear Dcache by addr + \details Clear Dcache by addr. + \param [in] addr operate addr + */ +__ALWAYS_STATIC_INLINE void __DCACHE_CPA(uint64_t addr) +{ + __ASM volatile("dcache.cpa %0" : : "r"(addr)); +} + +/** + \brief Clear & Invalid Dcache by addr + \details Clear & Invalid Dcache by addr. + \param [in] addr operate addr + */ +__ALWAYS_STATIC_INLINE void __DCACHE_CIPA(uint64_t addr) +{ + __ASM volatile("dcache.cipa %0" : : "r"(addr)); +} + + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +__ALWAYS_STATIC_INLINE void __DMB(void) +{ + __ASM volatile("fence"); +} + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in integer value. + \param [in] value Value to reverse + \return Reversed value + */ +__ALWAYS_STATIC_INLINE uint64_t __REV(uint64_t value) +{ + return __builtin_bswap32(value); +} + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in two unsigned short values. + \param [in] value Value to reverse + \return Reversed value + */ +__ALWAYS_STATIC_INLINE uint32_t __REV16(uint32_t value) +{ + uint32_t result; + + result = ((value & 0xFF000000) >> 8) | ((value & 0x00FF0000) << 8) | + ((value & 0x0000FF00) >> 8) | ((value & 0x000000FF) << 8); + + return (result); +} + + +/** + \brief Reverse byte order in signed short value + \details Reverses the byte order in a signed short value with sign extension to integer. + \param [in] value Value to reverse + \return Reversed value + */ +__ALWAYS_STATIC_INLINE int32_t __REVSH(int32_t value) +{ + return (short)(((value & 0xFF00) >> 8) | ((value & 0x00FF) << 8)); +} + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] op1 Value to rotate + \param [in] op2 Number of Bits to rotate + \return Rotated value + */ +__ALWAYS_STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + return (op1 >> op2) | (op1 << (32U - op2)); +} + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + */ +__ALWAYS_STATIC_INLINE void __BKPT(void) +{ + __ASM volatile("ebreak"); +} + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +__ALWAYS_STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ + + result = value; /* r will be reversed bits of v; first get LSB of v */ + + for (value >>= 1U; value; value >>= 1U) { + result <<= 1U; + result |= value & 1U; + s--; + } + + result <<= s; /* shift when v's highest bits are zero */ + + return (result); +} + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __builtin_clz +/** + \details This function saturates a signed value. + \param [in] x Value to be saturated + \param [in] y Bit position to saturate to [1..32] + \return Saturated value. + */ +__ALWAYS_STATIC_INLINE int32_t __SSAT(int32_t x, uint32_t y) +{ + int32_t posMax, negMin; + uint32_t i; + + posMax = 1; + + for (i = 0; i < (y - 1); i++) { + posMax = posMax * 2; + } + + if (x > 0) { + posMax = (posMax - 1); + + if (x > posMax) { + x = posMax; + } + +// x &= (posMax * 2 + 1); + } else { + negMin = -posMax; + + if (x < negMin) { + x = negMin; + } + +// x &= (posMax * 2 - 1); + } + + return (x); +} + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__ALWAYS_STATIC_INLINE uint32_t __USAT(uint32_t value, uint32_t sat) +{ + uint32_t result; + + if ((((0xFFFFFFFF >> sat) << sat) & value) != 0) { + result = 0xFFFFFFFF >> (32 - sat); + } else { + result = value; + } + + return (result); +} + +/** + \brief Unsigned Saturate for internal use + \details Saturates an unsigned value, should not call directly. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__ALWAYS_STATIC_INLINE uint32_t __IUSAT(uint32_t value, uint32_t sat) +{ + uint32_t result; + + if (value & 0x80000000) { /* only overflow set bit-31 */ + result = 0; + } else if ((((0xFFFFFFFF >> sat) << sat) & value) != 0) { + result = 0xFFFFFFFF >> (32 - sat); + } else { + result = value; + } + + return (result); +} + +/** + \brief Rotate Right with Extend + \details This function moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \note carry input will always 0. + \param [in] op1 Value to rotate + \return Rotated value + */ +__ALWAYS_STATIC_INLINE uint32_t __RRX(uint32_t op1) +{ + return 0; +} + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] addr Pointer to location + \return value of type uint8_t at (*ptr) + */ +__ALWAYS_STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr) +{ + uint32_t result; + + __ASM volatile("lb %0, 0(%1)" : "=r"(result) : "r"(addr)); + + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] addr Pointer to location + \return value of type uint16_t at (*ptr) + */ +__ALWAYS_STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr) +{ + uint32_t result; + + __ASM volatile("lh %0, 0(%1)" : "=r"(result) : "r"(addr)); + + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] addr Pointer to location + \return value of type uint32_t at (*ptr) + */ +__ALWAYS_STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile("lw %0, 0(%1)" : "=r"(result) : "r"(addr)); + + return (result); +} + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] addr Pointer to location + */ +__ALWAYS_STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr) +{ + __ASM volatile("sb %1, 0(%0)" :: "r"(addr), "r"((uint32_t)value) : "memory"); +} + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] addr Pointer to location + */ +__ALWAYS_STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr) +{ + __ASM volatile("sh %1, 0(%0)" :: "r"(addr), "r"((uint32_t)value) : "memory"); +} + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] addr Pointer to location + */ +__ALWAYS_STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr) +{ + __ASM volatile("sw %1, 0(%0)" :: "r"(addr), "r"(value) : "memory"); +} + +/*@}*/ /* end of group CSI_Core_InstructionInterface */ + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CSI_SIMD_intrinsics CSI SIMD Intrinsics + Access to dedicated SIMD instructions \n + Single Instruction Multiple Data (SIMD) extensions are provided to simplify development of application software. SIMD extensions increase the processing capability without materially increasing the power consumption. The SIMD extensions are completely transparent to the operating system (OS), allowing existing OS ports to be used. + + @{ +*/ + +/** + \brief Halfword packing instruction. Combines bits[15:0] of val1 with bits[31:16] + of val2 levitated with the val3. + \details Combine a halfword from one register with a halfword from another register. + The second argument can be left-shifted before extraction of the halfword. + \param [in] val1 first 16-bit operands + \param [in] val2 second 16-bit operands + \param [in] val3 value for left-shifting val2. Value range [0..31]. + \return the combination of halfwords. + \remark + res[15:0] = val1[15:0] \n + res[31:16] = val2[31:16] << val3 + */ +__ALWAYS_STATIC_INLINE uint32_t __PKHBT(uint32_t val1, uint32_t val2, uint32_t val3) +{ + return ((((int32_t)(val1) << 0) & (int32_t)0x0000FFFF) | (((int32_t)(val2) << val3) & (int32_t)0xFFFF0000)); +} + +/** + \brief Halfword packing instruction. Combines bits[31:16] of val1 with bits[15:0] + of val2 right-shifted with the val3. + \details Combine a halfword from one register with a halfword from another register. + The second argument can be right-shifted before extraction of the halfword. + \param [in] val1 first 16-bit operands + \param [in] val2 second 16-bit operands + \param [in] val3 value for right-shifting val2. Value range [1..32]. + \return the combination of halfwords. + \remark + res[15:0] = val2[15:0] >> val3 \n + res[31:16] = val1[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __PKHTB(uint32_t val1, uint32_t val2, uint32_t val3) +{ + return ((((int32_t)(val1) << 0) & (int32_t)0xFFFF0000) | (((int32_t)(val2) >> val3) & (int32_t)0x0000FFFF)); +} + +/** + \brief Dual 16-bit signed saturate. + \details This function saturates a signed value. + \param [in] x two signed 16-bit values to be saturated. + \param [in] y bit position for saturation, an integral constant expression in the range 1 to 16. + \return the sum of the absolute differences of the following bytes, added to the accumulation value:\n + the signed saturation of the low halfword in val1, saturated to the bit position specified in + val2 and returned in the low halfword of the return value.\n + the signed saturation of the high halfword in val1, saturated to the bit position specified in + val2 and returned in the high halfword of the return value. + */ +__ALWAYS_STATIC_INLINE uint32_t __SSAT16(int32_t x, const uint32_t y) +{ + int32_t r = 0, s = 0; + + r = __SSAT((((int32_t)x << 16) >> 16), y) & (int32_t)0x0000FFFF; + s = __SSAT((((int32_t)x) >> 16), y) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned saturate. + \details This function enables you to saturate two signed 16-bit values to a selected unsigned range. + \param [in] x two signed 16-bit values to be saturated. + \param [in] y bit position for saturation, an integral constant expression in the range 1 to 16. + \return the saturation of the two signed 16-bit values, as non-negative values: + the saturation of the low halfword in val1, saturated to the bit position specified in + val2 and returned in the low halfword of the return value.\n + the saturation of the high halfword in val1, saturated to the bit position specified in + val2 and returned in the high halfword of the return value. + */ +__ALWAYS_STATIC_INLINE uint32_t __USAT16(uint32_t x, const uint32_t y) +{ + int32_t r = 0, s = 0; + + r = __IUSAT(((x << 16) >> 16), y) & 0x0000FFFF; + s = __IUSAT(((x) >> 16), y) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Quad 8-bit saturating addition. + \details This function enables you to perform four 8-bit integer additions, + saturating the results to the 8-bit signed integer range -2^7 <= x <= 2^7 - 1. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the saturated addition of the first byte of each operand in the first byte of the return value.\n + the saturated addition of the second byte of each operand in the second byte of the return value.\n + the saturated addition of the third byte of each operand in the third byte of the return value.\n + the saturated addition of the fourth byte of each operand in the fourth byte of the return value.\n + The returned results are saturated to the 8-bit signed integer range -2^7 <= x <= 2^7 - 1. + \remark + res[7:0] = val1[7:0] + val2[7:0] \n + res[15:8] = val1[15:8] + val2[15:8] \n + res[23:16] = val1[23:16] + val2[23:16] \n + res[31:24] = val1[31:24] + val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __QADD8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = __SSAT(((((int32_t)x << 24) >> 24) + (((int32_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; + s = __SSAT(((((int32_t)x << 16) >> 24) + (((int32_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; + t = __SSAT(((((int32_t)x << 8) >> 24) + (((int32_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; + u = __SSAT(((((int32_t)x) >> 24) + (((int32_t)y) >> 24)), 8) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r))); +} + +/** + \brief Quad 8-bit unsigned saturating addition. + \details This function enables you to perform four unsigned 8-bit integer additions, + saturating the results to the 8-bit unsigned integer range 0 < x < 2^8 - 1. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the saturated addition of the first byte of each operand in the first byte of the return value.\n + the saturated addition of the second byte of each operand in the second byte of the return value.\n + the saturated addition of the third byte of each operand in the third byte of the return value.\n + the saturated addition of the fourth byte of each operand in the fourth byte of the return value.\n + The returned results are saturated to the 8-bit signed integer range 0 <= x <= 2^8 - 1. + \remark + res[7:0] = val1[7:0] + val2[7:0] \n + res[15:8] = val1[15:8] + val2[15:8] \n + res[23:16] = val1[23:16] + val2[23:16] \n + res[31:24] = val1[31:24] + val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __UQADD8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = __IUSAT((((x << 24) >> 24) + ((y << 24) >> 24)), 8) & 0x000000FF; + s = __IUSAT((((x << 16) >> 24) + ((y << 16) >> 24)), 8) & 0x000000FF; + t = __IUSAT((((x << 8) >> 24) + ((y << 8) >> 24)), 8) & 0x000000FF; + u = __IUSAT((((x) >> 24) + ((y) >> 24)), 8) & 0x000000FF; + + return ((u << 24) | (t << 16) | (s << 8) | (r)); +} + +/** + \brief Quad 8-bit signed addition. + \details This function performs four 8-bit signed integer additions. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the addition of the first bytes from each operand, in the first byte of the return value.\n + the addition of the second bytes of each operand, in the second byte of the return value.\n + the addition of the third bytes of each operand, in the third byte of the return value.\n + the addition of the fourth bytes of each operand, in the fourth byte of the return value. + \remark + res[7:0] = val1[7:0] + val2[7:0] \n + res[15:8] = val1[15:8] + val2[15:8] \n + res[23:16] = val1[23:16] + val2[23:16] \n + res[31:24] = val1[31:24] + val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __SADD8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = ((((int32_t)x << 24) >> 24) + (((int32_t)y << 24) >> 24)) & (int32_t)0x000000FF; + s = ((((int32_t)x << 16) >> 24) + (((int32_t)y << 16) >> 24)) & (int32_t)0x000000FF; + t = ((((int32_t)x << 8) >> 24) + (((int32_t)y << 8) >> 24)) & (int32_t)0x000000FF; + u = ((((int32_t)x) >> 24) + (((int32_t)y) >> 24)) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r))); +} + +/** + \brief Quad 8-bit unsigned addition. + \details This function performs four unsigned 8-bit integer additions. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the addition of the first bytes from each operand, in the first byte of the return value.\n + the addition of the second bytes of each operand, in the second byte of the return value.\n + the addition of the third bytes of each operand, in the third byte of the return value.\n + the addition of the fourth bytes of each operand, in the fourth byte of the return value. + \remark + res[7:0] = val1[7:0] + val2[7:0] \n + res[15:8] = val1[15:8] + val2[15:8] \n + res[23:16] = val1[23:16] + val2[23:16] \n + res[31:24] = val1[31:24] + val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __UADD8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = (((x << 24) >> 24) + ((y << 24) >> 24)) & 0x000000FF; + s = (((x << 16) >> 24) + ((y << 16) >> 24)) & 0x000000FF; + t = (((x << 8) >> 24) + ((y << 8) >> 24)) & 0x000000FF; + u = (((x) >> 24) + ((y) >> 24)) & 0x000000FF; + + return ((u << 24) | (t << 16) | (s << 8) | (r)); +} + +/** + \brief Quad 8-bit saturating subtract. + \details This function enables you to perform four 8-bit integer subtractions, + saturating the results to the 8-bit signed integer range -2^7 <= x <= 2^7 - 1. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the subtraction of the first byte of each operand in the first byte of the return value.\n + the subtraction of the second byte of each operand in the second byte of the return value.\n + the subtraction of the third byte of each operand in the third byte of the return value.\n + the subtraction of the fourth byte of each operand in the fourth byte of the return value.\n + The returned results are saturated to the 8-bit signed integer range -2^7 <= x <= 2^7 - 1. + \remark + res[7:0] = val1[7:0] - val2[7:0] \n + res[15:8] = val1[15:8] - val2[15:8] \n + res[23:16] = val1[23:16] - val2[23:16] \n + res[31:24] = val1[31:24] - val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __QSUB8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = __SSAT(((((int32_t)x << 24) >> 24) - (((int32_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; + s = __SSAT(((((int32_t)x << 16) >> 24) - (((int32_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; + t = __SSAT(((((int32_t)x << 8) >> 24) - (((int32_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; + u = __SSAT(((((int32_t)x) >> 24) - (((int32_t)y) >> 24)), 8) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r))); +} + +/** + \brief Quad 8-bit unsigned saturating subtraction. + \details This function enables you to perform four unsigned 8-bit integer subtractions, + saturating the results to the 8-bit unsigned integer range 0 < x < 2^8 - 1. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the subtraction of the first byte of each operand in the first byte of the return value.\n + the subtraction of the second byte of each operand in the second byte of the return value.\n + the subtraction of the third byte of each operand in the third byte of the return value.\n + the subtraction of the fourth byte of each operand in the fourth byte of the return value.\n + The returned results are saturated to the 8-bit unsigned integer range 0 <= x <= 2^8 - 1. + \remark + res[7:0] = val1[7:0] - val2[7:0] \n + res[15:8] = val1[15:8] - val2[15:8] \n + res[23:16] = val1[23:16] - val2[23:16] \n + res[31:24] = val1[31:24] - val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __UQSUB8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = __IUSAT((((x << 24) >> 24) - ((y << 24) >> 24)), 8) & 0x000000FF; + s = __IUSAT((((x << 16) >> 24) - ((y << 16) >> 24)), 8) & 0x000000FF; + t = __IUSAT((((x << 8) >> 24) - ((y << 8) >> 24)), 8) & 0x000000FF; + u = __IUSAT((((x) >> 24) - ((y) >> 24)), 8) & 0x000000FF; + + return ((u << 24) | (t << 16) | (s << 8) | (r)); +} + +/** + \brief Quad 8-bit signed subtraction. + \details This function enables you to perform four 8-bit signed integer subtractions. + \param [in] x first four 8-bit operands of each subtraction. + \param [in] y second four 8-bit operands of each subtraction. + \return the subtraction of the first bytes from each operand, in the first byte of the return value.\n + the subtraction of the second bytes of each operand, in the second byte of the return value.\n + the subtraction of the third bytes of each operand, in the third byte of the return value.\n + the subtraction of the fourth bytes of each operand, in the fourth byte of the return value. + \remark + res[7:0] = val1[7:0] - val2[7:0] \n + res[15:8] = val1[15:8] - val2[15:8] \n + res[23:16] = val1[23:16] - val2[23:16] \n + res[31:24] = val1[31:24] - val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __SSUB8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = ((((int32_t)x << 24) >> 24) - (((int32_t)y << 24) >> 24)) & (int32_t)0x000000FF; + s = ((((int32_t)x << 16) >> 24) - (((int32_t)y << 16) >> 24)) & (int32_t)0x000000FF; + t = ((((int32_t)x << 8) >> 24) - (((int32_t)y << 8) >> 24)) & (int32_t)0x000000FF; + u = ((((int32_t)x) >> 24) - (((int32_t)y) >> 24)) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r))); +} + +/** + \brief Quad 8-bit unsigned subtract. + \details This function enables you to perform four 8-bit unsigned integer subtractions. + \param [in] x first four 8-bit operands of each subtraction. + \param [in] y second four 8-bit operands of each subtraction. + \return the subtraction of the first bytes from each operand, in the first byte of the return value.\n + the subtraction of the second bytes of each operand, in the second byte of the return value.\n + the subtraction of the third bytes of each operand, in the third byte of the return value.\n + the subtraction of the fourth bytes of each operand, in the fourth byte of the return value. + \remark + res[7:0] = val1[7:0] - val2[7:0] \n + res[15:8] = val1[15:8] - val2[15:8] \n + res[23:16] = val1[23:16] - val2[23:16] \n + res[31:24] = val1[31:24] - val2[31:24] + */ +__ALWAYS_STATIC_INLINE uint32_t __USUB8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = (((x << 24) >> 24) - ((y << 24) >> 24)) & 0x000000FF; + s = (((x << 16) >> 24) - ((y << 16) >> 24)) & 0x000000FF; + t = (((x << 8) >> 24) - ((y << 8) >> 24)) & 0x000000FF; + u = (((x) >> 24) - ((y) >> 24)) & 0x000000FF; + + return ((u << 24) | (t << 16) | (s << 8) | (r)); +} + +/** + \brief Unsigned sum of quad 8-bit unsigned absolute difference. + \details This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values + of the differences together, returning the result as a single unsigned integer. + \param [in] x first four 8-bit operands of each subtraction. + \param [in] y second four 8-bit operands of each subtraction. + \return the subtraction of the first bytes from each operand, in the first byte of the return value.\n + the subtraction of the second bytes of each operand, in the second byte of the return value.\n + the subtraction of the third bytes of each operand, in the third byte of the return value.\n + the subtraction of the fourth bytes of each operand, in the fourth byte of the return value.\n + The sum is returned as a single unsigned integer. + \remark + absdiff1 = val1[7:0] - val2[7:0] \n + absdiff2 = val1[15:8] - val2[15:8] \n + absdiff3 = val1[23:16] - val2[23:16] \n + absdiff4 = val1[31:24] - val2[31:24] \n + res[31:0] = absdiff1 + absdiff2 + absdiff3 + absdiff4 + */ +__ALWAYS_STATIC_INLINE uint32_t __USAD8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = (((x << 24) >> 24) - ((y << 24) >> 24)) & 0x000000FF; + s = (((x << 16) >> 24) - ((y << 16) >> 24)) & 0x000000FF; + t = (((x << 8) >> 24) - ((y << 8) >> 24)) & 0x000000FF; + u = (((x) >> 24) - ((y) >> 24)) & 0x000000FF; + + return (u + t + s + r); +} + +/** + \brief Unsigned sum of quad 8-bit unsigned absolute difference with 32-bit accumulate. + \details This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values + of the differences to a 32-bit accumulate operand. + \param [in] x first four 8-bit operands of each subtraction. + \param [in] y second four 8-bit operands of each subtraction. + \param [in] sum accumulation value. + \return the sum of the absolute differences of the following bytes, added to the accumulation value: + the subtraction of the first bytes from each operand, in the first byte of the return value.\n + the subtraction of the second bytes of each operand, in the second byte of the return value.\n + the subtraction of the third bytes of each operand, in the third byte of the return value.\n + the subtraction of the fourth bytes of each operand, in the fourth byte of the return value. + \remark + absdiff1 = val1[7:0] - val2[7:0] \n + absdiff2 = val1[15:8] - val2[15:8] \n + absdiff3 = val1[23:16] - val2[23:16] \n + absdiff4 = val1[31:24] - val2[31:24] \n + sum = absdiff1 + absdiff2 + absdiff3 + absdiff4 \n + res[31:0] = sum[31:0] + val3[31:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __USADA8(uint32_t x, uint32_t y, uint32_t sum) +{ + int32_t r, s, t, u; + +#ifdef __cplusplus + r = (abs((long long)((x << 24) >> 24) - ((y << 24) >> 24))) & 0x000000FF; + s = (abs((long long)((x << 16) >> 24) - ((y << 16) >> 24))) & 0x000000FF; + t = (abs((long long)((x << 8) >> 24) - ((y << 8) >> 24))) & 0x000000FF; + u = (abs((long long)((x) >> 24) - ((y) >> 24))) & 0x000000FF; +#else + r = (abs(((x << 24) >> 24) - ((y << 24) >> 24))) & 0x000000FF; + s = (abs(((x << 16) >> 24) - ((y << 16) >> 24))) & 0x000000FF; + t = (abs(((x << 8) >> 24) - ((y << 8) >> 24))) & 0x000000FF; + u = (abs(((x) >> 24) - ((y) >> 24))) & 0x000000FF; +#endif + return (u + t + s + r + sum); +} + +/** + \brief Dual 16-bit saturating addition. + \details This function enables you to perform two 16-bit integer arithmetic additions in parallel, + saturating the results to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the saturated addition of the low halfwords, in the low halfword of the return value.\n + the saturated addition of the high halfwords, in the high halfword of the return value.\n + The returned results are saturated to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \remark + res[15:0] = val1[15:0] + val2[15:0] \n + res[31:16] = val1[31:16] + val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __QADD16(uint32_t x, uint32_t y) +{ + int32_t r = 0, s = 0; + + r = __SSAT(((((int32_t)x << 16) >> 16) + (((int32_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((int32_t)x) >> 16) + (((int32_t)y) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned saturating addition. + \details This function enables you to perform two unsigned 16-bit integer additions, saturating + the results to the 16-bit unsigned integer range 0 < x < 2^16 - 1. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the saturated addition of the low halfwords, in the low halfword of the return value.\n + the saturated addition of the high halfwords, in the high halfword of the return value.\n + The results are saturated to the 16-bit unsigned integer range 0 < x < 2^16 - 1. + \remark + res[15:0] = val1[15:0] + val2[15:0] \n + res[31:16] = val1[31:16] + val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __UQADD16(uint32_t x, uint32_t y) +{ + int32_t r = 0, s = 0; + + r = __IUSAT((((x << 16) >> 16) + ((y << 16) >> 16)), 16) & 0x0000FFFF; + s = __IUSAT((((x) >> 16) + ((y) >> 16)), 16) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit signed addition. + \details This function enables you to perform two 16-bit signed integer additions. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the addition of the low halfwords in the low halfword of the return value.\n + the addition of the high halfwords in the high halfword of the return value. + \remark + res[15:0] = val1[15:0] + val2[15:0] \n + res[31:16] = val1[31:16] + val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __SADD16(uint32_t x, uint32_t y) +{ + int32_t r = 0, s = 0; + + r = ((((int32_t)x << 16) >> 16) + (((int32_t)y << 16) >> 16)) & (int32_t)0x0000FFFF; + s = ((((int32_t)x) >> 16) + (((int32_t)y) >> 16)) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned addition + \details This function enables you to perform two 16-bit unsigned integer additions. + \param [in] x first two 16-bit summands for each addition. + \param [in] y second two 16-bit summands for each addition. + \return the addition of the low halfwords in the low halfword of the return value.\n + the addition of the high halfwords in the high halfword of the return value. + \remark + res[15:0] = val1[15:0] + val2[15:0] \n + res[31:16] = val1[31:16] + val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __UADD16(uint32_t x, uint32_t y) +{ + int32_t r = 0, s = 0; + + r = (((x << 16) >> 16) + ((y << 16) >> 16)) & 0x0000FFFF; + s = (((x) >> 16) + ((y) >> 16)) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + + +/** + \brief Dual 16-bit signed addition with halved results. + \details This function enables you to perform two signed 16-bit integer additions, halving the results. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the halved addition of the low halfwords, in the low halfword of the return value.\n + the halved addition of the high halfwords, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] + val2[15:0]) >> 1 \n + res[31:16] = (val1[31:16] + val2[31:16]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __SHADD16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = (((((int32_t)x << 16) >> 16) + (((int32_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((int32_t)x) >> 16) + (((int32_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned addition with halved results. + \details This function enables you to perform two unsigned 16-bit integer additions, halving the results. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the halved addition of the low halfwords, in the low halfword of the return value.\n + the halved addition of the high halfwords, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] + val2[15:0]) >> 1 \n + res[31:16] = (val1[31:16] + val2[31:16]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __UHADD16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = ((((x << 16) >> 16) + ((y << 16) >> 16)) >> 1) & 0x0000FFFF; + s = ((((x) >> 16) + ((y) >> 16)) >> 1) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Quad 8-bit signed addition with halved results. + \details This function enables you to perform four signed 8-bit integer additions, halving the results. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the halved addition of the first bytes from each operand, in the first byte of the return value.\n + the halved addition of the second bytes from each operand, in the second byte of the return value.\n + the halved addition of the third bytes from each operand, in the third byte of the return value.\n + the halved addition of the fourth bytes from each operand, in the fourth byte of the return value. + \remark + res[7:0] = (val1[7:0] + val2[7:0] ) >> 1 \n + res[15:8] = (val1[15:8] + val2[15:8] ) >> 1 \n + res[23:16] = (val1[23:16] + val2[23:16]) >> 1 \n + res[31:24] = (val1[31:24] + val2[31:24]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __SHADD8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = (((((int32_t)x << 24) >> 24) + (((int32_t)y << 24) >> 24)) >> 1) & (int32_t)0x000000FF; + s = (((((int32_t)x << 16) >> 24) + (((int32_t)y << 16) >> 24)) >> 1) & (int32_t)0x000000FF; + t = (((((int32_t)x << 8) >> 24) + (((int32_t)y << 8) >> 24)) >> 1) & (int32_t)0x000000FF; + u = (((((int32_t)x) >> 24) + (((int32_t)y) >> 24)) >> 1) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r))); +} + +/** + \brief Quad 8-bit unsigned addition with halved results. + \details This function enables you to perform four unsigned 8-bit integer additions, halving the results. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the halved addition of the first bytes from each operand, in the first byte of the return value.\n + the halved addition of the second bytes from each operand, in the second byte of the return value.\n + the halved addition of the third bytes from each operand, in the third byte of the return value.\n + the halved addition of the fourth bytes from each operand, in the fourth byte of the return value. + \remark + res[7:0] = (val1[7:0] + val2[7:0] ) >> 1 \n + res[15:8] = (val1[15:8] + val2[15:8] ) >> 1 \n + res[23:16] = (val1[23:16] + val2[23:16]) >> 1 \n + res[31:24] = (val1[31:24] + val2[31:24]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __UHADD8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = ((((x << 24) >> 24) + ((y << 24) >> 24)) >> 1) & 0x000000FF; + s = ((((x << 16) >> 24) + ((y << 16) >> 24)) >> 1) & 0x000000FF; + t = ((((x << 8) >> 24) + ((y << 8) >> 24)) >> 1) & 0x000000FF; + u = ((((x) >> 24) + ((y) >> 24)) >> 1) & 0x000000FF; + + return ((u << 24) | (t << 16) | (s << 8) | (r)); +} + +/** + \brief Dual 16-bit saturating subtract. + \details This function enables you to perform two 16-bit integer subtractions in parallel, + saturating the results to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the saturated subtraction of the low halfwords, in the low halfword of the return value.\n + the saturated subtraction of the high halfwords, in the high halfword of the return value.\n + The returned results are saturated to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \remark + res[15:0] = val1[15:0] - val2[15:0] \n + res[31:16] = val1[31:16] - val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __QSUB16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = __SSAT(((((int32_t)x << 16) >> 16) - (((int32_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((int32_t)x) >> 16) - (((int32_t)y) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned saturating subtraction. + \details This function enables you to perform two unsigned 16-bit integer subtractions, + saturating the results to the 16-bit unsigned integer range 0 < x < 2^16 - 1. + \param [in] x first two 16-bit operands for each subtraction. + \param [in] y second two 16-bit operands for each subtraction. + \return the saturated subtraction of the low halfwords, in the low halfword of the return value.\n + the saturated subtraction of the high halfwords, in the high halfword of the return value.\n + The returned results are saturated to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \remark + res[15:0] = val1[15:0] - val2[15:0] \n + res[31:16] = val1[31:16] - val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __UQSUB16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = __IUSAT((((x << 16) >> 16) - ((y << 16) >> 16)), 16) & 0x0000FFFF; + s = __IUSAT((((x) >> 16) - ((y) >> 16)), 16) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit signed subtraction. + \details This function enables you to perform two 16-bit signed integer subtractions. + \param [in] x first two 16-bit operands of each subtraction. + \param [in] y second two 16-bit operands of each subtraction. + \return the subtraction of the low halfword in the second operand from the low + halfword in the first operand, in the low halfword of the return value. \n + the subtraction of the high halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value. + \remark + res[15:0] = val1[15:0] - val2[15:0] \n + res[31:16] = val1[31:16] - val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __SSUB16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = ((((int32_t)x << 16) >> 16) - (((int32_t)y << 16) >> 16)) & (int32_t)0x0000FFFF; + s = ((((int32_t)x) >> 16) - (((int32_t)y) >> 16)) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned subtract. + \details This function enables you to perform two 16-bit unsigned integer subtractions. + \param [in] x first two 16-bit operands of each subtraction. + \param [in] y second two 16-bit operands of each subtraction. + \return the subtraction of the low halfword in the second operand from the low + halfword in the first operand, in the low halfword of the return value. \n + the subtraction of the high halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value. + \remark + res[15:0] = val1[15:0] - val2[15:0] \n + res[31:16] = val1[31:16] - val2[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __USUB16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = (((x << 16) >> 16) - ((y << 16) >> 16)) & 0x0000FFFF; + s = (((x) >> 16) - ((y) >> 16)) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit signed subtraction with halved results. + \details This function enables you to perform two signed 16-bit integer subtractions, halving the results. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the halved subtraction of the low halfwords, in the low halfword of the return value.\n + the halved subtraction of the high halfwords, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] - val2[15:0]) >> 1 \n + res[31:16] = (val1[31:16] - val2[31:16]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __SHSUB16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = (((((int32_t)x << 16) >> 16) - (((int32_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((int32_t)x) >> 16) - (((int32_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned subtraction with halved results. + \details This function enables you to perform two unsigned 16-bit integer subtractions, halving the results. + \param [in] x first two 16-bit summands. + \param [in] y second two 16-bit summands. + \return the halved subtraction of the low halfwords, in the low halfword of the return value.\n + the halved subtraction of the high halfwords, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] - val2[15:0]) >> 1 \n + res[31:16] = (val1[31:16] - val2[31:16]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __UHSUB16(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = ((((x << 16) >> 16) - ((y << 16) >> 16)) >> 1) & 0x0000FFFF; + s = ((((x) >> 16) - ((y) >> 16)) >> 1) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Quad 8-bit signed addition with halved results. + \details This function enables you to perform four signed 8-bit integer subtractions, halving the results. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the halved subtraction of the first bytes from each operand, in the first byte of the return value.\n + the halved subtraction of the second bytes from each operand, in the second byte of the return value.\n + the halved subtraction of the third bytes from each operand, in the third byte of the return value.\n + the halved subtraction of the fourth bytes from each operand, in the fourth byte of the return value. + \remark + res[7:0] = (val1[7:0] - val2[7:0] ) >> 1 \n + res[15:8] = (val1[15:8] - val2[15:8] ) >> 1 \n + res[23:16] = (val1[23:16] - val2[23:16]) >> 1 \n + res[31:24] = (val1[31:24] - val2[31:24]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __SHSUB8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = (((((int32_t)x << 24) >> 24) - (((int32_t)y << 24) >> 24)) >> 1) & (int32_t)0x000000FF; + s = (((((int32_t)x << 16) >> 24) - (((int32_t)y << 16) >> 24)) >> 1) & (int32_t)0x000000FF; + t = (((((int32_t)x << 8) >> 24) - (((int32_t)y << 8) >> 24)) >> 1) & (int32_t)0x000000FF; + u = (((((int32_t)x) >> 24) - (((int32_t)y) >> 24)) >> 1) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r))); +} + +/** + \brief Quad 8-bit unsigned subtraction with halved results. + \details This function enables you to perform four unsigned 8-bit integer subtractions, halving the results. + \param [in] x first four 8-bit summands. + \param [in] y second four 8-bit summands. + \return the halved subtraction of the first bytes from each operand, in the first byte of the return value.\n + the halved subtraction of the second bytes from each operand, in the second byte of the return value.\n + the halved subtraction of the third bytes from each operand, in the third byte of the return value.\n + the halved subtraction of the fourth bytes from each operand, in the fourth byte of the return value. + \remark + res[7:0] = (val1[7:0] - val2[7:0] ) >> 1 \n + res[15:8] = (val1[15:8] - val2[15:8] ) >> 1 \n + res[23:16] = (val1[23:16] - val2[23:16]) >> 1 \n + res[31:24] = (val1[31:24] - val2[31:24]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __UHSUB8(uint32_t x, uint32_t y) +{ + int32_t r, s, t, u; + + r = ((((x << 24) >> 24) - ((y << 24) >> 24)) >> 1) & 0x000000FF; + s = ((((x << 16) >> 24) - ((y << 16) >> 24)) >> 1) & 0x000000FF; + t = ((((x << 8) >> 24) - ((y << 8) >> 24)) >> 1) & 0x000000FF; + u = ((((x) >> 24) - ((y) >> 24)) >> 1) & 0x000000FF; + + return ((u << 24) | (t << 16) | (s << 8) | (r)); +} + +/** + \brief Dual 16-bit add and subtract with exchange. + \details This function enables you to exchange the halfwords of the one operand, + then add the high halfwords and subtract the low halfwords, + saturating the results to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \param [in] x first operand for the subtraction in the low halfword, + and the first operand for the addition in the high halfword. + \param [in] y second operand for the subtraction in the high halfword, + and the second operand for the addition in the low halfword. + \return the saturated subtraction of the high halfword in the second operand from the + low halfword in the first operand, in the low halfword of the return value.\n + the saturated addition of the high halfword in the first operand and the + low halfword in the second operand, in the high halfword of the return value.\n + The returned results are saturated to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \remark + res[15:0] = val1[15:0] - val2[31:16] \n + res[31:16] = val1[31:16] + val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __QASX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = __SSAT(((((int32_t)x << 16) >> 16) - (((int32_t)y) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((int32_t)x) >> 16) + (((int32_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned saturating addition and subtraction with exchange. + \details This function enables you to exchange the halfwords of the second operand and + perform one unsigned 16-bit integer addition and one unsigned 16-bit subtraction, + saturating the results to the 16-bit unsigned integer range 0 <= x <= 2^16 - 1. + \param [in] x first operand for the subtraction in the low halfword, + and the first operand for the addition in the high halfword. + \param [in] y second operand for the subtraction in the high halfword, + and the second operand for the addition in the low halfword. + \return the saturated subtraction of the high halfword in the second operand from the + low halfword in the first operand, in the low halfword of the return value.\n + the saturated addition of the high halfword in the first operand and the + low halfword in the second operand, in the high halfword of the return value.\n + The returned results are saturated to the 16-bit unsigned integer range 0 <= x <= 2^16 - 1. + \remark + res[15:0] = val1[15:0] - val2[31:16] \n + res[31:16] = val1[31:16] + val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __UQASX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = __IUSAT((((x << 16) >> 16) - ((y) >> 16)), 16) & 0x0000FFFF; + s = __IUSAT((((x) >> 16) + ((y << 16) >> 16)), 16) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit addition and subtraction with exchange. + \details It enables you to exchange the halfwords of the second operand, add the high halfwords + and subtract the low halfwords. + \param [in] x first operand for the subtraction in the low halfword, + and the first operand for the addition in the high halfword. + \param [in] y second operand for the subtraction in the high halfword, + and the second operand for the addition in the low halfword. + \return the subtraction of the high halfword in the second operand from the + low halfword in the first operand, in the low halfword of the return value.\n + the addition of the high halfword in the first operand and the + low halfword in the second operand, in the high halfword of the return value. + \remark + res[15:0] = val1[15:0] - val2[31:16] \n + res[31:16] = val1[31:16] + val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __SASX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = ((((int32_t)x << 16) >> 16) - (((int32_t)y) >> 16)) & (int32_t)0x0000FFFF; + s = ((((int32_t)x) >> 16) + (((int32_t)y << 16) >> 16)) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned addition and subtraction with exchange. + \details This function enables you to exchange the two halfwords of the second operand, + add the high halfwords and subtract the low halfwords. + \param [in] x first operand for the subtraction in the low halfword, + and the first operand for the addition in the high halfword. + \param [in] y second operand for the subtraction in the high halfword, + and the second operand for the addition in the low halfword. + \return the subtraction of the high halfword in the second operand from the + low halfword in the first operand, in the low halfword of the return value.\n + the addition of the high halfword in the first operand and the + low halfword in the second operand, in the high halfword of the return value. + \remark + res[15:0] = val1[15:0] - val2[31:16] \n + res[31:16] = val1[31:16] + val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __UASX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = (((x << 16) >> 16) - ((y) >> 16)) & 0x0000FFFF; + s = (((x) >> 16) + ((y << 16) >> 16)) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit signed addition and subtraction with halved results. + \details This function enables you to exchange the two halfwords of one operand, perform one + signed 16-bit integer addition and one signed 16-bit subtraction, and halve the results. + \param [in] x first 16-bit operands. + \param [in] y second 16-bit operands. + \return the halved subtraction of the high halfword in the second operand from the + low halfword in the first operand, in the low halfword of the return value.\n + the halved addition of the low halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] - val2[31:16]) >> 1 \n + res[31:16] = (val1[31:16] + val2[15:0]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __SHASX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = (((((int32_t)x << 16) >> 16) - (((int32_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((int32_t)x) >> 16) + (((int32_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned addition and subtraction with halved results and exchange. + \details This function enables you to exchange the halfwords of the second operand, + add the high halfwords and subtract the low halfwords, halving the results. + \param [in] x first operand for the subtraction in the low halfword, and + the first operand for the addition in the high halfword. + \param [in] y second operand for the subtraction in the high halfword, and + the second operand for the addition in the low halfword. + \return the halved subtraction of the high halfword in the second operand from the + low halfword in the first operand, in the low halfword of the return value.\n + the halved addition of the low halfword in the second operand from the high + halfword in the first operand, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] - val2[31:16]) >> 1 \n + res[31:16] = (val1[31:16] + val2[15:0]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __UHASX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = ((((x << 16) >> 16) - ((y) >> 16)) >> 1) & 0x0000FFFF; + s = ((((x) >> 16) + ((y << 16) >> 16)) >> 1) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit subtract and add with exchange. + \details This function enables you to exchange the halfwords of one operand, + then subtract the high halfwords and add the low halfwords, + saturating the results to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \param [in] x first operand for the addition in the low halfword, + and the first operand for the subtraction in the high halfword. + \param [in] y second operand for the addition in the high halfword, + and the second operand for the subtraction in the low halfword. + \return the saturated addition of the low halfword of the first operand and the high + halfword of the second operand, in the low halfword of the return value.\n + the saturated subtraction of the low halfword of the second operand from the + high halfword of the first operand, in the high halfword of the return value.\n + The returned results are saturated to the 16-bit signed integer range -2^15 <= x <= 2^15 - 1. + \remark + res[15:0] = val1[15:0] + val2[31:16] \n + res[31:16] = val1[31:16] - val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __QSAX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = __SSAT(((((int32_t)x << 16) >> 16) + (((int32_t)y) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((int32_t)x) >> 16) - (((int32_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned saturating subtraction and addition with exchange. + \details This function enables you to exchange the halfwords of the second operand and perform + one unsigned 16-bit integer subtraction and one unsigned 16-bit addition, saturating + the results to the 16-bit unsigned integer range 0 <= x <= 2^16 - 1. + \param [in] x first operand for the addition in the low halfword, + and the first operand for the subtraction in the high halfword. + \param [in] y second operand for the addition in the high halfword, + and the second operand for the subtraction in the low halfword. + \return the saturated addition of the low halfword of the first operand and the high + halfword of the second operand, in the low halfword of the return value.\n + the saturated subtraction of the low halfword of the second operand from the + high halfword of the first operand, in the high halfword of the return value.\n + The returned results are saturated to the 16-bit unsigned integer range 0 <= x <= 2^16 - 1. + \remark + res[15:0] = val1[15:0] + val2[31:16] \n + res[31:16] = val1[31:16] - val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __UQSAX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = __IUSAT((((x << 16) >> 16) + ((y) >> 16)), 16) & 0x0000FFFF; + s = __IUSAT((((x) >> 16) - ((y << 16) >> 16)), 16) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit unsigned subtract and add with exchange. + \details This function enables you to exchange the halfwords of the second operand, + subtract the high halfwords and add the low halfwords. + \param [in] x first operand for the addition in the low halfword, + and the first operand for the subtraction in the high halfword. + \param [in] y second operand for the addition in the high halfword, + and the second operand for the subtraction in the low halfword. + \return the addition of the low halfword of the first operand and the high + halfword of the second operand, in the low halfword of the return value.\n + the subtraction of the low halfword of the second operand from the + high halfword of the first operand, in the high halfword of the return value.\n + \remark + res[15:0] = val1[15:0] + val2[31:16] \n + res[31:16] = val1[31:16] - val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __USAX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = (((x << 16) >> 16) + ((y) >> 16)) & 0x0000FFFF; + s = (((x) >> 16) - ((y << 16) >> 16)) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit signed subtraction and addition with exchange. + \details This function enables you to exchange the two halfwords of one operand and perform one + 16-bit integer subtraction and one 16-bit addition. + \param [in] x first operand for the addition in the low halfword, and the first operand + for the subtraction in the high halfword. + \param [in] y second operand for the addition in the high halfword, and the second + operand for the subtraction in the low halfword. + \return the addition of the low halfword of the first operand and the high + halfword of the second operand, in the low halfword of the return value.\n + the subtraction of the low halfword of the second operand from the + high halfword of the first operand, in the high halfword of the return value.\n + \remark + res[15:0] = val1[15:0] + val2[31:16] \n + res[31:16] = val1[31:16] - val2[15:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __SSAX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = ((((int32_t)x << 16) >> 16) + (((int32_t)y) >> 16)) & (int32_t)0x0000FFFF; + s = ((((int32_t)x) >> 16) - (((int32_t)y << 16) >> 16)) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + + +/** + \brief Dual 16-bit signed subtraction and addition with halved results. + \details This function enables you to exchange the two halfwords of one operand, perform one signed + 16-bit integer subtraction and one signed 16-bit addition, and halve the results. + \param [in] x first 16-bit operands. + \param [in] y second 16-bit operands. + \return the halved addition of the low halfword in the first operand and the + high halfword in the second operand, in the low halfword of the return value.\n + the halved subtraction of the low halfword in the second operand from the + high halfword in the first operand, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] + val2[31:16]) >> 1 \n + res[31:16] = (val1[31:16] - val2[15:0]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __SHSAX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = (((((int32_t)x << 16) >> 16) + (((int32_t)y) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((int32_t)x) >> 16) - (((int32_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r))); +} + +/** + \brief Dual 16-bit unsigned subtraction and addition with halved results and exchange. + \details This function enables you to exchange the halfwords of the second operand, + subtract the high halfwords and add the low halfwords, halving the results. + \param [in] x first operand for the addition in the low halfword, and + the first operand for the subtraction in the high halfword. + \param [in] y second operand for the addition in the high halfword, and + the second operand for the subtraction in the low halfword. + \return the halved addition of the low halfword in the first operand and the + high halfword in the second operand, in the low halfword of the return value.\n + the halved subtraction of the low halfword in the second operand from the + high halfword in the first operand, in the high halfword of the return value. + \remark + res[15:0] = (val1[15:0] + val2[31:16]) >> 1 \n + res[31:16] = (val1[31:16] - val2[15:0]) >> 1 + */ +__ALWAYS_STATIC_INLINE uint32_t __UHSAX(uint32_t x, uint32_t y) +{ + int32_t r, s; + + r = ((((x << 16) >> 16) + ((y) >> 16)) >> 1) & 0x0000FFFF; + s = ((((x) >> 16) - ((y << 16) >> 16)) >> 1) & 0x0000FFFF; + + return ((s << 16) | (r)); +} + +/** + \brief Dual 16-bit signed multiply with exchange returning difference. + \details This function enables you to perform two 16-bit signed multiplications, subtracting + one of the products from the other. The halfwords of the second operand are exchanged + before performing the arithmetic. This produces top * bottom and bottom * top multiplication. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \return the difference of the products of the two 16-bit signed multiplications. + \remark + p1 = val1[15:0] * val2[31:16] \n + p2 = val1[31:16] * val2[15:0] \n + res[31:0] = p1 - p2 + */ +__ALWAYS_STATIC_INLINE uint32_t __SMUSDX(uint32_t x, uint32_t y) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y) >> 16)) - + ((((int32_t)x) >> 16) * (((int32_t)y << 16) >> 16)))); +} + +/** + \brief Sum of dual 16-bit signed multiply with exchange. + \details This function enables you to perform two 16-bit signed multiplications with exchanged + halfwords of the second operand, adding the products together. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \return the sum of the products of the two 16-bit signed multiplications with exchanged halfwords of the second operand. + \remark + p1 = val1[15:0] * val2[31:16] \n + p2 = val1[31:16] * val2[15:0] \n + res[31:0] = p1 + p2 + */ +__ALWAYS_STATIC_INLINE uint32_t __SMUADX(uint32_t x, uint32_t y) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y) >> 16)) + + ((((int32_t)x) >> 16) * (((int32_t)y << 16) >> 16)))); +} + + +/** + \brief Saturating add. + \details This function enables you to obtain the saturating add of two integers. + \param [in] x first summand of the saturating add operation. + \param [in] y second summand of the saturating add operation. + \return the saturating addition of val1 and val2. + \remark + res[31:0] = SAT(val1 + SAT(val2)) + */ +__ALWAYS_STATIC_INLINE int32_t __QADD(int32_t x, int32_t y) +{ + int32_t result; + + if (y >= 0) { + if ((int32_t)((uint32_t)x + (uint32_t)y) >= x) { + result = x + y; + } else { + result = 0x7FFFFFFF; + } + } else { + if ((int32_t)((uint32_t)x + (uint32_t)y) < x) { + result = x + y; + } else { + result = 0x80000000; + } + } + + return result; +} + +/** + \brief Saturating subtract. + \details This function enables you to obtain the saturating add of two integers. + \param [in] x first summand of the saturating add operation. + \param [in] y second summand of the saturating add operation. + \return the saturating addition of val1 and val2. + \remark + res[31:0] = SAT(val1 - SAT(val2)) + */ +__ALWAYS_STATIC_INLINE int32_t __QSUB(int32_t x, int32_t y) +{ + int64_t tmp; + int32_t result; + + tmp = (int64_t)x - (int64_t)y; + + if (tmp > 0x7fffffff) { + tmp = 0x7fffffff; + } else if (tmp < (-2147483647 - 1)) { + tmp = -2147483647 - 1; + } + + result = tmp; + return result; +} + +/** + \brief Dual 16-bit signed multiply with single 32-bit accumulator. + \details This function enables you to perform two signed 16-bit multiplications, + adding both results to a 32-bit accumulate operand. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the product of each multiplication added to the accumulate value, as a 32-bit integer. + \remark + p1 = val1[15:0] * val2[15:0] \n + p2 = val1[31:16] * val2[31:16] \n + res[31:0] = p1 + p2 + val3[31:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __SMLAD(uint32_t x, uint32_t y, uint32_t sum) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y << 16) >> 16)) + + ((((int32_t)x) >> 16) * (((int32_t)y) >> 16)) + + (((int32_t)sum)))); +} + +/** + \brief Pre-exchanged dual 16-bit signed multiply with single 32-bit accumulator. + \details This function enables you to perform two signed 16-bit multiplications with exchanged + halfwords of the second operand, adding both results to a 32-bit accumulate operand. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the product of each multiplication with exchanged halfwords of the second + operand added to the accumulate value, as a 32-bit integer. + \remark + p1 = val1[15:0] * val2[31:16] \n + p2 = val1[31:16] * val2[15:0] \n + res[31:0] = p1 + p2 + val3[31:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __SMLADX(uint32_t x, uint32_t y, uint32_t sum) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y) >> 16)) + + ((((int32_t)x) >> 16) * (((int32_t)y << 16) >> 16)) + + (((int32_t)sum)))); +} + +/** + \brief Dual 16-bit signed multiply with exchange subtract with 32-bit accumulate. + \details This function enables you to perform two 16-bit signed multiplications, take the + difference of the products, subtracting the high halfword product from the low + halfword product, and add the difference to a 32-bit accumulate operand. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the difference of the product of each multiplication, added to the accumulate value. + \remark + p1 = val1[15:0] * val2[15:0] \n + p2 = val1[31:16] * val2[31:16] \n + res[31:0] = p1 - p2 + val3[31:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __SMLSD(uint32_t x, uint32_t y, uint32_t sum) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y << 16) >> 16)) - + ((((int32_t)x) >> 16) * (((int32_t)y) >> 16)) + + (((int32_t)sum)))); +} + +/** + \brief Dual 16-bit signed multiply with exchange subtract with 32-bit accumulate. + \details This function enables you to exchange the halfwords in the second operand, then perform two 16-bit + signed multiplications. The difference of the products is added to a 32-bit accumulate operand. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the difference of the product of each multiplication, added to the accumulate value. + \remark + p1 = val1[15:0] * val2[31:16] \n + p2 = val1[31:16] * val2[15:0] \n + res[31:0] = p1 - p2 + val3[31:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __SMLSDX(uint32_t x, uint32_t y, uint32_t sum) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y) >> 16)) - + ((((int32_t)x) >> 16) * (((int32_t)y << 16) >> 16)) + + (((int32_t)sum)))); +} + +/** + \brief Dual 16-bit signed multiply with single 64-bit accumulator. + \details This function enables you to perform two signed 16-bit multiplications, adding both results + to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. + This overflow is not detected if it occurs. Instead, the result wraps around modulo2^64. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the product of each multiplication added to the accumulate value. + \remark + p1 = val1[15:0] * val2[15:0] \n + p2 = val1[31:16] * val2[31:16] \n + sum = p1 + p2 + val3[63:32][31:0] \n + res[63:32] = sum[63:32] \n + res[31:0] = sum[31:0] + */ +__ALWAYS_STATIC_INLINE uint64_t __SMLALD(uint32_t x, uint32_t y, uint64_t sum) +{ + return ((uint64_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y << 16) >> 16)) + + ((((int32_t)x) >> 16) * (((int32_t)y) >> 16)) + + (((uint64_t)sum)))); +} + +/** + \brief Dual 16-bit signed multiply with exchange with single 64-bit accumulator. + \details This function enables you to exchange the halfwords of the second operand, and perform two + signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow + is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. + Instead, the result wraps around modulo2^64. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the product of each multiplication added to the accumulate value. + \remark + p1 = val1[15:0] * val2[31:16] \n + p2 = val1[31:16] * val2[15:0] \n + sum = p1 + p2 + val3[63:32][31:0] \n + res[63:32] = sum[63:32] \n + res[31:0] = sum[31:0] + */ +__ALWAYS_STATIC_INLINE uint64_t __SMLALDX(uint32_t x, uint32_t y, uint64_t sum) +{ + return ((uint64_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y) >> 16)) + + ((((int32_t)x) >> 16) * (((int32_t)y << 16) >> 16)) + + (((uint64_t)sum)))); +} + +/** + \brief dual 16-bit signed multiply subtract with 64-bit accumulate. + \details This function It enables you to perform two 16-bit signed multiplications, take the difference + of the products, subtracting the high halfword product from the low halfword product, and add the + difference to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the + subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not + detected. Instead, the result wraps round to modulo2^64. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the difference of the product of each multiplication, added to the accumulate value. + \remark + p1 = val1[15:0] * val2[15:0] \n + p2 = val1[31:16] * val2[31:16] \n + res[63:32][31:0] = p1 - p2 + val3[63:32][31:0] + */ +__ALWAYS_STATIC_INLINE uint64_t __SMLSLD(uint32_t x, uint32_t y, uint64_t sum) +{ + return ((uint64_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y << 16) >> 16)) - + ((((int32_t)x) >> 16) * (((int32_t)y) >> 16)) + + (((uint64_t)sum)))); +} + +/** + \brief Dual 16-bit signed multiply with exchange subtract with 64-bit accumulate. + \details This function enables you to exchange the halfwords of the second operand, perform two 16-bit multiplications, + adding the difference of the products to a 64-bit accumulate operand. Overflow cannot occur during the + multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow + is not detected. Instead, the result wraps round to modulo2^64. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \param [in] sum accumulate value. + \return the difference of the product of each multiplication, added to the accumulate value. + \remark + p1 = val1[15:0] * val2[31:16] \n + p2 = val1[31:16] * val2[15:0] \n + res[63:32][31:0] = p1 - p2 + val3[63:32][31:0] + */ +__ALWAYS_STATIC_INLINE uint64_t __SMLSLDX(uint32_t x, uint32_t y, uint64_t sum) +{ + return ((uint64_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y) >> 16)) - + ((((int32_t)x) >> 16) * (((int32_t)y << 16) >> 16)) + + (((uint64_t)sum)))); +} + +/** + \brief 32-bit signed multiply with 32-bit truncated accumulator. + \details This function enables you to perform a signed 32-bit multiplications, adding the most + significant 32 bits of the 64-bit result to a 32-bit accumulate operand. + \param [in] x first operand for multiplication. + \param [in] y second operand for multiplication. + \param [in] sum accumulate value. + \return the product of multiplication (most significant 32 bits) is added to the accumulate value, as a 32-bit integer. + \remark + p = val1 * val2 \n + res[31:0] = p[63:32] + val3[31:0] + */ +__ALWAYS_STATIC_INLINE uint32_t __SMMLA(int32_t x, int32_t y, int32_t sum) +{ + return (uint32_t)((int32_t)((int64_t)((int64_t)x * (int64_t)y) >> 32) + sum); +} + +/** + \brief Sum of dual 16-bit signed multiply. + \details This function enables you to perform two 16-bit signed multiplications, adding the products together. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \return the sum of the products of the two 16-bit signed multiplications. + \remark + p1 = val1[15:0] * val2[15:0] \n + p2 = val1[31:16] * val2[31:16] \n + res[31:0] = p1 + p2 + */ +__ALWAYS_STATIC_INLINE uint32_t __SMUAD(uint32_t x, uint32_t y) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y << 16) >> 16)) + + ((((int32_t)x) >> 16) * (((int32_t)y) >> 16)))); +} + +/** + \brief Dual 16-bit signed multiply returning difference. + \details This function enables you to perform two 16-bit signed multiplications, taking the difference + of the products by subtracting the high halfword product from the low halfword product. + \param [in] x first 16-bit operands for each multiplication. + \param [in] y second 16-bit operands for each multiplication. + \return the difference of the products of the two 16-bit signed multiplications. + \remark + p1 = val1[15:0] * val2[15:0] \n + p2 = val1[31:16] * val2[31:16] \n + res[31:0] = p1 - p2 + */ +__ALWAYS_STATIC_INLINE uint32_t __SMUSD(uint32_t x, uint32_t y) +{ + return ((uint32_t)(((((int32_t)x << 16) >> 16) * (((int32_t)y << 16) >> 16)) - + ((((int32_t)x) >> 16) * (((int32_t)y) >> 16)))); +} + +/** + \brief Dual extracted 8-bit to 16-bit signed addition. + \details This function enables you to extract two 8-bit values from the second operand (at bit positions + [7:0] and [23:16]), sign-extend them to 16-bits each, and add the results to the first operand. + \param [in] x values added to the sign-extended to 16-bit values. + \param [in] y two 8-bit values to be extracted and sign-extended. + \return the addition of val1 and val2, where the 8-bit values in val2[7:0] and + val2[23:16] have been extracted and sign-extended prior to the addition. + \remark + res[15:0] = val1[15:0] + SignExtended(val2[7:0]) \n + res[31:16] = val1[31:16] + SignExtended(val2[23:16]) + */ +__ALWAYS_STATIC_INLINE uint32_t __SXTAB16(uint32_t x, uint32_t y) +{ + return ((uint32_t)((((((int32_t)y << 24) >> 24) + (((int32_t)x << 16) >> 16)) & (int32_t)0x0000FFFF) | + (((((int32_t)y << 8) >> 8) + (((int32_t)x >> 16) << 16)) & (int32_t)0xFFFF0000))); +} + +/** + \brief Extracted 16-bit to 32-bit unsigned addition. + \details This function enables you to extract two 8-bit values from one operand, zero-extend + them to 16 bits each, and add the results to two 16-bit values from another operand. + \param [in] x values added to the zero-extended to 16-bit values. + \param [in] y two 8-bit values to be extracted and zero-extended. + \return the addition of val1 and val2, where the 8-bit values in val2[7:0] and + val2[23:16] have been extracted and zero-extended prior to the addition. + \remark + res[15:0] = ZeroExt(val2[7:0] to 16 bits) + val1[15:0] \n + res[31:16] = ZeroExt(val2[31:16] to 16 bits) + val1[31:16] + */ +__ALWAYS_STATIC_INLINE uint32_t __UXTAB16(uint32_t x, uint32_t y) +{ + return ((uint32_t)(((((y << 24) >> 24) + ((x << 16) >> 16)) & 0x0000FFFF) | + ((((y << 8) >> 8) + ((x >> 16) << 16)) & 0xFFFF0000))); +} + +/** + \brief Dual extract 8-bits and sign extend each to 16-bits. + \details This function enables you to extract two 8-bit values from an operand and sign-extend them to 16 bits each. + \param [in] x two 8-bit values in val[7:0] and val[23:16] to be sign-extended. + \return the 8-bit values sign-extended to 16-bit values.\n + sign-extended value of val[7:0] in the low halfword of the return value.\n + sign-extended value of val[23:16] in the high halfword of the return value. + \remark + res[15:0] = SignExtended(val[7:0]) \n + res[31:16] = SignExtended(val[23:16]) + */ +__ALWAYS_STATIC_INLINE uint32_t __SXTB16(uint32_t x) +{ + return ((uint32_t)(((((int32_t)x << 24) >> 24) & (int32_t)0x0000FFFF) | + ((((int32_t)x << 8) >> 8) & (int32_t)0xFFFF0000))); +} + +/** + \brief Dual extract 8-bits and zero-extend to 16-bits. + \details This function enables you to extract two 8-bit values from an operand and zero-extend them to 16 bits each. + \param [in] x two 8-bit values in val[7:0] and val[23:16] to be zero-extended. + \return the 8-bit values sign-extended to 16-bit values.\n + sign-extended value of val[7:0] in the low halfword of the return value.\n + sign-extended value of val[23:16] in the high halfword of the return value. + \remark + res[15:0] = SignExtended(val[7:0]) \n + res[31:16] = SignExtended(val[23:16]) + */ +__ALWAYS_STATIC_INLINE uint32_t __UXTB16(uint32_t x) +{ + return ((uint32_t)((((x << 24) >> 24) & 0x0000FFFF) | + (((x << 8) >> 8) & 0xFFFF0000))); +} + +#endif /* _CSI_RV32_GCC_H_ */ diff --git a/freertos/cvitek/install/include/arch/csr.h b/freertos/cvitek/install/include/arch/csr.h new file mode 100644 index 000000000..08d9e6044 --- /dev/null +++ b/freertos/cvitek/install/include/arch/csr.h @@ -0,0 +1,83 @@ +// See LICENSE for license details. + +#ifndef RISCV_CSR_ENCODING_H +#define RISCV_CSR_ENCODING_H + +#define MSTATUS_UIE 0x00000001 +#define MSTATUS_SIE 0x00000002 +#define MSTATUS_HIE 0x00000004 +#define MSTATUS_MIE 0x00000008 +#define MSTATUS_UPIE 0x00000010 +#define MSTATUS_SPIE 0x00000020 +#define MSTATUS_HPIE 0x00000040 +#define MSTATUS_MPIE 0x00000080 +#define MSTATUS_SPP 0x00000100 +#define MSTATUS_HPP 0x00000600 +#define MSTATUS_MPP 0x00001800 +#define MSTATUS_FS 0x00006000 +#define MSTATUS_XS 0x00018000 +#define MSTATUS_MPRV 0x00020000 +#define MSTATUS_SUM 0x00040000 +#define MSTATUS_MXR 0x00080000 +#define MSTATUS_TVM 0x00100000 +#define MSTATUS_TW 0x00200000 +#define MSTATUS_TSR 0x00400000 +#define MSTATUS32_SD 0x80000000 +#define MSTATUS64_SD 0x8000000000000000 + +#define MIP_SSIE (1 << IRQ_S_SOFT) +#define MIP_HSIE (1 << IRQ_H_SOFT) +#define MIP_MSIE (1 << IRQ_M_SOFT) +#define MIP_STIE (1 << IRQ_S_TIMER) +#define MIP_HTIE (1 << IRQ_H_TIMER) +#define MIP_MTIE (1 << IRQ_M_TIMER) +#define MIP_SEIE (1 << IRQ_S_EXT) +#define MIP_HEIE (1 << IRQ_H_EXT) +#define MIP_MEIE (1 << IRQ_M_EXT) + +#define IRQ_S_SOFT 1 +#define IRQ_H_SOFT 2 +#define IRQ_M_SOFT 3 +#define IRQ_S_TIMER 5 +#define IRQ_H_TIMER 6 +#define IRQ_M_TIMER 7 +#define IRQ_S_EXT 9 +#define IRQ_H_EXT 10 +#define IRQ_M_EXT 11 +#define IRQ_COP 12 +#define IRQ_HOST 13 + +# define MAX_HARTS 1 + +#ifndef __ASSEMBLER__ + +#ifdef __GNUC__ +#define read_csr(reg) ({ unsigned long __tmp; \ + asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \ + __tmp; }) + +#define write_csr(reg, val) ({ \ + asm volatile ("csrw " #reg ", %0" :: "rK"(val)); }) + +#define swap_csr(reg, val) ({ unsigned long __tmp; \ + asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "rK"(val)); \ + __tmp; }) + +#define set_csr(reg, bit) ({ unsigned long __tmp; \ + asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \ + __tmp; }) + +#define clear_csr(reg, bit) ({ unsigned long __tmp; \ + asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \ + __tmp; }) + +#define rdtime() read_csr(time) +#define rdcycle() read_csr(cycle) +#define rdinstret() read_csr(instret) + +#endif + +#endif + +#endif + diff --git a/freertos/cvitek/install/include/arch/io.h b/freertos/cvitek/install/include/arch/io.h new file mode 100644 index 000000000..cf11121c6 --- /dev/null +++ b/freertos/cvitek/install/include/arch/io.h @@ -0,0 +1,47 @@ +/* + * Based on arch/arm/include/asm/io.h + * + * Copyright (C) 1996-2000 Russell King + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_IO_H +#define __ASM_IO_H + +/* + * I/O memory access primitives. Reads are ordered relative to any + * following Normal memory access. Writes are ordered relative to any prior + * Normal memory access. + */ +#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) +#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) +#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) +#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; }) + +#define writeb(v, c) ({ __iowmb(); writeb_relaxed((v), (c)); }) +#define writew(v, c) ({ __iowmb(); writew_relaxed((v), (c)); }) +#define writel(v, c) ({ __iowmb(); writel_relaxed((v), (c)); }) +#define writeq(v, c) ({ __iowmb(); writeq_relaxed((v), (c)); }) + +#define ioread8 readb +#define ioread16 readw +#define ioread32 readl +#define ioread64 readq + +#define iowrite8 writeb +#define iowrite16 writew +#define iowrite32 writel +#define iowrite64 writeq + +#endif /* __ASM_IO_H */ diff --git a/freertos/cvitek/install/include/arch/irq.h b/freertos/cvitek/install/include/arch/irq.h new file mode 100644 index 000000000..bd0e3aeb5 --- /dev/null +++ b/freertos/cvitek/install/include/arch/irq.h @@ -0,0 +1,47 @@ +#ifndef __IRQ__ +#define __IRQ__ +#if 0 +// IRQ API +typedef int (*irq_handler_t)(int irqn, void *priv); + +extern int request_irq(unsigned int irqn, irq_handler_t handler, unsigned long flags, + const char *name, void *priv); + +void disable_irq(unsigned int irqn); +void enable_irq(unsigned int irqn); + +void cpu_enable_irqs(void); +void cpu_disable_irqs(void); +#endif + +/* RISC-V */ +#define CLINT_BASE 0x74000000 +#define PLIC_BASE 0x70000000 + +/* CLINT */ +#define CLINT_TIMECMPL0 (CLINT_BASE + 0x4000) +#define CLINT_TIMECMPH0 (CLINT_BASE + 0x4004) + +#define CLINT_MTIME(cnt) asm volatile("csrr %0, time\n" : "=r"(cnt) :: "memory"); + +/* PLIC */ +#define PLIC_PRIORITY0 (PLIC_BASE + 0x0) +#define PLIC_PRIORITY1 (PLIC_BASE + 0x4) +#define PLIC_PRIORITY2 (PLIC_BASE + 0x8) +#define PLIC_PRIORITY3 (PLIC_BASE + 0xc) +#define PLIC_PRIORITY4 (PLIC_BASE + 0x10) + +#define PLIC_PENDING1 (PLIC_BASE + 0x1000) +#define PLIC_PENDING2 (PLIC_BASE + 0x1004) +#define PLIC_PENDING3 (PLIC_BASE + 0x1008) +#define PLIC_PENDING4 (PLIC_BASE + 0x100C) + +#define PLIC_ENABLE1 (PLIC_BASE + 0x2000) +#define PLIC_ENABLE2 (PLIC_BASE + 0x2004) +#define PLIC_ENABLE3 (PLIC_BASE + 0x2008) +#define PLIC_ENABLE4 (PLIC_BASE + 0x200C) + +#define PLIC_THRESHOLD (PLIC_BASE + 0x200000) +#define PLIC_CLAIM (PLIC_BASE + 0x200004) + +#endif diff --git a/freertos/cvitek/install/include/arch/ptrace.h b/freertos/cvitek/install/include/arch/ptrace.h new file mode 100644 index 000000000..76d68698b --- /dev/null +++ b/freertos/cvitek/install/include/arch/ptrace.h @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2017 Microsemi Corporation. + * Copyright (c) 2017 Padmarao Begari + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_RISCV_PTRACE_H +#define __ASM_RISCV_PTRACE_H + +struct pt_regs { + unsigned long sepc; + unsigned long ra; + unsigned long sp; + unsigned long gp; + unsigned long tp; + unsigned long t0; + unsigned long t1; + unsigned long t2; + unsigned long s0; + unsigned long s1; + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; + unsigned long a4; + unsigned long a5; + unsigned long a6; + unsigned long a7; + unsigned long s2; + unsigned long s3; + unsigned long s4; + unsigned long s5; + unsigned long s6; + unsigned long s7; + unsigned long s8; + unsigned long s9; + unsigned long s10; + unsigned long s11; + unsigned long t3; + unsigned long t4; + unsigned long t5; + unsigned long t6; + /* Supervisor CSRs */ + unsigned long sstatus; + unsigned long sbadaddr; + unsigned long scause; +}; + +#ifdef CONFIG_64BIT +#define REG_FMT "%016lx" +#else +#define REG_FMT "%08lx" +#endif + +#define user_mode(regs) (((regs)->sstatus & SR_PS) == 0) + +/* Helpers for working with the instruction pointer */ +#define GET_IP(regs) ((regs)->sepc) +#define SET_IP(regs, val) (GET_IP(regs) = (val)) + +static inline unsigned long instruction_pointer(struct pt_regs *regs) +{ + return GET_IP(regs); +} + +static inline void instruction_pointer_set(struct pt_regs *regs, + unsigned long val) +{ + SET_IP(regs, val); +} + +#define profile_pc(regs) instruction_pointer(regs) + +/* Helpers for working with the user stack pointer */ +#define GET_USP(regs) ((regs)->sp) +#define SET_USP(regs, val) (GET_USP(regs) = (val)) + +static inline unsigned long user_stack_pointer(struct pt_regs *regs) +{ + return GET_USP(regs); +} + +static inline void user_stack_pointer_set(struct pt_regs *regs, + unsigned long val) +{ + SET_USP(regs, val); +} + +/* Helpers for working with the frame pointer */ +#define GET_FP(regs) ((regs)->s0) +#define SET_FP(regs, val) (GET_FP(regs) = (val)) + +static inline unsigned long frame_pointer(struct pt_regs *regs) +{ + return GET_FP(regs); +} + +static inline void frame_pointer_set(struct pt_regs *regs, + unsigned long val) +{ + SET_FP(regs, val); +} + +#endif /* __ASM_RISCV_PTRACE_H */ diff --git a/freertos/cvitek/install/include/arch/riscv-reg.h b/freertos/cvitek/install/include/arch/riscv-reg.h new file mode 100644 index 000000000..0353f3be4 --- /dev/null +++ b/freertos/cvitek/install/include/arch/riscv-reg.h @@ -0,0 +1,43 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#ifndef RISCV_REG_H_ +#define RISCV_REG_H_ + +#if __riscv_xlen == 32 +#define REGSIZE 4 +#define REGSHIFT 2 +#define LOAD lw +#define STOR sw +#elif __riscv_xlen == 64 +#define REGSIZE 8 +#define REGSHIFT 3 +#define LOAD ld +#define STOR sd +#endif /* __riscv_xlen */ + +#endif /* RISCV_REG_H_ */ diff --git a/freertos/cvitek/install/include/arch/riscv-virt.h b/freertos/cvitek/install/include/arch/riscv-virt.h new file mode 100644 index 000000000..2f35393f3 --- /dev/null +++ b/freertos/cvitek/install/include/arch/riscv-virt.h @@ -0,0 +1,60 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#ifndef RISCV_VIRT_H_ +#define RISCV_VIRT_H_ + +#include "riscv-reg.h" + +#ifdef __ASSEMBLER__ +#define CONS(NUM, TYPE)NUM +#else +#define CONS(NUM, TYPE)NUM##TYPE +#endif /* __ASSEMBLER__ */ + +#define PRIM_HART 0 +#ifdef RISCV_QEMU +#define CLINT_ADDR CONS(0x02000000, UL) +#define CLINT_MSIP CONS(0x0000, UL) +#define CLINT_MTIMECMP CONS(0x4000, UL) +#define CLINT_MTIME CONS(0xbff8, UL) +#else +#define CLINT_ADDR CONS(0x74000000, UL) +#define CLINT_MSIP CONS(0x0000, UL) +#define CLINT_MTIMECMP CONS(0x4000, UL) +#undef CLINT_MTIME +//#define CLINT_MTIME CONS(0x4004, UL) +#endif +//#define NS16550_ADDR CONS(0x10000000, UL) + +#ifndef __ASSEMBLER__ + +int xGetCoreID( void ); + +#endif /* __ASSEMBLER__ */ + +#endif /* RISCV_VIRT_H_ */ diff --git a/freertos/cvitek/install/include/common/cif_uapi.h b/freertos/cvitek/install/include/common/cif_uapi.h new file mode 100644 index 000000000..13a7ae063 --- /dev/null +++ b/freertos/cvitek/install/include/common/cif_uapi.h @@ -0,0 +1,399 @@ +#ifndef _U_CIF_UAPI_H_ +#define _U_CIF_UAPI_H_ + +#define MIPI_LANE_NUM 4 +#define HDR_VC_NUM 2 +#define SYNC_CODE_NUM 4 +#define BT_DEMUX_NUM 4 +#define MIPI_DEMUX_NUM 4 + +struct img_size_s { + unsigned int x; // start x + unsigned int y; // start y + unsigned int width; + unsigned int height; +}; + +enum rx_mac_clk_e { + RX_MAC_CLK_200M = 0, + RX_MAC_CLK_300M, + RX_MAC_CLK_400M, + RX_MAC_CLK_500M, + RX_MAC_CLK_600M, + RX_MAC_CLK_BUTT, +}; + +enum cam_pll_freq_e { + CAMPLL_FREQ_NONE = 0, + CAMPLL_FREQ_37P125M, + CAMPLL_FREQ_25M, + CAMPLL_FREQ_27M, + CAMPLL_FREQ_24M, + CAMPLL_FREQ_26M, + CAMPLL_FREQ_NUM +}; + +struct mclk_pll_s { + unsigned int cam; + enum cam_pll_freq_e freq; +}; + +struct dphy_s { + unsigned char enable; + unsigned char hs_settle; +}; + +enum lane_divide_mode_e { + LANE_DIVIDE_MODE_0 = 0, + LANE_DIVIDE_MODE_1, + LANE_DIVIDE_MODE_2, + LANE_DIVIDE_MODE_3, + LANE_DIVIDE_MODE_4, + LANE_DIVIDE_MODE_5, + LANE_DIVIDE_MODE_6, + LANE_DIVIDE_MODE_7, + LANE_DIVIDE_MODE_BUTT +}; + +enum input_mode_e { + INPUT_MODE_MIPI = 0, + INPUT_MODE_SUBLVDS, + INPUT_MODE_HISPI, + INPUT_MODE_CMOS, + INPUT_MODE_BT1120, + INPUT_MODE_BT601_19B_VHS, + INPUT_MODE_BT656_9B, + INPUT_MODE_CUSTOM_0, + INPUT_MODE_BT_DEMUX, + INPUT_MODE_BUTT +}; + +enum raw_data_type_e { + RAW_DATA_8BIT = 0, + RAW_DATA_10BIT, + RAW_DATA_12BIT, + YUV422_8BIT, /* MIPI-CSI only */ + YUV422_10BIT, /* MIPI-CSI only*/ + RAW_DATA_BUTT +}; + +enum mipi_hdr_mode_e { + CVI_MIPI_HDR_MODE_NONE = 0, + CVI_MIPI_HDR_MODE_VC, + CVI_MIPI_HDR_MODE_DT, + CVI_MIPI_HDR_MODE_DOL, + CVI_MIPI_HDR_MODE_MANUAL, /* SOI case */ + CVI_MIPI_HDR_MODE_BUTT +}; + +enum hdr_mode_e { + CVI_HDR_MODE_NONE = 0, + CVI_HDR_MODE_2F, + CVI_HDR_MODE_3F, + CVI_HDR_MODE_DOL_2F, + CVI_HDR_MODE_DOL_3F, + CVI_HDR_MODE_DOL_BUTT +}; + +enum lvds_sync_mode_e { + LVDS_SYNC_MODE_SOF = 0, + LVDS_SYNC_MODE_SAV, + LVDS_SYNC_MODE_BUTT +}; + +enum lvds_bit_endian { + LVDS_ENDIAN_LITTLE = 0, + LVDS_ENDIAN_BIG, + LVDS_ENDIAN_BUTT +}; + +enum lvds_vsync_type_e { + LVDS_VSYNC_NORMAL = 0, + LVDS_VSYNC_SHARE, + LVDS_VSYNC_HCONNECT, + LVDS_VSYNC_BUTT +}; + +enum lvds_fid_type_e { + LVDS_FID_NONE = 0, + LVDS_FID_IN_SAV, + LVDS_FID_BUTT +}; + +struct lvds_fid_type_s { + enum lvds_fid_type_e fid; +}; + +struct lvds_vsync_type_s { + enum lvds_vsync_type_e sync_type; + unsigned short hblank1; + unsigned short hblank2; +}; + +struct lvds_dev_attr_s { + enum hdr_mode_e hdr_mode; + enum lvds_sync_mode_e sync_mode; + enum raw_data_type_e raw_data_type; + enum lvds_bit_endian data_endian; + enum lvds_bit_endian sync_code_endian; + short lane_id[MIPI_LANE_NUM+1]; + short sync_code[MIPI_LANE_NUM][HDR_VC_NUM+1][SYNC_CODE_NUM]; +/* + * sublvds: + * sync_code[x][0][0] sync_code[x][0][1] sync_code[x][0][2] sync_code[x][0][3] + * n0_lef_sav n0_lef_eav n1_lef_sav n1_lef_eav + * sync_code[x][1][0] sync_code[x][1][1] sync_code[x][1][2] sync_code[x][1][3] + * n0_sef_sav n0_sef_eav n1_sef_sav n1_sef_eav + * sync_code[x][2][0] sync_code[x][2][1] sync_code[x][2][2] sync_code[x][2][3] + * n0_lsef_sav n0_lsef_eav n1_lsef_sav n1_lsef_eav + * + * hispi: + * sync_code[x][0][0] sync_code[x][0][1] sync_code[x][0][2] sync_code[x][0][3] + * t1_sol tl_eol t1_sof t1_eof + * sync_code[x][1][0] sync_code[x][1][1] sync_code[x][1][2] sync_code[x][1][3] + * t2_sol t2_eol t2_sof t2_eof + */ + struct lvds_vsync_type_s vsync_type; + struct lvds_fid_type_s fid_type; + char pn_swap[MIPI_LANE_NUM+1]; +}; + +struct mipi_demux_info_s { + unsigned int demux_en; + unsigned char vc_mapping[MIPI_DEMUX_NUM]; +}; + +struct mipi_dev_attr_s { + enum raw_data_type_e raw_data_type; + short lane_id[MIPI_LANE_NUM+1]; + enum mipi_hdr_mode_e hdr_mode; + short data_type[HDR_VC_NUM]; + char pn_swap[MIPI_LANE_NUM+1]; + struct dphy_s dphy; + struct mipi_demux_info_s demux; +}; + +struct manual_hdr_attr_s { + unsigned int manual_en; + unsigned short l2s_distance; + unsigned short lsef_length; + unsigned int discard_padding_lines; + unsigned int update; +}; + +enum ttl_pin_func_e { + TTL_PIN_FUNC_VS, + TTL_PIN_FUNC_HS, + TTL_PIN_FUNC_VDE, + TTL_PIN_FUNC_HDE, + TTL_PIN_FUNC_D0, + TTL_PIN_FUNC_D1, + TTL_PIN_FUNC_D2, + TTL_PIN_FUNC_D3, + TTL_PIN_FUNC_D4, + TTL_PIN_FUNC_D5, + TTL_PIN_FUNC_D6, + TTL_PIN_FUNC_D7, + TTL_PIN_FUNC_D8, + TTL_PIN_FUNC_D9, + TTL_PIN_FUNC_D10, + TTL_PIN_FUNC_D11, + TTL_PIN_FUNC_D12, + TTL_PIN_FUNC_D13, + TTL_PIN_FUNC_D14, + TTL_PIN_FUNC_D15, + TTL_PIN_FUNC_NUM, +}; + +enum ttl_src_e { + TTL_VI_SRC_VI0 = 0, + TTL_VI_SRC_VI1, + TTL_VI_SRC_VI2, /* BT demux */ + TTL_VI_SRC_NUM +}; + +enum bt_demux_mode_e { + BT_DEMUX_DISABLE = 0, + BT_DEMUX_2, + BT_DEMUX_3, + BT_DEMUX_4, +}; + +struct bt_demux_sync_s { + unsigned char sav_vld; + unsigned char sav_blk; + unsigned char eav_vld; + unsigned char eav_blk; +}; + +struct bt_demux_attr_s { + signed char func[TTL_PIN_FUNC_NUM]; + unsigned short v_fp; + unsigned short h_fp; + unsigned short v_bp; + unsigned short h_bp; + enum bt_demux_mode_e mode; + unsigned char sync_code_part_A[3]; /* sync code 0~2 */ + struct bt_demux_sync_s sync_code_part_B[BT_DEMUX_NUM]; /* sync code 3 */ + char yc_exchg; +}; + +struct ttl_dev_attr_s { + enum ttl_src_e vi; + signed char func[TTL_PIN_FUNC_NUM]; + unsigned short v_bp; + unsigned short h_bp; +}; + +struct combo_dev_attr_s { + enum input_mode_e input_mode; + enum rx_mac_clk_e mac_clk; + struct mclk_pll_s mclk; + union { + struct mipi_dev_attr_s mipi_attr; + struct lvds_dev_attr_s lvds_attr; + struct ttl_dev_attr_s ttl_attr; + struct bt_demux_attr_s bt_demux_attr; + }; + unsigned int devno; + struct img_size_s img_size; + struct manual_hdr_attr_s hdr_manu; +}; + +enum clk_edge_e { + CLK_UP_EDGE = 0, + CLK_DOWN_EDGE, + CLK_EDGE_BUTT +}; + +struct clk_edge_s { + unsigned int devno; + enum clk_edge_e edge; +}; + +enum output_msb_e { + OUTPUT_NORM_MSB = 0, + OUTPUT_REVERSE_MSB, + OUTPUT_MSB_BUTT +}; + +struct msb_s { + unsigned int devno; + enum output_msb_e msb; +}; + +struct crop_top_s { + unsigned int devno; + unsigned int crop_top; + unsigned int update; +}; + +struct manual_hdr_s { + unsigned int devno; + struct manual_hdr_attr_s attr; +}; + +struct vsync_gen_s { + unsigned int devno; + unsigned int distance_fp; +}; + +enum bt_fmt_out_e { + BT_FMT_OUT_CBYCRY, + BT_FMT_OUT_CRYCBY, + BT_FMT_OUT_YCBYCR, + BT_FMT_OUT_YCRYCB, +}; + +struct bt_fmt_out_s { + unsigned int devno; + enum bt_fmt_out_e fmt_out; +}; + +struct cif_crop_win_s { + unsigned int devno; + unsigned int enable; + unsigned int x; + unsigned int y; + unsigned int w; + unsigned int h; +}; + +struct cif_attr_s { + unsigned int devno; + unsigned int stagger_vsync; +}; + +#define IOCPARM_MASK 0x7f /* parameters must be < 128 bytes */ +#define IOC_VOID 0x20000000 /* no parameters */ +#define IOC_OUT 0x40000000 /* copy out parameters */ +#define IOC_IN 0x80000000 /* copy in parameters */ +#define IOC_INOUT (IOC_IN|IOC_OUT) + +#define _IO(x, y) (IOC_VOID|((x)<<8)|(y)) +#define _IOR(x, y, t) (IOC_OUT|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) +#define _IOW(x, y, t) (IOC_IN|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) + +/* mipi_rx ioctl commands related definition */ +#define CVI_MIPI_IOC_MAGIC 'm' + +/* Support commands */ +#define CVI_MIPI_SET_DEV_ATTR _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x01, struct combo_dev_attr_s) +#define CVI_MIPI_SET_OUTPUT_CLK_EDGE _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x02, struct clk_edge_s) +#define CVI_MIPI_RESET_SENSOR _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x05, unsigned int) +#define CVI_MIPI_UNRESET_SENSOR _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x06, unsigned int) +#define CVI_MIPI_RESET_MIPI _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x07, unsigned int) +#define CVI_MIPI_ENABLE_SENSOR_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x10, unsigned int) +#define CVI_MIPI_DISABLE_SENSOR_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x11, unsigned int) +#define CVI_MIPI_SET_CROP_TOP _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x20, struct crop_top_s) +#define CVI_MIPI_SET_HDR_MANUAL _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x21, struct manual_hdr_s) +#define CVI_MIPI_SET_LVDS_FP_VS _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x22, struct vsync_gen_s) +#define CVI_MIPI_SET_HS_MODE _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x0B, unsigned int) +#define CVI_MIPI_RESET_LVDS _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x23, unsigned int) +#define CVI_MIPI_SET_BT_FMT_OUT _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x24, struct bt_fmt_out_s) +#define CVI_MIPI_GET_CIF_ATTR _IOR(CVI_MIPI_IOC_MAGIC, \ + 0x25, struct cif_attr_s) +#define CVI_MIPI_SET_SENSOR_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x26, struct mclk_pll_s) +#define CVI_MIPI_SET_MAX_MAC_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x27, unsigned int) +#define CVI_MIPI_SET_CROP_WINDOW _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x28, struct cif_crop_win_s) +/* Unsupport commands */ +#define CVI_MIPI_SET_PHY_CMVMODE _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x04, unsigned int) +#define CVI_MIPI_UNRESET_MIPI _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x08, unsigned int) +#define CVI_MIPI_RESET_SLVS _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x09, unsigned int) +#define CVI_MIPI_UNRESET_SLVS _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x0A, unsigned int) +#define CVI_MIPI_ENABLE_MIPI_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x0C, unsigned int) +#define CVI_MIPI_DISABLE_MIPI_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x0D, unsigned int) +#define CVI_MIPI_ENABLE_SLVS_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x0E, unsigned int) +#define CVI_MIPI_DISABLE_SLVS_CLOCK _IOW(CVI_MIPI_IOC_MAGIC, \ + 0x0F, unsigned int) + + +/* Functions */ +extern int cif_open(void *param); +extern int cif_release(void); +extern long cif_ioctl(uint32_t devno, unsigned int cmd, unsigned long arg); + +#endif // _U_CVI_VIP_CIF_H_ diff --git a/freertos/cvitek/install/include/common/cvi_ae.h b/freertos/cvitek/install/include/common/cvi_ae.h new file mode 100644 index 000000000..537a6332f --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_ae.h @@ -0,0 +1,100 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_ae.h + * Description: + */ + +#ifndef __CVI_AE_H__ +#define __CVI_AE_H__ + +#include "cvi_comm_isp.h" +#include "cvi_comm_3a.h" +#include "cvi_ae_comm.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +typedef enum _AE_EXPOSURE_PROGRAM { + MANUAL_PROGRAM = 1, + NORMAL_PROGRAM, + APERATURE_PRIORITY_PROGRAM, + SHUTTER_PRIORITY_PROGRAM, + SLOW_SHUTTER_PROGRAM, + FAST_SHUTTER_PROGRAM, + PORTRAIT_PROGRAM, + LANDSCAPE_PROGRAM, +} AE_EXPOSURE_PROGRAM; + +typedef enum _AE_EXPOSURE_MODE { + AUTO_MODE, + MANUAL_MODE, +} AE_EXPOSURE_MODE; + +/* The interface of ae lib register to isp. */ +CVI_S32 CVI_AE_Register(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib); +CVI_S32 CVI_AE_UnRegister(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib); + +/* The callback function of sensor register to ae lib. */ +CVI_S32 CVI_AE_SensorRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ISP_SNS_ATTR_INFO_S *pstSnsAttrInfo, + AE_SENSOR_REGISTER_S *pstRegister); +CVI_S32 CVI_AE_SensorUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, SENSOR_ID SensorId); + +CVI_S32 CVI_ISP_SetExposureAttr(VI_PIPE ViPipe, const ISP_EXPOSURE_ATTR_S *pstExpAttr); +CVI_S32 CVI_ISP_GetExposureAttr(VI_PIPE ViPipe, ISP_EXPOSURE_ATTR_S *pstExpAttr); + +CVI_S32 CVI_ISP_QueryExposureInfo(VI_PIPE ViPipe, ISP_EXP_INFO_S *pstExpInfo); + +CVI_S32 CVI_ISP_SetWDRExposureAttr(VI_PIPE ViPipe, const ISP_WDR_EXPOSURE_ATTR_S *pstWDRExpAttr); +CVI_S32 CVI_ISP_GetWDRExposureAttr(VI_PIPE ViPipe, ISP_WDR_EXPOSURE_ATTR_S *pstWDRExpAttr); + +CVI_S32 CVI_ISP_SetAERouteAttr(VI_PIPE ViPipe, const ISP_AE_ROUTE_S *pstAERouteAttr); +CVI_S32 CVI_ISP_GetAERouteAttr(VI_PIPE ViPipe, ISP_AE_ROUTE_S *pstAERouteAttr); + +CVI_S32 CVI_ISP_SetAERouteAttrEx(VI_PIPE ViPipe, const ISP_AE_ROUTE_EX_S *pstAERouteAttrEx); +CVI_S32 CVI_ISP_GetAERouteAttrEx(VI_PIPE ViPipe, ISP_AE_ROUTE_EX_S *pstAERouteAttrEx); + +CVI_S32 CVI_ISP_SetSmartExposureAttr(VI_PIPE ViPipe, const ISP_SMART_EXPOSURE_ATTR_S *pstSmartExpAttr); +CVI_S32 CVI_ISP_GetSmartExposureAttr(VI_PIPE ViPipe, ISP_SMART_EXPOSURE_ATTR_S *pstSmartExpAttr); + +CVI_S32 CVI_ISP_SetAEStatisticsConfig(VI_PIPE ViPipe, const ISP_AE_STATISTICS_CFG_S *pstAeStatCfg); +CVI_S32 CVI_ISP_GetAEStatisticsConfig(VI_PIPE ViPipe, ISP_AE_STATISTICS_CFG_S *pstAeStatCfg); + +CVI_S32 CVI_ISP_SetAERouteSFAttr(VI_PIPE ViPipe, const ISP_AE_ROUTE_S *pstAERouteSFAttr); +CVI_S32 CVI_ISP_GetAERouteSFAttr(VI_PIPE ViPipe, ISP_AE_ROUTE_S *pstAERouteSFAttr); + +CVI_S32 CVI_ISP_SetAERouteSFAttrEx(VI_PIPE ViPipe, const ISP_AE_ROUTE_EX_S *pstAERouteSFAttrEx); +CVI_S32 CVI_ISP_GetAERouteSFAttrEx(VI_PIPE ViPipe, ISP_AE_ROUTE_EX_S *pstAERouteSFAttrEx); + +CVI_S32 CVI_ISP_SetAntiFlicker(VI_PIPE ViPipe, CVI_BOOL enable, CVI_U8 frequency); +CVI_S32 CVI_ISP_GetAntiFlicker(VI_PIPE ViPipe, CVI_BOOL *pEnable, CVI_U8 *pFrequency); + +CVI_S32 CVI_ISP_SetWDRLEOnly(VI_PIPE ViPipe, CVI_BOOL wdrLEOnly); +CVI_S32 CVI_ISP_GetFrameID(VI_PIPE ViPipe, CVI_U32 *frameID); +CVI_S32 CVI_ISP_QueryFps(VI_PIPE ViPipe, CVI_FLOAT *pFps); + + +CVI_S32 CVI_ISP_GetCurrentLvX100(VI_PIPE ViPipe, CVI_S16 *ps16Lv); + +CVI_S32 CVI_ISP_SetFastBootExposure(VI_PIPE ViPipe, CVI_U32 expLine, CVI_U32 again, CVI_U32 dgain, CVI_U32 ispdgain); + +CVI_S32 CVI_ISP_SetIrisAttr(VI_PIPE ViPipe, const ISP_IRIS_ATTR_S *pstIrisAttr); +CVI_S32 CVI_ISP_GetIrisAttr(VI_PIPE ViPipe, ISP_IRIS_ATTR_S *pstIrisAttr); +CVI_S32 CVI_ISP_SetDcirisAttr(VI_PIPE ViPipe, const ISP_DCIRIS_ATTR_S *pstDcirisAttr); +CVI_S32 CVI_ISP_GetDcirisAttr(VI_PIPE ViPipe, ISP_DCIRIS_ATTR_S *pstDcirisAttr); + +CVI_S32 CVI_ISP_SetAELogPath(const char *szPath); +CVI_S32 CVI_ISP_GetAELogPath(char *szPath, CVI_U32 pathSize); +CVI_S32 CVI_ISP_SetAELogName(const char *szName); +CVI_S32 CVI_ISP_GetAELogName(char *szName, CVI_U32 nameSize); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_AE_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_ae_comm.h b/freertos/cvitek/install/include/common/cvi_ae_comm.h new file mode 100644 index 000000000..5a6a00c58 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_ae_comm.h @@ -0,0 +1,152 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_ae_comm.h + * Description: + */ + +#ifndef __CVI_AE_COMM_H__ +#define __CVI_AE_COMM_H__ + +#include "cvi_comm_inc.h" +#include "cvi_comm_3a.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define CVI_AE_LIB_NAME "cvi_ae_lib" + +typedef enum _AE_ACCURACY_E { + AE_ACCURACY_DB = 0, + AE_ACCURACY_LINEAR, + AE_ACCURACY_TABLE, + + AE_ACCURACY_BUTT, +} AE_ACCURACY_E; + +typedef enum _AE_BLC_TYPE_E { + AE_BLC_TYPE_LINEAR = 0, + AE_BLC_TYPE_LADDER, + + AE_BLC_TYPE_BUTT, +} AE_BLC_TYPE_E; + +typedef enum _ISP_SNS_GAIN_MODE_E { + SNS_GAIN_MODE_SHARE = 0, /* gain setting for all wdr frames*/ + SNS_GAIN_MODE_WDR_2F, /* separate gain for 2-frame wdr mode*/ + SNS_GAIN_MODE_WDR_3F, /* separate gain for 3-frame wdr mode*/ + SNS_GAIN_MODE_ONLY_LEF /* gain setting only apply to lef and sef is fixed to 1x */ +} ISP_SNS_GAIN_MODE_E; + + +typedef struct _AE_ACCURACY_S { + AE_ACCURACY_E enAccuType; + float f32Accuracy; + float f32Offset; +} AE_ACCURACY_S; + +typedef struct _AE_SENSOR_DEFAULT_S { + CVI_U8 au8HistThresh[HIST_THRESH_NUM]; + CVI_U8 u8AeCompensation; + + CVI_U32 u32LinesPer500ms; + CVI_U32 u32FlickerFreq; + CVI_U32 u32HmaxTimes; /* unit is ns */ + CVI_U32 u32InitExposure; + CVI_U32 u32InitAESpeed; + CVI_U32 u32InitAETolerance; + + CVI_U32 u32FullLinesStd; + CVI_U32 u32FullLinesMax; + CVI_U32 u32FullLines; + CVI_U32 u32MaxIntTime; /* RW;unit is line */ + CVI_U32 u32MinIntTime; + CVI_U32 u32MaxIntTimeTarget; + CVI_U32 u32MinIntTimeTarget; + AE_ACCURACY_S stIntTimeAccu; + + CVI_U32 u32MaxAgain; + CVI_U32 u32MinAgain; + CVI_U32 u32MaxAgainTarget; + CVI_U32 u32MinAgainTarget; + AE_ACCURACY_S stAgainAccu; + + CVI_U32 u32MaxDgain; + CVI_U32 u32MinDgain; + CVI_U32 u32MaxDgainTarget; + CVI_U32 u32MinDgainTarget; + AE_ACCURACY_S stDgainAccu; + + CVI_U32 u32MaxISPDgainTarget; + CVI_U32 u32MinISPDgainTarget; + CVI_U32 u32ISPDgainShift; + + CVI_U32 u32MaxIntTimeStep; + CVI_U32 u32LFMaxShortTime; + CVI_U32 u32LFMinExposure; +#if 0 + ISP_AE_ROUTE_S stAERouteAttr; + CVI_BOOL bAERouteExValid; + ISP_AE_ROUTE_EX_S stAERouteAttrEx; + + CVI_U16 u16ManRatioEnable; + CVI_U32 au32Ratio[EXP_RATIO_NUM]; + + ISP_IRIS_TYPE_E enIrisType; + ISP_PIRIS_ATTR_S stPirisAttr; + ISP_IRIS_F_NO_E enMaxIrisFNO; + ISP_IRIS_F_NO_E enMinIrisFNO; +#endif + ISP_AE_STRATEGY_E enAeExpMode; + + CVI_U16 u16ISOCalCoef; + CVI_U8 u8AERunInterval; + CVI_FLOAT f32Fps; + CVI_FLOAT f32MinFps; + CVI_U32 denom; + CVI_U32 u32AEResponseFrame; + CVI_U32 u32SnsStableFrame; /* delay for stable statistic after sensor init. (unit: frame) */ + AE_BLC_TYPE_E enBlcType; + ISP_SNS_GAIN_MODE_E enWDRGainMode; +} AE_SENSOR_DEFAULT_S; + +typedef struct _AE_FSWDR_ATTR_S { + ISP_FSWDR_MODE_E enFSWDRMode; +} AE_FSWDR_ATTR_S; + +typedef struct _AE_SENSOR_EXP_FUNC_S { + CVI_S32 (*pfn_cmos_get_ae_default)(VI_PIPE ViPipe, AE_SENSOR_DEFAULT_S *pstAeSnsDft); + + /* the function of sensor set fps */ + CVI_S32 (*pfn_cmos_fps_set)(VI_PIPE ViPipe, CVI_FLOAT f32Fps, AE_SENSOR_DEFAULT_S *pstAeSnsDft); + CVI_S32 (*pfn_cmos_slow_framerate_set)(VI_PIPE ViPipe, CVI_U32 u32FullLines, AE_SENSOR_DEFAULT_S *pstAeSnsDft); + + /* while isp notify ae to update sensor regs, ae call these funcs. */ + CVI_S32 (*pfn_cmos_inttime_update)(VI_PIPE ViPipe, CVI_U32 *u32IntTime); + CVI_S32 (*pfn_cmos_gains_update)(VI_PIPE ViPipe, CVI_U32 *u32Again, CVI_U32 *u32Dgain); + + CVI_S32 (*pfn_cmos_again_calc_table)(VI_PIPE ViPipe, CVI_U32 *pu32AgainLin, CVI_U32 *pu32AgainDb); + CVI_S32 (*pfn_cmos_dgain_calc_table)(VI_PIPE ViPipe, CVI_U32 *pu32DgainLin, CVI_U32 *pu32DgainDb); + + CVI_S32 (*pfn_cmos_get_inttime_max) + (VI_PIPE ViPipe, CVI_U16 u16ManRatioEnable, CVI_U32 *au32Ratio, CVI_U32 *au32IntTimeMax, + CVI_U32 *au32IntTimeMin, CVI_U32 *pu32LFMaxIntTime); + + /* long frame mode set */ + CVI_S32 (*pfn_cmos_ae_fswdr_attr_set)(VI_PIPE ViPipe, AE_FSWDR_ATTR_S *pstAeFSWDRAttr); +} AE_SENSOR_EXP_FUNC_S; + +typedef struct _AE_SENSOR_REGISTER_S { + AE_SENSOR_EXP_FUNC_S stAeExp; +} AE_SENSOR_REGISTER_S; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_AE_COMM_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_af.h b/freertos/cvitek/install/include/common/cvi_af.h new file mode 100644 index 000000000..8d1d746eb --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_af.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_af.h + * Description: + */ + +#ifndef __CVI_AF_H__ +#define __CVI_AF_H__ + +#include "cvi_comm_isp.h" +#include "cvi_comm_3a.h" +#include "cvi_af_comm.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +CVI_S32 CVI_AF_Register(VI_PIPE ViPipe, ALG_LIB_S *pstAfLib); +CVI_S32 CVI_AF_UnRegister(VI_PIPE ViPipe, ALG_LIB_S *pstAfLib); + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_AF_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_af_comm.h b/freertos/cvitek/install/include/common/cvi_af_comm.h new file mode 100644 index 000000000..4c8af105d --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_af_comm.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_af_comm.h + * Description: + */ + +#ifndef __CVI_AF_COMM_H__ +#define __CVI_AF_COMM_H__ + +#include "cvi_comm_inc.h" +#include "cvi_comm_3a.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define CVI_AF_LIB_NAME "cvi_af_lib" + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_AF_COMM_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_awb.h b/freertos/cvitek/install/include/common/cvi_awb.h new file mode 100644 index 000000000..442831276 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_awb.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_awb.h + * Description: + */ + +#ifndef __CVI_AWB_H__ +#define __CVI_AWB_H__ + +#include "cvi_comm_isp.h" +#include "cvi_comm_3a.h" +#include "cvi_awb_comm.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define AWB_LOG_BUFF_SIZE (48*1024) +#define AWB_SNAP_LOG_BUFF_SIZE (AWB_LOG_BUFF_SIZE) + +/* The interface of awb lib register to isp. */ +CVI_S32 CVI_AWB_Register(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib); +CVI_S32 CVI_AWB_UnRegister(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib); + +/* The callback function of sensor register to awb lib. */ +CVI_S32 CVI_AWB_SensorRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib, ISP_SNS_ATTR_INFO_S *pstSnsAttrInfo, + AWB_SENSOR_REGISTER_S *pstRegister); +CVI_S32 CVI_AWB_SensorUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib, SENSOR_ID SensorId); + +CVI_S32 CVI_AWB_QueryInfo(VI_PIPE ViPipe, ISP_WB_Q_INFO_S *pstWB_Q_Info); + +CVI_S32 CVI_ISP_SetWBAttr(VI_PIPE ViPipe, const ISP_WB_ATTR_S *pstWBAttr); +CVI_S32 CVI_ISP_GetWBAttr(VI_PIPE ViPipe, ISP_WB_ATTR_S *pstWBAttr); +CVI_S32 CVI_ISP_SetAWBAttrEx(VI_PIPE ViPipe, const ISP_AWB_ATTR_EX_S *pstAWBAttrEx); +CVI_S32 CVI_ISP_GetAWBAttrEx(VI_PIPE ViPipe, ISP_AWB_ATTR_EX_S *pstAWBAttrEx); + +CVI_S32 CVI_ISP_QueryWBInfo(VI_PIPE ViPipe, ISP_WB_INFO_S *pstWBInfo); + +CVI_S32 CVI_ISP_GetGrayWorldAwbInfo(VI_PIPE ViPipe, CVI_U16 *pRgain, CVI_U16 *pBgain); + +CVI_S32 CVI_ISP_SetAWBLogPath(const char *szPath); +CVI_S32 CVI_ISP_SetAWBLogName(const char *szName); + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_AWB_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_awb_comm.h b/freertos/cvitek/install/include/common/cvi_awb_comm.h new file mode 100644 index 000000000..30770a4ba --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_awb_comm.h @@ -0,0 +1,80 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_awb_comm.h + * Description: + */ + +#ifndef __CVI_AWB_COMM_H__ +#define __CVI_AWB_COMM_H__ + +#include "cvi_comm_inc.h" +#include "cvi_comm_3a.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define CVI_AWB_LIB_NAME "cvi_awb_lib" + +typedef struct cviAWB_SENSOR_DEFAULT_S { + CVI_U16 u16WbRefTemp; + CVI_U16 au16GainOffset[ISP_BAYER_CHN_NUM]; + // CVI_S32 as32WbPara[AWB_CURVE_PARA_NUM]; + + CVI_U16 u16GoldenRgain; + CVI_U16 u16GoldenBgain; + CVI_U16 u16SampleRgain; + CVI_U16 u16SampleBgain; + // AWB_AGC_TABLE_S stAgcTbl; + // AWB_CCM_S stCcm; + CVI_U16 u16InitRgain; + CVI_U16 u16InitGgain; + CVI_U16 u16InitBgain; + CVI_U8 u8AWBRunInterval; +} AWB_SENSOR_DEFAULT_S; + +typedef struct cviAWB_SENSOR_EXP_FUNC_S { + CVI_S32 (*pfn_cmos_get_awb_default)(VI_PIPE ViPipe, AWB_SENSOR_DEFAULT_S *pstAwbSnsDft); + // CVI_S32(*pfn_cmos_get_awb_spec_default)(VI_PIPE ViPipe, AWB_SPEC_SENSOR_DEFAULT_S *pstAwbSpecSnsDft); +} AWB_SENSOR_EXP_FUNC_S; + +typedef struct cviAWB_SENSOR_REGISTER_S { + AWB_SENSOR_EXP_FUNC_S stAwbExp; +} AWB_SENSOR_REGISTER_S; + +typedef struct _ISP_WB_CURVE_S { + CVI_U16 u16CurveSize; + CVI_U16 *u16RGain; + CVI_U16 *u16BGain; + CVI_U16 *u16BGainTop; + CVI_U16 *u16BGainBottom; +} ISP_WB_CURVE_S; + +typedef struct _ISP_WB_Q_INFO_S { + CVI_U16 u16Rgain; + CVI_U16 u16Grgain; + CVI_U16 u16Gbgain; + CVI_U16 u16Bgain; + CVI_U16 u16Saturation; + CVI_U16 u16ColorTemp; + CVI_U16 u16LS0CT; + CVI_U16 u16LS1CT; + CVI_U16 u16LS0Area; + CVI_U16 u16LS1Area; + CVI_U8 u8MultiDegree; + CVI_U16 u16ActiveShift; + CVI_U32 u32FirstStableTime; + ISP_AWB_INDOOR_OUTDOOR_STATUS_E enInOutStatus; + CVI_S16 s16Bv; +} ISP_WB_Q_INFO_S; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_AWB_COMM_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_comm_3a.h b/freertos/cvitek/install/include/common/cvi_comm_3a.h new file mode 100644 index 000000000..aeac8166f --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_comm_3a.h @@ -0,0 +1,481 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_common_3a.h + * Description: + */ + +#ifndef __CVI_COMM_3A_H__ +#define __CVI_COMM_3A_H__ + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#include +#include "cvi_comm_isp.h" +#include "cvi_comm_sns.h" + +#define ALG_LIB_NAME_SIZE_MAX (20) +#define MAX_REGISTER_ALG_LIB_NUM 4 + +#define HIST_THRESH_NUM (4) + +#define MAX_AE_W (32) +#define MAX_AE_H (24) +#define MAX_AE_SIZE (MAX_AE_W * MAX_AE_H) +#define MAX_AE_WIN (2) + +#define ENABLE_AF_LIB (0) + +typedef enum _ISP_FSWDR_MODE_E { + ISP_FSWDR_NORMAL_MODE = 0x0, + ISP_FSWDR_LONG_FRAME_MODE = 0x1, + ISP_FSWDR_AUTO_LONG_FRAME_MODE = 0x2, + ISP_FSWDR_MODE_BUTT +} ISP_FSWDR_MODE_E; + +typedef struct _ISP_AE_RANGE_S { + CVI_U32 u32Max; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U32 u32Min; /*RW; Range:[0x0, 0x7FFFFFFF]*/ +} ISP_AE_RANGE_S; + +typedef enum _ISP_AE_STRATEGY_E { + AE_EXP_HIGHLIGHT_PRIOR = 0, + AE_EXP_LOWLIGHT_PRIOR = 1, + AE_STRATEGY_MODE_BUTT +} ISP_AE_STRATEGY_E; + +typedef enum _ISP_AE_MODE_E { + AE_MODE_SLOW_SHUTTER = 0, + AE_MODE_FIX_FRAME_RATE = 1, + AE_MODE_BUTT +} ISP_AE_MODE_E; + +typedef enum _ISP_ANTIFLICKER_MODE_E { + ISP_ANTIFLICKER_NORMAL_MODE = 0, + ISP_ANTIFLICKER_AUTO_MODE = 1, + ISP_ANTIFLICKER_MODE_BUTT +} ISP_ANTIFLICKER_MODE_E; + + +typedef struct _ISP_ANTIFLICKER_S { + CVI_BOOL bEnable; + ISP_AE_ANTIFLICKER_FREQUENCE_E enFrequency; + ISP_ANTIFLICKER_MODE_E enMode; +} ISP_ANTIFLICKER_S; + +typedef struct _ISP_SUBFLICKER_S { + CVI_BOOL bEnable; + CVI_U8 u8LumaDiff; /*RW; Range:[0x0, 0x64]*/ +} ISP_SUBFLICKER_S; + +typedef struct _ISP_AE_DELAY_S { + CVI_U16 u16BlackDelayFrame; + CVI_U16 u16WhiteDelayFrame; +} ISP_AE_DELAY_S; + +typedef struct _ISP_ME_ATTR_S { + ISP_OP_TYPE_E enExpTimeOpType; + ISP_OP_TYPE_E enAGainOpType; + ISP_OP_TYPE_E enDGainOpType; + ISP_OP_TYPE_E enISPDGainOpType; + CVI_U32 u32ExpTime; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U32 u32AGain; /*RW; Range:[0x400, 0x7FFFFFFF]*/ + CVI_U32 u32DGain; /*RW; Range:[0x400, 0x7FFFFFFF]*/ + CVI_U32 u32ISPDGain; /*RW; Range:[0x400, 0x40000]*/ + ISP_OP_TYPE_E enISONumOpType; + ISP_AE_GAIN_TYPE_E enGainType; + CVI_U32 u32ISONum; /*RW; Range:[0x64, 0x7FFFFFFF]*/ +} ISP_ME_ATTR_S; + +#define RESERVE_SIZE 10 +typedef struct _ISP_AE_ATTR_S { + ISP_AE_RANGE_S stExpTimeRange; + ISP_AE_RANGE_S stAGainRange; /*RW; Range:[0x400, 0x7FFFFFFF]*/ + ISP_AE_RANGE_S stDGainRange; /*RW; Range:[0x400, 0x7FFFFFFF]*/ + ISP_AE_RANGE_S stISPDGainRange; /*RW; Range:[0x400, 0x40000]*/ + ISP_AE_RANGE_S stSysGainRange; /*RW; Range:[0x400, 0x7FFFFFFF]*/ + CVI_U32 u32GainThreshold; /*RW; Range:[0x400, 0x7FFFFFFF]*/ + CVI_U8 u8Speed; // 1 means 0.1 ev + CVI_U16 u16BlackSpeedBias; + CVI_U8 u8Tolerance; + CVI_U8 u8Compensation; + CVI_U16 u16EVBias; + ISP_AE_STRATEGY_E enAEStrategyMode; + CVI_U16 u16HistRatioSlope; + CVI_U8 u8MaxHistOffset; + ISP_AE_MODE_E enAEMode; + ISP_ANTIFLICKER_S stAntiflicker; + ISP_SUBFLICKER_S stSubflicker; + ISP_AE_DELAY_S stAEDelayAttr; + CVI_BOOL bManualExpValue; + CVI_U32 u32ExpValue; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + ISP_FSWDR_MODE_E enFSWDRMode; + CVI_BOOL bWDRQuick; + CVI_U16 u16ISOCalCoef; + ISP_AE_GAIN_TYPE_E enGainType; + ISP_AE_RANGE_S stISONumRange; /*RW; Range:[0x64, 0x7FFFFFFF]*/ + CVI_S16 s16IRCutOnLv; + CVI_S16 s16IRCutOffLv; + ISP_AE_IR_CUT_FORCE_STATUS enIRCutStatus; + CVI_U8 au8AdjustTargetMin[LV_TOTAL_NUM]; + CVI_U8 au8AdjustTargetMax[LV_TOTAL_NUM]; + CVI_U16 u16LowBinThr; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 u16HighBinThr; /*RW; Range:[0x0, 0x100]*/ + CVI_BOOL bEnableFaceAE; + CVI_U8 u8FaceTargetLuma; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 u8FaceWeight; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 u8GridBvWeight; /*RW; Range:[0x0, 0x64]*/ + CVI_U32 au32Reserve[RESERVE_SIZE]; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U8 u8HighLightLumaThr; + CVI_U8 u8HighLightBufLumaThr; + CVI_U8 u8LowLightLumaThr; + CVI_U8 u8LowLightBufLumaThr; + CVI_BOOL bHistogramAssist; +} ISP_AE_ATTR_S; + + +typedef struct _ISP_EXPOSURE_ATTR_S { + CVI_BOOL bByPass; + ISP_OP_TYPE_E enOpType; + CVI_U8 u8AERunInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_BOOL bHistStatAdjust; + CVI_BOOL bAERouteExValid; + ISP_ME_ATTR_S stManual; + ISP_AE_ATTR_S stAuto; + CVI_U8 u8DebugMode; + ISP_AE_METER_MODE_E enMeterMode; + CVI_BOOL bAEGainSepCfg; +} ISP_EXPOSURE_ATTR_S; + +typedef struct ISP_STITCH_ATTR_T { + CVI_BOOL enable; +} ISP_STITCH_ATTR_S; + +typedef struct _ALG_LIB_S { + CVI_S32 s32Id; + CVI_CHAR acLibName[ALG_LIB_NAME_SIZE_MAX]; +} ALG_LIB_S; + +/* the init param of awb alg */ +typedef struct _ISP_AE_PARAM_S { + SENSOR_ID SensorId; + CVI_U8 u8WDRMode; + CVI_U8 u8HDRMode; + CVI_U16 u16BlackLevel; + CVI_FLOAT f32Fps; + ISP_BAYER_FORMAT_E enBayer; + ISP_STITCH_ATTR_S stStitchAttr; + CVI_S32 s32Rsv; + ISP_3AWIN_CONFIG_S aeLEWinConfig[AE_MAX_NUM]; + ISP_3AWIN_CONFIG_S aeSEWinConfig; +} ISP_AE_PARAM_S; + +typedef struct _ISP_FE_AE_STAT_1_S { + CVI_U32 u32PixelCount[ISP_CHANNEL_MAX_NUM]; + CVI_U32 u32PixelWeight[ISP_CHANNEL_MAX_NUM]; + CVI_U32 au32HistogramMemArray[ISP_CHANNEL_MAX_NUM][MAX_HIST_BINS]; +} ISP_FE_AE_STAT_1_S; + +typedef struct _ISP_FE_AE_STAT_2_S { + CVI_U16 u16GlobalAvgR[ISP_CHANNEL_MAX_NUM]; + CVI_U16 u16GlobalAvgGr[ISP_CHANNEL_MAX_NUM]; + CVI_U16 u16GlobalAvgGb[ISP_CHANNEL_MAX_NUM]; + CVI_U16 u16GlobalAvgB[ISP_CHANNEL_MAX_NUM]; +} ISP_FE_AE_STAT_2_S; + +typedef struct _ISP_FE_AE_STAT_3_S { + CVI_U16 au16ZoneAvg[ISP_CHANNEL_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][4]; +} ISP_FE_AE_STAT_3_S; + +typedef struct _ISP_FE_AE_STITCH_STAT_3_S { + CVI_U16 au16ZoneAvg[ISP_CHANNEL_MAX_NUM][ISP_CHANNEL_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][4]; +} ISP_FE_AE_STITCH_STAT_3_S; + +typedef struct _ISP_AE_STAT_ATTR_S { + CVI_BOOL bChange; + + CVI_BOOL bHistAdjust; + CVI_U8 u8AEBESel; + CVI_U8 u8FourPlaneMode; + CVI_U8 u8HistOffsetX; + CVI_U8 u8HistOffsetY; + CVI_U8 u8HistSkipX; + CVI_U8 u8HistSkipY; + + CVI_BOOL bModeUpdate; + CVI_U8 u8HistMode; + CVI_U8 u8AverMode; + CVI_U8 u8MaxGainMode; + + CVI_BOOL bWightTableUpdate; + CVI_U8 au8WeightTable[VI_MAX_PIPE_NUM][AE_WEIGHT_ZONE_ROW][AE_WEIGHT_ZONE_COLUMN]; +} ISP_AE_STAT_ATTR_S; + +typedef struct _ISP_AE_STAT_RESULT_S { + CVI_U32 u32IntTime[VI_MAX_PIPE_NUM]; + CVI_U32 u32IspDgain; + CVI_U32 u32Again; + CVI_U32 u32Dgain; + CVI_U32 u32Iso; + CVI_U8 u8AERunInterval; + + CVI_BOOL bPirisValid; + CVI_S32 s32PirisPos; + CVI_U32 u32PirisGain; + + ISP_FSWDR_MODE_E enFSWDRMode; + CVI_U32 au32WDRGain[4]; + CVI_U32 u32HmaxTimes; /* unit is ns */ + + ISP_AE_STAT_ATTR_S stStatAttr; + ISP_DCF_UPDATE_INFO_S stUpdateInfo; + CVI_U32 u32ExpRatio; + CVI_S16 s16CurrentLV; + CVI_U32 u32AvgLuma; + CVI_U8 u8MeterFramePeriod; + CVI_BOOL bStable; + CVI_FLOAT fBvStep; + CVI_U32 u32BlcIso; + + CVI_U32 u32IspDgainSF; + CVI_U32 u32AgainSF; + CVI_U32 u32DgainSF; + CVI_U32 u32IsoSF; + CVI_U32 u32BlcIsoSF; + CVI_FLOAT fEvRatio[2]; +} ISP_AE_RESULT_S; + +typedef struct _ISP_BE_AE_STAT_1_S { + CVI_BOOL bStable; +} ISP_BE_AE_STAT_1_S; + +typedef struct _ISP_BE_AE_STAT_2_S { + CVI_BOOL bStable; +} ISP_BE_AE_STAT_2_S; + +typedef struct _ISP_BE_AE_STAT_3_S { + CVI_BOOL bStable; +} ISP_BE_AE_STAT_3_S; + +typedef struct _ISP_BE_AE_STITCH_STAT_3_S { + CVI_BOOL bStable; +} ISP_BE_AE_STITCH_STAT_3_S; + +typedef struct _ISP_AE_INFO_S { + CVI_U32 u32FrameCnt; /* the counting of frame */ + ISP_SMART_ROI_S stSmartInfo; + ISP_FE_AE_STAT_1_S * pstFEAeStat1[AE_MAX_NUM]; + ISP_FE_AE_STAT_2_S * pstFEAeStat2[AE_MAX_NUM]; + ISP_FE_AE_STAT_3_S * pstFEAeStat3[AE_MAX_NUM]; + ISP_FE_AE_STITCH_STAT_3_S *pstFEAeStiStat; + ISP_BE_AE_STAT_1_S *pstBEAeStat1; + ISP_BE_AE_STAT_2_S *pstBEAeStat2; + ISP_BE_AE_STAT_3_S *pstBEAeStat3; + ISP_BE_AE_STITCH_STAT_3_S *pstBEAeStiStat; + ISP_3AWIN_CONFIG_S aeLEWinConfig[AE_MAX_NUM]; + ISP_3AWIN_CONFIG_S aeSEWinConfig; +} ISP_AE_INFO_S; + +typedef struct bmISP_DCI_INFO_S { + CVI_U32 u32FrameCnt; /* the counting of frame */ + + CVI_U16 pStat[DCI_BINS_NUM]; +} ISP_DCI_INFO_S; + + +/* the init param of awb alg */ +typedef struct _ISP_AWB_PARAM_S { + SENSOR_ID SensorId; + CVI_U8 u8WDRMode; + CVI_U8 u8AWBZoneRow; + CVI_U8 u8AWBZoneCol; + CVI_U8 u8AWBZoneBin; + ISP_STITCH_ATTR_S stStitchAttr; + CVI_U16 u16AWBWidth; + CVI_U16 u16AWBHeight; + CVI_S8 s8Rsv; +} ISP_AWB_PARAM_S; + +typedef struct _ISP_AWB_RAW_STAT_ATTR_S { + bool bStatCfgUpdate; + + CVI_U16 u16MeteringWhiteLevelAwb; + CVI_U16 u16MeteringBlackLevelAwb; + CVI_U16 u16MeteringCrRefMaxAwb; + CVI_U16 u16MeteringCbRefMaxAwb; + CVI_U16 u16MeteringCrRefMinAwb; + CVI_U16 u16MeteringCbRefMinAwb; +} ISP_AWB_RAW_STAT_ATTR_S; + +typedef struct _ISP_AWB_RESULT_S { + CVI_U32 au32WhiteBalanceGain[ISP_BAYER_CHN_NUM]; + CVI_U16 au16ColorMatrix[CCM_MATRIX_SIZE]; + CVI_U32 u32ColorTemp; + CVI_U8 u8Saturation[4]; + ISP_AWB_RAW_STAT_ATTR_S stRawStatAttr; + CVI_BOOL bStable; +} ISP_AWB_RESULT_S; + +typedef struct _ISP_AWB_STAT_1_S { + CVI_U16 u16MeteringAwbAvgR; + CVI_U16 u16MeteringAwbAvgG; + CVI_U16 u16MeteringAwbAvgB; + CVI_U16 u16MeteringAwbCountAll; +} ISP_AWB_STAT_1_S; + +typedef struct _ISP_AWB_STAT_RESULT_S { + CVI_U16 *pau16ZoneAvgR; + CVI_U16 *pau16ZoneAvgG; + CVI_U16 *pau16ZoneAvgB; + CVI_U16 *pau16ZoneCount; +} ISP_AWB_STAT_RESULT_S; + +typedef struct _ISP_AWB_INFO_S { + CVI_U32 u32FrameCnt; + ISP_SMART_ROI_S stSmartInfo; + ISP_AWB_STAT_1_S * pstAwbStat1[ISP_CHANNEL_MAX_NUM]; + ISP_AWB_STAT_RESULT_S stAwbStat2[ISP_CHANNEL_MAX_NUM]; + CVI_U8 u8AwbGainSwitch; + CVI_U32 au32WDRWBGain[ISP_BAYER_CHN_NUM]; + CVI_U32 u32IsoNum; + CVI_S16 s16LVx100; + CVI_FLOAT fBVstep; +} ISP_AWB_INFO_S; + +// AF related structure +typedef struct _ISP_AF_PARAM_S { + SENSOR_ID SensorId; + CVI_U8 u8WDRMode; + CVI_S32 s32Rsv; +} ISP_AF_PARAM_S; + +typedef struct _ISP_AF_INFO_S { + CVI_U32 u32FrameCnt; + ISP_AF_STATISTICS_S *pstAfStat; +} ISP_AF_INFO_S; + +typedef struct _ISP_AF_RESULT_S { + CVI_S32 s32Rsv; +} ISP_AF_RESULT_S; + +typedef struct _ISP_AE_STITCH_STATISTICS_S { + CVI_U32 enable; +} ISP_AE_STITCH_STATISTICS_S; + +typedef struct _ISP_BIND_ATTR_S { + SENSOR_ID sensorId; + ALG_LIB_S stAeLib; + ALG_LIB_S stAfLib; + ALG_LIB_S stAwbLib; +} ISP_BIND_ATTR_S; + +typedef struct _ISP_AE_EXP_FUNC_S { + CVI_S32 (*pfn_ae_init)(VI_PIPE ViPipe, const ISP_AE_PARAM_S *pstAeParam); + CVI_S32 (*pfn_ae_run)(VI_PIPE ViPipe, const ISP_AE_INFO_S *pstAeInfo, + ISP_AE_RESULT_S *pstAeResult, CVI_S32 s32Rsv); + CVI_S32 (*pfn_ae_ctrl)(VI_PIPE ViPipe, CVI_U32 u32Cmd, void *pValue); + CVI_S32 (*pfn_ae_exit)(VI_PIPE ViPipe); +} ISP_AE_EXP_FUNC_S; + +typedef struct _ISP_AWB_EXP_FUNC_S { + CVI_S32 (*pfn_awb_init)(VI_PIPE ViPipe, const ISP_AWB_PARAM_S *pstAwbParam); + CVI_S32 (*pfn_awb_run)(VI_PIPE ViPipe, const ISP_AWB_INFO_S *pstAwbInfo, ISP_AWB_RESULT_S *pstAwbResult, + CVI_S32 s32Rsv); + CVI_S32 (*pfn_awb_ctrl)(VI_PIPE ViPipe, CVI_U32 u32Cmd, CVI_VOID *pValue); + CVI_S32 (*pfn_awb_exit)(VI_PIPE ViPipe); +} ISP_AWB_EXP_FUNC_S; + +typedef struct _ISP_AF_EXP_FUNC_S { + CVI_S32 (*pfn_af_init)(VI_PIPE ViPipe, const ISP_AF_PARAM_S *pstAfParam); + CVI_S32 (*pfn_af_run)(VI_PIPE ViPipe, const ISP_AF_INFO_S *pstAfInfo, ISP_AF_RESULT_S *pstAfResult, + CVI_S32 s32Rsv); + CVI_S32 (*pfn_af_ctrl)(VI_PIPE ViPipe, CVI_U32 u32Cmd, CVI_VOID *pValue); + CVI_S32 (*pfn_af_exit)(VI_PIPE ViPipe); +} ISP_AF_EXP_FUNC_S; + +typedef struct _ISP_AE_REGISTER_S { + ISP_AE_EXP_FUNC_S stAeExpFunc; +} ISP_AE_REGISTER_S; + +typedef struct _ISP_AWB_REGISTER_S { + ISP_AWB_EXP_FUNC_S stAwbExpFunc; +} ISP_AWB_REGISTER_S; + +typedef struct _ISP_AF_REGISTER_S { + ISP_AF_EXP_FUNC_S stAfExpFunc; +} ISP_AF_REGISTER_S; + +typedef enum _ISP_CTRL_CMD_E { + ISP_WDR_MODE_SET = 0, + + ISP_CTRL_CMD_BUTT_MAX, +} ISP_CTRL_CMD_E; + + +#define AWB_DBG_VER (11) +#define AWB_SENSOR_NUM (2) +#define AWB_DBG_W (64) +#define AWB_DBG_H (32) +#define AWB_SHIFT_REGION_NUM (4) +typedef struct _AWB_DBG_S { + //Don't modify ==> + CVI_U32 u32Date; + CVI_U16 u16AlgoVer; + CVI_U16 u16DbgVer; + CVI_U16 u16MaxFrameNum; + CVI_U16 u16SensorId; + CVI_U32 u32BinSize; + CVI_U16 u16WinWnum; + CVI_U16 u16WinHnum; + CVI_U16 u16WinOffX; + CVI_U16 u16WinOffY; + CVI_U16 u16WinWsize; + CVI_U16 u16WinHsize; + CVI_U16 u16P_R[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size + CVI_U16 u16P_G[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size + CVI_U16 u16P_B[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size + CVI_U16 u16P_type[2][AWB_DBG_W*AWB_DBG_H];//keep Max Size + CVI_U16 u16GrayCnt; + CVI_U16 u16BalanceR; + CVI_U16 u16BalanceB; + CVI_U16 u16FinalR; + CVI_U16 u16FinalB; + CVI_U16 u16CurrentR; + CVI_U16 u16CurrentB; + CVI_U16 u16IdealR; + CVI_U16 u16IdealB; + CVI_U16 CalibRgain[AWB_CALIB_PTS_NUM]; + CVI_U16 CalibBgain[AWB_CALIB_PTS_NUM]; + CVI_U16 CalibTemp[AWB_CALIB_PTS_NUM]; + CVI_U16 u16CurveR[256];//4096/16 + CVI_U16 u16CurveB[256]; + CVI_U16 u16CurveB_Top[256]; + CVI_U16 u16CurveB_Bot[256]; + CVI_S16 s16LvX100; + CVI_U32 u32ISONum; + ISP_WB_ATTR_S dbgMPIAttr[AWB_SENSOR_NUM]; + ISP_WB_ATTR_S dbgInfoAttr[AWB_SENSOR_NUM]; + ISP_AWB_ATTR_EX_S dbgMPIAttrEx[AWB_SENSOR_NUM]; + ISP_AWB_ATTR_EX_S dbgInfoAttrEx[AWB_SENSOR_NUM]; + //Don't modify <== + CVI_U8 calib_sts; + ISP_AWB_Calibration_Gain_S_EX calib_ex; + ISP_SMART_ROI_S stFace; + + // fix size to 128 byte from here + CVI_U16 u16Region_R[AWB_SHIFT_REGION_NUM]; + CVI_U8 u8Reserve[120]; +} s_AWB_DBG_S; + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_COMM_3A_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_comm_inc.h b/freertos/cvitek/install/include/common/cvi_comm_inc.h new file mode 100644 index 000000000..e4e010077 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_comm_inc.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name: include/cvi_common_inc.h + * Description: + */ + + +#ifndef __CVI_COMM_INC_H__ +#define __CVI_COMM_INC_H__ + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#include "stddef.h" +#include "stdint.h" +#include + +#if defined(ARCH_CV183X) || defined(ARCH_CV182X) +#include +#include +#include +#include +#elif defined(ARCH_RTOS_CV181X) +#include +#include +#include +#include +#elif defined(ARCH_CV181X) || defined(ARCH_CV180X) || defined(__CV181X__) || defined(__CV180X__) +#include +#include +#include +#include + + +#endif + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_COMM_INC_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_comm_isp.h b/freertos/cvitek/install/include/common/cvi_comm_isp.h new file mode 100644 index 000000000..e1e72ec04 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_comm_isp.h @@ -0,0 +1,2655 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2022. All rights reserved. + * + * File Name: include/cvi_common_isp.h + * Description: + */ + +#ifndef __CVI_COMM_ISP_H__ +#define __CVI_COMM_ISP_H__ + +#include +#include "cvi_comm_inc.h" + + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define CCM_MATRIX_SIZE (9) +#define CSC_MATRIX_SIZE (9) +#define CSC_OFFSET_SIZE (3) +#define AE_MAX_ZONE_ROW (30) +#define AE_MAX_ZONE_COLUMN (34) +#define AE_ZONE_ROW (30) +#define AE_ZONE_COLUMN (34) +#define AE_ZONE_NUM (AE_ZONE_ROW * AE_ZONE_COLUMN) +#define AE_MAX_NUM (1) +#define AWB_ZONE_ORIG_ROW (30) +#define AWB_ZONE_ORIG_COLUMN (34) +#define AWB_ZONE_MAX_COLUMN (34) +#define AWB_ZONE_NUM (AWB_ZONE_ORIG_ROW * AWB_ZONE_ORIG_COLUMN) +#define AWB_MAX_NUM (1) +#define HIST_BIN_DEPTH (8) +#define MAX_HIST_BINS (1 << HIST_BIN_DEPTH) +#define MAX_EXPOSURE_RATIO (256) +#define MAX_DRC_HIST_BINS (MAX_HIST_BINS * MAX_EXPOSURE_RATIO) +#define DCF_DRSCRIPTION_LENGTH (32) +#define DCF_CAPTURE_TIME_LENGTH (20) +#define ISP_AUTO_ISO_STRENGTH_NUM (16) +#define ISP_AUTO_EXP_RATIO_NUM (16) +#define ISP_AUTO_COLORTEMP_NUM (7) +#define CVI_ISP_LSC_GRID_COL (37) +#define CVI_ISP_LSC_GRID_ROW (37) +#define CVI_ISP_LSC_GRID_POINTS (CVI_ISP_LSC_GRID_COL * CVI_ISP_LSC_GRID_ROW) +#define DCI_BINS_NUM (256) +#define ISP_MAX_SNS_REGS 32 +#define ISP_MAX_WDR_FRAME_NUM 2 +#define BAYER_PATTERN_NUM 4 +#define MG_ZONE_ROW (15) +#define MG_ZONE_COLUMN (17) +#define AF_ZONE_ROW (15) +#define AF_ZONE_COLUMN (17) +#define AF_XOFFSET_MIN (8) +#define AF_YOFFSET_MIN (2) +#define MAX_AWB_LIB_NUM (VI_MAX_PIPE_NUM) +#define MAX_AE_LIB_NUM (VI_MAX_PIPE_NUM) +#define LTM_DARK_CURVE_NODE_NUM (257) +#define LTM_BRIGHT_CURVE_NODE_NUM (513) +#define LTM_GLOBAL_CURVE_NODE_NUM (769) +#define ISP_3ALIB_FIND_FAIL (-1) +#define SHARPEN_LUT_NUM 33 +#define MOTION_NR_TABLE_NUM 16 +#define HIST_NUM 256 +#define ISP_BASE_ADDR 0x0A000000 +#define ISP_REG_RANGE 0x80000 +#define DEHAZE_LUT_NUM 32 +#define DIS_MAX_WINDOW_X_NUM 3 +#define DIS_MAX_WINDOW_Y_NUM 3 +#define XHIST_LENGTH 255 // 1024 bin +#define YHIST_LENGTH 255 // 512 bin + +#define MIN_LV (-5) +#define MAX_LV (15) +#define LV_TOTAL_NUM (MAX_LV - MIN_LV + 1) +#define AE_LV_FACTOR (100) +#define ISP_AUTO_LV_NUM (LV_TOTAL_NUM) + +/*Defines the format of the input Bayer image*/ +typedef enum _ISP_BAYER_FORMAT_E { + BAYER_BGGR, + BAYER_GBRG, + BAYER_GRBG, + BAYER_RGGB, + //for RGBIR sensor + BAYER_GRGBI = 8, + BAYER_RGBGI, + BAYER_GBGRI, + BAYER_BGRGI, + BAYER_IGRGB, + BAYER_IRGBG, + BAYER_IBGRG, + BAYER_IGBGR, + BAYER_BUTT +} ISP_BAYER_FORMAT_E; + +typedef enum _ISP_OP_TYPE_E { + OP_TYPE_AUTO, + OP_TYPE_MANUAL, + OP_TYPE_BUTT +} ISP_OP_TYPE_E; + +typedef enum _ISP_FMW_STATE_E { + ISP_FMW_STATE_RUN, + ISP_FMW_STATE_FREEZE, + ISP_FMW_STATE_BUTT +} ISP_FMW_STATE_E; + +typedef enum _ISP_CHANNEL_LIST_E { + ISP_CHANNEL_LE, + ISP_CHANNEL_SE, + ISP_CHANNEL_MAX_NUM, +} ISP_CHANNEL_LIST_E; + +typedef enum _ISP_BAYER_CHANNEL_E { + ISP_BAYER_CHN_R, + ISP_BAYER_CHN_GR, + ISP_BAYER_CHN_GB, + ISP_BAYER_CHN_B, + ISP_BAYER_CHN_NUM, +} ISP_BAYER_CHANNEL_E; + +typedef enum _ISP_SNS_TYPE_E { + SNS_I2C_TYPE, + SNS_SSP_TYPE, + SNS_TYPE_BUTT, +} ISP_SNS_TYPE_E; + +typedef enum _ISP_WDR_FRAME_IDX_E { + ISP_WDR_FRAME_IDX_1, + ISP_WDR_FRAME_IDX_2, + ISP_WDR_FRAME_IDX_3, + ISP_WDR_FRAME_IDX_4, + ISP_WDR_FRAME_IDX_SIZE +} ISP_WDR_FRAME_IDX_E; + +typedef union _ISP_SNS_COMMBUS_U { + CVI_S8 s8I2cDev; + struct { + CVI_S8 bit4SspDev : 4; + CVI_S8 bit4SspCs : 4; + } s8SspDev; +} ISP_SNS_COMMBUS_U; + +typedef struct _ISP_I2C_DATA_S { + CVI_BOOL bUpdate; + CVI_BOOL bDropFrm; + CVI_U8 u8DelayFrmNum; /*RW; Number of delayed frames for the sensor register*/ + CVI_U8 u8DropFrmNum; /*RW; Number of frame to drop*/ + CVI_U8 u8IntPos; /*RW;Position where the configuration of the sensor register takes effect */ + CVI_U8 u8DevAddr; /*RW;Sensor device address*/ + CVI_U32 u32RegAddr; /*RW;Sensor register address*/ + CVI_U32 u32AddrByteNum; /*RW;Bit width of the sensor register address*/ + CVI_U32 u32Data; /*RW;Sensor register data*/ + CVI_U32 u32DataByteNum; /*RW;Bit width of sensor register data*/ +} ISP_I2C_DATA_S; + +typedef struct _ISP_SSP_DATA_S { + CVI_BOOL bUpdate; + CVI_U8 u8DelayFrmNum; /*RW; Number of delayed frames for the sensor register*/ + CVI_U8 u8IntPos; /*RW;Position where the configuration of the sensor register takes effect */ + CVI_U32 u32DevAddr; /*RW;Sensor device address*/ + CVI_U32 u32DevAddrByteNum; /*RW;Bit width of the sensor device address*/ + CVI_U32 u32RegAddr; /*RW;Sensor register address*/ + CVI_U32 u32RegAddrByteNum; /*RW;Bit width of the sensor register address*/ + CVI_U32 u32Data; /*RW;Sensor register data*/ + CVI_U32 u32DataByteNum; /*RW;Bit width of sensor register data*/ +} ISP_SSP_DATA_S; + +typedef struct _ISP_SNS_REGS_INFO_S { + ISP_SNS_TYPE_E enSnsType; + CVI_U32 u32RegNum; + CVI_U8 u8Cfg2ValidDelayMax; + ISP_SNS_COMMBUS_U unComBus; + union { + ISP_I2C_DATA_S astI2cData[ISP_MAX_SNS_REGS]; + ISP_SSP_DATA_S astSspData[ISP_MAX_SNS_REGS]; + }; + + struct { + CVI_BOOL bUpdate; + CVI_U8 u8DelayFrmNum; + CVI_U32 u32SlaveVsTime; /* RW;time of vsync. Unit: inck clock cycle */ + CVI_U32 u32SlaveBindDev; + } stSlvSync; + + CVI_BOOL bConfig; + CVI_U8 use_snsr_sram; + CVI_U8 need_update; +} ISP_SNS_REGS_INFO_S; + +typedef enum _ISP_VD_TYPE_E { + ISP_VD_FE_START = 0, + ISP_VD_FE_END, + ISP_VD_BE_END, + ISP_VD_MAX +} ISP_VD_TYPE_E; + +typedef struct _ISP_MANUAL_WDR_ATTR_S { + CVI_S32 devno; + CVI_S32 manual_en; + CVI_S16 l2s_distance; + CVI_S16 lsef_length; + CVI_S32 discard_padding_lines; + CVI_S32 update; +} ISP_MANUAL_WDR_ATTR_S; + +typedef struct _ISP_SNS_CIF_INFO_S { + ISP_MANUAL_WDR_ATTR_S wdr_manual; + CVI_U8 u8DelayFrmNum; /*RW; Number of delayed frames for the cif setting */ + CVI_U8 need_update; +} ISP_SNS_CIF_INFO_S; + +typedef struct _ISP_WDR_SIZE_S { + RECT_S stWndRect; + SIZE_S stSnsSize; + SIZE_S stMaxSize; +} ISP_WDR_SIZE_S; + +typedef struct _ISP_SNS_ISP_INFO_S { + CVI_U32 frm_num; + ISP_WDR_SIZE_S img_size[ISP_MAX_WDR_FRAME_NUM]; + CVI_U8 u8DelayFrmNum; /*RW; Number of delayed frames for the isp setting */ + CVI_U8 need_update; +} ISP_SNS_ISP_INFO_S; + +typedef struct _ISP_SNS_SYNC_INFO_S { + ISP_SNS_REGS_INFO_S snsCfg; + ISP_SNS_ISP_INFO_S ispCfg; + ISP_SNS_CIF_INFO_S cifCfg; +} ISP_SNS_SYNC_INFO_S; + +typedef struct _ISP_PUB_ATTR_S { + RECT_S stWndRect; + SIZE_S stSnsSize; + CVI_FLOAT f32FrameRate; + ISP_BAYER_FORMAT_E enBayer; + WDR_MODE_E enWDRMode; + CVI_U8 u8SnsMode; +} ISP_PUB_ATTR_S; + +typedef struct _ISP_CTRL_PARAM_S { + CVI_U32 u32AEStatIntvl; + CVI_U32 u32AWBStatIntvl; + CVI_U32 u32AFStatIntvl; + CVI_U32 u32ProcParam; + CVI_U32 u32ProcLevel; + CVI_U32 u32UpdatePos; + CVI_U32 u32IntTimeOut; + CVI_U32 u32PwmNumber; + CVI_U32 u32PortIntDelay; +} ISP_CTRL_PARAM_S; + +typedef union _ISP_MODULE_CTRL_U { + CVI_U64 u64Key; + struct { + CVI_U64 bitBypassBlc : 1; /*RW:[0]*/ + CVI_U64 bitBypassRlsc : 1; /*RW:[1]*/ + CVI_U64 bitBypassFpn : 1; /*RW:[2]*/ + CVI_U64 bitBypassDpc : 1; /*RW:[3]*/ + CVI_U64 bitBypassCrosstalk : 1; /*RW:[4]*/ + CVI_U64 bitBypassWBGain : 1; /*RW:[5]*/ + CVI_U64 bitBypassDis : 1; /*RW:[6]*/ + CVI_U64 bitBypassBnr : 1; /*RW:[7]*/ + CVI_U64 bitBypassDemosaic : 1; /*RW:[8]*/ + CVI_U64 bitBypassRgbcac : 1; /*RW:[9]*/ + CVI_U64 bitBypassLcac : 1; /*RW:[10]*/ + CVI_U64 bitBypassMlsc : 1; /*RW:[11]*/ + CVI_U64 bitBypassCcm : 1; /*RW:[12]*/ + CVI_U64 bitBypassFusion : 1; /*RW:[13]*/ + CVI_U64 bitBypassDrc : 1; /*RW:[14]*/ + CVI_U64 bitBypassGamma : 1; /*RW:[15]*/ + CVI_U64 bitBypassDehaze : 1; /*RW:[16]*/ + CVI_U64 bitBypassClut : 1; /*RW:[17]*/ + CVI_U64 bitBypassCsc : 1; /*RW:[18]*/ + CVI_U64 bitBypassDci : 1; /*RW:[19]*/ + CVI_U64 bitBypassLdci : 1; /*RW:[20]*/ + CVI_U64 bitBypassCa : 1; /*RW:[21]*/ + CVI_U64 bitBypassPreyee : 1; /*RW:[22]*/ + CVI_U64 bitBypassMotion : 1; /*RW:[23]*/ + CVI_U64 bitBypass3dnr : 1; /*RW:[24]*/ + CVI_U64 bitBypassYnr : 1; /*RW:[25]*/ + CVI_U64 bitBypassCnr : 1; /*RW:[26]*/ + CVI_U64 bitBypassCac : 1; /*RW:[27]*/ + CVI_U64 bitBypassCa2 : 1; /*RW:[28]*/ + CVI_U64 bitBypassYee : 1; /*RW:[29]*/ + CVI_U64 bitBypassYcontrast : 1; /*RW:[30]*/ + CVI_U64 bitBypassMono : 1; /*RW:[31]*/ + CVI_U64 bitRsv : 32; /*H; [32:63] */ + }; +} ISP_MODULE_CTRL_U; + +typedef union _ISP_STATISTICS_CTRL_U { + CVI_U64 u64Key; + struct { + CVI_U64 bit1FEAeGloStat : 1; /* [0] */ + CVI_U64 bit1FEAeLocStat : 1; /* [1] */ + CVI_U64 bit1AwbStat1 : 1; /* [2] Awb Stat1 means global awb data. */ + CVI_U64 bit1AwbStat2 : 1; /* [3] Awb Stat2 means local awb data. */ + CVI_U64 bit1FEAfStat : 1; /* [4] */ + CVI_U64 bit14Rsv : 59; /* [5:63] */ + }; +} ISP_STATISTICS_CTRL_U; + +typedef enum _ISP_AE_STAT_MODE_E { + ISP_AE_MODE_BUTT, +} ISP_AE_STAT_MODE_E; + +typedef enum _ISP_AE_SWITCH_E { + ISP_AE_SWITCH_BUTT, +} ISP_AE_SWITCH_E; + +typedef enum _ISP_AE_FOUR_PLANE_MODE_E { + ISP_AE_FOUR_PLANE_MODE_BUTT, +} ISP_AE_FOUR_PLANE_MODE_E; + +typedef enum _ISP_AE_HIST_SKIP_E { + ISP_AE_HIST_SKIP_BUTT, +} ISP_AE_HIST_SKIP_E; + +typedef enum _ISP_AE_HIST_OFFSET_X_E { + ISP_AE_HIST_OFFSET_X_BUTT, +} ISP_AE_HIST_OFFSET_X_E; + +typedef enum _ISP_AE_HIST_OFFSET_Y_E { + ISP_AE_HIST_OFFSET_Y_BUTT, +} ISP_AE_HIST_OFFSET_Y_E; + +typedef enum _ISP_AE_ANTIFLICKER_FREQUENCE_E { + AE_FREQUENCE_60HZ = 0, + AE_FREQUENCE_50HZ, +} ISP_AE_ANTIFLICKER_FREQUENCE_E; + +typedef enum _ISP_AE_METER_MODE_E { + AE_METER_MULTI = 0, + AE_METER_AVERAGE, + AE_METER_HIGHLIGHT_PRIORITY, + AE_METER_FISHEYE, +} ISP_AE_METER_MODE_E; + +typedef enum _ISP_AE_IR_CUT_FORCE_STATUS { + AE_IR_CUT_FORCE_AUTO = 0, + AE_IR_CUT_FORCE_ON, + AE_IR_CUT_FORCE_OFF, +} ISP_AE_IR_CUT_FORCE_STATUS; + +typedef enum _ISP_AE_GAIN_TYPE_E { + AE_TYPE_GAIN = 0, + AE_TYPE_ISO = 1, + AE_TYPE_BUTT +} ISP_AE_GAIN_TYPE_E; + +typedef struct _ISP_AE_HIST_CONFIG_S { + ISP_AE_HIST_SKIP_E enHistSkipX; + ISP_AE_HIST_SKIP_E enHistSkipY; + ISP_AE_HIST_OFFSET_X_E enHistOffsetX; + ISP_AE_HIST_OFFSET_Y_E enHistOffsetY; +} ISP_AE_HIST_CONFIG_S; + +typedef struct _ISP_3AWIN_CONFIG_S { + CVI_U16 winWidth; + CVI_U16 winHeight; + CVI_U16 winXOffset; + CVI_U16 winYOffset; + CVI_U8 winXNum; + CVI_U8 winYNum; +} ISP_3AWIN_CONFIG_S; + +typedef struct _ISP_AE_CROP_S { + CVI_BOOL bEnable; /*RW; Range:[0x0,0x1]*/ + CVI_U16 u16X; /*RW; Range:[0x00,0x1FFF]*/ + CVI_U16 u16Y; /*RW; Range:[0x00,0x1FFF]*/ + CVI_U16 u16W; /*RW; Range:[0x00,0x1FFF]*/ + CVI_U16 u16H; /*RW; Range:[0x00,0x1FFF]*/ +} ISP_AE_CROP_S; + +typedef struct _ISP_AE_FACE_CROP_S { + CVI_BOOL bEnable; /*RW; Range:[0x0,0x1]*/ + CVI_U16 u16X; /*RW; Range:[0x00,0x1FFF]*/ + CVI_U16 u16Y; /*RW; Range:[0x00,0x1FFF]*/ + CVI_U8 u16W; /*RW; Range:[0x00,0xFF]*/ + CVI_U8 u16H; /*RW; Range:[0x00,0xFF]*/ +} ISP_AE_FACE_CROP_S; + +#define AE_WEIGHT_ZONE_ROW 15 +#define AE_WEIGHT_ZONE_COLUMN 17 +#define FACE_WIN_NUM 4 +typedef struct _ISP_AE_STATISTICS_CFG_S { + CVI_BOOL bHisStatisticsEnable; /*RW; Range:[0x0,0x1]*/ + ISP_AE_CROP_S stCrop[AE_MAX_NUM]; + ISP_AE_FACE_CROP_S stFaceCrop[FACE_WIN_NUM]; + CVI_BOOL fast2A_ena; /*RW; Range:[0x0,0x1]*/ + CVI_U8 fast2A_ae_low; /*RW; Range:[0x0,0xFF]*/ + CVI_U8 fast2A_ae_high; /*RW; Range:[0x0,0xFF]*/ + CVI_U16 fast2A_awb_top; /*RW; Range:[0x0,0xFFF]*/ + CVI_U16 fast2A_awb_bot; /*RW; Range:[0x0,0xFFF]*/ + CVI_U16 over_exp_thr; /*RW; Range:[0x0,0x3FF]*/ + CVI_U8 au8Weight[AE_WEIGHT_ZONE_ROW][AE_WEIGHT_ZONE_COLUMN]; /*RW; Range:[0x0, 0xF]*/ +} ISP_AE_STATISTICS_CFG_S; + +//----------------------------------------------------------------------------- +// IRIS +//----------------------------------------------------------------------------- +typedef enum _ISP_IRIS_TYPE_E { + ISP_IRIS_DC_TYPE = 0, + ISP_IRIS_P_TYPE, + ISP_IRIS_TYPE_BUTT, +} ISP_IRIS_TYPE_E; + +typedef enum _ISP_IRIS_F_NO_E { + ISP_IRIS_F_NO_32_0 = 0, + ISP_IRIS_F_NO_22_0, + ISP_IRIS_F_NO_16_0, + ISP_IRIS_F_NO_11_0, + ISP_IRIS_F_NO_8_0, + ISP_IRIS_F_NO_5_6, + ISP_IRIS_F_NO_4_0, + ISP_IRIS_F_NO_2_8, + ISP_IRIS_F_NO_2_0, + ISP_IRIS_F_NO_1_4, + ISP_IRIS_F_NO_1_0, + ISP_IRIS_F_NO_BUTT, +} ISP_IRIS_F_NO_E; + +typedef struct _ISP_DCIRIS_ATTR_S { + CVI_S32 s32Kp; /*RW; Range:[0x0, 0x186A0]*/ + CVI_S32 s32Ki; /*RW; Range:[0x0, 0x3E8]*/ + CVI_S32 s32Kd; /*RW; Range:[0x0, 0x186A0]*/ + CVI_U32 u32MinPwmDuty; /*RW; Range:[0x0, 0x3E8]*/ + CVI_U32 u32MaxPwmDuty; /*RW; Range:[0x0, 0x3E8]*/ + CVI_U32 u32OpenPwmDuty; /*RW; Range:[0x0, 0x3E8]*/ +} ISP_DCIRIS_ATTR_S; + +#define AI_MAX_STEP_FNO_NUM (1024) +typedef struct _ISP_PIRIS_ATTR_S { + CVI_BOOL bStepFNOTableChange; + CVI_BOOL bZeroIsMax; + CVI_U16 u16TotalStep; + CVI_U16 u16StepCount; + CVI_U16 au16StepFNOTable[AI_MAX_STEP_FNO_NUM]; + ISP_IRIS_F_NO_E enMaxIrisFNOTarget; + ISP_IRIS_F_NO_E enMinIrisFNOTarget; + CVI_BOOL bFNOExValid; + CVI_U32 u32MaxIrisFNOTarget; + CVI_U32 u32MinIrisFNOTarget; +} ISP_PIRIS_ATTR_S; + +typedef struct _ISP_MI_ATTR_S { + CVI_U32 u32HoldValue; /*RW; Range:[0x0, 0x3E8]*/ + ISP_IRIS_F_NO_E enIrisFNO; /*RW; Range:[0x0, 0xA]*/ +} ISP_MI_ATTR_S; + +typedef enum _ISP_IRIS_STATUS_E { + ISP_IRIS_KEEP = 0, + ISP_IRIS_OPEN = 1, + ISP_IRIS_CLOSE = 2, + ISP_IRIS_BUTT +} ISP_IRIS_STATUS_E; + +typedef struct _ISP_IRIS_ATTR_S { + CVI_BOOL bEnable; + ISP_OP_TYPE_E enOpType; + ISP_IRIS_TYPE_E enIrisType; + ISP_IRIS_STATUS_E enIrisStatus; + ISP_MI_ATTR_S stMIAttr; +} ISP_IRIS_ATTR_S; + +//----------------------------------------------------------------------------- +// AE Route +//----------------------------------------------------------------------------- +#define ISP_AE_ROUTE_MIN_NODES (1) +#define ISP_AE_ROUTE_MAX_NODES (16) +typedef struct _ISP_AE_ROUTE_NODE_S { + CVI_U32 u32IntTime; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U32 u32SysGain; /*RW; Range:[0x400, 0x7FFFFFFF]*/ + ISP_IRIS_F_NO_E enIrisFNO; /*RW; Range:[0x0, 0xA]*/ + CVI_U32 u32IrisFNOLin; /*RW; Range:[0x1, 0x400]*/ +} ISP_AE_ROUTE_NODE_S; + +typedef struct _ISP_AE_ROUTE_S { + CVI_U32 u32TotalNum; /*RW; Range:[0x1, 0x10]*/ + ISP_AE_ROUTE_NODE_S astRouteNode[ISP_AE_ROUTE_MAX_NODES]; +} ISP_AE_ROUTE_S; + +#define ISP_AE_ROUTE_EX_MIN_NODES (1) +#define ISP_AE_ROUTE_EX_MAX_NODES (16) +typedef struct _ISP_AE_ROUTE_EX_NODE_S { + CVI_U32 u32IntTime; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U32 u32Again; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U32 u32Dgain; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U32 u32IspDgain; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + ISP_IRIS_F_NO_E enIrisFNO; /*RW; Range:[0x0, 0xA]*/ + CVI_U32 u32IrisFNOLin; /*RW; Range:[0x0, 0x400]*/ +} ISP_AE_ROUTE_EX_NODE_S; + +typedef struct _ISP_AE_ROUTE_EX_S { + CVI_U32 u32TotalNum; /*RW; Range:[0x1, 0x10]*/ + ISP_AE_ROUTE_EX_NODE_S astRouteExNode[ISP_AE_ROUTE_EX_MAX_NODES]; +} ISP_AE_ROUTE_EX_S; + +//----------------------------------------------------------------------------- +// Exposure Info +//----------------------------------------------------------------------------- +typedef struct _ISP_EXP_INFO_S { + CVI_U32 u32ExpTime; /*R;*/ + CVI_U32 u32ShortExpTime; /*R;*/ + CVI_U32 u32MedianExpTime; /*R;*/ + CVI_U32 u32LongExpTime; /*R;*/ + CVI_U32 u32AGain; /*R;*/ + CVI_U32 u32DGain; /*R;*/ + CVI_U32 u32ISPDGain; /*R;*/ + CVI_U32 u32Exposure; /*R;*/ + CVI_BOOL bExposureIsMAX; /*R;*/ + CVI_S16 s16HistError; /*R;*/ + CVI_U32 au32AE_Hist256Value[HIST_NUM]; /*R;*/ + CVI_U8 u8AveLum; /*R;*/ + CVI_U32 u32LinesPer500ms; /*R;*/ + CVI_U32 u32PirisFNO; /*R;*/ + CVI_U32 u32Fps; /*R;*/ + CVI_U32 u32ISO; /*R;*/ + CVI_U32 u32ISOCalibrate; /*R;*/ + CVI_U32 u32RefExpRatio; /*R;*/ + CVI_U32 u32FirstStableTime; /*R;*/ + ISP_AE_ROUTE_S stAERoute; /*R;*/ + ISP_AE_ROUTE_EX_S stAERouteEx; /*R;*/ + CVI_U8 u8WDRShortAveLuma; /*R;*/ + CVI_U32 u32WDRExpRatio; /*R;*/ + CVI_U8 u8LEFrameAvgLuma; /*R;*/ + CVI_U8 u8SEFrameAvgLuma; /*R;*/ + CVI_FLOAT fLightValue; /*R;*/ + CVI_U32 u32AGainSF; /*R;*/ + CVI_U32 u32DGainSF; /*R;*/ + CVI_U32 u32ISPDGainSF; /*R;*/ + CVI_U32 u32ISOSF; /*R;*/ + ISP_AE_ROUTE_S stAERouteSF; /*R;*/ + ISP_AE_ROUTE_EX_S stAERouteSFEx; /*R;*/ + CVI_BOOL bGainSepStatus; /*R;*/ +} ISP_EXP_INFO_S; + +#define SMART_MAX_NUM (3) +typedef struct _ISP_SMART_ROI_S { + CVI_BOOL bEnable; + CVI_BOOL bAvailable; + CVI_U8 u8Luma; + CVI_U8 u8Num; + CVI_U16 u16PosX[SMART_MAX_NUM]; + CVI_U16 u16PosY[SMART_MAX_NUM]; + CVI_U16 u16Width[SMART_MAX_NUM]; + CVI_U16 u16Height[SMART_MAX_NUM]; + CVI_U16 u16FrameWidth; + CVI_U16 u16FrameHeight; +} ISP_SMART_ROI_S; + +#define SMART_CLASS_MAX (2) +typedef struct _ISP_SMART_INFO_S { + ISP_SMART_ROI_S stROI[SMART_CLASS_MAX]; +} ISP_SMART_INFO_S; + +//----------------------------------------------------------------------------- +// WDR Exposure Attr +//----------------------------------------------------------------------------- +#define WDR_EXP_RATIO_NUM (3) +typedef struct _ISP_WDR_EXPOSURE_ATTR_S { + ISP_OP_TYPE_E enExpRatioType; + CVI_U32 au32ExpRatio[WDR_EXP_RATIO_NUM]; /*RW; Range:[0x40, 0x4000]*/ + CVI_U32 u32ExpRatioMax; /*RW; Range:[0x40, 0x4000]*/ + CVI_U32 u32ExpRatioMin; /*RW; Range:[0x40, 0x4000]*/ + CVI_U16 u16Tolerance; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16Speed; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16RatioBias; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U8 u8SECompensation; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16SEHisThr; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16SEHisCntRatio1; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16SEHisCntRatio2; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16SEHis255CntThr1; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U16 u16SEHis255CntThr2; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U8 au8LEAdjustTargetMin[LV_TOTAL_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 au8LEAdjustTargetMax[LV_TOTAL_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 au8SEAdjustTargetMin[LV_TOTAL_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 au8SEAdjustTargetMax[LV_TOTAL_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 u8AdjustTargetDetectFrmNum; /*RW; Range:[0x0, 0xFF]*/ + CVI_U32 u32DiffPixelNum; /*RW; Range:[0x0, 0x7FFFFFFF]*/ + CVI_U16 u16LELowBinThr; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 u16LEHighBinThr; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 u16SELowBinThr; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 u16SEHighBinThr; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 au8FrameAvgLumaMin[LV_TOTAL_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 au8FrameAvgLumaMax[LV_TOTAL_NUM]; /*RW; Range:[0x0, 0xFF]*/ +} ISP_WDR_EXPOSURE_ATTR_S; + +//----------------------------------------------------------------------------- +// Smart Exposure Attr +//----------------------------------------------------------------------------- +typedef struct _ISP_SMART_EXPOSURE_ATTR_S { + CVI_BOOL bEnable; + CVI_BOOL bIRMode; + ISP_OP_TYPE_E enSmartExpType; + CVI_U8 u8LumaTarget; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16ExpCoef; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16ExpCoefMax; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16ExpCoefMin; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U8 u8SmartInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 u8SmartSpeed; /*RW; Range:[0x1, 0xFF]*/ + CVI_U16 u16SmartDelayNum; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 u8Weight; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 u8NarrowRatio; /*RW; Range:[0x0, 0x64]*/ +} ISP_SMART_EXPOSURE_ATTR_S; + +typedef enum _ISP_IR_STATUS_E { + ISP_IR_STATUS_NORMAL = 0, + ISP_IR_STATUS_IR = 1, + ISP_IR_BUTT +} ISP_IR_STATUS_E; + +typedef enum _ISP_IR_SWITCH_STATUS_E { + ISP_IR_SWITCH_NONE = 0, + ISP_IR_SWITCH_TO_NORMAL = 1, + ISP_IR_SWITCH_TO_IR = 2, + ISP_IR_SWITCH_BUTT +} ISP_IR_SWITCH_STATUS_E; + +typedef struct _ISP_IR_AUTO_ATTR_S { + CVI_BOOL bEnable; + CVI_U32 u32Normal2IrIsoThr; + CVI_U32 u32Ir2NormalIsoThr; + CVI_U32 u32RGMax; + CVI_U32 u32RGMin; + CVI_U32 u32BGMax; + CVI_U32 u32BGMin; + ISP_IR_STATUS_E enIrStatus; + ISP_IR_SWITCH_STATUS_E enIrSwitch; +} ISP_IR_AUTO_ATTR_S; + +typedef struct _ISP_AWB_CROP_S { + CVI_BOOL bEnable; + CVI_U16 u16X; /*RW; Range:[0x0, 0x1000]*/ + CVI_U16 u16Y; /*RW; Range:[0x0, 0x1000]*/ + CVI_U16 u16W; /*RW; Range:[0x0, 0x1000]*/ + CVI_U16 u16H; /*RW; Range:[0x0, 0x1000]*/ +} ISP_AWB_CROP_S; + +typedef enum _ISP_AWB_SWITCH_E { + ISP_AWB_AFTER_DG, + ISP_AWB_AFTER_DRC, + ISP_AWB_SWITCH_BUTT, +} ISP_AWB_SWITCH_E; + +typedef enum _ISP_AWB_ALG_TYPE_E { + AWB_ALG_LOWCOST, + AWB_ALG_ADVANCE, + AWB_ALG_BUTT +} ISP_AWB_ALG_TYPE_E; + +typedef enum _ISP_AWB_MULTI_LS_TYPE_E { + AWB_MULTI_LS_SAT, + AWB_MULTI_LS_CCM, + AWB_MULTI_LS_BUTT +} ISP_AWB_MULTI_LS_TYPE_E; + +typedef enum _ISP_AWB_INDOOR_OUTDOOR_STATUS_E { + AWB_INDOOR_MODE, + AWB_OUTDOOR_MODE, + AWB_INDOOR_OUTDOOR_BUTT +} ISP_AWB_INDOOR_OUTDOOR_STATUS_E; + +typedef struct _ISP_WB_STATISTICS_CFG_S { + ISP_AWB_SWITCH_E enAWBSwitch; + CVI_U16 u16ZoneRow; /*RW; Range:[0x0, AWB_ZONE_ORIG_ROW]*/ + CVI_U16 u16ZoneCol; /*RW; Range:[0x0, AWB_ZONE_ORIG_COLUMN]*/ + CVI_U16 u16ZoneBin; + CVI_U16 au16HistBinThresh[4]; + CVI_U16 u16WhiteLevel; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 u16BlackLevel; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 u16CbMax; + CVI_U16 u16CbMin; + CVI_U16 u16CrMax; + CVI_U16 u16CrMin; + ISP_AWB_CROP_S stCrop; +} ISP_WB_STATISTICS_CFG_S; + +#define FIR_H_GAIN_NUM (5) +#define FIR_V_GAIN_NUM (3) +#define AF_GAMMA_NUM (256) +// AF window X region must between [0x8 ~ image xsize - 8]. +// Y region must between [0x2 ~ image ysize - 2]. +typedef struct _ISP_AF_CROP_S { + CVI_BOOL bEnable; + CVI_U16 u16X; /*RW; Range:[0x8, 0xFFF]*/ + CVI_U16 u16Y; /*RW; Range:[0x2, 0xFFF]*/ + CVI_U16 u16W; /*RW; Range:[0x110, 0xFFF]*/ + CVI_U16 u16H; /*RW; Range:[0xF0, 0xFFF]*/ +} ISP_AF_CROP_S; + +typedef struct _ISP_AF_RAW_CFG_S { + CVI_BOOL PreGammaEn; + CVI_U8 PreGammaTable[AF_GAMMA_NUM]; /*RW; Range:[0x0, 0xFF]*/ +} ISP_AF_RAW_CFG_S; + +typedef struct _ISP_AF_PRE_FILTER_CFG_S { + CVI_BOOL PreFltEn; +} ISP_AF_PRE_FILTER_CFG_S; + +typedef struct _ISP_AF_CFG_S { + CVI_BOOL bEnable; + CVI_U16 u16Hwnd; /*RW; Range:[0x2, 0x11]*/ + CVI_U16 u16Vwnd; /*RW; Range:[0x2, 0xF]*/ + CVI_U8 u8HFltShift; /*RW; Range:[0x0, 0xF]*/ + CVI_S8 s8HVFltLpCoeff[FIR_H_GAIN_NUM]; /*RW; Range:[0x0, 0x1F]*/ + ISP_AF_RAW_CFG_S stRawCfg; + ISP_AF_PRE_FILTER_CFG_S stPreFltCfg; + ISP_AF_CROP_S stCrop; + CVI_U8 H0FltCoring; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 H1FltCoring; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 V0FltCoring; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16HighLumaTh; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 u8ThLow; + CVI_U8 u8ThHigh; + CVI_U8 u8GainLow; /*RW; Range:[0x0, 0xFE]*/ + CVI_U8 u8GainHigh; /*RW; Range:[0x0, 0xFE]*/ + CVI_U8 u8SlopLow; /*RW; Range:[0x0, 0xF]*/ + CVI_U8 u8SlopHigh; /*RW; Range:[0x0, 0xF]*/ +} ISP_AF_CFG_S; + +typedef struct _ISP_AF_H_PARAM_S { + CVI_S8 s8HFltHpCoeff[FIR_H_GAIN_NUM]; /*RW; Range:[0x0, 0x1F]*/ +} ISP_AF_H_PARAM_S; + +typedef struct _ISP_AF_V_PARAM_S { + CVI_S8 s8VFltHpCoeff[FIR_V_GAIN_NUM]; /*RW; Range:[0x0, 0x1F]*/ +} ISP_AF_V_PARAM_S; + +typedef struct _ISP_FOCUS_STATISTICS_CFG_S { + ISP_AF_CFG_S stConfig; + ISP_AF_H_PARAM_S stHParam_FIR0; + ISP_AF_H_PARAM_S stHParam_FIR1; + ISP_AF_V_PARAM_S stVParam_FIR; +} ISP_FOCUS_STATISTICS_CFG_S; + +typedef struct _ISP_STATISTICS_CFG_S { + ISP_STATISTICS_CTRL_U unKey; + ISP_AE_STATISTICS_CFG_S stAECfg; + ISP_WB_STATISTICS_CFG_S stWBCfg; + ISP_FOCUS_STATISTICS_CFG_S stFocusCfg; +} ISP_STATISTICS_CFG_S; + +typedef struct _ISP_AE_GRID_INFO_S { + CVI_U16 au16GridYPos[AE_ZONE_ROW + 1]; + CVI_U16 au16GridXPos[AE_ZONE_COLUMN + 1]; + CVI_U8 u8Status; +} ISP_AE_GRID_INFO_S; + +typedef struct _ISP_AE_STATISTICS_S { + CVI_U32 au32FEHist1024Value[ISP_CHANNEL_MAX_NUM][AE_MAX_NUM][MAX_HIST_BINS]; + CVI_U16 au16FEGlobalAvg[ISP_CHANNEL_MAX_NUM][AE_MAX_NUM][BAYER_PATTERN_NUM]; + CVI_U16 au16FEZoneAvg[ISP_CHANNEL_MAX_NUM][AE_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][BAYER_PATTERN_NUM]; + CVI_U32 au32BEHist1024Value[MAX_HIST_BINS]; + CVI_U16 au16BEGlobalAvg[BAYER_PATTERN_NUM]; + CVI_U16 au16BEZoneAvg[AE_ZONE_ROW][AE_ZONE_COLUMN][BAYER_PATTERN_NUM]; + ISP_AE_GRID_INFO_S stFEGridInfo; +} ISP_AE_STATISTICS_S; + +typedef struct _ISP_AWB_GRID_INFO_S { + CVI_U16 au16GridYPos[AWB_ZONE_ORIG_ROW + 1]; + CVI_U16 au16GridXPos[AWB_ZONE_ORIG_COLUMN + 1]; + CVI_U8 u8Status; +} ISP_AWB_GRID_INFO_S; + +typedef struct _ISP_WB_STATISTICS_S { + CVI_U16 u16GlobalR; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 u16GlobalG; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 u16GlobalB; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 u16CountAll; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 au16ZoneAvgR[AWB_ZONE_NUM]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 au16ZoneAvgG[AWB_ZONE_NUM]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 au16ZoneAvgB[AWB_ZONE_NUM]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 au16ZoneCountAll[AWB_ZONE_NUM]; /*RW; Range:[0x0, 0xFFFF]*/ + ISP_AWB_GRID_INFO_S stGridInfo; +} ISP_WB_STATISTICS_S; + +typedef struct _ISP_FOCUS_ZONE_S { + CVI_U16 u16HlCnt; + CVI_U64 u64h0; + CVI_U64 u64h1; + CVI_U32 u32v0; +} ISP_FOCUS_ZONE_S; + +typedef struct _ISP_FE_FOCUS_STATISTICS_S { + ISP_FOCUS_ZONE_S stZoneMetrics[AF_ZONE_ROW][AF_ZONE_COLUMN]; /*R; The zoned measure of contrast*/ +} ISP_FE_FOCUS_STATISTICS_S; + +typedef struct _ISP_AF_STATISTICS_S { + ISP_FE_FOCUS_STATISTICS_S stFEAFStat; +} ISP_AF_STATISTICS_S; + +typedef struct _ISP_MG_STATISTICS_S { + CVI_U16 au16ZoneAvg[MG_ZONE_ROW][MG_ZONE_COLUMN][BAYER_PATTERN_NUM]; +} ISP_MG_STATISTICS_S; + +//----------------------------------------------------------------------------- +// WB Attr +//----------------------------------------------------------------------------- +#define AWB_CALIB_PTS_NUM (3) +#define AWB_CT_BIN_NUM (8) + +typedef struct _ISP_AWB_LightBox_Gain_S { + CVI_U16 u16AvgRgain; + CVI_U16 u16AvgBgain; +} ISP_AWB_LightBox_Gain_S; + +typedef struct _ISP_AWB_Calibration_Gain_S { + CVI_U16 u16AvgRgain[AWB_CALIB_PTS_NUM]; /*RW; Range:[0x0, 0x3FFF]*/ + CVI_U16 u16AvgBgain[AWB_CALIB_PTS_NUM]; /*RW; Range:[0x0, 0x3FFF]*/ + CVI_U16 u16ColorTemperature[AWB_CALIB_PTS_NUM]; /*RW; Range:[0x1F4, 0x7530]*/ +} ISP_AWB_Calibration_Gain_S; + +#define AWB_CALIB_PTS_NUM_EX (10) +typedef struct _ISP_AWB_Calibration_Gain_S_EX { + CVI_U16 u16AvgRgain[AWB_CALIB_PTS_NUM_EX]; /*RW; Range:[0x0, 0x3FFF]*/ + CVI_U16 u16AvgBgain[AWB_CALIB_PTS_NUM_EX]; /*RW; Range:[0x0, 0x3FFF]*/ + CVI_U16 u16ColorTemperature[AWB_CALIB_PTS_NUM_EX]; /*RW; Range:[0x1F4, 0x7530]*/ + CVI_U8 u8Weight[AWB_CALIB_PTS_NUM_EX]; +} ISP_AWB_Calibration_Gain_S_EX; + +#define AWB_LUM_HIST_NUM (6) +typedef struct _ISP_AWB_LUM_HISTGRAM_ATTR_S { + CVI_BOOL bEnable; + ISP_OP_TYPE_E enOpType; + CVI_U8 au8HistThresh[AWB_LUM_HIST_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 au16HistWt[AWB_LUM_HIST_NUM]; /*RW; Range:[0x0, 0x200]*/ +} ISP_AWB_LUM_HISTGRAM_ATTR_S; + +typedef struct _ISP_AWB_CT_LIMIT_ATTR_S { + CVI_BOOL bEnable; + ISP_OP_TYPE_E enOpType; + CVI_U16 u16HighRgLimit; /*RW; Range:[0x0, 0x3FFF] H temp,Rgain max*/ + CVI_U16 u16HighBgLimit; /*RW; Range:[0x0, 0x3FFF] H temp,Bgain max*/ + CVI_U16 u16LowRgLimit; /*RW; Range:[0x0, 0x3FFF] Low temp,Rgain min*/ + CVI_U16 u16LowBgLimit; /*RW; Range:[0x0, 0x3FFF] Low temp,Bgain min*/ +} ISP_AWB_CT_LIMIT_ATTR_S; + +typedef struct _ISP_AWB_CBCR_TRACK_ATTR_S { + CVI_BOOL bEnable; + CVI_U16 au16CrMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3FFF] R/G at L tmp*/ + CVI_U16 au16CrMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3FFF] R/G at H tmp*/ + CVI_U16 au16CbMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3FFF] B/G at H tmp*/ + CVI_U16 au16CbMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3FFF] B/G at L tmp*/ +} ISP_AWB_CBCR_TRACK_ATTR_S; + +typedef struct _ISP_AWB_IN_OUT_ATTR_S { + CVI_BOOL bEnable; + ISP_OP_TYPE_E enOpType; + ISP_AWB_INDOOR_OUTDOOR_STATUS_E enOutdoorStatus; + CVI_U32 u32OutThresh; /*RW; Range:[0x0, 0x14]*/ + CVI_U16 u16LowStart; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16LowStop; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16HighStart; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16HighStop; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_BOOL bGreenEnhanceEn; + CVI_U8 u8OutShiftLimit; +} ISP_AWB_IN_OUT_ATTR_S; + +typedef struct _ISP_AWB_EXTRA_LIGHTSOURCE_INFO_S { + CVI_U16 u16WhiteRgain; /*RW; Range:[0x0, 0x3FFF]*/ + CVI_U16 u16WhiteBgain; /*RW; Range:[0x0, 0x3FFF]*/ + CVI_U16 u16ExpQuant; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 u8LightStatus; /*RW; Range:[0x0, 0x2]*/ + CVI_U8 u8Radius; /*RW; Range:[0x1, 0xFF]*/ +} ISP_AWB_EXTRA_LIGHTSOURCE_INFO_S; + +struct ST_ISP_AWB_SKIN_S { + CVI_U8 u8Mode; + CVI_U16 u16RgainDiff; + CVI_U16 u16BgainDiff; + CVI_U8 u8Radius; +}; + +struct ST_ISP_AWB_SKY_S { + CVI_U8 u8Mode; + CVI_U8 u8ThrLv; + CVI_U16 u16Rgain; + CVI_U16 u16Bgain; + CVI_U16 u16MapRgain; + CVI_U16 u16MapBgain; + CVI_U8 u8Radius; +}; + +struct ST_ISP_AWB_GRASS_S { + CVI_U8 u8Mode; + CVI_U8 u8ThrLv; + CVI_U16 u16Rgain; + CVI_U16 u16Bgain; + CVI_U16 u16MapRgain; + CVI_U16 u16MapBgain; + CVI_U8 u8Radius; +}; + +enum ISP_AWB_TEMP_E { + ISP_AWB_COLORTEMP_LOW, + ISP_AWB_COLORTEMP_HIGH, + ISP_AWB_COLORTEMP_NUM +}; + +struct ST_ISP_AWB_SHIFT_LV_S { + CVI_U8 u8LowLvMode; /*RW; Range:[0x0, 0x1]*/ + CVI_U16 u16LowLvCT[ISP_AWB_COLORTEMP_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16LowLvThr[ISP_AWB_COLORTEMP_NUM]; /*RW; Range:[0x0, 0xF]*/ + CVI_U16 u16LowLvRatio[ISP_AWB_COLORTEMP_NUM]; /*RW; Range:[0x64, 0x3E8]*/ + CVI_U8 u8HighLvMode; /*RW; Range:[0x0, 0x1]*/ + CVI_U16 u16HighLvCT[ISP_AWB_COLORTEMP_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16HighLvThr[ISP_AWB_COLORTEMP_NUM]; /*RW; Range:[0x0, 0xF]*/ + CVI_U16 u16HighLvRatio[ISP_AWB_COLORTEMP_NUM]; /*RW; Range:[0x64, 0x3E8]*/ +}; + +struct ST_ISP_AWB_REGION_S { + CVI_U16 u16Region1; /*RW; Range:[0x1, 0xFFFF]*/ + CVI_U16 u16Region2; /*RW; Range:[0x1, 0xFFFF]*/ + CVI_U16 u16Region3; /*RW; Range:[0x1, 0xFFFF]*/ +}; + +#define AWB_CT_LV_NUM (4) +struct ST_ISP_AWB_CT_WGT_S { + CVI_BOOL bEnable; + CVI_U16 au16MultiCTBin[AWB_CT_BIN_NUM];//low to High ColorTemp + CVI_S8 s8ThrLv[AWB_CT_LV_NUM];//low to high light + CVI_U16 au16MultiCTWt[AWB_CT_LV_NUM][AWB_CT_BIN_NUM];//0~1024 +}; + +#define AWB_CURVE_PARA_NUM (6) +#define AWB_CURVE_BOUND_NUM (8) +#define AWB_LS_NUM (4) +#define AWB_ZONE_WT_W (32) +#define AWB_ZONE_WT_H (32) +#define AWB_ZONE_WT_NUM (AWB_ZONE_WT_W * AWB_ZONE_WT_H) + +typedef struct _ISP_AWB_ATTR_S { + CVI_BOOL bEnable; + CVI_U16 u16RefColorTemp; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 au16StaticWB[ISP_BAYER_CHN_NUM]; /*RW; Range:[0x0, 0xFFFF] G/R*/ + CVI_S32 as32CurvePara[AWB_CURVE_PARA_NUM]; + ISP_AWB_ALG_TYPE_E enAlgType; + CVI_U8 u8RGStrength; + CVI_U8 u8BGStrength; + CVI_U16 u16Speed; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 u16ZoneSel; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 u16HighColorTemp; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 u16LowColorTemp; /*RW; Range:[0x0, 0xFFFF]*/ + ISP_AWB_CT_LIMIT_ATTR_S stCTLimit; + CVI_BOOL bShiftLimitEn; + CVI_U16 u16ShiftLimit[AWB_CURVE_BOUND_NUM]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_BOOL bGainNormEn; + CVI_BOOL bNaturalCastEn; + ISP_AWB_CBCR_TRACK_ATTR_S stCbCrTrack;// R/G + ISP_AWB_LUM_HISTGRAM_ATTR_S stLumaHist; + CVI_BOOL bAWBZoneWtEn; + CVI_U8 au8ZoneWt[AWB_ZONE_WT_NUM]; +} ISP_AWB_ATTR_S; + +typedef struct _ISP_AWB_ATTR_EX_S { + CVI_U8 u8Tolerance; + CVI_U8 u8ZoneRadius; + CVI_U16 u16CurveLLimit; /*RW; Range:[0x0, 0x400]*/ + CVI_U16 u16CurveRLimit; /*RW; Range:[0x200, 0x3FFF]*/ + CVI_BOOL bExtraLightEn; + ISP_AWB_EXTRA_LIGHTSOURCE_INFO_S stLightInfo[AWB_LS_NUM]; + ISP_AWB_IN_OUT_ATTR_S stInOrOut; + CVI_BOOL bMultiLightSourceEn; + ISP_AWB_MULTI_LS_TYPE_E enMultiLSType; + CVI_U16 u16MultiLSScaler; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 au16MultiCTBin[AWB_CT_BIN_NUM]; /*RW; Range:[0x0, 0xFFFF]*/ + CVI_U16 au16MultiCTWt[AWB_CT_BIN_NUM]; /*RW; Range:[0x0, 0x400]*/ + CVI_BOOL bFineTunEn; + CVI_U8 u8FineTunStrength; + //AWB Algo 6 + struct ST_ISP_AWB_SKIN_S stSkin; + struct ST_ISP_AWB_SKY_S stSky; + struct ST_ISP_AWB_GRASS_S stGrass; + struct ST_ISP_AWB_CT_WGT_S stCtLv; + struct ST_ISP_AWB_SHIFT_LV_S stShiftLv; + struct ST_ISP_AWB_REGION_S stRegion; + CVI_U8 adjBgainMode; + CVI_U8 reserve[244]; +} ISP_AWB_ATTR_EX_S;//keep size to 512 bytes + +typedef struct _ISP_MWB_ATTR_S { + CVI_U16 u16Rgain; /*RW; Range:[0x1, 0x3FFF]*/ + CVI_U16 u16Grgain; /*RW; Range:[0x1, 0x3FFF]*/ + CVI_U16 u16Gbgain; /*RW; Range:[0x1, 0x3FFF]*/ + CVI_U16 u16Bgain; /*RW; Range:[0x1, 0x3FFF]*/ +} ISP_MWB_ATTR_S; + +typedef enum _ISP_AWB_ALG_E { + ALG_AWB, + ALG_AWB_SPEC, + ALG_BUTT +} ISP_AWB_ALG_E; + +typedef struct _ISP_WB_ATTR_S { + CVI_BOOL bByPass; + CVI_U8 u8AWBRunInterval; /*RW; Range:[0x1, 0xFF]*/ + ISP_OP_TYPE_E enOpType; + ISP_MWB_ATTR_S stManual; + ISP_AWB_ATTR_S stAuto; + ISP_AWB_ALG_E enAlgType; + CVI_U8 u8DebugMode; +} ISP_WB_ATTR_S; + +//----------------------------------------------------------------------------- +// WB Info +//----------------------------------------------------------------------------- +typedef struct _ISP_WB_INFO_S { + CVI_U16 u16Rgain; /*R; Range:[0x0, 0xFFF]*/ + CVI_U16 u16Grgain; /*R; Range:[0x0, 0xFFF]*/ + CVI_U16 u16Gbgain; /*R; Range:[0x0, 0xFFF]*/ + CVI_U16 u16Bgain; /*R; Range:[0x0, 0xFFF]*/ + CVI_U16 u16Saturation; /*R; Range:[0x0, 0xFF]*/ + CVI_U16 u16ColorTemp; /*R;*/ + CVI_U16 au16CCM[CCM_MATRIX_SIZE]; /*R;*/ + CVI_U16 u16LS0CT; /*R;*/ + CVI_U16 u16LS1CT; /*R;*/ + CVI_U16 u16LS0Area; /*R;*/ + CVI_U16 u16LS1Area; /*R;*/ + CVI_U8 u8MultiDegree; /*R;*/ + CVI_U16 u16ActiveShift; /*R;*/ + CVI_U32 u32FirstStableTime; /*R;*/ + ISP_AWB_INDOOR_OUTDOOR_STATUS_E enInOutStatus; /*R;*/ + CVI_S16 s16Bv; /*R;*/ +} ISP_WB_INFO_S; + +typedef struct _ISP_DCF_CONST_INFO_S { + CVI_U8 au8ImageDescription[DCF_DRSCRIPTION_LENGTH]; /*Describes image*/ + CVI_U8 au8Make[DCF_DRSCRIPTION_LENGTH]; /*Shows manufacturer of digital cameras*/ + CVI_U8 au8Model[DCF_DRSCRIPTION_LENGTH]; /*Shows model number of digital cameras*/ + CVI_U8 au8Software[DCF_DRSCRIPTION_LENGTH]; + /*Shows firmware (internal software of digital cameras) version number*/ + CVI_U8 u8LightSource; + CVI_U32 u32FocalLength; /*Focal length of lens used to take image. Unit is millimeter*/ + CVI_U8 u8SceneType; + /*Indicates the type of scene. Value '0x01' means that the image was directly photographed.*/ + CVI_U8 u8CustomRendered; + CVI_U8 u8FocalLengthIn35mmFilm; /*Indicates the equivalent focal length assuming a 35mm film camera, in mm*/ + CVI_U8 u8SceneCaptureType; + CVI_U8 u8GainControl; + CVI_U8 u8Contrast; + CVI_U8 u8Saturation; + CVI_U8 u8Sharpness; + CVI_U8 u8MeteringMode; +} ISP_DCF_CONST_INFO_S; + +typedef struct _ISP_DCF_UPDATE_INFO_S { + CVI_U32 u32ISOSpeedRatings; /*CCD sensitivity equivalent to Ag-Hr film speedrate*/ + CVI_U32 u32ExposureTime; /*Exposure time (reciprocal of shutter speed).*/ + CVI_U32 u32ExposureBiasValue; /*Exposure bias (compensation) value of taking picture*/ + CVI_U8 u8ExposureProgram; + CVI_U32 u32FNumber; /*The actual F-number (F-stop) of lens when the image was taken*/ + CVI_U32 u32MaxApertureValue; /*Maximum aperture value of lens.*/ + CVI_U8 u8ExposureMode; + CVI_U8 u8WhiteBalance; +} ISP_DCF_UPDATE_INFO_S; + +typedef struct _ISP_DCF_INFO_S { + ISP_DCF_CONST_INFO_S stIspDCFConstInfo; + ISP_DCF_UPDATE_INFO_S stIspDCFUpdateInfo; +} ISP_DCF_INFO_S; + +typedef struct _ISP_MOD_PARAM_S { + CVI_U32 u32IntBotHalf; +} ISP_MOD_PARAM_S; +#if 0 +typedef struct _ISP_MESHSHADING_MANUAL_ATTR_S { + CVI_U16 lsc_strength; + CVI_U16 lscr_strnth; + CVI_U16 lscr_gain_lut[32]; +} ISP_MESHSHADING_MANUAL_ATTR_S; + +typedef struct _ISP_MESHSHADING_AUTO_ATTR_S { + CVI_U16 lsc_strength[ISP_AUTO_ISO_STRENGTH_NUM]; + CVI_U16 lscr_strnth[ISP_AUTO_ISO_STRENGTH_NUM]; + CVI_U16 lscr_gain_lut[ISP_AUTO_ISO_STRENGTH_NUM][32]; +} ISP_MESHSHADING_AUTO_ATTR_S; + +typedef struct _ISP_MESHSHADING_ATTR_S { + CVI_BOOL lsc_enable; + CVI_U8 lsc_debug; + CVI_U8 lsc_xblknumm1; + CVI_U8 reg_lsc_yblknumm1; + CVI_U16 reg_lsc_xstep; + CVI_U16 reg_lsc_ystep; + CVI_U32 reg_lsc_imgx0; + CVI_U32 reg_lsc_imgy0; + CVI_U8 reg_lsc_gain_base; + CVI_U16 reg_lsc_scaler[256]; + CVI_BOOL lscr_enable; + CVI_U16 lscr_centerx; + CVI_U16 lscr_centery; + CVI_U16 lscr_norm; + ISP_OP_TYPE_E enOpType; + ISP_MESHSHADING_MANUAL_ATTR_S stManual; + ISP_MESHSHADING_AUTO_ATTR_S stAuto; +} ISP_MESHSHADING_ATTR_S; +#endif + +//----------------------------------------------------------------------------- +// Black Level Correction(BLC) +//----------------------------------------------------------------------------- +typedef struct _ISP_BLACK_LEVEL_MANUAL_ATTR_S { + CVI_U16 OffsetR; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGb; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetB; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetR2; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGr2; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGb2; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetB2; /*RW; Range:[0x0, 0xfff]*/ +} ISP_BLACK_LEVEL_MANUAL_ATTR_S; + +typedef struct _ISP_BLACK_LEVEL_AUTO_ATTR_S { + CVI_U16 OffsetR[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGb[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetB[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetR2[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGr2[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetGb2[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 OffsetB2[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ +} ISP_BLACK_LEVEL_AUTO_ATTR_S; + +typedef struct _ISP_BLACK_LEVEL_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0x0, 0x1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + ISP_BLACK_LEVEL_MANUAL_ATTR_S stManual; + ISP_BLACK_LEVEL_AUTO_ATTR_S stAuto; +} ISP_BLACK_LEVEL_ATTR_S; + +//----------------------------------------------------------------------------- +// Dead pixel correction(DPC) +//----------------------------------------------------------------------------- +typedef struct _ISP_DP_DYNAMIC_MANUAL_ATTR_S { + CVI_U8 ClusterSize; /*RW; Range:[0x0, 0x3]*/ + CVI_U8 BrightDefectToNormalPixRatio; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 DarkDefectToNormalPixRatio; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreR; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreG; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreB; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreMinG; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreMinRB; /*RW; Range:[0x0, 0xff]*/ +} ISP_DP_DYNAMIC_MANUAL_ATTR_S; + +typedef struct _ISP_DP_DYNAMIC_AUTO_ATTR_S { + CVI_U8 ClusterSize[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3]*/ + CVI_U8 BrightDefectToNormalPixRatio[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 DarkDefectToNormalPixRatio[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreR[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreG[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreB[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreMinG[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FlatThreMinRB[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_DP_DYNAMIC_AUTO_ATTR_S; + +typedef struct _ISP_DP_DYNAMIC_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + CVI_U32 DynamicDPCEnable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + ISP_DP_DYNAMIC_MANUAL_ATTR_S stManual; + ISP_DP_DYNAMIC_AUTO_ATTR_S stAuto; +} ISP_DP_DYNAMIC_ATTR_S; + +#define STATIC_DP_COUNT_MAX (4096) +typedef struct _ISP_DP_STATIC_ATTR_S { + CVI_BOOL Enable; + CVI_U16 BrightCount; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DarkCount; /*RW; Range:[0x0, 0xfff]*/ + CVI_U32 BrightTable[STATIC_DP_COUNT_MAX]; /*RW; Range:[0x0, 0x1fff1fff]*/ + CVI_U32 DarkTable[STATIC_DP_COUNT_MAX]; /*RW; Range:[0x0, 0x1fff1fff]*/ + CVI_BOOL Show; // not support yet +} ISP_DP_STATIC_ATTR_S; + +typedef enum _CVI_STATIC_DP_TYPE_E { + ISP_STATIC_DP_BRIGHT, + ISP_STATIC_DP_DARK, +} CVI_STATIC_DP_TYPE_E; + +typedef enum _ISP_STATUS_E { + ISP_STATUS_INIT, + ISP_STATUS_SUCCESS, + ISP_STATUS_TIMEOUT, + ISP_STATUS_SIZE, +} ISP_STATUS_E; + +typedef struct _ISP_DP_CALIB_ATTR_S { + CVI_BOOL EnableDetect; + CVI_STATIC_DP_TYPE_E StaticDPType; + CVI_U8 StartThresh; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 CountMax; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 CountMin; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 TimeLimit; /*RW; Range:[0x0, 0x640]*/ + CVI_BOOL saveFileEn; + // read only + CVI_U32 Table[STATIC_DP_COUNT_MAX]; /*R; Range:[0x0, 0x1fff1fff]*/ + CVI_U8 FinishThresh; /*R; Range:[0x0, 0xff]*/ + CVI_U16 Count; /*R; Range:[0x0, 0xfff]*/ + ISP_STATUS_E Status; /*R; Range:[0x0, 0x2]*/ +} ISP_DP_CALIB_ATTR_S; + +//----------------------------------------------------------------------------- +// Crosstalk +//----------------------------------------------------------------------------- +typedef struct _ISP_CROSSTALK_MANUAL_ATTR_S { + CVI_U16 Strength; /*RW; Range:[0x0, 0x100]*/ +} ISP_CROSSTALK_MANUAL_ATTR_S; + +typedef struct _ISP_CROSSTALK_AUTO_ATTR_S { + CVI_U16 Strength[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ +} ISP_CROSSTALK_AUTO_ATTR_S; + +typedef struct _ISP_CROSSTALK_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U16 GrGbDiffThreSec[4]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 FlatThre[4]; /*RW; Range:[0x0, 0xfff]*/ + ISP_CROSSTALK_MANUAL_ATTR_S stManual; + ISP_CROSSTALK_AUTO_ATTR_S stAuto; +} ISP_CROSSTALK_ATTR_S; + +//----------------------------------------------------------------------------- +// Bayer domain noise reduction (BNR) +//----------------------------------------------------------------------------- +typedef struct _ISP_NR_MANUAL_ATTR_S { + CVI_U8 WindowType; /*RW; Range:[0x0, 0xb]*/ + CVI_U8 DetailSmoothMode; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 NoiseSuppressStr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FilterType; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseSuppressStrMode; /*RW; Range:[0x0, 0xff]*/ +} ISP_NR_MANUAL_ATTR_S; + +typedef struct _ISP_NR_AUTO_ATTR_S { + CVI_U8 WindowType[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xb]*/ + CVI_U8 DetailSmoothMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 NoiseSuppressStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FilterType[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseSuppressStrMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_NR_AUTO_ATTR_S; + +typedef struct _ISP_NR_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_BOOL CoringParamEnable; + ISP_NR_MANUAL_ATTR_S stManual; + ISP_NR_AUTO_ATTR_S stAuto; +} ISP_NR_ATTR_S; + +typedef struct _ISP_NR_FILTER_MANUAL_ATTR_S { + CVI_U8 LumaStr[8]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 VarThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 CoringWgtLF; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 CoringWgtHF; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 NonDirFiltStr; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 VhDirFiltStr; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 AaDirFiltStr; /*RW; Range:[0x0, 0x1f]*/ + CVI_U16 NpSlopeR; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpSlopeGr; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpSlopeGb; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpSlopeB; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrR; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrGr; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrGb; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrB; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetR; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetGr; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetGb; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetB; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetR; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetGr; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetGb; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetB; /*RW; Range:[0x0, 0x3ff]*/ +} ISP_NR_FILTER_MANUAL_ATTR_S; + +typedef struct _ISP_NR_FILTER_AUTO_ATTR_S { + CVI_U8 LumaStr[8][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 VarThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 CoringWgtLF[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 CoringWgtHF[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 NonDirFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 VhDirFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 AaDirFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U16 NpSlopeR[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpSlopeGr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpSlopeGb[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpSlopeB[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrR[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrGr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrGb[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLumaThrB[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetR[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetGr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetGb[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpLowOffsetB[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetR[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetGr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetGb[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ + CVI_U16 NpHighOffsetB[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ +} ISP_NR_FILTER_AUTO_ATTR_S; + +typedef enum _ISP_NR_TUNING_MODE_E { + NR_RESULT = 8, + NR_EDGE_SMOOTH_REGION = 11, +} ISP_NR_TUNING_MODE_E; + +typedef struct _ISP_NR_FILTER_ATTR_S { + CVI_U8 TuningMode; /*RW; Range:[0x0, 0xf]*/ + ISP_NR_FILTER_MANUAL_ATTR_S stManual; + ISP_NR_FILTER_AUTO_ATTR_S stAuto; +} ISP_NR_FILTER_ATTR_S; + +typedef struct _ISP_RLSC_MANUAL_ATTR_S { + CVI_U16 RadialStr; /*RW; Range:[0x0, 0xfff]*/ +} ISP_RLSC_MANUAL_ATTR_S; + +typedef struct _ISP_RLSC_AUTO_ATTR_S { + CVI_U16 RadialStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ +} ISP_RLSC_AUTO_ATTR_S; + +typedef struct _ISP_RLSC_ATTR_S { + CVI_BOOL RlscEnable; /*RW; Range:[0, 1]*/ + CVI_U16 RlscCenterX; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 RlscCenterY; /*RW; Range:[0x0, 0xfff]*/ + ISP_RLSC_MANUAL_ATTR_S stManual; + ISP_RLSC_AUTO_ATTR_S stAuto; +} ISP_RLSC_ATTR_S; + +//----------------------------------------------------------------------------- +// Demosaic +//----------------------------------------------------------------------------- +typedef struct _ISP_DEMOSAIC_MANUAL_ATTR_S { + CVI_U16 CoarseEdgeThr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 CoarseStr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 FineEdgeThr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 FineStr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 RbSigLumaThd; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 FilterMode; /*RW; Range:[0, 1]*/ +} ISP_DEMOSAIC_MANUAL_ATTR_S; + +typedef struct _ISP_DEMOSAIC_AUTO_ATTR_S { + CVI_U16 CoarseEdgeThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 CoarseStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 FineEdgeThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 FineStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 RbSigLumaThd[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 FilterMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0, 1]*/ +} ISP_DEMOSAIC_AUTO_ATTR_S; + +typedef struct _ISP_DEMOSAIC_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + CVI_BOOL TuningMode; /*RW; Range:[0, 1]*/ + CVI_BOOL RbVtEnable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + ISP_DEMOSAIC_MANUAL_ATTR_S stManual; + ISP_DEMOSAIC_AUTO_ATTR_S stAuto; +} ISP_DEMOSAIC_ATTR_S; + +typedef struct _ISP_DEMOSAIC_DEMOIRE_MANUAL_ATTR_S { + CVI_U8 AntiFalseColorStr; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 SatGainIn[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 SatGainOut[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 ProtectColorGainIn[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 ProtectColorGainOut[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 UserDefineProtectColor1; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 UserDefineProtectColor2; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 UserDefineProtectColor3; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 EdgeGainIn[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 EdgeGainOut[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DetailGainIn[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DetailGaintOut[2]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DetailDetectLumaStr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 DetailSmoothStr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 DetailWgtThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 DetailWgtMin; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailWgtMax; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailWgtSlope; /*RW; Range:[0x0, 0x400]*/ + CVI_U8 EdgeWgtNp; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 EdgeWgtThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 EdgeWgtMin; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 EdgeWgtMax; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 EdgeWgtSlope; /*RW; Range:[0x0, 0x400]*/ + CVI_U8 DetailSmoothMapTh; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 DetailSmoothMapMin; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailSmoothMapMax; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailSmoothMapSlope; /*RW; Range:[0x0, 0x400]*/ + CVI_U8 LumaWgt; /*RW; Range:[0x0, 0xff]*/ +} ISP_DEMOSAIC_DEMOIRE_MANUAL_ATTR_S; + +typedef struct _ISP_DEMOSAIC_DEMOIRE_AUTO_ATTR_S { + CVI_U8 AntiFalseColorStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 SatGainIn[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 SatGainOut[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 ProtectColorGainIn[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 ProtectColorGainOut[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 UserDefineProtectColor1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 UserDefineProtectColor2[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 UserDefineProtectColor3[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 EdgeGainIn[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 EdgeGainOut[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DetailGainIn[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DetailGaintOut[2][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DetailDetectLumaStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 DetailSmoothStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 DetailWgtThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 DetailWgtMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailWgtMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailWgtSlope[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x400]*/ + CVI_U8 EdgeWgtNp[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 EdgeWgtThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 EdgeWgtMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 EdgeWgtMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 EdgeWgtSlope[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x400]*/ + CVI_U8 DetailSmoothMapTh[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 DetailSmoothMapMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailSmoothMapMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DetailSmoothMapSlope[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x400]*/ + CVI_U8 LumaWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_DEMOSAIC_DEMOIRE_AUTO_ATTR_S; + +typedef struct _ISP_DEMOSAIC_DEMOIRE_ATTR_S { + CVI_BOOL AntiFalseColorEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL ProtectColorEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL DetailDetectLumaEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL DetailSmoothEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL DetailMode; /*RW; Range:[0, 1]*/ + ISP_DEMOSAIC_DEMOIRE_MANUAL_ATTR_S stManual; + ISP_DEMOSAIC_DEMOIRE_AUTO_ATTR_S stAuto; +} ISP_DEMOSAIC_DEMOIRE_ATTR_S; + +//----------------------------------------------------------------------------- +// RGBCAC +//----------------------------------------------------------------------------- +typedef struct _ISP_RGBCAC_MANUAL_ATTR_S { + CVI_U8 DePurpleStr0; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleStr1; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 EdgeCoring; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 DePurpleCrStr0; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleCbStr0; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleCrStr1; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleCbStr1; /*RW; Range:[0x0, 0x10]*/ +} ISP_RGBCAC_MANUAL_ATTR_S; + +typedef struct _ISP_RGBCAC_AUTO_ATTR_S { + CVI_U8 DePurpleStr0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleStr1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 EdgeCoring[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 DePurpleCrStr0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleCbStr0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleCrStr1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleCbStr1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x10]*/ +} ISP_RGBCAC_AUTO_ATTR_S; + +typedef struct _ISP_RGBCAC_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 PurpleDetRange0; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 PurpleDetRange1; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 DePurpleStrMax0; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleStrMin0; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleStrMax1; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleStrMin1; /*RW; Range:[0x0, 0xFF]*/ + CVI_U16 EdgeGlobalGain; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 EdgeGainIn[3]; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 EdgeGainOut[3]; /*RW; Range:[0x0, 0x20]*/ + CVI_U16 LumaScale; /*RW; Range:[0x0, 0x7FF]*/ + CVI_U16 UserDefineLuma; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 LumaBlendWgt; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 LumaBlendWgt2; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 LumaBlendWgt3; /*RW; Range:[0x0, 0x20]*/ + CVI_U16 PurpleCb; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 PurpleCr; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 PurpleCb2; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 PurpleCr2; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 PurpleCb3; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 PurpleCr3; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 GreenCb; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 GreenCr; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0x2]*/ + ISP_RGBCAC_MANUAL_ATTR_S stManual; + ISP_RGBCAC_AUTO_ATTR_S stAuto; +} ISP_RGBCAC_ATTR_S; + +//----------------------------------------------------------------------------- +// LCAC +//----------------------------------------------------------------------------- +typedef struct _ISP_LCAC_GAUSS_COEF_ATTR_S { + CVI_U8 Wgt; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 Sigma; /*RW; Range:[0x1, 0xFF]*/ +} ISP_LCAC_GAUSS_COEF_ATTR_S; + +typedef struct _ISP_LCAC_MANUAL_ATTR_S { + CVI_U16 DePurpleCrGain; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 DePurpleCbGain; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 DePurepleCrWgt0; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurepleCbWgt0; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurepleCrWgt1; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurepleCbWgt1; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 EdgeCoringBase; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeCoringAdv; /*RW; Range:[0x0, 0xFF]*/ +} ISP_LCAC_MANUAL_ATTR_S; + +typedef struct _ISP_LCAC_AUTO_ATTR_S { + CVI_U16 DePurpleCrGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 DePurpleCbGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U8 DePurepleCrWgt0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurepleCbWgt0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurepleCrWgt1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurepleCbWgt1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 EdgeCoringBase[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeCoringAdv[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ +} ISP_LCAC_AUTO_ATTR_S; + +typedef struct _ISP_LCAC_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0x6]*/ + CVI_U8 DePurpleCrStr0; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurpleCbStr0; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurpleCrStr1; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurpleCbStr1; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 FilterTypeBase; /*RW; Range:[0x0, 0x3]*/ + CVI_U8 EdgeGainBase0; /*RW; Range:[0x0, 0x1C]*/ + CVI_U8 EdgeGainBase1; /*RW; Range:[0x0, 0x23]*/ + CVI_U8 EdgeStrWgtBase; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleStrMaxBase; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 DePurpleStrMinBase; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 FilterScaleAdv; /*RW; Range:[0x0, 0xF]*/ + CVI_U8 LumaWgt; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 FilterTypeAdv; /*RW; Range:[0x0, 0x5]*/ + CVI_U8 EdgeGainAdv0; /*RW; Range:[0x0, 0x1C]*/ + CVI_U8 EdgeGainAdv1; /*RW; Range:[0x0, 0x23]*/ + CVI_U8 EdgeStrWgtAdvG; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 DePurpleStrMaxAdv; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleStrMinAdv; /*RW; Range:[0x0, 0xFF]*/ + ISP_LCAC_GAUSS_COEF_ATTR_S EdgeWgtBase; + ISP_LCAC_GAUSS_COEF_ATTR_S EdgeWgtAdv; + ISP_LCAC_MANUAL_ATTR_S stManual; + ISP_LCAC_AUTO_ATTR_S stAuto; +} ISP_LCAC_ATTR_S; + +//----------------------------------------------------------------------------- +// Mesh lens shading correction (MLSC) +//----------------------------------------------------------------------------- +#define ISP_MLSC_COLOR_TEMPERATURE_SIZE (7) + +typedef struct _ISP_MESH_SHADING_MANUAL_ATTR_S { + CVI_U16 MeshStr; /*RW; Range:[0x0, 0xfff]*/ +} ISP_MESH_SHADING_MANUAL_ATTR_S; + +typedef struct _ISP_MESH_SHADING_AUTO_ATTR_S { + CVI_U16 MeshStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ +} ISP_MESH_SHADING_AUTO_ATTR_S; + +typedef struct _ISP_MESH_SHADING_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_BOOL OverflowProtection; + ISP_MESH_SHADING_MANUAL_ATTR_S stManual; + ISP_MESH_SHADING_AUTO_ATTR_S stAuto; +} ISP_MESH_SHADING_ATTR_S; + +typedef struct _ISP_MESH_SHADING_GAIN_LUT_S { + CVI_U16 ColorTemperature; /*RW; Range:[0x0, 0x7530]*/ + CVI_U16 RGain[CVI_ISP_LSC_GRID_POINTS]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 GGain[CVI_ISP_LSC_GRID_POINTS]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 BGain[CVI_ISP_LSC_GRID_POINTS]; /*RW; Range:[0x0, 0xfff]*/ +} ISP_MESH_SHADING_GAIN_LUT_S; + +typedef struct _ISP_MESH_SHADING_GAIN_LUT_ATTR_S { + CVI_U8 Size; /*RW; Range:[0x1, 0x7]*/ + ISP_MESH_SHADING_GAIN_LUT_S LscGainLut[ISP_MLSC_COLOR_TEMPERATURE_SIZE]; +} ISP_MESH_SHADING_GAIN_LUT_ATTR_S; + +//----------------------------------------------------------------------------- +// CCM +//----------------------------------------------------------------------------- +// Saturation +typedef struct _ISP_SATURATION_MANUAL_ATTR_S { + CVI_U8 Saturation; /*RW; Range:[0x0, 0xff]*/ +} ISP_SATURATION_MANUAL_ATTR_S; + +typedef struct _ISP_SATURATION_AUTO_ATTR_S { + CVI_U8 Saturation[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_SATURATION_AUTO_ATTR_S; + +typedef struct _ISP_SATURATION_ATTR_SS { + ISP_OP_TYPE_E enOpType; + ISP_SATURATION_MANUAL_ATTR_S stManual; + ISP_SATURATION_AUTO_ATTR_S stAuto; +} ISP_SATURATION_ATTR_S; + +// CCM Saturation +typedef struct _ISP_CCM_SATURATION_MANUAL_ATTR_S { + CVI_U8 SaturationLE; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SaturationSE; /*RW; Range:[0x0, 0xff]*/ +} ISP_CCM_SATURATION_MANUAL_ATTR_S; + +typedef struct _ISP_CCM_SATURATION_AUTO_ATTR_S { + CVI_U8 SaturationLE[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SaturationSE[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_CCM_SATURATION_AUTO_ATTR_S; + +typedef struct _ISP_CCM_SATURATION_ATTR_SS { + ISP_CCM_SATURATION_MANUAL_ATTR_S stManual; + ISP_CCM_SATURATION_AUTO_ATTR_S stAuto; +} ISP_CCM_SATURATION_ATTR_S; + +// CCM +typedef struct _ISP_COLORMATRIX_ATTR_S { + CVI_U16 ColorTemp; /*RW; Range:[0x1f4, 0x7530]*/ + CVI_S16 CCM[9]; /*RW; Range:[-0x2000, 0x1FFF]*/ +} ISP_COLORMATRIX_ATTR_S; + +typedef struct _ISP_CCM_MANUAL_ATTR_S { + CVI_BOOL SatEnable; /*RW; Range:[0, 1]*/ + CVI_S16 CCM[9]; /*RW; Range:[-0x2000, 0x1FFF]*/ +} ISP_CCM_MANUAL_ATTR_S; + +typedef struct _ISP_CCM_AUTO_ATTR_S { + CVI_BOOL ISOActEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL TempActEnable; /*RW; Range:[0, 1]*/ + CVI_U8 CCMTabNum; /*RW; Range:[0x3, 0x7]*/ + ISP_COLORMATRIX_ATTR_S CCMTab[7]; +} ISP_CCM_AUTO_ATTR_S; + +typedef struct _ISP_CCM_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + ISP_CCM_MANUAL_ATTR_S stManual; + ISP_CCM_AUTO_ATTR_S stAuto; +} ISP_CCM_ATTR_S; + +//----------------------------------------------------------------------------- +// CSC +//----------------------------------------------------------------------------- +typedef enum _ISP_CSC_COLORGAMUT { + ISP_CSC_COLORGAMUT_BT601, + ISP_CSC_COLORGAMUT_BT709, + ISP_CSC_COLORGAMUT_BT2020, + ISP_CSC_COLORGAMUT_USER, + ISP_CSC_COLORGAMUT_NUM +} ISP_CSC_COLORGAMUT; + +typedef struct _ISP_CSC_MATRX_S { + CVI_S16 userCscCoef[CSC_MATRIX_SIZE]; /*RW; Range:[-0x2000, 0x1FFF]*/ + CVI_S16 userCscOffset[CSC_OFFSET_SIZE]; /*RW; Range:[-0x100, 0xFF]*/ +} ISP_CSC_MATRX_S; + +typedef struct _ISP_CSC_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_CSC_COLORGAMUT enColorGamut; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 Hue; /*RW; Range:[0, 0x64]*/ + CVI_U8 Luma; /*RW; Range:[0, 0x64]*/ + CVI_U8 Contrast; /*RW; Range:[0, 0x64]*/ + CVI_U8 Saturation; /*RW; Range:[0, 0x64]*/ + ISP_CSC_MATRX_S stUserMatrx; +} ISP_CSC_ATTR_S; + +//----------------------------------------------------------------------------- +// Color tone +//----------------------------------------------------------------------------- +typedef struct _ISP_COLOR_TONE_ATTR_S { + CVI_U16 u16RedCastGain; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 u16GreenCastGain; /*RW; Range:[0x0, 0xFFF]*/ + CVI_U16 u16BlueCastGain; /*RW; Range:[0x0, 0xFFF]*/ +} ISP_COLOR_TONE_ATTR_S; + +//----------------------------------------------------------------------------- +// FSWDR +//----------------------------------------------------------------------------- +typedef struct _ISP_FSWDR_MANUAL_ATTR_S { + CVI_U16 WDRCombineLongThr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRCombineShortThr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRCombineMaxWeight; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 WDRCombineMinWeight; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 WDRMtIn[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 WDRMtOut[4]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 WDRLongWgt; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 WDRCombineSNRAwareToleranceLevel; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MergeModeAlpha; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 WDRMotionCombineLongThr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRMotionCombineShortThr; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRMotionCombineMinWeight; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 WDRMotionCombineMaxWeight; /*RW; Range:[0x0, 0x100]*/ +} ISP_FSWDR_MANUAL_ATTR_S; + +typedef struct _ISP_FSWDR_AUTO_ATTR_S { + CVI_U16 WDRCombineLongThr[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRCombineShortThr[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRCombineMaxWeight[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 WDRCombineMinWeight[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 WDRMtIn[4][ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 WDRMtOut[4][ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 WDRLongWgt[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 WDRCombineSNRAwareToleranceLevel[ISP_AUTO_LV_NUM]; + CVI_U8 MergeModeAlpha[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 WDRMotionCombineLongThr[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRMotionCombineShortThr[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 WDRMotionCombineMinWeight[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 WDRMotionCombineMaxWeight[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ +} ISP_FSWDR_AUTO_ATTR_S; + +typedef struct _ISP_FSWDR_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; /*RW; Range:[0, 1]*/ + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_BOOL MotionCompEnable; /*RW; Range:[0, 1]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0x9]*/ + CVI_BOOL WDRDCMode;; /*RW; Range:[0, 1]*/ + CVI_BOOL WDRLumaMode; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 WDRType; /*RW; Range:[0x0, 0x2]*/ + CVI_BOOL WDRCombineSNRAwareEn; /*RW; Range:[0, 1]*/ + CVI_U16 WDRCombineSNRAwareLowThr; /*RW; Range:[0x0, 0xffff]*/ + CVI_U16 WDRCombineSNRAwareHighThr; /*RW; Range:[0x0, 0xffff]*/ + CVI_U16 WDRCombineSNRAwareSmoothLevel; /*RW; Range:[0x1, 0xbb8]*/ + CVI_BOOL LocalToneRefinedDCMode; /*RW; Range:[0, 1]*/ + CVI_BOOL LocalToneRefinedLumaMode; /*RW; Range:[0, 1]*/ + CVI_U16 DarkToneRefinedThrL; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DarkToneRefinedThrH; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 DarkToneRefinedMaxWeight; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DarkToneRefinedMinWeight; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 BrightToneRefinedThrL; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 BrightToneRefinedThrH; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 BrightToneRefinedMaxWeight; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 BrightToneRefinedMinWeight; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 WDRMotionFusionMode; /*RW; Range:[0x0, 0x3]*/ + CVI_BOOL MtMode; /*RW; Range:[0, 1]*/ + + ISP_FSWDR_MANUAL_ATTR_S stManual; + ISP_FSWDR_AUTO_ATTR_S stAuto; +} ISP_FSWDR_ATTR_S; + +//----------------------------------------------------------------------------- +// DRC +//----------------------------------------------------------------------------- +#define DRC_DARK_USER_DEFINE_NUM (257) +#define DRC_BRIGHT_USER_DEFINE_NUM (513) +#define DRC_GLOBAL_USER_DEFINE_NUM (1025) + +typedef struct _ISP_DRC_MANUAL_ATTR_S { + CVI_U32 TargetYScale; /*RW; Range:[0x0, 0x800]*/ + CVI_U16 HdrStrength; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 DEAdaptPercentile; /*RW; Range:[0x0, 0x19]*/ + CVI_U8 DEAdaptTargetGain; /*RW; Range:[0x1, 0x60]*/ + CVI_U8 DEAdaptGainUB; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 DEAdaptGainLB; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 BritInflectPtLuma; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 BritContrastLow; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 BritContrastHigh; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 SdrTargetY; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SdrTargetYGain; /*RW; Range:[0x20, 0x80]*/ + CVI_U16 SdrGlobalToneStr; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 SdrDEAdaptPercentile; /*RW; Range:[0x0, 0x19]*/ + CVI_U8 SdrDEAdaptTargetGain; /*RW; Range:[0x1, 0x40]*/ + CVI_U8 SdrDEAdaptGainLB; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 SdrDEAdaptGainUB; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 SdrBritInflectPtLuma; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 SdrBritContrastLow; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 SdrBritContrastHigh; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 TotalGain; /*RW; Range:[0x0, 0xff]*/ +} ISP_DRC_MANUAL_ATTR_S; + +typedef struct _ISP_DRC_AUTO_ATTR_S { + CVI_U32 TargetYScale[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x800]*/ + CVI_U16 HdrStrength[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 DEAdaptPercentile[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x19]*/ + CVI_U8 DEAdaptTargetGain[ISP_AUTO_LV_NUM]; /*RW; Range:[0x1, 0x60]*/ + CVI_U8 DEAdaptGainUB[ISP_AUTO_LV_NUM]; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 DEAdaptGainLB[ISP_AUTO_LV_NUM]; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 BritInflectPtLuma[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 BritContrastLow[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 BritContrastHigh[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 SdrTargetY[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SdrTargetYGain[ISP_AUTO_LV_NUM]; /*RW; Range:[0x20, 0x80]*/ + CVI_U16 SdrGlobalToneStr[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 SdrDEAdaptPercentile[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x19]*/ + CVI_U8 SdrDEAdaptTargetGain[ISP_AUTO_LV_NUM]; /*RW; Range:[0x1, 0x40]*/ + CVI_U8 SdrDEAdaptGainLB[ISP_AUTO_LV_NUM]; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 SdrDEAdaptGainUB[ISP_AUTO_LV_NUM]; /*RW; Range:[0x1, 0xff]*/ + CVI_U8 SdrBritInflectPtLuma[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 SdrBritContrastLow[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 SdrBritContrastHigh[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 TotalGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_DRC_AUTO_ATTR_S; + +typedef struct _ISP_DRC_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0x7]*/ + CVI_BOOL LocalToneEn; /*RW; Range:[0x0, 0x1]*/ + CVI_BOOL LocalToneRefineEn; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 ToneCurveSelect; /*RW; Range:[0x0, 0x1]*/ + CVI_U16 CurveUserDefine[DRC_GLOBAL_USER_DEFINE_NUM]; /*RW; Range:[0x0, 0xffff]*/ + CVI_U16 DarkUserDefine[DRC_DARK_USER_DEFINE_NUM]; /*RW; Range:[0x0, 0xffff]*/ + CVI_U16 BrightUserDefine[DRC_BRIGHT_USER_DEFINE_NUM]; /*RW; Range:[0x0, 0xffff]*/ + CVI_U32 ToneCurveSmooth; /*RW; Range:[0x0, 0x1f4]*/ + CVI_U8 CoarseFltScale; /*RW; Range:[0x3, 0x6]*/ + CVI_U8 SdrTargetYGainMode; /*RW; Range:[0x0, 0x1]*/ + CVI_BOOL DetailEnhanceEn; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 LumaGain[33]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 DetailEnhanceMtIn[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 DetailEnhanceMtOut[4]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 OverShootThd; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThd; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootGain; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 UnderShootGain; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 OverShootThdMax; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThdMin; /*RW; Range:[0x0, 0xff]*/ + CVI_BOOL SoftClampEnable; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 SoftClampUB; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SoftClampLB; /*RW; Range:[0x0, 0xff]*/ + CVI_BOOL dbg_182x_sim_enable; /*RW; Range:[0, 1]*/ + CVI_U8 DarkMapStr; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 BritMapStr; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 SdrDarkMapStr; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 SdrBritMapStr; /*RW; Range:[0x0, 0x80]*/ + CVI_U32 DRCMu[32]; /*RW; Range:[0x0, 0x7fffffff]*/ + ISP_DRC_MANUAL_ATTR_S stManual; + ISP_DRC_AUTO_ATTR_S stAuto; +} ISP_DRC_ATTR_S; + +//----------------------------------------------------------------------------- +// Gamma +//----------------------------------------------------------------------------- +#define GAMMA_NODE_NUM (256) +#define GAMMA_MAX_INTERPOLATION_NUM (5) +typedef enum _ISP_GAMMA_CURVE_TYPE_E { + ISP_GAMMA_CURVE_DEFAULT, + ISP_GAMMA_CURVE_SRGB, + ISP_GAMMA_CURVE_USER_DEFINE, + ISP_GAMMA_CURVE_AUTO, + ISP_GAMMA_CURVE_MAX +} ISP_GAMMA_CURVE_TYPE_E; + +typedef struct _ISP_GAMMA_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U16 Table[GAMMA_NODE_NUM]; /*RW; Range:[0x0, 0xfff]*/ + ISP_GAMMA_CURVE_TYPE_E enCurveType; +} ISP_GAMMA_ATTR_S; + +typedef struct _ISP_GAMMA_CURVE_ATTR_S { + CVI_S16 Lv; /*RW; Range:[-0x1f4, 0x5dc]*/ + CVI_U16 Tbl[GAMMA_NODE_NUM]; /*RW; Range:[0x0, 0xfff]*/ +} ISP_GAMMA_CURVE_ATTR_S; + +typedef struct _ISP_AUTO_GAMMA_ATTR_S { + CVI_U8 GammaTabNum; /*RW; Range:[1, GAMMA_MAX_INTERPOLATION_NUM]*/ + ISP_GAMMA_CURVE_ATTR_S GammaTab[GAMMA_MAX_INTERPOLATION_NUM]; +} ISP_AUTO_GAMMA_ATTR_S; + +//----------------------------------------------------------------------------- +// Dehaze +//----------------------------------------------------------------------------- +typedef struct _ISP_DEHAZE_MANUAL_ATTR_S { + CVI_U8 Strength; /*RW; Range:[0x0, 0x64]*/ +} ISP_DEHAZE_MANUAL_ATTR_S; + +typedef struct _ISP_DEHAZE_AUTO_ATTR_S { + CVI_U8 Strength[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x64]*/ +} ISP_DEHAZE_AUTO_ATTR_S; + +typedef struct _ISP_DEHAZE_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U16 CumulativeThr; /*RW; Range:[0x0, 0x3fff]*/ + CVI_U16 MinTransMapValue; /*RW; Range:[0x0, 0x1fff]*/ + CVI_BOOL DehazeLumaEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL DehazeSkinEnable; /*RW; Range:[0, 1]*/ + CVI_U8 AirLightMixWgt; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 DehazeWgt; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 TransMapScale; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 AirlightDiffWgt; /*RW; Range:[0x0, 0x10]*/ + CVI_U16 AirLightMax; /*RW; Range:[0x0, 0xfff]*/ + CVI_U16 AirLightMin; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 SkinCb; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SkinCr; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 DehazeLumaCOEFFI; /*RW; Range:[0x0, 0x7d0]*/ + CVI_U16 DehazeSkinCOEFFI; /*RW; Range:[0x0, 0x7d0]*/ + CVI_U8 TransMapWgtWgt; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 TransMapWgtSigma; /*RW; Range:[0x0, 0xff]*/ + ISP_DEHAZE_MANUAL_ATTR_S stManual; + ISP_DEHAZE_AUTO_ATTR_S stAuto; +} ISP_DEHAZE_ATTR_S; + +//----------------------------------------------------------------------------- +// CLUT +//----------------------------------------------------------------------------- +#define ISP_CLUT_LUT_LENGTH (4913) +typedef struct _ISP_CLUT_ATTR_S { + CVI_BOOL Enable; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U16 ClutR[ISP_CLUT_LUT_LENGTH]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 ClutG[ISP_CLUT_LUT_LENGTH]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 ClutB[ISP_CLUT_LUT_LENGTH]; /*RW; Range:[0x0, 0x3FF]*/ +} ISP_CLUT_ATTR_S; + +typedef struct _ISP_CLUT_SATURATION_MANUAL_ATTR_S { + CVI_U16 SatIn[4]; /*RW; Range:[0x0, 0x2000]*/ + CVI_U16 SatOut[4]; /*RW; Range:[0x0, 0x2000]*/ +} ISP_CLUT_SATURATION_MANUAL_ATTR_S; + +typedef struct _ISP_CLUT_SATURATION_AUTO_ATTR_S { + CVI_U16 SatIn[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x2000]*/ + CVI_U16 SatOut[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x2000]*/ +} ISP_CLUT_SATURATION_AUTO_ATTR_S; + +typedef struct _ISP_CLUT_SATURATION_ATTR_S { + CVI_BOOL Enable; + ISP_OP_TYPE_E enOpType; + ISP_CLUT_SATURATION_MANUAL_ATTR_S stManual; + ISP_CLUT_SATURATION_AUTO_ATTR_S stAuto; +} ISP_CLUT_SATURATION_ATTR_S; + +//----------------------------------------------------------------------------- +// DCI +//----------------------------------------------------------------------------- +typedef struct _ISP_DCI_MANUAL_ATTR_S { + CVI_U16 ContrastGain; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 BlcThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 WhtThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 BlcCtrl; /*RW; Range:[0x0, 0x200]*/ + CVI_U16 WhtCtrl; /*RW; Range:[0x0, 0x200]*/ + CVI_U16 DciGainMax; /*RW; Range:[0x0, 0x100]*/ +} ISP_DCI_MANUAL_ATTR_S; + +typedef struct _ISP_DCI_AUTO_ATTR_S { + CVI_U16 ContrastGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 BlcThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 WhtThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 BlcCtrl[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x200]*/ + CVI_U16 WhtCtrl[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x200]*/ + CVI_U16 DciGainMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ +} ISP_DCI_AUTO_ATTR_S; + +typedef struct _ISP_DCI_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + CVI_BOOL TuningMode; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 Method; /*RW; Range:[0x0, 0x1]*/ + CVI_U32 Speed; /*RW; Range:[0x0, 0x1f4]*/ + CVI_U16 DciStrength; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 DciGamma; /*RW; Range:[0x64, 0x320]*/ + CVI_U8 DciOffset; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 ToleranceY; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 Sensitivity; /*RW; Range:[0x0, 0xff]*/ + ISP_DCI_MANUAL_ATTR_S stManual; + ISP_DCI_AUTO_ATTR_S stAuto; +} ISP_DCI_ATTR_S; + +//----------------------------------------------------------------------------- +// LDCI +//----------------------------------------------------------------------------- +typedef struct _ISP_LDCI_GAUSS_COEF_ATTR_S { + CVI_U8 Wgt; /*RW; Range:[0x1, 0x80]*/ + CVI_U8 Sigma; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 Mean; /*RW; Range:[0x1, 0xFF]*/ +} ISP_LDCI_GAUSS_COEF_ATTR_S; + +typedef struct _ISP_LDCI_MANUAL_ATTR_S { + CVI_U16 LdciStrength; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 LdciRange; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 TprCoef; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U8 EdgeCoring; /*RW; Range:[0x0, 0x0]*/ + CVI_U8 LumaWgtMax; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 LumaWgtMin; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 VarMapMax; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 VarMapMin; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 UvGainMax; /*RW; Range:[0x0, 0x7F]*/ + CVI_U8 UvGainMin; /*RW; Range:[0x0, 0x7F]*/ + CVI_U8 BrightContrastHigh; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 BrightContrastLow; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 DarkContrastHigh; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 DarkContrastLow; /*RW; Range:[0x0, 0x64]*/ + ISP_LDCI_GAUSS_COEF_ATTR_S LumaPosWgt; +} ISP_LDCI_MANUAL_ATTR_S; + +typedef struct _ISP_LDCI_AUTO_ATTR_S { + CVI_U16 LdciStrength[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 LdciRange[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U16 TprCoef[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3FF]*/ + CVI_U8 EdgeCoring[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x0]*/ + CVI_U8 LumaWgtMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 LumaWgtMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 VarMapMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 VarMapMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 UvGainMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x7F]*/ + CVI_U8 UvGainMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x7F]*/ + CVI_U8 BrightContrastHigh[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 BrightContrastLow[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 DarkContrastHigh[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 DarkContrastLow[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x64]*/ + ISP_LDCI_GAUSS_COEF_ATTR_S LumaPosWgt[ISP_AUTO_ISO_STRENGTH_NUM]; +} ISP_LDCI_AUTO_ATTR_S; + +typedef struct _ISP_LDCI_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 GaussLPFSigma; /*RW; Range:[0x0, 0xFF]*/ + ISP_LDCI_MANUAL_ATTR_S stManual; + ISP_LDCI_AUTO_ATTR_S stAuto; +} ISP_LDCI_ATTR_S; + +//----------------------------------------------------------------------------- +// CA (CA/CP) +//----------------------------------------------------------------------------- +#define CA_LUT_NUM (256) + +typedef struct _ISP_CA_MANUAL_ATTR_S { + CVI_U16 ISORatio; /*RW; Range:[0x0, 0x7FF]*/ + CVI_U16 YRatioLut[CA_LUT_NUM]; /*RW; Range:[0x0, 0x7FF]*/ +} ISP_CA_MANUAL_ATTR_S; + +typedef struct _ISP_CA_AUTO_ATTR_S { + CVI_U16 ISORatio[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x7FF]*/ + CVI_U16 YRatioLut[CA_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x7FF]*/ +} ISP_CA_AUTO_ATTR_S; + +typedef struct _ISP_CA_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_BOOL CaCpMode; + CVI_U8 CPLutY[CA_LUT_NUM]; + CVI_U8 CPLutU[CA_LUT_NUM]; + CVI_U8 CPLutV[CA_LUT_NUM]; + ISP_CA_MANUAL_ATTR_S stManual; + ISP_CA_AUTO_ATTR_S stAuto; +} ISP_CA_ATTR_S; + +//----------------------------------------------------------------------------- +// CA2 +//----------------------------------------------------------------------------- +#define CA_LITE_NODE (6) + +typedef struct _ISP_CA2_MANUAL_ATTR_S { + CVI_U8 Ca2In[CA_LITE_NODE]; /*RW; Range:[0x0, 0xC0]*/ + CVI_U16 Ca2Out[CA_LITE_NODE]; /*RW; Range:[0x0, 0x7FF]*/ +} ISP_CA2_MANUAL_ATTR_S; + +typedef struct _ISP_CA2_AUTO_ATTR_S { + CVI_U8 Ca2In[CA_LITE_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xC0]*/ + CVI_U16 Ca2Out[CA_LITE_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x7FF]*/ +} ISP_CA2_AUTO_ATTR_S; + +typedef struct _ISP_CA2_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; + ISP_CA2_MANUAL_ATTR_S stManual; + ISP_CA2_AUTO_ATTR_S stAuto; +} ISP_CA2_ATTR_S; + +//----------------------------------------------------------------------------- +// PreSharpen +//----------------------------------------------------------------------------- +#define EE_LUT_NODE (4) +typedef struct _ISP_PRESHARPEN_MANUAL_ATTR_S { + CVI_U8 LumaAdpGain[SHARPEN_LUT_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 DeltaAdpGain[SHARPEN_LUT_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 LumaCorLutIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LumaCorLutOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorLutIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorLutOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorWgtLutIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorWgtLutOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 GlobalGain; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootGain; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 UnderShootGain; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 HFBlendWgt; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MFBlendWgt; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThrMax; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThrMin; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 HueShtCtrl[SHARPEN_LUT_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 SatShtGainIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SatShtGainOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x80]*/ +} ISP_PRESHARPEN_MANUAL_ATTR_S; + +typedef struct _ISP_PRESHARPEN_AUTO_ATTR_S { + CVI_U8 LumaAdpGain[SHARPEN_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 DeltaAdpGain[SHARPEN_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 LumaCorLutIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LumaCorLutOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorLutIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorLutOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorWgtLutIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorWgtLutOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 GlobalGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 UnderShootGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 HFBlendWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MFBlendWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThrMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThrMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 HueShtCtrl[SHARPEN_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 SatShtGainIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SatShtGainOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x80]*/ +} ISP_PRESHARPEN_AUTO_ATTR_S; + +typedef struct _ISP_PRESHARPEN_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0x0, 0x1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0xb]*/ + CVI_BOOL LumaAdpGainEn; /*RW; Range:[0x0, 0x1]*/ + CVI_BOOL DeltaAdpGainEn; /*RW; Range:[0x0, 0x1]*/ + CVI_BOOL NoiseSuppressEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL SatShtCtrlEn; /*RW; Range:[0, 1]*/ + CVI_BOOL SoftClampEnable; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 SoftClampUB; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SoftClampLB; /*RW; Range:[0x0, 0xff]*/ + ISP_PRESHARPEN_MANUAL_ATTR_S stManual; + ISP_PRESHARPEN_AUTO_ATTR_S stAuto; +} ISP_PRESHARPEN_ATTR_S; + +//----------------------------------------------------------------------------- +// Time-domain noise reduction (TNR) +//----------------------------------------------------------------------------- +typedef struct _ISP_TNR_MANUAL_ATTR_S { + CVI_U8 TnrStrength0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MapThdLow0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MapThdHigh0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MtDetectUnit; /*RW; Range:[0x3, 0x5]*/ + CVI_S16 BrightnessNoiseLevelLE; /*RW; Range:[0x1, 0x3ff]*/ + CVI_S16 BrightnessNoiseLevelSE; /*RW; Range:[0x1, 0x3ff]*/ + CVI_BOOL MtFiltMode; /*RW; Range:[0x0, 0x1]*/ + CVI_U16 MtFiltWgt; /*RW; Range:[0x0, 0x100]*/ +} ISP_TNR_MANUAL_ATTR_S; + +typedef struct _ISP_TNR_AUTO_ATTR_S { + CVI_U8 TnrStrength0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MapThdLow0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MapThdHigh0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MtDetectUnit[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x3, 0x5]*/ + CVI_S16 BrightnessNoiseLevelLE[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x1, 0x3ff]*/ + CVI_S16 BrightnessNoiseLevelSE[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x1, 0x3ff]*/ + CVI_BOOL MtFiltMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1]*/ + CVI_U16 MtFiltWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ +} ISP_TNR_AUTO_ATTR_S; + +typedef struct _ISP_TNR_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_BOOL TuningMode; /*RW; Range:[0, 1]*/ + CVI_BOOL TnrMtMode; /*RW; Range:[0, 1]*/ + CVI_BOOL YnrCnrSharpenMtMode; /*RW; Range:[0, 1]*/ + CVI_BOOL PreSharpenMtMode; /*RW; Range:[0, 1]*/ + CVI_U8 ChromaScalingDownMode; /*RW; Range:[0, 3]*/ + CVI_BOOL CompGainEnable; /*RW; Range:[0x0, 0x1]*/ + ISP_TNR_MANUAL_ATTR_S stManual; + ISP_TNR_AUTO_ATTR_S stAuto; +} ISP_TNR_ATTR_S; + +typedef struct _ISP_TNR_NOISE_MODEL_MANUAL_ATTR_S { + CVI_U8 RNoiseLevel0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseLevel0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseLevel0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 RNoiseLevel1; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseLevel1; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseLevel1; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 RNoiseHiLevel0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseHiLevel0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseHiLevel0; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 RNoiseHiLevel1; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseHiLevel1; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseHiLevel1; /*RW; Range:[0x0, 0xff]*/ +} ISP_TNR_NOISE_MODEL_MANUAL_ATTR_S; + +typedef struct _ISP_TNR_NOISE_MODEL_AUTO_ATTR_S { + CVI_U8 RNoiseLevel0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseLevel0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseLevel0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 RNoiseLevel1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseLevel1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseLevel1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 RNoiseHiLevel0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseHiLevel0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseHiLevel0[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 RNoiseHiLevel1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 GNoiseHiLevel1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 BNoiseHiLevel1[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_TNR_NOISE_MODEL_AUTO_ATTR_S; + +typedef struct _ISP_TNR_NOISE_MODEL_ATTR_S { + ISP_TNR_NOISE_MODEL_MANUAL_ATTR_S stManual; + ISP_TNR_NOISE_MODEL_AUTO_ATTR_S stAuto; +} ISP_TNR_NOISE_MODEL_ATTR_S; + +typedef struct _ISP_TNR_LUMA_MOTION_MANUAL_ATTR_S { + CVI_U16 L2mIn0[4]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 L2mOut0[4]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U16 L2mIn1[4]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 L2mOut1[4]; /*RW; Range:[0x0, 0x3f]*/ + CVI_BOOL MtLumaMode; /*RW; Range:[0x0, 0x1]*/ +} ISP_TNR_LUMA_MOTION_MANUAL_ATTR_S; + +typedef struct _ISP_TNR_LUMA_MOTION_AUTO_ATTR_S { + CVI_U16 L2mIn0[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 L2mOut0[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U16 L2mIn1[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xfff]*/ + CVI_U8 L2mOut1[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_BOOL MtLumaMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1]*/ +} ISP_TNR_LUMA_MOTION_AUTO_ATTR_S; + +typedef struct _ISP_TNR_LUMA_MOTION_ATTR_S { + ISP_TNR_LUMA_MOTION_MANUAL_ATTR_S stManual; + ISP_TNR_LUMA_MOTION_AUTO_ATTR_S stAuto; +} ISP_TNR_LUMA_MOTION_ATTR_S; + +typedef struct _ISP_TNR_GHOST_MANUAL_ATTR_S { + CVI_U8 PrvMotion0[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 PrtctWgt0[4]; /*RW; Range:[0x0, 0xf]*/ + CVI_U8 MotionHistoryStr; /*RW; Range:[0x0, 0xf]*/ +} ISP_TNR_GHOST_MANUAL_ATTR_S; + +typedef struct _ISP_TNR_GHOST_AUTO_ATTR_S { + CVI_U8 PrvMotion0[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 PrtctWgt0[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xf]*/ + CVI_U8 MotionHistoryStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xf]*/ +} ISP_TNR_GHOST_AUTO_ATTR_S; + +typedef struct _ISP_TNR_GHOST_ATTR_S { + ISP_TNR_GHOST_MANUAL_ATTR_S stManual; + ISP_TNR_GHOST_AUTO_ATTR_S stAuto; +} ISP_TNR_GHOST_ATTR_S; + +typedef struct _ISP_TNR_MT_PRT_MANUAL_ATTR_S { + CVI_U8 LowMtPrtLevelY; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtLevelU; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtLevelV; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtInY[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtInU[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtInV[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtOutY[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtOutU[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtOutV[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtAdvIn[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtAdvOut[4]; /*RW; Range:[0x0, 0xff]*/ +} ISP_TNR_MT_PRT_MANUAL_ATTR_S; + +typedef struct _ISP_TNR_MT_PRT_AUTO_ATTR_S { + CVI_U8 LowMtPrtLevelY[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtLevelU[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtLevelV[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtInY[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtInU[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtInV[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtOutY[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtOutU[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtOutV[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtAdvIn[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtAdvOut[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_TNR_MT_PRT_AUTO_ATTR_S; + +typedef struct _ISP_TNR_MT_PRT_ATTR_S { + CVI_BOOL LowMtPrtEn; /*RW; Range:[0, 1]*/ + CVI_BOOL LowMtLowPassEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL LowMtPrtAdvLumaEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL LowMtPrtAdvMode; /*RW; Range:[0, 1]*/ + CVI_U8 LowMtPrtAdvMax; /*RW; Range:[0, 0xff]*/ + CVI_BOOL LowMtPrtAdvDebugMode; /*RW; Range:[0, 1]*/ + CVI_U8 LowMtPrtAdvDebugIn[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LowMtPrtAdvDebugOut[4]; /*RW; Range:[0x0, 0xff]*/ + ISP_TNR_MT_PRT_MANUAL_ATTR_S stManual; + ISP_TNR_MT_PRT_AUTO_ATTR_S stAuto; +} ISP_TNR_MT_PRT_ATTR_S; + +typedef struct _ISP_TNR_MOTION_ADAPT_MANUAL_ATTR_S { + CVI_U8 AdaptNrLumaStrIn[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 AdaptNrLumaStrOut[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 AdaptNrChromaStrIn[4]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 AdaptNrChromaStrOut[4]; /*RW; Range:[0x0, 0xff]*/ +} ISP_TNR_MOTION_ADAPT_MANUAL_ATTR_S; + +typedef struct _ISP_TNR_MOTION_ADAPT_AUTO_ATTR_S { + CVI_U8 AdaptNrLumaStrIn[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 AdaptNrLumaStrOut[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 AdaptNrChromaStrIn[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 AdaptNrChromaStrOut[4][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_TNR_MOTION_ADAPT_AUTO_ATTR_S; + +typedef struct _ISP_TNR_MOTION_ADAP_ATTR_S { + ISP_TNR_MOTION_ADAPT_MANUAL_ATTR_S stManual; + ISP_TNR_MOTION_ADAPT_AUTO_ATTR_S stAuto; +} ISP_TNR_MOTION_ADAPT_ATTR_S; + +//----------------------------------------------------------------------------- +// Y domain noise reduction (YNR) +//----------------------------------------------------------------------------- +typedef struct _ISP_YNR_MANUAL_ATTR_S { + CVI_U8 WindowType; /*RW; Range:[0x0, 0xb]*/ + CVI_U8 DetailSmoothMode; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 NoiseSuppressStr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FilterType; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseCoringMax; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseCoringBase; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseCoringAdv; /*RW; Range:[0x0, 0xff]*/ +} ISP_YNR_MANUAL_ATTR_S; + +typedef struct _ISP_YNR_AUTO_ATTR_S { + CVI_U8 WindowType[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xb]*/ + CVI_U8 DetailSmoothMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 NoiseSuppressStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 FilterType[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseCoringMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseCoringBase[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseCoringAdv[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_YNR_AUTO_ATTR_S; + +typedef enum _ISP_YNR_TUNING_MODE_E { + YNR_RESULT = 8, + YNR_EDGE_SMOOTH_REGION = 11, +} ISP_YNR_TUNING_MODE_E; + +typedef struct _ISP_YNR_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_BOOL CoringParamEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL FiltModeEnable; /*RW; Range:[0, 1]*/ + CVI_U16 FiltMode; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0xf]*/ + ISP_YNR_MANUAL_ATTR_S stManual; + ISP_YNR_AUTO_ATTR_S stAuto; +} ISP_YNR_ATTR_S; + +typedef struct _ISP_YNR_MOTION_NR_MANUAL_ATTR_S { + CVI_U8 MotionCoringWgtMax; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 MotionYnrLut[16]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 MotionCoringWgt[16]; /*RW; Range:[0x0, 0x100]*/ +} ISP_YNR_MOTION_NR_MANUAL_ATTR_S; + +typedef struct _ISP_YNR_MOTION_NR_AUTO_ATTR_S { + CVI_U8 MotionCoringWgtMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 MotionYnrLut[16][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 MotionCoringWgt[16][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ +} ISP_YNR_MOTION_NR_AUTO_ATTR_S; + +typedef struct _ISP_YNR_MOTION_NR_ATTR_S { + ISP_YNR_MOTION_NR_MANUAL_ATTR_S stManual; + ISP_YNR_MOTION_NR_AUTO_ATTR_S stAuto; +} ISP_YNR_MOTION_NR_ATTR_S; + +typedef struct _ISP_YNR_FILTER_MANUAL_ATTR_S { + CVI_U8 VarThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 CoringWgtLF; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 CoringWgtHF; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 NonDirFiltStr; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 VhDirFiltStr; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 AaDirFiltStr; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 CoringWgtMax; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 FilterMode; /*RW; Range:[0x0, 0x3ff]*/ +} ISP_YNR_FILTER_MANUAL_ATTR_S; + +typedef struct _ISP_YNR_FILTER_AUTO_ATTR_S { + CVI_U8 VarThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 CoringWgtLF[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U16 CoringWgtHF[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x100]*/ + CVI_U8 NonDirFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 VhDirFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 AaDirFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 CoringWgtMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U16 FilterMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3ff]*/ +} ISP_YNR_FILTER_AUTO_ATTR_S; + +typedef struct _ISP_YNR_FILTER_ATTR_S { + ISP_YNR_FILTER_MANUAL_ATTR_S stManual; + ISP_YNR_FILTER_AUTO_ATTR_S stAuto; +} ISP_YNR_FILTER_ATTR_S; + +//----------------------------------------------------------------------------- +// UV domain noise reduction (CNR) +//----------------------------------------------------------------------------- +#define CNR_MOTION_LUT_NUM (16) + +typedef struct _ISP_CNR_MANUAL_ATTR_S { + CVI_U8 CnrStr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseSuppressStr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseSuppressGain; /*RW; Range:[0x1, 0x8]*/ + CVI_U8 FilterType; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 MotionNrStr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LumaWgt; /*RW; Range:[0x0, 0x8]*/ + CVI_U8 DetailSmoothMode; /*RW; Range:[0x0, 0x1]*/ +} ISP_CNR_MANUAL_ATTR_S; + +typedef struct _ISP_CNR_AUTO_ATTR_S { + CVI_U8 CnrStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseSuppressStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 NoiseSuppressGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x1, 0x8]*/ + CVI_U8 FilterType[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1f]*/ + CVI_U8 MotionNrStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LumaWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x8]*/ + CVI_U8 DetailSmoothMode[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x1]*/ +} ISP_CNR_AUTO_ATTR_S; + +typedef struct _ISP_CNR_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + ISP_CNR_MANUAL_ATTR_S stManual; + ISP_CNR_AUTO_ATTR_S stAuto; +} ISP_CNR_ATTR_S; + +typedef struct _ISP_CNR_MOTION_NR_MANUAL_ATTR_S { + CVI_U8 MotionCnrCoringLut[CNR_MOTION_LUT_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCnrStrLut[CNR_MOTION_LUT_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_CNR_MOTION_NR_MANUAL_ATTR_S; + +typedef struct _ISP_CNR_MOTION_NR_AUTO_ATTR_S { + CVI_U8 MotionCnrCoringLut[CNR_MOTION_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCnrStrLut[CNR_MOTION_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ +} ISP_CNR_MOTION_NR_AUTO_ATTR_S; + +typedef struct _ISP_CNR_MOTION_NR_ATTR_S { + CVI_BOOL MotionCnrEnable; /*RW; Range:[0, 1]*/ + ISP_CNR_MOTION_NR_MANUAL_ATTR_S stManual; + ISP_CNR_MOTION_NR_AUTO_ATTR_S stAuto; +} ISP_CNR_MOTION_NR_ATTR_S; + +//----------------------------------------------------------------------------- +// CAC +//----------------------------------------------------------------------------- +typedef struct _ISP_CAC_MANUAL_ATTR_S { + CVI_U8 DePurpleStr; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeGlobalGain; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeCoring; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeStrMin; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeStrMax; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleCbStr; /*RW; Range:[0x0, 0x8]*/ + CVI_U8 DePurpleCrStr; /*RW; Range:[0x0, 0x8]*/ + CVI_U8 DePurpleStrMaxRatio; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurpleStrMinRatio; /*RW; Range:[0x0, 0x40]*/ +} ISP_CAC_MANUAL_ATTR_S; + +typedef struct _ISP_CAC_AUTO_ATTR_S { + CVI_U8 DePurpleStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeGlobalGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeCoring[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeStrMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 EdgeStrMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 DePurpleCbStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x8]*/ + CVI_U8 DePurpleCrStr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x8]*/ + CVI_U8 DePurpleStrMaxRatio[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x40]*/ + CVI_U8 DePurpleStrMinRatio[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x40]*/ +} ISP_CAC_AUTO_ATTR_S; + +typedef struct _ISP_CAC_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 PurpleDetRange; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 PurpleCb; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 PurpleCr; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 PurpleCb2; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 PurpleCr2; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 PurpleCb3; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 PurpleCr3; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 GreenCb; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 GreenCr; /*RW; Range:[0x0, 0xFF]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0x2]*/ + CVI_U8 EdgeGainIn[3]; /*RW; Range:[0x0, 0x10]*/ + CVI_U8 EdgeGainOut[3]; /*RW; Range:[0x0, 0x20]*/ + ISP_CAC_MANUAL_ATTR_S stManual; + ISP_CAC_AUTO_ATTR_S stAuto; +} ISP_CAC_ATTR_S; + +//----------------------------------------------------------------------------- +// Sharpen +//----------------------------------------------------------------------------- +#define EE_LUT_NODE (4) + +typedef struct _ISP_SHARPEN_MANUAL_ATTR_S { + CVI_U8 LumaAdpGain[SHARPEN_LUT_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 DeltaAdpGain[SHARPEN_LUT_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 LumaCorLutIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LumaCorLutOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorLutIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorLutOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorWgtLutIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorWgtLutOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 GlobalGain; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootGain; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 UnderShootGain; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 HFBlendWgt; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MFBlendWgt; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThr; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThrMax; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThrMin; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 HueShtCtrl[SHARPEN_LUT_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 SatShtGainIn[EE_LUT_NODE]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SatShtGainOut[EE_LUT_NODE]; /*RW; Range:[0x0, 0x80]*/ +} ISP_SHARPEN_MANUAL_ATTR_S; + +typedef struct _ISP_SHARPEN_AUTO_ATTR_S { + CVI_U8 LumaAdpGain[SHARPEN_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 DeltaAdpGain[SHARPEN_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 LumaCorLutIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 LumaCorLutOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorLutIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorLutOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x20]*/ + CVI_U8 MotionCorWgtLutIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionCorWgtLutOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 GlobalGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 UnderShootGain[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 HFBlendWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MFBlendWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThr[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 OverShootThrMax[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 UnderShootThrMin[ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 MotionShtGainOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x80]*/ + CVI_U8 HueShtCtrl[SHARPEN_LUT_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x3f]*/ + CVI_U8 SatShtGainIn[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SatShtGainOut[EE_LUT_NODE][ISP_AUTO_ISO_STRENGTH_NUM]; /*RW; Range:[0x0, 0x80]*/ +} ISP_SHARPEN_AUTO_ATTR_S; + +typedef struct _ISP_SHARPEN_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0x0, 0x1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 TuningMode; /*RW; Range:[0x0, 0xb]*/ + CVI_BOOL LumaAdpGainEn; /*RW; Range:[0x0, 0x1]*/ + CVI_BOOL DeltaAdpGainEn; /*RW; Range:[0x0, 0x1]*/ + CVI_BOOL NoiseSuppressEnable; /*RW; Range:[0, 1]*/ + CVI_BOOL SatShtCtrlEn; /*RW; Range:[0, 1]*/ + CVI_BOOL SoftClampEnable; /*RW; Range:[0x0, 0x1]*/ + CVI_U8 SoftClampUB; /*RW; Range:[0x0, 0xff]*/ + CVI_U8 SoftClampLB; /*RW; Range:[0x0, 0xff]*/ + ISP_SHARPEN_MANUAL_ATTR_S stManual; + ISP_SHARPEN_AUTO_ATTR_S stAuto; +} ISP_SHARPEN_ATTR_S; + +//----------------------------------------------------------------------------- +// Y Contrast +//----------------------------------------------------------------------------- +typedef struct _ISP_YCONTRAST_MANUAL_ATTR_S { + CVI_U8 ContrastLow; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 ContrastHigh; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 CenterLuma; /*RW; Range:[0x0, 0x40]*/ +} ISP_YCONTRAST_MANUAL_ATTR_S; + +typedef struct _ISP_YCONTRAST_AUTO_ATTR_S { + CVI_U8 ContrastLow[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 ContrastHigh[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x64]*/ + CVI_U8 CenterLuma[ISP_AUTO_LV_NUM]; /*RW; Range:[0x0, 0x40]*/ +} ISP_YCONTRAST_AUTO_ATTR_S; + +typedef struct _ISP_YCONTRAST_ATTR_S { + CVI_BOOL Enable; /*RW; Range:[0, 1]*/ + ISP_OP_TYPE_E enOpType; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + ISP_YCONTRAST_MANUAL_ATTR_S stManual; + ISP_YCONTRAST_AUTO_ATTR_S stAuto; +} ISP_YCONTRAST_ATTR_S; + +//----------------------------------------------------------------------------- +// Mono +//----------------------------------------------------------------------------- +typedef struct _ISP_MONO_ATTR_S { + CVI_BOOL Enable; + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ +} ISP_MONO_ATTR_S; + +//----------------------------------------------------------------------------- +// DIS +//----------------------------------------------------------------------------- +typedef enum _ISP_DIS_MODE_E { + DIS_MODE_2_DOF_GME = 0, /* Only use with GME in 2 dof */ + DIS_MODE_DEBUG, + DIS_MODE_DOF_BUTT, +} DIS_MODE_E; + +typedef enum _ISP_DIS_MOTION_LEVEL_E { + DIS_MOTION_LEVEL_NORMAL = 1, + DIS_MOTION_LEVEL_BUTT +} DIS_MOTION_LEVEL_E; + +typedef struct _ISP_DIS_CONFIG_S { + DIS_MODE_E mode; + DIS_MOTION_LEVEL_E motionLevel; + CVI_U32 cropRatio; /*RW; Range:[0x32, 0x62] */ +} ISP_DIS_CONFIG_S; + +typedef struct _ISP_DIS_ATTR_S { + CVI_BOOL enable; + CVI_U32 movingSubjectLevel; /*RW; Range:[0x0, 0x6] */ + CVI_U32 horizontalLimit; /*RW; Range:[0x0, 0x3E8] */ + CVI_U32 verticalLimit; /*RW; Range:[0x0, 0x3E8] */ + CVI_BOOL stillCrop; +} ISP_DIS_ATTR_S; + +typedef struct _ISP_INNER_STATE_INFO_S { + CVI_U32 blcOffsetR; + CVI_U32 blcOffsetGr; + CVI_U32 blcOffsetGb; + CVI_U32 blcOffsetB; + CVI_U32 blcGainR; + CVI_U32 blcGainGr; + CVI_U32 blcGainGb; + CVI_U32 blcGainB; + CVI_S32 ccm[9]; + CVI_U16 drcGlobalToneBinNum; + CVI_U16 drcGlobalToneBinSEStep; + CVI_U32 drcGlobalTone[LTM_GLOBAL_CURVE_NODE_NUM]; + CVI_U32 drcDarkTone[LTM_DARK_CURVE_NODE_NUM]; + CVI_U32 drcBrightTone[LTM_BRIGHT_CURVE_NODE_NUM]; + CVI_BOOL bWDRSwitchFinish; + // For 2TO1/3TO1/4TO1 use. + CVI_U32 u32WDRExpRatioActual[ISP_WDR_FRAME_IDX_SIZE]; + ISP_MESH_SHADING_GAIN_LUT_S mlscGainTable; +} ISP_INNER_STATE_INFO_S; + +typedef struct _ISP_VC_ATTR_S { + CVI_U8 UpdateInterval; /*RW; Range:[0x1, 0xFF]*/ + CVI_U8 MotionThreshold; /*RW; Range:[0x0, 0xff] */ +} ISP_VC_ATTR_S; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_COMM_ISP_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_comm_sns.h b/freertos/cvitek/install/include/common/cvi_comm_sns.h new file mode 100644 index 000000000..885e92dba --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_comm_sns.h @@ -0,0 +1,96 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_common_sns.h + * Description: + */ + +#ifndef _CVI_COMM_SNS_H_ +#define _CVI_COMM_SNS_H_ + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#include +#include +#include "cvi_debug.h" +#include "cvi_comm_isp.h" + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ + +#define NOISE_PROFILE_CHANNEL_NUM 4 +#define NOISE_PROFILE_LEVEL_NUM 2 +#define NOISE_PROFILE_ISO_NUM 16 +#define USE_USER_SEN_DRIVER 1 + + +typedef struct _ISP_CMOS_SENSOR_IMAGE_MODE_S { + CVI_U16 u16Width; + CVI_U16 u16Height; + CVI_FLOAT f32Fps; + CVI_U8 u8SnsMode; +} ISP_CMOS_SENSOR_IMAGE_MODE_S; + +typedef struct _ISP_CMOS_BLACK_LEVEL_S { + CVI_BOOL bUpdate; + ISP_BLACK_LEVEL_ATTR_S blcAttr; +} ISP_CMOS_BLACK_LEVEL_S; + +typedef struct _ISP_SNS_ATTR_INFO_S { + CVI_U32 eSensorId; +} ISP_SNS_ATTR_INFO_S; + +typedef struct cviISP_CMOS_NOISE_CALIBRATION_S { + CVI_FLOAT CalibrationCoef[NOISE_PROFILE_ISO_NUM][NOISE_PROFILE_CHANNEL_NUM][NOISE_PROFILE_LEVEL_NUM]; +} ISP_CMOS_NOISE_CALIBRATION_S; + +typedef struct _ISP_CMOS_DEFAULT_S { + ISP_CMOS_NOISE_CALIBRATION_S stNoiseCalibration; +} ISP_CMOS_DEFAULT_S; + +typedef struct _ISP_SENSOR_EXP_FUNC_S { + CVI_VOID (*pfn_cmos_sensor_init)(VI_PIPE ViPipe); + CVI_VOID (*pfn_cmos_sensor_exit)(VI_PIPE ViPipe); + CVI_VOID (*pfn_cmos_sensor_global_init)(VI_PIPE ViPipe); + CVI_S32 (*pfn_cmos_set_image_mode)(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S *pstSensorImageMode); + CVI_S32 (*pfn_cmos_set_wdr_mode)(VI_PIPE ViPipe, CVI_U8 u8Mode); + + /* the algs get data which is associated with sensor, except 3a */ + CVI_S32 (*pfn_cmos_get_isp_default)(VI_PIPE ViPipe, ISP_CMOS_DEFAULT_S *pstDef); + CVI_S32 (*pfn_cmos_get_isp_black_level)(VI_PIPE ViPipe, ISP_CMOS_BLACK_LEVEL_S *pstBlackLevel); + CVI_S32 (*pfn_cmos_get_sns_reg_info)(VI_PIPE ViPipe, ISP_SNS_SYNC_INFO_S *pstSnsRegsInfo); + CVI_S32 (*pfn_cmos_set_sns_reg_info)(VI_PIPE ViPipe, ISP_SNS_SYNC_INFO_S *pstSnsRegsInfo); + + /* the function of sensor set pixel detect */ + //CVI_VOID (*pfn_cmos_set_pixel_detect)(VI_PIPE ViPipe, bool bEnable); +} ISP_SENSOR_EXP_FUNC_S; + +typedef struct bmISP_SENSOR_REGISTER_S { + ISP_SENSOR_EXP_FUNC_S stSnsExp; +} ISP_SENSOR_REGISTER_S; + +typedef enum _MCLK_FREQ_E { + MCLK_FREQ_NONE = 0, + MCLK_FREQ_37P125M, + MCLK_FREQ_25M, + MCLK_FREQ_27M, + MCLK_FREQ_NUM +} MCLK_FREQ_E; + +typedef struct _SNS_MCLK_S { + CVI_U32 u8Cam; + MCLK_FREQ_E enFreq; +} SNS_MCLK_S; + +// -------- If you want to change these interfaces, please contact the isp team. -------- + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif + +#endif /* _CVI_COMM_SNS_H_ */ diff --git a/freertos/cvitek/install/include/common/cvi_comm_sys.h b/freertos/cvitek/install/include/common/cvi_comm_sys.h new file mode 100644 index 000000000..f2d09ed76 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_comm_sys.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_comm_sys.h + * Description: + * The common sys type defination. + */ + +#ifndef __CVI_COMM_SYS_H__ +#define __CVI_COMM_SYS_H__ + +// #include +// #include "cvi_errno.h" +// #include "cvi_debug.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + + +// #define BIND_DEST_MAXNUM 32 +// #define BIND_NODE_MAXNUM 64 + +// typedef struct _MMF_BIND_DEST_S { +// CVI_U32 u32Num; +// MMF_CHN_S astMmfChn[BIND_DEST_MAXNUM]; +// } MMF_BIND_DEST_S; + +// typedef struct _BIND_NODE_S { +// CVI_BOOL bUsed; +// MMF_CHN_S src; +// MMF_BIND_DEST_S dsts; +// } BIND_NODE_S; + +typedef enum _VI_VPSS_MODE_E { + VI_OFFLINE_VPSS_OFFLINE = 0, + VI_OFFLINE_VPSS_ONLINE, + VI_ONLINE_VPSS_OFFLINE, + VI_ONLINE_VPSS_ONLINE, + VI_BE_OFL_POST_OL_VPSS_OFL, + VI_BE_OFL_POST_OFL_VPSS_OFL, + VI_BE_OL_POST_OFL_VPSS_OFL, + VI_BE_OL_POST_OL_VPSS_OFL, + VI_VPSS_MODE_BUTT +} VI_VPSS_MODE_E; + + +// typedef struct _VI_VPSS_MODE_S { +// VI_VPSS_MODE_E aenMode[VI_MAX_PIPE_NUM]; +// } VI_VPSS_MODE_S; + +// typedef enum _VPSS_MODE_E { +// VPSS_MODE_SINGLE = 0, +// VPSS_MODE_DUAL, +// VPSS_MODE_RGNEX, +// VPSS_MODE_BUTT +// } VPSS_MODE_E; + +// typedef enum _VPSS_INPUT_E { +// VPSS_INPUT_MEM = 0, +// VPSS_INPUT_ISP, +// VPSS_INPUT_BUTT +// } VPSS_INPUT_E; + + +// * enMode: decide vpss work as 1/2 device. +// * aenInput: decide the input of each vpss device. +// * ViPipe: only meaningful if enInput is ISP. + +// typedef struct _VPSS_MODE_S { +// VPSS_MODE_E enMode; +// VPSS_INPUT_E aenInput[VPSS_IP_NUM]; +// VI_PIPE ViPipe[VPSS_IP_NUM]; +// } VPSS_MODE_S; + +// typedef struct _CVI_TDMA_2D_S { +// uint64_t paddr_src; +// uint64_t paddr_dst; +// uint32_t w_bytes; +// uint32_t h; +// uint32_t stride_bytes_src; +// uint32_t stride_bytes_dst; +// } CVI_TDMA_2D_S; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_COMM_SYS_H__ */ + diff --git a/freertos/cvitek/install/include/common/cvi_comm_vi.h b/freertos/cvitek/install/include/common/cvi_comm_vi.h new file mode 100644 index 000000000..56b9dcd69 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_comm_vi.h @@ -0,0 +1,830 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_comm_vi.h + * Description: + * Common video input definitions. + */ + +#ifndef __CVI_COMM_VI_H__ +#define __CVI_COMM_VI_H__ + +#include +#include +//#include "cvi_comm_gdc.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + + +#define VI_MAX_ADCHN_NUM (4UL) + +#define VI_COMPMASK_NUM (2UL) +#define VI_PRO_MAX_FRAME_NUM (8UL) +#define VI_SHARPEN_GAIN_NUM 32 +#define VI_AUTO_ISO_STRENGTH_NUM 16 + +#define VI_INVALID_FRMRATE (-1) +#define VI_CHN0 0 +#define VI_CHN1 1 +#define VI_CHN2 2 +#define VI_CHN3 3 +#define VI_INVALID_CHN -1 + +#define VI_MAX_VC_NUM 4 + +typedef struct _VI_LOW_DELAY_INFO_S { + CVI_BOOL bEnable; /* RW; Low delay enable. */ + CVI_U32 u32LineCnt; /* RW; Range: [32, 16384]; Low delay shoreline. */ +} VI_LOW_DELAY_INFO_S; + +/* Information of raw data cmpresss param */ +typedef struct _VI_CMP_PARAM_S { + CVI_U8 au8CmpParam[VI_CMP_PARAM_SIZE]; +} VI_CMP_PARAM_S; + +typedef enum _VI_USERPIC_MODE_E { + VI_USERPIC_MODE_PIC = 0, /* YUV picture */ + VI_USERPIC_MODE_BGC, /* Background picture only with a color */ + VI_USERPIC_MODE_BUTT, +} VI_USERPIC_MODE_E; + +typedef struct _VI_USERPIC_BGC_S { + CVI_U32 u32BgColor; +} VI_USERPIC_BGC_S; + +typedef struct _VI_USERPIC_ATTR_S { + VI_USERPIC_MODE_E enUsrPicMode; /* User picture mode */ + union { + VIDEO_FRAME_INFO_S stUsrPicFrm; /* Information about a YUV picture */ + VI_USERPIC_BGC_S stUsrPicBg; /* Information about a background picture only with a color */ + } unUsrPic; +} VI_USERPIC_ATTR_S; + +/* interface mode of video input */ +typedef enum _VI_INTF_MODE_E { + VI_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */ + VI_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */ + VI_MODE_DIGITAL_CAMERA, /* digatal camera mode */ + VI_MODE_BT1120_STANDARD, /* BT.1120 progressive mode */ + VI_MODE_BT1120_INTERLEAVED, /* BT.1120 interstage mode */ + VI_MODE_MIPI, /* MIPI RAW mode */ + VI_MODE_MIPI_YUV420_NORMAL, /* MIPI YUV420 normal mode */ + VI_MODE_MIPI_YUV420_LEGACY, /* MIPI YUV420 legacy mode */ + VI_MODE_MIPI_YUV422, /* MIPI YUV422 mode */ + VI_MODE_LVDS, /* LVDS mode */ + VI_MODE_HISPI, /* HiSPi mode */ + VI_MODE_SLVS, /* SLVS mode */ + + VI_MODE_BUTT +} VI_INTF_MODE_E; + +/* Input mode */ +typedef enum _VI_INPUT_MODE_E { + VI_INPUT_MODE_BT656 = 0, /* ITU-R BT.656 YUV4:2:2 */ + VI_INPUT_MODE_BT601, /* ITU-R BT.601 YUV4:2:2 */ + VI_INPUT_MODE_DIGITAL_CAMERA, /* digatal camera mode */ + VI_INPUT_MODE_INTERLEAVED, /* interstage mode */ + VI_INPUT_MODE_MIPI, /* MIPI mode */ + VI_INPUT_MODE_LVDS, /* LVDS mode */ + VI_INPUT_MODE_HISPI, /* HiSPi mode */ + VI_INPUT_MODE_SLVS, /* SLVS mode */ + + VI_INPUT_MODE_BUTT +} VI_INPUT_MODE_E; + +/* Work mode */ +typedef enum _VI_WORK_MODE_E { + VI_WORK_MODE_1Multiplex = 0, /* 1 Multiplex mode */ + VI_WORK_MODE_2Multiplex, /* 2 Multiplex mode */ + VI_WORK_MODE_3Multiplex, /* 3 Multiplex mode */ + VI_WORK_MODE_4Multiplex, /* 4 Multiplex mode */ + + VI_WORK_MODE_BUTT +} VI_WORK_MODE_E; + +/* whether an input picture is interlaced or progressive */ +typedef enum _VI_SCAN_MODE_E { + VI_SCAN_INTERLACED = 0, /* interlaced mode */ + VI_SCAN_PROGRESSIVE, /* progressive mode */ + + VI_SCAN_BUTT +} VI_SCAN_MODE_E; + +/* Sequence of YUV data + * + * VI_DATA_SEQ_VUVU: The input sequence of the second component(only contains u and v) in BT.1120 mode is VUVU + * VI_DATA_SEQ_UVUV: The input sequence of the second component(only contains u and v) in BT.1120 mode is UVUV + */ +typedef enum _VI_YUV_DATA_SEQ_E { + VI_DATA_SEQ_VUVU = 0, + VI_DATA_SEQ_UVUV, + + VI_DATA_SEQ_UYVY, /* The input sequence of YUV is UYVY */ + VI_DATA_SEQ_VYUY, /* The input sequence of YUV is VYUY */ + VI_DATA_SEQ_YUYV, /* The input sequence of YUV is YUYV */ + VI_DATA_SEQ_YVYU, /* The input sequence of YUV is YVYU */ + + VI_DATA_SEQ_BUTT +} VI_YUV_DATA_SEQ_E; + +/* Clock edge mode */ +typedef enum _VI_CLK_EDGE_E { + VI_CLK_EDGE_SINGLE_UP = 0, /* single-edge mode and in rising edge */ + VI_CLK_EDGE_SINGLE_DOWN, /* single-edge mode and in falling edge */ + + VI_CLK_EDGE_BUTT +} VI_CLK_EDGE_E; + +/* Component mode */ +typedef enum _VI_COMPONENT_MODE_E { + VI_COMPONENT_MODE_SINGLE = 0, /* single component mode */ + VI_COMPONENT_MODE_DOUBLE, /* double component mode */ + + VI_COMPONENT_MODE_BUTT +} VI_COMPONENT_MODE_E; + +/* Y/C composite or separation mode */ +typedef enum _VI_COMBINE_MODE_E { + VI_COMBINE_COMPOSITE = 0, /* Composite mode */ + VI_COMBINE_SEPARATE, /* Separate mode */ + + VI_COMBINE_BUTT +} VI_COMBINE_MODE_E; + +/* Attribute of the vertical synchronization signal */ +typedef enum _VI_VSYNC_E { + VI_VSYNC_FIELD = 0, /* Field/toggle mode:a signal reversal means a new frame or a field */ + VI_VSYNC_PULSE, /* Pusle/effective mode:a pusle or an effective signal means a new frame or a field */ + + VI_VSYNC_BUTT +} VI_VSYNC_E; + +/* Polarity of the vertical synchronization signal + * + * VI_VSYNC_NEG_HIGH: if VIU_VSYNC_E = VIU_VSYNC_FIELD,then the v-sync signal of even field is high-level, + * if VIU_VSYNC_E = VIU_VSYNC_PULSE,then the v-sync pulse is positive pulse. + * VI_VSYNC_NEG_LOW: if VIU_VSYNC_E = VIU_VSYNC_FIELD,then the v-sync signal of even field is low-level, + * if VIU_VSYNC_E = VIU_VSYNC_PULSE,then the v-sync pulse is negative pulse. + */ +typedef enum _VI_VSYNC_NEG_E { + VI_VSYNC_NEG_HIGH = 0, + VI_VSYNC_NEG_LOW, + VI_VSYNC_NEG_BUTT +} VI_VSYNC_NEG_E; + +/* Attribute of the horizontal synchronization signal */ +typedef enum _VI_HSYNC_E { + VI_HSYNC_VALID_SINGNAL = 0, /* the h-sync is valid signal mode */ + VI_HSYNC_PULSE, /* the h-sync is pulse mode, a new pulse means the beginning of a new line */ + + VI_HSYNC_BUTT +} VI_HSYNC_E; + +/* Polarity of the horizontal synchronization signal + * + * VI_HSYNC_NEG_HIGH: if VI_HSYNC_E = VI_HSYNC_VALID_SINGNAL,then the valid h-sync signal is high-level; + * if VI_HSYNC_E = VI_HSYNC_PULSE,then the h-sync pulse is positive pulse. + * VI_HSYNC_NEG_LOW: if VI_HSYNC_E = VI_HSYNC_VALID_SINGNAL,then the valid h-sync signal is low-level; + * if VI_HSYNC_E = VI_HSYNC_PULSE,then the h-sync pulse is negative pulse + */ +typedef enum _VI_HSYNC_NEG_E { + VI_HSYNC_NEG_HIGH = 0, + VI_HSYNC_NEG_LOW, + VI_HSYNC_NEG_BUTT +} VI_HSYNC_NEG_E; + +/* Attribute of the valid vertical synchronization signal + * + * VI_VSYNC_NORM_PULSE: the v-sync is pusle mode, a pusle means a new frame or field + * VI_VSYNC_VALID_SIGNAL: the v-sync is effective mode, a effective signal means a new frame or field + */ +typedef enum _VI_VSYNC_VALID_E { + VI_VSYNC_NORM_PULSE = 0, + VI_VSYNC_VALID_SIGNAL, + + VI_VSYNC_VALID_BUTT +} VI_VSYNC_VALID_E; + +/* Polarity of the valid vertical synchronization signal + * + * VI_VSYNC_VALID_NEG_HIGH: if VI_VSYNC_VALID_E = VI_VSYNC_NORM_PULSE,a positive pulse means v-sync pulse; + * if VI_VSYNC_VALID_E = VI_VSYNC_VALID_SIGNAL,the valid v-sync signal is high-level + * VI_VSYNC_VALID_NEG_LOW: if VI_VSYNC_VALID_E = VI_VSYNC_NORM_PULSE,a negative pulse means v-sync pulse + * if VI_VSYNC_VALID_E = VI_VSYNC_VALID_SIGNAL,the valid v-sync signal is low-level + */ +typedef enum _VI_VSYNC_VALID_NEG_E { + VI_VSYNC_VALID_NEG_HIGH = 0, + VI_VSYNC_VALID_NEG_LOW, + VI_VSYNC_VALID_NEG_BUTT +} VI_VSYNC_VALID_NEG_E; + +typedef enum _VI_STATE { + VI_RUNNING, + VI_SUSPEND, + VI_MAX, +} VI_STATE_E; + +/* Blank information of the input timing + * + * u32VsyncVfb: RW;Vertical front blanking height of one frame or odd-field frame picture + * u32VsyncVact: RW;Vertical effetive width of one frame or odd-field frame picture + * u32VsyncVbb: RW;Vertical back blanking height of one frame or odd-field frame picture + * u32VsyncVbfb: RW;Even-field vertical front blanking height when input mode is interlace + * (invalid when progressive input mode) + * u32VsyncVbact: RW;Even-field vertical effetive width when input mode is interlace + * (invalid when progressive input mode) + * u32VsyncVbbb: RW;Even-field vertical back blanking height when input mode is interlace + * (invalid when progressive input mode) + */ +typedef struct _VI_TIMING_BLANK_S { + CVI_U32 u32HsyncHfb; /* RW;Horizontal front blanking width */ + CVI_U32 u32HsyncAct; /* RW;Horizontal effetive width */ + CVI_U32 u32HsyncHbb; /* RW;Horizontal back blanking width */ + CVI_U32 u32VsyncVfb; + CVI_U32 u32VsyncVact; + CVI_U32 u32VsyncVbb; + CVI_U32 u32VsyncVbfb; + CVI_U32 u32VsyncVbact; + CVI_U32 u32VsyncVbbb; +} VI_TIMING_BLANK_S; + +/* synchronization information about the BT.601 or DC timing */ +typedef struct _VI_SYNC_CFG_S { + VI_VSYNC_E enVsync; + VI_VSYNC_NEG_E enVsyncNeg; + VI_HSYNC_E enHsync; + VI_HSYNC_NEG_E enHsyncNeg; + VI_VSYNC_VALID_E enVsyncValid; + VI_VSYNC_VALID_NEG_E enVsyncValidNeg; + VI_TIMING_BLANK_S stTimingBlank; +} VI_SYNC_CFG_S; + +/* the highest bit of the BT.656 timing reference code */ +typedef enum _VI_BT656_FIXCODE_E { + VI_BT656_FIXCODE_1 = 0, /* The highest bit of the EAV/SAV data over the BT.656 protocol is always 1. */ + VI_BT656_FIXCODE_0, /* The highest bit of the EAV/SAV data over the BT.656 protocol is always 0. */ + + VI_BT656_FIXCODE_BUTT +} VI_BT656_FIXCODE_E; + +/* Polarity of the field indicator bit (F) of the BT.656 timing reference code */ +typedef enum _VI_BT656_FIELD_POLAR_E { + VI_BT656_FIELD_POLAR_STD = 0, /* the standard BT.656 mode,the first filed F=0,the second filed F=1 */ + VI_BT656_FIELD_POLAR_NSTD, /* the non-standard BT.656 mode,the first filed F=1,the second filed F=0 */ + + VI_BT656_FIELD_POLAR_BUTT +} VI_BT656_FIELD_POLAR_E; + +/* synchronization information about the BT.656 */ +typedef struct _VI_BT656_SYNC_CFG_S { + VI_BT656_FIXCODE_E enFixCode; + VI_BT656_FIELD_POLAR_E enFieldPolar; +} VI_BT656_SYNC_CFG_S; + +/* Input data type */ +typedef enum _VI_DATA_TYPE_E { + VI_DATA_TYPE_YUV = 0, + VI_DATA_TYPE_RGB, + VI_DATA_TYPE_YUV_EARLY, + + VI_DATA_TYPE_BUTT +} VI_DATA_TYPE_E; + +/* Attribute of wdr */ +typedef struct _VI_WDR_ATTR_S { + WDR_MODE_E enWDRMode; /* RW; WDR mode.*/ + CVI_U32 u32CacheLine; /* RW; WDR cache line.*/ +} VI_WDR_ATTR_S; + +/* the extended attributes of VI device + * + * enInputDataType: RW;RGB: CSC-709 or CSC-601, PT YUV444 disable; YUV: default yuv CSC coef PT YUV444 enable. + */ +typedef struct _VI_DEV_ATTR_EX_S { + VI_INPUT_MODE_E enInputMode; /* RW;Input mode */ + VI_WORK_MODE_E enWorkMode; /* RW; Work mode */ + + VI_COMBINE_MODE_E enCombineMode; /* RW;Y/C composite or separation mode */ + VI_COMPONENT_MODE_E enComponentMode; /* RW;Component mode (single-component or dual-component) */ + VI_CLK_EDGE_E enClkEdge; /* RW;Clock edge mode (sampling on the rising or falling edge) */ + + CVI_U32 au32ComponentMask[VI_COMPMASK_NUM]; /* RW;Component mask */ + + VI_SCAN_MODE_E enScanMode; /* RW;Input scanning mode (progressive or interlaced) */ + CVI_S32 as32AdChnId[VI_MAX_ADCHN_NUM]; /* RW;AD channel ID. Typically, the default value -1 is recommended */ + + VI_YUV_DATA_SEQ_E enDataSeq; /* RW;Input data sequence (only the YUV format is supported) */ + VI_SYNC_CFG_S stSynCfg; /* RW;Sync timing. This member must be configured in BT.601 mode or DC mode */ + + VI_BT656_SYNC_CFG_S stBT656SynCfg; /* RW;Sync timing. This member must be configured in BT.656 mode */ + + VI_DATA_TYPE_E enInputDataType; + + CVI_BOOL bDataReverse; /* RW;Data reverse */ + + SIZE_S stSize; /* RW;Input size */ + + VI_WDR_ATTR_S stWDRAttr; /* RW;Attribute of WDR */ +} VI_DEV_ATTR_EX_S; + +/* The attributes of a VI device + * + * enInputDataType: RW;RGB: CSC-709 or CSC-601, PT YUV444 disable; YUV: default yuv CSC coef PT YUV444 enable. + */ +typedef struct _VI_DEV_ATTR_S { + VI_INTF_MODE_E enIntfMode; /* RW;Interface mode */ + VI_WORK_MODE_E enWorkMode; /* RW;Work mode */ + + VI_SCAN_MODE_E enScanMode; /* RW;Input scanning mode (progressive or interlaced) */ + CVI_S32 as32AdChnId[VI_MAX_ADCHN_NUM]; /* RW;AD channel ID. Typically, the default value -1 is recommended */ + + /* The below members must be configured in BT.601 mode or DC mode and are invalid in other modes */ + VI_YUV_DATA_SEQ_E enDataSeq; /* RW;Input data sequence (only the YUV format is supported) */ + VI_SYNC_CFG_S stSynCfg; /* RW;Sync timing. This member must be configured in BT.601 mode or DC mode */ + + VI_DATA_TYPE_E enInputDataType; + + SNR_SIZE_S stSnrSize; /* RW;Input Snr Size */ + + VI_WDR_ATTR_S stWDRAttr; /* RW;Attribute of WDR */ + + BAYER_FORMAT_E enBayerFormat; /* RW;Bayer format of Device */ + + CVI_U32 chn_num; /* R; total chnannels sended from dev */ + + CVI_U32 snrFps; /* R; snr init fps from isp pub attr */ +} VI_DEV_ATTR_S; + +/* Information of pipe binded to device */ +typedef struct _VI_DEV_BIND_PIPE_S { + CVI_U32 u32Num; /* RW;Range [1,VI_MAX_PIPE_NUM] */ + VI_PIPE PipeId[VI_MAX_PIPE_NUM]; /* RW;Array of pipe ID */ +} VI_DEV_BIND_PIPE_S; + +/* Source of 3DNR reference frame */ +typedef enum _VI_NR_REF_SOURCE_E { + VI_NR_REF_FROM_RFR = 0, /* Reference frame from reconstruction frame */ + VI_NR_REF_FROM_CHN0, /* Reference frame from CHN0's frame */ + + VI_NR_REF_FROM_BUTT +} VI_NR_REF_SOURCE_E; + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _VI_PIPE_BYPASS_MODE_E { + VI_PIPE_BYPASS_NONE, + VI_PIPE_BYPASS_FE, + VI_PIPE_BYPASS_BE, + + VI_PIPE_BYPASS_BUTT +} VI_PIPE_BYPASS_MODE_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +/* The attributes of 3DNR */ +typedef struct _VI_NR_ATTR_S { + PIXEL_FORMAT_E enPixFmt; /* RW;Pixel format of reference frame */ + DATA_BITWIDTH_E enBitWidth; /* RW;Bit Width of reference frame */ + VI_NR_REF_SOURCE_E enNrRefSource; /* RW;Source of 3DNR reference frame */ + COMPRESS_MODE_E enCompressMode; /* RW;Reference frame compress mode */ +} VI_NR_ATTR_S; + +/* The attributes of pipe + * + * bDiscardProPic: RW;when professional mode snap, whether to discard long exposure picture in the video pipe. + */ +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef struct _VI_PIPE_ATTR_S { + VI_PIPE_BYPASS_MODE_E enPipeBypassMode; + CVI_BOOL bYuvSkip; /* RW;YUV skip enable */ + CVI_BOOL bIspBypass; /* RW;ISP bypass enable */ + CVI_U32 u32MaxW; /* RW;Range[VI_PIPE_MIN_WIDTH,VI_PIPE_MAX_WIDTH];Maximum width */ + CVI_U32 u32MaxH; /* RW;Range[VI_PIPE_MIN_HEIGHT,VI_PIPE_MAX_HEIGHT];Maximum height */ + PIXEL_FORMAT_E enPixFmt; /* RW;Pixel format */ + COMPRESS_MODE_E enCompressMode; /* RW;Compress mode.*/ + DATA_BITWIDTH_E enBitWidth; /* RW;Bit width*/ + CVI_BOOL bNrEn; /* RW;3DNR enable */ + CVI_BOOL bSharpenEn; /* RW;Sharpen enable*/ + FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */ + CVI_BOOL bDiscardProPic; + CVI_BOOL bYuvBypassPath; /* RW;ISP YUV bypass enable */ +} VI_PIPE_ATTR_S; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +// /* +// * au16TextureStr: RW; range: [0, 4095]; Format:7.5;Undirectional sharpen strength for texture and detail enhancement. +// * au16EdgeStr: RW; range: [0, 4095]; Format:7.5;Directional sharpen strength for edge enhancement. +// * u16TextureFreq: RW; range: [0, 4095]; Format:6.6; Texture frequency adjustment. +// * Texture and detail will be finer when it increase. +// * u16EdgeFreq: RW; range: [0, 4095]; Format:6.6; Edge frequency adjustment. +// * Edge will be narrower and thiner when it increase. +// * u8ShootSupStr: RW; range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, +// * the amplitude and width of shoot will be decrease when shootSupSt increase. +// */ +// typedef struct _VI_PIPE_SHARPEN_MANUAL_ATTR_S { +// CVI_U16 au16TextureStr[VI_SHARPEN_GAIN_NUM]; +// CVI_U16 au16EdgeStr[VI_SHARPEN_GAIN_NUM]; +// CVI_U16 u16TextureFreq; +// CVI_U16 u16EdgeFreq; +// CVI_U8 u8OverShoot; /* RW; range: [0, 127]; Format:7.0;u8OvershootAmt*/ +// CVI_U8 u8UnderShoot; /* RW; range: [0, 127]; Format:7.0;u8UndershootAmt*/ +// CVI_U8 u8ShootSupStr; + +// } VI_PIPE_SHARPEN_MANUAL_ATTR_S; + +// /* +// * au16TextureStr: RW; range: [0, 4095]; Format:7.5;Undirectional sharpen strength for texture and detail enhancement. +// * au16EdgeStr: RW; range: [0, 4095]; Format:7.5;Directional sharpen strength for edge enhancement +// * au16TextureFreq: RW; range: [0, 4095]; Format:6.6;Texture frequency adjustment. +// * Texture and detail will be finer when it increase +// * au16EdgeFreq: RW; range: [0, 4095]; Format:6.6;Edge frequency adjustment. +// * Edge will be narrower and thiner when it increase +// * au8ShootSupStr: RW; range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, +// * the amplitude and width of shoot will be decrease when shootSupSt increase +// */ +// typedef struct _VI_PIPE_SHARPEN_AUTO_ATTR_S { +// CVI_U16 au16TextureStr[VI_SHARPEN_GAIN_NUM][VI_AUTO_ISO_STRENGTH_NUM]; +// CVI_U16 au16EdgeStr[VI_SHARPEN_GAIN_NUM][VI_AUTO_ISO_STRENGTH_NUM]; +// CVI_U16 au16TextureFreq[VI_AUTO_ISO_STRENGTH_NUM]; +// CVI_U16 au16EdgeFreq[VI_AUTO_ISO_STRENGTH_NUM]; +// CVI_U8 au8OverShoot[VI_AUTO_ISO_STRENGTH_NUM]; /* RW; range: [0, 127]; Format:7.0;u8OvershootAmt*/ +// CVI_U8 au8UnderShoot[VI_AUTO_ISO_STRENGTH_NUM]; /* RW; range: [0, 127]; Format:7.0;u8UndershootAmt*/ +// CVI_U8 au8ShootSupStr[VI_AUTO_ISO_STRENGTH_NUM]; + +// } VI_PIPE_SHARPEN_AUTO_ATTR_S; + +// typedef struct _VI_PIPE_SHARPEN_ATTR_S { +// OPERATION_MODE_E enOpType; +// CVI_U8 au8LumaWgt[VI_SHARPEN_GAIN_NUM]; /* RW; range: [0, 127]; Format:7.0;*/ +// VI_PIPE_SHARPEN_MANUAL_ATTR_S stSharpenManualAttr; +// VI_PIPE_SHARPEN_AUTO_ATTR_S stSharpenAutoAttr; +// } VI_PIPE_SHARPEN_ATTR_S; + +// typedef enum _VI_PIPE_REPEAT_MODE_E { +// VI_PIPE_REPEAT_NONE = 0, +// VI_PIPE_REPEAT_ONCE = 1, +// VI_PIPE_REPEAT_BUTT +// } VI_PIPE_REPEAT_MODE_E; + +// /* +// * IES: RW; Range:[0,255];Format 8.0;the absolute strength of image enhancement for edge +// * IESS:RW; Range:[0,255];Format 8.0;the absolute strength of image enhancement for texture and shadow +// * IEDZ: RW; Range:[0,8192];Format 14.0;the threshold of image enhancement for controlling noise +// */ +// typedef struct { +// CVI_U8 IES; +// CVI_U8 IESS; +// CVI_U16 IEDZ; +// } tV59aIEy; + +// /* +// * SBF: RW; Range:[0,3];Format 2.0;the band type of spatial filter, +// * notice: SBF0,SBF1 range is [2,3];SBF2,SBF3 range is [0,3] +// * STR: RW; Range:[0,13];Format 4.0;the relative strength of spatial filter refer to the previous frame +// * STHp: RW; Range:[0,2];Format 2.0;Not recommended for debugging +// * SFT: RW; Range:[0,31];Format 5.0;Not recommended for debugging +// * kPro: RW; Range:[0,7];Format 3.0;notice: the kPro of SFy2 range is [0,7],the kPro of SFy3 range is [0,4] +// * STH: RW; Range:[0,999];Format 10.0;the edge-preserve threshold for spatial filter +// * SBS: RW; Range:[0,9999];Format 14.0;the noise reduction strength of spatial filter for the relative bright pixel +// * SDS: RW; Range:[0,9999];Format 14.0;the noise reduction strength of spatial filter for the relative dark pixel +// */ +// typedef struct { +// CVI_U8 SBF : 2; +// CVI_U8 STR : 4; +// CVI_U8 STHp : 2; +// CVI_U8 SFT : 5; +// CVI_U8 kPro : 3; + +// CVI_U16 STH[3]; +// CVI_U16 SBS[3]; +// CVI_U16 SDS[3]; + +// } tV59aSFy; + +// typedef struct { +// CVI_U16 MATH : 10; /* RW; Range:[0,1023];Format 10.0;the motion detection threshold for temporal filter */ +// CVI_U16 MATE : 4; /* RW; Range:[0,11];Format 4.0;the motion detection index of flat area for temporal filter */ +// CVI_U16 MATW : 2; /* RW; Range:[0,3];Format 2.0;the index of suppressing trailing for temporal filter */ +// CVI_U8 MASW : 4; /* RW; Range:[0,12];Format 4.0;the index of suppressing raindrop noise for temporal filter */ +// CVI_U8 MABW : 3; /* RW; Range:[0,4];Format 3.0;the window of motion detection for temporal filter */ +// CVI_U8 MAXN : 1; /* RW; Range:[0,1];Format 1.0;Not recommended for debugging */ + +// } tV59aMDy; + +// typedef struct { +// CVI_U8 TFR[4]; /* RW; Range:[0,255];Format 8.0;the relative strength of temporal filter for the static area */ +// CVI_U16 TDZ : 14; /* RW; Range:[0,999];Format 10.0;the threshold of dead-area of temporal filter */ +// CVI_U16 TDX : 2; /* RW; Range:[0,2];Format 2.0;Not recommended for debugging */ +// CVI_U16 TFS : 6; /* RW; Range:[0,63];Format 6.0;the absolute strength of temporal filter */ +// } tV59aTFy; + +// typedef struct { +// CVI_U16 SFC : 10; /* RW; Range:[0,1023];Format 10.0;the strength of spatial filter for NRC0 */ +// CVI_U16 TFC : 6; /* RW; Range:[0,63];Format 6.0;the strength of temporal filter for NRC0 */ +// CVI_U16 CSFS : 14; /* RW; Range:[0,999];Format 10.0;the strength of spatial filter for NRC1 */ +// CVI_U16 CSFk : 2; /* RW; Range:[0,3];Format 2.0;Not recommended for debugging */ +// CVI_U16 CTFS : 4; /* RW; Range:[0,15];Format 4.0;the strength of temporal filter for NRC1 */ +// CVI_U16 CIIR : 1; /* RW; Range:[0,1];Format 1.0;the mode of spatial filter for NRC1 */ +// CVI_U16 CTFR : 11; /* RW; Range:[0,999];Format 10.0;the relative strength of temporal filter for NRC1 */ + +// } tV59aNRc; + +// 3DNR Spatial Filter: SFy0,SFy1,SFy2,SFy3; Temporal Filter:TFy0,TFy1;Chroma Noise Reduction: NRC0,NRC1 +// * +// * HdgType: RW; Range:[0,1];Format 1.0;the type of complexed mixed spatial filter whether is SFi or SFk +// * BriType: RW; Range:[0,1];Format 1.0;the mode decide SFy3 whether is SFk type or SFi type +// * HdgMode: RW; Range:[0,3];Format 2.0;the mode decide complexed mixed spatial filter band for flat area +// * kTab2: RW; Range:[0,1];Format 1.0;the parameter decide SFy2 whether or not based on the image absolute luminance +// * HdgWnd: RW; Range:[0,1];Format 1.0;the sampling window of complexed mixed spatial filter for noise detection +// * kTab3: RW; Range:[0,1];Format 1.0;the parameter decide SFy3 whether or not based on the image absolute luminance +// * HdgSFR: RW; Range:[0,13];Format 4.0;the trend of the noise reduction of complexed mixed spatial filter for flat area +// * nOut: RW; Range:[0,27];Format 5.0;the parameter for output intermediate result of SFy3 +// * HdgIES: RW; Range:[0,255];Format 8.0;the strength of image enhancement for complexed mixed spatial filter +// * nRef: RW; Range:[0,1];Format 1.0;Not recommended for debugging +// * +// * SFRi: RW; Range:[0,255];Format 8.0;the relative strength of SFy3 when the filter type is SFi +// * SFRk: RW; Range:[0,255];Format 8.0;the relative strength of SFy3 when the filter type is SFk +// * SBSk2: RW; Range:[0,9999];Format 14.0;the noise reduction strength of SFy2 for the relative bright pixel +// * based on the image absolute luminance +// * SBSk3: RW; Range:[0,9999];Format 14.0;the noise reduction strength of SFy3 for the relative bright pixel +// * based on the image absolute luminance +// * SDSk2: RW; Range:[0,9999];Format 14.0;the noise reduction strength of SFy2 for the relative dark pixel +// * based on the image absolute luminance +// * SDSk3: RW; Range:[0,9999];Format 14.0;the noise reduction strength of SFy3 for the relative dark pixel +// * based on the image absolute luminance +// * BriThr: RW; Range:[0,1024];Format 11.0;the threshold decide SFy3 choose the SFi type filter or SFk type filter +// * in dark and bright area +// * + +// typedef struct { +// tV59aIEy IEy; +// tV59aSFy SFy[5]; +// tV59aMDy MDy[2]; +// tV59aTFy TFy[2]; + +// CVI_U16 HdgType : 1; +// CVI_U16 BriType : 1; +// CVI_U16 HdgMode : 2; +// CVI_U16 kTab2 : 1; +// CVI_U16 HdgWnd : 1; +// CVI_U16 kTab3 : 1; +// CVI_U16 HdgSFR : 4; +// CVI_U16 nOut : 5; +// CVI_U8 HdgIES; +// CVI_U8 nRef : 1; + +// CVI_U8 IEyMode : 1; +// CVI_U8 IEyEx[4]; + +// CVI_U8 SFRi[4]; +// CVI_U8 SFRk[4]; +// CVI_U16 SBSk2[32]; +// CVI_U16 SBSk3[32]; +// CVI_U16 SDSk2[32]; +// CVI_U16 SDSk3[32]; +// CVI_U16 BriThr[16]; + +// tV59aNRc NRc; +// } VI_PIPE_NRX_PARAM_V1_S; + +// typedef enum _VI_NR_VERSION_E { VI_NR_V1 = 1, VI_NR_V2 = 2, VI_NR_V3 = 3, VI_NR_V4 = 4, VI_NR_BUTT } VI_NR_VERSION_E; + +// typedef struct _NRX_PARAM_MANUAL_V1_S { +// VI_PIPE_NRX_PARAM_V1_S stNRXParamV1; +// } NRX_PARAM_MANUAL_V1_S; + +// typedef struct _NRX_PARAM_AUTO_V1_S { +// CVI_U32 u32ParamNum; + +// CVI_U32 *ATTRIBUTE pau32ISO; +// VI_PIPE_NRX_PARAM_V1_S *ATTRIBUTE pastNRXParamV1; +// } NRX_PARAM_AUTO_V1_S; + +// typedef struct _NRX_PARAM_V1_S { +// OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */ +// NRX_PARAM_MANUAL_V1_S stNRXManualV1; /* RW;NRX V1 param for manual */ +// NRX_PARAM_AUTO_V1_S stNRXAutoV1; /* RW;NRX V1 param for auto */ +// } NRX_PARAM_V1_S; + +// typedef struct { +// CVI_U8 IES0, IES1, IES2, IES3; +// CVI_U16 IEDZ : 10, _rb_ : 6; +// } tV500_VI_IEy; + +// typedef struct { +// CVI_U8 SPN6 : 3, SFR : 5; +// CVI_U8 SBN6 : 3, PBR6 : 5; +// CVI_U16 SRT0 : 5, SRT1 : 5, JMODE : 3, DeIdx : 3; +// CVI_U8 DeRate, SFR6[3]; + +// CVI_U8 SFS1, SFT1, SBR1; +// CVI_U8 SFS2, SFT2, SBR2; +// CVI_U8 SFS4, SFT4, SBR4; + +// CVI_U16 STH1 : 9, SFN1 : 3, NRyEn : 1, SFN0 : 3; +// CVI_U16 STH2 : 9, SFN2 : 3, BWSF4 : 1, kMode : 3; +// CVI_U16 STH3 : 9, SFN3 : 3, TriTh : 1, _rb0_ : 3; +// } tV500_VI_SFy; + +// typedef struct { +// tV500_VI_IEy IEy; +// tV500_VI_SFy SFy; +// } VI_PIPE_NRX_PARAM_V2_S; + +// typedef struct _NRX_PARAM_MANUAL_V2_S { +// VI_PIPE_NRX_PARAM_V2_S stNRXParamV2; +// } NRX_PARAM_MANUAL_V2_S; + +// typedef struct _NRX_PARAM_AUTO_V2_S { +// CVI_U32 u32ParamNum; + +// CVI_U32 *ATTRIBUTE pau32ISO; +// VI_PIPE_NRX_PARAM_V2_S *ATTRIBUTE pastNRXParamV2; + +// } NRX_PARAM_AUTO_V2_S; + +// typedef struct _NRX_PARAM_V2_S { +// OPERATION_MODE_E enOptMode; /* RW;Adaptive NR */ +// NRX_PARAM_MANUAL_V2_S stNRXManualV2; /* RW;NRX V2 param for manual */ +// NRX_PARAM_AUTO_V2_S stNRXAutoV2; /* RW;NRX V2 param for auto */ +// } NRX_PARAM_V2_S; + +// typedef struct _VI_PIPE_NRX_PARAM_S { +// VI_NR_VERSION_E enNRVersion; /* RW;3DNR Version*/ +// union { +// NRX_PARAM_V1_S stNRXParamV1; /* RW;3DNR X param version 1 */ +// NRX_PARAM_V2_S stNRXParamV2; /* RW;3DNR X param version 2 */ +// }; +// } VI_PIPE_NRX_PARAM_S; + +// /* The attributes of channel */ +// typedef struct _VI_CHN_ATTR_S { +// SIZE_S stSize; /* RW;Channel out put size */ +// PIXEL_FORMAT_E enPixelFormat; /* RW;Pixel format */ +// DYNAMIC_RANGE_E enDynamicRange; /* RW;Dynamic Range */ +// VIDEO_FORMAT_E enVideoFormat; /* RW;Video format */ +// COMPRESS_MODE_E enCompressMode; /* RW;256B Segment compress or no compress. */ +// CVI_BOOL bMirror; /* RW;Mirror enable */ +// CVI_BOOL bFlip; /* RW;Flip enable */ +// CVI_U32 u32Depth; /* RW;Range [0,8];Depth */ +// FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */ +// } VI_CHN_ATTR_S; + +// /* The status of pipe */ +// typedef struct _VI_PIPE_STATUS_S { +// CVI_BOOL bEnable; /* RO;Whether this pipe is enabled */ +// CVI_U32 u32IntCnt; /* RO;The video frame interrupt count */ +// CVI_U32 u32FrameRate; /* RO;Current frame rate */ +// CVI_U32 u32LostFrame; /* RO;Lost frame count */ +// CVI_U32 u32VbFail; /* RO;Video buffer malloc failure */ +// SIZE_S stSize; /* RO;Current pipe output size */ +// } VI_PIPE_STATUS_S; + +// /* VS signal output mode */ +// typedef enum _VI_VS_SIGNAL_MODE_E { +// VI_VS_SIGNAL_ONCE = 0, /* output one time */ +// VI_VS_SIGNAL_FREQ, /* output frequently */ + +// VI_VS_SIGNAL_MODE_BUTT +// } VI_VS_SIGNAL_MODE_E; + +// /* The attributes of VS signal */ +// typedef struct _VI_VS_SIGNAL_ATTR_S { +// VI_VS_SIGNAL_MODE_E enMode; /* RW;output one time, output frequently*/ +// CVI_U32 u32StartTime; /* RW;output start time,unit: sensor pix clk.*/ +// CVI_U32 u32Duration; /* RW;output high duration, unit: sensor pix clk.*/ +// CVI_U32 u32CapFrmIndex; /* RW;VS signal will be output after trigger by which vframe, default is 0. */ +// CVI_U32 u32Interval; /* RW;output frequently interval, unit: frame*/ +// } VI_VS_SIGNAL_ATTR_S; + +// typedef enum _VI_EXT_CHN_SOURCE_E { +// VI_EXT_CHN_SOURCE_TAIL, +// VI_EXT_CHN_SOURCE_HEAD, + +// VI_EXT_CHN_SOURCE_BUTT +// } VI_EXT_CHN_SOURCE_E; + +// typedef struct _VI_EXT_CHN_ATTR_S { +// VI_EXT_CHN_SOURCE_E enSource; +// VI_CHN s32BindChn; /* RW;Range [VI_CHN0, VI_MAX_PHY_CHN_NUM);The channel num which extend channel will bind to*/ +// SIZE_S stSize; /* RW;Channel out put size */ +// PIXEL_FORMAT_E enPixelFormat; /* RW;Pixel format */ +// CVI_U32 u32Depth; /* RW;Range [0,8];Depth */ +// FRAME_RATE_CTRL_S stFrameRate; /* RW;Frame rate */ +// } VI_EXT_CHN_ATTR_S; + +// typedef enum _VI_CROP_COORDINATE_E { +// VI_CROP_RATIO_COOR = 0, /* Ratio coordinate */ +// VI_CROP_ABS_COOR, /* Absolute coordinate */ +// VI_CROP_BUTT +// } VI_CROP_COORDINATE_E; + +// /* Information of chn crop */ +// typedef struct _VI_CROP_INFO_S { +// CVI_BOOL bEnable; /* RW;CROP enable*/ +// VI_CROP_COORDINATE_E enCropCoordinate; /* RW;Coordinate mode of the crop start point*/ +// RECT_S stCropRect; /* RW;CROP rectangular*/ +// } VI_CROP_INFO_S; + +// /* The attributes of LDC */ +// typedef struct _VI_LDC_ATTR_S { +// CVI_BOOL bEnable; /* RW;Whether LDC is enbale */ +// LDC_ATTR_S stAttr; +// } VI_LDC_ATTR_S; + +/* The status of chn */ +typedef struct _VI_CHN_STATUS_S { + CVI_BOOL bEnable; /* RO;Whether this channel is enabled */ + CVI_U32 u32FrameRate; /* RO;current frame rate */ + CVI_U64 u64PrevTime; // latest time (us) + CVI_U32 u32FrameNum; //The number of Frame in one second + CVI_U32 u32LostFrame; /* RO;Lost frame count */ + CVI_U32 u32VbFail; /* RO;Video buffer malloc failure */ + CVI_U32 u32IntCnt; /* RO;Receive frame int count */ + CVI_U32 u32RecvPic; /* RO;Receive frame count */ + CVI_U32 u32TotalMemByte; /* RO;VI buffer malloc failure */ + SIZE_S stSize; /* RO;chn output size */ + +} VI_CHN_STATUS_S; + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _VI_DUMP_TYPE_E { + VI_DUMP_TYPE_RAW = 0, + VI_DUMP_TYPE_YUV = 1, + VI_DUMP_TYPE_IR = 2, + VI_DUMP_TYPE_BUTT +} VI_DUMP_TYPE_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef struct _VI_DUMP_ATTR_S { + CVI_BOOL bEnable; /* RW;Whether dump is enable */ + CVI_U32 u32Depth; /* RW;Range [0,8];Depth */ + VI_DUMP_TYPE_E enDumpType; +} VI_DUMP_ATTR_S; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +typedef enum _VI_PIPE_FRAME_SOURCE_E { + VI_PIPE_FRAME_SOURCE_DEV = 0, /* RW;Source from dev */ + VI_PIPE_FRAME_SOURCE_USER_FE, /* RW;User send to FE */ + VI_PIPE_FRAME_SOURCE_USER_BE, /* RW;User send to BE */ + + VI_PIPE_FRAME_SOURCE_BUTT +} VI_PIPE_FRAME_SOURCE_E; + +typedef struct _VI_RAW_INFO_S { + VIDEO_FRAME_INFO_S stVideoFrame; + ISP_CONFIG_INFO_S stIspInfo; +} VI_RAW_INFO_S; + +/* module params */ +typedef struct _VI_MOD_PARAM_S { + CVI_S32 s32DetectErrFrame; + CVI_U32 u32DropErrFrame; +} VI_MOD_PARAM_S; + +typedef struct _VI_DEV_TIMING_ATTR_S { + CVI_BOOL bEnable; /* RW;Whether enable VI generate timing */ + CVI_S32 s32FrmRate; /* RW;Generate timing Frame rate*/ +} VI_DEV_TIMING_ATTR_S; + +typedef struct _VI_EARLY_INTERRUPT_S { + CVI_BOOL bEnable; + CVI_U32 u32LineCnt; +} VI_EARLY_INTERRUPT_S; + +/* VI dump register table */ +typedef struct _MLSC_GAIN_LUT_S { + CVI_U16 *RGain; + CVI_U16 *GGain; + CVI_U16 *BGain; +} MLSC_GAIN_LUT_S; + +typedef struct _VI_DUMP_REGISTER_TABLE_S { + MLSC_GAIN_LUT_S MlscGainLut; +} VI_DUMP_REGISTER_TABLE_S; + +typedef int (*pfnViDevPmOps)(void *pvData); + +typedef struct _VI_PM_OPS_S { + pfnViDevPmOps pfnSnsSuspend; + pfnViDevPmOps pfnSnsResume; + pfnViDevPmOps pfnMipiSuspend; + pfnViDevPmOps pfnMipiResume; +} VI_PM_OPS_S; + +typedef struct _VI_SMOOTH_RAW_DUMP_INFO_S { + VI_PIPE ViPipe; + CVI_U8 u8BlkCnt; // ring buffer number + CVI_U64 *phy_addr_list; // ring buffer addr +} VI_SMOOTH_RAW_DUMP_INFO_S; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* End of #ifndef__CVI_COMM_VIDEO_IN_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_comm_video.h b/freertos/cvitek/install/include/common/cvi_comm_video.h new file mode 100644 index 000000000..62d9aa311 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_comm_video.h @@ -0,0 +1,535 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_comm_video.h + * Description: + * Common video definitions. + */ + +#ifndef __CVI_COMM_VIDEO_H__ +#define __CVI_COMM_VIDEO_H__ + +#include +#include + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +#define SRC_LENS_COEF_SEG 2 +#define DST_LENS_COEF_SEG 3 +#define SRC_LENS_COEF_NUM 4 +#define DST_LENS_COEF_NUM 4 + +#define ISP_BAYER_CHN (4) + +#define IS_FMT_YUV(fmt) \ + ((fmt == PIXEL_FORMAT_YUV_PLANAR_420) || (fmt == PIXEL_FORMAT_YUV_PLANAR_422) || \ + (fmt == PIXEL_FORMAT_YUV_PLANAR_444) || (fmt == PIXEL_FORMAT_YUV_400) || \ + (fmt == PIXEL_FORMAT_NV12) || (fmt == PIXEL_FORMAT_NV21) || \ + (fmt == PIXEL_FORMAT_NV16) || (fmt == PIXEL_FORMAT_NV61) || \ + (fmt == PIXEL_FORMAT_YUYV) || (fmt == PIXEL_FORMAT_UYVY) || \ + (fmt == PIXEL_FORMAT_YVYU) || (fmt == PIXEL_FORMAT_VYUY)) + +#define IS_FMT_YUV420(fmt) \ + ((fmt == PIXEL_FORMAT_YUV_PLANAR_420) || \ + (fmt == PIXEL_FORMAT_NV12) || (fmt == PIXEL_FORMAT_NV21) || \ + (fmt == PIXEL_FORMAT_YUYV) || (fmt == PIXEL_FORMAT_UYVY) || \ + (fmt == PIXEL_FORMAT_YVYU) || (fmt == PIXEL_FORMAT_VYUY)) + +#define IS_FMT_YUV422(fmt) \ + ((fmt == PIXEL_FORMAT_YUV_PLANAR_422) || \ + (fmt == PIXEL_FORMAT_NV16) || (fmt == PIXEL_FORMAT_NV61)) + +#define IS_FRAME_OFFSET_INVALID(f) \ + ((f).s16OffsetLeft < 0 || (f).s16OffsetRight < 0 || \ + (f).s16OffsetTop < 0 || (f).s16OffsetBottom < 0 || \ + ((CVI_U32)((f).s16OffsetLeft + (f).s16OffsetRight) > (f).u32Width) || \ + ((CVI_U32)((f).s16OffsetTop + (f).s16OffsetBottom) > (f).u32Height)) + +typedef enum _OPERATION_MODE_E { + OPERATION_MODE_AUTO = 0, + OPERATION_MODE_MANUAL = 1, + OPERATION_MODE_BUTT +} OPERATION_MODE_E; + +/*Angle of rotation*/ +typedef enum _ROTATION_E { + ROTATION_0 = 0, + ROTATION_90, + ROTATION_180, + ROTATION_270, + ROTATION_MAX +} ROTATION_E; + +typedef enum _VB_SOURCE_E { + VB_SOURCE_COMMON = 0, + VB_SOURCE_MODULE = 1, + VB_SOURCE_PRIVATE = 2, + VB_SOURCE_USER = 3, + VB_SOURCE_BUTT +} VB_SOURCE_E; + +typedef struct _BORDER_S { + CVI_U32 u32TopWidth; + CVI_U32 u32BottomWidth; + CVI_U32 u32LeftWidth; + CVI_U32 u32RightWidth; + CVI_U32 u32Color; +} BORDER_S; + +typedef struct _POINT_S { + CVI_S32 s32X; + CVI_S32 s32Y; +} POINT_S; + +typedef struct _SIZE_S { + CVI_U32 u32Width; + CVI_U32 u32Height; +} SIZE_S; + +/* + * u32Width : total pixels from snr + * u32Height : total lines from snr + * u32StartX : crop x + * u32StartY : crop y + * u32ActiveW : actual video pixels + * u32ActiveH : actual video lines + */ +typedef struct _SNR_SIZE_S { + CVI_U32 u32Width; + CVI_U32 u32Height; + CVI_U32 u32StartX; + CVI_U32 u32StartY; + CVI_U32 u32ActiveW; + CVI_U32 u32ActiveH; +} SNR_SIZE_S; + +typedef struct _RECT_S { + CVI_S32 s32X; + CVI_S32 s32Y; + CVI_U32 u32Width; + CVI_U32 u32Height; +} RECT_S; + +typedef struct _VIDEO_REGION_INFO_S { + CVI_U32 u32RegionNum; /* W; count of the region */ + RECT_S *pstRegion; /* W; region attribute */ +} VIDEO_REGION_INFO_S; + +typedef struct _CROP_INFO_S { + CVI_BOOL bEnable; + RECT_S stRect; +} CROP_INFO_S; + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef struct _FRAME_RATE_CTRL_S { + CVI_S32 s32SrcFrameRate; /* RW; source frame rate */ + CVI_S32 s32DstFrameRate; /* RW; dest frame rate */ +} FRAME_RATE_CTRL_S; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +/* + * ASPECT_RATIO_NONE: full screen + * ASPECT_RATIO_AUTO: Keep ratio, automatically get the region of video. + * ASPECT_RATIO_MANUAL: Manully set the region of video. + */ +typedef enum _ASPECT_RATIO_E { + ASPECT_RATIO_NONE = 0, + ASPECT_RATIO_AUTO, + ASPECT_RATIO_MANUAL, + ASPECT_RATIO_MAX +} ASPECT_RATIO_E; + +/* + * enMode: aspect ratio mode: none/auto/manual + * bEnableBgColor: fill bgcolor + * u32BgColor: background color, RGB 888 + * stVideoRect: valid in ASPECT_RATIO_MANUAL mode + */ +typedef struct _ASPECT_RATIO_S { + ASPECT_RATIO_E enMode; + CVI_BOOL bEnableBgColor; + CVI_U32 u32BgColor; + RECT_S stVideoRect; +} ASPECT_RATIO_S; + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _PIXEL_FORMAT_E { + PIXEL_FORMAT_RGB_888 = 0, + PIXEL_FORMAT_BGR_888, + PIXEL_FORMAT_RGB_888_PLANAR, + PIXEL_FORMAT_BGR_888_PLANAR, + + PIXEL_FORMAT_ARGB_1555, // 4, + PIXEL_FORMAT_ARGB_4444, + PIXEL_FORMAT_ARGB_8888, + + PIXEL_FORMAT_RGB_BAYER_8BPP, // 7, + PIXEL_FORMAT_RGB_BAYER_10BPP, + PIXEL_FORMAT_RGB_BAYER_12BPP, + PIXEL_FORMAT_RGB_BAYER_14BPP, + PIXEL_FORMAT_RGB_BAYER_16BPP, + + PIXEL_FORMAT_YUV_PLANAR_422, // 12, + PIXEL_FORMAT_YUV_PLANAR_420, + PIXEL_FORMAT_YUV_PLANAR_444, + PIXEL_FORMAT_YUV_400, + + PIXEL_FORMAT_HSV_888, // 16, + PIXEL_FORMAT_HSV_888_PLANAR, + + PIXEL_FORMAT_NV12, // 18, + PIXEL_FORMAT_NV21, + PIXEL_FORMAT_NV16, + PIXEL_FORMAT_NV61, + PIXEL_FORMAT_YUYV, + PIXEL_FORMAT_UYVY, + PIXEL_FORMAT_YVYU, + PIXEL_FORMAT_VYUY, + + PIXEL_FORMAT_FP32_C1 = 32, // 32 + PIXEL_FORMAT_FP32_C3_PLANAR, + PIXEL_FORMAT_INT32_C1, + PIXEL_FORMAT_INT32_C3_PLANAR, + PIXEL_FORMAT_UINT32_C1, + PIXEL_FORMAT_UINT32_C3_PLANAR, + PIXEL_FORMAT_BF16_C1, + PIXEL_FORMAT_BF16_C3_PLANAR, + PIXEL_FORMAT_INT16_C1, + PIXEL_FORMAT_INT16_C3_PLANAR, + PIXEL_FORMAT_UINT16_C1, + PIXEL_FORMAT_UINT16_C3_PLANAR, + PIXEL_FORMAT_INT8_C1, + PIXEL_FORMAT_INT8_C3_PLANAR, + PIXEL_FORMAT_UINT8_C1, + PIXEL_FORMAT_UINT8_C3_PLANAR, + + PIXEL_FORMAT_8BIT_MODE = 48, //48 + + PIXEL_FORMAT_MAX +} PIXEL_FORMAT_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +/* + * VIDEO_FORMAT_LINEAR: nature video line. + */ +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _VIDEO_FORMAT_E { + VIDEO_FORMAT_LINEAR = 0, + VIDEO_FORMAT_MAX +} VIDEO_FORMAT_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +/* + * COMPRESS_MODE_NONE: no compress. + * COMPRESS_MODE_TILE: compress unit is a tile. + * COMPRESS_MODE_LINE: compress unit is the whole line. + * COMPRESS_MODE_FRAME: ompress unit is the whole frame. + */ +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _COMPRESS_MODE_E { + COMPRESS_MODE_NONE = 0, + COMPRESS_MODE_TILE, + COMPRESS_MODE_LINE, + COMPRESS_MODE_FRAME, + COMPRESS_MODE_BUTT +} COMPRESS_MODE_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _BAYER_FORMAT_E { + BAYER_FORMAT_BG = 0, + BAYER_FORMAT_GB, + BAYER_FORMAT_GR, + BAYER_FORMAT_RG, + BAYER_FORMAT_MAX +} BAYER_FORMAT_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +typedef enum _VIDEO_DISPLAY_MODE_E { + VIDEO_DISPLAY_MODE_PREVIEW = 0x0, + VIDEO_DISPLAY_MODE_PLAYBACK = 0x1, + + VIDEO_DISPLAY_MODE_MAX +} VIDEO_DISPLAY_MODE_E; + +/* + * u32ISO: ISP internal ISO : Again*Dgain*ISPgain + * u32ExposureTime: Exposure time (reciprocal of shutter speed),unit is us + * u32FNumber: The actual F-number (F-stop) of lens when the image was taken + * u32SensorID: which sensor is used + * u32HmaxTimes: Sensor HmaxTimes,unit is ns + * u32VcNum: when dump wdr frame, which is long or short exposure frame. + */ +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef struct _ISP_FRAME_INFO_S { + CVI_U32 u32ISO; + CVI_U32 u32ExposureTime; + CVI_U32 u32IspDgain; + CVI_U32 u32Again; + CVI_U32 u32Dgain; + CVI_U32 au32Ratio[3]; + CVI_U32 u32IspNrStrength; + CVI_U32 u32FNumber; + CVI_U32 u32SensorID; + CVI_U32 u32SensorMode; + CVI_U32 u32HmaxTimes; + CVI_U32 u32VcNum; +} ISP_FRAME_INFO_S; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +typedef struct _ISP_HDR_INFO_S { + CVI_U32 u32ColorTemp; + CVI_U16 au16CCM[9]; + CVI_U8 u8Saturation; +} ISP_HDR_INFO_S; + +typedef struct _ISP_ATTACH_INFO_S { + ISP_HDR_INFO_S stIspHdr; + CVI_U32 u32ISO; + CVI_U8 *u8SnsWDRMode; +} ISP_ATTACH_INFO_S; + +typedef enum _FRAME_FLAG_E { + FRAME_FLAG_SNAP_FLASH = 0x1 << 0, + FRAME_FLAG_SNAP_CUR = 0x1 << 1, + FRAME_FLAG_SNAP_REF = 0x1 << 2, + FRAME_FLAG_SNAP_END = 0x1 << 31, + FRAME_FLAG_MAX +} FRAME_FLAG_E; + +/* RGGB=4 */ +#define ISP_WB_GAIN_NUM 4 +/* 3*3=9 matrix */ +#define ISP_CAP_CCM_NUM 9 +typedef struct _ISP_CONFIG_INFO_S { + CVI_U32 u32ISO; + CVI_U32 u32IspDgain; + CVI_U32 u32ExposureTime; + CVI_U32 au32WhiteBalanceGain[ISP_WB_GAIN_NUM]; + CVI_U32 u32ColorTemperature; + CVI_U16 au16CapCCM[ISP_CAP_CCM_NUM]; +} ISP_CONFIG_INFO_S; + +/* + * pJpegDCFVirAddr: JPEG_DCF_S, used in JPEG DCF + * pIspInfoVirAddr: ISP_FRAME_INFO_S, used in ISP debug, when get raw and send raw + * pLowDelayVirAddr: used in low delay + */ +typedef struct _VIDEO_SUPPLEMENT_S { + CVI_U64 u64JpegDCFPhyAddr; + CVI_U64 u64IspInfoPhyAddr; + CVI_U64 u64LowDelayPhyAddr; + CVI_U64 u64FrameDNGPhyAddr; + + CVI_VOID * ATTRIBUTE pJpegDCFVirAddr; + CVI_VOID * ATTRIBUTE pIspInfoVirAddr; + CVI_VOID * ATTRIBUTE pLowDelayVirAddr; + CVI_VOID * ATTRIBUTE pFrameDNGVirAddr; +} VIDEO_SUPPLEMENT_S; + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _COLOR_GAMUT_E { + COLOR_GAMUT_BT601 = 0, + COLOR_GAMUT_BT709, + COLOR_GAMUT_BT2020, + COLOR_GAMUT_USER, + COLOR_GAMUT_MAX +} COLOR_GAMUT_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +typedef struct _ISP_COLORGAMMUT_INFO_S { + COLOR_GAMUT_E enColorGamut; +} ISP_COLORGAMMUT_INFO_S; + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _DYNAMIC_RANGE_E { + DYNAMIC_RANGE_SDR8 = 0, + DYNAMIC_RANGE_SDR10, + DYNAMIC_RANGE_HDR10, + DYNAMIC_RANGE_HLG, + DYNAMIC_RANGE_SLF, + DYNAMIC_RANGE_XDR, + DYNAMIC_RANGE_MAX +} DYNAMIC_RANGE_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _DATA_BITWIDTH_E { + DATA_BITWIDTH_8 = 0, + DATA_BITWIDTH_10, + DATA_BITWIDTH_12, + DATA_BITWIDTH_14, + DATA_BITWIDTH_16, + DATA_BITWIDTH_MAX +} DATA_BITWIDTH_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +/** + * @brief Define video frame + * + * s16OffsetTop: top offset of show area + * s16OffsetBottom: bottom offset of show area + * s16OffsetLeft: left offset of show area + * s16OffsetRight: right offset of show area + * u32FrameFlag: FRAME_FLAG_E, can be OR operation. + */ +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef struct _VIDEO_FRAME_S { + CVI_U32 u32Width; + CVI_U32 u32Height; + PIXEL_FORMAT_E enPixelFormat; + BAYER_FORMAT_E enBayerFormat; + VIDEO_FORMAT_E enVideoFormat; + COMPRESS_MODE_E enCompressMode; + DYNAMIC_RANGE_E enDynamicRange; + COLOR_GAMUT_E enColorGamut; + CVI_U32 u32Stride[3]; + + CVI_U64 u64PhyAddr[3]; + CVI_U8 *pu8VirAddr[3]; +#ifdef __arm__ + __u32 u32VirAddrPadding[3]; +#endif + CVI_U32 u32Length[3]; + + CVI_S16 s16OffsetTop; + CVI_S16 s16OffsetBottom; + CVI_S16 s16OffsetLeft; + CVI_S16 s16OffsetRight; + + CVI_U32 u32TimeRef; + CVI_U64 u64PTS; + + void *pPrivateData; +#ifdef __arm__ + __u32 u32PrivateDataPadding; +#endif + CVI_U32 u32FrameFlag; + + CVI_U32 u32DevNum; +} VIDEO_FRAME_S; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +/** + * @brief Define the information of video frame. + * + * stVFrame: Video frame info. + * u32PoolId: VB pool ID. + */ +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef struct _VIDEO_FRAME_INFO_S { + VIDEO_FRAME_S stVFrame; + CVI_U32 u32PoolId; +} VIDEO_FRAME_INFO_S; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +/* + * u32VBSize: size of VB needed. + * u32MainStride: stride of planar0. + * u32CStride: stride of planar1/2 if there is. + * u32MainSize: size of all planars. + * u32MainYSize: size of planar0. + * u32MainCSize: size of planar1/2 if there is. + * u16AddrAlign: address alignment needed between planar. + */ +typedef struct _VB_CAL_CONFIG_S { + CVI_U32 u32VBSize; + + CVI_U32 u32MainStride; + CVI_U32 u32CStride; + CVI_U32 u32MainSize; + CVI_U32 u32MainYSize; + CVI_U32 u32MainCSize; + CVI_U16 u16AddrAlign; + CVI_U8 plane_num; +} VB_CAL_CONFIG_S; + +/* + * enPixelFormat: Bitmap's pixel format + * u32Width: Bitmap's width + * u32Height: Bitmap's height + * pData: Address of Bitmap's data + */ +typedef struct _BITMAP_S { + PIXEL_FORMAT_E enPixelFormat; + CVI_U32 u32Width; + CVI_U32 u32Height; + + CVI_VOID * ATTRIBUTE pData; +} BITMAP_S; + +/* + * + * s32CenterXOffset: RW; Range: [-511, 511], horizontal offset of the image distortion center relative to image center + * s32CenterYOffset: RW; Range: [-511, 511], vertical offset of the image distortion center relative to image center + * s32DistortionRatio: RW; Range: [-300, 500], LDC Distortion ratio. + * When spread on,s32DistortionRatio range should be [0, 500] + */ +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef struct _LDC_ATTR_S { + CVI_BOOL bAspect; /* RW;Whether aspect ration is keep */ + CVI_S32 s32XRatio; /* RW; Range: [0, 100], field angle ration of horizontal,valid when bAspect=0.*/ + CVI_S32 s32YRatio; /* RW; Range: [0, 100], field angle ration of vertical,valid when bAspect=0.*/ + CVI_S32 s32XYRatio; /* RW; Range: [0, 100], field angle ration of all,valid when bAspect=1.*/ + CVI_S32 s32CenterXOffset; + CVI_S32 s32CenterYOffset; + CVI_S32 s32DistortionRatio; +} LDC_ATTR_S; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _WDR_MODE_E { + WDR_MODE_NONE = 0, + WDR_MODE_BUILT_IN, + WDR_MODE_QUDRA, + + WDR_MODE_2To1_LINE, + WDR_MODE_2To1_FRAME, + WDR_MODE_2To1_FRAME_FULL_RATE, + + WDR_MODE_3To1_LINE, + WDR_MODE_3To1_FRAME, + WDR_MODE_3To1_FRAME_FULL_RATE, + + WDR_MODE_4To1_LINE, + WDR_MODE_4To1_FRAME, + WDR_MODE_4To1_FRAME_FULL_RATE, + + WDR_MODE_MAX, +} WDR_MODE_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +// ++++++++ If you want to change these interfaces, please contact the isp team. ++++++++ +typedef enum _PROC_AMP_E { + PROC_AMP_BRIGHTNESS = 0, + PROC_AMP_CONTRAST, + PROC_AMP_SATURATION, + PROC_AMP_HUE, + PROC_AMP_MAX, +} PROC_AMP_E; +// -------- If you want to change these interfaces, please contact the isp team. -------- + +typedef struct _PROC_AMP_CTRL_S { + CVI_S32 minimum; + CVI_S32 maximum; + CVI_S32 step; + CVI_S32 default_value; +} PROC_AMP_CTRL_S; + +typedef struct _VCODEC_PERF_FPS_S { + CVI_U32 u32InFPS; + CVI_U32 u32OutFPS; + CVI_U64 u64HwTime; +} VCODEC_PERF_FPS_S; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* _CVI_COMM_VIDEO_H_ */ diff --git a/freertos/cvitek/install/include/common/cvi_common.h b/freertos/cvitek/install/include/common/cvi_common.h new file mode 100644 index 000000000..b76eba823 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_common.h @@ -0,0 +1,93 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_common.h + * Description: Common video definitions. + */ + +#ifndef __CVI_COMMON_H__ +#define __CVI_COMMON_H__ + +#include +#include + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#ifndef __FILENAME__ +#define __FILENAME__ (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__) +#endif + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif + +#undef ALIGN +#define ALIGN(x, a) (((x) + ((a)-1)) & ~((a)-1)) + +#define ATTRIBUTE __attribute__((aligned(ALIGN_NUM))) + +#define CVI_INVALID_CHN (-1) +#define CVI_INVALID_LAYER (-1) +#define CVI_INVALID_DEV (-1) +#define CVI_INVALID_HANDLE (-1) +#define CVI_INVALID_VALUE (-1) +#define CVI_INVALID_TYPE (-1) + +typedef CVI_S32 VI_DEV; +typedef CVI_S32 VI_PIPE; +typedef CVI_S32 VI_CHN; +typedef CVI_S32 ISP_DEV; +typedef CVI_S32 SENSOR_ID; + +#define FOREACH_MOD(MOD) {\ + MOD(BASE) \ + MOD(VB) \ + MOD(SYS) \ + MOD(RGN) \ + MOD(CHNL) \ + MOD(VDEC) \ + MOD(VPSS) \ + MOD(VENC) \ + MOD(H264E) \ + MOD(JPEGE) \ + MOD(MPEG4E) \ + MOD(H265E) \ + MOD(JPEGD) \ + MOD(VO) \ + MOD(VI) \ + MOD(DIS) \ + MOD(RC) \ + MOD(AIO) \ + MOD(AI) \ + MOD(AO) \ + MOD(AENC) \ + MOD(ADEC) \ + MOD(AUD) \ + MOD(VPU) \ + MOD(ISP) \ + MOD(IVE) \ + MOD(USER) \ + MOD(PROC) \ + MOD(LOG) \ + MOD(H264D) \ + MOD(GDC) \ + MOD(PHOTO) \ + MOD(FB) \ + MOD(BUTT) \ +} + +#define GENERATE_ENUM(ENUM) CVI_ID_ ## ENUM, + +typedef enum _MOD_ID_E FOREACH_MOD(GENERATE_ENUM) MOD_ID_E; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_COMMON_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_debug.h b/freertos/cvitek/install/include/common/cvi_debug.h new file mode 100644 index 000000000..94b798f61 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_debug.h @@ -0,0 +1,143 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_debug.h + * Description: + */ + +#ifndef __CVI_DEBUG_H__ +#define __CVI_DEBUG_H__ + +#include +#include +#include +#include +#include + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define syslog(...) +#define LOG_LOCAL5 5 + +/* + * Debug Config + */ +#define CONFIG_CVI_GDB_NO 1 +#define CONFIG_CVI_GDB "n" +#define CONFIG_CVI_LOG_TRACE_SUPPORT 1 +#define CONFIG_CVI_LOG_TRACE_ALL 1 +#define CONFIG_CVI_LOG_TRACE_LEVEL 4 + + +#define CVI_DBG_EMERG 0 /* system is unusable */ +#define CVI_DBG_ALERT 1 /* action must be taken immediately */ +#define CVI_DBG_CRIT 2 /* critical conditions */ +#define CVI_DBG_ERR 3 /* error conditions */ +#define CVI_DBG_WARN 4 /* warning conditions */ +#define CVI_DBG_NOTICE 5 /* normal but significant condition */ +#define CVI_DBG_INFO 6 /* informational */ +#define CVI_DBG_DEBUG 7 /* debug-level messages */ + +typedef struct _LOG_LEVEL_CONF_S { + MOD_ID_E enModId; + CVI_S32 s32Level; + char cModName[16]; +} LOG_LEVEL_CONF_S; + +#define CVI_PRINT printf + +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-variable" + +static CVI_S32 *log_levels; +static CVI_CHAR const *log_name[8] = { + (CVI_CHAR *)"EMG", (CVI_CHAR *)"ALT", (CVI_CHAR *)"CRI", (CVI_CHAR *)"ERR", + (CVI_CHAR *)"WRN", (CVI_CHAR *)"NOT", (CVI_CHAR *)"INF", (CVI_CHAR *)"DBG" +}; + +#pragma GCC diagnostic pop + +#define _GENERATE_STRING(STRING) (#STRING), +static const char *const MOD_STRING[] = FOREACH_MOD(_GENERATE_STRING); +#define CVI_GET_MOD_NAME(id) (id < CVI_ID_BUTT)? MOD_STRING[id] : "UNDEF" + +/* #ifdef CVI_DEBUG */ +#ifdef CONFIG_CVI_LOG_TRACE_SUPPORT + + #define CVI_ASSERT(expr) \ + do { \ + if (!(expr)) { \ + printf("\nASSERT at:\n" \ + " >Function : %s\n" \ + " >Line No. : %d\n" \ + " >Condition: %s\n", \ + __func__, __LINE__, #expr); \ + _exit(-1); \ + } \ + } while (0) + +#ifndef FPGA_PORTING + + #define CVI_TRACE(level, enModId, fmt, ...) \ + do { \ + CVI_S32 LogLevel = (log_levels == NULL) ? CONFIG_CVI_LOG_TRACE_LEVEL : log_levels[enModId]; \ + if (level <= LogLevel) { \ + syslog(LOG_LOCAL5|level, "[%s-%s] " fmt, CVI_GET_MOD_NAME(enModId), log_name[level], \ + ##__VA_ARGS__); \ + } \ + } while (0) +#else + #define CVI_TRACE(level, enModId, fmt, ...) \ + printf(fmt, ##__VA_ARGS__) +#endif +#else + #define CVI_ASSERT(expr) + #define CVI_TRACE(level, enModId, fmt...) +#endif + +#define CVI_TRACE_ID(level, id, fmt, ...) \ + CVI_TRACE(level, id, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_LOG(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_LOG, "%s:%d:%s(): " fmt, __FILENAM__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_SYS(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_SYS, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_VB(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_VB, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_SNS(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_VI, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_VI(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_VI, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_VPSS(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_VPSS, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_VO(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_VO, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_GDC(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_GDC, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_RGN(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_RGN, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + +#define CVI_TRACE_MISC(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_SYS, "%s:%d:%s(): " fmt, __FILENAME__, __LINE__, __func__, ##__VA_ARGS__) + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_COMM_SYS_H__ */ + diff --git a/freertos/cvitek/install/include/common/cvi_defines.h b/freertos/cvitek/install/include/common/cvi_defines.h new file mode 100644 index 000000000..426ce8df2 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_defines.h @@ -0,0 +1,355 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_defines.h + * Description: + * The common definitions per chip capability. + */ + /****************************************************************************** */ + +#ifndef __U_CVI_DEFINES_H__ +#define __U_CVI_DEFINES_H__ + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +#define CVI_CHIP_TEST 0x0 + +#ifndef CVI_CHIP_NAME +#ifdef __CV181X__ +#define CVI_CHIP_NAME "CV181X" +#else +#define CVI_CHIP_NAME "CV180X" +#endif +#endif + +#define CVI1835 0x1 +#define CVI1832 0x2 +#define CVI1838 0x3 +#define CVI1822 0x4 +#define CVI1829 0x5 +#define CVI1826 0x6 +#define CVI1821 0x7 +#define CVI1820 0x8 +#define CVI1823 0x9 +#define CVI1825 0xA + +#define CVIU01 0x1 +#define CVIU02 0x2 + +#define CVI_COLDBOOT 0x1 +#define CVI_WDTBOOT 0x2 +#define CVI_SUSPENDBOOT 0x3 +#define CVI_WARMBOOT 0x4 + +#define IS_CHIP_CV183X(x) (((x) == CVI1829) || ((x) == CVI1832) || ((x) == CVI1835) || ((x) == CVI1838)) +#define IS_CHIP_CV182X(x) (((x) == CVI1820) || ((x) == CVI1821) || ((x) == CVI1822) \ + || ((x) == CVI1823) || ((x) == CVI1825) || ((x) == CVI1826)) + +#define MMF_VER_PRIX "_MMF_V" + +#define ALIGN_NUM 4 + +#define LUMA_PHY_ALIGN 16 + +#define DEFAULT_ALIGN 64 +#define MAX_ALIGN 1024 +#define SEG_CMP_LENGTH 256 + +/* For VENC */ +#define VENC_MAX_NAME_LEN 16 +#define VENC_MAX_CHN_NUM 64 +#define VEDU_IP_NUM 1 +#define H264E_MAX_WIDTH 4096 +#define H264E_MAX_HEIGHT 4096 +#define H264E_MIN_WIDTH 114 +#define H264E_MIN_HEIGHT 114 +#define H265E_MAX_WIDTH 4096 +#define H265E_MAX_HEIGHT 4096 +#define H265E_MIN_WIDTH 114 +#define H265E_MIN_HEIGHT 114 +#define JPEGE_MAX_WIDTH 8192 +#define JPEGE_MAX_HEIGHT 8192 +#define JPEGE_MIN_WIDTH 32 +#define JPEGE_MIN_HEIGHT 32 +#define JPGE_MAX_NUM 1 +#define VENC_MAX_ROI_NUM 8 +#define H264E_MIN_HW_INDEX 0 +#define H264E_MAX_HW_INDEX 11 +#define H264E_MIN_VW_INDEX 0 +#define H264E_MAX_VW_INDEX 3 +#define VENC_QP_HISGRM_NUM 52 +#define MAX_TILE_NUM 1 +#define H265E_ADAPTIVE_FRAME_TYPE 4 +#define H265E_ADAPTIVE_QP_TYPE 5 + +#define VENC_MIN_INPUT_FRAME_RATE 1 +#define VENC_MAX_INPUT_FRAME_RATE 240 + +#define VENC_MAX_RECEIVE_SOURCE 4 + +#define VENC_PIC_RECEIVE_SOURCE0 0 +#define VENC_PIC_RECEIVE_SOURCE1 1 +#define VENC_PIC_RECEIVE_SOURCE2 2 +#define VENC_PIC_RECEIVE_SOURCE3 3 + +#define VENC_ALIGN_W 32 +#define VENC_ALIGN_H 16 + +/* For RC */ +#define RC_TEXTURE_THR_SIZE 16 +#define MIN_BITRATE 2 +#define MAX_BITRATE (100*1024) + +/* For VDEC */ +#define VDEC_MAX_CHN_NUM 64 +#define VDH_MAX_CHN_NUM 0 +#define VEDU_CHN_START VDH_MAX_CHN_NUM +#define VEDU_H264D_ERRRATE 10 +#define VEDU_H264D_FULLERR 100 + +#define H264D_ALIGN_W 64 +#define H264D_ALIGN_H 64 +#define H265D_ALIGN_W 64 +#define H265D_ALIGN_H 64 +#define JPEGD_ALIGN_W 64 +#define JPEGD_ALIGN_H 16 +#define JPEGD_RGB_ALIGN 16 + +#define H264D_ALIGN_FRM 0x1000 +#define H265D_ALIGN_FRM 0x1000 +#define JPEGD_ALIGN_FRM 0x1000 + +#define H264D_MAX_SPS 32 +#define H264D_MIN_SPS 1 +#define H264D_MAX_PPS 256 +#define H264D_MIN_PPS 1 +#define H264D_MAX_SLICE 300 +#define H264D_MIN_SLICE 1 + +#define H265D_MAX_VPS 16 +#define H265D_MIN_VPS 1 +#define H265D_MAX_SPS 16 +#define H265D_MIN_SPS 1 +#define H265D_MAX_PPS 64 +#define H265D_MIN_PPS 1 +#define H265D_MAX_SLICE 200 +#define H265D_MIN_SLICE 1 + +#define VEDU_H264D_MAX_WIDTH 2880 +#define VEDU_H264D_MAX_HEIGHT 1920 +#define VEDU_H264D_MIN_WIDTH 114 +#define VEDU_H264D_MIN_HEIGHT 114 + +#define VEDU_H265D_MAX_WIDTH 2880 +#define VEDU_H265D_MAX_HEIGHT 1920 +#define VEDU_H265D_MIN_WIDTH 114 +#define VEDU_H265D_MIN_HEIGHT 114 + +#define JPEGD_IP_NUM 1 +#define JPEGD_MAX_WIDTH 2880 +#define JPEGD_MAX_HEIGHT 1920 +#define JPEGD_MIN_WIDTH 8 +#define JPEGD_MIN_HEIGHT 8 + +/* For Region */ +#define RGN_MIN_WIDTH 2 +#define RGN_MIN_HEIGHT 2 + +#define RGN_COVER_MIN_X -8192 +#define RGN_COVER_MIN_Y -8192 +#define RGN_COVER_MAX_X 8190 +#define RGN_COVER_MAX_Y 8190 +#define RGN_COVER_MAX_WIDTH 8192 +#define RGN_COVER_MAX_HEIGHT 8192 + +#define RGN_COVEREX_MIN_X -8192 +#define RGN_COVEREX_MIN_Y -8192 +#define RGN_COVEREX_MAX_X 8190 +#define RGN_COVEREX_MAX_Y 8190 +#define RGN_COVEREX_MAX_WIDTH 8192 +#define RGN_COVEREX_MAX_HEIGHT 8192 + +#define RGN_OVERLAY_MIN_X 0 +#define RGN_OVERLAY_MIN_Y 0 +#define RGN_OVERLAY_MAX_X 8190 +#define RGN_OVERLAY_MAX_Y 8190 +#define RGN_OVERLAY_MAX_WIDTH 8192 +#define RGN_OVERLAY_MAX_HEIGHT 8192 + +#define RGN_OVERLAYEX_MIN_X 0 +#define RGN_OVERLAYEX_MIN_Y 0 +#define RGN_OVERLAYEX_MAX_X 8190 +#define RGN_OVERLAYEX_MAX_Y 8190 +#define RGN_OVERLAYEX_MAX_WIDTH 8192 +#define RGN_OVERLAYEX_MAX_HEIGHT 8192 + +#define RGN_MOSAIC_X_ALIGN 4 +#define RGN_MOSAIC_Y_ALIGN 2 +#define RGN_MOSAIC_WIDTH_ALIGN 4 +#define RGN_MOSAIC_HEIGHT_ALIGN 4 + +#define RGN_MOSAIC_MIN_X 0 +#define RGN_MOSAIC_MIN_Y 0 +#define RGN_MOSAIC_MAX_X 8190 +#define RGN_MOSAIC_MAX_Y 8190 +#define RGN_MOSAIC_MIN_WIDTH 32 +#define RGN_MOSAIC_MIN_HEIGHT 32 +#define RGN_MOSAIC_MAX_WIDTH 8192 +#define RGN_MOSAIC_MAX_HEIGHT 8192 + +#define SCL_MAX_GOP_INST 2 +#define RGN_MAX_BUF_NUM 2 + +#define RGN_MAX_NUM_VPSS 8 +#define RGN_MAX_NUM_VO 8 +#define RGN_EX_MAX_NUM_VPSS 32 +#define RGN_EX_MAX_WIDTH 2304 + +#define RGN_MAX_NUM 108 + +/*************************************/ +#define VENC_MAX_SSE_NUM 8 +#define CVI_MAX_SENSOR_NUM 2 + +/* For VI */ +/* number of channel and device on video input unit of chip + * Note! VI_MAX_CHN_NUM is NOT equal to VI_MAX_DEV_NUM + * multiplied by VI_MAX_CHN_NUM, because all VI devices + * can't work at mode of 4 channels at the same time. + */ +#define VI_MAX_DEV_NUM 3 +#define VI_MAX_PHY_PIPE_NUM 4 +#define VI_MAX_VIR_PIPE_NUM 0 +#define VI_MAX_PIPE_NUM (VI_MAX_PHY_PIPE_NUM + VI_MAX_VIR_PIPE_NUM) +#define VI_MAX_WDR_NUM 1 + +#define VI_MAX_VIR_CHN_NUM 2 +#define VI_MAX_PHY_CHN_NUM 2 +#define VI_MAX_EXT_CHN_NUM 2 +#define VI_MAX_CHN_NUM (VI_MAX_PHY_CHN_NUM + VI_MAX_VIR_CHN_NUM) +#define VI_EXT_CHN_START VI_MAX_CHN_NUM +#define VI_MAX_EXTCHN_BIND_PER_CHN 1 + +#define VI_MAX_WDR_FRAME_NUM 2 +#define VI_MAX_NODE_NUM 3 +#define VIPROC_IP_NUM 1 +#define VICAP_IP_NUM 1 + +#define VI_MAX_SPLIT_NODE_NUM 3 + +#define VI_DEV_MIN_WIDTH 120 +#define VI_DEV_MIN_HEIGHT 120 +#define VI_DEV_MAX_WIDTH 4608 +#define VI_DEV_MAX_HEIGHT 4608 +#define VI_FPN_MAX_WIDTH 4096 +#define VI_FPN_MAX_HEIGHT VI_DEV_MAX_HEIGHT + +#define VI_PIPE_OFFLINE_MIN_WIDTH 120 +#define VI_PIPE_OFFLINE_MIN_HEIGHT 120 +#define VI_PIPE_OFFLINE_MAX_WIDTH 4096 +#define VI_PIPE_OFFLINE_MAX_HEIGHT 2160 + +#define VI_PIPE_ONLINE_MIN_WIDTH 120 +#define VI_PIPE_ONLINE_MIN_HEIGHT 120 +#define VI_PIPE_ONLINE_MAX_WIDTH 2688 +#define VI_PIPE_ONLINE_MAX_HEIGHT 1944 + +#define VI_PIPE0_MAX_WIDTH 4096 +#define VI_PIPE0_MAX_HEIGHT 2160 +#define VI_PIPE1_MAX_WIDTH 4096 +#define VI_PIPE1_MAX_HEIGHT 2160 +#define VI_PIPE2_MAX_WIDTH 2688 +#define VI_PIPE2_MAX_HEIGHT 1944 +#define VI_PIPE3_MAX_WIDTH 2688 +#define VI_PIPE3_MAX_HEIGHT 1944 + +#define VI_PIPE_WDR_FIRST_MAX_WIDTH VI_PIPE1_MAX_WIDTH +#define VI_PIPE_FUSION_MAX_WIDTH 2688 +#define VI_PIPE_FUSION_MAX_HEIGHT 1944 + +#define VI_PHYCHN_OFFLINE_MIN_WIDTH 120 +#define VI_PHYCHN_OFFLINE_MIN_HEIGHT 120 +#define VI_PHYCHN_OFFLINE_MAX_WIDTH 4608 +#define VI_PHYCHN_OFFLINE_MAX_HEIGHT 4608 + +#define VI_PHYCHN_ONLINE_MIN_WIDTH 120 +#define VI_PHYCHN_ONLINE_MIN_HEIGHT 120 +#define VI_PHYCHN_ONLINE_MAX_WIDTH 2048 +#define VI_PHYCHN_ONLINE_MAX_HEIGHT 4608 + +#define VI_CMP_PARAM_SIZE 152 + +#define VI_PIXEL_FORMAT PIXEL_FORMAT_NV21 + +#define CVI_VI_VPSS_EXTRA_BUF 0 + +#define CVI_VI_CHN_0_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_CHN_1_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_CHN_2_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_CHN_3_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_BUF (CVI_VI_CHN_0_BUF + CVI_VI_CHN_1_BUF + CVI_VI_CHN_2_BUF + CVI_VI_CHN_3_BUF) + +/* For VO */ +#define VO_MIN_CHN_WIDTH 32 /* channel minimal width */ +#define VO_MIN_CHN_HEIGHT 32 /* channel minimal height */ +#define VO_MAX_DEV_NUM 1 /* max dev num */ +#define VO_MAX_LAYER_NUM 1 /* max layer num */ +#define VO_MAX_PRIORITY 1 /* max layer priority */ +#define VO_MAX_CHN_NUM 1 /* max chn num */ +#define VO_MAX_LAYER_IN_DEV 1 /* max layer num of each dev */ +#define VO_MAX_GRAPHICS_LAYER_NUM 1 +#define VO_MIN_TOLERATE 1 /* min play toleration 1ms */ +#define VO_MAX_TOLERATE 100000 /* max play toleration 100s */ + +/* For AUDIO */ +#define AI_DEV_MAX_NUM 1 +#define AO_DEV_MIN_NUM 0 +#define AO_DEV_MAX_NUM 2 +#define AIO_MAX_NUM 2 +#define AENC_MAX_CHN_NUM 2 +#define ADEC_MAX_CHN_NUM 2 + +#define AI_MAX_CHN_NUM 2 +#define AO_MAX_CHN_NUM 1 +#define AO_SYSCHN_CHNID (AO_MAX_CHN_NUM - 1) + +#define AIO_MAX_CHN_NUM ((AO_MAX_CHN_NUM > AI_MAX_CHN_NUM) ? AO_MAX_CHN_NUM:AI_MAX_CHN_NUM) + +/* For VPSS */ +#define VPSS_IP_NUM 2 +#define VPSS_DEV_0 0 +#define VPSS_DEV_1 1 +#define VPSS_MAX_GRP_NUM 16 +#define VPSS_ONLINE_GRP_0 0 +#define VPSS_ONLINE_GRP_1 1 +#define VPSS_MAX_PHY_CHN_NUM 4 /* sc_d, sc_v1, sc_v2, sc_v3 */ +#define VPSS_MAX_CHN_NUM (VPSS_MAX_PHY_CHN_NUM) +#define VPSS_MIN_IMAGE_WIDTH 32 +#define VPSS_MAX_IMAGE_WIDTH 2880 +#define VPSS_MAX_IMAGE_HEIGHT 2880 +#define VPSS_MAX_ZOOMIN 32 +#define VPSS_MAX_ZOOMOUT 32 + +/*For Gdc*/ +#define LDC_ALIGN 64 +#define LDC_MIN_IMAGE_WIDTH 640 +#define LDC_MIN_IMAGE_HEIGHT 480 + +#define SPREAD_MIN_IMAGE_WIDTH 640 +#define SPREAD_MIN_IMAGE_HEIGHT 480 + +/* For GDC */ +#define GDC_IP_NUM 1 +#define GDC_PROC_JOB_INFO_NUM (500) + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __U_CVI_DEFINES_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_errno.h b/freertos/cvitek/install/include/common/cvi_errno.h new file mode 100644 index 000000000..9b2131ca0 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_errno.h @@ -0,0 +1,281 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_errno.h + * Description: + * error code definition. + */ + +#ifndef __CVI_ERRNO_H__ +#define __CVI_ERRNO_H__ + +#include "cvi_debug.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + + +#ifndef CVI_ERR_APPID +#define CVI_ERR_APPID (0x00000000UL) +#endif + +typedef enum _ERR_LEVEL_E { + EN_ERR_LEVEL_DEBUG = 0, /* debug-level */ + EN_ERR_LEVEL_INFO, /* informational */ + EN_ERR_LEVEL_NOTICE, /* normal but significant condition */ + EN_ERR_LEVEL_WARNING, /* warning conditions */ + EN_ERR_LEVEL_ERROR, /* error conditions */ + EN_ERR_LEVEL_CRIT, /* critical conditions */ + EN_ERR_LEVEL_ALERT, /* action must be taken immediately */ + EN_ERR_LEVEL_FATAL, /* just for compatibility with previous version */ + EN_ERR_LEVEL_BUTT +} ERR_LEVEL_E; + + +/****************************************************************************** */ +/*|----------------------------------------------------------------|*/ +/*| 11| APP_ID | MOD_ID | ERR_LEVEL | ERR_ID |*/ +/*|----------------------------------------------------------------|*/ +/*|<--><--6bits----><----8bits---><--3bits---><------13bits------->|*/ +/*******************************************************************************/ + +#define CVI_DEF_ERR(module, level, errid) \ + ((CVI_S32)(0xC0000000UL | (CVI_ERR_APPID) | ((module) << 16) | ((level) << 13) | (errid))) + +/* NOTE! the following defined all common error code, */ +/*** all module must reserved 0~63 for their common error code*/ + +typedef enum _EN_ERR_CODE_E { + EN_ERR_INVALID_DEVID = 1, /* invalid device ID */ + EN_ERR_INVALID_CHNID = 2, /* invalid channel ID*/ + EN_ERR_ILLEGAL_PARAM = 3, + /* at least one parameter is illegal*/ + /* eg, an illegal enumeration value */ + EN_ERR_EXIST = 4, /* resource exists*/ + EN_ERR_UNEXIST = 5, /* resource unexists */ + EN_ERR_NULL_PTR = 6, /* using a NULL point*/ + EN_ERR_NOT_CONFIG = 7, + /* try to enable or initialize system, device*/ + /* or channel, before configing attribute*/ + EN_ERR_NOT_SUPPORT = 8, + /* operation or type is not supported by NOW*/ + EN_ERR_NOT_PERM = 9, + /* operation is not permitted*/ + /* eg, try to change static attribute*/ + EN_ERR_INVALID_PIPEID = 10, + /* invalid pipe ID*/ + EN_ERR_INVALID_GRPID = 11, + /* invalid group ID*/ + EN_ERR_NOMEM = 12, + /* failure caused by malloc memory*/ + EN_ERR_NOBUF = 13, + /* failure caused by malloc buffer*/ + EN_ERR_BUF_EMPTY = 14, + /* no data in buffer */ + EN_ERR_BUF_FULL = 15, + /* no buffer for new data*/ + EN_ERR_SYS_NOTREADY = 16, + /* System is not ready, maybe not initialized or*/ + /* loaded. Returning the error code when opening*/ + /* a device file failed.*/ + EN_ERR_BADADDR = 17, + /* bad address,*/ + /* eg. used for copy_from_user & copy_to_user*/ + EN_ERR_BUSY = 18, + /* resource is busy,*/ + /* eg. destroy a venc chn without unregister it */ + EN_ERR_SIZE_NOT_ENOUGH = 19, + /* buffer size is smaller than the actual size required */ + EN_ERR_INVALID_VB = 20, + /* invalid VB handle */ + EN_ERR_BUTT = 63, + /* maximum code, private error code of all modules*/ + /* must be greater than it */ +} EN_ERR_CODE_E; + +typedef enum _EN_VI_ERR_CODE_E { + ERR_VI_FAILED_NOT_ENABLED = 64, /* device or channel not enable*/ + ERR_VI_FAILED_NOT_DISABLED, /* device not disable*/ + ERR_VI_FAILED_CHN_NOT_DISABLED, /* channel not disable*/ + ERR_VI_CFG_TIMEOUT, /* config timeout*/ + ERR_VI_NORM_UNMATCH, /* video norm of ADC and VIU is unmatch*/ + ERR_VI_INVALID_PHYCHNID, /* invalid phychn id*/ + ERR_VI_FAILED_NOTBIND, /* device or channel not bind */ + ERR_VI_FAILED_BINDED, /* device or channel not unbind */ + ERR_VI_DIS_PROCESS_FAIL /* dis process failed */ +} EN_VI_ERR_CODE_E; + +typedef enum _EN_VOU_ERR_CODE_E { + EN_ERR_VO_DEV_NOT_CONFIG = 0x40, + EN_ERR_VO_DEV_NOT_ENABLED = 0x41, + EN_ERR_VO_DEV_HAS_ENABLED = 0x42, + + EN_ERR_VO_LAYER_NOT_ENABLED = 0x45, + EN_ERR_VO_LAYER_NOT_DISABLED = 0x46, + EN_ERR_VO_LAYER_NOT_CONFIG = 0x47, + + EN_ERR_VO_CHN_NOT_DISABLED = 0x48, + EN_ERR_VO_CHN_NOT_ENABLED = 0x49, + EN_ERR_VO_CHN_NOT_CONFIG = 0x4a, + + EN_ERR_VO_WAIT_TIMEOUT = 0x4e, + EN_ERR_VO_INVALID_VFRAME = 0x4f, + EN_ERR_VO_INVALID_RECT_PARA = 0x50, + + EN_ERR_VO_CHN_AREA_OVERLAP = 0x65, + + EN_ERR_VO_INVALID_LAYERID = 0x66, + + /* new added */ + ERR_VO_BUTT +} EN_VOU_ERR_CODE_E; + +#define CVI_ERR_SYS_NULL_PTR CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) +#define CVI_ERR_SYS_NOTREADY CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) +#define CVI_ERR_SYS_NOT_PERM CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) +#define CVI_ERR_SYS_NOMEM CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) +#define CVI_ERR_SYS_ILLEGAL_PARAM CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) +#define CVI_ERR_SYS_BUSY CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) +#define CVI_ERR_SYS_NOT_SUPPORT CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) +#define CVI_ERR_SYS_REMAPPING CVI_DEF_ERR(CVI_ID_SYS, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF) + +#define CVI_ERR_VB_NULL_PTR CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) +#define CVI_ERR_VB_INVALID CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_VB) +#define CVI_ERR_VB_NOMEM CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) +#define CVI_ERR_VB_NOBUF CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF) +#define CVI_ERR_VB_UNEXIST CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST) +#define CVI_ERR_VB_ILLEGAL_PARAM CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) +#define CVI_ERR_VB_NOTREADY CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) +#define CVI_ERR_VB_BUSY CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) +#define CVI_ERR_VB_NOT_PERM CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) +#define CVI_ERR_VB_SIZE_NOT_ENOUGH CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_SIZE_NOT_ENOUGH) +#define CVI_ERR_VB_2MPOOLS CVI_DEF_ERR(CVI_ID_VB, EN_ERR_LEVEL_ERROR, EN_ERR_BUTT + 1) + +#define CVI_ERR_VI_INVALID_PARA CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) +#define CVI_ERR_VI_INVALID_DEVID CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID) +#define CVI_ERR_VI_INVALID_PIPEID CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_PIPEID) +#define CVI_ERR_VI_INVALID_CHNID CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID) +#define CVI_ERR_VI_INVALID_NULL_PTR CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) +#define CVI_ERR_VI_FAILED_NOTCONFIG CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG) +#define CVI_ERR_VI_SYS_NOTREADY CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) +#define CVI_ERR_VI_BUF_EMPTY CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY) +#define CVI_ERR_VI_BUF_FULL CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL) +#define CVI_ERR_VI_NOMEM CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) +#define CVI_ERR_VI_NOT_SUPPORT CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) +#define CVI_ERR_VI_BUSY CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) +#define CVI_ERR_VI_NOT_PERM CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) +#define CVI_ERR_VI_FAILED_NOT_ENABLED CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOT_ENABLED) +#define CVI_ERR_VI_FAILED_NOT_DISABLED CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOT_DISABLED) +#define CVI_ERR_VI_FAILED_CHN_NOT_DISABLED CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_CHN_NOT_DISABLED) +#define CVI_ERR_VI_CFG_TIMEOUT CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_CFG_TIMEOUT) +#define CVI_ERR_VI_NORM_UNMATCH CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_NORM_UNMATCH) +#define CVI_ERR_VI_INVALID_PHYCHNID CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_INVALID_PHYCHNID) +#define CVI_ERR_VI_FAILED_NOTBIND CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_NOTBIND) +#define CVI_ERR_VI_FAILED_BINDED CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, ERR_VI_FAILED_BINDED) +#define CVI_ERR_VI_PIPE_EXIST CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST) +#define CVI_ERR_VI_PIPE_UNEXIST CVI_DEF_ERR(CVI_ID_VI, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST) + +#define CVI_ERR_VPSS_NULL_PTR CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) +#define CVI_ERR_VPSS_NOTREADY CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) +#define CVI_ERR_VPSS_INVALID_DEVID CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID) +#define CVI_ERR_VPSS_INVALID_CHNID CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID) +#define CVI_ERR_VPSS_EXIST CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST) +#define CVI_ERR_VPSS_UNEXIST CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST) +#define CVI_ERR_VPSS_NOT_SUPPORT CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) +#define CVI_ERR_VPSS_NOT_PERM CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) +#define CVI_ERR_VPSS_NOMEM CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) +#define CVI_ERR_VPSS_NOBUF CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF) +#define CVI_ERR_VPSS_ILLEGAL_PARAM CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) +#define CVI_ERR_VPSS_BUSY CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) +#define CVI_ERR_VPSS_BUF_EMPTY CVI_DEF_ERR(CVI_ID_VPSS, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY) + +/* System define error code */ +#define CVI_ERR_VO_BUSY CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) +#define CVI_ERR_VO_NO_MEM CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) +#define CVI_ERR_VO_NULL_PTR CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) +#define CVI_ERR_VO_SYS_NOTREADY CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) +#define CVI_ERR_VO_INVALID_DEVID CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID) +#define CVI_ERR_VO_INVALID_CHNID CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID) +#define CVI_ERR_VO_ILLEGAL_PARAM CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) +#define CVI_ERR_VO_NOT_SUPPORT CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) +#define CVI_ERR_VO_NOT_PERMIT CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) +#define CVI_ERR_VO_INVALID_LAYERID CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_INVALID_LAYERID) +/* Device relative error code */ +#define CVI_ERR_VO_DEV_NOT_CONFIG CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_NOT_CONFIG) +#define CVI_ERR_VO_DEV_NOT_ENABLED CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_NOT_ENABLED) +#define CVI_ERR_VO_DEV_HAS_ENABLED CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_DEV_HAS_ENABLED) +/* Video layer relative error code */ +#define CVI_ERR_VO_VIDEO_NOT_ENABLED CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_LAYER_NOT_ENABLED) +#define CVI_ERR_VO_VIDEO_NOT_DISABLED CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_LAYER_NOT_DISABLED) +#define CVI_ERR_VO_VIDEO_NOT_CONFIG CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_LAYER_NOT_CONFIG) +/* Channel Relative error code */ +#define CVI_ERR_VO_CHN_NOT_DISABLED CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_CHN_NOT_DISABLED) +#define CVI_ERR_VO_CHN_NOT_ENABLED CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_CHN_NOT_ENABLED) +#define CVI_ERR_VO_CHN_NOT_CONFIG CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_CHN_NOT_CONFIG) +#define CVI_ERR_VO_CHN_AREA_OVERLAP CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_CHN_AREA_OVERLAP) +/* MISCellaneous error code*/ +#define CVI_ERR_VO_WAIT_TIMEOUT CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_WAIT_TIMEOUT) +#define CVI_ERR_VO_INVALID_VFRAME CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_INVALID_VFRAME) +#define CVI_ERR_VO_INVALID_RECT_PARA CVI_DEF_ERR(CVI_ID_VO, EN_ERR_LEVEL_ERROR, EN_ERR_VO_INVALID_RECT_PARA) + +/* failure caused by malloc buffer */ +#define CVI_ERR_GDC_NOBUF CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF) +#define CVI_ERR_GDC_NOMEM CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) +#define CVI_ERR_GDC_BUF_EMPTY CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY) +#define CVI_ERR_GDC_NULL_PTR CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) +#define CVI_ERR_GDC_ILLEGAL_PARAM CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) +#define CVI_ERR_GDC_BUF_FULL CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL) +#define CVI_ERR_GDC_SYS_NOTREADY CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) +#define CVI_ERR_GDC_NOT_SUPPORT CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) +#define CVI_ERR_GDC_NOT_PERMITTED CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) +#define CVI_ERR_GDC_BUSY CVI_DEF_ERR(CVI_ID_GDC, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) + +#define CVI_ERR_RGN_SYS_NOTREADY CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) +/* PingPong buffer change when set attr, it needs to remap memory */ +#define CVI_NOTICE_RGN_BUFFER_CHANGE CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_NOTICE, CVI_SUCCESS) +/* invalid device ID */ +#define CVI_ERR_RGN_INVALID_DEVID CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_DEVID) +/* invalid channel ID */ +#define CVI_ERR_RGN_INVALID_CHNID CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID) +/* at least one parameter is illegal ,eg, an illegal enumeration value */ +#define CVI_ERR_RGN_ILLEGAL_PARAM CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) +/* channel exists */ +#define CVI_ERR_RGN_EXIST CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST) +/* region unexist */ +#define CVI_ERR_RGN_UNEXIST CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST) +/* using a NULL point */ +#define CVI_ERR_RGN_NULL_PTR CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) +/* try to enable or initialize system, device or channel, before config attribute */ +#define CVI_ERR_RGN_NOT_CONFIG CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG) +/* operation is not supported by NOW */ +#define CVI_ERR_RGN_NOT_SUPPORT CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) +/* operation is not permitted ,eg, try to change static attribute */ +#define CVI_ERR_RGN_NOT_PERM CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM) +/* failure caused by malloc memory */ +#define CVI_ERR_RGN_NOMEM CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM) +/* failure caused by malloc buffer */ +#define CVI_ERR_RGN_NOBUF CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF) +/* no data in buffer */ +#define CVI_ERR_RGN_BUF_EMPTY CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY) +/* no buffer for new data */ +#define CVI_ERR_RGN_BUF_FULL CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL) +/* bad address, eg. used for copy_from_user & copy_to_user */ +#define CVI_ERR_RGN_BADADDR CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BADADDR) +/* resource is busy, eg. destroy a venc chn without unregistering it */ +#define CVI_ERR_RGN_BUSY CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY) +/* System is not ready,maybe not initialized or loaded. + * Returning the error code when opening a device file failed. + */ +#define CVI_ERR_RGN_NOTREADY CVI_DEF_ERR(CVI_ID_RGN, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY) + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_ERRNO_H__ */ + diff --git a/freertos/cvitek/install/include/common/cvi_isp.h b/freertos/cvitek/install/include/common/cvi_isp.h new file mode 100644 index 000000000..08b52a8b9 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_isp.h @@ -0,0 +1,324 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2022. All rights reserved. + * + * File Name: include/cvi_isp.h + * Description: + */ + +#ifndef __CVI_ISP_H__ +#define __CVI_ISP_H__ + +#include "stdio.h" + +#include "cvi_comm_isp.h" +#include "cvi_comm_3a.h" +#include "cvi_comm_sns.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +/* Firmware Main Operation */ +CVI_S32 CVI_ISP_Init(VI_PIPE ViPipe); +CVI_S32 CVI_ISP_MemInit(VI_PIPE ViPipe); +CVI_S32 CVI_ISP_Run(VI_PIPE ViPipe); +CVI_S32 CVI_ISP_RunOnce(VI_PIPE ViPipe); +CVI_S32 CVI_ISP_Exit(VI_PIPE ViPipe); + +/* Each Param set / get Operation */ +CVI_S32 CVI_ISP_SetPubAttr(VI_PIPE ViPipe, const ISP_PUB_ATTR_S *pstPubAttr); +CVI_S32 CVI_ISP_GetPubAttr(VI_PIPE ViPipe, ISP_PUB_ATTR_S *pstPubAttr); +CVI_S32 CVI_ISP_SetModParam(const ISP_MOD_PARAM_S *pstModParam); +CVI_S32 CVI_ISP_GetModParam(ISP_MOD_PARAM_S *pstModParam); +CVI_S32 CVI_ISP_SetCtrlParam(VI_PIPE ViPipe, + const ISP_CTRL_PARAM_S *pstIspCtrlParam); +CVI_S32 CVI_ISP_GetCtrlParam(VI_PIPE ViPipe, ISP_CTRL_PARAM_S *pstIspCtrlParam); +CVI_S32 CVI_ISP_SetFMWState(VI_PIPE ViPipe, const ISP_FMW_STATE_E enState); +CVI_S32 CVI_ISP_GetFMWState(VI_PIPE ViPipe, ISP_FMW_STATE_E *penState); +/* sensor related register */ +CVI_S32 CVI_ISP_SensorRegCallBack(VI_PIPE ViPipe, + ISP_SNS_ATTR_INFO_S *pstSnsAttrInfo, ISP_SENSOR_REGISTER_S *pstRegister); +CVI_S32 CVI_ISP_SensorUnRegCallBack(VI_PIPE ViPipe, SENSOR_ID SensorId); + +/* 3a algo &static related function. */ +CVI_S32 CVI_AWB_Register(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib); +CVI_S32 CVI_AWB_UnRegister(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib); + +CVI_S32 CVI_ISP_AELibRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, + ISP_AE_REGISTER_S *pstRegister); +CVI_S32 CVI_ISP_AELibUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib); + +CVI_S32 CVI_ISP_AWBLibRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib, + ISP_AWB_REGISTER_S *pstRegister); +CVI_S32 CVI_ISP_AWBLibUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib); + +CVI_S32 CVI_ISP_AFLibRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAfLib, + ISP_AF_REGISTER_S *pstRegister); +CVI_S32 CVI_ISP_AFLibUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib); + +CVI_S32 CVI_ISP_SetBindAttr(VI_PIPE ViPipe, const ISP_BIND_ATTR_S *pstBindAttr); +CVI_S32 CVI_ISP_GetBindAttr(VI_PIPE ViPipe, ISP_BIND_ATTR_S *pstBindAttr); + +CVI_S32 CVI_ISP_SetModuleControl(VI_PIPE ViPipe, const ISP_MODULE_CTRL_U *punModCtrl); +CVI_S32 CVI_ISP_GetModuleControl(VI_PIPE ViPipe, ISP_MODULE_CTRL_U *punModCtrl); +CVI_S32 CVI_ISP_SetRegister(VI_PIPE ViPipe, CVI_U32 u32Addr, CVI_U32 u32Value); +CVI_S32 CVI_ISP_GetRegister(VI_PIPE ViPipe, CVI_U32 u32Addr, CVI_U32 *pu32Value); + +//----------------------------------------------------------------------------- +// Black Level Correction(BLC) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetBlackLevelAttr(VI_PIPE ViPipe, const ISP_BLACK_LEVEL_ATTR_S *pstBlackLevelAttr); +CVI_S32 CVI_ISP_GetBlackLevelAttr(VI_PIPE ViPipe, ISP_BLACK_LEVEL_ATTR_S *pstBlackLevelAttr); + +//----------------------------------------------------------------------------- +// Dead pixel correction(DPC) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetDPDynamicAttr(VI_PIPE ViPipe, const ISP_DP_DYNAMIC_ATTR_S *pstDPCDynamicAttr); +CVI_S32 CVI_ISP_GetDPDynamicAttr(VI_PIPE ViPipe, ISP_DP_DYNAMIC_ATTR_S *pstDPCDynamicAttr); +CVI_S32 CVI_ISP_SetDPStaticAttr(VI_PIPE ViPipe, const ISP_DP_STATIC_ATTR_S *pstDPStaticAttr); +CVI_S32 CVI_ISP_GetDPStaticAttr(VI_PIPE ViPipe, ISP_DP_STATIC_ATTR_S *pstDPStaticAttr); +CVI_S32 CVI_ISP_SetDPCalibrate(VI_PIPE ViPipe, const ISP_DP_CALIB_ATTR_S *pstDPCalibAttr); +CVI_S32 CVI_ISP_GetDPCalibrate(VI_PIPE ViPipe, ISP_DP_CALIB_ATTR_S *pstDPCalibAttr); + +//----------------------------------------------------------------------------- +// Crosstalk +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetCrosstalkAttr(VI_PIPE ViPipe, const ISP_CROSSTALK_ATTR_S *pstCrosstalkAttr); +CVI_S32 CVI_ISP_GetCrosstalkAttr(VI_PIPE ViPipe, ISP_CROSSTALK_ATTR_S *pstCrosstalkAttr); + +//----------------------------------------------------------------------------- +// Bayer domain noise reduction (BNR) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetNRAttr(VI_PIPE ViPipe, const ISP_NR_ATTR_S *pstNRAttr); +CVI_S32 CVI_ISP_GetNRAttr(VI_PIPE ViPipe, ISP_NR_ATTR_S *pstNRAttr); +CVI_S32 CVI_ISP_SetNRFilterAttr(VI_PIPE ViPipe, const ISP_NR_FILTER_ATTR_S *pstNRFilterAttr); +CVI_S32 CVI_ISP_GetNRFilterAttr(VI_PIPE ViPipe, ISP_NR_FILTER_ATTR_S *pstNRFilterAttr); + +//----------------------------------------------------------------------------- +// Demosaic +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetDemosaicAttr(VI_PIPE ViPipe, const ISP_DEMOSAIC_ATTR_S *pstDemosaicAttr); +CVI_S32 CVI_ISP_GetDemosaicAttr(VI_PIPE ViPipe, ISP_DEMOSAIC_ATTR_S *pstDemosaicAttr); +CVI_S32 CVI_ISP_SetDemosaicDemoireAttr(VI_PIPE ViPipe, const ISP_DEMOSAIC_DEMOIRE_ATTR_S *pstDemosaicDemoireAttr); +CVI_S32 CVI_ISP_GetDemosaicDemoireAttr(VI_PIPE ViPipe, ISP_DEMOSAIC_DEMOIRE_ATTR_S *pstDemosaicDemoireAttr); + +//----------------------------------------------------------------------------- +// RGBCAC +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetRGBCACAttr(VI_PIPE ViPipe, const ISP_RGBCAC_ATTR_S *pstRGBCACAttr); +CVI_S32 CVI_ISP_GetRGBCACAttr(VI_PIPE ViPipe, ISP_RGBCAC_ATTR_S *pstRGBCACAttr); + +//----------------------------------------------------------------------------- +// LCAC +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetLCACAttr(VI_PIPE ViPipe, const ISP_LCAC_ATTR_S *pstLCACAttr); +CVI_S32 CVI_ISP_GetLCACAttr(VI_PIPE ViPipe, ISP_LCAC_ATTR_S *pstLCACAttr); + +//----------------------------------------------------------------------------- +// Mesh lens shading correction (MLSC) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetMeshShadingAttr(VI_PIPE ViPipe, const ISP_MESH_SHADING_ATTR_S *pstMeshShadingAttr); +CVI_S32 CVI_ISP_GetMeshShadingAttr(VI_PIPE ViPipe, ISP_MESH_SHADING_ATTR_S *pstMeshShadingAttr); +CVI_S32 CVI_ISP_SetMeshShadingGainLutAttr(VI_PIPE ViPipe, + const ISP_MESH_SHADING_GAIN_LUT_ATTR_S *pstMeshShadingGainLutAttr); +CVI_S32 CVI_ISP_GetMeshShadingGainLutAttr(VI_PIPE ViPipe, + ISP_MESH_SHADING_GAIN_LUT_ATTR_S *pstMeshShadingGainLutAttr); + +//----------------------------------------------------------------------------- +// CCM +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetSaturationAttr(VI_PIPE ViPipe, const ISP_SATURATION_ATTR_S *pstSaturationAttr); +CVI_S32 CVI_ISP_GetSaturationAttr(VI_PIPE ViPipe, ISP_SATURATION_ATTR_S *pstSaturationAttr); +CVI_S32 CVI_ISP_SetCCMSaturationAttr(VI_PIPE ViPipe, const ISP_CCM_SATURATION_ATTR_S *pstCCMSaturationAttr); +CVI_S32 CVI_ISP_GetCCMSaturationAttr(VI_PIPE ViPipe, ISP_CCM_SATURATION_ATTR_S *pstCCMSaturationAttr); +CVI_S32 CVI_ISP_SetCCMAttr(VI_PIPE ViPipe, const ISP_CCM_ATTR_S *pstCCMAttr); +CVI_S32 CVI_ISP_GetCCMAttr(VI_PIPE ViPipe, ISP_CCM_ATTR_S *pstCCMAttr); + +//----------------------------------------------------------------------------- +// CSC +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetCSCAttr(VI_PIPE ViPipe, const ISP_CSC_ATTR_S *pstCSCAttr); +CVI_S32 CVI_ISP_GetCSCAttr(VI_PIPE ViPipe, ISP_CSC_ATTR_S *pstCSCAttr); + +//----------------------------------------------------------------------------- +// Color tone +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetColorToneAttr(VI_PIPE ViPipe, + const ISP_COLOR_TONE_ATTR_S *pstColorToneAttr); +CVI_S32 CVI_ISP_GetColorToneAttr(VI_PIPE ViPipe, ISP_COLOR_TONE_ATTR_S *pstColorToneAttr); + +//----------------------------------------------------------------------------- +// FSWDR +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetFSWDRAttr(VI_PIPE ViPipe, const ISP_FSWDR_ATTR_S *pstFSWDRAttr); +CVI_S32 CVI_ISP_GetFSWDRAttr(VI_PIPE ViPipe, ISP_FSWDR_ATTR_S *pstFSWDRAttr); + +//----------------------------------------------------------------------------- +// DRC +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetDRCAttr(VI_PIPE ViPipe, const ISP_DRC_ATTR_S *pstDRCAttr); +CVI_S32 CVI_ISP_GetDRCAttr(VI_PIPE ViPipe, ISP_DRC_ATTR_S *pstDRCAttr); + +//----------------------------------------------------------------------------- +// Gamma +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetGammaAttr(VI_PIPE ViPipe, const ISP_GAMMA_ATTR_S *pstGammaAttr); +CVI_S32 CVI_ISP_GetGammaAttr(VI_PIPE ViPipe, ISP_GAMMA_ATTR_S *pstGammaAttr); +CVI_S32 CVI_ISP_GetGammaCurveByType(VI_PIPE ViPipe, ISP_GAMMA_ATTR_S *pstGammaAttr, + const ISP_GAMMA_CURVE_TYPE_E curveType); +CVI_S32 CVI_ISP_SetAutoGammaAttr(VI_PIPE ViPipe, const ISP_AUTO_GAMMA_ATTR_S *pstGammaAttr); +CVI_S32 CVI_ISP_GetAutoGammaAttr(VI_PIPE ViPipe, ISP_AUTO_GAMMA_ATTR_S *pstGammaAttr); + +//----------------------------------------------------------------------------- +// Dehaze +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetDehazeAttr(VI_PIPE ViPipe, + const ISP_DEHAZE_ATTR_S *pstDehazeAttr); +CVI_S32 CVI_ISP_GetDehazeAttr(VI_PIPE ViPipe, ISP_DEHAZE_ATTR_S *pstDehazeAttr); + +//----------------------------------------------------------------------------- +// CLUT +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetClutAttr(VI_PIPE ViPipe, const ISP_CLUT_ATTR_S *pstClutAttr); +CVI_S32 CVI_ISP_GetClutAttr(VI_PIPE ViPipe, ISP_CLUT_ATTR_S *pstClutAttr); +CVI_S32 CVI_ISP_SetClutSaturationAttr(VI_PIPE ViPipe, const ISP_CLUT_SATURATION_ATTR_S *pstClutSaturationAttr); +CVI_S32 CVI_ISP_GetClutSaturationAttr(VI_PIPE ViPipe, ISP_CLUT_SATURATION_ATTR_S *pstClutSaturationAttr); + +//----------------------------------------------------------------------------- +// DCI +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetDCIAttr(VI_PIPE ViPipe, const ISP_DCI_ATTR_S *pstDCIAttr); +CVI_S32 CVI_ISP_GetDCIAttr(VI_PIPE ViPipe, ISP_DCI_ATTR_S *pstDCIAttr); + +//----------------------------------------------------------------------------- +// LDCI +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetLDCIAttr(VI_PIPE ViPipe, const ISP_LDCI_ATTR_S *pstLDCIAttr); +CVI_S32 CVI_ISP_GetLDCIAttr(VI_PIPE ViPipe, ISP_LDCI_ATTR_S *pstLDCIAttr); + +//----------------------------------------------------------------------------- +// CA (CA/CP) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetCAAttr(VI_PIPE ViPipe, const ISP_CA_ATTR_S *pstCAAttr); +CVI_S32 CVI_ISP_GetCAAttr(VI_PIPE ViPipe, ISP_CA_ATTR_S *pstCAAttr); + +//----------------------------------------------------------------------------- +// CA2 +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetCA2Attr(VI_PIPE ViPipe, const ISP_CA2_ATTR_S *pstCA2Attr); +CVI_S32 CVI_ISP_GetCA2Attr(VI_PIPE ViPipe, ISP_CA2_ATTR_S *pstCA2Attr); + +//----------------------------------------------------------------------------- +// PreSharpen +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetPreSharpenAttr(VI_PIPE ViPipe, const ISP_PRESHARPEN_ATTR_S *pstPreSharpenAttr); +CVI_S32 CVI_ISP_GetPreSharpenAttr(VI_PIPE ViPipe, ISP_PRESHARPEN_ATTR_S *pstPreSharpenAttr); + +//----------------------------------------------------------------------------- +// Time-domain noise reduction (TNR) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetTNRAttr(VI_PIPE ViPipe, const ISP_TNR_ATTR_S *pstTNRAttr); +CVI_S32 CVI_ISP_GetTNRAttr(VI_PIPE ViPipe, ISP_TNR_ATTR_S *pstTNRAttr); +CVI_S32 CVI_ISP_SetTNRNoiseModelAttr(VI_PIPE ViPipe, const ISP_TNR_NOISE_MODEL_ATTR_S *pstTNRNoiseModelAttr); +CVI_S32 CVI_ISP_GetTNRNoiseModelAttr(VI_PIPE ViPipe, ISP_TNR_NOISE_MODEL_ATTR_S *pstTNRNoiseModelAttr); +CVI_S32 CVI_ISP_SetTNRLumaMotionAttr(VI_PIPE ViPipe, const ISP_TNR_LUMA_MOTION_ATTR_S *pstTNRLumaMotionAttr); +CVI_S32 CVI_ISP_GetTNRLumaMotionAttr(VI_PIPE ViPipe, ISP_TNR_LUMA_MOTION_ATTR_S *pstTNRLumaMotionAttr); +CVI_S32 CVI_ISP_SetTNRGhostAttr(VI_PIPE ViPipe, const ISP_TNR_GHOST_ATTR_S *pstTNRGhostAttr); +CVI_S32 CVI_ISP_GetTNRGhostAttr(VI_PIPE ViPipe, ISP_TNR_GHOST_ATTR_S *pstTNRGhostAttr); +CVI_S32 CVI_ISP_SetTNRMtPrtAttr(VI_PIPE ViPipe, const ISP_TNR_MT_PRT_ATTR_S *pstTNRMtPrtAttr); +CVI_S32 CVI_ISP_GetTNRMtPrtAttr(VI_PIPE ViPipe, ISP_TNR_MT_PRT_ATTR_S *pstTNRMtPrtAttr); +CVI_S32 CVI_ISP_SetTNRMotionAdaptAttr(VI_PIPE ViPipe, const ISP_TNR_MOTION_ADAPT_ATTR_S *pstTNRMotionAdaptAttr); +CVI_S32 CVI_ISP_GetTNRMotionAdaptAttr(VI_PIPE ViPipe, ISP_TNR_MOTION_ADAPT_ATTR_S *pstTNRMotionAdaptAttr); + +//----------------------------------------------------------------------------- +// Y domain noise reduction (YNR) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetYNRAttr(VI_PIPE ViPipe, const ISP_YNR_ATTR_S *pstYNRAttr); +CVI_S32 CVI_ISP_GetYNRAttr(VI_PIPE ViPipe, ISP_YNR_ATTR_S *pstYNRAttr); +CVI_S32 CVI_ISP_SetYNRMotionNRAttr(VI_PIPE ViPipe, const ISP_YNR_MOTION_NR_ATTR_S *pstYNRMotionNRAttr); +CVI_S32 CVI_ISP_GetYNRMotionNRAttr(VI_PIPE ViPipe, ISP_YNR_MOTION_NR_ATTR_S *pstYNRMotionNRAttr); +CVI_S32 CVI_ISP_SetYNRFilterAttr(VI_PIPE ViPipe, const ISP_YNR_FILTER_ATTR_S *pstYNRFilterAttr); +CVI_S32 CVI_ISP_GetYNRFilterAttr(VI_PIPE ViPipe, ISP_YNR_FILTER_ATTR_S *pstYNRFilterAttr); + +//----------------------------------------------------------------------------- +// UV domain noise reduction (CNR) +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetCNRAttr(VI_PIPE ViPipe, const ISP_CNR_ATTR_S *pstCNRAttr); +CVI_S32 CVI_ISP_GetCNRAttr(VI_PIPE ViPipe, ISP_CNR_ATTR_S *pstCNRAttr); +CVI_S32 CVI_ISP_SetCNRMotionNRAttr(VI_PIPE ViPipe, const ISP_CNR_MOTION_NR_ATTR_S *pstCNRMotionNRAttr); +CVI_S32 CVI_ISP_GetCNRMotionNRAttr(VI_PIPE ViPipe, ISP_CNR_MOTION_NR_ATTR_S *pstCNRMotionNRAttr); + +//----------------------------------------------------------------------------- +// CAC +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetCACAttr(VI_PIPE ViPipe, const ISP_CAC_ATTR_S *pstCACAttr); +CVI_S32 CVI_ISP_GetCACAttr(VI_PIPE ViPipe, ISP_CAC_ATTR_S *pstCACAttr); + +//----------------------------------------------------------------------------- +// Sharpen +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetSharpenAttr(VI_PIPE ViPipe, const ISP_SHARPEN_ATTR_S *pstSharpenAttr); +CVI_S32 CVI_ISP_GetSharpenAttr(VI_PIPE ViPipe, ISP_SHARPEN_ATTR_S *pstSharpenAttr); + +//----------------------------------------------------------------------------- +// Y Contrast +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetYContrastAttr(VI_PIPE ViPipe, const ISP_YCONTRAST_ATTR_S *pstYContrastAttr); +CVI_S32 CVI_ISP_GetYContrastAttr(VI_PIPE ViPipe, ISP_YCONTRAST_ATTR_S *pstYContrastAttr); + +//----------------------------------------------------------------------------- +// Mono +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetMonoAttr(VI_PIPE ViPipe, const ISP_MONO_ATTR_S *pstMonoAttr); +CVI_S32 CVI_ISP_GetMonoAttr(VI_PIPE ViPipe, ISP_MONO_ATTR_S *pstMonoAttr); + + +CVI_S32 CVI_ISP_SetStatisticsConfig(VI_PIPE ViPipe, const ISP_STATISTICS_CFG_S *pstStatCfg); +CVI_S32 CVI_ISP_GetStatisticsConfig(VI_PIPE ViPipe, ISP_STATISTICS_CFG_S *pstStatCfg); +CVI_S32 CVI_ISP_GetAEStatistics(VI_PIPE ViPipe, ISP_AE_STATISTICS_S *pstAeStat); +CVI_S32 CVI_ISP_GetWBStatistics(VI_PIPE ViPipe, ISP_WB_STATISTICS_S *pstWBStat); +CVI_S32 CVI_ISP_GetFocusStatistics(VI_PIPE ViPipe, ISP_AF_STATISTICS_S *pstAfStat); +CVI_S32 CVI_ISP_GetLightboxGain(VI_PIPE ViPipe, ISP_AWB_LightBox_Gain_S *pstAWBLightBoxGain); + +CVI_S32 CVI_ISP_SetNoiseProfileAttr(VI_PIPE ViPipe, const ISP_CMOS_NOISE_CALIBRATION_S *pstNoiseProfileAttr); +CVI_S32 CVI_ISP_GetNoiseProfileAttr(VI_PIPE ViPipe, ISP_CMOS_NOISE_CALIBRATION_S *pstNoiseProfileAttr); + +/* MIPI related function. */ +CVI_S32 CVI_MIPI_SetMipiReset(CVI_S32 devno, CVI_U32 reset); +CVI_S32 CVI_MIPI_SetSensorClock(CVI_S32 devno, CVI_U32 enable); +CVI_S32 CVI_MIPI_SetSensorReset(CVI_S32 devno, CVI_U32 reset); +CVI_S32 CVI_MIPI_SetMipiAttr(CVI_S32 ViPipe, const CVI_VOID *devAttr); +CVI_S32 CVI_MIPI_SetClkEdge(CVI_S32 devno, CVI_U32 is_up); +CVI_S32 CVI_MIPI_SetSnsMclk(SNS_MCLK_S *mclk); + +CVI_S32 CVI_ISP_QueryInnerStateInfo(VI_PIPE ViPipe, ISP_INNER_STATE_INFO_S *pstInnerStateInfo); +CVI_S32 CVI_ISP_GetVDTimeOut(VI_PIPE ViPipe, ISP_VD_TYPE_E enIspVDType, CVI_U32 u32MilliSec); +//CVI_S32 CVI_ISP_GetAEStitchStatistics(VI_PIPE ViPipe, ISP_AE_STITCH_STATISTICS_S *pstStitchStat); +//CVI_S32 CVI_ISP_GetMGStatistics(VI_PIPE ViPipe, ISP_MG_STATISTICS_S *pstMgStat); +//CVI_S32 CVI_ISP_GetWBStitchStatistics(VI_PIPE ViPipe, ISP_WB_STITCH_STATISTICS_S *pstStitchWBStat); + +CVI_S32 CVI_ISP_SetDisAttr(VI_PIPE ViPipe, const ISP_DIS_ATTR_S *pstDisAttr); +CVI_S32 CVI_ISP_GetDisAttr(VI_PIPE ViPipe, ISP_DIS_ATTR_S *pstDisAttr); +CVI_S32 CVI_ISP_SetDisConfig(VI_PIPE ViPipe, const ISP_DIS_CONFIG_S *pstDisConfig); +CVI_S32 CVI_ISP_GetDisConfig(VI_PIPE ViPipe, ISP_DIS_CONFIG_S *pstDisConfig); + +CVI_S32 CVI_ISP_SetVCAttr(VI_PIPE ViPipe, const ISP_VC_ATTR_S *pstVCAttr); +CVI_S32 CVI_ISP_GetVCAttr(VI_PIPE ViPipe, ISP_VC_ATTR_S *pstVCAttr); + +CVI_S32 CVI_ISP_DumpHwRegisterToFile(VI_PIPE ViPipe, FILE *fp); +CVI_S32 CVI_ISP_DumpFrameRawInfoToFile(VI_PIPE ViPipe, FILE *fp); + +CVI_S32 CVI_ISP_IrAutoRunOnce(ISP_DEV IspDev, ISP_IR_AUTO_ATTR_S *pstIrAttr); + +CVI_S32 CVI_ISP_SetSmartInfo(VI_PIPE ViPipe, const ISP_SMART_INFO_S *pstSmartInfo, CVI_U8 TimeOut); +CVI_S32 CVI_ISP_GetSmartInfo(VI_PIPE ViPipe, ISP_SMART_INFO_S *pstSmartInfo); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /*__CVI_ISP_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_list.h b/freertos/cvitek/install/include/common/cvi_list.h new file mode 100644 index 000000000..92839b9c9 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_list.h @@ -0,0 +1,344 @@ +#ifndef CVI_LIST_H +#define CVI_LIST_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Get offset of a member variable. + * + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the variable within the struct. + */ +#define cvi_offsetof(type, member) ((size_t)&(((type *)0)->member)) + +/* + * Get the struct for this entry. + * + * @param[in] ptr the list head to take the element from. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the variable within the struct. + */ +#define cvi_container_of(ptr, type, member) \ + ((type *) ((char *) (ptr) - cvi_offsetof(type, member))) + +/* for double link list */ +typedef struct dlist_s { + struct dlist_s *prev; + struct dlist_s *next; +} dlist_t; + +static inline void __dlist_add(dlist_t *node, dlist_t *prev, dlist_t *next) +{ + node->next = next; + node->prev = prev; + + prev->next = node; + next->prev = node; +} + +/* + * Get the struct for this entry. + * + * @param[in] addr the list head to take the element from. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the dlist_t within the struct. + */ +#define dlist_entry(addr, type, member) \ + ((type *)((long)addr - cvi_offsetof(type, member))) + + +static inline void dlist_add(dlist_t *node, dlist_t *queue) +{ + __dlist_add(node, queue, queue->next); +} + +static inline void dlist_add_tail(dlist_t *node, dlist_t *queue) +{ + __dlist_add(node, queue->prev, queue); +} + +static inline void dlist_del(dlist_t *node) +{ + dlist_t *prev = node->prev; + dlist_t *next = node->next; + + prev->next = next; + next->prev = prev; +} + +static inline void dlist_init(dlist_t *node) +{ + node->next = node->prev = node; +} + +static inline void INIT_CVI_DLIST_HEAD(dlist_t *list) +{ + list->next = list; + list->prev = list; +} + +static inline int dlist_empty(const dlist_t *head) +{ + return head->next == head; +} + +/* + * Initialise the list. + * + * @param[in] list the list to be inited. + */ +#define CVI_DLIST_INIT(list) {&(list), &(list)} + +/* + * Get the first element from a list + * + * @param[in] ptr the list head to take the element from. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the dlist_t within the struct. + */ +#define dlist_first_entry(ptr, type, member) \ + dlist_entry((ptr)->next, type, member) + +/* + * Iterate over a list. + * + * @param[in] pos the &struct dlist_t to use as a loop cursor. + * @param[in] head he head for your list. + */ +#define dlist_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) + +/* + * Iterate over a list safe against removal of list entry. + * + * @param[in] pos the &struct dlist_t to use as a loop cursor. + * @param[in] n another &struct dlist_t to use as temporary storage. + * @param[in] head the head for your list. + */ +#define dlist_for_each_safe(pos, n, head) \ + for (pos = (head)->next, n = pos->next; pos != (head); \ + pos = n, n = pos->next) + +/* + * Iterate over list of given type. + * + * @param[in] queue he head for your list. + * @param[in] node the &struct dlist_t to use as a loop cursor. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the dlist_t within the struct. + */ +#define dlist_for_each_entry(queue, node, type, member) \ + for (node = cvi_container_of((queue)->next, type, member); \ + &node->member != (queue); \ + node = cvi_container_of(node->member.next, type, member)) + +/* + * Iterate over list of given type safe against removal of list entry. + * + * @param[in] queue the head for your list. + * @param[in] n the type * to use as a temp. + * @param[in] node the type * to use as a loop cursor. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the dlist_t within the struct. + */ +#define dlist_for_each_entry_safe(queue, n, node, type, member) \ + for (node = cvi_container_of((queue)->next, type, member), \ + n = (queue)->next ? (queue)->next->next : NULL; \ + &node->member != (queue); \ + node = cvi_container_of(n, type, member), n = n ? n->next : NULL) + +/* + * Get the struct for this entry. + * @param[in] ptr the list head to take the element from. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the variable within the struct. + */ +#define list_entry(ptr, type, member) \ + cvi_container_of(ptr, type, member) + + +/* + * Iterate backwards over list of given type. + * + * @param[in] pos the type * to use as a loop cursor. + * @param[in] head he head for your list. + * @param[in] member the name of the dlist_t within the struct. + * @param[in] type the type of the struct this is embedded in. + */ +#define dlist_for_each_entry_reverse(pos, head, member, type) \ + for (pos = list_entry((head)->prev, type, member); \ + &pos->member != (head); \ + pos = list_entry(pos->member.prev, type, member)) + + +/* + * Get the list length. + * + * @param[in] queue the head for your list. + */ +int dlist_entry_number(dlist_t *queue); + + + +/* + * Initialise the list. + * + * @param[in] name the list to be initialized. + */ +#define CVI_DLIST_HEAD_INIT(name) { &(name), &(name) } + +/* + * Initialise the list. + * + * @param[in] name the list to be initialized. + */ +#define CVI_DLIST_HEAD(name) \ + dlist_t name = CVI_DLIST_HEAD_INIT(name) + +/* for single link list */ +typedef struct slist_s { + struct slist_s *next; +} slist_t; + +static inline void slist_add(slist_t *node, slist_t *head) +{ + node->next = head->next; + head->next = node; +} + +void slist_add_tail(slist_t *node, slist_t *head); + +void slist_del(slist_t *node, slist_t *head); + +static inline int slist_empty(const slist_t *head) +{ + return !head->next; +} + +static inline void slist_init(slist_t *head) +{ + head->next = 0; +} + +static inline slist_t *slist_remove(slist_t *l, slist_t *n) +{ + /* remove slist head */ + struct slist_s *node = l; + + while (node->next && node->next != n) + node = node->next; + + /* remove node */ + if (node->next != (slist_t *)0) + node->next = node->next->next; + + return l; +} + +static inline slist_t *slist_first(slist_t *l) +{ + return l->next; +} + +static inline slist_t *slist_tail(slist_t *l) +{ + while (l->next) + l = l->next; + + return l; +} + +static inline slist_t *slist_next(slist_t *n) +{ + return n->next; +} + +/* + * Iterate over list of given type. + * + * @param[in] queue he head for your list. + * @param[in] node the type * to use as a loop cursor. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the slist_t within the struct. + */ +#define slist_for_each_entry(queue, node, type, member) \ + for (node = (queue)->next ? cvi_container_of((queue)->next, type, member) : NULL; \ + node; \ + node = node->member.next ? cvi_container_of(node->member.next, type, member) : NULL) + +/* + * Iterate over list of given type safe against removal of list entry. + * + * @param[in] queue the head for your list. + * @param[in] tmp the type * to use as a temp. + * @param[in] node the type * to use as a loop cursor. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the slist_t within the struct. + */ +#define slist_for_each_entry_safe(queue, tmp, node, type, member) \ + for (node = (queue)->next ? cvi_container_of((queue)->next, type, member) : NULL, \ + tmp = (queue)->next ? (queue)->next->next : NULL; \ + node; \ + node = tmp ? cvi_container_of(tmp, type, member) : NULL, tmp = tmp ? tmp->next : NULL) + +/* + * Initialise the list. + * + * @param[in] name the list to be initialized. + */ +#define CVI_SLIST_HEAD_INIT(name) {0} + +/* + * Initialise the list. + * + * @param[in] name the list to be initialized. + */ +#define CVI_SLIST_HEAD(name) \ + slist_t name = CVI_SLIST_HEAD_INIT(name) + +/* + * Get the struct for this entry. + * @param[in] addr the list head to take the element from. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the slist_t within the struct. + */ +#define slist_entry(addr, type, member) ( \ + addr ? (type *)((long)addr - cvi_offsetof(type, member)) : (type *)addr \ +) + +/* + * Get the first element from a list. + * + * @param[in] ptr the list head to take the element from. + * @param[in] type the type of the struct this is embedded in. + * @param[in] member the name of the slist_t within the struct. + */ +#define slist_first_entry(ptr, type, member) \ + slist_entry((ptr)->next, type, member) + +/** + * slist_tail_entry - get the tail element from a slist + * @ptr: the slist head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the slist_struct within the struct. + * + * Note, that slist is expected to be not empty. + */ +#define slist_tail_entry(ptr, type, member) \ + slist_entry(slist_tail(ptr), type, member) + +/* + * Get the list length. + * + * @param[in] queue the head for your list. + */ +int slist_entry_number(slist_t *queue); + +#ifdef __cplusplus +} +#endif + +#endif /* CVI_LIST_H */ + diff --git a/freertos/cvitek/install/include/common/cvi_mailbox.h b/freertos/cvitek/install/include/common/cvi_mailbox.h new file mode 100644 index 000000000..d5a7c5b77 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_mailbox.h @@ -0,0 +1,85 @@ +#ifndef __CVI_MAILBOX_H__ +#define __CVI_MAILBOX_H__ + +union cpu_mailbox_info_offset{ + char mbox_info; + int reserved; +}; + +union cpu_mailbox_int_clr_offset{ + char mbox_int_clr; + int reserved; +}; +union cpu_mailbox_int_mask_offset{ + char mbox_int_mask; + int reserved; +}; +union cpu_mailbox_int_offset{ + char mbox_int; + int reserved; +}; +union cpu_mailbox_int_raw_offset{ + char mbox_int_raw; + int reserved; +}; + +union mailbox_set{ + char mbox_set; + int reserved; +}; +union mailbox_status{ + char mbox_status; + int reserved; +}; + +union cpu_mailbox_status{ + char mbox_status; + int reserved; +}; + +/* register mapping refers to mailbox user guide*/ +struct cpu_mbox_int{ + union cpu_mailbox_int_clr_offset cpu_mbox_int_clr; + union cpu_mailbox_int_mask_offset cpu_mbox_int_mask; + union cpu_mailbox_int_offset cpu_mbox_int_int; + union cpu_mailbox_int_raw_offset cpu_mbox_int_raw; +}; + +struct mailbox_set_register{ + union cpu_mailbox_info_offset cpu_mbox_en[4]; //0x00, 0x04, 0x08, 0x0c + struct cpu_mbox_int cpu_mbox_set[4]; //0x10~0x1C, 0x20~0x2C, 0x30~0x3C, 0x40~0x4C + int reserved[4]; //0x50~0x5C + union mailbox_set mbox_set; //0x60 + union mailbox_status mbox_status; //0x64 + int reserved2[2]; //0x68~0x6C + union cpu_mailbox_status cpu_mbox_status[4]; //0x70 +}; + +struct mailbox_done_register{ + union cpu_mailbox_info_offset cpu_mbox_done_en[4]; + struct cpu_mbox_int cpu_mbox_done[4]; +}; + +#define MAILBOX_MAX_NUM 0x0008 +#define MAILBOX_DONE_OFFSET 0x0002 +#define MAILBOX_CONTEXT_OFFSET 0x0400 + +#ifdef FREERTOS_BSP +#define RECEIVE_CPU 2 // c906L +#define SEND_TO_CPU1 1 // c906B +#define SEND_TO_CPU0 0 // ca53 +#else +// __linux__ +#ifdef __riscv +// C906B +#define RECEIVE_CPU 1 +#else +// Ca53 +#define RECEIVE_CPU 0 +#endif +// C906L +#define SEND_TO_CPU 2 +#endif + +#endif // end of__CVI_MAILBOX_H__ + diff --git a/freertos/cvitek/install/include/common/cvi_math.h b/freertos/cvitek/install/include/common/cvi_math.h new file mode 100644 index 000000000..856304f88 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_math.h @@ -0,0 +1,329 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_math.h + * Description: + * mathematical functions. + */ + +#ifndef __CVI_MATH_H__ +#define __CVI_MATH_H__ + +#include + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +#define PI 3.1415926 + +/****************************************************************************** + * ABS(x) absolute value of x + * SIGN(x) sign of x + * CMP(x,y) 0 if x==y; 1 if x>y; -1 if x= 0 ? (x) : (-(x))) +#undef _SIGN +#define _SIGN(x) ((x) >= 0 ? 1 : -1) +#undef CMP +#define CMP(x, y) (((x) == (y)) ? 0 : (((x) > (y)) ? 1 : -1)) + +/****************************************************************************** + * MAX2(x,y) maximum of x and y + * MIN2(x,y) minimum of x and y + * MAX3(x,y,z) maximum of x, y and z + * MIN3(x,y,z) minimun of x, y and z + * MEDIAN(x,y,z) median of x,y,z + * MEAN2(x,y) mean of x,y + *****************************************************************************/ +#undef MAX2 +#define MAX2(x, y) ((x) > (y) ? (x) : (y)) +#undef MIN2 +#define MIN2(x, y) ((x) < (y) ? (x) : (y)) +#undef MAX3 +#define MAX3(x, y, z) ((x) > (y) ? MAX2(x, z) : MAX2(y, z)) +#undef MIN3 +#define MIN3(x, y, z) ((x) < (y) ? MIN2(x, z) : MIN2(y, z)) +#undef MEDIAN +#define MEDIAN(x, y, z) (((x) + (y) + (z)-MAX3(x, y, z)) - MIN3(x, y, z)) +#undef MEAN2 +#define MEAN2(x, y) (((x) + (y)) >> 1) + +/****************************************************************************** + * CLIP3(x,min,max) clip x within [min,max] + * WRAP_MAX(x,max,min) wrap to min if x equal max + * WRAP_MIN(x,min,max) wrap to max if x equal min + * VALUE_BETWEEN(x,min.max) True if x is between [min,max] inclusively. + *****************************************************************************/ +#undef CLIP_MIN +#define CLIP_MIN(x, min) (((x) >= min) ? (x) : min) +#undef CLIP3 +#define CLIP3(x, min, max) ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#undef CLIP_MAX +#define CLIP_MAX(x, max) ((x) > (max) ? (max) : (x)) +#undef WRAP_MAX +#define WRAP_MAX(x, max, min) ((x) >= (max) ? (min) : (x)) +#undef WRAP_MIN +#define WRAP_MIN(x, min, max) ((x) <= (min) ? (max) : (x)) +#undef VALUE_BETWEEN +#define VALUE_BETWEEN(x, min, max) (((x) >= (min)) && ((x) <= (max))) + +/****************************************************************************** + * a is a power of 2 value + * + * Example: + * ALIGN(48,32) = 64 + * ALIGN_DOWN(48,32) = 32 + *****************************************************************************/ +#undef IS_ALIGNED +#define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) +#undef ALIGN +#define ALIGN(x, a) (((x) + ((a)-1)) & ~((a)-1)) +#undef ALIGN_DOWN +#define ALIGN_DOWN(x, a) ((x) & ~((a)-1)) +#undef DIV_UP +#define DIV_UP(x, a) (((x) + ((a)-1)) / a) + +/****************************************************************************** + * Get the span between two unsigned number, such as + * SPAN(CVI_U32, 100, 200) is 200 - 100 = 100 + * SPAN(CVI_U32, 200, 100) is 0xFFFFFFFF - 200 + 100 + * SPAN(CVI_U64, 200, 100) is 0xFFFFFFFFFFFFFFFF - 200 + 100 + *****************************************************************************/ +#undef SPAN +#define SPAN(type, begin, end) \ + ({ \ + type b = (begin); \ + type e = (end); \ + (type)((b >= e) ? (b - e) : (b + ((~((type)0)) - e))); \ + }) + +/****************************************************************************** + * FRACTION32(de,nu) fraction: nu(minator) / de(nominator). + * NUMERATOR32(x) of x(x is fraction) + * DENOMINATOR32(x) Denominator of x(x is fraction) + + * represent fraction in 32 bit. LSB 16 is numerator, MSB 16 is denominator + * It is integer if denominator is 0. + *****************************************************************************/ +#undef FRACTION32 +#define FRACTION32(de, nu) (((de) << 16) | (nu)) +#undef NUMERATOR32 +#define NUMERATOR32(x) ((x)&0xffff) +#undef DENOMINATOR32 +#define DENOMINATOR32(x) ((x) >> 16) + +/****************************************************************************** + * RGB(r,g,b) assemble the r,g,b to 30bit color + * RGB_R(c) get RED from 30bit color + * RGB_G(c) get GREEN from 30bit color + * RGB_B(c) get BLUE from 30bit color + *****************************************************************************/ +#undef RGB +#define RGB(r, g, b) ((((r)&0x3ff) << 20) | (((g)&0x3ff) << 10) | ((b)&0x3ff)) +#undef RGB_R +#define RGB_R(c) (((c)&0x3ff00000) >> 20) +#undef RGB_G +#define RGB_G(c) (((c)&0x000ffc00) >> 10) +#undef RGB_B +#define RGB_B(c) ((c)&0x000003ff) + +/****************************************************************************** + * RGB(r,g,b) assemble the r,g,b to 24bit color + * RGB_R(c) get RED from 24bit color + * RGB_G(c) get GREEN from 24bit color + * RGB_B(c) get BLUE from 24bit color + *****************************************************************************/ +#undef RGB_8BIT +#define RGB_8BIT(r, g, b) ((((r)&0xff) << 16) | (((g)&0xff) << 8) | ((b)&0xff)) +#undef RGB_8BIT_R +#define RGB_8BIT_R(c) (((c)&0xff0000) >> 16) +#undef RGB_8BIT_G +#define RGB_8BIT_G(c) (((c)&0xff00) >> 8) +#undef RGB_8BIT_B +#define RGB_8BIT_B(c) ((c)&0xff) + +/****************************************************************************** + * YUV(y,u,v) assemble the y,u,v to 30bit color + * YUV_Y(c) get Y from 30bit color + * YUV_U(c) get U from 30bit color + * YUV_V(c) get V from 30bit color + *****************************************************************************/ +#undef YUV +#define YUV(y, u, v) ((((y)&0x03ff) << 20) | (((u)&0x03ff) << 10) | ((v)&0x03ff)) +#undef YUV_Y +#define YUV_Y(c) (((c)&0x3ff00000) >> 20) +#undef YUV_U +#define YUV_U(c) (((c)&0x000ffc00) >> 10) +#undef YUV_V +#define YUV_V(c) ((c)&0x000003ff) + +/****************************************************************************** + * YUV_8BIT(y,u,v) assemble the y,u,v to 24bit color + * YUV_8BIT_Y(c) get Y from 24bit color + * YUV_8BIT_U(c) get U from 24bit color + * YUV_8BIT_V(c) get V from 24bit color + *****************************************************************************/ +#undef YUV_8BIT +#define YUV_8BIT(y, u, v) ((((y)&0xff) << 16) | (((u)&0xff) << 8) | ((v)&0xff)) +#undef YUV_8BIT_Y +#define YUV_8BIT_Y(c) (((c)&0xff0000) >> 16) +#undef YUV_8BIT_U +#define YUV_8BIT_U(c) (((c)&0xff00) >> 8) +#undef YUV_8BIT_V +#define YUV_8BIT_V(c) ((c)&0xff) + +/****************************************************************************** + * Rgb2Yc(r, g, b, *y, *u, *u) convert r,g,b to y,u,v + * Rgb2Yuv(rgb) convert rgb to yuv + *****************************************************************************/ +static inline CVI_VOID Rgb2Yc(CVI_U16 r, CVI_U16 g, CVI_U16 b, CVI_U16 *py, CVI_U16 *pcb, CVI_U16 *pcr) +{ + /* Y */ + *py = (CVI_U16)((((r * 66 + g * 129 + b * 25) >> 8) + 16) << 2); + + /* Cb */ + *pcb = (CVI_U16)(((((b * 112 - r * 38) - g * 74) >> 8) + 128) << 2); + + /* Cr */ + *pcr = (CVI_U16)(((((r * 112 - g * 94) - b * 18) >> 8) + 128) << 2); +} + +static inline CVI_U32 Rgb2Yuv(CVI_U32 u32Rgb) +{ + CVI_U16 y, u, v; + + Rgb2Yc(RGB_R(u32Rgb), RGB_G(u32Rgb), RGB_B(u32Rgb), &y, &u, &v); + + return YUV(y, u, v); +} + +static inline CVI_VOID Rgb2Yc_full(CVI_U16 r, CVI_U16 g, CVI_U16 b, CVI_U16 *py, CVI_U16 *pcb, CVI_U16 *pcr) +{ + CVI_U16 py_temp, pcb_temp, pcr_temp; + + py_temp = (CVI_U16)(((r * 76 + g * 150 + b * 29) >> 8) * 4); + pcb_temp = (CVI_U16)(CLIP_MIN(((((b * 130 - r * 44) - g * 86) >> 8) + 128), 0) * 4); + pcr_temp = (CVI_U16)(CLIP_MIN(((((r * 130 - g * 109) - b * 21) >> 8) + 128), 0) * 4); + + *py = MAX2(MIN2(py_temp, 1023), 0); + *pcb = MAX2(MIN2(pcb_temp, 1023), 0); + *pcr = MAX2(MIN2(pcr_temp, 1023), 0); +} + +static inline CVI_U32 Rgb2Yuv_full(CVI_U32 u32Rgb) +{ + CVI_U16 y, u, v; + + Rgb2Yc_full(RGB_R(u32Rgb), RGB_G(u32Rgb), RGB_B(u32Rgb), &y, &u, &v); + + return YUV(y, u, v); +} + +/****************************************************************************** + * Rgb2Yc_8BIT(r, g, b, *y, *u, *u) convert r,g,b to y,u,v + * Rgb2Yuv_8BIT(rgb) convert rgb to yuv + *****************************************************************************/ +static inline CVI_VOID Rgb2Yc_8BIT(CVI_U8 r, CVI_U8 g, CVI_U8 b, CVI_U8 *py, CVI_U8 *pcb, CVI_U8 *pcr) +{ + /* Y */ + *py = (CVI_U8)(((r * 66 + g * 129 + b * 25) >> 8) + 16); + + /* Cb */ + *pcb = (CVI_U8)((((b * 112 - r * 38) - g * 74) >> 8) + 128); + + /* Cr */ + *pcr = (CVI_U8)((((r * 112 - g * 94) - b * 18) >> 8) + 128); +} + +static inline CVI_U32 Rgb2Yuv_8BIT(CVI_U32 u32Rgb) +{ + CVI_U8 y, u, v; + + Rgb2Yc_8BIT(RGB_8BIT_R(u32Rgb), RGB_8BIT_G(u32Rgb), RGB_8BIT_B(u32Rgb), &y, &u, &v); + + return YUV_8BIT(y, u, v); +} + +static inline CVI_VOID Rgb2Yc_full_8BIT(CVI_U8 r, CVI_U8 g, CVI_U8 b, CVI_U8 *py, CVI_U8 *pcb, CVI_U8 *pcr) +{ + CVI_S16 py_temp, pcb_temp, pcr_temp; + + py_temp = (r * 76 + g * 150 + b * 29) >> 8; + pcb_temp = (((b * 130 - r * 44) - g * 86) >> 8) + 128; + pcr_temp = (((r * 130 - g * 109) - b * 21) >> 8) + 128; + + *py = MAX2(MIN2(py_temp, 255), 0); + *pcb = MAX2(MIN2(pcb_temp, 255), 0); + *pcr = MAX2(MIN2(pcr_temp, 255), 0); +} + +static inline CVI_U32 Rgb2Yuv_full_8BIT(CVI_U32 u32Rgb) +{ + CVI_U8 y, u, v; + + Rgb2Yc_full_8BIT(RGB_8BIT_R(u32Rgb), RGB_8BIT_G(u32Rgb), RGB_8BIT_B(u32Rgb), &y, &u, &v); + + return YUV_8BIT(y, u, v); +} + +/******************************************************************************* + * FpsControl Useing Sample: + * FPS_CTRL_S g_stFpsCtrl; + * + * Take 12 frame uniform in 25. + * InitFps(&g_stFpsCtrl, 25, 12); + * + * { + * if(FpsControl(&g_stFpsCtrl)) printf("Yes, this frmae should be token"); + * } + * + ******************************************************************************/ +typedef struct _FPS_CTRL_S { + CVI_U32 u32Ffps; /* Full frame rate */ + CVI_U32 u32Tfps; /* Target frame rate */ + CVI_U32 u32FrmKey; /* update key frame */ +} FPS_CTRL_S; + +static inline CVI_VOID InitFps(FPS_CTRL_S *pFrmCtrl, CVI_U32 u32FullFps, CVI_U32 u32TagFps) +{ + pFrmCtrl->u32Ffps = u32FullFps; + pFrmCtrl->u32Tfps = u32TagFps; + pFrmCtrl->u32FrmKey = 0; +} + +static inline CVI_BOOL FpsControl(FPS_CTRL_S *pFrmCtrl) +{ + CVI_BOOL bReturn = CVI_FALSE; + + pFrmCtrl->u32FrmKey += pFrmCtrl->u32Tfps; + if (pFrmCtrl->u32FrmKey >= pFrmCtrl->u32Ffps) { + pFrmCtrl->u32FrmKey -= pFrmCtrl->u32Ffps; + bReturn = CVI_TRUE; + } + + return bReturn; +} + +static inline CVI_U32 GetLowAddr(CVI_U64 u64Phyaddr) +{ + return (CVI_U32)u64Phyaddr; +} + +static inline CVI_U32 GetHighAddr(CVI_U64 u64Phyaddr) +{ + return (CVI_U32)(u64Phyaddr >> 32); +} + +#define CVI_usleep(usec) usleep(usec) + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_MATH_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_mipi.h b/freertos/cvitek/install/include/common/cvi_mipi.h new file mode 100644 index 000000000..f3ca74d79 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_mipi.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_mipi.h + * Description: + * Common mipi definitions. + */ + +#ifndef __CVI_MIPI_H__ +#define __CVI_MIPI_H__ + +// #include + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +typedef unsigned int combo_dev_t; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_MIPI_H__ */ + diff --git a/freertos/cvitek/install/include/common/cvi_sns_ctrl.h b/freertos/cvitek/install/include/common/cvi_sns_ctrl.h new file mode 100644 index 000000000..d77558ad1 --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_sns_ctrl.h @@ -0,0 +1,204 @@ +#ifndef __CVI_SNS_CTRL_H__ +#define __CVI_SNS_CTRL_H__ + +#include +#include "cvi_errno.h" +#include +#include "cvi_debug.h" +#include "cvi_comm_3a.h" +#include "cvi_comm_isp.h" +#include "cvi_ae_comm.h" +#include "cvi_comm_vi.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +typedef struct combo_dev_attr_s SNS_COMBO_DEV_ATTR_S; +typedef struct mclk_pll_s SNS_MCLK_ATTR_S; + +typedef struct _SNS_ATTR_S { + CVI_U16 u16Min; + CVI_U16 u16Max; + CVI_U16 u16Def; + CVI_U16 u16Step; +} SNS_ATTR_S; + +typedef struct _SNS_ATTR_LARGE_S { + CVI_U32 u32Min; + CVI_U32 u32Max; + CVI_U32 u32Def; + CVI_U32 u32Step; +} SNS_ATTR_LARGE_S; + +typedef struct _ISP_SNS_STATE_S { + CVI_BOOL bInit; /* CVI_TRUE: Sensor init */ + CVI_BOOL bSyncInit; /* CVI_TRUE: Sync Reg init */ + CVI_U8 u8ImgMode; + CVI_U8 u8Hdr; /* CVI_TRUE: HDR enbale */ + WDR_MODE_E enWDRMode; + + ISP_SNS_SYNC_INFO_S astSyncInfo[2]; /* [0]: Sensor reg info of cur-frame; [1]: Sensor reg info of pre-frame ; */ + + CVI_U32 au32FL[2]; /* [0]: FullLines of cur-frame; [1]: Pre FullLines of pre-frame */ + CVI_U32 u32FLStd; /* FullLines std */ + CVI_U32 au32WDRIntTime[4]; +} ISP_SNS_STATE_S; + +typedef enum _ISP_SNS_MIRRORFLIP_TYPE_E { + ISP_SNS_NORMAL = 0, + ISP_SNS_MIRROR = 1, + ISP_SNS_FLIP = 2, + ISP_SNS_MIRROR_FLIP = 3, + ISP_SNS_BUTT +} ISP_SNS_MIRRORFLIP_TYPE_E; + +typedef enum _ISP_SNS_L2S_MODE_E { + SNS_L2S_MODE_AUTO = 0, /* sensor l2s distance varies by the inttime of sef. */ + SNS_L2S_MODE_FIX, /* sensor l2s distance is fixed. */ +} ISP_SNS_INTTIME_MODE_E; + +typedef struct _MCLK_ATTR_S { + CVI_U8 u8Mclk; + CVI_BOOL bMclkEn; +} MCLK_ATTR_S; + +typedef struct _RX_INIT_ATTR_S { + CVI_U32 MipiDev; + CVI_S16 as16LaneId[5]; + CVI_S8 as8PNSwap[5]; + MCLK_ATTR_S stMclkAttr; +} RX_INIT_ATTR_S; + +typedef enum _SNS_BDG_MUX_MODE_E { + SNS_BDG_MUX_NONE = 0, /* sensor bridge mux is disabled */ + SNS_BDG_MUX_2, /* sensor bridge mux 2 input */ + SNS_BDG_MUX_3, /* sensor bridge mux 3 input */ + SNS_BDG_MUX_4, /* sensor bridge mux 4 input */ +} SNS_BDG_MUX_MODE_E; + +typedef struct _ISP_INIT_ATTR_S { + CVI_U32 u32ExpTime; + CVI_U32 u32AGain; + CVI_U32 u32DGain; + CVI_U32 u32ISPDGain; + CVI_U32 u32Exposure; + CVI_U32 u32LinesPer500ms; + CVI_U32 u32PirisFNO; + CVI_U16 u16WBRgain; + CVI_U16 u16WBGgain; + CVI_U16 u16WBBgain; + CVI_U16 u16SampleRgain; + CVI_U16 u16SampleBgain; + CVI_U16 u16UseHwSync; + ISP_SNS_GAIN_MODE_E enGainMode; + ISP_SNS_INTTIME_MODE_E enL2SMode; + SNS_BDG_MUX_MODE_E enSnsBdgMuxMode; +} ISP_INIT_ATTR_S; + +typedef struct _ISP_SNS_OBJ_S { +#ifdef RUN_IN_SRAM +#else + CVI_S32 (*pfnRegisterCallback)(VI_PIPE ViPipe, ALG_LIB_S *, ALG_LIB_S *); + CVI_S32 (*pfnUnRegisterCallback)(VI_PIPE ViPipe, ALG_LIB_S *, ALG_LIB_S *); + CVI_S32 (*pfnSetBusInfo)(VI_PIPE ViPipe, ISP_SNS_COMMBUS_U unSNSBusInfo); + CVI_VOID (*pfnStandby)(VI_PIPE ViPipe); + CVI_VOID (*pfnRestart)(VI_PIPE ViPipe); + CVI_VOID (*pfnMirrorFlip)(VI_PIPE ViPipe, ISP_SNS_MIRRORFLIP_TYPE_E eSnsMirrorFlip); + CVI_S32 (*pfnWriteReg)(VI_PIPE ViPipe, CVI_S32 s32Addr, CVI_S32 s32Data); + CVI_S32 (*pfnReadReg)(VI_PIPE ViPipe, CVI_S32 s32Addr); + CVI_S32 (*pfnSetInit)(VI_PIPE ViPipe, ISP_INIT_ATTR_S *); + CVI_S32 (*pfnPatchRxAttr)(RX_INIT_ATTR_S *); + CVI_VOID (*pfnPatchI2cAddr)(CVI_S32 s32I2cAddr); + CVI_S32 (*pfnGetRxAttr)(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *); + CVI_S32 (*pfnExpSensorCb)(ISP_SENSOR_EXP_FUNC_S *); + CVI_S32 (*pfnExpAeCb)(AE_SENSOR_EXP_FUNC_S *); + CVI_S32 (*pfnSnsProbe)(VI_PIPE ViPipe); +#endif +} ISP_SNS_OBJ_S; + +extern ISP_SNS_OBJ_S stSnsImx327_fpga_Obj; +extern ISP_SNS_OBJ_S stSnsImx327_Obj; +extern ISP_SNS_OBJ_S stSnsOs08a20_Obj; +extern ISP_SNS_OBJ_S stSnsOs08a20_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsOs04c10_Obj; +extern ISP_SNS_OBJ_S stSnsOs04c10_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsF23_Obj; +extern ISP_SNS_OBJ_S stSnsF35_Obj; +extern ISP_SNS_OBJ_S stSnsF35_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsH65_Obj; +extern ISP_SNS_OBJ_S stSnsImx327_2l_Obj; +extern ISP_SNS_OBJ_S stSnsImx290_2l_Obj; +extern ISP_SNS_OBJ_S stSnsImx327_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsImx327_Sublvds_Obj; +extern ISP_SNS_OBJ_S stSnsImx307_Obj; +extern ISP_SNS_OBJ_S stSnsImx307_2l_Obj; +extern ISP_SNS_OBJ_S stSnsImx307_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsPICO640_Obj; +extern ISP_SNS_OBJ_S stSnsPICO384_Obj; +extern ISP_SNS_OBJ_S stSnsImx307_Sublvds_Obj; +extern ISP_SNS_OBJ_S stSnsMCS369Q_Obj; +extern ISP_SNS_OBJ_S stSnsMM308M2_Obj; +extern ISP_SNS_OBJ_S stSnsN5_Obj; +extern ISP_SNS_OBJ_S stSnsSC3335_Obj; +extern ISP_SNS_OBJ_S stSnsSC3335_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsImx335_Obj; +extern ISP_SNS_OBJ_S stSnsPR2020_Obj; +extern ISP_SNS_OBJ_S stSnsPR2100_Obj; +extern ISP_SNS_OBJ_S stSnsImx334_Obj; +extern ISP_SNS_OBJ_S stSnsSC8238_Obj; +extern ISP_SNS_OBJ_S stSnsMCS369_Obj; +extern ISP_SNS_OBJ_S stSnsSC4210_Obj; +extern ISP_SNS_OBJ_S stSnsSC200AI_Obj; +extern ISP_SNS_OBJ_S stSnsSC850SL_Obj; +extern ISP_SNS_OBJ_S stSnsN6_Obj; +extern ISP_SNS_OBJ_S stSnsGc2053_Obj; +extern ISP_SNS_OBJ_S stSnsGc2053_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsGc2093_Obj; +extern ISP_SNS_OBJ_S stSnsGc2093_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsGc4653_Obj; +extern ISP_SNS_OBJ_S stSnsGc4653_Slave_Obj; +extern ISP_SNS_OBJ_S stSnsGc1054_Obj; +extern ISP_SNS_OBJ_S stSnsImx347_Obj; +extern ISP_SNS_OBJ_S stSnsImx385_Obj; +extern ISP_SNS_OBJ_S stSnsGc2053_1l_Obj; +extern ISP_SNS_OBJ_S stSnsSC035HGS_Obj; +extern ISP_SNS_OBJ_S stSnsSC500AI_Obj; +extern ISP_SNS_OBJ_S stSnsSC501AI_2L_Obj; +extern ISP_SNS_OBJ_S stSnsSC035GS_Obj; +extern ISP_SNS_OBJ_S stSnsSC401AI_Obj; +extern ISP_SNS_OBJ_S stSnsTP2850_Obj; + +#define CMOS_CHECK_POINTER(ptr)\ + do {\ + if (ptr == CVI_NULL) {\ + syslog(LOG_ERR, "Null Pointer!\n");\ + return CVI_ERR_VI_INVALID_NULL_PTR;\ + } \ + } while (0) + +#define CMOS_CHECK_POINTER_VOID(ptr)\ + do {\ + if (ptr == CVI_NULL) {\ + syslog(LOG_ERR, "Null Pointer!\n");\ + return;\ + } \ + } while (0) + +#define SENSOR_FREE(ptr)\ + do {\ + if (ptr != CVI_NULL) {\ + free(ptr);\ + ptr = CVI_NULL;\ + } \ + } while (0) + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* __CVI_SNS_CTRL_H__ */ diff --git a/freertos/cvitek/install/include/common/cvi_type.h b/freertos/cvitek/install/include/common/cvi_type.h new file mode 100644 index 000000000..dc3a02f4e --- /dev/null +++ b/freertos/cvitek/install/include/common/cvi_type.h @@ -0,0 +1,89 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_type.h + * Description: + */ + +#ifndef __CVI_TYPE_H__ +#define __CVI_TYPE_H__ + +// #include "linux/types.h" +#include +#include +#include + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +/*---------------------------------------------- + * The common data type + *---------------------------------------------- + */ +typedef unsigned char CVI_UCHAR; +typedef unsigned char CVI_U8; +typedef unsigned short CVI_U16; +typedef unsigned int CVI_U32; +typedef unsigned int CVI_HANDLE; + +typedef signed char CVI_S8; +typedef char CVI_CHAR; +typedef short CVI_S16; +typedef int CVI_S32; + +typedef unsigned long CVI_UL; +typedef signed long CVI_SL; + +typedef float CVI_FLOAT; +typedef double CVI_DOUBLE; + +typedef void CVI_VOID; +typedef unsigned char CVI_BOOL; + +typedef uint64_t CVI_U64; +typedef int64_t CVI_S64; + +typedef size_t CVI_SIZE_T; + +/*---------------------------------------------- + * const defination + *---------------------------------------------- + */ + +#define UNUSED(x) if(x) {} + +#ifndef MIN +#define MIN(x, y) ((x) < (y) ? (x) : (y)) +#endif +#ifndef MAX +#define MAX(x, y) ((x) > (y) ? (x) : (y)) +#endif +#ifndef CLAMP +#define CLAMP(x, low, high) (((x) > (high)) ? (high) : (((x) < (low)) ? (low) : (x))) +#endif + +#ifndef EINVAL +#define EINVAL 22 /* Invalid argument */ +#endif /*EINVAL*/ + +#define CVI_NULL 0L +#define CVI_SUCCESS 0 +#define CVI_FAILURE (-1) +#define CVI_FAILURE_ILLEGAL_PARAM (-2) +#define CVI_TRUE 1 +#define CVI_FALSE 0 + +#ifndef BIT +#define BIT(x) (1 << (x)) +#endif + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_TYPE_H__ */ diff --git a/freertos/cvitek/install/include/common/delay.h b/freertos/cvitek/install/include/common/delay.h new file mode 100644 index 000000000..3d282baa1 --- /dev/null +++ b/freertos/cvitek/install/include/common/delay.h @@ -0,0 +1,26 @@ +#ifndef _DELAY_H +#define _DELAY_H + +#include "FreeRTOS.h" +#include + +#ifndef udelay +#define udelay(us) usleep(us) +#endif + +/* use vTaskDelay to replace usleep api + * usleep is a busy waiting api + */ +#ifndef mdelay +#define mdelay(ms) usleep(ms * 1000) +/*#define mdelay(ms) \ +do { \ + if (ms < (configTICK_RATE_HZ / 1000)) \ + usleep(ms * 1000); \ + else \ + vTaskDelay(pdMS_TO_TICKS(ms)); \ +} while(0) +*/ +#endif + +#endif // end of _DELAY_H diff --git a/freertos/cvitek/install/include/common/fifo.h b/freertos/cvitek/install/include/common/fifo.h new file mode 100644 index 000000000..87ac979c6 --- /dev/null +++ b/freertos/cvitek/install/include/common/fifo.h @@ -0,0 +1,63 @@ +#ifndef __FIFO_H__ +#define __FIFO_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define FIFO_HEAD(name, type) \ + struct name { \ + struct type *fifo; \ + int front, tail, capacity; \ + } + +#define FIFO_INIT(head, _capacity) do { \ + (head)->fifo = pvPortMalloc(sizeof(*(head)->fifo) * _capacity); \ + (head)->front = (head)->tail = -1; \ + (head)->capacity = _capacity; \ + } while (0) + +#define FIFO_EMPTY(head) ((head)->front == -1) + +#define FIFO_FULL(head) (((head)->front == ((head)->tail + 1)) \ + || (((head)->front == 0) && ((head)->tail == ((head)->capacity - 1)))) + +#define FIFO_CAPACITY(head) ((head)->capacity) + +#define FIFO_SIZE(head) (FIFO_EMPTY(head) ?\ + 0 : ((((head)->tail + (head)->capacity - (head)->front) % (head)->capacity) + 1)) + +#define FIFO_PUSH(head, elm) do { \ + if (FIFO_EMPTY(head)) \ + (head)->front = (head)->tail = 0; \ + else \ + (head)->tail = ((head)->tail == (head)->capacity - 1) \ + ? 0 : (head)->tail + 1; \ + (head)->fifo[(head)->tail] = *elm; \ + } while (0) + +#define FIFO_POP(head, pelm) do { \ + *(pelm) = (head)->fifo[(head)->front]; \ + if ((head)->front == (head)->tail) \ + (head)->front = (head)->tail = -1; \ + else \ + (head)->front = ((head)->front == (head)->capacity - 1) \ + ? 0 : (head)->front + 1; \ + } while (0) + +#define FIFO_FOREACH(var, head, idx) \ + for (idx = (head)->front, var = (head)->fifo[idx]; \ + idx < (head)->front + FIFO_SIZE(head); \ + idx = idx + 1, var = (head)->fifo[idx % (head)->capacity]) + +#define FIFO_GET_FRONT(head, pelm) (*(pelm) = (head)->fifo[(head)->front]) + +#define FIFO_GET_FRONT_PTR(head, pelm) ((pelm) = &(head)->fifo[(head)->front]) + +#define FIFO_GET_TAIL(head, pelm) (*(pelm) = (head)->fifo[(head)->tail]) + +#ifdef __cplusplus +} +#endif + +#endif /* __FIFO_H__ */ diff --git a/freertos/cvitek/install/include/common/malloc.h b/freertos/cvitek/install/include/common/malloc.h new file mode 100644 index 000000000..b8e9ac02a --- /dev/null +++ b/freertos/cvitek/install/include/common/malloc.h @@ -0,0 +1,47 @@ +#ifndef __MALLOC_H___ +#define __MALLOC_H__ + +/* here use freertos malloc & free function*/ +extern void *pvPortMalloc(size_t xWantedSize); +extern void vPortFree(void *pv); + +void *memset(void *dest, int value, unsigned long size); +void *memcpy(void *dest, const void *source, unsigned long size); + +/* + * Replace the normal allocation functions with the versions from + * . vfree() needs to support vfree(NULL) + */ +#undef malloc +#undef free +#undef kmalloc +#undef kfree +#undef vmalloc +#undef vfree +#define malloc(size) pvPortMalloc(size) +#define free(ptr) vPortFree(ptr) +#define kmalloc(size, flags) pvPortMalloc(size) +#define kcalloc(nelem, size, flags) calloc(nelem, size) +#define kzalloc(size, flags) calloc(1, size) +#define devm_kzalloc(nelem, size, flags) calloc(1, size) +#define kfree(ptr) vPortFree(ptr) +#define vmalloc(size) pvPortMalloc(size) +#define vfree(ptr) \ + do { \ + if (ptr != NULL) \ + vPortFree(ptr); \ + } while (0) + +void *calloc(size_t nelem, size_t size); + +/* align addr on a size boundary - adjust address up/down if needed */ +#define _ALIGN_UP(addr, size) (((addr)+((size)-1))&(~((typeof(addr))(size)-1))) +#define _ALIGN_DOWN(addr, size) ((addr)&(~((typeof(addr))(size)-1))) + +/* align addr on a size boundary - adjust address up if needed */ +#define _ALIGN(addr,size) _ALIGN_UP(addr,size) + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE) + +#endif // end of __MALLOC_H__ diff --git a/freertos/cvitek/install/include/common/mmio.h b/freertos/cvitek/install/include/common/mmio.h new file mode 100644 index 000000000..2f417229d --- /dev/null +++ b/freertos/cvitek/install/include/common/mmio.h @@ -0,0 +1,150 @@ +/* + * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __MMIO_H__ +#define __MMIO_H__ +#include +#include "types.h" + +#define __raw_readb(a) (*(volatile unsigned char *)(a)) +#define __raw_readw(a) (*(volatile unsigned short *)(a)) +#define __raw_readl(a) (*(volatile unsigned int *)(a)) +#define __raw_readq(a) (*(volatile unsigned long long *)(a)) + +#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) +#define __raw_writeq(v,a) (*(volatile unsigned long long *)(a) = (v)) + +/* + * I/O memory access primitives. Reads are ordered relative to any + * following Normal memory access. Writes are ordered relative to any prior + * Normal memory access. The memory barriers here are necessary as RISC-V + * doesn't define any ordering between the memory space and the I/O space. + */ +#define __io_br() do {} while (0) +#define __io_ar(v) __asm__ __volatile__ ("fence i,r" : : : "memory") +#define __io_bw() __asm__ __volatile__ ("fence w,o" : : : "memory") +//#define __io_aw() mmiowb_set_pending() +#define __io_aw() do {} while (0) + +#define readb(c) ({ u8 __v; __io_br(); __v = __raw_readb(c); __io_ar(__v); __v; }) +#define readw(c) ({ u16 __v; __io_br(); __v = __raw_readw(c); __io_ar(__v); __v; }) +#define readl(c) ({ u32 __v; __io_br(); __v = __raw_readl(c); __io_ar(__v); __v; }) + +#define writeb(v, c) ({ __io_bw(); __raw_writeb((v), (c)); __io_aw(); }) +#define writew(v, c) ({ __io_bw(); __raw_writew((v), (c)); __io_aw(); }) +#define writel(v, c) ({ __io_bw(); __raw_writel((v), (c)); __io_aw(); }) + + +#ifdef CONFIG_64BIT +#define readq(c) ({ u64 __v; __io_br(); __v = __raw_readq(c); __io_ar(__v); __v; }) +#define writeq(v, c) ({ __io_bw(); __raw_writeq((v), (c)); __io_aw(); }) +#endif // CONFIG_64BIT + +/* +#define __raw_readb(a) (*(volatile unsigned char *)(a)) +#define __raw_readw(a) (*(volatile unsigned short *)(a)) +#define __raw_readl(a) (*(volatile unsigned int *)(a)) +#define __raw_readq(a) (*(volatile unsigned long long *)(a)) + +#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) +#define __raw_writeq(v,a) (*(volatile unsigned long long *)(a) = (v)) + +#define readb(a) __raw_readb(a) +#define readw(a) __raw_readw(a) +#define readl(a) __raw_readl(a) +#define readq(a) __raw_readq(a) + +#define writeb(v, a) __raw_writeb(v,a) +#define writew(v, a) __raw_writew(v,a) +#define writel(v, a) __raw_writel(v,a) +#define writeq(v, a) __raw_writeq(v,a) + +#define cpu_write8(a, v) writeb(a, v) +#define cpu_write16(a, v) writew(a, v) +#define cpu_write32(a, v) writel(a, v) +*/ + +#define mmio_wr32 mmio_write_32 +#define mmio_rd32 mmio_read_32 + +static inline void mmio_write_8(uintptr_t addr, uint8_t value) +{ + writeb(value, (void *) addr); +} + +static inline uint8_t mmio_read_8(uintptr_t addr) +{ + return readb((void *) addr); +} + +static inline void mmio_write_16(uintptr_t addr, uint16_t value) +{ + writew(value, (void *) addr); +} + +static inline uint16_t mmio_read_16(uintptr_t addr) +{ + return readw((void *) addr); +} + +static inline void mmio_write_32(uintptr_t addr, uint32_t value) +{ + writel(value, (void *) addr); +} + +static inline uint32_t mmio_read_32(uintptr_t addr) +{ + return readl((void *) addr); +} + +static inline void mmio_write_64(uintptr_t addr, uint64_t value) +{ + writeq(value, (void *) addr); +} + +static inline uint64_t mmio_read_64(uintptr_t addr) +{ + return readq((void *) addr); +} + +static inline void mmio_clrbits_32(uintptr_t addr, uint32_t clear) +{ + writel(readl((void *) addr) & ~clear , (void *) addr); +} + +static inline void mmio_setbits_32(uintptr_t addr, uint32_t set) +{ + writel(readl((void *) addr) | set , (void *) addr); +} + +static inline void mmio_clrsetbits_32(uintptr_t addr, uint32_t clear, + uint32_t set) +{ + writel((readl((void *) addr) & ~clear) | set , (void *) addr); +} + +/* from Linux usage */ +#define ioremap(a, l) (a) + +#define _reg_read(addr) mmio_read_32((addr)) +#define _reg_write(addr, data) mmio_write_32((addr), (data)) +#define _reg_write_mask(addr, mask, data) mmio_clrsetbits_32(addr, mask, data) + +#define ioread8 readb +#define ioread16 readw +#define ioread32 readl +#define ioread64 readq + +#define iowrite8 writeb +#define iowrite16 writew +#define iowrite32 writel +#define iowrite64 writeq + +#endif /* __MMIO_H__ */ diff --git a/freertos/cvitek/install/include/common/printf.h b/freertos/cvitek/install/include/common/printf.h new file mode 100644 index 000000000..1b5866e51 --- /dev/null +++ b/freertos/cvitek/install/include/common/printf.h @@ -0,0 +1,14 @@ +#ifndef _PRINTF_H +#define _PRINTF_H + +#ifdef __cplusplus +extern "C" { +#endif + +int printf(const char *fmt, ...); + +#ifdef __cplusplus +} +#endif + +#endif /* end of printf*/ diff --git a/freertos/cvitek/install/include/common/reg_vip_sys.h b/freertos/cvitek/install/include/common/reg_vip_sys.h new file mode 100644 index 000000000..96e8c1617 --- /dev/null +++ b/freertos/cvitek/install/include/common/reg_vip_sys.h @@ -0,0 +1,1221 @@ +// $Module: reg_vip_sys $ +// $RegisterBank Version: V 1.0.00 $ +// $Author: $ +// $Date: Tue, 28 Dec 2021 04:11:12 PM $ +// + +//GEN REG ADDR/OFFSET/MASK +#define VIP_SYS_VIP_RESETS 0x0 +#define VIP_SYS_VIP_RESERVE 0x4 +#define VIP_SYS_VIP_INT 0x8 +#define VIP_SYS_VIP_AXI_SW 0x10 +#define VIP_SYS_VIP_CLK_LP 0x14 +#define VIP_SYS_VIP_CLK_CTRL0 0x18 +#define VIP_SYS_VIP_CLK_CTRL1 0x1c +#define VIP_SYS_VIP_LP_CTRL_AXI_RT 0x20 +#define VIP_SYS_VIP_LP_CTRL_AXI_OFF 0x24 +#define VIP_SYS_VIP_LP_CTRL_X2P 0x28 +#define VIP_SYS_SC_LP_CTRL_AXI_FAB 0x2c +#define VIP_SYS_VIP_CLK_RATIO0 0x30 +#define VIP_SYS_VIP_CLK_RATIO1 0x34 +#define VIP_SYS_VIP_CLK_RATIO_CSI_MAC0 0x38 +#define VIP_SYS_VIP_CLK_RATIO_ISP_TOP 0x3c +#define VIP_SYS_VIP_CLK_RATIO_CSI_MAC1 0x40 +#define VIP_SYS_VIP_CLK_RATIO_CSI_BE 0x44 +#define VIP_SYS_VIP_CLK_RATIO_CSI_MAC2 0x48 +#define VIP_SYS_VIP_LP_CTRL_STATUS 0x50 +#define VIP_SYS_VIP_URGENT_SEL 0x5c +#define VIP_SYS_VIP_QOS_OW 0x60 +#define VIP_SYS_VIP_QOS_VALUE 0x64 +#define VIP_SYS_VIP_QOS_OFFSET 0x68 +#define VIP_SYS_VIP_QOS_URGENT_HI_TH 0x6c +#define VIP_SYS_VIP_AXI_RT_FAB_PRI_OW 0x70 +#define VIP_SYS_VIP_AXI_RT_FAB_PRI_VALUE 0x74 +#define VIP_SYS_VIP_QOS_URGENT_LOW_TH 0x7c +#define VIP_SYS_VIP_DUMMY0 0x80 +#define VIP_SYS_VIP_DUMMY1 0x84 +#define VIP_SYS_VIP_DUMMY2 0x88 +#define VIP_SYS_VIP_DUMMY3 0x8c +#define VIP_SYS_VIP_DBG0 0x90 +#define VIP_SYS_VIP_DBG1 0x94 +#define VIP_SYS_VIP_DBG2 0x98 +#define VIP_SYS_VIP_DBG3 0x9c +#define VIP_SYS_VIP_RT_AXI_MON_M1 0xa0 +#define VIP_SYS_VIP_RT_AXI_MON_M2 0xa4 +#define VIP_SYS_VIP_RT_AXI_MON_M3 0xa8 +#define VIP_SYS_VIP_RT_AXI_MON_M4 0xac +#define VIP_SYS_VIP_OFF_AXI_MON_M1 0xb0 +#define VIP_SYS_VIP_OFF_AXI_MON_M2 0xb4 +#define VIP_SYS_VIP_RESETS1 0xc0 +#define VIP_SYS_VIP_CLK_RATIO_RAW_TOP 0xc4 +#define VIP_SYS_VIP_CLK_RATIO_IVE_TOP 0xc8 +#define VIP_SYS_VIP_CLK_RATIO_CAM0 0xcc +#define VIP_SYS_VIP_OFF_AXI_MON_M3 0xd0 +#define VIP_SYS_VIP_OFF_AXI_MON_M4 0xd4 +#define VIP_SYS_VIP_OFF_AXI_MON_M5 0xd8 +#define VIP_SYS_VIP_OFF_AXI_MON_M6 0xdc +#define VIP_SYS_VIP_OFF_AXI_MON_M7 0xe0 +#define VIP_SYS_REG_QQQ 0x0 +#define VIP_SYS_REG_QQQ_OFFSET 0 +#define VIP_SYS_REG_QQQ_MASK 0x1 +#define VIP_SYS_REG_QQQ_BITS 0x1 +#define VIP_SYS_REG_RST_ISP_TOP 0x0 +#define VIP_SYS_REG_RST_ISP_TOP_OFFSET 1 +#define VIP_SYS_REG_RST_ISP_TOP_MASK 0x2 +#define VIP_SYS_REG_RST_ISP_TOP_BITS 0x1 +#define VIP_SYS_REG_RST_IMG_D 0x0 +#define VIP_SYS_REG_RST_IMG_D_OFFSET 2 +#define VIP_SYS_REG_RST_IMG_D_MASK 0x4 +#define VIP_SYS_REG_RST_IMG_D_BITS 0x1 +#define VIP_SYS_REG_RST_IMG_V 0x0 +#define VIP_SYS_REG_RST_IMG_V_OFFSET 3 +#define VIP_SYS_REG_RST_IMG_V_MASK 0x8 +#define VIP_SYS_REG_RST_IMG_V_BITS 0x1 +#define VIP_SYS_REG_RST_SC_TOP 0x0 +#define VIP_SYS_REG_RST_SC_TOP_OFFSET 4 +#define VIP_SYS_REG_RST_SC_TOP_MASK 0x10 +#define VIP_SYS_REG_RST_SC_TOP_BITS 0x1 +#define VIP_SYS_REG_RST_SC_D 0x0 +#define VIP_SYS_REG_RST_SC_D_OFFSET 5 +#define VIP_SYS_REG_RST_SC_D_MASK 0x20 +#define VIP_SYS_REG_RST_SC_D_BITS 0x1 +#define VIP_SYS_REG_RST_SC_V1 0x0 +#define VIP_SYS_REG_RST_SC_V1_OFFSET 6 +#define VIP_SYS_REG_RST_SC_V1_MASK 0x40 +#define VIP_SYS_REG_RST_SC_V1_BITS 0x1 +#define VIP_SYS_REG_RST_SC_V2 0x0 +#define VIP_SYS_REG_RST_SC_V2_OFFSET 7 +#define VIP_SYS_REG_RST_SC_V2_MASK 0x80 +#define VIP_SYS_REG_RST_SC_V2_BITS 0x1 +#define VIP_SYS_REG_RST_SC_V3 0x0 +#define VIP_SYS_REG_RST_SC_V3_OFFSET 8 +#define VIP_SYS_REG_RST_SC_V3_MASK 0x100 +#define VIP_SYS_REG_RST_SC_V3_BITS 0x1 +#define VIP_SYS_REG_RST_DISP 0x0 +#define VIP_SYS_REG_RST_DISP_OFFSET 9 +#define VIP_SYS_REG_RST_DISP_MASK 0x200 +#define VIP_SYS_REG_RST_DISP_BITS 0x1 +#define VIP_SYS_REG_RST_BT 0x0 +#define VIP_SYS_REG_RST_BT_OFFSET 10 +#define VIP_SYS_REG_RST_BT_MASK 0x400 +#define VIP_SYS_REG_RST_BT_BITS 0x1 +#define VIP_SYS_REG_RST_DSI_MAC 0x0 +#define VIP_SYS_REG_RST_DSI_MAC_OFFSET 11 +#define VIP_SYS_REG_RST_DSI_MAC_MASK 0x800 +#define VIP_SYS_REG_RST_DSI_MAC_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_MAC0 0x0 +#define VIP_SYS_REG_RST_CSI_MAC0_OFFSET 12 +#define VIP_SYS_REG_RST_CSI_MAC0_MASK 0x1000 +#define VIP_SYS_REG_RST_CSI_MAC0_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_MAC1 0x0 +#define VIP_SYS_REG_RST_CSI_MAC1_OFFSET 13 +#define VIP_SYS_REG_RST_CSI_MAC1_MASK 0x2000 +#define VIP_SYS_REG_RST_CSI_MAC1_BITS 0x1 +#define VIP_SYS_REG_RST_LDC_TOP 0x0 +#define VIP_SYS_REG_RST_LDC_TOP_OFFSET 14 +#define VIP_SYS_REG_RST_LDC_TOP_MASK 0x4000 +#define VIP_SYS_REG_RST_LDC_TOP_BITS 0x1 +#define VIP_SYS_REG_RST_CLK_BT_DIV 0x0 +#define VIP_SYS_REG_RST_CLK_BT_DIV_OFFSET 15 +#define VIP_SYS_REG_RST_CLK_BT_DIV_MASK 0x8000 +#define VIP_SYS_REG_RST_CLK_BT_DIV_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_MAC2 0x0 +#define VIP_SYS_REG_RST_CSI_MAC2_OFFSET 16 +#define VIP_SYS_REG_RST_CSI_MAC2_MASK 0x10000 +#define VIP_SYS_REG_RST_CSI_MAC2_BITS 0x1 +#define VIP_SYS_REG_RST_ISP_TOP_APB 0x0 +#define VIP_SYS_REG_RST_ISP_TOP_APB_OFFSET 17 +#define VIP_SYS_REG_RST_ISP_TOP_APB_MASK 0x20000 +#define VIP_SYS_REG_RST_ISP_TOP_APB_BITS 0x1 +#define VIP_SYS_REG_RST_SC_TOP_APB 0x0 +#define VIP_SYS_REG_RST_SC_TOP_APB_OFFSET 18 +#define VIP_SYS_REG_RST_SC_TOP_APB_MASK 0x40000 +#define VIP_SYS_REG_RST_SC_TOP_APB_BITS 0x1 +#define VIP_SYS_REG_RST_LDC_TOP_APB 0x0 +#define VIP_SYS_REG_RST_LDC_TOP_APB_OFFSET 19 +#define VIP_SYS_REG_RST_LDC_TOP_APB_MASK 0x80000 +#define VIP_SYS_REG_RST_LDC_TOP_APB_BITS 0x1 +#define VIP_SYS_REG_RST_DSI_MAC_APB 0x0 +#define VIP_SYS_REG_RST_DSI_MAC_APB_OFFSET 20 +#define VIP_SYS_REG_RST_DSI_MAC_APB_MASK 0x100000 +#define VIP_SYS_REG_RST_DSI_MAC_APB_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_MAC0_APB 0x0 +#define VIP_SYS_REG_RST_CSI_MAC0_APB_OFFSET 21 +#define VIP_SYS_REG_RST_CSI_MAC0_APB_MASK 0x200000 +#define VIP_SYS_REG_RST_CSI_MAC0_APB_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_MAC1_APB 0x0 +#define VIP_SYS_REG_RST_CSI_MAC1_APB_OFFSET 22 +#define VIP_SYS_REG_RST_CSI_MAC1_APB_MASK 0x400000 +#define VIP_SYS_REG_RST_CSI_MAC1_APB_BITS 0x1 +#define VIP_SYS_REG_RST_DSI_PHY_APB 0x0 +#define VIP_SYS_REG_RST_DSI_PHY_APB_OFFSET 23 +#define VIP_SYS_REG_RST_DSI_PHY_APB_MASK 0x800000 +#define VIP_SYS_REG_RST_DSI_PHY_APB_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_PHY0_APB 0x0 +#define VIP_SYS_REG_RST_CSI_PHY0_APB_OFFSET 24 +#define VIP_SYS_REG_RST_CSI_PHY0_APB_MASK 0x1000000 +#define VIP_SYS_REG_RST_CSI_PHY0_APB_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_PHY1_APB 0x0 +#define VIP_SYS_REG_RST_CSI_PHY1_APB_OFFSET 25 +#define VIP_SYS_REG_RST_CSI_PHY1_APB_MASK 0x2000000 +#define VIP_SYS_REG_RST_CSI_PHY1_APB_BITS 0x1 +#define VIP_SYS_REG_RST_DSI_PHY 0x0 +#define VIP_SYS_REG_RST_DSI_PHY_OFFSET 26 +#define VIP_SYS_REG_RST_DSI_PHY_MASK 0x4000000 +#define VIP_SYS_REG_RST_DSI_PHY_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_PHY0 0x0 +#define VIP_SYS_REG_RST_CSI_PHY0_OFFSET 27 +#define VIP_SYS_REG_RST_CSI_PHY0_MASK 0x8000000 +#define VIP_SYS_REG_RST_CSI_PHY0_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_PHY1 0x0 +#define VIP_SYS_REG_RST_CSI_PHY1_OFFSET 28 +#define VIP_SYS_REG_RST_CSI_PHY1_MASK 0x10000000 +#define VIP_SYS_REG_RST_CSI_PHY1_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_BE 0x0 +#define VIP_SYS_REG_RST_CSI_BE_OFFSET 29 +#define VIP_SYS_REG_RST_CSI_BE_MASK 0x20000000 +#define VIP_SYS_REG_RST_CSI_BE_BITS 0x1 +#define VIP_SYS_REG_RST_CSI_MAC2_APB 0x0 +#define VIP_SYS_REG_RST_CSI_MAC2_APB_OFFSET 30 +#define VIP_SYS_REG_RST_CSI_MAC2_APB_MASK 0x40000000 +#define VIP_SYS_REG_RST_CSI_MAC2_APB_BITS 0x1 +#define VIP_SYS_REG_RST_REV 0x0 +#define VIP_SYS_REG_RST_REV_OFFSET 31 +#define VIP_SYS_REG_RST_REV_MASK 0x80000000 +#define VIP_SYS_REG_RST_REV_BITS 0x1 +#define VIP_SYS_REG_CLK_AXI_ISP_TOP_EN 0x4 +#define VIP_SYS_REG_CLK_AXI_ISP_TOP_EN_OFFSET 0 +#define VIP_SYS_REG_CLK_AXI_ISP_TOP_EN_MASK 0x1 +#define VIP_SYS_REG_CLK_AXI_ISP_TOP_EN_BITS 0x1 +#define VIP_SYS_REG_EN_REV0 0x4 +#define VIP_SYS_REG_EN_REV0_OFFSET 1 +#define VIP_SYS_REG_EN_REV0_MASK 0xfffe +#define VIP_SYS_REG_EN_REV0_BITS 0xf +#define VIP_SYS_REG_EN_REV1 0x4 +#define VIP_SYS_REG_EN_REV1_OFFSET 16 +#define VIP_SYS_REG_EN_REV1_MASK 0xffff0000 +#define VIP_SYS_REG_EN_REV1_BITS 0x10 +#define VIP_SYS_INT_SC_TOP 0x8 +#define VIP_SYS_INT_SC_TOP_OFFSET 0 +#define VIP_SYS_INT_SC_TOP_MASK 0x1 +#define VIP_SYS_INT_SC_TOP_BITS 0x1 +#define VIP_SYS_INT_ISP_TOP 0x8 +#define VIP_SYS_INT_ISP_TOP_OFFSET 16 +#define VIP_SYS_INT_ISP_TOP_MASK 0x10000 +#define VIP_SYS_INT_ISP_TOP_BITS 0x1 +#define VIP_SYS_INT_LDC_TOP 0x8 +#define VIP_SYS_INT_LDC_TOP_OFFSET 24 +#define VIP_SYS_INT_LDC_TOP_MASK 0x1000000 +#define VIP_SYS_INT_LDC_TOP_BITS 0x1 +#define VIP_SYS_INT_IVE_TOP 0x8 +#define VIP_SYS_INT_IVE_TOP_OFFSET 25 +#define VIP_SYS_INT_IVE_TOP_MASK 0x2000000 +#define VIP_SYS_INT_IVE_TOP_BITS 0x1 +#define VIP_SYS_INT_CSI_MAC0 0x8 +#define VIP_SYS_INT_CSI_MAC0_OFFSET 28 +#define VIP_SYS_INT_CSI_MAC0_MASK 0x10000000 +#define VIP_SYS_INT_CSI_MAC0_BITS 0x1 +#define VIP_SYS_INT_CSI_MAC1 0x8 +#define VIP_SYS_INT_CSI_MAC1_OFFSET 29 +#define VIP_SYS_INT_CSI_MAC1_MASK 0x20000000 +#define VIP_SYS_INT_CSI_MAC1_BITS 0x1 +#define VIP_SYS_REG_PORT_SEL_SC_OFF 0x10 +#define VIP_SYS_REG_PORT_SEL_SC_OFF_OFFSET 0 +#define VIP_SYS_REG_PORT_SEL_SC_OFF_MASK 0x1 +#define VIP_SYS_REG_PORT_SEL_SC_OFF_BITS 0x1 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF0 0x10 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF0_OFFSET 1 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF0_MASK 0x2 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF0_BITS 0x1 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF1 0x10 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF1_OFFSET 2 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF1_MASK 0x4 +#define VIP_SYS_REG_PORT_SEL_ISP_OFF1_BITS 0x1 +#define VIP_SYS_REG_PORT_SEL_LDC_OFF 0x10 +#define VIP_SYS_REG_PORT_SEL_LDC_OFF_OFFSET 3 +#define VIP_SYS_REG_PORT_SEL_LDC_OFF_MASK 0x8 +#define VIP_SYS_REG_PORT_SEL_LDC_OFF_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_SC_TOP 0x14 +#define VIP_SYS_APB_CLK_EN_SC_TOP_OFFSET 0 +#define VIP_SYS_APB_CLK_EN_SC_TOP_MASK 0x1 +#define VIP_SYS_APB_CLK_EN_SC_TOP_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_ISP_TOP 0x14 +#define VIP_SYS_APB_CLK_EN_ISP_TOP_OFFSET 1 +#define VIP_SYS_APB_CLK_EN_ISP_TOP_MASK 0x2 +#define VIP_SYS_APB_CLK_EN_ISP_TOP_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_LDC_TOP 0x14 +#define VIP_SYS_APB_CLK_EN_LDC_TOP_OFFSET 2 +#define VIP_SYS_APB_CLK_EN_LDC_TOP_MASK 0x4 +#define VIP_SYS_APB_CLK_EN_LDC_TOP_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_IVE_TOP 0x14 +#define VIP_SYS_APB_CLK_EN_IVE_TOP_OFFSET 3 +#define VIP_SYS_APB_CLK_EN_IVE_TOP_MASK 0x8 +#define VIP_SYS_APB_CLK_EN_IVE_TOP_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_VIP_SYS 0x14 +#define VIP_SYS_APB_CLK_EN_VIP_SYS_OFFSET 4 +#define VIP_SYS_APB_CLK_EN_VIP_SYS_MASK 0x10 +#define VIP_SYS_APB_CLK_EN_VIP_SYS_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_CSI_PHY0 0x14 +#define VIP_SYS_APB_CLK_EN_CSI_PHY0_OFFSET 5 +#define VIP_SYS_APB_CLK_EN_CSI_PHY0_MASK 0x20 +#define VIP_SYS_APB_CLK_EN_CSI_PHY0_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_DSI_PHY 0x14 +#define VIP_SYS_APB_CLK_EN_DSI_PHY_OFFSET 6 +#define VIP_SYS_APB_CLK_EN_DSI_PHY_MASK 0x40 +#define VIP_SYS_APB_CLK_EN_DSI_PHY_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_CSI_MAC0 0x14 +#define VIP_SYS_APB_CLK_EN_CSI_MAC0_OFFSET 8 +#define VIP_SYS_APB_CLK_EN_CSI_MAC0_MASK 0x100 +#define VIP_SYS_APB_CLK_EN_CSI_MAC0_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_CSI_MAC1 0x14 +#define VIP_SYS_APB_CLK_EN_CSI_MAC1_OFFSET 9 +#define VIP_SYS_APB_CLK_EN_CSI_MAC1_MASK 0x200 +#define VIP_SYS_APB_CLK_EN_CSI_MAC1_BITS 0x1 +#define VIP_SYS_SC_X2P_BUSY_EN 0x14 +#define VIP_SYS_SC_X2P_BUSY_EN_OFFSET 12 +#define VIP_SYS_SC_X2P_BUSY_EN_MASK 0x1000 +#define VIP_SYS_SC_X2P_BUSY_EN_BITS 0x1 +#define VIP_SYS_ISP_X2P_BUSY_EN 0x14 +#define VIP_SYS_ISP_X2P_BUSY_EN_OFFSET 13 +#define VIP_SYS_ISP_X2P_BUSY_EN_MASK 0x2000 +#define VIP_SYS_ISP_X2P_BUSY_EN_BITS 0x1 +#define VIP_SYS_LDC_X2P_BUSY_EN 0x14 +#define VIP_SYS_LDC_X2P_BUSY_EN_OFFSET 14 +#define VIP_SYS_LDC_X2P_BUSY_EN_MASK 0x4000 +#define VIP_SYS_LDC_X2P_BUSY_EN_BITS 0x1 +#define VIP_SYS_IVE_X2P_BUSY_EN 0x14 +#define VIP_SYS_IVE_X2P_BUSY_EN_OFFSET 15 +#define VIP_SYS_IVE_X2P_BUSY_EN_MASK 0x8000 +#define VIP_SYS_IVE_X2P_BUSY_EN_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_SC_TOP 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_SC_TOP_OFFSET 16 +#define VIP_SYS_APB_AUTO_GATING_EN_SC_TOP_MASK 0x10000 +#define VIP_SYS_APB_AUTO_GATING_EN_SC_TOP_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_ISP_TOP 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_ISP_TOP_OFFSET 17 +#define VIP_SYS_APB_AUTO_GATING_EN_ISP_TOP_MASK 0x20000 +#define VIP_SYS_APB_AUTO_GATING_EN_ISP_TOP_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_LDC_TOP 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_LDC_TOP_OFFSET 18 +#define VIP_SYS_APB_AUTO_GATING_EN_LDC_TOP_MASK 0x40000 +#define VIP_SYS_APB_AUTO_GATING_EN_LDC_TOP_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_IVE_TOP 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_IVE_TOP_OFFSET 19 +#define VIP_SYS_APB_AUTO_GATING_EN_IVE_TOP_MASK 0x80000 +#define VIP_SYS_APB_AUTO_GATING_EN_IVE_TOP_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_VIP_SYS 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_VIP_SYS_OFFSET 20 +#define VIP_SYS_APB_AUTO_GATING_EN_VIP_SYS_MASK 0x100000 +#define VIP_SYS_APB_AUTO_GATING_EN_VIP_SYS_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_PHY0 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_PHY0_OFFSET 21 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_PHY0_MASK 0x200000 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_PHY0_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_DSI_PHY 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_DSI_PHY_OFFSET 22 +#define VIP_SYS_APB_AUTO_GATING_EN_DSI_PHY_MASK 0x400000 +#define VIP_SYS_APB_AUTO_GATING_EN_DSI_PHY_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC0 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC0_OFFSET 24 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC0_MASK 0x1000000 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC0_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC1 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC1_OFFSET 25 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC1_MASK 0x2000000 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC1_BITS 0x1 +#define VIP_SYS_APB_CLK_EN_CSI_MAC2 0x14 +#define VIP_SYS_APB_CLK_EN_CSI_MAC2_OFFSET 26 +#define VIP_SYS_APB_CLK_EN_CSI_MAC2_MASK 0x4000000 +#define VIP_SYS_APB_CLK_EN_CSI_MAC2_BITS 0x1 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC2 0x14 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC2_OFFSET 27 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC2_MASK 0x8000000 +#define VIP_SYS_APB_AUTO_GATING_EN_CSI_MAC2_BITS 0x1 +#define VIP_SYS_CLK_BT_SRC_SEL 0x18 +#define VIP_SYS_CLK_BT_SRC_SEL_OFFSET 0 +#define VIP_SYS_CLK_BT_SRC_SEL_MASK 0x3 +#define VIP_SYS_CLK_BT_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_LVDS0_SRC_SEL 0x18 +#define VIP_SYS_CLK_LVDS0_SRC_SEL_OFFSET 2 +#define VIP_SYS_CLK_LVDS0_SRC_SEL_MASK 0x4 +#define VIP_SYS_CLK_LVDS0_SRC_SEL_BITS 0x1 +#define VIP_SYS_CLK_LVDS1_SRC_SEL 0x18 +#define VIP_SYS_CLK_LVDS1_SRC_SEL_OFFSET 3 +#define VIP_SYS_CLK_LVDS1_SRC_SEL_MASK 0x8 +#define VIP_SYS_CLK_LVDS1_SRC_SEL_BITS 0x1 +#define VIP_SYS_CLK_DISP_SEL_BT_DIV1 0x18 +#define VIP_SYS_CLK_DISP_SEL_BT_DIV1_OFFSET 4 +#define VIP_SYS_CLK_DISP_SEL_BT_DIV1_MASK 0x10 +#define VIP_SYS_CLK_DISP_SEL_BT_DIV1_BITS 0x1 +#define VIP_SYS_CLK_DISP_DIV_CNT 0x18 +#define VIP_SYS_CLK_DISP_DIV_CNT_OFFSET 5 +#define VIP_SYS_CLK_DISP_DIV_CNT_MASK 0xe0 +#define VIP_SYS_CLK_DISP_DIV_CNT_BITS 0x3 +#define VIP_SYS_CLK_DSI_MAC_SRC_SEL 0x18 +#define VIP_SYS_CLK_DSI_MAC_SRC_SEL_OFFSET 8 +#define VIP_SYS_CLK_DSI_MAC_SRC_SEL_MASK 0x100 +#define VIP_SYS_CLK_DSI_MAC_SRC_SEL_BITS 0x1 +#define VIP_SYS_CLK_CSI0_RX_SRC_SEL 0x18 +#define VIP_SYS_CLK_CSI0_RX_SRC_SEL_OFFSET 10 +#define VIP_SYS_CLK_CSI0_RX_SRC_SEL_MASK 0x400 +#define VIP_SYS_CLK_CSI0_RX_SRC_SEL_BITS 0x1 +#define VIP_SYS_CLK_CSI1_RX_SRC_SEL 0x18 +#define VIP_SYS_CLK_CSI1_RX_SRC_SEL_OFFSET 11 +#define VIP_SYS_CLK_CSI1_RX_SRC_SEL_MASK 0x800 +#define VIP_SYS_CLK_CSI1_RX_SRC_SEL_BITS 0x1 +#define VIP_SYS_PAD_VI0_CLK_SRC_SEL 0x18 +#define VIP_SYS_PAD_VI0_CLK_SRC_SEL_OFFSET 12 +#define VIP_SYS_PAD_VI0_CLK_SRC_SEL_MASK 0x1000 +#define VIP_SYS_PAD_VI0_CLK_SRC_SEL_BITS 0x1 +#define VIP_SYS_PAD_VI1_CLK_SRC_SEL 0x18 +#define VIP_SYS_PAD_VI1_CLK_SRC_SEL_OFFSET 13 +#define VIP_SYS_PAD_VI1_CLK_SRC_SEL_MASK 0x2000 +#define VIP_SYS_PAD_VI1_CLK_SRC_SEL_BITS 0x1 +#define VIP_SYS_PAD_VI2_CLK_SRC_SEL 0x18 +#define VIP_SYS_PAD_VI2_CLK_SRC_SEL_OFFSET 14 +#define VIP_SYS_PAD_VI2_CLK_SRC_SEL_MASK 0x4000 +#define VIP_SYS_PAD_VI2_CLK_SRC_SEL_BITS 0x1 +#define VIP_SYS_CLK_DISP_DIV_UP_W1T 0x18 +#define VIP_SYS_CLK_DISP_DIV_UP_W1T_OFFSET 16 +#define VIP_SYS_CLK_DISP_DIV_UP_W1T_MASK 0x10000 +#define VIP_SYS_CLK_DISP_DIV_UP_W1T_BITS 0x1 +#define VIP_SYS_CLK_VIP_SRC_SEL 0x1c +#define VIP_SYS_CLK_VIP_SRC_SEL_OFFSET 0 +#define VIP_SYS_CLK_VIP_SRC_SEL_MASK 0x1 +#define VIP_SYS_CLK_VIP_SRC_SEL_BITS 0x1 +#define VIP_SYS_CLK_CSI_MAC0_SRC_SEL 0x1c +#define VIP_SYS_CLK_CSI_MAC0_SRC_SEL_OFFSET 4 +#define VIP_SYS_CLK_CSI_MAC0_SRC_SEL_MASK 0x30 +#define VIP_SYS_CLK_CSI_MAC0_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_CSI_MAC1_SRC_SEL 0x1c +#define VIP_SYS_CLK_CSI_MAC1_SRC_SEL_OFFSET 8 +#define VIP_SYS_CLK_CSI_MAC1_SRC_SEL_MASK 0x300 +#define VIP_SYS_CLK_CSI_MAC1_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_CSI_BE_SRC_SEL 0x1c +#define VIP_SYS_CLK_CSI_BE_SRC_SEL_OFFSET 12 +#define VIP_SYS_CLK_CSI_BE_SRC_SEL_MASK 0x3000 +#define VIP_SYS_CLK_CSI_BE_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_ISP_SRC_SEL 0x1c +#define VIP_SYS_CLK_ISP_SRC_SEL_OFFSET 16 +#define VIP_SYS_CLK_ISP_SRC_SEL_MASK 0x30000 +#define VIP_SYS_CLK_ISP_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_LDC_SRC_SEL 0x1c +#define VIP_SYS_CLK_LDC_SRC_SEL_OFFSET 20 +#define VIP_SYS_CLK_LDC_SRC_SEL_MASK 0x100000 +#define VIP_SYS_CLK_LDC_SRC_SEL_BITS 0x1 +#define VIP_SYS_CLK_IVE_SRC_SEL 0x1c +#define VIP_SYS_CLK_IVE_SRC_SEL_OFFSET 21 +#define VIP_SYS_CLK_IVE_SRC_SEL_MASK 0x600000 +#define VIP_SYS_CLK_IVE_SRC_SEL_BITS 0x2 +#define VIP_SYS_ISP_CLK_CSI1_SRC_SEL 0x1c +#define VIP_SYS_ISP_CLK_CSI1_SRC_SEL_OFFSET 24 +#define VIP_SYS_ISP_CLK_CSI1_SRC_SEL_MASK 0x3000000 +#define VIP_SYS_ISP_CLK_CSI1_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_RAW_SRC_SEL 0x1c +#define VIP_SYS_CLK_RAW_SRC_SEL_OFFSET 26 +#define VIP_SYS_CLK_RAW_SRC_SEL_MASK 0xc000000 +#define VIP_SYS_CLK_RAW_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_OSDC_SRC_SEL 0x1c +#define VIP_SYS_CLK_OSDC_SRC_SEL_OFFSET 28 +#define VIP_SYS_CLK_OSDC_SRC_SEL_MASK 0x30000000 +#define VIP_SYS_CLK_OSDC_SRC_SEL_BITS 0x2 +#define VIP_SYS_CLK_CSI_MAC2_SRC_SEL 0x1c +#define VIP_SYS_CLK_CSI_MAC2_SRC_SEL_OFFSET 30 +#define VIP_SYS_CLK_CSI_MAC2_SRC_SEL_MASK 0xc0000000 +#define VIP_SYS_CLK_CSI_MAC2_SRC_SEL_BITS 0x2 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_RT 0x20 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_RT_OFFSET 0 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_RT_MASK 0x1 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_RT_BITS 0x1 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_RT 0x20 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_RT_OFFSET 1 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_RT_MASK 0x2 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_RT_BITS 0x1 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_RT 0x20 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_RT_OFFSET 8 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_RT_MASK 0x3f00 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_RT_BITS 0x6 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_RT 0x20 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_RT_OFFSET 16 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_RT_MASK 0xff0000 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_RT_BITS 0x8 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_OFF 0x24 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_OFF_OFFSET 0 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_OFF_MASK 0x1 +#define VIP_SYS_REG_LP_DISABLE_VIP_AXI_OFF_BITS 0x1 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_OFF 0x24 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_OFF_OFFSET 1 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_OFF_MASK 0x2 +#define VIP_SYS_REG_LP_LOCK_VIP_AXI_OFF_BITS 0x1 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_OFF 0x24 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_OFF_OFFSET 8 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_OFF_MASK 0x3f00 +#define VIP_SYS_REG_LP_CTRL_VIP_AXI_OFF_BITS 0x6 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_OFF 0x24 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_OFF_OFFSET 16 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_OFF_MASK 0xff0000 +#define VIP_SYS_REG_DIS_FAB_LP_OPT_AXI_OFF_BITS 0x8 +#define VIP_SYS_REG_LP_DISABLE_VIP_X2P 0x28 +#define VIP_SYS_REG_LP_DISABLE_VIP_X2P_OFFSET 0 +#define VIP_SYS_REG_LP_DISABLE_VIP_X2P_MASK 0x1 +#define VIP_SYS_REG_LP_DISABLE_VIP_X2P_BITS 0x1 +#define VIP_SYS_REG_LP_LOCK_VIP_X2P 0x28 +#define VIP_SYS_REG_LP_LOCK_VIP_X2P_OFFSET 1 +#define VIP_SYS_REG_LP_LOCK_VIP_X2P_MASK 0x2 +#define VIP_SYS_REG_LP_LOCK_VIP_X2P_BITS 0x1 +#define VIP_SYS_REG_LP_CTRL_VIP_X2P 0x28 +#define VIP_SYS_REG_LP_CTRL_VIP_X2P_OFFSET 8 +#define VIP_SYS_REG_LP_CTRL_VIP_X2P_MASK 0x3f00 +#define VIP_SYS_REG_LP_CTRL_VIP_X2P_BITS 0x6 +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M0 0x2c +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M0_OFFSET 0 +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M0_MASK 0x1 +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M0_BITS 0x1 +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M0 0x2c +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M0_OFFSET 1 +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M0_MASK 0x2 +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M0_BITS 0x1 +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M0 0x2c +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M0_OFFSET 8 +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M0_MASK 0x3f00 +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M0_BITS 0x6 +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M1 0x2c +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M1_OFFSET 16 +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M1_MASK 0x10000 +#define VIP_SYS_REG_LP_DISABLE_SC_AXI_FAB_M1_BITS 0x1 +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M1 0x2c +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M1_OFFSET 17 +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M1_MASK 0x20000 +#define VIP_SYS_REG_LP_LOCK_SC_AXI_FAB_M1_BITS 0x1 +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M1 0x2c +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M1_OFFSET 24 +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M1_MASK 0x3f000000 +#define VIP_SYS_REG_LP_CTRL_SC_AXI_FAB_M1_BITS 0x6 +#define VIP_SYS_REG_CK_COEF_ISP_TOP 0x30 +#define VIP_SYS_REG_CK_COEF_ISP_TOP_OFFSET 0 +#define VIP_SYS_REG_CK_COEF_ISP_TOP_MASK 0x1f +#define VIP_SYS_REG_CK_COEF_ISP_TOP_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_LDC 0x30 +#define VIP_SYS_REG_CK_COEF_LDC_OFFSET 5 +#define VIP_SYS_REG_CK_COEF_LDC_MASK 0x3e0 +#define VIP_SYS_REG_CK_COEF_LDC_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_IMG_D 0x30 +#define VIP_SYS_REG_CK_COEF_IMG_D_OFFSET 10 +#define VIP_SYS_REG_CK_COEF_IMG_D_MASK 0x7c00 +#define VIP_SYS_REG_CK_COEF_IMG_D_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_IMG_V 0x30 +#define VIP_SYS_REG_CK_COEF_IMG_V_OFFSET 15 +#define VIP_SYS_REG_CK_COEF_IMG_V_MASK 0xf8000 +#define VIP_SYS_REG_CK_COEF_IMG_V_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_SC_D 0x30 +#define VIP_SYS_REG_CK_COEF_SC_D_OFFSET 20 +#define VIP_SYS_REG_CK_COEF_SC_D_MASK 0x1f00000 +#define VIP_SYS_REG_CK_COEF_SC_D_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_SC_V1 0x30 +#define VIP_SYS_REG_CK_COEF_SC_V1_OFFSET 25 +#define VIP_SYS_REG_CK_COEF_SC_V1_MASK 0x3e000000 +#define VIP_SYS_REG_CK_COEF_SC_V1_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_SC_V2 0x34 +#define VIP_SYS_REG_CK_COEF_SC_V2_OFFSET 0 +#define VIP_SYS_REG_CK_COEF_SC_V2_MASK 0x1f +#define VIP_SYS_REG_CK_COEF_SC_V2_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_SC_V3 0x34 +#define VIP_SYS_REG_CK_COEF_SC_V3_OFFSET 5 +#define VIP_SYS_REG_CK_COEF_SC_V3_MASK 0x3e0 +#define VIP_SYS_REG_CK_COEF_SC_V3_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_CSI_MAC0 0x34 +#define VIP_SYS_REG_CK_COEF_CSI_MAC0_OFFSET 10 +#define VIP_SYS_REG_CK_COEF_CSI_MAC0_MASK 0x7c00 +#define VIP_SYS_REG_CK_COEF_CSI_MAC0_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_CSI_MAC1 0x34 +#define VIP_SYS_REG_CK_COEF_CSI_MAC1_OFFSET 15 +#define VIP_SYS_REG_CK_COEF_CSI_MAC1_MASK 0xf8000 +#define VIP_SYS_REG_CK_COEF_CSI_MAC1_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_OSDC 0x34 +#define VIP_SYS_REG_CK_COEF_OSDC_OFFSET 20 +#define VIP_SYS_REG_CK_COEF_OSDC_MASK 0x1f00000 +#define VIP_SYS_REG_CK_COEF_OSDC_BITS 0x5 +#define VIP_SYS_REG_CK_COEF_REV 0x34 +#define VIP_SYS_REG_CK_COEF_REV_OFFSET 25 +#define VIP_SYS_REG_CK_COEF_REV_MASK 0x3e000000 +#define VIP_SYS_REG_CK_COEF_REV_BITS 0x5 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC0 0x38 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC0_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC0_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC0_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC0 0x38 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC0_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC0_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC0_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC0 0x38 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC0_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC0_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC0_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC0 0x38 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC0_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC0_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC0_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC0 0x38 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC0_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC0_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC0_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC0 0x38 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC0_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC0_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC0_BITS 0x5 +#define VIP_SYS_REG_NORM_DIV_EN_ISP_TOP 0x3c +#define VIP_SYS_REG_NORM_DIV_EN_ISP_TOP_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_ISP_TOP_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_ISP_TOP_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_ISP_TOP 0x3c +#define VIP_SYS_REG_IDLE_DIV_EN_ISP_TOP_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_ISP_TOP_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_ISP_TOP_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_ISP_TOP 0x3c +#define VIP_SYS_REG_UPDATE_SEL_ISP_TOP_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_ISP_TOP_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_ISP_TOP_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_ISP_TOP 0x3c +#define VIP_SYS_REG_IDLE_SLOW_SEL_ISP_TOP_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_ISP_TOP_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_ISP_TOP_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_ISP_TOP 0x3c +#define VIP_SYS_REG_IDLE_WAIT_SEL_ISP_TOP_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_ISP_TOP_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_ISP_TOP_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_ISP_TOP 0x3c +#define VIP_SYS_REG_NORM_DIV_VAL_ISP_TOP_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_ISP_TOP_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_ISP_TOP_BITS 0x5 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC1 0x40 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC1_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC1_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC1_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC1 0x40 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC1_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC1_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC1_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC1 0x40 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC1_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC1_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC1_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC1 0x40 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC1_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC1_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC1_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC1 0x40 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC1_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC1_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC1_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC1 0x40 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC1_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC1_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC1_BITS 0x5 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_BE 0x44 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_BE_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_BE_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_BE_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_BE 0x44 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_BE_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_BE_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_BE_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_CSI_BE 0x44 +#define VIP_SYS_REG_UPDATE_SEL_CSI_BE_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_CSI_BE_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_CSI_BE_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_BE 0x44 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_BE_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_BE_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_BE_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_BE 0x44 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_BE_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_BE_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_BE_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_BE 0x44 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_BE_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_BE_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_BE_BITS 0x5 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC2 0x48 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC2_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC2_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_CSI_MAC2_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC2 0x48 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC2_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC2_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_CSI_MAC2_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC2 0x48 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC2_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC2_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_CSI_MAC2_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC2 0x48 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC2_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC2_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CSI_MAC2_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC2 0x48 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC2_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC2_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CSI_MAC2_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC2 0x48 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC2_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC2_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_CSI_MAC2_BITS 0x5 +#define VIP_SYS_CACTIVE_AXI_RT_FAB 0x50 +#define VIP_SYS_CACTIVE_AXI_RT_FAB_OFFSET 0 +#define VIP_SYS_CACTIVE_AXI_RT_FAB_MASK 0x1 +#define VIP_SYS_CACTIVE_AXI_RT_FAB_BITS 0x1 +#define VIP_SYS_CSYSREQ_AXI_RT_FAB 0x50 +#define VIP_SYS_CSYSREQ_AXI_RT_FAB_OFFSET 1 +#define VIP_SYS_CSYSREQ_AXI_RT_FAB_MASK 0x2 +#define VIP_SYS_CSYSREQ_AXI_RT_FAB_BITS 0x1 +#define VIP_SYS_CSYSACK_AXI_RT_FAB 0x50 +#define VIP_SYS_CSYSACK_AXI_RT_FAB_OFFSET 2 +#define VIP_SYS_CSYSACK_AXI_RT_FAB_MASK 0x4 +#define VIP_SYS_CSYSACK_AXI_RT_FAB_BITS 0x1 +#define VIP_SYS_LPC_RT_FAB_LP_LOCK_O 0x50 +#define VIP_SYS_LPC_RT_FAB_LP_LOCK_O_OFFSET 3 +#define VIP_SYS_LPC_RT_FAB_LP_LOCK_O_MASK 0x8 +#define VIP_SYS_LPC_RT_FAB_LP_LOCK_O_BITS 0x1 +#define VIP_SYS_LPC_RT_FAB_LP_BUSY_O 0x50 +#define VIP_SYS_LPC_RT_FAB_LP_BUSY_O_OFFSET 4 +#define VIP_SYS_LPC_RT_FAB_LP_BUSY_O_MASK 0x10 +#define VIP_SYS_LPC_RT_FAB_LP_BUSY_O_BITS 0x1 +#define VIP_SYS_CACTIVE_AXI_OFF_FAB 0x50 +#define VIP_SYS_CACTIVE_AXI_OFF_FAB_OFFSET 5 +#define VIP_SYS_CACTIVE_AXI_OFF_FAB_MASK 0x20 +#define VIP_SYS_CACTIVE_AXI_OFF_FAB_BITS 0x1 +#define VIP_SYS_CSYSREQ_AXI_OFF_FAB 0x50 +#define VIP_SYS_CSYSREQ_AXI_OFF_FAB_OFFSET 6 +#define VIP_SYS_CSYSREQ_AXI_OFF_FAB_MASK 0x40 +#define VIP_SYS_CSYSREQ_AXI_OFF_FAB_BITS 0x1 +#define VIP_SYS_CSYSACK_AXI_OFF_FAB 0x50 +#define VIP_SYS_CSYSACK_AXI_OFF_FAB_OFFSET 7 +#define VIP_SYS_CSYSACK_AXI_OFF_FAB_MASK 0x80 +#define VIP_SYS_CSYSACK_AXI_OFF_FAB_BITS 0x1 +#define VIP_SYS_LPC_OFF_FAB_LP_LOCK_O 0x50 +#define VIP_SYS_LPC_OFF_FAB_LP_LOCK_O_OFFSET 8 +#define VIP_SYS_LPC_OFF_FAB_LP_LOCK_O_MASK 0x100 +#define VIP_SYS_LPC_OFF_FAB_LP_LOCK_O_BITS 0x1 +#define VIP_SYS_LPC_OFF_FAB_LP_BUSY_O 0x50 +#define VIP_SYS_LPC_OFF_FAB_LP_BUSY_O_OFFSET 9 +#define VIP_SYS_LPC_OFF_FAB_LP_BUSY_O_MASK 0x200 +#define VIP_SYS_LPC_OFF_FAB_LP_BUSY_O_BITS 0x1 +#define VIP_SYS_CACTIVE_X2P 0x50 +#define VIP_SYS_CACTIVE_X2P_OFFSET 10 +#define VIP_SYS_CACTIVE_X2P_MASK 0x400 +#define VIP_SYS_CACTIVE_X2P_BITS 0x1 +#define VIP_SYS_CSYSREQ_X2P 0x50 +#define VIP_SYS_CSYSREQ_X2P_OFFSET 11 +#define VIP_SYS_CSYSREQ_X2P_MASK 0x800 +#define VIP_SYS_CSYSREQ_X2P_BITS 0x1 +#define VIP_SYS_CSYSACK_X2P 0x50 +#define VIP_SYS_CSYSACK_X2P_OFFSET 12 +#define VIP_SYS_CSYSACK_X2P_MASK 0x1000 +#define VIP_SYS_CSYSACK_X2P_BITS 0x1 +#define VIP_SYS_LPC_X2P_FAB_LP_LOCK_O 0x50 +#define VIP_SYS_LPC_X2P_FAB_LP_LOCK_O_OFFSET 13 +#define VIP_SYS_LPC_X2P_FAB_LP_LOCK_O_MASK 0x2000 +#define VIP_SYS_LPC_X2P_FAB_LP_LOCK_O_BITS 0x1 +#define VIP_SYS_LPC_X2P_FAB_LP_BUSY_O 0x50 +#define VIP_SYS_LPC_X2P_FAB_LP_BUSY_O_OFFSET 14 +#define VIP_SYS_LPC_X2P_FAB_LP_BUSY_O_MASK 0x4000 +#define VIP_SYS_LPC_X2P_FAB_LP_BUSY_O_BITS 0x1 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M0 0x50 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M0_OFFSET 16 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M0_MASK 0x10000 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M0_BITS 0x1 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M0 0x50 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M0_OFFSET 17 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M0_MASK 0x20000 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M0_BITS 0x1 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M0 0x50 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M0_OFFSET 18 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M0_MASK 0x40000 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M0_BITS 0x1 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_LOCK_O 0x50 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_LOCK_O_OFFSET 19 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_LOCK_O_MASK 0x80000 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_LOCK_O_BITS 0x1 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_BUSY_O 0x50 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_BUSY_O_OFFSET 20 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_BUSY_O_MASK 0x100000 +#define VIP_SYS_LPC_SC_AXI_FAB_M0_LP_BUSY_O_BITS 0x1 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M1 0x50 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M1_OFFSET 21 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M1_MASK 0x200000 +#define VIP_SYS_CACTIVE_SC_AXI_FAB_M1_BITS 0x1 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M1 0x50 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M1_OFFSET 22 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M1_MASK 0x400000 +#define VIP_SYS_CSYSREQ_SC_AXI_FAB_M1_BITS 0x1 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M1 0x50 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M1_OFFSET 23 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M1_MASK 0x800000 +#define VIP_SYS_CSYSACK_SC_AXI_FAB_M1_BITS 0x1 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_LOCK_O 0x50 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_LOCK_O_OFFSET 24 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_LOCK_O_MASK 0x1000000 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_LOCK_O_BITS 0x1 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_BUSY_O 0x50 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_BUSY_O_OFFSET 25 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_BUSY_O_MASK 0x2000000 +#define VIP_SYS_LPC_SC_AXI_FAB_M1_LP_BUSY_O_BITS 0x1 +#define VIP_SYS_REG_SC_AXI_URGENT_AW_EN 0x5c +#define VIP_SYS_REG_SC_AXI_URGENT_AW_EN_OFFSET 0 +#define VIP_SYS_REG_SC_AXI_URGENT_AW_EN_MASK 0x1 +#define VIP_SYS_REG_SC_AXI_URGENT_AW_EN_BITS 0x1 +#define VIP_SYS_REG_SC_AXI_URGENT_AR_EN 0x5c +#define VIP_SYS_REG_SC_AXI_URGENT_AR_EN_OFFSET 1 +#define VIP_SYS_REG_SC_AXI_URGENT_AR_EN_MASK 0x2 +#define VIP_SYS_REG_SC_AXI_URGENT_AR_EN_BITS 0x1 +#define VIP_SYS_REG_AWURGENT_THRD_LOW_EN 0x5c +#define VIP_SYS_REG_AWURGENT_THRD_LOW_EN_OFFSET 8 +#define VIP_SYS_REG_AWURGENT_THRD_LOW_EN_MASK 0x100 +#define VIP_SYS_REG_AWURGENT_THRD_LOW_EN_BITS 0x1 +#define VIP_SYS_REG_ARURGENT_THRD_LOW_EN 0x5c +#define VIP_SYS_REG_ARURGENT_THRD_LOW_EN_OFFSET 9 +#define VIP_SYS_REG_ARURGENT_THRD_LOW_EN_MASK 0x200 +#define VIP_SYS_REG_ARURGENT_THRD_LOW_EN_BITS 0x1 +#define VIP_SYS_REG_AWURGENT_IDLE_CLR 0x5c +#define VIP_SYS_REG_AWURGENT_IDLE_CLR_OFFSET 16 +#define VIP_SYS_REG_AWURGENT_IDLE_CLR_MASK 0x10000 +#define VIP_SYS_REG_AWURGENT_IDLE_CLR_BITS 0x1 +#define VIP_SYS_REG_ARURGENT_IDLE_CLR 0x5c +#define VIP_SYS_REG_ARURGENT_IDLE_CLR_OFFSET 17 +#define VIP_SYS_REG_ARURGENT_IDLE_CLR_MASK 0x20000 +#define VIP_SYS_REG_ARURGENT_IDLE_CLR_BITS 0x1 +#define VIP_SYS_REG_AWQOS_OW_ISP 0x60 +#define VIP_SYS_REG_AWQOS_OW_ISP_OFFSET 0 +#define VIP_SYS_REG_AWQOS_OW_ISP_MASK 0x1 +#define VIP_SYS_REG_AWQOS_OW_ISP_BITS 0x1 +#define VIP_SYS_REG_ARQOS_OW_ISP 0x60 +#define VIP_SYS_REG_ARQOS_OW_ISP_OFFSET 1 +#define VIP_SYS_REG_ARQOS_OW_ISP_MASK 0x2 +#define VIP_SYS_REG_ARQOS_OW_ISP_BITS 0x1 +#define VIP_SYS_REG_AWQOS_OW_SC 0x60 +#define VIP_SYS_REG_AWQOS_OW_SC_OFFSET 2 +#define VIP_SYS_REG_AWQOS_OW_SC_MASK 0x4 +#define VIP_SYS_REG_AWQOS_OW_SC_BITS 0x1 +#define VIP_SYS_REG_ARQOS_OW_SC 0x60 +#define VIP_SYS_REG_ARQOS_OW_SC_OFFSET 3 +#define VIP_SYS_REG_ARQOS_OW_SC_MASK 0x8 +#define VIP_SYS_REG_ARQOS_OW_SC_BITS 0x1 +#define VIP_SYS_REG_AWQOS_OW_SC_M1 0x60 +#define VIP_SYS_REG_AWQOS_OW_SC_M1_OFFSET 4 +#define VIP_SYS_REG_AWQOS_OW_SC_M1_MASK 0x10 +#define VIP_SYS_REG_AWQOS_OW_SC_M1_BITS 0x1 +#define VIP_SYS_REG_ARQOS_OW_SC_M1 0x60 +#define VIP_SYS_REG_ARQOS_OW_SC_M1_OFFSET 5 +#define VIP_SYS_REG_ARQOS_OW_SC_M1_MASK 0x20 +#define VIP_SYS_REG_ARQOS_OW_SC_M1_BITS 0x1 +#define VIP_SYS_REG_AWQOS_OW_ISP_M1 0x60 +#define VIP_SYS_REG_AWQOS_OW_ISP_M1_OFFSET 6 +#define VIP_SYS_REG_AWQOS_OW_ISP_M1_MASK 0x40 +#define VIP_SYS_REG_AWQOS_OW_ISP_M1_BITS 0x1 +#define VIP_SYS_REG_ARQOS_OW_ISP_M1 0x60 +#define VIP_SYS_REG_ARQOS_OW_ISP_M1_OFFSET 7 +#define VIP_SYS_REG_ARQOS_OW_ISP_M1_MASK 0x80 +#define VIP_SYS_REG_ARQOS_OW_ISP_M1_BITS 0x1 +#define VIP_SYS_REG_AWQOS_ISP 0x64 +#define VIP_SYS_REG_AWQOS_ISP_OFFSET 0 +#define VIP_SYS_REG_AWQOS_ISP_MASK 0xf +#define VIP_SYS_REG_AWQOS_ISP_BITS 0x4 +#define VIP_SYS_REG_ARQOS_ISP 0x64 +#define VIP_SYS_REG_ARQOS_ISP_OFFSET 4 +#define VIP_SYS_REG_ARQOS_ISP_MASK 0xf0 +#define VIP_SYS_REG_ARQOS_ISP_BITS 0x4 +#define VIP_SYS_REG_AWQOS_SC 0x64 +#define VIP_SYS_REG_AWQOS_SC_OFFSET 8 +#define VIP_SYS_REG_AWQOS_SC_MASK 0xf00 +#define VIP_SYS_REG_AWQOS_SC_BITS 0x4 +#define VIP_SYS_REG_ARQOS_SC 0x64 +#define VIP_SYS_REG_ARQOS_SC_OFFSET 12 +#define VIP_SYS_REG_ARQOS_SC_MASK 0xf000 +#define VIP_SYS_REG_ARQOS_SC_BITS 0x4 +#define VIP_SYS_REG_AWQOS_SC_M1 0x64 +#define VIP_SYS_REG_AWQOS_SC_M1_OFFSET 16 +#define VIP_SYS_REG_AWQOS_SC_M1_MASK 0xf0000 +#define VIP_SYS_REG_AWQOS_SC_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_SC_M1 0x64 +#define VIP_SYS_REG_ARQOS_SC_M1_OFFSET 20 +#define VIP_SYS_REG_ARQOS_SC_M1_MASK 0xf00000 +#define VIP_SYS_REG_ARQOS_SC_M1_BITS 0x4 +#define VIP_SYS_REG_AWQOS_ISP_M1 0x64 +#define VIP_SYS_REG_AWQOS_ISP_M1_OFFSET 24 +#define VIP_SYS_REG_AWQOS_ISP_M1_MASK 0xf000000 +#define VIP_SYS_REG_AWQOS_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_ISP_M1 0x64 +#define VIP_SYS_REG_ARQOS_ISP_M1_OFFSET 28 +#define VIP_SYS_REG_ARQOS_ISP_M1_MASK 0xf0000000 +#define VIP_SYS_REG_ARQOS_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_AWQOS_OFFSET_ISP 0x68 +#define VIP_SYS_REG_AWQOS_OFFSET_ISP_OFFSET 0 +#define VIP_SYS_REG_AWQOS_OFFSET_ISP_MASK 0xf +#define VIP_SYS_REG_AWQOS_OFFSET_ISP_BITS 0x4 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP 0x68 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP_OFFSET 4 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP_MASK 0xf0 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP_BITS 0x4 +#define VIP_SYS_REG_AWQOS_OFFSET_SC 0x68 +#define VIP_SYS_REG_AWQOS_OFFSET_SC_OFFSET 8 +#define VIP_SYS_REG_AWQOS_OFFSET_SC_MASK 0xf00 +#define VIP_SYS_REG_AWQOS_OFFSET_SC_BITS 0x4 +#define VIP_SYS_REG_ARQOS_OFFSET_SC 0x68 +#define VIP_SYS_REG_ARQOS_OFFSET_SC_OFFSET 12 +#define VIP_SYS_REG_ARQOS_OFFSET_SC_MASK 0xf000 +#define VIP_SYS_REG_ARQOS_OFFSET_SC_BITS 0x4 +#define VIP_SYS_REG_AWQOS_OFFSET_SC_M1 0x68 +#define VIP_SYS_REG_AWQOS_OFFSET_SC_M1_OFFSET 16 +#define VIP_SYS_REG_AWQOS_OFFSET_SC_M1_MASK 0xf0000 +#define VIP_SYS_REG_AWQOS_OFFSET_SC_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_OFFSET_SC_M1 0x68 +#define VIP_SYS_REG_ARQOS_OFFSET_SC_M1_OFFSET 20 +#define VIP_SYS_REG_ARQOS_OFFSET_SC_M1_MASK 0xf00000 +#define VIP_SYS_REG_ARQOS_OFFSET_SC_M1_BITS 0x4 +#define VIP_SYS_REG_AWQOS_OFFSET_ISP_M1 0x68 +#define VIP_SYS_REG_AWQOS_OFFSET_ISP_M1_OFFSET 24 +#define VIP_SYS_REG_AWQOS_OFFSET_ISP_M1_MASK 0xf000000 +#define VIP_SYS_REG_AWQOS_OFFSET_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP_M1 0x68 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP_M1_OFFSET 28 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP_M1_MASK 0xf0000000 +#define VIP_SYS_REG_ARQOS_OFFSET_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_AWQOS_THRD_ISP 0x6c +#define VIP_SYS_REG_AWQOS_THRD_ISP_OFFSET 0 +#define VIP_SYS_REG_AWQOS_THRD_ISP_MASK 0xf +#define VIP_SYS_REG_AWQOS_THRD_ISP_BITS 0x4 +#define VIP_SYS_REG_ARQOS_THRD_ISP 0x6c +#define VIP_SYS_REG_ARQOS_THRD_ISP_OFFSET 4 +#define VIP_SYS_REG_ARQOS_THRD_ISP_MASK 0xf0 +#define VIP_SYS_REG_ARQOS_THRD_ISP_BITS 0x4 +#define VIP_SYS_REG_AWQOS_THRD_SC 0x6c +#define VIP_SYS_REG_AWQOS_THRD_SC_OFFSET 8 +#define VIP_SYS_REG_AWQOS_THRD_SC_MASK 0xf00 +#define VIP_SYS_REG_AWQOS_THRD_SC_BITS 0x4 +#define VIP_SYS_REG_ARQOS_THRD_SC 0x6c +#define VIP_SYS_REG_ARQOS_THRD_SC_OFFSET 12 +#define VIP_SYS_REG_ARQOS_THRD_SC_MASK 0xf000 +#define VIP_SYS_REG_ARQOS_THRD_SC_BITS 0x4 +#define VIP_SYS_REG_AWQOS_THRD_SC_M1 0x6c +#define VIP_SYS_REG_AWQOS_THRD_SC_M1_OFFSET 16 +#define VIP_SYS_REG_AWQOS_THRD_SC_M1_MASK 0xf0000 +#define VIP_SYS_REG_AWQOS_THRD_SC_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_THRD_SC_M1 0x6c +#define VIP_SYS_REG_ARQOS_THRD_SC_M1_OFFSET 20 +#define VIP_SYS_REG_ARQOS_THRD_SC_M1_MASK 0xf00000 +#define VIP_SYS_REG_ARQOS_THRD_SC_M1_BITS 0x4 +#define VIP_SYS_REG_AWQOS_THRD_ISP_M1 0x6c +#define VIP_SYS_REG_AWQOS_THRD_ISP_M1_OFFSET 24 +#define VIP_SYS_REG_AWQOS_THRD_ISP_M1_MASK 0xf000000 +#define VIP_SYS_REG_AWQOS_THRD_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_THRD_ISP_M1 0x6c +#define VIP_SYS_REG_ARQOS_THRD_ISP_M1_OFFSET 28 +#define VIP_SYS_REG_ARQOS_THRD_ISP_M1_MASK 0xf0000000 +#define VIP_SYS_REG_ARQOS_THRD_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_PRIORITY_OW_RT_M1 0x70 +#define VIP_SYS_REG_PRIORITY_OW_RT_M1_OFFSET 0 +#define VIP_SYS_REG_PRIORITY_OW_RT_M1_MASK 0x1 +#define VIP_SYS_REG_PRIORITY_OW_RT_M1_BITS 0x1 +#define VIP_SYS_REG_PRIORITY_OW_RT_M2 0x70 +#define VIP_SYS_REG_PRIORITY_OW_RT_M2_OFFSET 1 +#define VIP_SYS_REG_PRIORITY_OW_RT_M2_MASK 0x2 +#define VIP_SYS_REG_PRIORITY_OW_RT_M2_BITS 0x1 +#define VIP_SYS_REG_PRIORITY_OW_RT_M3 0x70 +#define VIP_SYS_REG_PRIORITY_OW_RT_M3_OFFSET 2 +#define VIP_SYS_REG_PRIORITY_OW_RT_M3_MASK 0x4 +#define VIP_SYS_REG_PRIORITY_OW_RT_M3_BITS 0x1 +#define VIP_SYS_REG_PRIORITY_OW_RT_M4 0x70 +#define VIP_SYS_REG_PRIORITY_OW_RT_M4_OFFSET 3 +#define VIP_SYS_REG_PRIORITY_OW_RT_M4_MASK 0x8 +#define VIP_SYS_REG_PRIORITY_OW_RT_M4_BITS 0x1 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M1 0x70 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M1_OFFSET 8 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M1_MASK 0x300 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M1_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M2 0x70 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M2_OFFSET 10 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M2_MASK 0xc00 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M2_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M3 0x70 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M3_OFFSET 12 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M3_MASK 0x3000 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M3_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M4 0x70 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M4_OFFSET 14 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M4_MASK 0xc000 +#define VIP_SYS_REG_PRIORITY_MODE_RT_M4_BITS 0x2 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M1 0x70 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M1_OFFSET 16 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M1_MASK 0x30000 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M1_BITS 0x2 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M2 0x70 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M2_OFFSET 20 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M2_MASK 0x300000 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M2_BITS 0x2 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M3 0x70 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M3_OFFSET 24 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M3_MASK 0x3000000 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M3_BITS 0x2 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M4 0x70 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M4_OFFSET 28 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M4_MASK 0x30000000 +#define VIP_SYS_REG_FIX_PRIORITY_RT_M4_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_0 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_0_OFFSET 0 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_0_MASK 0x3 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_0_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_1 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_1_OFFSET 2 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_1_MASK 0xc +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_1_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_2 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_2_OFFSET 4 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_2_MASK 0x30 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_2_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_3 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_3_OFFSET 6 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_3_MASK 0xc0 +#define VIP_SYS_REG_PRIORITY_RT_M1_SEL_3_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_0 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_0_OFFSET 8 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_0_MASK 0x300 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_0_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_1 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_1_OFFSET 10 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_1_MASK 0xc00 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_1_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_2 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_2_OFFSET 12 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_2_MASK 0x3000 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_2_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_3 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_3_OFFSET 14 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_3_MASK 0xc000 +#define VIP_SYS_REG_PRIORITY_RT_M2_SEL_3_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_0 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_0_OFFSET 16 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_0_MASK 0x30000 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_0_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_1 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_1_OFFSET 18 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_1_MASK 0xc0000 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_1_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_2 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_2_OFFSET 20 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_2_MASK 0x300000 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_2_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_3 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_3_OFFSET 22 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_3_MASK 0xc00000 +#define VIP_SYS_REG_PRIORITY_RT_M3_SEL_3_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_0 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_0_OFFSET 24 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_0_MASK 0x3000000 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_0_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_1 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_1_OFFSET 26 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_1_MASK 0xc000000 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_1_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_2 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_2_OFFSET 28 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_2_MASK 0x30000000 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_2_BITS 0x2 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_3 0x74 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_3_OFFSET 30 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_3_MASK 0xc0000000 +#define VIP_SYS_REG_PRIORITY_RT_M4_SEL_3_BITS 0x2 +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP 0x7c +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP_OFFSET 0 +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP_MASK 0xf +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP_BITS 0x4 +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP 0x7c +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP_OFFSET 4 +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP_MASK 0xf0 +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP_BITS 0x4 +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC 0x7c +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC_OFFSET 8 +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC_MASK 0xf00 +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC_BITS 0x4 +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC 0x7c +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC_OFFSET 12 +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC_MASK 0xf000 +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC_BITS 0x4 +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC_M1 0x7c +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC_M1_OFFSET 16 +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC_M1_MASK 0xf0000 +#define VIP_SYS_REG_AWQOS_LOW_THRD_SC_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC_M1 0x7c +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC_M1_OFFSET 20 +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC_M1_MASK 0xf00000 +#define VIP_SYS_REG_ARQOS_LOW_THRD_SC_M1_BITS 0x4 +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP_M1 0x7c +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP_M1_OFFSET 24 +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP_M1_MASK 0xf000000 +#define VIP_SYS_REG_AWQOS_LOW_THRD_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP_M1 0x7c +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP_M1_OFFSET 28 +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP_M1_MASK 0xf0000000 +#define VIP_SYS_REG_ARQOS_LOW_THRD_ISP_M1_BITS 0x4 +#define VIP_SYS_REG_DUMMY0 0x80 +#define VIP_SYS_REG_DUMMY0_OFFSET 0 +#define VIP_SYS_REG_DUMMY0_MASK 0xffffffff +#define VIP_SYS_REG_DUMMY0_BITS 0x20 +#define VIP_SYS_REG_DUMMY1 0x84 +#define VIP_SYS_REG_DUMMY1_OFFSET 0 +#define VIP_SYS_REG_DUMMY1_MASK 0xffffffff +#define VIP_SYS_REG_DUMMY1_BITS 0x20 +#define VIP_SYS_REG_DUMMY2 0x88 +#define VIP_SYS_REG_DUMMY2_OFFSET 0 +#define VIP_SYS_REG_DUMMY2_MASK 0xffffffff +#define VIP_SYS_REG_DUMMY2_BITS 0x20 +#define VIP_SYS_REG_DUMMY3 0x8c +#define VIP_SYS_REG_DUMMY3_OFFSET 0 +#define VIP_SYS_REG_DUMMY3_MASK 0xffffffff +#define VIP_SYS_REG_DUMMY3_BITS 0x20 +#define VIP_SYS_REG_DBG_BUS0 0x90 +#define VIP_SYS_REG_DBG_BUS0_OFFSET 0 +#define VIP_SYS_REG_DBG_BUS0_MASK 0xffffffff +#define VIP_SYS_REG_DBG_BUS0_BITS 0x20 +#define VIP_SYS_REG_DBG_BUS1 0x94 +#define VIP_SYS_REG_DBG_BUS1_OFFSET 0 +#define VIP_SYS_REG_DBG_BUS1_MASK 0xffffffff +#define VIP_SYS_REG_DBG_BUS1_BITS 0x20 +#define VIP_SYS_REG_DBG_BUS2 0x98 +#define VIP_SYS_REG_DBG_BUS2_OFFSET 0 +#define VIP_SYS_REG_DBG_BUS2_MASK 0xffffffff +#define VIP_SYS_REG_DBG_BUS2_BITS 0x20 +#define VIP_SYS_REG_DBG_BUS3 0x9c +#define VIP_SYS_REG_DBG_BUS3_OFFSET 0 +#define VIP_SYS_REG_DBG_BUS3_MASK 0xffffffff +#define VIP_SYS_REG_DBG_BUS3_BITS 0x20 +#define VIP_SYS_RT_AXI_MON_M1_OUT 0xa0 +#define VIP_SYS_RT_AXI_MON_M1_OUT_OFFSET 0 +#define VIP_SYS_RT_AXI_MON_M1_OUT_MASK 0xffffffff +#define VIP_SYS_RT_AXI_MON_M1_OUT_BITS 0x20 +#define VIP_SYS_RT_AXI_MON_M2_OUT 0xa4 +#define VIP_SYS_RT_AXI_MON_M2_OUT_OFFSET 0 +#define VIP_SYS_RT_AXI_MON_M2_OUT_MASK 0xffffffff +#define VIP_SYS_RT_AXI_MON_M2_OUT_BITS 0x20 +#define VIP_SYS_RT_AXI_MON_M3_OUT 0xa8 +#define VIP_SYS_RT_AXI_MON_M3_OUT_OFFSET 0 +#define VIP_SYS_RT_AXI_MON_M3_OUT_MASK 0xffffffff +#define VIP_SYS_RT_AXI_MON_M3_OUT_BITS 0x20 +#define VIP_SYS_RT_AXI_MON_M4_OUT 0xac +#define VIP_SYS_RT_AXI_MON_M4_OUT_OFFSET 0 +#define VIP_SYS_RT_AXI_MON_M4_OUT_MASK 0xffffffff +#define VIP_SYS_RT_AXI_MON_M4_OUT_BITS 0x20 +#define VIP_SYS_OFF_AXI_MON_M1_OUT 0xb0 +#define VIP_SYS_OFF_AXI_MON_M1_OUT_OFFSET 0 +#define VIP_SYS_OFF_AXI_MON_M1_OUT_MASK 0xffffffff +#define VIP_SYS_OFF_AXI_MON_M1_OUT_BITS 0x20 +#define VIP_SYS_OFF_AXI_MON_M2_OUT 0xb4 +#define VIP_SYS_OFF_AXI_MON_M2_OUT_OFFSET 0 +#define VIP_SYS_OFF_AXI_MON_M2_OUT_MASK 0xffffffff +#define VIP_SYS_OFF_AXI_MON_M2_OUT_BITS 0x20 +#define VIP_SYS_REG_RST_IVE_TOP 0xc0 +#define VIP_SYS_REG_RST_IVE_TOP_OFFSET 0 +#define VIP_SYS_REG_RST_IVE_TOP_MASK 0x1 +#define VIP_SYS_REG_RST_IVE_TOP_BITS 0x1 +#define VIP_SYS_REG_RST_ISP_RAW 0xc0 +#define VIP_SYS_REG_RST_ISP_RAW_OFFSET 1 +#define VIP_SYS_REG_RST_ISP_RAW_MASK 0x2 +#define VIP_SYS_REG_RST_ISP_RAW_BITS 0x1 +#define VIP_SYS_REG_RST_OSDC 0xc0 +#define VIP_SYS_REG_RST_OSDC_OFFSET 2 +#define VIP_SYS_REG_RST_OSDC_MASK 0x4 +#define VIP_SYS_REG_RST_OSDC_BITS 0x1 +#define VIP_SYS_REG_RST_IVE_TOP_APB 0xc0 +#define VIP_SYS_REG_RST_IVE_TOP_APB_OFFSET 8 +#define VIP_SYS_REG_RST_IVE_TOP_APB_MASK 0x100 +#define VIP_SYS_REG_RST_IVE_TOP_APB_BITS 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_RAW_TOP 0xc4 +#define VIP_SYS_REG_NORM_DIV_EN_RAW_TOP_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_RAW_TOP_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_RAW_TOP_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_RAW_TOP 0xc4 +#define VIP_SYS_REG_IDLE_DIV_EN_RAW_TOP_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_RAW_TOP_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_RAW_TOP_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_RAW_TOP 0xc4 +#define VIP_SYS_REG_UPDATE_SEL_RAW_TOP_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_RAW_TOP_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_RAW_TOP_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_RAW_TOP 0xc4 +#define VIP_SYS_REG_IDLE_SLOW_SEL_RAW_TOP_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_RAW_TOP_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_RAW_TOP_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_RAW_TOP 0xc4 +#define VIP_SYS_REG_IDLE_WAIT_SEL_RAW_TOP_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_RAW_TOP_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_RAW_TOP_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_RAW_TOP 0xc4 +#define VIP_SYS_REG_NORM_DIV_VAL_RAW_TOP_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_RAW_TOP_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_RAW_TOP_BITS 0x5 +#define VIP_SYS_REG_NORM_DIV_EN_IVE_TOP 0xc8 +#define VIP_SYS_REG_NORM_DIV_EN_IVE_TOP_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_IVE_TOP_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_IVE_TOP_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_IVE_TOP 0xc8 +#define VIP_SYS_REG_IDLE_DIV_EN_IVE_TOP_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_IVE_TOP_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_IVE_TOP_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_IVE_TOP 0xc8 +#define VIP_SYS_REG_UPDATE_SEL_IVE_TOP_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_IVE_TOP_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_IVE_TOP_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_IVE_TOP 0xc8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_IVE_TOP_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_IVE_TOP_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_IVE_TOP_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_IVE_TOP 0xc8 +#define VIP_SYS_REG_IDLE_WAIT_SEL_IVE_TOP_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_IVE_TOP_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_IVE_TOP_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_IVE_TOP 0xc8 +#define VIP_SYS_REG_NORM_DIV_VAL_IVE_TOP_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_IVE_TOP_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_IVE_TOP_BITS 0x5 +#define VIP_SYS_REG_NORM_DIV_EN_CAM0 0xcc +#define VIP_SYS_REG_NORM_DIV_EN_CAM0_OFFSET 0 +#define VIP_SYS_REG_NORM_DIV_EN_CAM0_MASK 0x1 +#define VIP_SYS_REG_NORM_DIV_EN_CAM0_BITS 0x1 +#define VIP_SYS_REG_IDLE_DIV_EN_CAM0 0xcc +#define VIP_SYS_REG_IDLE_DIV_EN_CAM0_OFFSET 1 +#define VIP_SYS_REG_IDLE_DIV_EN_CAM0_MASK 0x2 +#define VIP_SYS_REG_IDLE_DIV_EN_CAM0_BITS 0x1 +#define VIP_SYS_REG_UPDATE_SEL_CAM0 0xcc +#define VIP_SYS_REG_UPDATE_SEL_CAM0_OFFSET 2 +#define VIP_SYS_REG_UPDATE_SEL_CAM0_MASK 0x4 +#define VIP_SYS_REG_UPDATE_SEL_CAM0_BITS 0x1 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CAM0 0xcc +#define VIP_SYS_REG_IDLE_SLOW_SEL_CAM0_OFFSET 8 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CAM0_MASK 0x700 +#define VIP_SYS_REG_IDLE_SLOW_SEL_CAM0_BITS 0x3 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CAM0 0xcc +#define VIP_SYS_REG_IDLE_WAIT_SEL_CAM0_OFFSET 12 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CAM0_MASK 0x7000 +#define VIP_SYS_REG_IDLE_WAIT_SEL_CAM0_BITS 0x3 +#define VIP_SYS_REG_NORM_DIV_VAL_CAM0 0xcc +#define VIP_SYS_REG_NORM_DIV_VAL_CAM0_OFFSET 16 +#define VIP_SYS_REG_NORM_DIV_VAL_CAM0_MASK 0x1f0000 +#define VIP_SYS_REG_NORM_DIV_VAL_CAM0_BITS 0x5 +#define VIP_SYS_OFF_AXI_MON_M3_OUT 0xd0 +#define VIP_SYS_OFF_AXI_MON_M3_OUT_OFFSET 0 +#define VIP_SYS_OFF_AXI_MON_M3_OUT_MASK 0xffffffff +#define VIP_SYS_OFF_AXI_MON_M3_OUT_BITS 0x20 +#define VIP_SYS_OFF_AXI_MON_M4_OUT 0xd4 +#define VIP_SYS_OFF_AXI_MON_M4_OUT_OFFSET 0 +#define VIP_SYS_OFF_AXI_MON_M4_OUT_MASK 0xffffffff +#define VIP_SYS_OFF_AXI_MON_M4_OUT_BITS 0x20 +#define VIP_SYS_OFF_AXI_MON_M5_OUT 0xd8 +#define VIP_SYS_OFF_AXI_MON_M5_OUT_OFFSET 0 +#define VIP_SYS_OFF_AXI_MON_M5_OUT_MASK 0xffffffff +#define VIP_SYS_OFF_AXI_MON_M5_OUT_BITS 0x20 +#define VIP_SYS_OFF_AXI_MON_M6_OUT 0xdc +#define VIP_SYS_OFF_AXI_MON_M6_OUT_OFFSET 0 +#define VIP_SYS_OFF_AXI_MON_M6_OUT_MASK 0xffffffff +#define VIP_SYS_OFF_AXI_MON_M6_OUT_BITS 0x20 +#define VIP_SYS_OFF_AXI_MON_M7_OUT 0xe0 +#define VIP_SYS_OFF_AXI_MON_M7_OUT_OFFSET 0 +#define VIP_SYS_OFF_AXI_MON_M7_OUT_MASK 0xffffffff +#define VIP_SYS_OFF_AXI_MON_M7_OUT_BITS 0x20 diff --git a/freertos/cvitek/install/include/common/sample_comm.h b/freertos/cvitek/install/include/common/sample_comm.h new file mode 100644 index 000000000..aacf9f3e2 --- /dev/null +++ b/freertos/cvitek/install/include/common/sample_comm.h @@ -0,0 +1,984 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: sample_common.h + * Description: + */ + +#ifndef __SAMPLE_COMM_H__ +#define __SAMPLE_COMM_H__ + +// #include + +// #include "cvi_sys.h" +// #include +// #include "cvi_buffer.h" +#include "cvi_comm_sys.h" +// #include "cvi_comm_vb.h" +// #include "cvi_comm_isp.h" +// #include "cvi_comm_3a.h" +// #include "cvi_comm_sns.h" +// #include +// #include +// #include +// #include "cvi_comm_venc.h" +// #include "cvi_comm_vdec.h" +// #include +// #include "cvi_comm_adec.h" +// #include "cvi_comm_aenc.h" +// #include "cvi_comm_ao.h" +// #include "cvi_comm_aio.h" +// #include "cvi_audio.h" +// #include +#include "cvi_mipi.h" + +// #include "cvi_vb.h" +// #include "cvi_vi.h" +// #include "cvi_vpss.h" +// #include "cvi_vo.h" +#include "cvi_isp.h" +// #include "cvi_venc.h" +// #include "cvi_vdec.h" +// #include "cvi_gdc.h" +// #include "cvi_region.h" + +// #include "md5sum.h" + +#include "cvi_common.h" +#include "cvi_comm_video.h" +#include "stdint.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +// #define FILE_NAME_LEN 128 +// #define MAX_NUM_INSTANCE 4 +// #define NUM_OF_USER_DATA_BUF 4 + +/*#define CHECK_CHN_RET(express, Chn, name) \ + do { \ + CVI_S32 Ret; \ + Ret = express; \ + if (Ret != CVI_SUCCESS) { \ + printf("\033[0;31m%s chn %d failed at %s: LINE: %d with %#x!\033[0;39m\n", name, Chn, \ + __func__, __LINE__, Ret); \ + fflush(stdout); \ + return Ret; \ + } \ + } while (0) + +#define CHECK_RET(express, name) \ + do { \ + CVI_S32 Ret; \ + Ret = express; \ + if (Ret != CVI_SUCCESS) { \ + printf("\033[0;31m%s failed at %s: LINE: %d with %#x!\033[0;39m\n", name, __func__, \ + __LINE__, Ret); \ + return Ret; \ + } \ + } while (0) +*/ +// #define SAMPLE_PIXEL_FORMAT VI_PIXEL_FORMAT + +// #define COLOR_RGB_RED RGB_8BIT(0xFF, 0, 0) +// #define COLOR_RGB_GREEN RGB_8BIT(0, 0xFF, 0) +// #define COLOR_RGB_BLUE RGB_8BIT(0, 0, 0xFF) +// #define COLOR_RGB_BLACK RGB_8BIT(0, 0, 0) +// #define COLOR_RGB_YELLOW RGB_8BIT(0xFF, 0xFF, 0) +// #define COLOR_RGB_CYN RGB_8BIT(0, 0xFF, 0xFF) +// #define COLOR_RGB_WHITE RGB_8BIT(0xFF, 0xFF, 0xFF) + +// #define COLOR_10_RGB_RED RGB(0x3FF, 0, 0) +// #define COLOR_10_RGB_GREEN RGB(0, 0x3FF, 0) +// #define COLOR_10_RGB_BLUE RGB(0, 0, 0x3FF) +// #define COLOR_10_RGB_BLACK RGB(0, 0, 0) +// #define COLOR_10_RGB_YELLOW RGB(0x3FF, 0x3FF, 0) +// #define COLOR_10_RGB_CYN RGB(0, 0x3FF, 0x3FF) +// #define COLOR_10_RGB_WHITE RGB(0x3FF, 0x3FF, 0x3FF) + +// #define SAMPLE_VO_DEV_DHD0 0 /* VO's device HD0 */ +// #define SAMPLE_VO_DEV_DHD1 1 /* VO's device HD1 */ +// #define SAMPLE_VO_DEV_UHD SAMPLE_VO_DEV_DHD0 /* VO's ultra HD device:HD0 */ +// #define SAMPLE_VO_DEV_HD SAMPLE_VO_DEV_DHD1 /* VO's HD device:HD1 */ +// #define SAMPLE_VO_LAYER_VHD0 0 +// #define SAMPLE_VO_LAYER_VHD1 1 +// #define SAMPLE_VO_LAYER_VHD2 2 +// #define SAMPLE_VO_LAYER_PIP SAMPLE_VO_LAYER_VHD2 + +// #define SAMPLE_AUDIO_EXTERN_AI_DEV 0 +// #define SAMPLE_AUDIO_EXTERN_AO_DEV 0 +// #define SAMPLE_AUDIO_INNER_AI_DEV 0 +// #define SAMPLE_AUDIO_INNER_AO_DEV 0 +// #define SAMPLE_AUDIO_INNER_HDMI_AO_DEV 1 +// #define SAMPLE_AUDIO_PTNUMPERFRM 480 + +#define WDR_MAX_PIPE_NUM 4 //need checking by jammy +#define ISP_MAX_DEV_NUM 3 + +// #define __FILENAM__ (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__) + +// #define MAX_STRING_LEN 255 + +/*#define PAUSE() \ + do { \ + printf("---------------press Enter key to exit!---------------\n"); \ + getchar(); \ + } while (0) +*/ +#define SAMPLE_PRT(fmt...) \ + do { \ + printf("[%s]-%d: ", __func__, __LINE__); \ + printf(fmt); \ + } while (0) + +/*#define CHECK_NULL_PTR(ptr) \ + do { \ + if (ptr == NULL) { \ + printf("func:%s,line:%d, NULL pointer\n", __func__, __LINE__); \ + return CVI_FAILURE; \ + } \ + } while (0) +*/ +// #define ALIGN_BASE(val, base) (((val) + ((base)-1)) & ~((base)-1)) + +// /******************************************************* +// * enum define +// *******************************************************/ +typedef enum _PIC_SIZE_E { + PIC_CIF, + PIC_D1_PAL, /* 720 * 576 */ + PIC_D1_NTSC, /* 720 * 480 */ + PIC_720P, /* 1280 * 720 */ + PIC_1080P, /* 1920 * 1080 */ + PIC_1088, /* 1920 * 1088 */ + PIC_1440P, /* 2560 * 1440 */ + PIC_2304x1296, + PIC_2560x1600, + PIC_2592x1520, + PIC_2592x1536, + PIC_2592x1944, + PIC_2688x1520, + PIC_2716x1524, + PIC_2880x1620, + PIC_3844x1124, + PIC_3840x2160, + PIC_4096x2160, + PIC_3000x3000, + PIC_4000x3000, + PIC_3840x8640, + PIC_7688x1124, + PIC_640x480, + PIC_479P, /* 632 * 479 */ + PIC_288P, /* 384 * 288 */ + PIC_CUSTOMIZE, + PIC_BUTT +} PIC_SIZE_E; + +typedef enum _SAMPLE_SNS_TYPE_E { + /* ------ LINEAR BEGIN ------*/ + SONY_IMX290_MIPI_1M_30FPS_12BIT, + SONY_IMX290_MIPI_2M_60FPS_12BIT, + SONY_IMX327_MIPI_1M_30FPS_10BIT, + SONY_IMX327_MIPI_2M_30FPS_12BIT, + SONY_IMX307_MIPI_2M_30FPS_12BIT, + SONY_IMX327_2L_MIPI_2M_30FPS_12BIT, + SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT, + SONY_IMX307_2L_MIPI_2M_30FPS_12BIT, + SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT, + OV_OS08A20_MIPI_8M_30FPS_10BIT, + OV_OS08A20_MIPI_5M_30FPS_10BIT, + OV_OS08A20_MIPI_4M_30FPS_10BIT, + OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT, + OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT, + OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT, + OV_OS04C10_MIPI_4M_30FPS_12BIT, + OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT, + SOI_F23_MIPI_2M_30FPS_10BIT, + SOI_F35_MIPI_2M_30FPS_10BIT, + SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT, + SOI_H65_MIPI_1M_30FPS_10BIT, + PICO640_THERMAL_479P, + PICO384_THERMAL_384X288, + SONY_IMX327_SUBLVDS_2M_30FPS_12BIT, + SONY_IMX307_SUBLVDS_2M_30FPS_12BIT, + VIVO_MCS369Q_4M_30FPS_12BIT, + VIVO_MM308M2_2M_25FPS_8BIT, + NEXTCHIP_N5_2M_25FPS_8BIT, + SMS_SC3335_MIPI_3M_30FPS_10BIT, + SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT, + SONY_IMX335_MIPI_5M_30FPS_12BIT, + SONY_IMX335_MIPI_4M_30FPS_12BIT, + SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT, + SONY_IMX335_2L_MIPI_4M_30FPS_10BIT, + PIXELPLUS_PR2020_1M_25FPS_8BIT, + SONY_IMX385_MIPI_2M_30FPS_12BIT, + PIXELPLUS_PR2020_1M_30FPS_8BIT, + PIXELPLUS_PR2020_2M_25FPS_8BIT, + PIXELPLUS_PR2020_2M_30FPS_8BIT, + PIXELPLUS_PR2100_2M_25FPS_8BIT, + PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT, + PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT, + SONY_IMX334_MIPI_8M_30FPS_12BIT, + SMS_SC8238_MIPI_8M_30FPS_10BIT, + VIVO_MCS369_2M_30FPS_12BIT, + SMS_SC4210_MIPI_4M_30FPS_12BIT, + SMS_SC200AI_MIPI_2M_30FPS_10BIT, + SMS_SC850SL_MIPI_8M_30FPS_12BIT, + NEXTCHIP_N6_2M_4CH_25FPS_8BIT, + NEXTCHIP_N5_1M_2CH_25FPS_8BIT, + GCORE_GC2053_MIPI_2M_30FPS_10BIT, + GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT, + GCORE_GC2093_MIPI_2M_30FPS_10BIT, + GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT, + GCORE_GC4653_MIPI_4M_30FPS_10BIT, + GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT, + SONY_IMX335_MIPI_5M_60FPS_10BIT, + SONY_IMX335_MIPI_4M_60FPS_10BIT, + GCORE_GC1054_MIPI_1M_30FPS_10BIT, + SONY_IMX327_MIPI_2M_60FPS_12BIT, + SONY_IMX347_MIPI_4M_60FPS_12BIT, + SONY_IMX307_SUBLVDS_2M_60FPS_12BIT, + SONY_IMX307_MIPI_2M_60FPS_12BIT, + GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT, + SONY_IMX335_MIPI_2M_60FPS_10BIT, + SMS_SC035HGS_MIPI_480P_120FPS_12BIT, + SMS_SC500AI_MIPI_5M_30FPS_10BIT, + SMS_SC500AI_MIPI_4M_30FPS_10BIT, + SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT, + SMS_SC401AI_MIPI_4M_30FPS_10BIT, + SMS_SC401AI_MIPI_3M_30FPS_10BIT, + SMS_SC035GS_MIPI_480P_120FPS_12BIT, + TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT, + TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT, + /* ------ LINEAR END ------*/ + SAMPLE_SNS_TYPE_LINEAR_BUTT, + + /* ------ WDR 2TO1 BEGIN ------*/ + SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1 = SAMPLE_SNS_TYPE_LINEAR_BUTT, + SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1, + SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1, + OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1, + OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1, + OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1, + OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1, + OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1, + OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1, + OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1, + OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1, + SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1, + SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1, + SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1, + SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1, + SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1, + SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1, + SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1, + SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1, + SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1, + SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1, + SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1, + SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1, + GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1, + GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1, + SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1, + SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1, + SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1, + /* ------ WDR 2TO1 END ------*/ + SAMPLE_SNS_TYPE_BUTT, +} SAMPLE_SNS_TYPE_E; + +typedef struct _SAMPLE_SENSOR_MCLK_ATTR_S { + CVI_U8 u8Mclk; + CVI_BOOL bMclkEn; +} SAMPLE_SENSOR_MCLK_ATTR_S; + +typedef struct _SAMPLE_SENSOR_INFO_S { + SAMPLE_SNS_TYPE_E enSnsType; + CVI_S32 s32SnsId; + CVI_S32 s32BusId; + CVI_S32 s32SnsI2cAddr; + combo_dev_t MipiDev; + CVI_S16 as16LaneId[5]; + CVI_S8 as8PNSwap[5]; + CVI_U8 u8HwSync; + SAMPLE_SENSOR_MCLK_ATTR_S stMclkAttr; + CVI_U8 u8Orien; // 0: normal, 1: mirror, 2: flip, 3: mirror and flip. +} SAMPLE_SENSOR_INFO_S; + +// typedef enum _SAMPLE_VO_MODE_E { +// VO_MODE_1MUX, +// VO_MODE_2MUX, +// VO_MODE_4MUX, +// VO_MODE_8MUX, +// VO_MODE_9MUX, +// VO_MODE_16MUX, +// VO_MODE_25MUX, +// VO_MODE_36MUX, +// VO_MODE_49MUX, +// VO_MODE_64MUX, +// VO_MODE_2X4, +// VO_MODE_BUTT +// } SAMPLE_VO_MODE_E; + +// typedef enum _SAMPLE_RC_E { +// SAMPLE_RC_CBR = 0, +// SAMPLE_RC_VBR, +// SAMPLE_RC_AVBR, +// SAMPLE_RC_QVBR, +// SAMPLE_RC_FIXQP, +// SAMPLE_RC_QPMAP, +// SAMPLE_RC_UBR, +// SAMPLE_RC_MAX +// } SAMPLE_RC_E; + +// /******************************************************* +// * structure define +// *******************************************************/ +// typedef struct _SAMPLE_SNAP_INFO_S { +// bool bSnap; +// bool bDoublePipe; +// VI_PIPE VideoPipe; +// VI_PIPE SnapPipe; +// VI_VPSS_MODE_E enVideoPipeMode; +// VI_VPSS_MODE_E enSnapPipeMode; +// } SAMPLE_SNAP_INFO_S; + +typedef struct _SAMPLE_DEV_INFO_S { + VI_DEV ViDev; + WDR_MODE_E enWDRMode; +} SAMPLE_DEV_INFO_S; + +typedef struct _SAMPLE_PIPE_INFO_S { + VI_PIPE aPipe[WDR_MAX_PIPE_NUM]; + VI_VPSS_MODE_E enMastPipeMode; + CVI_BOOL bMultiPipe; + CVI_BOOL bVcNumCfged; + CVI_BOOL bIspBypass; + PIXEL_FORMAT_E enPixFmt; + CVI_U32 u32VCNum[WDR_MAX_PIPE_NUM]; +} SAMPLE_PIPE_INFO_S; + +// typedef struct _SAMPLE_CHN_INFO_S { +// VI_CHN ViChn; +// PIXEL_FORMAT_E enPixFormat; +// DYNAMIC_RANGE_E enDynamicRange; +// VIDEO_FORMAT_E enVideoFormat; +// COMPRESS_MODE_E enCompressMode; +// } SAMPLE_CHN_INFO_S; + +typedef struct _SAMPLE_VI_INFO_S { + SAMPLE_SENSOR_INFO_S stSnsInfo; + SAMPLE_DEV_INFO_S stDevInfo; + SAMPLE_PIPE_INFO_S stPipeInfo; + // SAMPLE_CHN_INFO_S stChnInfo; + // SAMPLE_SNAP_INFO_S stSnapInfo; +} SAMPLE_VI_INFO_S; + +typedef struct _SAMPLE_VI_CONFIG_S { + SAMPLE_VI_INFO_S astViInfo[VI_MAX_DEV_NUM]; + CVI_S32 as32WorkingViId[VI_MAX_DEV_NUM]; + CVI_S32 s32WorkingViNum; + CVI_BOOL bViRotation; +} SAMPLE_VI_CONFIG_S; + +// typedef struct _SAMPLE_VI_FRAME_CONFIG_S { +// CVI_U32 u32Width; +// CVI_U32 u32Height; +// CVI_U32 u32ByteAlign; +// PIXEL_FORMAT_E enPixelFormat; +// VIDEO_FORMAT_E enVideoFormat; +// COMPRESS_MODE_E enCompressMode; +// DYNAMIC_RANGE_E enDynamicRange; +// } SAMPLE_VI_FRAME_CONFIG_S; + +// typedef struct _SAMPLE_VI_FRAME_INFO_S { +// VB_BLK VbBlk; +// CVI_U32 u32Size; +// VIDEO_FRAME_INFO_S stVideoFrameInfo; +// } SAMPLE_VI_FRAME_INFO_S; + +// typedef struct _SAMPLE_VI_FPN_CALIBRATE_INFO_S { +// CVI_U32 u32Threshold; +// CVI_U32 u32FrameNum; +// //ISP_FPN_TYPE_E enFpnType; +// PIXEL_FORMAT_E enPixelFormat; +// COMPRESS_MODE_E enCompressMode; +// } SAMPLE_VI_FPN_CALIBRATE_INFO_S; + +// typedef struct _SAMPLE_VI_FPN_CORRECTION_INFO_S { +// ISP_OP_TYPE_E enOpType; +// //ISP_FPN_TYPE_E enFpnType; +// CVI_U32 u32Strength; +// PIXEL_FORMAT_E enPixelFormat; +// COMPRESS_MODE_E enCompressMode; +// SAMPLE_VI_FRAME_INFO_S stViFrameInfo; +// } SAMPLE_VI_FPN_CORRECTION_INFO_S; + +// typedef struct _SAMPLE_COMM_VO_LAYER_CONFIG_S { +// /* for layer */ +// VO_LAYER VoLayer; +// VO_INTF_SYNC_E enIntfSync; +// RECT_S stDispRect; +// SIZE_S stImageSize; +// PIXEL_FORMAT_E enPixFormat; + +// CVI_U32 u32DisBufLen; + +// /* for chn */ +// SAMPLE_VO_MODE_E enVoMode; +// } SAMPLE_COMM_VO_LAYER_CONFIG_S; + +// typedef struct _SAMPLE_VO_CONFIG_S { +// /* for device */ +// VO_DEV VoDev; +// VO_PUB_ATTR_S stVoPubAttr; +// PIC_SIZE_E enPicSize; + +// /* for layer */ +// PIXEL_FORMAT_E enPixFormat; +// RECT_S stDispRect; +// SIZE_S stImageSize; + +// CVI_U32 u32DisBufLen; + +// /* for channel */ +// SAMPLE_VO_MODE_E enVoMode; +// } SAMPLE_VO_CONFIG_S; + +// typedef enum _THREAD_CONTRL_E { +// THREAD_CTRL_START, +// THREAD_CTRL_PAUSE, +// THREAD_CTRL_STOP, +// } THREAD_CONTRL_E; + +// typedef struct _VDEC_THREAD_PARAM_S { +// CVI_S32 s32ChnId; +// PAYLOAD_TYPE_E enType; +// CVI_CHAR cFilePath[128]; +// CVI_CHAR cFileName[128]; +// CVI_S32 s32StreamMode; +// CVI_S32 s32MilliSec; +// CVI_S32 s32MinBufSize; +// CVI_S32 s32IntervalTime; +// THREAD_CONTRL_E eThreadCtrl; +// CVI_U64 u64PtsInit; +// CVI_U64 u64PtsIncrease; +// CVI_BOOL bCircleSend; +// CVI_BOOL bFileEnd; +// CVI_BOOL bDumpYUV; +// MD5_CTX tMD5Ctx; +// } VDEC_THREAD_PARAM_S; + +// typedef struct _SAMPLE_VDEC_BUF { +// CVI_U32 u32PicBufSize; +// CVI_U32 u32TmvBufSize; +// CVI_BOOL bPicBufAlloc; +// CVI_BOOL bTmvBufAlloc; +// } SAMPLE_VDEC_BUF; + + +// typedef struct _SAMPLE_VDEC_VIDEO_ATTR { +// VIDEO_DEC_MODE_E enDecMode; +// CVI_U32 u32RefFrameNum; +// DATA_BITWIDTH_E enBitWidth; +// } SAMPLE_VDEC_VIDEO_ATTR; + +// typedef struct _SAMPLE_VDEC_PICTURE_ATTR { +// CVI_U32 u32Alpha; +// } SAMPLE_VDEC_PICTURE_ATTR; + +// typedef struct _SAMPLE_VDEC_ATTR { +// PAYLOAD_TYPE_E enType; +// PIXEL_FORMAT_E enPixelFormat; +// VIDEO_MODE_E enMode; +// CVI_U32 u32Width; +// CVI_U32 u32Height; +// CVI_U32 u32FrameBufCnt; +// CVI_U32 u32DisplayFrameNum; +// union { +// SAMPLE_VDEC_VIDEO_ATTR stSampleVdecVideo; /* structure with video ( h265/h264) */ +// SAMPLE_VDEC_PICTURE_ATTR stSampleVdecPicture; /* structure with picture (jpeg/mjpeg )*/ +// }; +// } SAMPLE_VDEC_ATTR; + +// typedef struct _vdecChnCtx_ { +// VDEC_THREAD_PARAM_S stVdecThreadParamSend; +// VDEC_THREAD_PARAM_S stVdecThreadParamGet; +// SAMPLE_VDEC_ATTR stSampleVdecAttr; +// pthread_t vdecThreadSend; +// pthread_t vdecThreadGet; +// VDEC_CHN VdecChn; +// CVI_S32 bCreateChn; +// } vdecChnCtx; + +extern SAMPLE_SNS_TYPE_E g_enSnsType[VI_MAX_DEV_NUM]; + +// typedef struct SAMPLE_VENC_GETSTREAM_PARA_S { +// CVI_BOOL bThreadStart; +// VENC_CHN VeChn[VENC_MAX_CHN_NUM]; +// CVI_S32 s32Cnt; +// } SAMPLE_VENC_GETSTREAM_PARA_S; + +// typedef struct _commonInputCfg_ { +// CVI_U32 testMode; +// CVI_S32 numChn; +// CVI_S32 ifInitVb; +// CVI_U32 bindmode; +// CVI_U32 u32ViWidth; // frame width of VI input or VPSS input +// CVI_U32 u32ViHeight; // frame height of VI input or VPSS input +// CVI_U32 u32VpssWidth; // frame width of VPSS output +// CVI_U32 u32VpssHeight; // frame height of VPSS output +// CVI_CHAR yuvFolder[MAX_STRING_LEN]; +// CVI_S32 vbMode; +// CVI_S32 bSingleEsBuf_jpege; +// CVI_S32 bSingleEsBuf_h264e; +// CVI_S32 bSingleEsBuf_h265e; +// CVI_S32 singleEsBufSize_jpege; +// CVI_S32 singleEsBufSize_h264e; +// CVI_S32 singleEsBufSize_h265e; +// CVI_S32 h265RefreshType; +// CVI_S32 jpegMarkerOrder; +// CVI_BOOL bThreadDisable; +// } commonInputCfg; + +// typedef struct _chnInputCfg_ { +// char codec[64]; +// unsigned int width; +// unsigned int height; +// char input_path[MAX_STRING_LEN]; +// char vpssSrcPath[MAX_STRING_LEN]; +// char output_path[MAX_STRING_LEN]; +// char outputFileName[MAX_STRING_LEN]; +// char roiCfgFile[MAX_STRING_LEN]; +// char qpMapCfgFile[MAX_STRING_LEN]; +// char user_data[NUM_OF_USER_DATA_BUF][MAX_STRING_LEN]; +// CVI_S32 num_frames; +// CVI_S32 bsMode; +// CVI_U32 u32Profile; +// CVI_S32 rcMode; +// CVI_S32 iqp; +// CVI_S32 pqp; +// CVI_S32 gop; +// CVI_U32 gopMode; +// CVI_S32 bitrate; +// CVI_S32 minIprop; +// CVI_S32 maxIprop; +// CVI_U32 u32RowQpDelta; +// CVI_S32 firstFrmstartQp; +// CVI_S32 minIqp; +// CVI_S32 maxIqp; +// CVI_S32 minQp; +// CVI_S32 maxQp; +// CVI_S32 framerate; +// CVI_S32 quality; +// CVI_S32 maxbitrate; +// CVI_S32 s32ChangePos; +// CVI_S32 s32MinStillPercent; +// CVI_U32 u32MaxStillQP; +// CVI_U32 u32MotionSensitivity; +// CVI_S32 s32AvbrFrmLostOpen; +// CVI_S32 s32AvbrFrmGap; +// CVI_S32 s32AvbrPureStillThr; +// CVI_S32 statTime; +// CVI_S32 bind_mode; +// CVI_S32 pixel_format; +// CVI_S32 posX; +// CVI_S32 posY; +// CVI_S32 inWidth; +// CVI_S32 inHeight; +// CVI_S32 srcFramerate; +// CVI_U32 bitstreamBufSize; +// CVI_S32 single_LumaBuf; +// CVI_S32 single_core; +// CVI_S32 vpssGrp; +// CVI_S32 vpssChn; +// CVI_S32 forceIdr; +// CVI_S32 chgNum; +// CVI_S32 chgBitrate; +// CVI_S32 chgFramerate; +// CVI_S32 tempLayer; +// CVI_S32 testRoi; +// CVI_S32 bgInterval; +// CVI_S32 frameLost; +// CVI_U32 frameLostGap; +// CVI_U32 frameLostBspThr; +// CVI_S32 MCUPerECS; +// CVI_S32 bCreateChn; +// CVI_S32 getstream_timeout; +// CVI_S32 sendframe_timeout; +// CVI_S32 s32IPQpDelta; +// CVI_S32 s32BgQpDelta; +// CVI_S32 s32ViQpDelta; +// CVI_S32 bVariFpsEn; +// CVI_S32 initialDelay; +// CVI_U32 u32IntraCost; +// CVI_U32 u32ThrdLv; +// CVI_BOOL bBgEnhanceEn; +// CVI_S32 s32BgDeltaQp; +// CVI_U32 h264EntropyMode; +// CVI_S32 h264ChromaQpOffset; +// CVI_S32 h265CbQpOffset; +// CVI_S32 h265CrQpOffset; +// CVI_U32 enSuperFrmMode; +// CVI_U32 u32SuperIFrmBitsThr; +// CVI_U32 u32SuperPFrmBitsThr; +// CVI_S32 s32MaxReEncodeTimes; + +// CVI_U8 aspectRatioInfoPresentFlag; +// CVI_U8 aspectRatioIdc; +// CVI_U8 overscanInfoPresentFlag; +// CVI_U8 overscanAppropriateFlag; +// CVI_U16 sarWidth; +// CVI_U16 sarHeight; + +// CVI_U8 timingInfoPresentFlag; +// CVI_U8 fixedFrameRateFlag; +// CVI_U32 numUnitsInTick; +// CVI_U32 timeScale; + +// CVI_U8 videoSignalTypePresentFlag; +// CVI_U8 videoFormat; +// CVI_U8 videoFullRangeFlag; +// CVI_U8 colourDescriptionPresentFlag; +// CVI_U8 colourPrimaries; +// CVI_U8 transferCharacteristics; +// CVI_U8 matrixCoefficients; + +// CVI_U32 u32FrameQp; +// CVI_BOOL bTestUbrEn; + +// CVI_BOOL bEsBufQueueEn; +// } chnInputCfg; + +// typedef enum _CHN_STATE_ { +// CHN_STAT_NONE = 0, +// CHN_STAT_START, +// CHN_STAT_STOP, +// } CHN_STATE; + +// typedef enum _BS_MODE_ { +// BS_MODE_QUERY_STAT = 0, +// BS_MODE_SELECT, +// } BS_MODE; + +// typedef struct _SAMPLE_COMM_VENC_ROI_ATTR_ { +// VENC_ROI_ATTR_S stVencRoiAttr; +// CVI_U32 u32FrameStart; +// CVI_U32 u32FrameEnd; +// } SAMPLE_COMM_VENC_ROI; + +// #define MAX_NUM_ROI 8 + +// typedef struct _vencChnCtx_ { +// VENC_CHN VencChn; +// PIC_SIZE_E enSize; +// SIZE_S stSize; +// VIDEO_FRAME_INFO_S *pstFrameInfo; +// VIDEO_FRAME_S *pstVFrame; +// CVI_U32 u32LumaSize; +// CVI_U32 u32ChrmSize; +// CVI_U32 u32FrameSize; +// CVI_U32 num_frames; +// CVI_S32 s32ChnNum; +// CVI_U32 s32FbCnt; +// CVI_U32 u32Profile; +// PAYLOAD_TYPE_E enPayLoad; +// VENC_GOP_MODE_E enGopMode; +// VENC_GOP_ATTR_S stGopAttr; +// SAMPLE_RC_E enRcMode; +// FILE *fpSrc; +// long file_size; +// FILE *pFile; +// chnInputCfg chnIc; +// PIXEL_FORMAT_E enPixelFormat; +// CHN_STATE chnStat; +// CHN_STATE nextChnStat; +// SAMPLE_COMM_VENC_ROI vencRoi[MAX_NUM_ROI]; +// CVI_U8 *pu8QpMap; +// CVI_BOOL bQpMapValid; +// CVI_S32 s32VencFd; +// } vencChnCtx; + +// typedef struct _SAMPLE_INI_CFG_S { +// VI_PIPE_FRAME_SOURCE_E enSource; +// CVI_U8 devNum; +// CVI_U8 u8UseMultiSns; + +// SAMPLE_SNS_TYPE_E enSnsType[VI_MAX_DEV_NUM]; +// WDR_MODE_E enWDRMode[VI_MAX_DEV_NUM]; +// CVI_S32 s32BusId[VI_MAX_DEV_NUM]; +// CVI_S32 s32SnsI2cAddr[VI_MAX_DEV_NUM]; +// combo_dev_t MipiDev[VI_MAX_DEV_NUM]; +// CVI_S16 as16LaneId[VI_MAX_DEV_NUM][5]; +// CVI_S8 as8PNSwap[VI_MAX_DEV_NUM][5]; +// CVI_U8 u8HwSync[VI_MAX_DEV_NUM]; +// SAMPLE_SENSOR_MCLK_ATTR_S stMclkAttr[VI_MAX_DEV_NUM]; +// CVI_U8 u8Orien[VI_MAX_DEV_NUM]; +// } SAMPLE_INI_CFG_S; + +// /******************************************************** +// * function announce +// ********************************************************/ + +// CVI_VOID *SAMPLE_SYS_IOMmap(CVI_U64 u64PhyAddr, CVI_U32 u32Size); +// CVI_S32 SAMPLE_SYS_Munmap(CVI_VOID *pVirAddr, CVI_U32 u32Size); +// CVI_S32 SAMPLE_SYS_SetReg(CVI_U64 u64Addr, CVI_U32 u32Value); +// CVI_S32 SAMPLE_SYS_GetReg(CVI_U64 u64Addr, CVI_U32 *pu32Value); + +CVI_S32 SAMPLE_COMM_SYS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize); +// CVI_S32 SAMPLE_COMM_SYS_MemConfig(void); +// CVI_VOID SAMPLE_COMM_SYS_Exit(void); +// CVI_S32 SAMPLE_COMM_SYS_Init(VB_CONFIG_S *pstVbConfig); +// CVI_S32 SAMPLE_COMM_SYS_InitWithVbSupplement(VB_CONFIG_S *pstVbConf, CVI_U32 u32SupplementConfig); + +CVI_S32 SAMPLE_COMM_VI_CreateIsp(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_VI_DestroyIsp(SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_S32 SAMPLE_COMM_VI_Bind_VO(VI_PIPE ViPipe, VI_CHN ViChn, VO_LAYER VoLayer, VO_CHN VoChn); +// CVI_S32 SAMPLE_COMM_VI_UnBind_VO(VI_PIPE ViPipe, VI_CHN ViChn, VO_LAYER VoLayer, VO_CHN VoChn); +// CVI_S32 SAMPLE_COMM_VI_Bind_VPSS(VI_PIPE ViPipe, VI_CHN ViChn, VPSS_GRP VpssGrp); +// CVI_S32 SAMPLE_COMM_VI_UnBind_VPSS(VI_PIPE ViPipe, VI_CHN ViChn, VPSS_GRP VpssGrp); +// CVI_S32 SAMPLE_COMM_VI_Bind_VENC(VI_PIPE ViPipe, VI_CHN ViChn, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VI_UnBind_VENC(VI_PIPE ViPipe, VI_CHN ViChn, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VPSS_Bind_VO(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VO_LAYER VoLayer, VO_CHN VoChn); +// CVI_S32 SAMPLE_COMM_VPSS_UnBind_VO(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VO_LAYER VoLayer, VO_CHN VoChn); +// CVI_S32 SAMPLE_COMM_VPSS_Bind_VENC(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VPSS_UnBind_VENC(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VDEC_Bind_VPSS(VDEC_CHN VdecChn, VPSS_GRP VpssGrp); +// CVI_S32 SAMPLE_COMM_VDEC_UnBind_VPSS(VDEC_CHN VdecChn, VPSS_GRP VpssGrp); +// CVI_S32 SAMPLE_COMM_VPSS_Bind_VPSS(VPSS_GRP VpssGrpSrc, VPSS_CHN VpssChnSrc, VPSS_GRP VpssGrpDst); +// CVI_S32 SAMPLE_COMM_VPSS_UnBind_VPSS(VPSS_GRP VpssGrpSrc, VPSS_CHN VpssChnSrc, VPSS_GRP VpssGrpDst); + +CVI_S32 SAMPLE_COMM_ISP_Run(CVI_U8 IspDev); +CVI_VOID SAMPLE_COMM_ISP_Stop(CVI_U8 IspDev); +// CVI_VOID SAMPLE_COMM_All_ISP_Stop(void); +CVI_S32 SAMPLE_COMM_ISP_Aelib_Callback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_Aelib_UnCallback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_Awblib_Callback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_Sensor_Regiter_callback(ISP_DEV IspDev, CVI_U32 u32SnsId, CVI_S32 s32BusId, + CVI_S32 s32I2cAddr); +CVI_S32 SAMPLE_COMM_ISP_Awblib_UnCallback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_Aflib_Callback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_Aflib_UnCallback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_Sensor_UnRegiter_callback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr); +CVI_S32 SAMPLE_COMM_ISP_SetSensorMode(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_ISP_SetSnsObj(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType); +CVI_S32 SAMPLE_COMM_ISP_SetSnsInit(CVI_U32 u32SnsId, CVI_U8 u8HwSync); +CVI_S32 SAMPLE_COMM_ISP_PatchSnsObj(CVI_U32 u32SnsId, SAMPLE_SENSOR_INFO_S *pstSnsInfo); +CVI_VOID *SAMPLE_COMM_ISP_GetSnsObj(CVI_U32 u32SnsId); +CVI_VOID *SAMPLE_COMM_GetSnsObj(SAMPLE_SNS_TYPE_E enSnsType); + +// CVI_S32 SAMPLE_AUDIO_DEBUG(void); +// CVI_S32 SAMPLE_AUDIO_DEBUG_LEVEL(ST_AudioUnitTestCfg *testCfg); + +CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr); +void SAMPLE_COMM_VI_GetSensorInfo(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize); +// CVI_S32 SAMPLE_COMM_VI_GetChnAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_CHN_ATTR_S *pstChnAttr); +CVI_S32 SAMPLE_COMM_VI_StartIsp(SAMPLE_VI_INFO_S *pstViInfo); +CVI_S32 SAMPLE_COMM_VI_StopIsp(SAMPLE_VI_INFO_S *pstViInfo); +// CVI_S32 SAMPLE_COMM_VI_StartDev(SAMPLE_VI_INFO_S *pstViInfo); +// CVI_S32 SAMPLE_COMM_VI_StopDev(SAMPLE_VI_INFO_S *pstViInfo); +// CVI_S32 SAMPLE_COMM_VI_StartViChn(SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_S32 SAMPLE_COMM_VI_StopViChn(SAMPLE_VI_INFO_S *pstViInfo); +// CVI_S32 SAMPLE_COMM_VI_StopViPipe(SAMPLE_VI_INFO_S *pstViInfo); +// CVI_S32 SAMPLE_COMM_VI_DestroyVi(SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_S32 SAMPLE_COMM_VI_OPEN(void); +// CVI_S32 SAMPLE_COMM_VI_CLOSE(void); +CVI_S32 SAMPLE_COMM_VI_StartSensor(SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_S32 SAMPLE_COMM_VI_StartMIPI(SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_S32 SAMPLE_COMM_VI_SensorProbe(SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_S32 SAMPLE_COMM_VI_SetIniPath(const CVI_CHAR *iniPath); +// CVI_S32 SAMPLE_COMM_VI_ParseIni(SAMPLE_INI_CFG_S *pstIniCfg); +// CVI_S32 SAMPLE_COMM_VI_DefaultConfig(void); +// CVI_S32 SAMPLE_COMM_VI_IniToViCfg(SAMPLE_INI_CFG_S *pstIniCfg, SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_CHAR *SAMPLE_COMM_VI_GetSnsrTypeName(void); + +// CVI_S32 SAMPLE_COMM_VPSS_Start(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable, VPSS_GRP_ATTR_S *pstVpssGrpAttr, +// VPSS_CHN_ATTR_S *pastVpssChnAttr); +// CVI_S32 SAMPLE_COMM_VPSS_Init(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable, VPSS_GRP_ATTR_S *pstVpssGrpAttr, +// VPSS_CHN_ATTR_S *pastVpssChnAttr); + +// CVI_S32 SAMPLE_COMM_VPSS_Stop(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable); +// CVI_S32 SAMPLE_COMM_VPSS_SendFrame(VPSS_GRP VpssGrp, SIZE_S *stSize, PIXEL_FORMAT_E enPixelFormat, CVI_CHAR *filename); + +// CVI_VOID SAMPLE_COMM_VENC_InitCommonInputCfg(commonInputCfg *pCic); +// CVI_VOID SAMPLE_COMM_VENC_InitChnInputCfg(chnInputCfg *pIc); +// CVI_S32 SAMPLE_COMM_VENC_SaveStream(PAYLOAD_TYPE_E enType, +// FILE *pFd, VENC_STREAM_S *pstStream); +// CVI_S32 SAMPLE_COMM_VENC_SaveChannelStream(vencChnCtx *pvecc); +// CVI_S32 SAMPLE_COMM_VENC_Stop(VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_GetGopAttr(VENC_GOP_MODE_E enGopMode, VENC_GOP_ATTR_S *pstGopAttr); +// CVI_S32 SAMPLE_COMM_VENC_GetFilePostfix(PAYLOAD_TYPE_E enPayload, char *szFilePostfix); +// CVI_S32 SAMPLE_COMM_VENC_InitVBPool(vencChnCtx *pvecc, VENC_CHN VencChnIdx); +// CVI_S32 SAMPLE_COMM_VENC_CloseReEncode(VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_SetJpegParam(chnInputCfg *pIc, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_SetModParam(const commonInputCfg *pCic); +// CVI_S32 SAMPLE_COMM_VENC_SetRoiAttr(VENC_CHN VencChn, PAYLOAD_TYPE_E enType); +// CVI_S32 SAMPLE_COMM_VENC_SetQpMapByCfgFile(VENC_CHN VencChn, +// SAMPLE_COMM_VENC_ROI *vencRoi, CVI_U32 frame_idx, +// CVI_U8 *pu8QpMap, CVI_BOOL *pbQpMapValid, +// CVI_U32 u32Width, CVI_U32 u32Height); +// CVI_S32 SAMPLE_COMM_VENC_SetRoiAttrByCfgFile(VENC_CHN VencChn, SAMPLE_COMM_VENC_ROI *vencRoi, CVI_U32 frame_idx); +// CVI_S32 SAMPLE_COMM_VENC_LoadRoiCfgFile(SAMPLE_COMM_VENC_ROI *vencRoi, CVI_CHAR *cfgFileName); +// CVI_S32 SAMPLE_COMM_VENC_SetH264Trans(chnInputCfg *pIc, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_SetH265Trans(chnInputCfg *pIc, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_SetH264Vui(chnInputCfg *pIc, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_SetH265Vui(chnInputCfg *pIc, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_SetChnParam(chnInputCfg *pIc, VENC_CHN VencChn); +// CVI_S32 SAMPLE_COMM_VENC_Start( +// chnInputCfg * pIc, +// VENC_CHN VencChn, +// PAYLOAD_TYPE_E enType, +// PIC_SIZE_E enSize, +// SAMPLE_RC_E enRcMode, +// CVI_U32 u32Profile, +// CVI_BOOL bRcnRefShareBuf, +// VENC_GOP_ATTR_S *pstGopAttr); +// CVI_S32 SAMPLE_COMM_VDEC_InitVBPool(VDEC_CHN VdecChn, SAMPLE_VDEC_ATTR *pastSampleVdec); +// CVI_VOID SAMPLE_COMM_VDEC_StartSendStream(VDEC_THREAD_PARAM_S *pstVdecSend, +// pthread_t *pVdecThread); +// CVI_S32 SAMPLE_COMM_VDEC_SetVBPool(CVI_S32 Chn, CVI_U32 VBPoolID); +// CVI_S32 SAMPLE_COMM_VDEC_GetVBPool(CVI_S32 Chn); +// CVI_S32 SAMPLE_COMM_VDEC_SetVbMode(CVI_S32 VdecVbSrc); +// CVI_S32 SAMPLE_COMM_VDEC_GetVbMode(void); +// CVI_S32 SAMPLE_COMM_VDEC_Start(vdecChnCtx *pvdchnCtx); +// CVI_VOID SAMPLE_COMM_VDEC_CmdCtrl(VDEC_THREAD_PARAM_S *pstVdecSend, pthread_t *pVdecThread); +// CVI_VOID SAMPLE_COMM_VDEC_StopSendStream(VDEC_THREAD_PARAM_S *pstVdecSend, pthread_t *pVdecThread); +// CVI_S32 SAMPLE_COMM_VDEC_Stop(CVI_S32 s32ChnNum); +// CVI_VOID SAMPLE_COMM_VDEC_ExitVBPool(void); +// CVI_VOID SAMPLE_COMM_VDEC_StartGetPic(VDEC_THREAD_PARAM_S *pstVdecGet, +// pthread_t *pVdecThread); +// CVI_VOID SAMPLE_COMM_VDEC_StopGetPic(VDEC_THREAD_PARAM_S *pstVdecGet, pthread_t *pVdecThread); + +// CVI_S32 SAMPLE_COMM_VO_GetWH(VO_INTF_SYNC_E enIntfSync, CVI_U32 *pu32W, CVI_U32 *pu32H, CVI_U32 *pu32Frm); +// CVI_S32 SAMPLE_COMM_VO_StartDev(VO_DEV VoDev, VO_PUB_ATTR_S *pstPubAttr); +// CVI_S32 SAMPLE_COMM_VO_StopDev(VO_DEV VoDev); +// CVI_S32 SAMPLE_COMM_VO_StartLayer(VO_LAYER VoLayer, const VO_VIDEO_LAYER_ATTR_S *pstLayerAttr); +// CVI_S32 SAMPLE_COMM_VO_StopLayer(VO_LAYER VoLayer); +// CVI_S32 SAMPLE_COMM_VO_StartChn(VO_LAYER VoLayer, SAMPLE_VO_MODE_E enMode); +// CVI_S32 SAMPLE_COMM_VO_StopChn(VO_LAYER VoLayer, SAMPLE_VO_MODE_E enMode); +// CVI_S32 SAMPLE_COMM_VO_BindVpss(VO_LAYER VoLayer, VO_CHN VoChn, VPSS_GRP VpssGrp, VPSS_CHN VpssChn); +// CVI_S32 SAMPLE_COMM_VO_UnBindVpss(VO_LAYER VoLayer, VO_CHN VoChn, VPSS_GRP VpssGrp, VPSS_CHN VpssChn); +// CVI_S32 SAMPLE_COMM_VO_BindVi(VO_LAYER VoLayer, VO_CHN VoChn, VI_CHN ViChn); +// CVI_S32 SAMPLE_COMM_VO_UnBindVi(VO_LAYER VoLayer, VO_CHN VoChn); +// CVI_S32 SAMPLE_COMM_VO_GetDefConfig(SAMPLE_VO_CONFIG_S *pstVoConfig); +// CVI_S32 SAMPLE_COMM_VO_StopVO(SAMPLE_VO_CONFIG_S *pstVoConfig); +// CVI_S32 SAMPLE_COMM_VO_StartVO(SAMPLE_VO_CONFIG_S *pstVoConfig); +// CVI_S32 SAMPLE_COMM_VO_StopPIP(SAMPLE_VO_CONFIG_S *pstVoConfig); +// CVI_S32 SAMPLE_COMM_VO_StartPIP(SAMPLE_VO_CONFIG_S *pstVoConfig); +// CVI_S32 SAMPLE_COMM_VO_GetDefLayerConfig(SAMPLE_COMM_VO_LAYER_CONFIG_S *pstVoLayerConfig); +// CVI_S32 SAMPLE_COMM_VO_StartLayerChn(SAMPLE_COMM_VO_LAYER_CONFIG_S *pstVoLayerConfig); +// CVI_S32 SAMPLE_COMM_VO_StopLayerChn(SAMPLE_COMM_VO_LAYER_CONFIG_S *pstVoLayerConfig); +// CVI_VOID SAMPLE_COMM_VO_Exit(void); + +// CVI_S32 SAMPLE_COMM_REGION_Create(CVI_S32 HandleNum, RGN_TYPE_E enType); +// CVI_S32 SAMPLE_COMM_REGION_Destroy(CVI_S32 HandleNum, RGN_TYPE_E enType); +// CVI_S32 SAMPLE_COMM_REGION_AttachToChn(CVI_S32 HandleNum, RGN_TYPE_E enType, MMF_CHN_S *pstChn); +// CVI_S32 SAMPLE_COMM_REGION_DetachFrmChn(CVI_S32 HandleNum, RGN_TYPE_E enType, MMF_CHN_S *pstChn); +// CVI_S32 SAMPLE_COMM_REGION_SetBitMap(RGN_HANDLE Handle, const char *filename); +// CVI_S32 SAMPLE_COMM_REGION_GetUpCanvas(RGN_HANDLE Handle, const char *filename); +// CVI_S32 SAMPLE_COMM_REGION_GetMinHandle(RGN_TYPE_E enType); + +// CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAiAo(AUDIO_DEV AiDev, AI_CHN AiChn, AUDIO_DEV AoDev, AO_CHN AoChn); +// CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAiAenc(AUDIO_DEV AiDev, AI_CHN AiChn, AENC_CHN AeChn); +// CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAencAdec(AENC_CHN AeChn, ADEC_CHN AdChn, FILE *pAecFd); +// CVI_S32 SAMPLE_COMM_AUDIO_GetAenc(AENC_CHN AeChn, FILE *pAencFd); +// CVI_S32 SAMPLE_COMM_AUDIO_DestoryGetAenc(AENC_CHN AeChn); +// CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdFileAdec(ADEC_CHN AdChn, FILE *pAdcFd); +// CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAdecAo(ADEC_CHN AdChn, AUDIO_DEV AoDev, FILE *pFd); +// CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdAdecAo(ADEC_CHN AdChn); +// CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAoVolCtrl(AUDIO_DEV AoDev); +// CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdAi(AUDIO_DEV AiDev, AI_CHN AiChn); +// CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdAencAdec(AENC_CHN AeChn); +// CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdFileAdec(ADEC_CHN AdChn); +// CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdAoVolCtrl(AUDIO_DEV AoDev); +// CVI_S32 SAMPLE_COMM_AUDIO_DestoryAllTrd(void); +// CVI_S32 SAMPLE_COMM_AUDIO_AoBindAdec(AUDIO_DEV AoDev, AO_CHN AoChn, ADEC_CHN AdChn); +// CVI_S32 SAMPLE_COMM_AUDIO_AoUnbindAdec(AUDIO_DEV AoDev, AO_CHN AoChn, ADEC_CHN AdChn); +// CVI_S32 SAMPLE_COMM_AUDIO_AoBindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AUDIO_DEV AoDev, AO_CHN AoChn); +// CVI_S32 SAMPLE_COMM_AUDIO_AoUnbindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AUDIO_DEV AoDev, AO_CHN AoChn); +// CVI_S32 SAMPLE_COMM_AUDIO_AencBindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AENC_CHN AeChn); +// CVI_S32 SAMPLE_COMM_AUDIO_AencUnbindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AENC_CHN AeChn); +// CVI_S32 SAMPLE_COMM_AUDIO_CfgAcodec(AIO_ATTR_S *pstAioAttr); +// CVI_S32 SAMPLE_COMM_AUDIO_StartAi(AUDIO_DEV AiDevId, CVI_S32 s32AiChn, AIO_ATTR_S *pstAioAttr, +// AUDIO_SAMPLE_RATE_E enOutSampleRate, CVI_BOOL bResampleEn, CVI_VOID *pstAiVqeAttr, +// CVI_U32 u32AiVqeType); +// CVI_S32 SAMPLE_COMM_AUDIO_StopAi(AUDIO_DEV AiDevId, CVI_S32 s32AiChn, CVI_BOOL bResampleEn, CVI_BOOL bVqeEn); +// CVI_S32 SAMPLE_COMM_AUDIO_StartAo(AUDIO_DEV AoDevId, CVI_S32 s32AoChn, AIO_ATTR_S *pstAioAttr, +// AUDIO_SAMPLE_RATE_E enInSampleRate, CVI_BOOL bResampleEn); +// CVI_S32 SAMPLE_COMM_AUDIO_StopAo(AUDIO_DEV AoDevId, CVI_S32 s32AoChn, CVI_BOOL bResampleEn); +// CVI_S32 SAMPLE_COMM_AUDIO_StartAenc(CVI_S32 s32AencChn, AIO_ATTR_S *pstAioAttr, PAYLOAD_TYPE_E enType); +// CVI_S32 SAMPLE_COMM_AUDIO_StopAenc(CVI_S32 s32AencChn); +// CVI_S32 SAMPLE_COMM_AUDIO_StartAdec(ADEC_CHN AdChn, PAYLOAD_TYPE_E enType, ADEC_CHN_ATTR_S *pAdecAttr); +// CVI_S32 SAMPLE_COMM_AUDIO_StopAdec(ADEC_CHN AdChn); + +// CVI_S32 SAMPLE_PLAT_SYS_INIT(SIZE_S stSize); +// CVI_S32 SAMPLE_PLAT_VI_INIT(SAMPLE_VI_CONFIG_S *pstViConfig); +// CVI_S32 SAMPLE_PLAT_VPSS_INIT(VPSS_GRP VpssGrp, SIZE_S stSizeIn, SIZE_S stSizeOut); +// CVI_S32 SAMPLE_PLAT_VO_INIT(void); +// CVI_S32 SAMPLE_PLAT_VO_INIT_BT656(void); + +// CVI_S32 SAMPLE_COMM_I2C_Write(CVI_S32 file, CVI_U16 addr, CVI_U16 reg, CVI_U16 val, CVI_U16 reg_w, CVI_U16 val_w); +// CVI_S32 SAMPLE_COMM_I2C_Read(CVI_S32 file, CVI_U16 addr, CVI_U16 reg, CVI_U16 reg_w, CVI_U8 *r_val); +// CVI_S32 SAMPLE_COMM_I2C_Open(CVI_CHAR *i2c_bus); +// CVI_S32 SAMPLE_COMM_I2C_Close(CVI_S32 i2c_file); + +// CVI_S32 SAMPLE_COMM_VO_Init_BT656_MS7024(char *i2c_bus_str, uint8_t slave_addr, uint8_t selection); +// CVI_S32 SAMPLE_COMM_VO_Init_MIPI_HX8394(void *pvData); + +// /* SAMPLE_COMM_FRAME_SaveToFile: +// * Save videoframe to the file +// * +// * [in]filename: char string of the file to save data. +// * [IN]pstVideoFrame: the videoframe whose data will be saved to file. +// * return: CVI_SUCCESS if no problem. +// */ +// CVI_S32 SAMPLE_COMM_FRAME_SaveToFile(const CVI_CHAR *filename, VIDEO_FRAME_INFO_S *pstVideoFrame); + +// /* SAMPLE_COMM_PrepareFrame: +// * Prepare videoframe per size & format. +// * +// * [in]stSize: the size of videoframe +// * [in]enPixelFormat: pixel format of videoframe +// * [Out]pstVideoFrame: the videoframe generated. +// * return: CVI_SUCCESS if no problem. +// */ +// CVI_S32 SAMPLE_COMM_PrepareFrame(SIZE_S stSize, PIXEL_FORMAT_E enPixelFormat, VIDEO_FRAME_INFO_S *pstVideoFrame); + +// /* SAMPLE_COMM_FRAME_CompareWithFile: +// * Compare data with frame. +// * +// * [in]filename: file to read. +// * [in]pstVideoFrame: the video-frame to store data from file. +// * return: True if match; False if mismatch. +// */ +// CVI_BOOL SAMPLE_COMM_FRAME_CompareWithFile(const CVI_CHAR *filename, VIDEO_FRAME_INFO_S *pstVideoFrame); + +// /* SAMPLE_COMM_FRAME_LoadFromFile: +// * Load data to frame, whose data loaded from given filename. +// * +// * [in]filename: file to read. +// * [in]pstVideoFrame: the video-frame to store data from file. +// * [in]stSize: size of image. +// * [in]enPixelFormat: format of image +// * return: CVI_SUCCESS if no problem. +// */ +// CVI_S32 SAMPLE_COMM_FRAME_LoadFromFile(const CVI_CHAR *filename, VIDEO_FRAME_INFO_S *pstVideoFrame, +// SIZE_S *stSize, PIXEL_FORMAT_E enPixelFormat); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/freertos/cvitek/install/include/common/sleep.h b/freertos/cvitek/install/include/common/sleep.h new file mode 100644 index 000000000..7a7e40b56 --- /dev/null +++ b/freertos/cvitek/install/include/common/sleep.h @@ -0,0 +1,7 @@ +#ifndef _SLEEP_H +#define _SLEEP_H + +void usleep(unsigned long useconds); +void nanosleep(unsigned long nseconds); + +#endif // end of _SLEEP_H diff --git a/freertos/cvitek/install/include/common/types.h b/freertos/cvitek/install/include/common/types.h new file mode 100644 index 000000000..b6a8bc006 --- /dev/null +++ b/freertos/cvitek/install/include/common/types.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_TYPES_H +#define _LINUX_TYPES_H + +#ifndef __ASSEMBLY__ +#ifdef CONFIG_64BIT +typedef unsigned long uintptr_t; +typedef unsigned long size_t; +/* bsd */ +typedef unsigned char u_char; +typedef unsigned short u_short; +typedef unsigned int u_int; +typedef unsigned long u_long; + +/* sysv */ +typedef unsigned char unchar; +typedef unsigned short ushort; +typedef unsigned int uint; +typedef unsigned long ulong; + +typedef signed char s8; +typedef signed short s16; +typedef signed int s32; +typedef signed long s64; + +typedef unsigned char u8; +typedef unsigned short u16; +typedef unsigned int u32; +typedef unsigned long u64; + +typedef signed char __s8; +typedef signed short __s16; +typedef signed int __s32; +typedef signed long __s64; + +typedef unsigned char __u8; +typedef unsigned short __u16; +typedef unsigned int __u32; +typedef unsigned long __u64; + +#endif /* CONFIG_64BIT */ +#endif /* __ASSEMBLY__ */ +#endif /* _LINUX_TYPES_H */ diff --git a/freertos/cvitek/install/include/common/vi_isp.h b/freertos/cvitek/install/include/common/vi_isp.h new file mode 100644 index 000000000..c17477f67 --- /dev/null +++ b/freertos/cvitek/install/include/common/vi_isp.h @@ -0,0 +1,226 @@ +#ifndef __U_VI_ISP_H__ +#define __U_VI_ISP_H__ + +//#include +#include +#include +#include +#include + +enum ISP_SCENE_INFO { + PRE_OFF_POST_OFF_SC, //183x + PRE_OFF_POST_ON_SC, //183x + FE_ON_BE_ON_POST_OFF_SC, //182x + FE_ON_BE_ON_POST_ON_SC, //182x + FE_ON_BE_OFF_POST_OFF_SC, //182x + FE_ON_BE_OFF_POST_ON_SC, //182x + FE_OFF_BE_ON_POST_OFF_SC, //182x + FE_OFF_BE_ON_POST_ON_SC, //182x +}; + +enum cvi_isp_source { + CVI_ISP_SOURCE_DEV = 0, + CVI_ISP_SOURCE_FE, + CVI_ISP_SOURCE_BE, + CVI_ISP_SOURCE_MAX, +}; + +enum IP_INFO_GRP { + IP_INFO_ID_MIN = 0, + //Pre_raw_be + IP_INFO_ID_PRE_RAW_BE = IP_INFO_ID_MIN, + IP_INFO_ID_CROP4, + IP_INFO_ID_CROP5, + IP_INFO_ID_BLC4, + IP_INFO_ID_BLC5, + IP_INFO_ID_FPN, + IP_INFO_ID_IR_PRE_PROC_LE, + IP_INFO_ID_IR_PRE_PROC_SE, + IP_INFO_ID_IR_PROC, + IP_INFO_ID_AEHIST0, + IP_INFO_ID_AEHIST1, + IP_INFO_ID_AWB0, + IP_INFO_ID_GMS, + IP_INFO_ID_AF, + IP_INFO_ID_WBG0, + IP_INFO_ID_WBG1, + IP_INFO_ID_DPC0, + IP_INFO_ID_DPC1, + IP_INFO_ID_INV_WBG0, + IP_INFO_ID_INV_WBG1, + IP_INFO_ID_LSCR4, + IP_INFO_ID_LSCR5, + //Pre_raw_0_fe + IP_INFO_ID_PRE_RAW_FE0, + IP_INFO_ID_CSIBDG0, + IP_INFO_ID_CROP0, + IP_INFO_ID_CROP1, + IP_INFO_ID_BLC0, + IP_INFO_ID_BLC1, + IP_INFO_ID_LMP0, + IP_INFO_ID_WBG11, + IP_INFO_ID_LMP1, + IP_INFO_ID_WBG12, + IP_INFO_ID_RGBMAP0, + IP_INFO_ID_WBG7, + IP_INFO_ID_RGBMAP1, + IP_INFO_ID_WBG8, + IP_INFO_ID_LSCR0, + IP_INFO_ID_LSCR1, + //Pre_raw_1_fe + IP_INFO_ID_PRE_RAW_FE1, + IP_INFO_ID_CSIBDG1_R1, + IP_INFO_ID_CROP2, + IP_INFO_ID_CROP3, + IP_INFO_ID_BLC2, + IP_INFO_ID_BLC3, + IP_INFO_ID_LMP2, + IP_INFO_ID_WBG13, + IP_INFO_ID_LMP3, + IP_INFO_ID_WBG14, + IP_INFO_ID_RGBMAP2, + IP_INFO_ID_WBG9, + IP_INFO_ID_RGBMAP3, + IP_INFO_ID_WBG10, + IP_INFO_ID_LSCR2, + IP_INFO_ID_LSCR3, + //Rawtop + IP_INFO_ID_RAWTOP, + IP_INFO_ID_CFA, + IP_INFO_ID_BNR, + IP_INFO_ID_CROP6, + IP_INFO_ID_CROP7, + //Rgbtop + IP_INFO_ID_RGBTOP, + IP_INFO_ID_LSCM0, + IP_INFO_ID_CCM0, + IP_INFO_ID_CCM1, + IP_INFO_ID_CCM2, + IP_INFO_ID_CCM3, + IP_INFO_ID_CCM4, + IP_INFO_ID_MANR, + IP_INFO_ID_GAMMA, + IP_INFO_ID_CLUT, + IP_INFO_ID_DHZ, + IP_INFO_ID_R2Y4, + IP_INFO_ID_RGBDITHER, + IP_INFO_ID_PREYEE, + IP_INFO_ID_DCI, + IP_INFO_ID_HIST_EDGE_V, + IP_INFO_ID_HDRFUSION, + IP_INFO_ID_HDRLTM, + IP_INFO_ID_AWB2, + //Yuvtop + IP_INFO_ID_YUVTOP, + IP_INFO_ID_444422, + IP_INFO_ID_FBCE, + IP_INFO_ID_FBCD, + IP_INFO_ID_YUVDITHER, + IP_INFO_ID_YNR, + IP_INFO_ID_CNR, + IP_INFO_ID_EE, + IP_INFO_ID_YCURVE, + IP_INFO_ID_CROP8, + IP_INFO_ID_CROP9, + IP_INFO_ID_ISPTOP, + IP_INFO_ID_CSIBDG_LITE, + IP_INFO_ID_MAX, +}; + +struct ip_info { + __u32 str_addr; //IP start address + __u32 size; //IP total registers size +}; + +#if 0 +struct cvi_vip_isp_raw_blk { + struct cvi_vip_memblock raw_dump; + __u32 time_out;//msec + __u16 src_w; + __u16 src_h; + __u16 crop_x; + __u16 crop_y; + __u8 is_b_not_rls; + __u8 is_timeout; + __u8 is_sig_int; +}; + +struct cvi_isp_sts_mem { + __u8 raw_num; + struct cvi_vip_memblock af; + struct cvi_vip_memblock gms; + struct cvi_vip_memblock ae_le; + struct cvi_vip_memblock ae_se; + struct cvi_vip_memblock awb; + struct cvi_vip_memblock awb_post; + struct cvi_vip_memblock dci; + struct cvi_vip_memblock hist_edge_v; + struct cvi_vip_memblock mmap; +}; +#endif + +struct cvi_isp_mbus_framefmt { + __u32 width; + __u32 height; + __u32 code; +}; + +struct cvi_isp_rect { + __s32 left; + __s32 top; + __u32 width; + __u32 height; +}; + +struct cvi_isp_usr_pic_cfg { + struct cvi_isp_mbus_framefmt fmt; + struct cvi_isp_rect crop; +}; +#if 0 +struct cvi_isp_snr_info { + __u8 raw_num; + __u16 color_mode; + __u32 pixel_rate; + struct wdr_size_s snr_fmt; +}; + +struct cvi_isp_snr_update { + __u8 raw_num; + struct snsr_cfg_node_s snr_cfg_node; +}; +#endif +struct cvi_vip_isp_yuv_param { + __u8 raw_num; + __u32 yuv_bypass_path; +}; + +struct cvi_isp_mmap_grid_size { + __u8 raw_num; + __u8 grid_size; +}; + +struct isp_proc_cfg { + void *buffer; +#ifdef __arm__ + __u32 padding; +#endif + size_t buffer_size; +}; + +struct cvi_vip_isp_awb_sts { + __u8 raw_num; + __u8 is_se; + __u8 buf_idx; +}; + +struct cvi_vi_dma_buf_info { + __u64 paddr; + __u32 size; +}; + +struct cvi_isp_sc_online { + __u8 raw_num; + __u8 is_sc_online; +}; + +#endif // __U_VI_ISP_H__ diff --git a/freertos/cvitek/install/include/common/vi_snsr.h b/freertos/cvitek/install/include/common/vi_snsr.h new file mode 100644 index 000000000..142d6a57a --- /dev/null +++ b/freertos/cvitek/install/include/common/vi_snsr.h @@ -0,0 +1,151 @@ +#ifndef __U_VI_SNSR_H__ +#define __U_VI_SNSR_H__ + +#include + +#define MAX_HDR_FRAME_NUM 2 +#define ISP_MAX_SNS_REGS 32 + +/** + * struct active_size_s - linear/wdr image information + * + * @width: image total width + * @height: image total height + * @start_x: horizontal shift of the 1st pixel + * @start_y: horizontal shift of the 1st pixel + * @active_w: effective image width + * @active_h: effective image height + * @max_width: max width for buffer allocation + * @max_height: max height for buffer allocation + */ + +struct active_size_s { + unsigned short width; + unsigned short height; + unsigned short start_x; + unsigned short start_y; + unsigned short active_w; + unsigned short active_h; + unsigned short max_width; + unsigned short max_height; +}; + +/** + * struct wdr_size_s - structure for CVI_SNSR_G_WDR_SIZE + * + * @frm_num: [output] Effective image instance. 1 for linear mode, >1 for wdr mode. + * @img_size: [output] Image information. + */ + +struct wdr_size_s { + unsigned int frm_num; + struct active_size_s img_size[MAX_HDR_FRAME_NUM]; +}; + +enum isp_sns_type_e { + ISP_SNS_I2C_TYPE = 0, + ISP_SNS_TYPE_BUTT, +}; + +enum sns_wdr_e { + SNS_WDR_MODE_NONE = 0, + SNS_WDR_MODE_2TO1_LINE, + SNS_WDR_MODE_BUTT +}; + +/** + * struct isp_i2c_data - sensor setting with i2c interface. + * + * @update: update this register or not + * @drop_frame: drop next frame or not + * @i2c_dev: i2c device number. + * @dev_addr: sensor slave address + * @dly_frm_num: this setting would be set with delay frame number + * @drop_frame_cnt: this setting would be set with drop frame + * @reg_addr: sensor register address + * @addr_bytes: sensor register address bytes number + * @data: sensor register value + * @data_bytes: sensor register value bytes number + */ + +struct isp_i2c_data { + unsigned char update; + unsigned char drop_frame; + unsigned char i2c_dev; + unsigned char dev_addr; + unsigned char dly_frm_num; + unsigned short drop_frame_cnt; + unsigned short reg_addr; + unsigned short addr_bytes; + unsigned short data; + unsigned short data_bytes; +}; + +/** + * struct snsr_regs_s - structure of sensor update wrapper + * + * @sns_type: i2c or other interface + * @regs_num: the maximum sensor registers to be updated + * @i2c_data: sensor registers to be updated + * @use_snsr_sram: does this sensor support group update + * @need_update: global flag for sensor update. Ignore this wrapper + * when it is zero. + */ + +struct snsr_regs_s { + enum isp_sns_type_e sns_type; + unsigned int magic_num; + unsigned int regs_num; + struct isp_i2c_data i2c_data[ISP_MAX_SNS_REGS]; + unsigned char cfg_valid_max_dly_frm; + unsigned char use_snsr_sram; + unsigned char need_update; +}; + +/** + * struct snsr_isp_s - structure of isp update wrapper + * + * @wdr: the image information for isp driver. + * @need_update: global flag for isp update. Ignore this wrapper + * when it is zero. + */ + +struct snsr_isp_s { + struct wdr_size_s wdr; + unsigned char dly_frm_num; + unsigned char need_update; +}; + +/** + * struct snsr_cif_s - structure of cif(mipi_rx) update wrapper + * + * @wdr: the image information for isp driver. + * @need_update: global flag for cif update. Ignore this wrapper + * when it is zero. + */ + +struct snsr_cif_s { + struct manual_hdr_s wdr_manu; + unsigned char dly_frm_num; + unsigned char need_update; +}; + +/** + * struct snsr_cfg_node_s - structure of cfg node for runtime update + * + * @snsr: [output] snsr wrapper for runtime update + * @isp: [output] isp wrapper for runtime update + * @cif: [output] cif wrapper for runtime update + * @configed: [intput] after CVI_SNSR_G_CFG_NODE is called, this flag + * is set as false by sensor driver. The caller shall set it as + * true after this cfg_node is passed to isp driver. + */ + +struct snsr_cfg_node_s { + struct snsr_regs_s snsr; + struct snsr_isp_s isp; + struct snsr_cif_s cif; + unsigned char configed; +}; + +#endif // __U_VI_SNSR_H__ diff --git a/freertos/cvitek/install/include/common/vi_uapi.h b/freertos/cvitek/install/include/common/vi_uapi.h new file mode 100644 index 000000000..5f00ad5ba --- /dev/null +++ b/freertos/cvitek/install/include/common/vi_uapi.h @@ -0,0 +1,103 @@ +#ifndef __U_VI_UAPI_H__ +#define __U_VI_UAPI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +enum ISP_CMDQ_E { + ISP_CMDQ_RECV_EV = 0x30, + ISP_CMDQ_GET_STS_MEM, + ISP_CMDQ_GET_TUNING_NODE_MEM, + ISP_CMDQ_GET_LSC_PHY_BUF, + ISP_CMDQ_MAX, +}; + +enum CODEC_CMDQ_E { + CODEC_CMDQ_RECV_BUF = ISP_CMDQ_MAX, + CODEC_CMDQ_MAX, +}; + +enum VI_CMDQ_E { + VI_CMDQ_INFO_RECV_BUF_ACK = CODEC_CMDQ_MAX, + VI_CMDQ_INFO_MAX, +}; + +/* + * Events + */ +enum VI_EVENT { + VI_EVENT_BASE, + VI_EVENT_PRE0_SOF, + VI_EVENT_PRE1_SOF, + VI_EVENT_PRE0_EOF, + VI_EVENT_PRE1_EOF, + VI_EVENT_POST_EOF, + VI_EVENT_POST1_EOF, + VI_EVENT_ISP_PROC_READ, + VI_EVENT_AWB0_DONE, + VI_EVENT_AWB1_DONE, + VI_EVENT_MAX, +}; + +enum ISP_BLC_ID { + ISP_BLC_ID_FE0_LE = 0, + ISP_BLC_ID_FE0_SE, + ISP_BLC_ID_FE1_LE, + ISP_BLC_ID_FE1_SE, + ISP_BLC_ID_FE2_LE, + ISP_BLC_ID_BE_LE, + ISP_BLC_ID_BE_SE, + ISP_BLC_ID_MAX, +}; + +enum ISP_WBG_ID { + ISP_WBG_ID_FE0_RGBMAP_LE = 0, + ISP_WBG_ID_FE0_RGBMAP_SE, + ISP_WBG_ID_FE1_RGBMAP_LE, + ISP_WBG_ID_FE1_RGBMAP_SE, + ISP_WBG_ID_FE2_RGBMAP_LE, + ISP_WBG_ID_RAW_TOP_LE, + ISP_WBG_ID_RAW_TOP_SE, + ISP_WBG_ID_MAX, +}; + +struct vi_event { + __u32 dev_id; + __u32 type; + __u32 frame_sequence; + __u32 stt_idx; +}; + +/* struct cvi_vip_memblock + * @base: the address of the memory allocated. + * @size: Size in bytes of the memblock. + */ +struct cvi_vip_memblock { + __u8 raw_num; + __u64 phy_addr; + void *vir_addr; + __u32 size; +}; + +struct cvi_isp_sts_mem { + __u8 raw_num; + struct cvi_vip_memblock af; + struct cvi_vip_memblock gms; + struct cvi_vip_memblock ae_le; + struct cvi_vip_memblock ae_se; + struct cvi_vip_memblock awb; + struct cvi_vip_memblock awb_post; + struct cvi_vip_memblock dci; + struct cvi_vip_memblock hist_edge_v; + struct cvi_vip_memblock mmap; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* __U_VI_UAPI_H__ */ diff --git a/freertos/cvitek/install/include/common/vip_sys.h b/freertos/cvitek/install/include/common/vip_sys.h new file mode 100644 index 000000000..4d01a649f --- /dev/null +++ b/freertos/cvitek/install/include/common/vip_sys.h @@ -0,0 +1,60 @@ +#ifndef __VIP_SYS_H__ +#define __VIP_SYS_H__ + +#include +#include + +#include "mmio.h" +#include "reg_vip_sys.h" + +/* VIP_SYS */ + +#include "mmio.h" + +#define CV181X_SYS_CLOCK_BASE 0x03002000 +#define REG_DIV_CLK_SRC_VIP_SYS_2 0x110 + +#define VIP_SYS_2_SRC_DISPPLL (2 << 8) // 1188MHz +#define VIP_SYS_2_SRC_FPLL (3 << 8) // 1500MHz +#define VIP_SYS_2_SRC_MASK (3 << 8) // [8:9] + +#define SET_VIP_SYS_2_CLK_DIV(s, v) \ + _reg_write(CV181X_SYS_CLOCK_BASE + REG_DIV_CLK_SRC_VIP_SYS_2, \ + (s == VIP_SYS_2_SRC_DISPPLL) ? ((v << 16) | 0x209) : ((v << 16) | 0x309)) + +#define VIP_SYS_BASE 0x0A0C8000 + +#define vip_sys_reg_write_mask(addr, mask, data) \ + mmio_clrsetbits_32((VIP_SYS_BASE + addr), mask, data) + +#define VIP_NORM_CLK_RATIO_MASK(CLK_NAME) VIP_SYS_REG_NORM_DIV_##CLK_NAME##_MASK +#define VIP_NORM_CLK_RATIO_OFFSET(CLK_NAME) VIP_SYS_REG_NORM_DIV_##CLK_NAME##_OFFSET +#define VIP_NORM_CLK_RATIO_CONFIG(CLK_NAME, RATIO) \ + vip_sys_reg_write_mask(VIP_SYS_REG_NORM_DIV_##CLK_NAME, \ + VIP_NORM_CLK_RATIO_MASK(CLK_NAME), \ + RATIO << VIP_NORM_CLK_RATIO_OFFSET(CLK_NAME)) + +#define VIP_UPDATE_CLK_RATIO_MASK(CLK_NAME) VIP_SYS_REG_UPDATE_##CLK_NAME##_MASK +#define VIP_UPDATE_CLK_RATIO_OFFSET(CLK_NAME) VIP_SYS_REG_UPDATE_##CLK_NAME##_OFFSET +#define VIP_UPDATE_CLK_RATIO(CLK_NAME) \ + vip_sys_reg_write_mask(VIP_SYS_REG_UPDATE_##CLK_NAME, \ + VIP_UPDATE_CLK_RATIO_MASK(CLK_NAME), \ + 1 << VIP_UPDATE_CLK_RATIO_OFFSET(CLK_NAME)) + +static void vip_toggle_reset(uint32_t mask) +{ + uint32_t reset; + uint32_t reset_base = VIP_SYS_BASE + VIP_SYS_VIP_RESETS; + + reset = _reg_read(reset_base); + + reset |= mask; + _reg_write(reset_base, reset); + + udelay(20); + + reset &= ~mask; + _reg_write(reset_base, reset); +} + +#endif diff --git a/freertos/cvitek/install/include/driver/cif/cif.h b/freertos/cvitek/install/include/driver/cif/cif.h new file mode 100644 index 000000000..4af330b2c --- /dev/null +++ b/freertos/cvitek/install/include/driver/cif/cif.h @@ -0,0 +1,133 @@ +/* + * Copyright CviTek Inc. + * + * Created Time: May, 2021 + */ +#ifndef __CVI_CIF_H__ +#define __CVI_CIF_H__ + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#ifdef RUN_IN_SRAM +#include "drv/cif_drv.h" + +#elif (RUN_TYPE == CVIRTOS) +#include "cif_drv.h" +#endif + +#include "gpio.h" +#include "cif_uapi.h" +#include "sensor.h" + +#define CIF_MAX_CSI_NUM 2 +#define CIF_MAX_MAC_NUM 3 + +#define CSIMAC0_INTR_NUM (22) +#define CSIMAC1_INTR_NUM (23) + +/* Register Base Address */ +#define DPHY_TOP_BASE (0x0A0D0000) +#define DPHY_4L_BASE (0x0A0D0300) +#define DPHY_2L_BASE (0x0A0D0600) +#define SENSOR_MAC0_BASE (0x0A0C2000) +#define SENSOR_MAC1_BASE (0x0A0C4000) +#define SENSOR_MAC_VI_BASE (0x0A0C6000) + +#define SENSOR_CSI0_BASE (0x0A0C2400) +#define SENSOR_CSI1_BASE (0x0A0C4400) + +// CAM_PLL +#define CLK_CAM0_SRC_DIV (0x030028C0) +#define CLK_CAM1_SRC_DIV (0x030028C4) + +/* Register fileds */ +#define DPHY_TOP_REG_04 (DPHY_TOP_BASE + 0x04) +#define DPHY_TOP_REG_30 (DPHY_TOP_BASE + 0x30) + +#define DPHY_4L_REG_04 (DPHY_4L_BASE + 0x04) +#define DPHY_4L_REG_08 (DPHY_4L_BASE + 0x08) +#define DPHY_4L_REG_0C (DPHY_4L_BASE + 0x0C) +#define DPHY_4L_REG_10 (DPHY_4L_BASE + 0x10) + +#define DPHY_2L_REG_04 (DPHY_2L_BASE + 0x04) +#define DPHY_2L_REG_08 (DPHY_2L_BASE + 0x08) +#define DPHY_2L_REG_0C (DPHY_2L_BASE + 0x0C) +#define DPHY_2L_REG_10 (DPHY_2L_BASE + 0x10) + +// CAM_PLL +#define REG_CAM_DIV_DIS (4) +#define REG_CAM_SRC (8) +#define REG_CAM_SRC_MASK (3 << REG_CAM_SRC) +#define REG_CAM_DIV (16) +#define REG_CAM_DIV_MASK (0x3F << REG_CAM_DIV) + +/* Macro */ +#define CSI_HDR_ID_VALUE (0xfff00) +#define CSI_HDR_VC_VALUE (0xdff00) +#define CSI_LINEAR_VALUE (0xcff00) + +#define CIF_PHY_LANE_NUM 6 + +#define MAX_PAD_NUM 19 + +#define ENOIOCTLCMD 515 /* No ioctl command */ + +/* Struct */ +struct cvi_csi_status { + unsigned int errcnt_ecc; + unsigned int errcnt_crc; + unsigned int errcnt_hdr; + unsigned int errcnt_wc; + unsigned int fifo_full; +}; + +struct cvi_lvds_status { + unsigned int fifo_full; +}; + +struct cvi_link { + struct cif_ctx cif_ctx; + unsigned int irq_num; + // struct reset_control *phy_reset; + // struct reset_control *phy_apb_reset; + unsigned int is_on; + struct cif_param param; + struct combo_dev_attr_s attr; + enum clk_edge_e clk_edge; + enum output_msb_e msb; + unsigned int crop_top; + unsigned int distance_fp; + int snsr_rst_pin; + enum of_gpio_flags snsr_rst_pol; + union { + struct cvi_csi_status sts_csi; + struct cvi_lvds_status sts_lvds; + }; +// struct device *dev; + enum rx_mac_clk_e mac_clk; + enum ttl_bt_fmt_out bt_fmt_out; +}; + +struct cvi_cam_clk { + int is_on; + // struct clk *clk_o; +}; + +struct cvi_cif_dev { + uint32_t devno; + // struct miscdevice miscdev; + // spinlock_t lock; + // struct mutex mutex; + struct cvi_link link[MAX_LINK_NUM]; + // struct cvi_cam_clk clk_cam0; + // struct cvi_cam_clk clk_cam1; + // struct cvi_cam_clk vip_sys2; + // struct cvi_cam_clk clk_div_0_src_vip_sys_2; /* mipipll */ + // struct cvi_cam_clk clk_div_1_src_vip_sys_2; /* fpll */ + unsigned int max_mac_clk; + void *pad_ctrl; +}; + +#endif //__CVI_CIF_H__ diff --git a/freertos/cvitek/install/include/driver/cif/irqreturn.h b/freertos/cvitek/install/include/driver/cif/irqreturn.h new file mode 100644 index 000000000..eb1bdcf95 --- /dev/null +++ b/freertos/cvitek/install/include/driver/cif/irqreturn.h @@ -0,0 +1,19 @@ +#ifndef _LINUX_IRQRETURN_H +#define _LINUX_IRQRETURN_H + +/** + * enum irqreturn + * @IRQ_NONE interrupt was not from this device or was not handled + * @IRQ_HANDLED interrupt was handled by this device + * @IRQ_WAKE_THREAD handler requests to wake the handler thread + */ +enum irqreturn { + IRQ_NONE = (0 << 0), + IRQ_HANDLED = (1 << 0), + IRQ_WAKE_THREAD = (1 << 1), +}; + +typedef enum irqreturn irqreturn_t; +#define IRQ_RETVAL(x) ((x) ? IRQ_HANDLED : IRQ_NONE) + +#endif diff --git a/freertos/cvitek/install/include/driver/fast_image/fast_image.h b/freertos/cvitek/install/include/driver/fast_image/fast_image.h new file mode 100644 index 000000000..8ff26fe7c --- /dev/null +++ b/freertos/cvitek/install/include/driver/fast_image/fast_image.h @@ -0,0 +1,155 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2022. All rights reserved. + * + * File Name: fast_image.h + * Description: + */ + +#ifndef __FAST_IMAGE_HEADER__ +#define __FAST_IMAGE_HEADER__ + +#include "rtos_cmdqu.h" +#ifndef __linux__ +#include "types.h" +#else +#include + +enum FAST_IMAGE_CMD_TYPE { + FAST_SEND_STOP_REC = CMDQU_SYSTEM_LIMIT, + FAST_SEND_QUERY_ISP_PADDR, + FAST_SEND_QUERY_ISP_VADDR, + FAST_SEND_QUERY_ISP_SIZE, + FAST_SEND_QUERY_ISP_CTXT, + FAST_SEND_QUERY_IMG_PADDR, + FAST_SEND_QUERY_IMG_VADDR, + FAST_SEND_QUERY_IMG_SIZE, + FAST_SEND_QUERY_IMG_CTXT, + FAST_SEND_QUERY_ENC_PADDR, + FAST_SEND_QUERY_ENC_VADDR, + FAST_SEND_QUERY_ENC_SIZE, + FAST_SEND_QUERY_ENC_CTXT, + FAST_SEND_QUERY_FREE_ISP_ION, + FAST_SEND_QUERY_FREE_IMG_ION, + FAST_SEND_QUERY_FREE_ENC_ION, + FAST_SEND_QUERY_DUMP_MSG, + FAST_SEND_QUERY_DUMP_MSG_INFO, + FAST_SEND_QUERY_DUMP_EN, + FAST_SEND_QUERY_DUMP_DIS, + FAST_SEND_QUERY_DUMP_JPG, + FAST_SEND_QUERY_DUMP_JPG_INFO, + FAST_SEND_QUERY_TRACE_SNAPSHOT_START, + FAST_SEND_QUERY_TRACE_SNAPSHOT_STOP, + FAST_SEND_QUERY_TRACE_SNAPSHOT_DUMP, + FAST_SEND_QUERY_TRACE_STREAM_START, + FAST_SEND_QUERY_TRACE_STREAM_STOP, + FAST_SEND_QUERY_TRACE_STREAM_DUMP, + FAST_SEND_LIMIT, +}; + +#define FAST_IMAGE_DEV_NAME "cvi-fast-image" +#define FAST_IMAGE_SEND_STOP_REC _IOW('r', FAST_SEND_STOP_REC, unsigned long) +#define FAST_IMAGE_QUERY_ISP_PADDR _IOW('r', FAST_SEND_QUERY_ISP_PADDR, unsigned long) +#define FAST_IMAGE_QUERY_ISP_VADDR _IOW('r', FAST_SEND_QUERY_ISP_VADDR, unsigned long) +#define FAST_IMAGE_QUERY_ISP_SIZE _IOW('r', FAST_SEND_QUERY_ISP_SIZE, unsigned long) +#define FAST_IMAGE_QUERY_ISP_CTXT _IOW('r', FAST_SEND_QUERY_ISP_CTXT, unsigned long) +#define FAST_IMAGE_QUERY_IMG_PADDR _IOW('r', FAST_SEND_QUERY_IMG_PADDR, unsigned long) +#define FAST_IMAGE_QUERY_IMG_VADDR _IOW('r', FAST_SEND_QUERY_IMG_VADDR, unsigned long) +#define FAST_IMAGE_QUERY_IMG_SIZE _IOW('r', FAST_SEND_QUERY_IMG_SIZE, unsigned long) +#define FAST_IMAGE_QUERY_IMG_CTXT _IOW('r', FAST_SEND_QUERY_IMG_CTXT, unsigned long) +#define FAST_IMAGE_QUERY_ENC_PADDR _IOW('r', FAST_SEND_QUERY_ENC_PADDR, unsigned long) +#define FAST_IMAGE_QUERY_ENC_VADDR _IOW('r', FAST_SEND_QUERY_ENC_VADDR, unsigned long) +#define FAST_IMAGE_QUERY_ENC_SIZE _IOW('r', FAST_SEND_QUERY_ENC_SIZE, unsigned long) +#define FAST_IMAGE_QUERY_ENC_CTXT _IOW('r', FAST_SEND_QUERY_ENC_CTXT, unsigned long) +#define FAST_IMAGE_QUERY_FREE_ISP_ION _IOW('r', FAST_SEND_QUERY_FREE_ISP_ION, unsigned long) +#define FAST_IMAGE_QUERY_FREE_IMG_ION _IOW('r', FAST_SEND_QUERY_FREE_IMG_ION, unsigned long) +#define FAST_IMAGE_QUERY_FREE_ENC_ION _IOW('r', FAST_SEND_QUERY_FREE_ENC_ION, unsigned long) +#define FAST_IMAGE_QUERY_DUMP_MSG _IOW('r', FAST_SEND_QUERY_DUMP_MSG, unsigned long) +#define FAST_IMAGE_QUERY_DUMP_MSG_INFO _IOW('r', FAST_SEND_QUERY_DUMP_MSG_INFO, unsigned long) +#define FAST_IMAGE_QUERY_DUMP_EN _IOW('r', FAST_SEND_QUERY_DUMP_EN, unsigned long) +#define FAST_IMAGE_QUERY_DUMP_DIS _IOW('r', FAST_SEND_QUERY_DUMP_DIS, unsigned long) +#define FAST_IMAGE_QUERY_DUMP_JPG _IOW('r', FAST_SEND_QUERY_DUMP_JPG, unsigned long) +#define FAST_IMAGE_QUERY_DUMP_JPG_INFO _IOW('r', FAST_SEND_QUERY_DUMP_JPG_INFO, unsigned long) +#define FAST_IMAGE_QUERY_TRACE_SNAPSHOT_START _IOW('r', FAST_SEND_QUERY_TRACE_SNAPSHOT_START, unsigned long) +#define FAST_IMAGE_QUERY_TRACE_SNAPSHOT_STOP _IOW('r', FAST_SEND_QUERY_TRACE_SNAPSHOT_STOP, unsigned long) +#define FAST_IMAGE_QUERY_TRACE_SNAPSHOT_DUMP _IOW('r', FAST_SEND_QUERY_TRACE_SNAPSHOT_DUMP, unsigned long) +#define FAST_IMAGE_QUERY_TRACE_STREAM_START _IOW('r', FAST_SEND_QUERY_TRACE_STREAM_START, unsigned long) +#define FAST_IMAGE_QUERY_TRACE_STREAM_STOP _IOW('r', FAST_SEND_QUERY_TRACE_STREAM_STOP, unsigned long) +#define FAST_IMAGE_QUERY_TRACE_STREAM_DUMP _IOW('r', FAST_SEND_QUERY_TRACE_STREAM_DUMP, unsigned long) + +#endif // end of __linux__ + +#define C906_MAGIC_HEADER 0xA55AC906 // master cpu is c906 +#define CA53_MAGIC_HEADER 0xA55ACA53 // master cpu is ca53 + +#ifdef __riscv +#define RTOS_MAGIC_HEADER C906_MAGIC_HEADER +#else +#define RTOS_MAGIC_HEADER CA53_MAGIC_HEADER +#endif + +enum E_IMAGE_TYPE { + E_FAST_NONE = 0, + E_FAST_JEPG = 1, + E_FAST_H264, + E_FAST_H265, +}; + +enum _MUC_STATUS_E { + MCU_STATUS_NONOS_INIT = 1, + MCU_STATUS_NONOS_RUNNING, + MCU_STATUS_NONOS_DONE, + MCU_STATUS_RTOS_T1_INIT, // before linux running + MCU_STATUS_RTOS_T1_RUNNING, + MCU_STATUS_RTOS_T2_INIT, // after linux running + MCU_STATUS_RTOS_T2_RUNNING, + MCU_STATUS_LINUX_INIT, + MCU_STATUS_LINUX_RUNNING, +}; + +enum DUMP_PRINT_SIZE_E { + DUMP_PRINT_SZ_IDX_0K = 0, + DUMP_PRINT_SZ_IDX_4K = 12, // 4096 = 1<<12 + DUMP_PRINT_SZ_IDX_8K, + DUMP_PRINT_SZ_IDX_16K, + DUMP_PRINT_SZ_IDX_32K, + DUMP_PRINT_SZ_IDX_64K, + DUMP_PRINT_SZ_IDX_128K, + DUMP_PRINT_SZ_IDX_LIMIT, +}; + +#define ATTR __attribute__ + +#ifndef __packed +#define __packed ATTR((packed)) +#endif + +#ifndef __aligned +#define __aligned(x) ATTR((aligned(x))) +#endif + +/* this structure should be modified both fsbl & MCU & osdrv side */ +struct transfer_config_t { + uint32_t conf_magic; + uint32_t conf_size; //conf_size exclude mcu_status & linux_status + uint32_t isp_buffer_addr; + uint32_t isp_buffer_size; + uint32_t encode_img_addr; + uint32_t encode_img_size; + uint32_t encode_buf_addr; + uint32_t encode_buf_size; + uint8_t dump_print_enable; + uint8_t dump_print_size_idx; + uint16_t image_type; + uint16_t checksum; // checksum exclude mcu_status & linux_status + uint8_t mcu_status; + uint8_t linux_status; +} __packed __aligned(0x40); + +struct trace_snapshot_t { + uint32_t ptr; + uint16_t size; + uint16_t type; +} __packed; + +#endif // end of __FAST_IMAGE_HEADER__ diff --git a/freertos/cvitek/install/include/driver/gpio/gpio.h b/freertos/cvitek/install/include/driver/gpio/gpio.h new file mode 100644 index 000000000..ef4e37299 --- /dev/null +++ b/freertos/cvitek/install/include/driver/gpio/gpio.h @@ -0,0 +1,19 @@ +#ifndef __GPIO_H__ +#define __GPIO_H__ + +#include +#include + +#define CVI_GPIOA_BASE 0x03020000 +#define CVI_GPIOB_BASE 0x03021000 +#define CVI_GPIOC_BASE 0x03022000 +#define CVI_GPIOD_BASE 0x03023000 + +enum of_gpio_flags { + OF_GPIO_ACTIVE_LOW = 0x1 +}; + +int gpio_is_valid(int pin); +void gpio_direction_output(int pin, int val); + +#endif diff --git a/freertos/cvitek/install/include/driver/jenc/jenc.h b/freertos/cvitek/install/include/driver/jenc/jenc.h new file mode 100644 index 000000000..bbc18ab1d --- /dev/null +++ b/freertos/cvitek/install/include/driver/jenc/jenc.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __DRV_JENC_H__ +#define __DRV_JENC_H__ +#ifdef FREERTOS_BSP +#include "cvi_type.h" + +int jpu_enc(CVI_U32 width, CVI_U32 height, CVI_U32 phySrcAddr, CVI_U32 phyDstAddr, CVI_U64 pts); + +#else +#include +#endif + +#define MAX_JPEG_NUM 16 +typedef struct _JPEG_PIC { + CVI_U32 width; + CVI_U32 height; + CVI_U32 addr; + CVI_U32 size; + CVI_U64 pts; +} JPEG_PIC; + +#endif // end of __DRV_JENC_H__ diff --git a/freertos/cvitek/install/include/driver/pinmux/pinmux.h b/freertos/cvitek/install/include/driver/pinmux/pinmux.h new file mode 100644 index 000000000..64f84529e --- /dev/null +++ b/freertos/cvitek/install/include/driver/pinmux/pinmux.h @@ -0,0 +1,6 @@ +#ifndef __PINMUX_CONFIG_H__ +#define __PINMUX_CONFIG_H__ + +void pinmux_init(void); + +#endif //end of __PINMUX_CONFIG_H__ diff --git a/freertos/cvitek/install/include/driver/rgn/cmpr_canvas.h b/freertos/cvitek/install/include/driver/rgn/cmpr_canvas.h new file mode 100644 index 000000000..9f4a5f050 --- /dev/null +++ b/freertos/cvitek/install/include/driver/rgn/cmpr_canvas.h @@ -0,0 +1,177 @@ +#ifndef __CMPR_CANVAS__ +#define __CMPR_CANVAS__ + +#include +#include +#include +#include "osd_cmpr.h" +#include "cvi_list.h" + +#define BUF_GUARD_SIZE (1 << 12) +#define OSDEC_RL_BD (6) +#define OSDEC_PAL_BD (3) +#define OSDEC_MAX_RL (1 << OSDEC_RL_BD) + +#define MIN_THICKNESS (1) +#define MAX_THICKNESS (32) + +#define BG_COLOR_CODE (2) +#define CMPR_CANVAS_DBG (0) + +typedef enum { + RECT = 0, + STROKE_RECT, + BIT_MAP, + LINE, + CMPR_BIT_MAP, + NUM_OF_DRAW_OBJ +} DRAW_OBJ_TYPE; + +typedef struct { + int width; + int height; + OSD_FORMAT format; + uint32_t bg_color_code; +} Canvas_Attr; + +typedef union _COLOR { + uint32_t code; + uint8_t *buf; +} COLOR; + +typedef struct { + int x0; // start position + int x1; // end position + uint16_t obj_id; +} OBJ_SLICE; + +typedef struct { + OBJ_SLICE slice; + int num; + dlist_t item; +} SLICE_LIST; + +typedef struct { + bool is_const; + bool is_cmpr; + uint16_t width; + union { + uint32_t stride; + uint16_t *bs_len; + }; + COLOR color; + uint16_t id; +} SEGMENT; + +typedef struct { + SEGMENT segment; + int num; + dlist_t item; +} SEGMENT_LIST; + +typedef struct { + int x; + int y; + int width; + int height; + int thickness; +} RECT_ATTR; + +typedef struct { + RECT_ATTR rect; + union { + uint32_t stride; + uint32_t bs_offset; + }; +} BITMAP_ATTR; + +typedef struct { + float _mx; // slope of two end-point vector + float _bx[2]; + float _by[2]; + float _ex[2]; + float _ey[2]; + float ts_h; // thickness proj. on horizontal slice +} LINE_ATTR; + +typedef struct { + DRAW_OBJ_TYPE type; + union { + RECT_ATTR rect; + LINE_ATTR line; + BITMAP_ATTR bitmap; + }; + COLOR color; + int _max_y; + int _min_y; +} DRAW_OBJ; + +typedef struct { + OSDCmpr_Ctrl osdCmpr_ctrl; + StreamBuffer bitstream; + RGBA last_color; + int rl_cnt; + MODE_TYPE md; + CODE code; +} Cmpr_Canvas_Ctrl; + +uint32_t est_cmpr_canvas_size(Canvas_Attr *canvas, DRAW_OBJ *objs, uint32_t obj_num); + +int draw_cmpr_canvas(Canvas_Attr *canvas, DRAW_OBJ *objs, uint32_t obj_num, + uint8_t *obuf, int buf_size, uint32_t *p_osize); + +void set_rect_obj_attr(DRAW_OBJ *obj, Canvas_Attr *canvas, uint32_t color_code, + int pt_x, int pt_y, int width, int height, + bool is_filled, int thickness); +void set_bitmap_obj_attr(DRAW_OBJ *obj_attr, Canvas_Attr *canvas, uint8_t *buf, + int pt_x, int pt_y, int width, int height, + bool is_cmpr); +void set_line_obj_attr(DRAW_OBJ *obj, Canvas_Attr *canvas, uint32_t color_code, + int pt_x0, int pt_y0, int pt_x1, int pt_y1, + int thickness); +int cmpr_bitmap(Canvas_Attr *canvas, uint8_t *ibuf, uint8_t *obuf, int width, + int height, int buf_size, uint32_t *p_osize); + +#if (CMPR_CANVAS_DBG) +int draw_canvas_raw_buffer(Canvas_Attr *canvas, DRAW_OBJ *obj_vec, + uint8_t *obuf); +int draw_canvas_raw_buffer2(Canvas_Attr *canvas, DRAW_OBJ *obj_vec, + uint8_t *obuf); +#endif + +//============================================================================================== +//CVI interface +#ifdef __cplusplus +extern "C" +{ +#endif + +uint32_t CVI_OSDC_est_cmpr_canvas_size(Canvas_Attr *canvas, DRAW_OBJ *objs, uint32_t obj_num); + +int CVI_OSDC_draw_cmpr_canvas(Canvas_Attr *canvas, DRAW_OBJ *objs, uint32_t obj_num, + uint8_t *obuf, uint32_t buf_size, uint32_t *p_osize); + +void CVI_OSDC_set_rect_obj_attr(Canvas_Attr *canvas, DRAW_OBJ *obj, uint32_t color_code, + int pt_x, int pt_y, int width, int height, bool is_filled, int thickness); + +void CVI_OSDC_set_bitmap_obj_attr(Canvas_Attr *canvas, DRAW_OBJ *obj_attr, uint8_t *buf, + int pt_x, int pt_y, int width, int height, bool is_cmpr); + +void CVI_OSDC_set_line_obj_attr(Canvas_Attr *canvas, DRAW_OBJ *obj, uint32_t color_code, + int pt_x0, int pt_y0, int pt_x1, int pt_y1, int thickness); + +int CVI_OSDC_cmpr_bitmap(Canvas_Attr *canvas, uint8_t *ibuf, uint8_t *obuf, int width, int height, + int buf_size, uint32_t *p_osize); + +#if (CMPR_CANVAS_DBG) +int CVI_OSDC_draw_canvas_raw_buffer(Canvas_Attr *canvas, DRAW_OBJ *obj_vec, uint8_t *obuf); +int CVI_OSDC_draw_canvas_raw_buffer2(Canvas_Attr *canvas, DRAW_OBJ *obj_vec, uint8_t *obuf); +#endif + + +#ifdef __cplusplus +} +#endif + + +#endif /* __CMPR_CANVAS__ */ diff --git a/freertos/cvitek/install/include/driver/rgn/cvi_comm_osdc.h b/freertos/cvitek/install/include/driver/rgn/cvi_comm_osdc.h new file mode 100644 index 000000000..7089df739 --- /dev/null +++ b/freertos/cvitek/install/include/driver/rgn/cvi_comm_osdc.h @@ -0,0 +1,91 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_comm_osdc.h + * Description: + * The common data type defination for osdc module. + */ + +#ifndef __CVI_COMM_OSDC_H__ +#define __CVI_COMM_OSDC_H__ + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +typedef enum _OSDC_OSD_FORMAT_E { + OSD_ARGB8888 = 0, + OSD_ARGB4444 = 4, + OSD_ARGB1555 = 5, + OSD_LUT8 = 8, + OSD_LUT4 = 10, + NUM_OF_FORMAT +} OSDC_OSD_FORMAT_E; + +typedef enum _OSDC_DRAW_OBJ_TYPE_E { + RECT = 0, + STROKE_RECT, + BIT_MAP, + LINE, + CMPR_BIT_MAP, + NUM_OF_DRAW_OBJ +} OSDC_DRAW_OBJ_TYPE_E; + +typedef struct _OSDC_Canvas_Attr_S { + int width; + int height; + OSDC_OSD_FORMAT_E format; + uint32_t bg_color_code; +} OSDC_Canvas_Attr_S; + +typedef struct _OSDC_RECT_ATTR_S { + int x; + int y; + int width; + int height; + int thickness; +} OSDC_RECT_ATTR_S; + +typedef struct _OSDC_LINE_ATTR_S { + float _mx; // slope of two end-point vector + float _bx[2]; + float _by[2]; + float _ex[2]; + float _ey[2]; + float ts_h; // thickness proj. on horizontal slice +} OSDC_LINE_ATTR_S; + +typedef struct _OSDC_BITMAP_ATTR_S { + OSDC_RECT_ATTR_S rect; + union { + uint32_t stride; + uint32_t bs_offset; + }; +} OSDC_BITMAP_ATTR_S; + +typedef union _OSDC_COLOR_S { + uint32_t code; + uint8_t *buf; +} OSDC_COLOR_S; + +typedef struct _OSDC_DRAW_OBJ_S { + OSDC_DRAW_OBJ_TYPE_E type; + union { + OSDC_RECT_ATTR_S rect; + OSDC_LINE_ATTR_S line; + OSDC_BITMAP_ATTR_S bitmap; + }; + OSDC_COLOR_S color; + int _max_y; + int _min_y; +} OSDC_DRAW_OBJ_S; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_COMM_OSDC_H__ */ diff --git a/freertos/cvitek/install/include/driver/rgn/cvi_osdc.h b/freertos/cvitek/install/include/driver/rgn/cvi_osdc.h new file mode 100644 index 000000000..b48cd0b88 --- /dev/null +++ b/freertos/cvitek/install/include/driver/rgn/cvi_osdc.h @@ -0,0 +1,56 @@ +#ifndef __CVI_OSDC_H__ +#define __CVI_OSDC_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include +#include + +uint32_t CVI_OSDC_EstCmprCanvasSize(OSDC_Canvas_Attr_S * canvas, OSDC_DRAW_OBJ_S * objs, uint32_t obj_num); + +int CVI_OSDC_DrawCmprCanvas(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *objs, uint32_t obj_num, + uint8_t *obuf, uint32_t buf_size, uint32_t *p_osize); + +void CVI_OSDC_SetRectObjAttr(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *obj, uint32_t color_code, + int pt_x, int pt_y, int width, int height, bool is_filled, int thickness); + +void CVI_OSDC_SetBitmapObjAttr(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *obj_attr, uint8_t *buf, + int pt_x, int pt_y, int width, int height, bool is_cmpr); + +void CVI_OSDC_SetLineObjAttr(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *obj, uint32_t color_code, + int pt_x0, int pt_y0, int pt_x1, int pt_y1, int thickness); + +int CVI_OSDC_CmprBitmap(OSDC_Canvas_Attr_S *canvas, uint8_t *ibuf, uint8_t *obuf, int width, int height, + int buf_size, uint32_t *p_osize); + +extern uint32_t CVI_OSDC_est_cmpr_canvas_size(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *objs, uint32_t obj_num); + +extern int CVI_OSDC_draw_cmpr_canvas(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *objs, uint32_t obj_num, + uint8_t *obuf, uint32_t buf_size, uint32_t *p_osize); + +extern void CVI_OSDC_set_rect_obj_attr(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *obj, uint32_t color_code, + int pt_x, int pt_y, int width, int height, bool is_filled, int thickness); + +extern void CVI_OSDC_set_bitmap_obj_attr(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *obj_attr, uint8_t *buf, + int pt_x, int pt_y, int width, int height, bool is_cmpr); + +extern void CVI_OSDC_set_line_obj_attr(OSDC_Canvas_Attr_S *canvas, OSDC_DRAW_OBJ_S *obj, uint32_t color_code, + int pt_x0, int pt_y0, int pt_x1, int pt_y1, int thickness); + +extern int CVI_OSDC_cmpr_bitmap(OSDC_Canvas_Attr_S *canvas, uint8_t *ibuf, uint8_t *obuf, int width, int height, + int buf_size, uint32_t *p_osize); +#if (CMPR_CANVAS_DBG) +int CVI_OSDC_draw_canvas_raw_buffer(OSDC_Canvas_Attr_S *canvas, DRAW_OBJ *obj_vec, uint8_t *obuf); +int CVI_OSDC_draw_canvas_raw_buffer2(OSDC_Canvas_Attr_S *canvas, DRAW_OBJ *obj_vec, uint8_t *obuf); +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /*__CVI_OSDC_H__ */ diff --git a/freertos/cvitek/install/include/driver/rgn/osd_cmpr.h b/freertos/cvitek/install/include/driver/rgn/osd_cmpr.h new file mode 100644 index 000000000..b56d3b011 --- /dev/null +++ b/freertos/cvitek/install/include/driver/rgn/osd_cmpr.h @@ -0,0 +1,153 @@ +#ifndef __OSD_CMPR_H__ +#define __OSD_CMPR_H__ + +#include +#include +#include + +// DataType-free color field copy +#define CPY_C(in, out) \ + { \ + out.r = in.r; \ + out.g = in.g; \ + out.b = in.b; \ + out.a = in.a; \ + } + +#define HDR_SZ (8) + +typedef enum { + OSD_ARGB8888 = 0, + OSD_ARGB4444 = 4, + OSD_ARGB1555 = 5, + OSD_LUT8 = 8, + OSD_LUT4 = 10, + NUM_OF_FORMAT +} OSD_FORMAT; + +typedef struct { + int img_width; + int img_height; + bool palette_mode_en; + bool zeroize_by_alpha; + int rgb_trunc_bit; + int alpha_trunc_bit; + int run_len_bd; + int palette_idx_bd; + OSD_FORMAT osd_format; + bool hdr_en; +} OSDCmpr_Cfg; + +typedef struct { + uint8_t *stream; // stream buffer pointer + int bit_pos; // current pointer (in bit) + int buf_size; // in byte + int status; +} StreamBuffer; + +int clip(int data, int min, int max); +void init_stream(StreamBuffer *bs, const uint8_t *buf, int buf_size, + bool read_only); +void write_stream(StreamBuffer *bs, uint8_t *src, int bit_len); +void parse_stream(StreamBuffer *bs, uint8_t *dest, int bit_len, bool read_only); +void move_stream_ptr(StreamBuffer *bs, int bit_len); + +uint8_t get_bit_val(uint8_t *buf, int byte_idx, int bit_idx); + +typedef union { + struct { + uint8_t g; + uint8_t b; + uint8_t r; + uint8_t a; + }; + uint32_t code; +} RGBA; + +typedef union { + struct { + uint16_t g : 4; + uint16_t b : 4; + uint16_t r : 4; + uint16_t a : 4; + }; + uint16_t code; +} ARGB4444; + +typedef union { + struct { + uint16_t g : 5; + uint16_t b : 5; + uint16_t r : 5; + uint16_t a : 1; + }; + uint16_t code; +} ARGB1555; + +typedef union { + RGBA color; + int palette_idx; +} CODE; + +typedef enum { + Literal = 0, + Palette, + Literal_RL, + Palette_RL, + NUM_OF_MODE +} MODE_TYPE; + +typedef struct { + RGBA *color; + int num; +} PaletteRGBA; + +typedef struct { + int reg_image_width; + int reg_image_height; + bool reg_zeroize_by_alpha; + int reg_rgb_trunc_bit; + int reg_alpha_trunc_bit; + bool reg_palette_mode_en; + int reg_run_len_bd; + int reg_palette_idx_bd; + OSD_FORMAT reg_osd_format; + int pel_sz; + PaletteRGBA palette_cache; + int bs_buf_size; + uint8_t *bsbuf; // intermediate bitstream buffer +} OSDCmpr_Ctrl; + +// RGBA get_color(uint8_t *ptr, OSD_FORMAT format = OSD_ARGB8888); +// void set_color(uint8_t *ptr, RGBA color, OSD_FORMAT format = OSD_ARGB8888); +RGBA get_color(uint8_t *ptr, OSD_FORMAT format); +void set_color(uint8_t *ptr, RGBA color, OSD_FORMAT format); + +void osd_cmpr_frame_init(OSDCmpr_Ctrl *p_ctrl); +int osd_cmpr_enc_one_frame(uint8_t *ibuf, uint8_t *obs, OSDCmpr_Ctrl *p_ctrl); +void osd_cmpr_dec_one_frame(uint8_t *bsbuf, size_t bs_size, uint8_t *obuf, + OSDCmpr_Ctrl *p_ctrl); +void osd_cmpr_enc_header(uint8_t *hdrbuf, OSDCmpr_Ctrl *p_ctrl); +void osd_cmpr_dec_header(uint8_t *hdrbuf, OSDCmpr_Ctrl *p_ctrl); + +void osd_cmpr_setup(OSDCmpr_Ctrl *p_ctrl, OSDCmpr_Cfg *p_cfg); +void osd_cmpr_enc_const_pixel(RGBA cur_c, RGBA *last_c, int *rl_cnt, + MODE_TYPE *md, CODE *code, uint16_t *length, + bool is_force_new_run, uint16_t max_run_len, + OSDCmpr_Ctrl *p_ctrl, StreamBuffer *bitstream); +void osd_cmpr_enc_followed_run(RGBA cur_c, int *rl_cnt, MODE_TYPE *md, + CODE *code, uint16_t *length, uint16_t max_run_len, + OSDCmpr_Ctrl *p_ctrl, StreamBuffer *bitstream); + +size_t osd_cmpr_get_pixel_sz(OSD_FORMAT format); +size_t osd_cmpr_get_bs_buf_max_sz(int pel_num, int pel_sz); +size_t osd_cmpr_get_header_sz(void); + +void osd_cmpr_debug_frame_compare(OSDCmpr_Ctrl *p_ctrl, uint8_t *buf0, + uint8_t *buf1); + +void palette_cache_init(PaletteRGBA *cache, int cache_sz); +int palette_cache_lookup_color(PaletteRGBA *cache, RGBA color); +void palette_cache_lru_update(PaletteRGBA *cache, int index); +void palette_cache_push_color(PaletteRGBA *cache, RGBA color); +#endif /* __OSD_CMPR_H__ */ diff --git a/freertos/cvitek/install/include/driver/rtos_cmdqu/rtos_cmdqu.h b/freertos/cvitek/install/include/driver/rtos_cmdqu/rtos_cmdqu.h new file mode 100644 index 000000000..59369683b --- /dev/null +++ b/freertos/cvitek/install/include/driver/rtos_cmdqu/rtos_cmdqu.h @@ -0,0 +1,90 @@ +#ifndef __RTOS_COMMAND_QUEUE__ +#define __RTOS_COMMAND_QUEUE__ + +#ifdef __linux__ +#include +#endif + +#define NR_SYSTEM_CMD 20 +#define NR_RTOS_CMD 127 +#define NR_RTOS_IP IP_LIMIT + +enum IP_TYPE { + IP_ISP = 0, + IP_VCODEC, + IP_VIP, + IP_VI, + IP_RGN, + IP_AUDIO, + IP_SYSTEM, + IP_CAMERA, + IP_LIMIT, +}; + +enum SYS_CMD_ID { + SYS_CMD_INFO_TRANS = 0x50, + SYS_CMD_INFO_LINUX_INIT_DONE, + SYS_CMD_INFO_RTOS_INIT_DONE, + SYS_CMD_INFO_STOP_ISR, + SYS_CMD_INFO_STOP_ISR_DONE, + SYS_CMD_INFO_LINUX, + SYS_CMD_INFO_RTOS, + SYS_CMD_SYNC_TIME, + SYS_CMD_INFO_DUMP_MSG, + SYS_CMD_INFO_DUMP_EN, + SYS_CMD_INFO_DUMP_DIS, + SYS_CMD_INFO_DUMP_JPG, + SYS_CMD_INFO_TRACE_SNAPSHOT_START, + SYS_CMD_INFO_TRACE_SNAPSHOT_STOP, + SYS_CMD_INFO_TRACE_STREAM_START, + SYS_CMD_INFO_TRACE_STREAM_STOP, + SYS_CMD_INFO_LIMIT, +}; + +struct valid_t { + unsigned char linux_valid; + unsigned char rtos_valid; +} __attribute__((packed)); + +typedef union resv_t { + struct valid_t valid; + unsigned short mstime; // 0 : noblock, -1 : block infinite +} resv_t; + +typedef struct cmdqu_t cmdqu_t; +/* cmdqu size should be 8 bytes because of mailbox buffer size */ +struct cmdqu_t { + unsigned char ip_id; + unsigned char cmd_id : 7; + unsigned char block : 1; + union resv_t resv; + unsigned int param_ptr; +} __attribute__((packed)) __attribute__((aligned(0x8))); + +#ifdef __linux__ +/* keep those commands for ioctl system used */ +enum SYSTEM_CMD_TYPE { + CMDQU_SEND = 1, + CMDQU_REQUEST, + CMDQU_REQUEST_FREE, + CMDQU_SEND_WAIT, + CMDQU_SEND_WAKEUP, + CMDQU_SYSTEM_LIMIT = NR_SYSTEM_CMD, +}; + +#define RTOS_CMDQU_DEV_NAME "cvi-rtos-cmdqu" +#define RTOS_CMDQU_SEND _IOW('r', CMDQU_SEND, unsigned long) +#define RTOS_CMDQU_REQUEST _IOW('r', CMDQU_REQUEST, unsigned long) +#define RTOS_CMDQU_REQUEST_FREE _IOW('r', CMDQU_REQUEST_FREE, unsigned long) +#define RTOS_CMDQU_SEND_WAIT _IOW('r', CMDQU_SEND_WAIT, unsigned long) +#define RTOS_CMDQU_SEND_WAKEUP _IOW('r', CMDQU_SEND_WAKEUP, unsigned long) + +int rtos_cmdqu_send(cmdqu_t *cmdq); +int rtos_cmdqu_send_wait(cmdqu_t *cmdq, int wait_cmd_id); +int request_rtos_irq(unsigned char ip_id, void *handler, const char *devname, void *dev_id); +int free_rtos_irq(unsigned char ip_id); + +#endif // end of __linux__ + +#endif // end of __RTOS_COMMAND_QUEUE__ + diff --git a/freertos/cvitek/install/include/driver/sensor/gain_table.h b/freertos/cvitek/install/include/driver/sensor/gain_table.h new file mode 100644 index 000000000..2b8384767 --- /dev/null +++ b/freertos/cvitek/install/include/driver/sensor/gain_table.h @@ -0,0 +1,6 @@ +#ifndef __SENSOR_GAIN_TABLE_H__ +#define __SENSOR_GAIN_TABLE_H__ + +extern const uint32_t imx327_gain_table[]; + +#endif // __SENSOR_GAIN_TABLE_H__ diff --git a/freertos/cvitek/install/include/driver/sensor/sensor.h b/freertos/cvitek/install/include/driver/sensor/sensor.h new file mode 100644 index 000000000..241ef5fef --- /dev/null +++ b/freertos/cvitek/install/include/driver/sensor/sensor.h @@ -0,0 +1,180 @@ +#ifndef __CV_IMAGE_SENSOR_H__ +#define __CV_IMAGE_SENSOR_H__ + +#include +#include "cvi_comm_video.h" +#include "cvi_common.h" +#include "cvi_comm_vi.h" +#include "cvi_comm_isp.h" +#include "cvi_sns_ctrl.h" +#include "cif_uapi.h" +#include "gpio.h" +#include "sample_comm.h" + +#define TPU_SRAM_BASE_ADDR (0x0C020000) +#define TPU_SRAM_BASE_SIZE (0x00010000) +#define RTC_SRAM_BASE_ADDR (0x05200000) +#define RTC_SRAM_BASE_SIZE (24 << 10) // 24KB + +//#define SENSOR_USE_I2C_DMA 0 +#define CHECK_SENSOR_ID 1 +#define SEN_CFG_ADDR (RTC_SRAM_BASE_SIZE - 1024) +#define SEN_CFG_INI_ADDR (RTC_SRAM_BASE_SIZE - 1024) + +#define SYSDMA_LLP_ADDR (RTC_SRAM_BASE_SIZE - 1024) +#define SEN_ITB_START_ADDR (RTC_SRAM_BASE_SIZE - 1024) + +#define SEN_MAX_LANE_NUM (MIPI_LANE_NUM + 1) // 1C4D + +#define DIV_0_TO_1(a) ((0 == (a)) ? 1 : (a)) +#define DIV_0_TO_1_FLOAT(a) ((((a) < 1E-10) && ((a) > -1E-10)) ? 1 : (a)) + +/* Sensor resolutions */ +#define SENSOR_RES_IS_2160P(w, h) ((w) <= 3840 && (h) <= 2160) +#define SENSOR_RES_IS_1440P(w, h) ((w) <= 2560 && (h) <= 1440) +#define SENSOR_RES_IS_1080P(w, h) ((w) <= 1920 && (h) <= 1080) +#define SENSOR_RES_IS_720P(w, h) ((w) <= 1280 && (h) <= 720) + +#define delay_ms(a) mdelay(a) + +enum HDR_EXPOSURE_FRAME_ID { + SHORT_EXP_ID, + LONG_EXP_ID, +}; + +enum IMAGE_FORMAT_E { + BAYER_RAW12 = 0, + BAYER_RAW10, + BAYER_RAW8, + BAYER_FORMAT_NUM, + YUV422_8B = BAYER_FORMAT_NUM, + YUV422_10B, +}; + +/* + * To indicate the 1st two pixel in the bayer_raw. + */ +enum DPHY_LANE_NUM { + DPHY_1_DLANE = 0, + DPHY_2_DLANE = 1, + DPHY_4_DLANE = 3, + DPHY_8_DLANE = 7 +}; + +enum HDR_MODE_E { + HDR_MODE_VC, // CSI + HDR_MODE_ID, // CSI + HDR_MODE_DT, // CSI + HDR_MODE_DOL, // CSI + HDR_MODE_PAT1, // SLVDS + HDR_MODE_PAT2, // SLVDS + HDR_MODE_LINEAR = 0xF +}; + +enum ISP_BAYER_TYPE { + ISP_BAYER_TYPE_BG = 0, + ISP_BAYER_TYPE_GB, + ISP_BAYER_TYPE_GR, + ISP_BAYER_TYPE_RG, +// ISP_BAYER_TYPE_MAX, +}; + +typedef struct _ISP_HDR_SIZE_S { + RECT_S stWndRect; + SIZE_S stSnsSize; + // SIZE_S stMaxSize; +} ISP_HDR_SIZE_S; + +typedef struct _SIMPLE_AE_CTRL_S { + uint32_t seLuma; + uint32_t seExp; + uint32_t seGain; + uint32_t leLuma; + uint32_t leExp; + uint32_t leGain; + uint16_t rWb_Gain; + uint16_t bWb_Gain; +} SIMPLE_AE_CTRL_S; + +/* define of Linux +typedef struct _SAMPLE_SENSOR_INFO_S { + SAMPLE_SNS_TYPE_E enSnsType; + CVI_S32 s32SnsId; + CVI_S32 s32BusId; + CVI_S32 s32SnsI2cAddr; + combo_dev_t MipiDev; + CVI_S16 as16LaneId[5]; + CVI_S8 as8PNSwap[5]; + CVI_U8 u8HwSync; + SAMPLE_SENSOR_MCLK_ATTR_S stMclkAttr; + CVI_U8 u8Orien; // 0: normal, 1: mirror, 2: flip, 3: mirror and flip. +} SAMPLE_SENSOR_INFO_S; +*/ +typedef struct _SENSOR_CFG_INI_HEADER { + uint32_t magic_num; // date for check + uint16_t dev_num; // totla sensor number + uint16_t cfg_ofs; // sizeof SENSOR_USR_CFG +} __attribute__((packed)) __attribute__((aligned(0x8))) SENSOR_CFG_INI_HEADER; + +typedef struct _SENSOR_USR_CFG_INI { + char name[64]; // sensor name + + uint8_t devno; // support 0:sensor0, 1:sensor1, 2: sensor2 + uint8_t mclk_en; // enable of mclk (0: driver default, 1: mclk0 enable, 2:maclk1 enable) + uint8_t mclk; // mclk clock + // i2c info + int8_t slave_id; // slave id (slave addr[7:1]) 0: use default + int8_t bus_id; // i2c bus id + // lane info + uint8_t mipi_dev; // MIPI phy number, + uint8_t hs_settle; // 0: use default + int8_t lane_id[SEN_MAX_LANE_NUM]; // {clk, d0 ,d1, d2, d3} + int8_t pn_swap[SEN_MAX_LANE_NUM]; // {clk, d0 ,d1, d2, d3} + uint8_t u8HwSync; + uint8_t u8Orien; // 0: normal, 1: mirror, 2: flip, 3: mirror and flip. + // reset-pin info + uint32_t snsr_reset; // sensor reset pin + uint8_t reset_act; // sensor reset low/high act fill by sensor driver + uint32_t reset_delay; // delay us after reset +} __attribute__((packed)) __attribute__((aligned(0x8))) SENSOR_USR_CFG; + +typedef struct _SENSOR_INFO { + SENSOR_CFG_INI_HEADER *header; + SENSOR_USR_CFG *cfg; // load from flash + ISP_SNS_OBJ_S *pstSnsObj; + + enum input_mode_e vi_mode; // fill by sensor name + enum IMAGE_FORMAT_E format; // fill by sensor driver + enum ISP_BAYER_TYPE bayer_type; // fill by sensor driver + enum HDR_MODE_E hdr_mode; // fill by sensor name + VI_WORK_MODE_E chn; // fill by sensor name + enum DPHY_LANE_NUM lane_num; // fill by sensor name + + uint32_t width; // output width fill by sensor name + uint32_t height; // output height fill by sensor name + + uint8_t init_ok; // sensor init success +} SENSOR_INFO; + +/* + * Support Sensor Objects + */ +// extern ISP_SNS_OBJ_S stSnsImx327_Obj; + +extern const char *snsr_type_name[SAMPLE_SNS_TYPE_BUTT]; + +/* + * Sensor I2C API + */ +int sensor_i2c_init(VI_PIPE ViPipe, uint8_t u8I2cDev, uint16_t speed, + uint8_t slave_addr, uint8_t alen, uint8_t dlen); +int sensor_i2c_exit(VI_PIPE ViPipe); +int sensor_read_register(VI_PIPE ViPipe, int addr); +int sensor_write_register(VI_PIPE ViPipe, int addr, int data); + +/* + * Sensor API + */ +extern int32_t cmos_set_sns_regs_info(VI_PIPE ViPipe, ISP_SNS_SYNC_INFO_S *pstSnsSyncInfo); + +#endif //__CV_IMAGE_SENSOR_H__ diff --git a/freertos/cvitek/install/include/driver/spinlock/cvi_spinlock.h b/freertos/cvitek/install/include/driver/spinlock/cvi_spinlock.h new file mode 100644 index 000000000..3e671cf0b --- /dev/null +++ b/freertos/cvitek/install/include/driver/spinlock/cvi_spinlock.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __DRV_SPINLOCK_H__ +#define __DRV_SPINLOCK_H__ + +enum SPINLOCK_FIELD { + SPIN_UART, + SPIN_LINUX_RTOS = 4, // this spinlock field is used for linux & rtos + SPIN_MBOX = SPIN_LINUX_RTOS, + SPIN_MAX = 7, +}; + +typedef struct hw_raw_spinlock { + unsigned short locks; + unsigned short hw_field; +} hw_raw_spinlock_t; + +#define MAILBOX_LOCK_SUCCESS 1 +#define MAILBOX_LOCK_FAILED (-1) + +#define __CVI_ARCH_SPIN_LOCK_UNLOCKED { 0 } + +#define __CVI_RAW_SPIN_LOCK_INITIALIZER(spinlock_hw_field) \ + { \ + .locks = __CVI_ARCH_SPIN_LOCK_UNLOCKED, \ + .hw_field = spinlock_hw_field, \ + } + +#define DEFINE_CVI_SPINLOCK(x, y) hw_raw_spinlock_t x = __CVI_RAW_SPIN_LOCK_INITIALIZER(y) + +int _hw_raw_spin_lock_irqsave(hw_raw_spinlock_t *lock); +void _hw_raw_spin_unlock_irqrestore(hw_raw_spinlock_t *lock, int flag); + +#define drv_spin_lock_irqsave(lock, flags) \ + { flags = _hw_raw_spin_lock_irqsave(lock); } + +#define drv_spin_unlock_irqrestore(lock, flags) \ + _hw_raw_spin_unlock_irqrestore(lock, flags) + +void spinlock_base(unsigned long mb_base); +void cvi_spinlock_init(void); + +#endif // end of __DRV_SPINLOCK_H__ + diff --git a/freertos/cvitek/install/include/driver/uart/dump_uart.h b/freertos/cvitek/install/include/driver/uart/dump_uart.h new file mode 100644 index 000000000..ac31c5021 --- /dev/null +++ b/freertos/cvitek/install/include/driver/uart/dump_uart.h @@ -0,0 +1,23 @@ +#ifndef __DUMP_UART_H__ +#define __DUMP_UART_H__ + +#define DUMP_PRINT_DEFAULT_SIZE 0x1000 + +/* this structure should be modified both freertos & osdrv side */ +struct dump_uart_s { + uint64_t dump_uart_ptr; + unsigned int dump_uart_max_size; + unsigned int dump_uart_pos; + unsigned char dump_uart_enable; + unsigned char dump_uart_overflow; +} __attribute__((packed)); + +#ifndef __linux__ +/* used for freertos */ +struct dump_uart_s *dump_uart_init(void); +struct dump_uart_s *dump_uart_msg(void); +void dump_uart_enable(void); +void dump_uart_disable(void); +#endif +#endif // end of __DUMP_UART_H__ + diff --git a/freertos/cvitek/install/include/driver/uart/uart.h b/freertos/cvitek/install/include/driver/uart/uart.h new file mode 100644 index 000000000..e309dd7d9 --- /dev/null +++ b/freertos/cvitek/install/include/driver/uart/uart.h @@ -0,0 +1,14 @@ +#ifndef _UART_H_ +#define _UART_H_ +#ifdef __riscv +#include +#else +#include "linux/types.h" +#endif +void uart_init(void); +int uart_getc(void); +int uart_tstc(void); +uint8_t uart_putc(uint8_t ch); +void uart_puts(char *str); +int uart_put_buff(char *buf); +#endif diff --git a/freertos/cvitek/install/include/driver/vi/cvi_vi.h b/freertos/cvitek/install/include/driver/vi/cvi_vi.h new file mode 100644 index 000000000..729c48c4f --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/cvi_vi.h @@ -0,0 +1,29 @@ +#ifndef __CVI_VI_H__ +#define __CVI_VI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Standard includes. */ +#include + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +#include + +CVI_S32 CVI_VI_SetDevAttr(VI_DEV ViDev, const VI_DEV_ATTR_S *pstDevAttr); +CVI_S32 CVI_VI_Start(CVI_U32 addr, CVI_U32 size); +CVI_S32 CVI_VI_Stop(CVI_VOID); +CVI_VOID CVI_VI_UT_MAIN(CVI_U32 addr, CVI_U32 size); +QueueHandle_t CVI_VI_GetQueHandle(CVI_VOID); +CVI_VOID CVI_VI_QBUF(CVI_VOID); + +#ifdef __cplusplus +} +#endif + +#endif /* __CVI_VI_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/cvi_vi_ctx.h b/freertos/cvitek/install/include/driver/vi/cvi_vi_ctx.h new file mode 100644 index 000000000..747f98e9a --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/cvi_vi_ctx.h @@ -0,0 +1,36 @@ +#ifndef __CVI_VI_CTX_H__ +#define __CVI_VI_CTX_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +struct cvi_vi_ctx { + CVI_U8 total_chn_num; + CVI_U8 total_dev_num; + CVI_BOOL is_enable[VI_MAX_CHN_NUM]; + CVI_BOOL isDevEnable[VI_MAX_DEV_NUM]; + CVI_BOOL isTile; + + // dev + VI_DEV_ATTR_S devAttr[VI_MAX_DEV_NUM]; + + // chn + VI_CHN_STATUS_S chnStatus[VI_MAX_CHN_NUM]; + + CVI_U32 blk_size[VI_MAX_CHN_NUM]; + CVI_U32 timeout_cnt; + CVI_U8 bypass_frm[VI_MAX_CHN_NUM]; + + CVI_U32 vi_mem_base; + CVI_U32 vi_mem_size; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* __CVI_VI_CTX_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/isp_reg.h b/freertos/cvitek/install/include/driver/vi/isp_reg.h new file mode 100644 index 000000000..bd912d232 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/isp_reg.h @@ -0,0 +1,304 @@ +#ifndef _ISP_REG_H_ +#define _ISP_REG_H_ + +#include "vi_reg_fields.h" +#include "vi_reg_blocks.h" + +#define FPGA_TEST + +/* ISP BLOCK ADDR OFFSET DEFINE */ +#define ISP_BLK_BA_PRE_RAW_FE0 (0x00000000) +#define ISP_BLK_BA_CSIBDG0 (0x00000800) +#define ISP_BLK_BA_DMA_CTL6 (0x00000B00) +#define ISP_BLK_BA_DMA_CTL7 (0x00000C00) +#define ISP_BLK_BA_DMA_CTL8 (0x00000D00) +#define ISP_BLK_BA_DMA_CTL9 (0x00000E00) +#define ISP_BLK_BA_BLC0 (0x00001000) +#define ISP_BLK_BA_BLC1 (0x00001800) +#define ISP_BLK_BA_RGBMAP0 (0x00002000) +#define ISP_BLK_BA_WBG2 (0x00002100) +#define ISP_BLK_BA_DMA_CTL10 (0x00002200) +#define ISP_BLK_BA_RGBMAP1 (0x00002300) +#define ISP_BLK_BA_WBG3 (0x00002400) +#define ISP_BLK_BA_DMA_CTL11 (0x00002500) + +#define ISP_BLK_BA_PRE_RAW_FE1 (0x00008000) +#define ISP_BLK_BA_CSIBDG1 (0x00008800) +#define ISP_BLK_BA_DMA_CTL12 (0x00008B00) +#define ISP_BLK_BA_DMA_CTL13 (0x00008C00) +#define ISP_BLK_BA_DMA_CTL14 (0x00008D00) +#define ISP_BLK_BA_DMA_CTL15 (0x00008E00) +#define ISP_BLK_BA_BLC2 (0x00009000) +#define ISP_BLK_BA_BLC3 (0x00009800) +#define ISP_BLK_BA_RGBMAP2 (0x0000A000) +#define ISP_BLK_BA_WBG4 (0x0000A100) +#define ISP_BLK_BA_DMA_CTL16 (0x0000A200) +#define ISP_BLK_BA_RGBMAP3 (0x0000A300) +#define ISP_BLK_BA_WBG5 (0x0000A400) +#define ISP_BLK_BA_DMA_CTL17 (0x0000A500) + +#define ISP_BLK_BA_PRE_RAW_FE2 (0x00010000) +#define ISP_BLK_BA_CSIBDG2 (0x00010800) +#define ISP_BLK_BA_DMA_CTL18 (0x00010B00) +#define ISP_BLK_BA_DMA_CTL19 (0x00010C00) +#define ISP_BLK_BA_BLC4 (0x00011000) +#define ISP_BLK_BA_RGBMAP4 (0x00012000) +#define ISP_BLK_BA_WBG6 (0x00012100) +#define ISP_BLK_BA_DMA_CTL20 (0x00012200) + +#define ISP_BLK_BA_PRE_RAW_BE (0x00018000) +#define ISP_BLK_BA_CROP0 (0x00018800) +#define ISP_BLK_BA_CROP1 (0x00019000) +#define ISP_BLK_BA_BLC5 (0x00019800) +#define ISP_BLK_BA_BLC6 (0x0001A000) +#define ISP_BLK_BA_AF (0x0001A800) +#define ISP_BLK_BA_DMA_CTL21 (0x0001AA00) +#define ISP_BLK_BA_DPC0 (0x0001B000) +#define ISP_BLK_BA_DPC1 (0x0001B100) +#define ISP_BLK_BA_DMA_CTL22 (0x0001B800) +#define ISP_BLK_BA_DMA_CTL23 (0x0001B880) +#define ISP_BLK_BA_PRE_WDMA (0x0001B900) +#define ISP_BLK_BA_PCHK0 (0x0001C000) +#define ISP_BLK_BA_PCHK1 (0x0001C800) + +#define ISP_BLK_BA_RAWTOP (0x00030000) +#define ISP_BLK_BA_CFA (0x00031000) +#define ISP_BLK_BA_LSC (0x00032000) +#define ISP_BLK_BA_DMA_CTL24 (0x00032100) +#define ISP_BLK_BA_GMS (0x00033000) +#define ISP_BLK_BA_DMA_CTL25 (0x00033100) +#define ISP_BLK_BA_AEHIST0 (0x00034000) +#define ISP_BLK_BA_DMA_CTL26 (0x00034400) +#define ISP_BLK_BA_AEHIST1 (0x00035000) +#define ISP_BLK_BA_DMA_CTL27 (0x00035400) +#define ISP_BLK_BA_DMA_CTL28 (0x00036000) +#define ISP_BLK_BA_DMA_CTL29 (0x00036080) +#define ISP_BLK_BA_RAW_RDMA (0x00036100) +#define ISP_BLK_BA_BNR (0x0003C000) +#define ISP_BLK_BA_CROP2 (0x0003D000) +#define ISP_BLK_BA_CROP3 (0x0003E000) +#define ISP_BLK_BA_LMAP0 (0x0003F000) +#define ISP_BLK_BA_DMA_CTL30 (0x0003F100) +#define ISP_BLK_BA_LMAP1 (0x0003F200) +#define ISP_BLK_BA_DMA_CTL31 (0x0003F300) +#define ISP_BLK_BA_WBG0 (0x00040000) +#define ISP_BLK_BA_WBG1 (0x00041000) +#define ISP_BLK_BA_PCHK2 (0x00042000) +#define ISP_BLK_BA_PCHK3 (0x00043000) +#define ISP_BLK_BA_LCAC (0x00044000) +#define ISP_BLK_BA_RGBCAC (0x00045000) + +#define ISP_BLK_BA_RGBTOP (0x00050000) +#define ISP_BLK_BA_CCM0 (0x00052000) +#define ISP_BLK_BA_CCM1 (0x00052100) +#define ISP_BLK_BA_RGBGAMMA (0x00052200) +#define ISP_BLK_BA_YGAMMA (0x00052300) +#define ISP_BLK_BA_MMAP (0x00053000) +#define ISP_BLK_BA_DMA_CTL32 (0x00053200) +#define ISP_BLK_BA_DMA_CTL33 (0x00053300) +#define ISP_BLK_BA_DMA_CTL34 (0x00053400) +#define ISP_BLK_BA_DMA_CTL35 (0x00053500) +#define ISP_BLK_BA_DMA_CTL36 (0x00053600) +#define ISP_BLK_BA_DMA_CTL37 (0x00053700) +#define ISP_BLK_BA_CLUT (0x00054000) +#define ISP_BLK_BA_DHZ (0x00055000) +#define ISP_BLK_BA_CSC (0x00056000) +#define ISP_BLK_BA_RGBDITHER (0x00057000) +#define ISP_BLK_BA_PCHK4 (0x00059000) +#define ISP_BLK_BA_PCHK5 (0x0005A000) +#define ISP_BLK_BA_HIST_V (0x0005C000) +#define ISP_BLK_BA_DMA_CTL38 (0x0005C100) +#define ISP_BLK_BA_HDRFUSION (0x0005D000) +#define ISP_BLK_BA_HDRLTM (0x0005E000) +#define ISP_BLK_BA_DMA_CTL39 (0x0005E100) +#define ISP_BLK_BA_DMA_CTL40 (0x0005E200) + +#define ISP_BLK_BA_YUVTOP (0x00060000) +#define ISP_BLK_BA_TNR (0x00061000) +#define ISP_BLK_BA_DMA_CTL41 (0x00061800) +#define ISP_BLK_BA_DMA_CTL42 (0x00061900) +#define ISP_BLK_BA_FBCE (0x00061A00) +#define ISP_BLK_BA_DMA_CTL43 (0x00061B00) +#define ISP_BLK_BA_DMA_CTL44 (0x00061C00) +#define ISP_BLK_BA_FBCD (0x00061D00) +#define ISP_BLK_BA_YUVDITHER (0x00061E00) +#define ISP_BLK_BA_CA (0x00062000) +#define ISP_BLK_BA_CA_LITE (0x00063000) +#define ISP_BLK_BA_YNR (0x00064000) +#define ISP_BLK_BA_CNR (0x00065000) +#define ISP_BLK_BA_EE (0x00066000) +#define ISP_BLK_BA_YCURVE (0x00067000) +#define ISP_BLK_BA_DCI (0x00068000) +#define ISP_BLK_BA_DMA_CTL45 (0x00068100) +#define ISP_BLK_BA_DCI_GAMMA (0x00068200) +#define ISP_BLK_BA_CROP4 (0x00069000) +#define ISP_BLK_BA_DMA_CTL46 (0x00069100) +#define ISP_BLK_BA_CROP5 (0x0006A000) +#define ISP_BLK_BA_DMA_CTL47 (0x0006A100) +#define ISP_BLK_BA_LDCI (0x0006B000) +#define ISP_BLK_BA_DMA_CTL48 (0x0006B300) +#define ISP_BLK_BA_DMA_CTL49 (0x0006B400) +#define ISP_BLK_BA_PRE_EE (0x0006C000) +#define ISP_BLK_BA_PCHK6 (0x0006D000) +#define ISP_BLK_BA_PCHK7 (0x0006E000) + +#define ISP_BLK_BA_ISPTOP (0x00070000) +#define ISP_BLK_BA_WDMA_CORE0 (0x00072000) +#define ISP_BLK_BA_RDMA_CORE (0x00074000) +#define ISP_BLK_BA_CSIBDG_LITE (0x00076000) +#define ISP_BLK_BA_DMA_CTL0 (0x00076200) +#define ISP_BLK_BA_DMA_CTL1 (0x00076300) +#define ISP_BLK_BA_DMA_CTL2 (0x00076400) +#define ISP_BLK_BA_DMA_CTL3 (0x00076500) +#define ISP_BLK_BA_WDMA_CORE1 (0x00078000) +#define ISP_BLK_BA_PRE_RAW_VI_SEL (0x0007F400) +#define ISP_BLK_BA_DMA_CTL4 (0x0007F500) +#define ISP_BLK_BA_DMA_CTL5 (0x0007F600) +#define ISP_BLK_BA_CMDQ (0x0007FC00) + +enum ISP_BLK_ID_T { + ISP_BLK_ID_PRE_RAW_FE0, + ISP_BLK_ID_CSIBDG0, + ISP_BLK_ID_DMA_CTL6, + ISP_BLK_ID_DMA_CTL7, + ISP_BLK_ID_DMA_CTL8, + ISP_BLK_ID_DMA_CTL9, + ISP_BLK_ID_BLC0, + ISP_BLK_ID_BLC1, + ISP_BLK_ID_RGBMAP0, + ISP_BLK_ID_WBG2, + ISP_BLK_ID_DMA_CTL10, //10 + ISP_BLK_ID_RGBMAP1, + ISP_BLK_ID_WBG3, + ISP_BLK_ID_DMA_CTL11, //13 + ISP_BLK_ID_PRE_RAW_FE1, + ISP_BLK_ID_CSIBDG1, + ISP_BLK_ID_DMA_CTL12, + ISP_BLK_ID_DMA_CTL13, + ISP_BLK_ID_DMA_CTL14, + ISP_BLK_ID_DMA_CTL15, + ISP_BLK_ID_BLC2, + ISP_BLK_ID_BLC3, + ISP_BLK_ID_RGBMAP2, + ISP_BLK_ID_WBG4, + ISP_BLK_ID_DMA_CTL16, + ISP_BLK_ID_RGBMAP3, + ISP_BLK_ID_WBG5, + ISP_BLK_ID_DMA_CTL17, + ISP_BLK_ID_PRE_RAW_FE2, + ISP_BLK_ID_CSIBDG2, + ISP_BLK_ID_DMA_CTL18, + ISP_BLK_ID_DMA_CTL19, + ISP_BLK_ID_BLC4, + ISP_BLK_ID_RGBMAP4, + ISP_BLK_ID_WBG6, + ISP_BLK_ID_DMA_CTL20, + ISP_BLK_ID_PRE_RAW_BE, + ISP_BLK_ID_CROP0, + ISP_BLK_ID_CROP1, + ISP_BLK_ID_BLC5, + ISP_BLK_ID_BLC6, + ISP_BLK_ID_AF, + ISP_BLK_ID_DMA_CTL21, + ISP_BLK_ID_DPC0, + ISP_BLK_ID_DPC1, + ISP_BLK_ID_DMA_CTL22, //45 + ISP_BLK_ID_DMA_CTL23, //46 + ISP_BLK_ID_PRE_WDMA, + ISP_BLK_ID_PCHK0, + ISP_BLK_ID_PCHK1, + ISP_BLK_ID_RAWTOP, + ISP_BLK_ID_CFA, + ISP_BLK_ID_LSC, + ISP_BLK_ID_DMA_CTL24, //53 + ISP_BLK_ID_GMS, + ISP_BLK_ID_DMA_CTL25, //55 + ISP_BLK_ID_AEHIST0, + ISP_BLK_ID_DMA_CTL26, //57 + ISP_BLK_ID_AEHIST1, + ISP_BLK_ID_DMA_CTL27, //59 + ISP_BLK_ID_DMA_CTL28, + ISP_BLK_ID_DMA_CTL29, + ISP_BLK_ID_RAW_RDMA, + ISP_BLK_ID_BNR, + ISP_BLK_ID_CROP2, + ISP_BLK_ID_CROP3, + ISP_BLK_ID_LMAP0, + ISP_BLK_ID_DMA_CTL30, //67 + ISP_BLK_ID_LMAP1, + ISP_BLK_ID_DMA_CTL31, + ISP_BLK_ID_WBG0, + ISP_BLK_ID_WBG1, + ISP_BLK_ID_PCHK2, + ISP_BLK_ID_PCHK3, + ISP_BLK_ID_LCAC, + ISP_BLK_ID_RGBCAC, + ISP_BLK_ID_RGBTOP, + ISP_BLK_ID_CCM0, + ISP_BLK_ID_CCM1, + ISP_BLK_ID_RGBGAMMA, + ISP_BLK_ID_YGAMMA, + ISP_BLK_ID_MMAP, + ISP_BLK_ID_DMA_CTL32, + ISP_BLK_ID_DMA_CTL33, + ISP_BLK_ID_DMA_CTL34, + ISP_BLK_ID_DMA_CTL35, + ISP_BLK_ID_DMA_CTL36, //86 + ISP_BLK_ID_DMA_CTL37, + ISP_BLK_ID_CLUT, + ISP_BLK_ID_DHZ, + ISP_BLK_ID_CSC, + ISP_BLK_ID_RGBDITHER, + ISP_BLK_ID_PCHK4, + ISP_BLK_ID_PCHK5, + ISP_BLK_ID_HIST_V, + ISP_BLK_ID_DMA_CTL38, //95 + ISP_BLK_ID_HDRFUSION, + ISP_BLK_ID_HDRLTM, + ISP_BLK_ID_DMA_CTL39, + ISP_BLK_ID_DMA_CTL40, + ISP_BLK_ID_YUVTOP, + ISP_BLK_ID_TNR, + ISP_BLK_ID_DMA_CTL41, //102 + ISP_BLK_ID_DMA_CTL42, + ISP_BLK_ID_FBCE, + ISP_BLK_ID_DMA_CTL43, //105 + ISP_BLK_ID_DMA_CTL44, + ISP_BLK_ID_FBCD, + ISP_BLK_ID_YUVDITHER, + ISP_BLK_ID_CA, + ISP_BLK_ID_CA_LITE, + ISP_BLK_ID_YNR, + ISP_BLK_ID_CNR, + ISP_BLK_ID_EE, + ISP_BLK_ID_YCURVE, + ISP_BLK_ID_DCI, + ISP_BLK_ID_DMA_CTL45, //116 + ISP_BLK_ID_DCI_GAMMA, + ISP_BLK_ID_CROP4, + ISP_BLK_ID_DMA_CTL46, + ISP_BLK_ID_CROP5, + ISP_BLK_ID_DMA_CTL47, + ISP_BLK_ID_LDCI, + ISP_BLK_ID_DMA_CTL48, + ISP_BLK_ID_DMA_CTL49, + ISP_BLK_ID_PRE_EE, + ISP_BLK_ID_PCHK6, + ISP_BLK_ID_PCHK7, + ISP_BLK_ID_ISPTOP, + ISP_BLK_ID_WDMA_CORE0, + ISP_BLK_ID_RDMA_CORE, + ISP_BLK_ID_CSIBDG_LITE, + ISP_BLK_ID_DMA_CTL0, + ISP_BLK_ID_DMA_CTL1, + ISP_BLK_ID_DMA_CTL2, + ISP_BLK_ID_DMA_CTL3, + ISP_BLK_ID_WDMA_CORE1, + ISP_BLK_ID_PRE_RAW_VI_SEL, + ISP_BLK_ID_DMA_CTL4, + ISP_BLK_ID_DMA_CTL5, + ISP_BLK_ID_CMDQ, + ISP_BLK_ID_MAX +}; + +#endif //_ISP_REG_H_ diff --git a/freertos/cvitek/install/include/driver/vi/vi.h b/freertos/cvitek/install/include/driver/vi/vi.h new file mode 100644 index 000000000..b4628efa0 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi.h @@ -0,0 +1,134 @@ +#ifndef __VI_H__ +#define __VI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include +#include + + +#define OFFLINE_RAW_BUF_NUM 2 +#define OFFLINE_PRE_BE_BUF_NUM 2 +#define OFFLINE_YUV_BUF_NUM 2 +#define MAX_RGBMAP_BUF_NUM 3 + +enum cvi_isp_postraw_state { + ISP_POSTRAW_IDLE, + ISP_POSTRAW_RUNNING, +}; + +enum cvi_isp_pre_be_state { + ISP_PRE_BE_IDLE, + ISP_PRE_BE_RUNNING, +}; + +enum cvi_isp_preraw_state { + ISP_PRERAW_IDLE, + ISP_PRERAW_RUNNING, +}; + +struct vi_plane { + __u64 addr; +}; + +/* + * @index: + * @length: length of planes + * @planes: to describe buf + * @reserved + */ +struct vi_buffer { + __u32 index; + __u32 length; + struct vi_plane planes[3]; + __u32 reserved; +}; + +/* struct mempool + * @base: the address of the mempool + * @size: the size of the mempool + * @byteused: the number of bytes used + */ +struct _mempool { + uint64_t base; + uint32_t size; + uint32_t byteused; +} isp_mempool; + +struct _membuf { + uint64_t bayer_le[OFFLINE_RAW_BUF_NUM]; + uint64_t bayer_se[OFFLINE_RAW_BUF_NUM]; + uint64_t prebe_le[OFFLINE_PRE_BE_BUF_NUM]; + uint64_t prebe_se[OFFLINE_PRE_BE_BUF_NUM]; + uint64_t yuv_yuyv[ISP_CHN_MAX][2];//yuv sensor is yuyv format + uint64_t manr; + uint64_t rgbmap_le[MAX_RGBMAP_BUF_NUM]; + uint64_t rgbmap_se[MAX_RGBMAP_BUF_NUM]; + uint64_t lmap_le; + uint64_t lmap_se; + uint64_t lsc; + uint64_t tdnr[4];//0 for UV, 1 for Y, 2 for uv fbc double buffer, 3 for y fbc double buffer + uint64_t ldci; + //struct cvi_vip_isp_fswdr_report *fswdr_rpt; + + struct cvi_isp_sts_mem sts_mem[2]; + uint8_t pre_fe_sts_busy_idx; + uint8_t pre_be_sts_busy_idx; + uint8_t post_sts_busy_idx; + + //spinlock_t pre_fe_sts_lock; + //uint8_t pre_fe_sts_in_use; + //spinlock_t pre_be_sts_lock; + //uint8_t pre_be_sts_in_use; + //spinlock_t post_sts_lock; + //uint8_t post_sts_in_use; +} isp_bufpool[ISP_PRERAW_MAX] = {0}; + +static u8 RGBMAP_BUF_IDX = 2; + +/* viproc control for sensor numbers */ +static int viproc_en[2] = {1, 0}; + +/* control internal patgen + * + * 1: enable + * 0: disable + */ +static int csi_patgen_en[ISP_PRERAW_MAX] = {0, 0}; + +/* runtime tuning control + * ctrl: + * 0: all ch stop update. + * 1: stop after apply ch1 setting + * 2: stop after apply ch2 setting + */ +int tuning_dis[4] = {0, 0, 0, 0}; //ctrl, fe, be, post + +/* Runtime to enable/disable isp_top_clk + * Ctrl: + * 0: Disable isp_top_clk dynamic contorl + * 1: Enable isp_top_clk dynamic control + */ +int clk_dynamic_en; + +//void _pre_hw_enque( +// struct cvi_vi_dev *vdev, +// const enum cvi_isp_raw raw_num, +// const u8 chn_num); +//static void _vi_sw_init(struct cvi_vi_dev *vdev); +//static int _vi_clk_ctrl(struct cvi_vi_dev *vdev, u8 enable); +//void _postraw_outbuf_enq(struct cvi_vi_dev *vdev, const enum cvi_isp_raw raw_num); + +static void _vi_deferred_thread(void *arg); +void _vi_send_isp_cmdq(enum cvi_isp_raw raw_num, enum ISP_CMDQ_E cmdq_id, void *ptr); + +#ifdef __cplusplus +} +#endif + +#endif /* __VI_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_common.h b/freertos/cvitek/install/include/driver/vi/vi_common.h new file mode 100644 index 000000000..6d920ffc8 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_common.h @@ -0,0 +1,117 @@ +#ifndef __VI_COMMON_H__ +#define __VI_COMMON_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +//#include +//#include +//#include +#include +#include +#include +#include +#include "FreeRTOS.h" +#include + +#ifndef NULL +#define NULL 0 +#endif + +#define NONE 0 /* No errors */ +#define ENOENT 2 /* No such file or directory */ +#define EINTR 4 /* Interrupted system call */ +#define EIO 5 /* I/O error */ +#define ENXIO 6 /* No such device or address */ +#define EBADF 9 /* Bad file number */ +#define EAGAIN 11 /* No more processes */ +#define EWOULDBLOCK 11 /* Operation would block */ +#define ENOMEM 12 /* Not enough memory */ +#define EACCES 13 /* Permission denied */ +#define EFAULT 14 /* Bad address */ +#define EBUSY 16 /* Mount device busy */ +#define EEXIST 17 /* File exists */ +#define EXDEV 18 /* Cross-device link */ +#define ENODEV 19 /* No such device */ +#define ENOTDIR 20 /* Not a directory */ +#define EISDIR 21 /* Is a directory */ +#define EINVAL 22 /* Invalid argument */ +#define ENOSPC 28 /* No space left on device */ +#define ESPIPE 29 /* Illegal seek */ +#define EROFS 30 /* Read only file system */ +#define EUNATCH 42 /* Protocol driver not attached */ +#define EBADE 50 /* Invalid exchange */ +#define EFTYPE 79 /* Inappropriate file type or format */ +#define ENMFILE 89 /* No more files */ +#define ENOTEMPTY 90 /* Directory not empty */ +#define ENAMETOOLONG 91 /* File or path name too long */ +#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define ENOBUFS 105 /* No buffer space available */ +#define ENOPROTOOPT 109 /* Protocol not available */ +#define EADDRINUSE 112 /* Address already in use */ +#define ETIMEDOUT 116 /* Connection timed out */ +#define EINPROGRESS 119 /* Connection already in progress */ +#define EALREADY 120 /* Socket already connected */ +#define EADDRNOTAVAIL 125 /* Address not available */ +#define EISCONN 127 /* Socket is already connected */ +#define ENOTCONN 128 /* Socket is not connected */ +#define ENOMEDIUM 135 /* No medium inserted */ +#define EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */ +#define ECANCELED 140 /* Operation canceled. */ + +// #define MIN(a, b) (((a) < (b))?(a):(b)) +// #define MAX(a, b) (((a) > (b))?(a):(b)) +#define VI_64_ALIGN(x) (((x) + 0x3F) & ~0x3F) // for 64byte alignment +#define VI_256_ALIGN(x) (((x) + 0xFF) & ~0xFF) // for 256byte alignment +#define VI_ALIGN(x) (((x) + 0xF) & ~0xF) // for 16byte alignment +#define VI_256_ALIGN(x) (((x) + 0xFF) & ~0xFF) // for 256byte alignment +#define ISP_ALIGN(x, y) (((x) + (y - 1)) & ~(y - 1)) // for any bytes alignment +#define UPPER(x, y) (((x) + ((1 << (y)) - 1)) >> (y)) // for alignment +#define CEIL(x, y) (((x) + ((1 << (y)))) >> (y)) // for alignment + +extern u32 vi_log_lv; + +#define vi_pr(level, fmt, arg...) \ +do { \ + if (vi_log_lv & level) { \ + if (level == VI_ERR) \ + printf("%s:%d(): " fmt, __func__, __LINE__, ## arg); \ + else if (level == VI_WARN) \ + printf("%s:%d(): " fmt, __func__, __LINE__, ## arg); \ + else if (level == VI_NOTICE) \ + printf("%s:%d(): " fmt, __func__, __LINE__, ## arg); \ + else if (level == VI_INFO) \ + printf("%s:%d(): " fmt, __func__, __LINE__, ## arg); \ + else if (level == VI_DBG) \ + printf("%s:%d(): " fmt, __func__, __LINE__, ## arg); \ + } \ +} while (0) + +enum vi_msg_pri { + VI_ERR = 0x1, + VI_WARN = 0x2, + VI_NOTICE = 0x4, + VI_INFO = 0x8, + VI_DBG = 0x10, +}; + +struct vi_rect { + u16 x; + u16 y; + u16 w; + u16 h; +}; + + +void _reg_write_mask(uintptr_t addr, u32 mask, u32 data); +int vip_sys_cif_cb(unsigned int cmd, void *arg); +int vip_sys_cmm_cb_i2c(unsigned int cmd, void *arg); +void vip_sys_reg_write_mask(uintptr_t addr, u32 mask, u32 data); +//extern bool __clk_is_enabled(struct clk *clk); + +#ifdef __cplusplus +} +#endif + +#endif /* __VI_COMMON_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_core.h b/freertos/cvitek/install/include/driver/vi/vi_core.h new file mode 100644 index 000000000..d37ca2a9e --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_core.h @@ -0,0 +1,26 @@ +#ifndef __VI_CORE_H__ +#define __VI_CORE_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + + +/******************************************************* + * Common interface for core + ******************************************************/ +void vi_irq_handler(struct cvi_vi_dev *vdev); +int vi_create_instance(struct cvi_vi_dev *vdev); +int vi_destroy_instance(void); +int vi_start_streaming(struct cvi_vi_dev *vdev); +int vi_stop_streaming(struct cvi_vi_dev *vdev); +int vi_enq_buf(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __VI_CORE_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_defines.h b/freertos/cvitek/install/include/driver/vi/vi_defines.h new file mode 100644 index 000000000..366696b39 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_defines.h @@ -0,0 +1,43 @@ +#ifndef __VI_DEFINES_H__ +#define __VI_DEFINES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +#define FPGA_TEST + +#define VI_REG_ADDR_BASE 0x0A000000 +#define VI_IRQ_NUM 20 + +/** + * struct cvi_vi - VI IP abstraction + */ +struct cvi_vi_dev { + void *reg_base; + int irq_num; + struct isp_ctx ctx; + struct cvi_isp_mbus_framefmt usr_fmt; + struct cvi_isp_rect usr_crop; + //struct cvi_isp_snr_info snr_info[ISP_PRERAW_MAX]; + u32 pre_fe_sof_cnt[ISP_PRERAW_MAX][ISP_FE_CHN_MAX]; + u32 pre_fe_frm_num[ISP_PRERAW_MAX][ISP_FE_CHN_MAX]; + u32 pre_be_frm_num[ISP_PRERAW_MAX][ISP_BE_CHN_MAX]; + bool preraw_first_frm[ISP_PRERAW_MAX]; + u32 postraw_frame_number[ISP_PRERAW_MAX]; + u32 drop_frame_number[ISP_PRERAW_MAX]; + u8 pre_fe_state[ISP_PRERAW_MAX][ISP_FE_CHN_MAX]; + u8 pre_be_state[ISP_BE_CHN_MAX]; + volatile u8 postraw_state; + u8 isp_streamoff; + u8 isp_streamon; +}; +#ifdef __cplusplus +} +#endif + +#endif /* __VI_DEFINES_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_drv.h b/freertos/cvitek/install/include/driver/vi/vi_drv.h new file mode 100644 index 000000000..c55ffb0c6 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_drv.h @@ -0,0 +1,659 @@ +#ifndef __VI_DRV_H__ +#define __VI_DRV_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#include +#include +#include +#include +#include +#include + +#ifndef _OFST +#define _OFST(_BLK_T, _REG) ((uintptr_t)&(((struct _BLK_T *)0)->_REG)) +#endif + +// #define _reg_read(addr) mmio_read_32((uintptr_t)addr) +// #define _reg_write(addr, data) mmio_write_32((uintptr_t)addr, (uint32_t)data) + +#define ISP_RD_REG_BA(_BA) \ + (_reg_read(_BA)) + +#define ISP_RD_REG(_BA, _BLK_T, _REG) \ + (_reg_read(_BA+_OFST(_BLK_T, _REG))) + +#define ISP_RD_BITS(_BA, _BLK_T, _REG, _FLD) \ + ({\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = _reg_read(_BA+_OFST(_BLK_T, _REG));\ + _r.bits._FLD;\ + }) + +#define ISP_WR_REG(_BA, _BLK_T, _REG, _V) \ + (_reg_write((_BA+_OFST(_BLK_T, _REG)), _V)) + +#define ISP_WR_REG_OFT(_BA, _BLK_T, _REG, _OFT, _V) \ + (_reg_write((_BA+_OFST(_BLK_T, _REG) + _OFT), _V)) + +#define ISP_WR_BITS(_BA, _BLK_T, _REG, _FLD, _V) \ + do {\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = _reg_read(_BA+_OFST(_BLK_T, _REG));\ + _r.bits._FLD = _V;\ + _reg_write((_BA+_OFST(_BLK_T, _REG)), _r.raw);\ + } while (0) + +#define ISP_WO_BITS(_BA, _BLK_T, _REG, _FLD, _V) \ + do {\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = 0;\ + _r.bits._FLD = _V;\ + _reg_write((_BA+_OFST(_BLK_T, _REG)), _r.raw);\ + } while (0) + +#define ISP_WR_REGS_BURST(_BA, _BLK_T, _REG, _SIZE, _STR)\ + do {\ + u32 k = 0;\ + uintptr_t ofst = _OFST(_BLK_T, _REG);\ + for (; k < sizeof(_SIZE) / 0x4; k++) {\ + u32 val = (&_STR + k)->raw;\ + _reg_write((_BA + ofst + (k * 0x4)), val);\ + } \ + } while (0) + +#define ISP_WR_REG_LOOP_SHFT(_BA, _BLK_T, _REG, _TOTAL_SIZE, _SFT_SIZE, _LUT, _SFT_BIT) \ + do {\ + uint16_t i = 0, j = 0;\ + uint32_t val = 0;\ + for (; i < _TOTAL_SIZE / _SFT_SIZE; i++) {\ + val = 0;\ + for (j = 0; j < _SFT_SIZE; j++) {\ + val += (_LUT[(i * _SFT_SIZE) + j] << (_SFT_BIT * j));\ + } \ + _reg_write((_BA + _OFST(_BLK_T, _REG) + (i * 0x4)), val);\ + } \ + } while (0) + +#define REG_ARRAY_UPDATE2_SIZE(addr, array, size) \ + do { \ + uint16_t i; \ + for (i = 0; i < size; i += 2) { \ + val = array[i]; \ + if ((i + 1) < size) \ + val |= (array[i+1] << 16); \ + _reg_write(addr + (i << 1), val); \ + } \ + } while (0) + +#define REG_ARRAY_UPDATE2(addr, array) \ + REG_ARRAY_UPDATE2_SIZE(addr, array, ARRAY_SIZE(array)) + +#define REG_ARRAY_UPDATE4(addr, array) \ + do { \ + uint16_t i; \ + for (i = 0; i < ARRAY_SIZE(array); i += 4) { \ + val = array[i]; \ + if ((i + 1) < ARRAY_SIZE(array)) \ + val |= (array[i+1] << 8); \ + if ((i + 2) < ARRAY_SIZE(array)) \ + val |= (array[i+2] << 16); \ + if ((i + 3) < ARRAY_SIZE(array)) \ + val |= (array[i+3] << 24); \ + _reg_write(addr + i, val); \ + } \ + } while (0) + +#define LTM_REG_ARRAY_UPDATE11(addr, array) \ + do { \ + uint32_t val; \ + val = array[0] | (array[1] << 5) | (array[2] << 10) | \ + (array[3] << 15) | (array[4] << 20) | (array[5] << 25); \ + _reg_write(addr, val); \ + val = array[6] | (array[7] << 5) | (array[8] << 10) | \ + (array[9] << 15) | (array[10] << 20); \ + _reg_write(addr + 4, val); \ + } while (0) + +#define LTM_REG_ARRAY_UPDATE30(addr, array) \ + do { \ + uint8_t i, j; \ + uint32_t val; \ + for (i = 0, j = 0; i < ARRAY_SIZE(array); i += 6, j++) { \ + val = array[i] | (array[i + 1] << 5) | \ + (array[i + 2] << 10) | (array[i + 3] << 15) | \ + (array[i + 4] << 20) | (array[i + 5] << 25); \ + _reg_write(addr + j * 4, val); \ + } \ + } while (0) + +enum ISP_RGB_PROB_OUT { + ISP_RGB_PROB_OUT_CFA = 0, + ISP_RGB_PROB_OUT_RGBEE, + ISP_RGB_PROB_OUT_CCM, + ISP_RGB_PROB_OUT_GMA, + ISP_RGB_PROB_OUT_DHZ, + ISP_RGB_PROB_OUT_HSV, + ISP_RGB_PROB_OUT_RGBDITHER, + ISP_RGB_PROB_OUT_CSC, + ISP_RGB_PROB_OUT_MAX, +}; + +enum ISP_RAW_PATH { + ISP_RAW_PATH_LE = 0, + ISP_RAW_PATH_SE, + ISP_RAW_PATH_MAX, +}; + +/* + * To indicate the 1st two pixel in the bayer_raw. + */ +enum ISP_BAYER_TYPE { + ISP_BAYER_TYPE_BG = 0, + ISP_BAYER_TYPE_GB, + ISP_BAYER_TYPE_GR, + ISP_BAYER_TYPE_RG, + ISP_BAYER_TYPE_MAX, +}; + +enum ISP_BNR_OUT { + ISP_BNR_OUT_BYPASS = 0, + ISP_BNR_OUT_B_DELAY, + ISP_BNR_OUT_FACTOR, + ISP_BNR_OUT_B_NL, + ISP_BNR_OUT_RESV_0, + ISP_BNR_OUT_RESV_1, + ISP_BNR_OUT_RESV_2, + ISP_BNR_OUT_RESV_3, + ISP_BNR_OUT_B_OUT, + ISP_BNR_OUT_INTENSITY, + ISP_BNR_OUT_DELTA, + ISP_BNR_OUT_NOT_SM, + ISP_BNR_OUT_FLAG_V, + ISP_BNR_OUT_FLAG_H, + ISP_BNR_OUT_FLAG_D45, + ISP_BNR_OUT_FLAG_D135, + ISP_BNR_OUT_MAX, +}; + +enum ISP_YNR_OUT { + ISP_YNR_OUT_BYPASS = 0, + ISP_YNR_OUT_Y_DELAY, + ISP_YNR_OUT_FACTOR, + ISP_YNR_OUT_ALPHA, + ISP_YNR_OUT_Y_BF, + ISP_YNR_OUT_Y_NL, + ISP_YNR_OUT_RESV_0, + ISP_YNR_OUT_RESV_1, + ISP_YNR_OUT_Y_OUT, + ISP_YNR_OUT_INTENSITY, + ISP_YNR_OUT_DELTA, + ISP_YNR_OUT_NOT_SM, + ISP_YNR_OUT_FLAG_V, + ISP_YNR_OUT_FLAG_H, + ISP_YNR_OUT_FLAG_D45, + ISP_YNR_OUT_FLAG_D135, + ISP_YNR_OUT_MAX, +}; + +enum ISP_FS_OUT { + ISP_FS_OUT_FS = 0, + ISP_FS_OUT_LONG, + ISP_FS_OUT_SHORT, + ISP_FS_OUT_SHORT_EX, + ISP_FS_OUT_MOTION_PXL, + ISP_FS_OUT_LE_BLD_WHT, + ISP_FS_OUT_SE_BLD_WHT, + ISP_FS_OUT_MOTION_LUT, + ISP_FS_OUT_AC_FS, + ISP_FS_OUT_DELTA_LE, + ISP_FS_OUT_DELTA_SE, + ISP_FS_OUT_MAX, +}; + +enum isp_dump_grp { + ISP_DUMP_PRERAW = 0x1, + ISP_DUMP_POSTRAW = 0x2, + ISP_DUMP_ALL = 0x4, + ISP_DUMP_DMA = 0x8, + ISP_DUMP_ALL_DMA = 0x10, +}; + +enum ISP_CCM_ID { + ISP_CCM_ID_0 = 0, + ISP_CCM_ID_1, + ISP_CCM_ID_2, + ISP_CCM_ID_3, + ISP_CCM_ID_4, + ISP_CCM_ID_MAX, +}; + +enum ISP_LSCR_ID { + ISP_LSCR_ID_PRE0_FE_LE = 0, + ISP_LSCR_ID_PRE0_FE_SE, + ISP_LSCR_ID_PRE1_FE_LE, + ISP_LSCR_ID_PRE1_FE_SE, + ISP_LSCR_ID_PRE_BE_LE, + ISP_LSCR_ID_PRE_BE_SE, + ISP_LSCR_ID_MAX +}; + +enum ISP_PRE_PROC_ID { + ISP_IR_PRE_PROC_ID_LE, + ISP_IR_PRE_PROC_ID_SE, + ISP_IR_PRE_PROC_ID_MAX +}; + +struct lmap_cfg { + u8 pre_chg[2]; //le/se + u8 pre_w_bit; + u8 pre_h_bit; + u8 post_w_bit; + u8 post_h_bit; +}; + +struct isp_dump_info { + uint64_t phy_base; + uint64_t reg_base; + uint32_t blk_size; +}; + +struct isp_vblock_info { + uint32_t block_id; + uint32_t block_size; + uint64_t reg_base; +}; + +struct tile { + u16 start; + u16 end; +}; + +struct isp_ccm_cfg { + u16 coef[3][3]; +}; + +struct _fe_dbg_i { + uint32_t fe_idle_sts; + uint32_t fe_done_sts; +}; + +struct _be_dbg_i { + uint32_t be_done_sts; + uint32_t be_dma_idle_sts; +}; + +struct _post_dbg_i { + uint32_t top_sts; +}; + +struct _dma_dbg_i { + uint32_t wdma_0_err_sts; + uint32_t wdma_0_idle; + uint32_t wdma_1_err_sts; + uint32_t wdma_1_idle; + uint32_t rdma_err_sts; + uint32_t rdma_idle; +}; + +struct _isp_dg_info { + struct _fe_dbg_i fe_sts; + struct _be_dbg_i be_sts; + struct _post_dbg_i post_sts; + struct _dma_dbg_i dma_sts; + uint32_t isp_top_sts; + uint32_t bdg_chn_debug[ISP_FE_CHN_MAX]; + uint32_t bdg_int_sts_0; + uint32_t bdg_int_sts_1; + uint32_t bdg_fifo_of_cnt; + uint8_t bdg_w_gt_cnt[ISP_FE_CHN_MAX]; + uint8_t bdg_w_ls_cnt[ISP_FE_CHN_MAX]; + uint8_t bdg_h_gt_cnt[ISP_FE_CHN_MAX]; + uint8_t bdg_h_ls_cnt[ISP_FE_CHN_MAX]; +}; + +struct isp_grid_s_info { + u8 w_bit; + u8 h_bit; +}; + +struct _isp_cfg { + uint32_t csibdg_width; + uint32_t csibdg_height; + uint32_t max_width; + uint32_t max_height; + uint32_t post_img_w; + uint32_t post_img_h; + uint32_t drop_ref_frm_num; + uint32_t drop_frm_cnt; + struct vi_rect crop; + struct vi_rect crop_se; + struct vi_rect postout_crop; + struct _isp_dg_info dg_info; + struct isp_grid_s_info rgbmap_i; + struct isp_grid_s_info lmap_i; + enum ISP_BAYER_TYPE rgb_color_mode; + enum _VI_INTF_MODE_E infMode; + enum _VI_WORK_MODE_E muxMode; + enum _VI_YUV_DATA_SEQ_E enDataSeq; + + uint32_t is_patgen_en : 1; + uint32_t is_offline_preraw : 1; + uint32_t is_yuv_bypass_path : 1; + uint32_t is_hdr_on : 1; + uint32_t is_hdr_detail_en : 1; + uint32_t is_tile : 1; + uint32_t is_fbc_on : 1; + uint32_t is_rgbir_sensor : 1; + uint32_t is_offline_scaler : 1; + uint32_t is_stagger_vsync : 1; + uint32_t is_slice_buf_on : 1; +}; + +/* + * @src_width: width of original image + * @src_height: height of original image + * @img_width: width of image after crop + * @img_height: height of image after crop + * @pyhs_regs: index by enum ISP_BLK_ID_T, always phys reg + * @vreg_bases: index by enum ISP_BLK_ID_T + * @vreg_bases_pa: index by enum ISP_BLK_ID_T + * + * @rgb_color_mode: bayer_raw type after crop could change + * + * @cam_id: preraw(0,1) + * @is_offline_preraw: preraw src offline(from dram) + * @is_offline_postraw: postraw src offline(from dram) + */ +struct isp_ctx { + uint32_t src_width; + uint32_t src_height; + uint32_t img_width; + uint32_t img_height; + uint32_t crop_x; + uint32_t crop_y; + uint32_t crop_se_x; + uint32_t crop_se_y; + + uintptr_t *phys_regs; + + struct _isp_cfg isp_pipe_cfg[ISP_PRERAW_MAX]; + enum ISP_BAYER_TYPE rgb_color_mode[ISP_PRERAW_MAX]; + uint8_t rgbmap_prebuf_idx; + uint8_t rawb_chnstr_num; + uint8_t total_chn_num; + + uint8_t cam_id; + uint32_t is_dual_sensor : 1; + uint32_t is_yuv_sensor : 1; + uint32_t is_hdr_on : 1; + uint32_t is_3dnr_on : 1; + uint32_t is_dpcm_on : 1; + uint32_t is_offline_be : 1; + uint32_t is_offline_postraw : 1; + uint32_t is_sublvds_path : 1; + uint32_t is_fbc_on : 1; + uint32_t is_ctrl_inited : 1; + uint32_t is_slice_buf_on : 1; +}; + +struct vi_fbc_cfg { + u8 cu_size; + u8 target_cr; //compression ratio + u8 is_lossless; // lossless or lossy + u32 y_bs_size; //Y WDMA seglen + u32 c_bs_size; //C WDMA seglen + u32 y_buf_size; //total Y buf size + u32 c_buf_size; //total C buf size +}; + +struct slc_cfg_s { + u32 le_buf_size; + u32 se_buf_size; + u32 le_w_thshd; + u32 se_w_thshd; + u32 le_r_thshd; + u32 se_r_thshd; +}; + +struct slice_buf_s { + u16 line_delay; //sensor exposure ratio + u16 buffer; //cover for read/write latency, axi latency..etc + u8 max_grid_size; //rgbmap grid size + u8 min_r_thshd; // minimum read threshold + struct slc_cfg_s main_path; + struct slc_cfg_s sub_path; +}; + +/********************************************************** + * SW scenario path check APIs + **********************************************************/ +u32 _is_fe_be_online(struct isp_ctx *ctx); +u32 _is_be_post_online(struct isp_ctx *ctx); +u32 _is_all_online(struct isp_ctx *ctx); +u32 _is_post_sclr_online(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); + +/**************************************************************************** + * Interfaces + ****************************************************************************/ +uint64_t _mempool_get_addr(void); +int64_t _mempool_pop(uint32_t size); + +void vi_set_base_addr(void *base); +uintptr_t *isp_get_phys_reg_bases(void); +void isp_debug_dump(struct isp_ctx *ctx); +/** + * isp_init - setup isp + * + * @param : + */ +void isp_init(struct isp_ctx *ctx); + + +/** + * isp_reset - do reset. This can be activated only if dma stop to avoid + * hang fabric. + * + */ +void isp_reset(struct isp_ctx *ctx); + +/** + * isp_stream_on - start/stop isp stream. + * + * @param on: 1 for stream start, 0 for stream stop + */ +void isp_streaming(struct isp_ctx *ctx, uint32_t on, enum cvi_isp_raw raw_num); + + +struct isp_grid_s_info ispblk_rgbmap_info(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +struct isp_grid_s_info ispblk_lmap_info(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +void ispblk_preraw_fe_config(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +void ispblk_preraw_vi_sel_config(struct isp_ctx *ctx); +void ispblk_pre_wdma_ctrl_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_preraw_be_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_raw_rdma_ctrl_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_rawtop_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_rgbtop_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_yuvtop_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_isptop_config(struct isp_ctx *ctx); + +void ispblk_crop_enable(struct isp_ctx *ctx, int crop_id, bool en); +int ispblk_crop_config(struct isp_ctx *ctx, int crop_id, struct vi_rect crop); +int ccm_find_hwid(int id); +int blc_find_hwid(int id); +void ispblk_blc_set_offset(struct isp_ctx *ctx, int blc_id, + uint16_t roffset, uint16_t groffset, + uint16_t gboffset, uint16_t boffset); +void ispblk_blc_set_2ndoffset(struct isp_ctx *ctx, int blc_id, + uint16_t roffset, uint16_t groffset, + uint16_t gboffset, uint16_t boffset); +void ispblk_blc_set_gain(struct isp_ctx *ctx, int blc_id, + uint16_t rgain, uint16_t grgain, + uint16_t gbgain, uint16_t bgain); +void ispblk_blc_enable(struct isp_ctx *ctx, int blc_id, bool en, bool bypass); +int wbg_find_hwid(int id); +int ispblk_wbg_config(struct isp_ctx *ctx, int wbg_id, uint16_t rgain, uint16_t ggain, uint16_t bgain); +int ispblk_wbg_enable(struct isp_ctx *ctx, int wbg_id, bool enable, bool bypass); +void ispblk_lscr_set_lut(struct isp_ctx *ctx, int lscr_id, uint16_t *gain_lut, uint8_t lut_count); +void ispblk_lscr_config(struct isp_ctx *ctx, int lscr_id, bool en); + +uint64_t ispblk_dma_getaddr(struct isp_ctx *ctx, uint32_t dmaid); +int ispblk_dma_config(struct isp_ctx *ctx, int dmaid, uint64_t buf_addr); +void ispblk_dma_setaddr(struct isp_ctx *ctx, uint32_t dmaid, uint64_t buf_addr); +void ispblk_dma_enable(struct isp_ctx *ctx, uint32_t dmaid, uint32_t on, uint8_t dma_disable); +int ispblk_dma_buf_get_size2(struct isp_ctx *ctx, int dmaid, u8 raw_num); +void ispblk_dma_set_sw_mode(struct isp_ctx *ctx, uint32_t dmaid, bool is_sw_mode); + +/**************************************************************************** + * PRERAW FE SUBSYS + ****************************************************************************/ +void ispblk_csidbg_dma_wr_en(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num, const u8 chn_num, const u8 en); +void ispblk_csibdg_wdma_crop_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num, struct vi_rect crop); +void ispblk_csibdg_crop_update(struct isp_ctx *ctx, enum cvi_isp_raw raw_num, bool en); +int ispblk_csibdg_config(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +void ispblk_rgbmap_config(struct isp_ctx *ctx, int map_id, bool en, enum cvi_isp_raw raw_num); +void ispblk_lmap_chg_size(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num, const enum cvi_isp_pre_chn_num chn_num); +void ispblk_lmap_config(struct isp_ctx *ctx, int map_id, bool en); + +/**************************************************************************** + * PRE BE SUBSYS + ****************************************************************************/ +void ispblk_dpc_config(struct isp_ctx *ctx, enum ISP_RAW_PATH path, bool enable, uint8_t test_case); +void ispblk_dpc_set_static(struct isp_ctx *ctx, enum ISP_RAW_PATH path, + uint16_t offset, uint32_t *bps, uint8_t count); +void ispblk_af_config(struct isp_ctx *ctx, bool enable); +void ispblk_rgbir_preproc_config(struct isp_ctx *ctx, + uint8_t *wdata, int16_t *data_r, int16_t *data_g, int16_t *data_b); +void ispblk_ir_proc_config(struct isp_ctx *ctx, uint8_t *gamma); + +/**************************************************************************** + * RAW TOP SUBSYS + ****************************************************************************/ +void ispblk_bnr_config(struct isp_ctx *ctx, enum ISP_BNR_OUT out_sel, bool lsc_en, uint8_t ns_gain, uint8_t str); +void ispblk_cfa_config(struct isp_ctx *ctx); +void ispblk_aehist_reset(struct isp_ctx *ctx, int blk_id, enum cvi_isp_raw raw_num); +void ispblk_aehist_config(struct isp_ctx *ctx, int blk_id, bool enable); +void ispblk_gms_config(struct isp_ctx *ctx, bool enable); +void ispblk_rgbcac_config(struct isp_ctx *ctx, bool en); +void ispblk_lcac_config(struct isp_ctx *ctx, bool en, uint8_t test_case); + +/**************************************************************************** + * RGB TOP SUBSYS + ****************************************************************************/ +void ispblk_lsc_config(struct isp_ctx *ctx, bool en); +void ispblk_fusion_hdr_cfg(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +void ispblk_fusion_config(struct isp_ctx *ctx, bool enable, bool mc_enable, enum ISP_FS_OUT out_sel); +void ispblk_ltm_d_lut(struct isp_ctx *ctx, uint8_t sel, uint16_t *data); +void ispblk_ltm_b_lut(struct isp_ctx *ctx, uint8_t sel, uint16_t *data); +void ispblk_ltm_g_lut(struct isp_ctx *ctx, uint8_t sel, uint16_t *data); +void ispblk_ltm_config(struct isp_ctx *ctx, u8 ltm_en, u8 dehn_en, u8 behn_en, u8 ee_en); +void ispblk_ccm_config(struct isp_ctx *ctx, enum ISP_BLK_ID_T blk_id, bool en, struct isp_ccm_cfg *cfg); +void ispblk_hist_v_config(struct isp_ctx *ctx, bool en, uint8_t test_case); +void ispblk_dhz_config(struct isp_ctx *ctx, bool en); +void ispblk_ygamma_config(struct isp_ctx *ctx, bool en, + uint8_t sel, uint16_t *data, uint8_t inv, uint8_t test_case); +void ispblk_ygamma_enable(struct isp_ctx *ctx, bool enable); +void ispblk_gamma_config(struct isp_ctx *ctx, bool en, uint8_t sel, uint16_t *data, uint8_t inv); +void ispblk_gamma_enable(struct isp_ctx *ctx, bool enable); +void ispblk_clut_config(struct isp_ctx *ctx, bool en, + int16_t *r_lut, int16_t *g_lut, int16_t *b_lut); +void ispblk_rgbdither_config(struct isp_ctx *ctx, bool en, bool mod_en, bool histidx_en, bool fmnum_en); +void ispblk_csc_config(struct isp_ctx *ctx); +void ispblk_manr_config(struct isp_ctx *ctx, bool en); +void ispblk_ir_merge_config(struct isp_ctx *ctx); + +/**************************************************************************** + * YUV TOP SUBSYS + ****************************************************************************/ +int ispblk_pre_ee_config(struct isp_ctx *ctx, bool en); +int ispblk_yuvdither_config(struct isp_ctx *ctx, uint8_t sel, bool en, + bool mod_en, bool histidx_en, bool fmnum_en); +void ispblk_tnr_config(struct isp_ctx *ctx, bool en, u8 test_case); +void ispblk_fbc_clear_fbcd_ring_base(struct isp_ctx *ctx, u8 raw_num); +void ispblk_fbc_chg_to_sw_mode(struct isp_ctx *ctx, u8 raw_num); +void vi_fbc_calculate_size(struct isp_ctx *ctx, u8 raw_num); +void ispblk_fbc_ring_buf_config(struct isp_ctx *ctx, u8 en); +void ispblk_fbcd_config(struct isp_ctx *ctx, bool en); +void ispblk_fbce_config(struct isp_ctx *ctx, bool en); +void ispblk_cnr_config(struct isp_ctx *ctx, bool en, bool pfc_en, uint8_t str_mode, uint8_t test_case); +void ispblk_ynr_config(struct isp_ctx *ctx, enum ISP_YNR_OUT out_sel, uint8_t ns_gain); +int ispblk_ee_config(struct isp_ctx *ctx, bool en); +void ispblk_dci_config(struct isp_ctx *ctx, bool en, uint16_t *lut, uint8_t test_case); +void ispblk_ldci_config(struct isp_ctx *ctx, bool en, uint8_t test_case); +void ispblk_ca_config(struct isp_ctx *ctx, bool en); +void ispblk_ca_lite_config(struct isp_ctx *ctx, bool en); +void ispblk_ycur_config(struct isp_ctx *ctx, bool en, uint8_t sel, uint16_t *data); +void ispblk_ycur_enable(struct isp_ctx *ctx, bool enable, uint8_t sel); + +void isp_pre_trig(struct isp_ctx *ctx, enum cvi_isp_raw raw_num, const u8 chn_num); +void isp_post_trig(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); + +void isp_intr_set_mask(struct isp_ctx *ctx); +void isp_intr_status( + struct isp_ctx *ctx, + union REG_ISP_TOP_INT_EVENT0 *s0, + union REG_ISP_TOP_INT_EVENT1 *s1, + union REG_ISP_TOP_INT_EVENT2 *s2); +void isp_csi_intr_status( + struct isp_ctx *ctx, + enum cvi_isp_raw raw_num, + union REG_ISP_CSI_BDG_INTERRUPT_STATUS_0 *s0, + union REG_ISP_CSI_BDG_INTERRUPT_STATUS_1 *s1); + +void ispblk_tnr_rgbmap_chg(struct isp_ctx *ctx, enum cvi_isp_raw raw_num, const u8 chn_num); +void ispblk_tnr_post_chg(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); + +/**************************************************************************** + * Runtime Control Flow Config + ****************************************************************************/ +void isp_first_frm_reset(struct isp_ctx *ctx, uint8_t reset); +void ispblk_post_yuv_cfg_update(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_post_cfg_update(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +void ispblk_pre_be_cfg_update(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +int ispblk_dma_get_size(struct isp_ctx *ctx, int dmaid, uint32_t _w, uint32_t _h); +uint32_t ispblk_csibdg_chn_dbg(struct isp_ctx *ctx, enum cvi_isp_raw raw_num, enum cvi_isp_pre_chn_num chn); +struct _fe_dbg_i ispblk_fe_dbg_info(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +struct _be_dbg_i ispblk_be_dbg_info(struct isp_ctx *ctx); +struct _post_dbg_i ispblk_post_dbg_info(struct isp_ctx *ctx); +struct _dma_dbg_i ispblk_dma_dbg_info(struct isp_ctx *ctx); +int isp_frm_err_handler(struct isp_ctx *ctx, const enum cvi_isp_raw err_raw_num, const u8 step); + +/**************************************************************************** + * YUV Bypass Control Flow Config + ****************************************************************************/ +void ispblk_csibdg_yuv_bypass_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num); +u32 ispblk_dma_yuv_bypass_config(struct isp_ctx *ctx, uint32_t dmaid, uint64_t buf_addr, + const enum cvi_isp_raw raw_num); + +/**************************************************************************** + * Slice buffer Control + ****************************************************************************/ +void vi_calculate_slice_buf_setting(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +void isp_slice_buf_trig(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +void manr_clear_prv_ring_base(struct isp_ctx *ctx, enum cvi_isp_raw raw_num); +void ispblk_slice_buf_config(struct isp_ctx *ctx, const enum cvi_isp_raw raw_num, u8 en); + +/******************************************************************************* + * Tuning interfaces + ******************************************************************************/ +void vi_tuning_gamma_ips_update( + struct isp_ctx *ctx, + enum cvi_isp_raw raw_num); +void vi_tuning_dci_update( + struct isp_ctx *ctx, + enum cvi_isp_raw raw_num); +int vi_tuning_buf_setup(void); +void vi_tuning_buf_release(void); +void *vi_get_tuning_buf_addr(u32 *size); +void vi_tuning_buf_clear(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* __VI_DRV_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_inter_cmdq.h b/freertos/cvitek/install/include/driver/vi/vi_inter_cmdq.h new file mode 100644 index 000000000..1f56a0f2b --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_inter_cmdq.h @@ -0,0 +1,28 @@ +#ifndef __VI_INTER_CMDQ_H__ +#define __VI_INTER_CMDQ_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +enum VI_EVENT_E { + VI_EV_SOF = 1, + VI_EV_FE_DONE, + VI_EV_BE_DONE, + VI_EV_POST_SHAW_DONE, + VI_EV_POST_DONE, + VI_EV_MAX, +}; + +enum VI_INTER_CMDQ_E { + VI_CMDQ_EV_TYPE, + VI_CMDQ_MAX, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* __VI_INTER_CMDQ_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_interfaces.h b/freertos/cvitek/install/include/driver/vi/vi_interfaces.h new file mode 100644 index 000000000..734e043ae --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_interfaces.h @@ -0,0 +1,21 @@ +#ifndef __VI_INTERFACES_H__ +#define __VI_INTERFACES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/******************************************************* + * Common interface for cvi_vi + ******************************************************/ +int vi_drv_open(struct cvi_vi_ctx *viCtx); +int vi_drv_cfg(void); +int vi_drv_streamon(void); +int vi_drv_streamoff(void); +int vi_drv_release(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __VI_INTERFACES_H__ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_reg_blocks.h b/freertos/cvitek/install/include/driver/vi/vi_reg_blocks.h new file mode 100644 index 000000000..45e2bc157 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_reg_blocks.h @@ -0,0 +1,2146 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name:vi_reg_blocks.h + * Description:HW register description + */ + +#ifndef _VI_REG_BLOCKS_H_ +#define _VI_REG_BLOCKS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_PRE_RAW_BE_T { + union REG_PRE_RAW_BE_TOP_CTRL TOP_CTRL; + union REG_PRE_RAW_BE_UP_PQ_EN UP_PQ_EN; + union REG_PRE_RAW_BE_IMG_SIZE_LE IMG_SIZE_LE; + uint32_t _resv_0xc[1]; + union REG_PRE_RAW_BE_PRE_RAW_DUMMY PRE_RAW_DUMMY; + union REG_PRE_RAW_BE_DEBUG_INFO BE_INFO; + union REG_PRE_RAW_BE_DMA_IDLE_INFO BE_DMA_IDLE_INFO; + union REG_PRE_RAW_BE_IP_IDLE_INFO BE_IP_IDLE_INFO; + union REG_PRE_RAW_BE_LINE_BALANCE_CTRL LINE_BALANCE_CTRL; + union REG_PRE_RAW_BE_DEBUG_ENABLE DEBUG_ENABLE; + union REG_PRE_RAW_BE_TVALID_STATUS TVALID_STATUS; + union REG_PRE_RAW_BE_TREADY_STATUS TREADY_STATUS; + union REG_PRE_RAW_BE_PATGEN1 PATGEN1; + union REG_PRE_RAW_BE_PATGEN2 PATGEN2; + union REG_PRE_RAW_BE_PATGEN3 PATGEN3; + union REG_PRE_RAW_BE_PATGEN4 PATGEN4; + union REG_PRE_RAW_BE_CHKSUM_ENABLE CHKSUM_ENABLE; + union REG_PRE_RAW_BE_CHKSUM CHKSUM; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_DMA_CTL_T { + union REG_ISP_DMA_CTL_SYS_CONTROL SYS_CONTROL; + union REG_ISP_DMA_CTL_BASE_ADDR BASE_ADDR; + union REG_ISP_DMA_CTL_DMA_SEGLEN DMA_SEGLEN; + union REG_ISP_DMA_CTL_DMA_STRIDE DMA_STRIDE; + union REG_ISP_DMA_CTL_DMA_SEGNUM DMA_SEGNUM; + union REG_ISP_DMA_CTL_DMA_STATUS DMA_STATUS; + union REG_ISP_DMA_CTL_DMA_SLICESIZE DMA_SLICESIZE; + union REG_ISP_DMA_CTL_DMA_DUMMY DMA_DUMMY; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_AE_HIST_T { + union REG_ISP_AE_HIST_AE_HIST_STATUS AE_HIST_STATUS; + union REG_ISP_AE_HIST_AE_HIST_GRACE_RESET AE_HIST_GRACE_RESET; + union REG_ISP_AE_HIST_AE_HIST_MONITOR AE_HIST_MONITOR; + union REG_ISP_AE_HIST_AE_HIST_BYPASS AE_HIST_BYPASS; + union REG_ISP_AE_HIST_AE_KICKOFF AE_KICKOFF; + union REG_ISP_AE_HIST_STS_AE0_HIST_ENABLE STS_AE0_HIST_ENABLE; + union REG_ISP_AE_HIST_STS_AE_OFFSETX STS_AE_OFFSETX; + union REG_ISP_AE_HIST_STS_AE_OFFSETY STS_AE_OFFSETY; + union REG_ISP_AE_HIST_STS_AE_NUMXM1 STS_AE_NUMXM1; + union REG_ISP_AE_HIST_STS_AE_NUMYM1 STS_AE_NUMYM1; + union REG_ISP_AE_HIST_STS_AE_WIDTH STS_AE_WIDTH; + union REG_ISP_AE_HIST_STS_AE_HEIGHT STS_AE_HEIGHT; + union REG_ISP_AE_HIST_STS_AE_STS_DIV STS_AE_STS_DIV; + union REG_ISP_AE_HIST_STS_HIST_MODE STS_HIST_MODE; + uint32_t _resv_0x38[1]; + union REG_ISP_AE_HIST_AE_HIST_MONITOR_SELECT AE_HIST_MONITOR_SELECT; + union REG_ISP_AE_HIST_AE_HIST_LOCATION AE_HIST_LOCATION; + uint32_t _resv_0x44[1]; + union REG_ISP_AE_HIST_STS_IR_AE_OFFSETX STS_IR_AE_OFFSETX; + union REG_ISP_AE_HIST_STS_IR_AE_OFFSETY STS_IR_AE_OFFSETY; + union REG_ISP_AE_HIST_STS_IR_AE_NUMXM1 STS_IR_AE_NUMXM1; + union REG_ISP_AE_HIST_STS_IR_AE_NUMYM1 STS_IR_AE_NUMYM1; + union REG_ISP_AE_HIST_STS_IR_AE_WIDTH STS_IR_AE_WIDTH; + union REG_ISP_AE_HIST_STS_IR_AE_HEIGHT STS_IR_AE_HEIGHT; + union REG_ISP_AE_HIST_STS_IR_AE_STS_DIV STS_IR_AE_STS_DIV; + uint32_t _resv_0x64[1]; + union REG_ISP_AE_HIST_AE_HIST_BAYER_STARTING AE_HIST_BAYER_STARTING; + union REG_ISP_AE_HIST_AE_HIST_DUMMY AE_HIST_DUMMY; + union REG_ISP_AE_HIST_AE_HIST_CHECKSUM AE_HIST_CHECKSUM; + union REG_ISP_AE_HIST_WBG_4 WBG_4; + union REG_ISP_AE_HIST_WBG_5 WBG_5; + union REG_ISP_AE_HIST_WBG_6 WBG_6; + union REG_ISP_AE_HIST_WBG_7 WBG_7; + uint32_t _resv_0x84[7]; + union REG_ISP_AE_HIST_DMI_ENABLE DMI_ENABLE; + uint32_t _resv_0xa4[3]; + union REG_ISP_AE_HIST_AE_FACE0_LOCATION AE_FACE0_LOCATION; + union REG_ISP_AE_HIST_AE_FACE1_LOCATION AE_FACE1_LOCATION; + union REG_ISP_AE_HIST_AE_FACE2_LOCATION AE_FACE2_LOCATION; + union REG_ISP_AE_HIST_AE_FACE3_LOCATION AE_FACE3_LOCATION; + union REG_ISP_AE_HIST_AE_FACE0_SIZE AE_FACE0_SIZE; + union REG_ISP_AE_HIST_AE_FACE1_SIZE AE_FACE1_SIZE; + union REG_ISP_AE_HIST_AE_FACE2_SIZE AE_FACE2_SIZE; + union REG_ISP_AE_HIST_AE_FACE3_SIZE AE_FACE3_SIZE; + union REG_ISP_AE_HIST_IR_AE_FACE0_LOCATION IR_AE_FACE0_LOCATION; + union REG_ISP_AE_HIST_IR_AE_FACE1_LOCATION IR_AE_FACE1_LOCATION; + union REG_ISP_AE_HIST_IR_AE_FACE2_LOCATION IR_AE_FACE2_LOCATION; + union REG_ISP_AE_HIST_IR_AE_FACE3_LOCATION IR_AE_FACE3_LOCATION; + union REG_ISP_AE_HIST_IR_AE_FACE0_SIZE IR_AE_FACE0_SIZE; + union REG_ISP_AE_HIST_IR_AE_FACE1_SIZE IR_AE_FACE1_SIZE; + union REG_ISP_AE_HIST_IR_AE_FACE2_SIZE IR_AE_FACE2_SIZE; + union REG_ISP_AE_HIST_IR_AE_FACE3_SIZE IR_AE_FACE3_SIZE; + union REG_ISP_AE_HIST_AE_FACE0_ENABLE AE_FACE0_ENABLE; + union REG_ISP_AE_HIST_AE_FACE0_STS_DIV AE_FACE0_STS_DIV; + union REG_ISP_AE_HIST_AE_FACE1_STS_DIV AE_FACE1_STS_DIV; + union REG_ISP_AE_HIST_AE_FACE2_STS_DIV AE_FACE2_STS_DIV; + union REG_ISP_AE_HIST_AE_FACE3_STS_DIV AE_FACE3_STS_DIV; + union REG_ISP_AE_HIST_STS_ENABLE STS_ENABLE; + union REG_ISP_AE_HIST_AE_ALGO_ENABLE AE_ALGO_ENABLE; + union REG_ISP_AE_HIST_AE_HIST_LOW AE_HIST_LOW; + union REG_ISP_AE_HIST_AE_HIST_HIGH AE_HIST_HIGH; + union REG_ISP_AE_HIST_AE_TOP AE_TOP; + union REG_ISP_AE_HIST_AE_BOT AE_BOT; + union REG_ISP_AE_HIST_AE_OVEREXP_THR AE_OVEREXP_THR; + union REG_ISP_AE_HIST_AE_NUM_GAPLINE AE_NUM_GAPLINE; + uint32_t _resv_0x124[23]; + union REG_ISP_AE_HIST_AE_SIMPLE2A_RESULT_LUMA AE_SIMPLE2A_RESULT_LUMA; + union REG_ISP_AE_HIST_AE_SIMPLE2A_RESULT_RGAIN AE_SIMPLE2A_RESULT_RGAIN; + union REG_ISP_AE_HIST_AE_SIMPLE2A_RESULT_BGAIN AE_SIMPLE2A_RESULT_BGAIN; + uint32_t _resv_0x18c[29]; + union REG_ISP_AE_HIST_AE_WGT_00 AE_WGT_00; + union REG_ISP_AE_HIST_AE_WGT_01 AE_WGT_01; + union REG_ISP_AE_HIST_AE_WGT_02 AE_WGT_02; + union REG_ISP_AE_HIST_AE_WGT_03 AE_WGT_03; + union REG_ISP_AE_HIST_AE_WGT_04 AE_WGT_04; + union REG_ISP_AE_HIST_AE_WGT_05 AE_WGT_05; + union REG_ISP_AE_HIST_AE_WGT_06 AE_WGT_06; + union REG_ISP_AE_HIST_AE_WGT_07 AE_WGT_07; + union REG_ISP_AE_HIST_AE_WGT_08 AE_WGT_08; + union REG_ISP_AE_HIST_AE_WGT_09 AE_WGT_09; + union REG_ISP_AE_HIST_AE_WGT_10 AE_WGT_10; + union REG_ISP_AE_HIST_AE_WGT_11 AE_WGT_11; + union REG_ISP_AE_HIST_AE_WGT_12 AE_WGT_12; + union REG_ISP_AE_HIST_AE_WGT_13 AE_WGT_13; + union REG_ISP_AE_HIST_AE_WGT_14 AE_WGT_14; + union REG_ISP_AE_HIST_AE_WGT_15 AE_WGT_15; + union REG_ISP_AE_HIST_AE_WGT_16 AE_WGT_16; + union REG_ISP_AE_HIST_AE_WGT_17 AE_WGT_17; + union REG_ISP_AE_HIST_AE_WGT_18 AE_WGT_18; + union REG_ISP_AE_HIST_AE_WGT_19 AE_WGT_19; + union REG_ISP_AE_HIST_AE_WGT_20 AE_WGT_20; + union REG_ISP_AE_HIST_AE_WGT_21 AE_WGT_21; + union REG_ISP_AE_HIST_AE_WGT_22 AE_WGT_22; + union REG_ISP_AE_HIST_AE_WGT_23 AE_WGT_23; + union REG_ISP_AE_HIST_AE_WGT_24 AE_WGT_24; + union REG_ISP_AE_HIST_AE_WGT_25 AE_WGT_25; + union REG_ISP_AE_HIST_AE_WGT_26 AE_WGT_26; + union REG_ISP_AE_HIST_AE_WGT_27 AE_WGT_27; + union REG_ISP_AE_HIST_AE_WGT_28 AE_WGT_28; + union REG_ISP_AE_HIST_AE_WGT_29 AE_WGT_29; + union REG_ISP_AE_HIST_AE_WGT_30 AE_WGT_30; + union REG_ISP_AE_HIST_AE_WGT_31 AE_WGT_31; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_GMS_T { + union REG_ISP_GMS_STATUS GMS_STATUS; + union REG_ISP_GMS_GRACE_RESET GMS_GRACE_RESET; + union REG_ISP_GMS_MONITOR GMS_MONITOR; + union REG_ISP_GMS_ENABLE GMS_ENABLE; + uint32_t _resv_0x10[1]; + union REG_ISP_GMS_FLOW GMS_FLOW; + union REG_ISP_GMS_START_X GMS_START_X; + union REG_ISP_GMS_START_Y GMS_START_Y; + union REG_ISP_GMS_LOCATION GMS_LOCATION; + uint32_t _resv_0x24[1]; + union REG_ISP_GMS_X_SIZEM1 GMS_X_SIZEM1; + union REG_ISP_GMS_Y_SIZEM1 GMS_Y_SIZEM1; + union REG_ISP_GMS_X_GAP GMS_X_GAP; + union REG_ISP_GMS_Y_GAP GMS_Y_GAP; + union REG_ISP_GMS_DUMMY GMS_DUMMY; + uint32_t _resv_0x3c[1]; + union REG_ISP_GMS_MEM_SW_MODE GMS_SW_MODE; + union REG_ISP_GMS_MEM_SW_RADDR GMS_SW_RADDR; + union REG_ISP_GMS_MEM_SW_RDATA GMS_SW_RDATA; + union REG_ISP_GMS_MONITOR_SELECT GMS_MONITOR_SELECT; + uint32_t _resv_0x50[20]; + union REG_ISP_GMS_DMI_ENABLE DMI_ENABLE; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_AF_T { + union REG_ISP_AF_STATUS STATUS; + union REG_ISP_AF_GRACE_RESET GRACE_RESET; + union REG_ISP_AF_MONITOR MONITOR; + union REG_ISP_AF_BYPASS BYPASS; + union REG_ISP_AF_KICKOFF KICKOFF; + union REG_ISP_AF_ENABLES ENABLES; + union REG_ISP_AF_OFFSET_X OFFSET_X; + union REG_ISP_AF_MXN_IMAGE_WIDTH_M1 MXN_IMAGE_WIDTH_M1; + union REG_ISP_AF_BLOCK_WIDTH BLOCK_WIDTH; + union REG_ISP_AF_BLOCK_HEIGHT BLOCK_HEIGHT; + union REG_ISP_AF_BLOCK_NUM_X BLOCK_NUM_X; + union REG_ISP_AF_BLOCK_NUM_Y BLOCK_NUM_Y; + uint32_t _resv_0x30[1]; + union REG_ISP_AF_HOR_LOW_PASS_VALUE_SHIFT HOR_LOW_PASS_VALUE_SHIFT; + union REG_ISP_AF_CORNING_OFFSET_HORIZONTAL_0 OFFSET_HORIZONTAL_0; + union REG_ISP_AF_CORNING_OFFSET_HORIZONTAL_1 OFFSET_HORIZONTAL_1; + union REG_ISP_AF_CORNING_OFFSET_VERTICAL OFFSET_VERTICAL; + union REG_ISP_AF_HIGH_Y_THRE HIGH_Y_THRE; + union REG_ISP_AF_LOW_PASS_HORIZON LOW_PASS_HORIZON; + union REG_ISP_AF_LOCATION LOCATION; + union REG_ISP_AF_HIGH_PASS_HORIZON_0 HIGH_PASS_HORIZON_0; + union REG_ISP_AF_HIGH_PASS_HORIZON_1 HIGH_PASS_HORIZON_1; + union REG_ISP_AF_HIGH_PASS_VERTICAL_0 HIGH_PASS_VERTICAL_0; + union REG_ISP_AF_MEM_SW_MODE SW_MODE; + union REG_ISP_AF_MONITOR_SELECT MONITOR_SELECT; + uint32_t _resv_0x64[2]; + union REG_ISP_AF_IMAGE_WIDTH IMAGE_WIDTH; + union REG_ISP_AF_DUMMY DUMMY; + union REG_ISP_AF_MEM_SW_RADDR SW_RADDR; + union REG_ISP_AF_MEM_SW_RDATA SW_RDATA; + union REG_ISP_AF_MXN_BORDER MXN_BORDER; + union REG_ISP_AF_TH_LOW TH_LOW; + union REG_ISP_AF_GAIN_LOW GAIN_LOW; + union REG_ISP_AF_SLOP_LOW SLOP_LOW; + uint32_t _resv_0x8c[5]; + union REG_ISP_AF_DMI_ENABLE DMI_ENABLE; + uint32_t _resv_0xa4[45]; + union REG_ISP_AF_SQUARE_ENABLE SQUARE_ENABLE; + uint32_t _resv_0x15c[2]; + union REG_ISP_AF_OUTSHIFT OUTSHIFT; + uint32_t _resv_0x168[1]; + union REG_ISP_AF_NUM_GAPLINE NUM_GAPLINE; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_PRE_RAW_FE_T { + union REG_PRE_RAW_FE_PRE_RAW_CTRL PRE_RAW_CTRL; + union REG_PRE_RAW_FE_PRE_RAW_FRAME_SIZE PRE_RAW_FRAME_SIZE; + uint32_t _resv_0x8[2]; + union REG_PRE_RAW_FE_LE_RGBMAP_GRID_NUMBER LE_RGBMAP_GRID_NUMBER; + union REG_PRE_RAW_FE_SE_RGBMAP_GRID_NUMBER SE_RGBMAP_GRID_NUMBER; + uint32_t _resv_0x18[2]; + union REG_PRE_RAW_FE_PRE_RAW_POST_NO_RSPD_CYC PRE_RAW_POST_NO_RSPD_CYC; + union REG_PRE_RAW_FE_PRE_RAW_POST_RGBMAP_NO_RSPD_CYC PRE_RAW_POST_RGBMAP_NO_RSPD_CYC; + union REG_PRE_RAW_FE_PRE_RAW_FRAME_VLD PRE_RAW_FRAME_VLD; + union REG_PRE_RAW_FE_PRE_RAW_DEBUG_STATE PRE_RAW_DEBUG_STATE; + union REG_PRE_RAW_FE_PRE_RAW_DUMMY PRE_RAW_DUMMY; + union REG_PRE_RAW_FE_PRE_RAW_DEBUG_INFO PRE_RAW_INFO; + uint32_t _resv_0x38[6]; + union REG_PRE_RAW_FE_IDLE_INFO FE_IDLE_INFO; + uint32_t _resv_0x54[3]; + union REG_PRE_RAW_FE_CHECK_SUM FE_CHECK_SUM; + union REG_PRE_RAW_FE_CHECK_SUM_VALUE FE_CHECK_SUM_VALUE; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CSI_BDG_DVP_T { + union REG_ISP_CSI_BDG_DVP_BDG_TOP_CTRL CSI_BDG_TOP_CTRL; + union REG_ISP_CSI_BDG_DVP_BDG_INTERRUPT_CTRL CSI_BDG_INTERRUPT_CTRL; + union REG_ISP_CSI_BDG_DVP_BDG_DMA_DPCM_MODE CSI_BDG_DMA_DPCM_MODE; + union REG_ISP_CSI_BDG_DVP_BDG_DMA_LD_DPCM_MODE CSI_BDG_DMA_LD_DPCM_MODE; + union REG_ISP_CSI_BDG_DVP_CH0_SIZE CH0_SIZE; + uint32_t _resv_0x14[3]; + union REG_ISP_CSI_BDG_DVP_CH0_CROP_EN CH0_CROP_EN; + union REG_ISP_CSI_BDG_DVP_CH0_HORZ_CROP CH0_HORZ_CROP; + union REG_ISP_CSI_BDG_DVP_CH0_VERT_CROP CH0_VERT_CROP; + union REG_ISP_CSI_BDG_DVP_CH0_BLC_SUM CH0_BLC_SUM; + uint32_t _resv_0x30[12]; + union REG_ISP_CSI_BDG_DVP_PAT_GEN_CTRL CSI_PAT_GEN_CTRL; + union REG_ISP_CSI_BDG_DVP_PAT_IDX_CTRL CSI_PAT_IDX_CTRL; + union REG_ISP_CSI_BDG_DVP_PAT_COLOR_0 CSI_PAT_COLOR_0; + union REG_ISP_CSI_BDG_DVP_PAT_COLOR_1 CSI_PAT_COLOR_1; + union REG_ISP_CSI_BDG_DVP_BACKGROUND_COLOR_0 CSI_BACKGROUND_COLOR_0; + union REG_ISP_CSI_BDG_DVP_BACKGROUND_COLOR_1 CSI_BACKGROUND_COLOR_1; + union REG_ISP_CSI_BDG_DVP_FIX_COLOR_0 CSI_FIX_COLOR_0; + union REG_ISP_CSI_BDG_DVP_FIX_COLOR_1 CSI_FIX_COLOR_1; + union REG_ISP_CSI_BDG_DVP_MDE_V_SIZE CSI_MDE_V_SIZE; + union REG_ISP_CSI_BDG_DVP_MDE_H_SIZE CSI_MDE_H_SIZE; + union REG_ISP_CSI_BDG_DVP_FDE_V_SIZE CSI_FDE_V_SIZE; + union REG_ISP_CSI_BDG_DVP_FDE_H_SIZE CSI_FDE_H_SIZE; + union REG_ISP_CSI_BDG_DVP_HSYNC_CTRL CSI_HSYNC_CTRL; + union REG_ISP_CSI_BDG_DVP_VSYNC_CTRL CSI_VSYNC_CTRL; + union REG_ISP_CSI_BDG_DVP_TGEN_TT_SIZE CSI_TGEN_TT_SIZE; + union REG_ISP_CSI_BDG_DVP_LINE_INTP_HEIGHT_0 LINE_INTP_HEIGHT_0; + union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_0 CH0_DEBUG_0; + union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_1 CH0_DEBUG_1; + union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_2 CH0_DEBUG_2; + union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_3 CH0_DEBUG_3; + uint32_t _resv_0xb0[12]; + union REG_ISP_CSI_BDG_DVP_INTERRUPT_STATUS_0 INTERRUPT_STATUS_0; + union REG_ISP_CSI_BDG_DVP_INTERRUPT_STATUS_1 INTERRUPT_STATUS_1; + union REG_ISP_CSI_BDG_DVP_BDG_DEBUG BDG_DEBUG; + union REG_ISP_CSI_BDG_DVP_OUT_VSYNC_LINE_DELAY CSI_OUT_VSYNC_LINE_DELAY; + union REG_ISP_CSI_BDG_DVP_WR_URGENT_CTRL CSI_WR_URGENT_CTRL; + union REG_ISP_CSI_BDG_DVP_RD_URGENT_CTRL CSI_RD_URGENT_CTRL; + union REG_ISP_CSI_BDG_DVP_DUMMY CSI_DUMMY; + uint32_t _resv_0xfc[1]; + union REG_ISP_CSI_BDG_DVP_SLICE_LINE_INTP_HEIGHT_0 SLICE_LINE_INTP_HEIGHT_0; + uint32_t _resv_0x104[3]; + union REG_ISP_CSI_BDG_DVP_WDMA_CH0_CROP_EN WDMA_CH0_CROP_EN; + union REG_ISP_CSI_BDG_DVP_WDMA_CH0_HORZ_CROP WDMA_CH0_HORZ_CROP; + union REG_ISP_CSI_BDG_DVP_WDMA_CH0_VERT_CROP WDMA_CH0_VERT_CROP; + uint32_t _resv_0x11c[13]; + union REG_ISP_CSI_BDG_DVP_TRIG_DLY_CONTROL_0 TRIG_DLY_CONTROL_0; + union REG_ISP_CSI_BDG_DVP_TRIG_DLY_CONTROL_1 TRIG_DLY_CONTROL_1; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_CROP_T { + union REG_CROP_0 REG_0; + union REG_CROP_1 REG_1; + union REG_CROP_2 REG_2; + union REG_CROP_3 REG_3; + union REG_CROP_DUMMY DUMMY; + union REG_CROP_DEBUG DEBUG; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_BLC_T { + union REG_ISP_BLC_0 BLC_0; + union REG_ISP_BLC_1 BLC_1; + union REG_ISP_BLC_2 BLC_2; + union REG_ISP_BLC_3 BLC_3; + union REG_ISP_BLC_4 BLC_4; + union REG_ISP_BLC_5 BLC_5; + union REG_ISP_BLC_6 BLC_6; + union REG_ISP_BLC_7 BLC_7; + union REG_ISP_BLC_8 BLC_8; + uint32_t _resv_0x24[1]; + union REG_ISP_BLC_DUMMY BLC_DUMMY; + uint32_t _resv_0x2c[1]; + union REG_ISP_BLC_LOCATION BLC_LOCATION; + union REG_ISP_BLC_9 BLC_9; + union REG_ISP_BLC_A BLC_A; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_LMAP_T { + union REG_ISP_LMAP_LMP_0 LMP_0; + union REG_ISP_LMAP_LMP_1 LMP_1; + union REG_ISP_LMAP_LMP_2 LMP_2; + union REG_ISP_LMAP_LMP_DEBUG_0 LMP_DEBUG_0; + union REG_ISP_LMAP_LMP_DEBUG_1 LMP_DEBUG_1; + union REG_ISP_LMAP_DUMMY DUMMY; + union REG_ISP_LMAP_LMP_DEBUG_2 LMP_DEBUG_2; + uint32_t _resv_0x1c[1]; + union REG_ISP_LMAP_LMP_3 LMP_3; + union REG_ISP_LMAP_LMP_4 LMP_4; + union REG_ISP_LMAP_LMP_SET_SEL LMP_SET_SEL; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_RGBMAP_T { + union REG_ISP_RGBMAP_0 RGBMAP_0; + union REG_ISP_RGBMAP_1 RGBMAP_1; + union REG_ISP_RGBMAP_DEBUG_0 RGBMAP_DEBUG_0; + union REG_ISP_RGBMAP_DEBUG_1 RGBMAP_DEBUG_1; + union REG_ISP_RGBMAP_DUMMY DUMMY; + union REG_ISP_RGBMAP_2 RGBMAP_2; + union REG_ISP_RGBMAP_DEBUG_2 RGBMAP_DEBUG_2; + union REG_ISP_RGBMAP_3 RGBMAP_3; + union REG_ISP_RGBMAP_SET_SEL RGBMAP_SET_SEL; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_WBG_T { + union REG_ISP_WBG_0 WBG_0; + union REG_ISP_WBG_1 WBG_1; + union REG_ISP_WBG_2 WBG_2; + uint32_t _resv_0xc[1]; + union REG_ISP_WBG_4 WBG_4; + union REG_ISP_WBG_5 WBG_5; + union REG_ISP_WBG_6 WBG_6; + union REG_ISP_WBG_7 WBG_7; + uint32_t _resv_0x20[1]; + union REG_ISP_WBG_IMG_BAYERID IMG_BAYERID; + union REG_ISP_WBG_DUMMY WBG_DUMMY; + uint32_t _resv_0x2c[1]; + union REG_ISP_WBG_LOCATION WBG_LOCATION; + union REG_ISP_WBG_34 WBG_34; + union REG_ISP_WBG_38 WBG_38; + union REG_ISP_WBG_3C WBG_3C; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_DPC_T { + union REG_ISP_DPC_0 DPC_0; + union REG_ISP_DPC_1 DPC_1; + union REG_ISP_DPC_2 DPC_2; + union REG_ISP_DPC_3 DPC_3; + union REG_ISP_DPC_4 DPC_4; + union REG_ISP_DPC_5 DPC_5; + union REG_ISP_DPC_6 DPC_6; + union REG_ISP_DPC_7 DPC_7; + union REG_ISP_DPC_8 DPC_8; + union REG_ISP_DPC_9 DPC_9; + union REG_ISP_DPC_10 DPC_10; + union REG_ISP_DPC_11 DPC_11; + union REG_ISP_DPC_12 DPC_12; + union REG_ISP_DPC_13 DPC_13; + union REG_ISP_DPC_14 DPC_14; + union REG_ISP_DPC_15 DPC_15; + union REG_ISP_DPC_16 DPC_16; + union REG_ISP_DPC_17 DPC_17; + union REG_ISP_DPC_18 DPC_18; + union REG_ISP_DPC_19 DPC_19; + union REG_ISP_DPC_MEM_W0 DPC_MEM_W0; + union REG_ISP_DPC_WINDOW DPC_WINDOW; + union REG_ISP_DPC_MEM_ST_ADDR DPC_MEM_ST_ADDR; + uint32_t _resv_0x5c[1]; + union REG_ISP_DPC_CHECKSUM DPC_CHECKSUM; + union REG_ISP_DPC_INT DPC_INT; + uint32_t _resv_0x68[2]; + union REG_ISP_DPC_20 DPC_20; + union REG_ISP_DPC_21 DPC_21; + union REG_ISP_DPC_22 DPC_22; + union REG_ISP_DPC_23 DPC_23; + union REG_ISP_DPC_24 DPC_24; + union REG_ISP_DPC_25 DPC_25; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_RAW_TOP_T { + union REG_RAW_TOP_RAW_0 RAW_0; + union REG_RAW_TOP_READ_SEL READ_SEL; + union REG_RAW_TOP_RAW_1 RAW_1; + uint32_t _resv_0xc[1]; + union REG_RAW_TOP_CTRL CTRL; + union REG_RAW_TOP_UP_PQ_EN UP_PQ_EN; + union REG_RAW_TOP_RAW_2 RAW_2; + union REG_RAW_TOP_DUMMY DUMMY; + union REG_RAW_TOP_RAW_4 RAW_4; + union REG_RAW_TOP_STATUS STATUS; + union REG_RAW_TOP_DEBUG DEBUG; + union REG_RAW_TOP_DEBUG_SELECT DEBUG_SELECT; + union REG_RAW_TOP_RAW_BAYER_TYPE_TOPLEFT RAW_BAYER_TYPE_TOPLEFT; + union REG_RAW_TOP_RDMI_ENBALE RDMI_ENBALE; + union REG_RAW_TOP_RDMA_SIZE RDMA_SIZE; + union REG_RAW_TOP_DPCM_MODE DPCM_MODE; + union REG_RAW_TOP_STVALID_STATUS STVALID_STATUS; + union REG_RAW_TOP_STREADY_STATUS STREADY_STATUS; + union REG_RAW_TOP_PATGEN1 PATGEN1; + union REG_RAW_TOP_PATGEN2 PATGEN2; + union REG_RAW_TOP_PATGEN3 PATGEN3; + union REG_RAW_TOP_PATGEN4 PATGEN4; + union REG_RAW_TOP_RO_IDLE RO_IDLE; + union REG_RAW_TOP_RO_DONE RO_DONE; + union REG_RAW_TOP_DMA_IDLE DMA_IDLE; + uint32_t _resv_0x64[1]; + union REG_RAW_TOP_LE_LMAP_GRID_NUMBER LE_LMAP_GRID_NUMBER; + union REG_RAW_TOP_SE_LMAP_GRID_NUMBER SE_LMAP_GRID_NUMBER; + union REG_RAW_TOP_CHECKSUM_0 CHECKSUM_0; + union REG_RAW_TOP_CHECKSUM_1 CHECKSUM_1; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_RGBCAC_T { + union REG_ISP_RGBCAC_CTRL RGBCAC_CTRL; + union REG_ISP_RGBCAC_PURPLE_TH RGBCAC_PURPLE_TH; + union REG_ISP_RGBCAC_PURPLE_CBCR RGBCAC_PURPLE_CBCR; + union REG_ISP_RGBCAC_PURPLE_CBCR2 RGBCAC_PURPLE_CBCR2; + union REG_ISP_RGBCAC_PURPLE_CBCR3 RGBCAC_PURPLE_CBCR3; + union REG_ISP_RGBCAC_GREEN_CBCR RGBCAC_GREEN_CBCR; + union REG_ISP_RGBCAC_EDGE_CORING RGBCAC_EDGE_CORING; + union REG_ISP_RGBCAC_DEPURPLE_STR_RATIO_MIN RGBCAC_DEPURPLE_STR_RATIO_MIN; + union REG_ISP_RGBCAC_DEPURPLE_STR_RATIO_MAX RGBCAC_DEPURPLE_STR_RATIO_MAX; + union REG_ISP_RGBCAC_EDGE_WGT_LUT0 RGBCAC_EDGE_WGT_LUT0; + union REG_ISP_RGBCAC_EDGE_WGT_LUT1 RGBCAC_EDGE_WGT_LUT1; + union REG_ISP_RGBCAC_EDGE_WGT_LUT2 RGBCAC_EDGE_WGT_LUT2; + union REG_ISP_RGBCAC_EDGE_WGT_LUT3 RGBCAC_EDGE_WGT_LUT3; + union REG_ISP_RGBCAC_EDGE_WGT_LUT4 RGBCAC_EDGE_WGT_LUT4; + union REG_ISP_RGBCAC_LUMA RGBCAC_LUMA; + union REG_ISP_RGBCAC_LUMA_BLEND RGBCAC_LUMA_BLEND; + union REG_ISP_RGBCAC_LUMA_FILTER0 RGBCAC_LUMA_FILTER0; + union REG_ISP_RGBCAC_LUMA_FILTER1 RGBCAC_LUMA_FILTER1; + union REG_ISP_RGBCAC_VAR_FILTER0 RGBCAC_VAR_FILTER0; + union REG_ISP_RGBCAC_VAR_FILTER1 RGBCAC_VAR_FILTER1; + union REG_ISP_RGBCAC_CHROMA_FILTER0 RGBCAC_CHROMA_FILTER0; + union REG_ISP_RGBCAC_CHROMA_FILTER1 RGBCAC_CHROMA_FILTER1; + union REG_ISP_RGBCAC_CBCR_STR RGBCAC_CBCR_STR; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_BNR_T { + union REG_ISP_BNR_SHADOW_RD_SEL SHADOW_RD_SEL; + union REG_ISP_BNR_OUT_SEL OUT_SEL; + union REG_ISP_BNR_INDEX_CLR INDEX_CLR; + uint32_t _resv_0xc[61]; + union REG_ISP_BNR_NS_LUMA_TH_R NS_LUMA_TH_R; + union REG_ISP_BNR_NS_SLOPE_R NS_SLOPE_R; + union REG_ISP_BNR_NS_OFFSET0_R NS_OFFSET0_R; + union REG_ISP_BNR_NS_OFFSET1_R NS_OFFSET1_R; + union REG_ISP_BNR_NS_LUMA_TH_GR NS_LUMA_TH_GR; + union REG_ISP_BNR_NS_SLOPE_GR NS_SLOPE_GR; + union REG_ISP_BNR_NS_OFFSET0_GR NS_OFFSET0_GR; + union REG_ISP_BNR_NS_OFFSET1_GR NS_OFFSET1_GR; + union REG_ISP_BNR_NS_LUMA_TH_GB NS_LUMA_TH_GB; + union REG_ISP_BNR_NS_SLOPE_GB NS_SLOPE_GB; + union REG_ISP_BNR_NS_OFFSET0_GB NS_OFFSET0_GB; + union REG_ISP_BNR_NS_OFFSET1_GB NS_OFFSET1_GB; + union REG_ISP_BNR_NS_LUMA_TH_B NS_LUMA_TH_B; + union REG_ISP_BNR_NS_SLOPE_B NS_SLOPE_B; + union REG_ISP_BNR_NS_OFFSET0_B NS_OFFSET0_B; + union REG_ISP_BNR_NS_OFFSET1_B NS_OFFSET1_B; + union REG_ISP_BNR_NS_GAIN NS_GAIN; + union REG_ISP_BNR_STRENGTH_MODE STRENGTH_MODE; + union REG_ISP_BNR_INTENSITY_SEL INTENSITY_SEL; + uint32_t _resv_0x14c[45]; + union REG_ISP_BNR_WEIGHT_INTRA_0 WEIGHT_INTRA_0; + union REG_ISP_BNR_WEIGHT_INTRA_1 WEIGHT_INTRA_1; + union REG_ISP_BNR_WEIGHT_INTRA_2 WEIGHT_INTRA_2; + uint32_t _resv_0x20c[1]; + union REG_ISP_BNR_WEIGHT_NORM_1 WEIGHT_NORM_1; + union REG_ISP_BNR_WEIGHT_NORM_2 WEIGHT_NORM_2; + uint32_t _resv_0x218[3]; + union REG_ISP_BNR_VAR_TH VAR_TH; + union REG_ISP_BNR_WEIGHT_LUT WEIGHT_LUT; + union REG_ISP_BNR_WEIGHT_SM WEIGHT_SM; + union REG_ISP_BNR_WEIGHT_V WEIGHT_V; + union REG_ISP_BNR_WEIGHT_H WEIGHT_H; + union REG_ISP_BNR_WEIGHT_D45 WEIGHT_D45; + union REG_ISP_BNR_WEIGHT_D135 WEIGHT_D135; + union REG_ISP_BNR_NEIGHBOR_MAX NEIGHBOR_MAX; + uint32_t _resv_0x244[3]; + union REG_ISP_BNR_RES_K_SMOOTH RES_K_SMOOTH; + union REG_ISP_BNR_RES_K_TEXTURE RES_K_TEXTURE; + union REG_ISP_BNR_RES_MAX RES_MAX; + uint32_t _resv_0x25c[872]; + union REG_ISP_BNR_DUMMY DUMMY; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_CA_T { + union REG_CA_00 REG_00; + union REG_CA_04 REG_04; + union REG_CA_08 REG_08; + union REG_CA_0C REG_0C; + union REG_CA_10 REG_10; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CCM_T { + union REG_ISP_CCM_00 CCM_00; + union REG_ISP_CCM_01 CCM_01; + union REG_ISP_CCM_02 CCM_02; + union REG_ISP_CCM_10 CCM_10; + union REG_ISP_CCM_11 CCM_11; + union REG_ISP_CCM_12 CCM_12; + union REG_ISP_CCM_20 CCM_20; + union REG_ISP_CCM_21 CCM_21; + union REG_ISP_CCM_22 CCM_22; + union REG_ISP_CCM_CTRL CCM_CTRL; + union REG_ISP_CCM_DBG CCM_DBG; + uint32_t _resv_0x2c[1]; + union REG_ISP_CCM_DMY0 DMY0; + union REG_ISP_CCM_DMY1 DMY1; + union REG_ISP_CCM_DMY_R DMY_R; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_MMAP_T { + union REG_ISP_MMAP_00 REG_00; + union REG_ISP_MMAP_04 REG_04; + union REG_ISP_MMAP_08 REG_08; + union REG_ISP_MMAP_0C REG_0C; + union REG_ISP_MMAP_10 REG_10; + union REG_ISP_MMAP_14 REG_14; + union REG_ISP_MMAP_18 REG_18; + union REG_ISP_MMAP_1C REG_1C; + union REG_ISP_MMAP_20 REG_20; + union REG_ISP_MMAP_24 REG_24; + union REG_ISP_MMAP_28 REG_28; + union REG_ISP_MMAP_2C REG_2C; + union REG_ISP_MMAP_30 REG_30; + union REG_ISP_MMAP_34 REG_34; + union REG_ISP_MMAP_38 REG_38; + union REG_ISP_MMAP_3C REG_3C; + union REG_ISP_MMAP_40 REG_40; + union REG_ISP_MMAP_44 REG_44; + uint32_t _resv_0x48[1]; + union REG_ISP_MMAP_4C REG_4C; + union REG_ISP_MMAP_50 REG_50; + union REG_ISP_MMAP_54 REG_54; + union REG_ISP_MMAP_58 REG_58; + union REG_ISP_MMAP_5C REG_5C; + union REG_ISP_MMAP_60 REG_60; + union REG_ISP_MMAP_64 REG_64; + union REG_ISP_MMAP_68 REG_68; + union REG_ISP_MMAP_6C REG_6C; + union REG_ISP_MMAP_70 REG_70; + union REG_ISP_MMAP_74 REG_74; + union REG_ISP_MMAP_78 REG_78; + union REG_ISP_MMAP_7C REG_7C; + union REG_ISP_MMAP_80 REG_80; + union REG_ISP_MMAP_84 REG_84; + union REG_ISP_MMAP_88 REG_88; + union REG_ISP_MMAP_8C REG_8C; + union REG_ISP_MMAP_90 REG_90; + uint32_t _resv_0x94[3]; + union REG_ISP_MMAP_A0 REG_A0; + union REG_ISP_MMAP_A4 REG_A4; + union REG_ISP_MMAP_A8 REG_A8; + union REG_ISP_MMAP_AC REG_AC; + union REG_ISP_MMAP_B0 REG_B0; + union REG_ISP_MMAP_B4 REG_B4; + union REG_ISP_MMAP_B8 REG_B8; + union REG_ISP_MMAP_BC REG_BC; + union REG_ISP_MMAP_C0 REG_C0; + union REG_ISP_MMAP_C4 REG_C4; + union REG_ISP_MMAP_C8 REG_C8; + union REG_ISP_MMAP_CC REG_CC; + union REG_ISP_MMAP_D0 REG_D0; + union REG_ISP_MMAP_D4 REG_D4; + union REG_ISP_MMAP_D8 REG_D8; + union REG_ISP_MMAP_DC REG_DC; + union REG_ISP_MMAP_E0 REG_E0; + union REG_ISP_MMAP_E4 REG_E4; + union REG_ISP_MMAP_E8 REG_E8; + union REG_ISP_MMAP_EC REG_EC; + union REG_ISP_MMAP_F0 REG_F0; + union REG_ISP_MMAP_F4 REG_F4; + union REG_ISP_MMAP_F8 REG_F8; + union REG_ISP_MMAP_FC REG_FC; + union REG_ISP_MMAP_100 REG_100; + union REG_ISP_MMAP_104 REG_104; + union REG_ISP_MMAP_108 REG_108; + union REG_ISP_MMAP_10C REG_10C; + union REG_ISP_MMAP_110 REG_110; + union REG_ISP_MMAP_114 REG_114; + union REG_ISP_MMAP_118 REG_118; + union REG_ISP_MMAP_11C REG_11C; + union REG_ISP_MMAP_120 REG_120; + union REG_ISP_MMAP_124 REG_124; + union REG_ISP_MMAP_128 REG_128; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_GAMMA_T { + union REG_ISP_GAMMA_CTRL GAMMA_CTRL; + union REG_ISP_GAMMA_PROG_CTRL GAMMA_PROG_CTRL; + union REG_ISP_GAMMA_PROG_ST_ADDR GAMMA_PROG_ST_ADDR; + union REG_ISP_GAMMA_PROG_DATA GAMMA_PROG_DATA; + union REG_ISP_GAMMA_PROG_MAX GAMMA_PROG_MAX; + union REG_ISP_GAMMA_MEM_SW_RADDR GAMMA_SW_RADDR; + union REG_ISP_GAMMA_MEM_SW_RDATA GAMMA_SW_RDATA; + union REG_ISP_GAMMA_MEM_SW_RDATA_BG GAMMA_SW_RDATA_BG; + union REG_ISP_GAMMA_DBG GAMMA_DBG; + union REG_ISP_GAMMA_DMY0 GAMMA_DMY0; + union REG_ISP_GAMMA_DMY1 GAMMA_DMY1; + union REG_ISP_GAMMA_DMY_R GAMMA_DMY_R; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CLUT_T { + union REG_ISP_CLUT_CTRL CLUT_CTRL; + union REG_ISP_CLUT_PROG_ADDR CLUT_PROG_ADDR; + union REG_ISP_CLUT_PROG_DATA CLUT_PROG_DATA; + union REG_ISP_CLUT_PROG_RDATA CLUT_PROG_RDATA; + uint32_t _resv_0x10[4]; + union REG_ISP_CLUT_DBG CLUT_DBG; + union REG_ISP_CLUT_DMY0 CLUT_DMY0; + union REG_ISP_CLUT_DMY1 CLUT_DMY1; + union REG_ISP_CLUT_DMY_R CLUT_DMY_R; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_DEHAZE_T { + union REG_ISP_DEHAZE_DHZ_SMOOTH DHZ_SMOOTH; + union REG_ISP_DEHAZE_DHZ_SKIN DHZ_SKIN; + union REG_ISP_DEHAZE_DHZ_WGT DHZ_WGT; + uint32_t _resv_0xc[2]; + union REG_ISP_DEHAZE_DHZ_BYPASS DHZ_BYPASS; + union REG_ISP_DEHAZE_0 REG_0; + uint32_t _resv_0x1c[1]; + union REG_ISP_DEHAZE_1 REG_1; + union REG_ISP_DEHAZE_2 REG_2; + union REG_ISP_DEHAZE_28 REG_28; + union REG_ISP_DEHAZE_2C REG_2C; + union REG_ISP_DEHAZE_3 REG_3; + union REG_ISP_DEHAZE_5 REG_5; + union REG_ISP_DEHAZE_6 REG_6; + union REG_ISP_DEHAZE_7 REG_7; + union REG_ISP_DEHAZE_8 REG_8; + uint32_t _resv_0x44[3]; + union REG_ISP_DEHAZE_9 REG_9; + union REG_ISP_DEHAZE_10 REG_10; + union REG_ISP_DEHAZE_11 REG_11; + union REG_ISP_DEHAZE_12 REG_12; + union REG_ISP_DEHAZE_17 REG_17; + union REG_ISP_DEHAZE_18 REG_18; + union REG_ISP_DEHAZE_19 REG_19; + union REG_ISP_DEHAZE_20 REG_20; + union REG_ISP_DEHAZE_25 REG_25; + union REG_ISP_DEHAZE_26 REG_26; + union REG_ISP_DEHAZE_TMAP_00 TMAP_00; + union REG_ISP_DEHAZE_TMAP_01 TMAP_01; + union REG_ISP_DEHAZE_TMAP_02 TMAP_02; + union REG_ISP_DEHAZE_TMAP_03 TMAP_03; + union REG_ISP_DEHAZE_TMAP_04 TMAP_04; + union REG_ISP_DEHAZE_TMAP_05 TMAP_05; + union REG_ISP_DEHAZE_TMAP_06 TMAP_06; + union REG_ISP_DEHAZE_TMAP_07 TMAP_07; + union REG_ISP_DEHAZE_TMAP_08 TMAP_08; + union REG_ISP_DEHAZE_TMAP_09 TMAP_09; + union REG_ISP_DEHAZE_TMAP_10 TMAP_10; + union REG_ISP_DEHAZE_TMAP_11 TMAP_11; + union REG_ISP_DEHAZE_TMAP_12 TMAP_12; + union REG_ISP_DEHAZE_TMAP_13 TMAP_13; + union REG_ISP_DEHAZE_TMAP_14 TMAP_14; + union REG_ISP_DEHAZE_TMAP_15 TMAP_15; + union REG_ISP_DEHAZE_TMAP_16 TMAP_16; + union REG_ISP_DEHAZE_TMAP_17 TMAP_17; + union REG_ISP_DEHAZE_TMAP_18 TMAP_18; + union REG_ISP_DEHAZE_TMAP_19 TMAP_19; + union REG_ISP_DEHAZE_TMAP_20 TMAP_20; + union REG_ISP_DEHAZE_TMAP_21 TMAP_21; + union REG_ISP_DEHAZE_TMAP_22 TMAP_22; + union REG_ISP_DEHAZE_TMAP_23 TMAP_23; + union REG_ISP_DEHAZE_TMAP_24 TMAP_24; + union REG_ISP_DEHAZE_TMAP_25 TMAP_25; + union REG_ISP_DEHAZE_TMAP_26 TMAP_26; + union REG_ISP_DEHAZE_TMAP_27 TMAP_27; + union REG_ISP_DEHAZE_TMAP_28 TMAP_28; + union REG_ISP_DEHAZE_TMAP_29 TMAP_29; + union REG_ISP_DEHAZE_TMAP_30 TMAP_30; + union REG_ISP_DEHAZE_TMAP_31 TMAP_31; + union REG_ISP_DEHAZE_TMAP_32 TMAP_32; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CSC_T { + union REG_ISP_CSC_0 REG_0; + union REG_ISP_CSC_1 REG_1; + union REG_ISP_CSC_2 REG_2; + union REG_ISP_CSC_3 REG_3; + union REG_ISP_CSC_4 REG_4; + union REG_ISP_CSC_5 REG_5; + union REG_ISP_CSC_6 REG_6; + union REG_ISP_CSC_7 REG_7; + union REG_ISP_CSC_8 REG_8; + union REG_ISP_CSC_9 REG_9; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_RGB_DITHER_T { + union REG_ISP_RGB_DITHER_RGB_DITHER RGB_DITHER; + union REG_ISP_RGB_DITHER_RGB_DITHER_DEBUG0 RGB_DITHER_DEBUG0; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_DCI_T { + union REG_ISP_DCI_STATUS DCI_STATUS; + union REG_ISP_DCI_GRACE_RESET DCI_GRACE_RESET; + union REG_ISP_DCI_MONITOR DCI_MONITOR; + union REG_ISP_DCI_ENABLE DCI_ENABLE; + union REG_ISP_DCI_MAP_ENABLE DCI_MAP_ENABLE; + union REG_ISP_DCI_FLOW DCI_FLOW; + union REG_ISP_DCI_DEMO_MODE DCI_DEMO_MODE; + union REG_ISP_DCI_MONITOR_SELECT DCI_MONITOR_SELECT; + union REG_ISP_DCI_LOCATION DCI_LOCATION; + uint32_t _resv_0x24[1]; + union REG_ISP_DCI_PROG_DATA DCI_PROG_DATA; + union REG_ISP_DCI_PROG_CTRL DCI_PROG_CTRL; + union REG_ISP_DCI_PROG_MAX DCI_PROG_MAX; + union REG_ISP_DCI_CTRL DCI_CTRL; + union REG_ISP_DCI_MEM_SW_MODE DCI_SW_MODE; + union REG_ISP_DCI_MEM_RADDR DCI_MEM_RADDR; + union REG_ISP_DCI_MEM_RDATA DCI_MEM_RDATA; + union REG_ISP_DCI_DEBUG DCI_DEBUG; + union REG_ISP_DCI_DUMMY DCI_DUMMY; + union REG_ISP_DCI_IMG_WIDTHM1 IMG_WIDTHM1; + union REG_ISP_DCI_LUT_ORDER_SELECT DCI_LUT_ORDER_SELECT; + union REG_ISP_DCI_ROI_START DCI_ROI_START; + union REG_ISP_DCI_ROI_GEO DCI_ROI_GEO; + uint32_t _resv_0x5c[1]; + union REG_ISP_DCI_UV_GAIN_MAX DCI_UV_GAIN_MAX; + uint32_t _resv_0x64[7]; + union REG_ISP_DCI_MAP_DBG DCI_MAP_DBG; + uint32_t _resv_0x84[1]; + union REG_ISP_DCI_BAYER_STARTING DCI_BAYER_STARTING; + uint32_t _resv_0x8c[5]; + union REG_ISP_DCI_DMI_ENABLE DMI_ENABLE; + uint32_t _resv_0xa4[87]; + union REG_ISP_DCI_GAMMA_CTRL GAMMA_CTRL; + union REG_ISP_DCI_GAMMA_PROG_CTRL GAMMA_PROG_CTRL; + uint32_t _resv_0x208[1]; + union REG_ISP_DCI_GAMMA_PROG_DATA GAMMA_PROG_DATA; + union REG_ISP_DCI_GAMMA_PROG_MAX GAMMA_PROG_MAX; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_HIST_EDGE_V_T { + union REG_ISP_HIST_EDGE_V_STATUS STATUS; + union REG_ISP_HIST_EDGE_V_SW_CTL SW_CTL; + union REG_ISP_HIST_EDGE_V_BYPASS BYPASS; + union REG_ISP_HIST_EDGE_V_IP_CONFIG IP_CONFIG; + union REG_ISP_HIST_EDGE_V_HIST_EDGE_V_OFFSETX HIST_EDGE_V_OFFSETX; + union REG_ISP_HIST_EDGE_V_HIST_EDGE_V_OFFSETY HIST_EDGE_V_OFFSETY; + union REG_ISP_HIST_EDGE_V_MONITOR MONITOR; + union REG_ISP_HIST_EDGE_V_MONITOR_SELECT MONITOR_SELECT; + union REG_ISP_HIST_EDGE_V_LOCATION LOCATION; + union REG_ISP_HIST_EDGE_V_DUMMY DUMMY; + union REG_ISP_HIST_EDGE_V_DMI_ENABLE DMI_ENABLE; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_FUSION_T { + union REG_FUSION_FS_CTRL_0 FS_CTRL_0; + uint32_t _resv_0x4[1]; + union REG_FUSION_FS_SE_GAIN FS_SE_GAIN; + union REG_FUSION_FS_LUMA_THD FS_LUMA_THD; + union REG_FUSION_FS_WGT FS_WGT; + union REG_FUSION_FS_WGT_SLOPE FS_WGT_SLOPE; + union REG_FUSION_FS_SHDW_READ_SEL FS_SHDW_READ_SEL; + uint32_t _resv_0x1c[1]; + union REG_FUSION_FS_MOTION_LUT_IN FS_MOTION_LUT_IN; + union REG_FUSION_FS_MOTION_LUT_OUT_0 FS_MOTION_LUT_OUT_0; + union REG_FUSION_FS_MOTION_LUT_OUT_1 FS_MOTION_LUT_OUT_1; + union REG_FUSION_FS_MOTION_LUT_SLOPE_0 FS_MOTION_LUT_SLOPE_0; + union REG_FUSION_FS_MOTION_LUT_SLOPE_1 FS_MOTION_LUT_SLOPE_1; + union REG_FUSION_FS_CTRL_1 FS_CTRL_1; + uint32_t _resv_0x38[6]; + union REG_FUSION_FS_CALIB_CTRL_0 FS_CALIB_CTRL_0; + union REG_FUSION_FS_CALIB_CTRL_1 FS_CALIB_CTRL_1; + union REG_FUSION_FS_SE_FIX_OFFSET_0 FS_SE_FIX_OFFSET_0; + union REG_FUSION_FS_SE_FIX_OFFSET_1 FS_SE_FIX_OFFSET_1; + union REG_FUSION_FS_SE_FIX_OFFSET_2 FS_SE_FIX_OFFSET_2; + union REG_FUSION_FS_CALIB_OUT_0 FS_CALIB_OUT_0; + union REG_FUSION_FS_CALIB_OUT_1 FS_CALIB_OUT_1; + union REG_FUSION_FS_CALIB_OUT_2 FS_CALIB_OUT_2; + union REG_FUSION_FS_CALIB_OUT_3 FS_CALIB_OUT_3; + union REG_FUSION_FS_LMAP_DARK_THD FS_LMAP_DARK_THD; + union REG_FUSION_FS_LMAP_DARK_WGT FS_LMAP_DARK_WGT; + union REG_FUSION_FS_LMAP_DARK_WGT_SLOPE FS_LMAP_DARK_WGT_SLOPE; + union REG_FUSION_FS_LMAP_BRIT_THD FS_LMAP_BRIT_THD; + union REG_FUSION_FS_LMAP_BRIT_WGT FS_LMAP_BRIT_WGT; + union REG_FUSION_FS_LMAP_BRIT_WGT_SLOPE FS_LMAP_BRIT_WGT_SLOPE; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_LTM_T { + union REG_LTM_H00 REG_H00; + union REG_LTM_H04 REG_H04; + union REG_LTM_H08 REG_H08; + union REG_LTM_H0C REG_H0C; + uint32_t _resv_0x10[1]; + union REG_LTM_H14 REG_H14; + union REG_LTM_H18 REG_H18; + union REG_LTM_H1C REG_H1C; + union REG_LTM_H20 REG_H20; + union REG_LTM_H24 REG_H24; + union REG_LTM_H28 REG_H28; + union REG_LTM_H2C REG_H2C; + union REG_LTM_H30 REG_H30; + union REG_LTM_H34 REG_H34; + union REG_LTM_H38 REG_H38; + union REG_LTM_H3C REG_H3C; + union REG_LTM_H40 REG_H40; + union REG_LTM_H44 REG_H44; + union REG_LTM_H48 REG_H48; + union REG_LTM_H4C REG_H4C; + union REG_LTM_H50 REG_H50; + union REG_LTM_H54 REG_H54; + union REG_LTM_H58 REG_H58; + union REG_LTM_H5C REG_H5C; + union REG_LTM_H60 REG_H60; + union REG_LTM_H64 REG_H64; + union REG_LTM_H68 REG_H68; + union REG_LTM_H6C REG_H6C; + union REG_LTM_H70 REG_H70; + union REG_LTM_H74 REG_H74; + union REG_LTM_H78 REG_H78; + union REG_LTM_H7C REG_H7C; + union REG_LTM_H80 REG_H80; + union REG_LTM_H84 REG_H84; + union REG_LTM_H88 REG_H88; + union REG_LTM_H8C REG_H8C; + union REG_LTM_H90 REG_H90; + union REG_LTM_H94 REG_H94; + union REG_LTM_H98 REG_H98; + union REG_LTM_H9C REG_H9C; + union REG_LTM_HA0 REG_HA0; + union REG_LTM_HA4 REG_HA4; + union REG_LTM_HA8 REG_HA8; + union REG_LTM_HAC REG_HAC; + union REG_LTM_HB0 REG_HB0; + union REG_LTM_HB4 REG_HB4; + union REG_LTM_HB8 REG_HB8; + union REG_LTM_HBC REG_HBC; + union REG_LTM_HC0 REG_HC0; + union REG_LTM_HC4 REG_HC4; + union REG_LTM_HC8 REG_HC8; + union REG_LTM_HCC REG_HCC; + union REG_LTM_HD0 REG_HD0; + union REG_LTM_HD4 REG_HD4; + union REG_LTM_HD8 REG_HD8; + union REG_LTM_HDC REG_HDC; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_CA_LITE_T { + union REG_CA_LITE_00 REG_00; + union REG_CA_LITE_04 REG_04; + union REG_CA_LITE_08 REG_08; + union REG_CA_LITE_0C REG_0C; + union REG_CA_LITE_10 REG_10; + union REG_CA_LITE_14 REG_14; + union REG_CA_LITE_18 REG_18; + union REG_CA_LITE_1C REG_1C; + union REG_CA_LITE_20 REG_20; + union REG_CA_LITE_24 REG_24; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_444_422_T { + union REG_ISP_444_422_0 REG_0; + union REG_ISP_444_422_1 REG_1; + union REG_ISP_444_422_2 REG_2; + union REG_ISP_444_422_3 REG_3; + union REG_ISP_444_422_4 REG_4; + union REG_ISP_444_422_5 REG_5; + union REG_ISP_444_422_6 REG_6; + uint32_t _resv_0x1c[1]; + union REG_ISP_444_422_8 REG_8; + union REG_ISP_444_422_9 REG_9; + union REG_ISP_444_422_10 REG_10; + union REG_ISP_444_422_11 REG_11; + union REG_ISP_444_422_12 REG_12; + union REG_ISP_444_422_13 REG_13; + union REG_ISP_444_422_14 REG_14; + union REG_ISP_444_422_15 REG_15; + union REG_ISP_444_422_16 REG_16; + union REG_ISP_444_422_17 REG_17; + union REG_ISP_444_422_18 REG_18; + union REG_ISP_444_422_19 REG_19; + union REG_ISP_444_422_20 REG_20; + union REG_ISP_444_422_21 REG_21; + union REG_ISP_444_422_22 REG_22; + union REG_ISP_444_422_23 REG_23; + union REG_ISP_444_422_24 REG_24; + union REG_ISP_444_422_25 REG_25; + union REG_ISP_444_422_26 REG_26; + union REG_ISP_444_422_27 REG_27; + union REG_ISP_444_422_28 REG_28; + union REG_ISP_444_422_29 REG_29; + union REG_ISP_444_422_30 REG_30; + union REG_ISP_444_422_31 REG_31; + union REG_ISP_444_422_80 REG_80; + union REG_ISP_444_422_84 REG_84; + union REG_ISP_444_422_88 REG_88; + union REG_ISP_444_422_8C REG_8C; + union REG_ISP_444_422_90 REG_90; + union REG_ISP_444_422_94 REG_94; + union REG_ISP_444_422_98 REG_98; + union REG_ISP_444_422_9C REG_9C; + union REG_ISP_444_422_A0 REG_A0; + union REG_ISP_444_422_A4 REG_A4; + union REG_ISP_444_422_A8 REG_A8; + union REG_ISP_444_422_AC REG_AC; + union REG_ISP_444_422_B0 REG_B0; + union REG_ISP_444_422_B4 REG_B4; + union REG_ISP_444_422_B8 REG_B8; + union REG_ISP_444_422_BC REG_BC; + union REG_ISP_444_422_C0 REG_C0; + union REG_ISP_444_422_C4 REG_C4; + union REG_ISP_444_422_C8 REG_C8; + union REG_ISP_444_422_CC REG_CC; + union REG_ISP_444_422_D0 REG_D0; + union REG_ISP_444_422_D4 REG_D4; + union REG_ISP_444_422_D8 REG_D8; + union REG_ISP_444_422_DC REG_DC; + union REG_ISP_444_422_E0 REG_E0; + union REG_ISP_444_422_E4 REG_E4; + union REG_ISP_444_422_E8 REG_E8; + union REG_ISP_444_422_EC REG_EC; + union REG_ISP_444_422_F0 REG_F0; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_FBCE_T { + union REG_FBCE_00 REG_00; + uint32_t _resv_0x4[3]; + union REG_FBCE_10 REG_10; + union REG_FBCE_14 REG_14; + union REG_FBCE_18 REG_18; + uint32_t _resv_0x1c[1]; + union REG_FBCE_20 REG_20; + union REG_FBCE_24 REG_24; + union REG_FBCE_28 REG_28; + union REG_FBCE_2C REG_2C; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_FBCD_T { + union REG_FBCD_00 REG_00; + uint32_t _resv_0x4[2]; + union REG_FBCD_0C REG_0C; + union REG_FBCD_10 REG_10; + union REG_FBCD_14 REG_14; + uint32_t _resv_0x18[2]; + union REG_FBCD_20 REG_20; + union REG_FBCD_24 REG_24; + union REG_FBCD_28 REG_28; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_YUV_DITHER_T { + union REG_ISP_YUV_DITHER_Y_DITHER Y_DITHER; + union REG_ISP_YUV_DITHER_UV_DITHER UV_DITHER; + union REG_ISP_YUV_DITHER_DEBUG_00 DEBUG_00; + union REG_ISP_YUV_DITHER_DEBUG_01 DEBUG_01; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_YNR_T { + union REG_ISP_YNR_SHADOW_RD_SEL SHADOW_RD_SEL; + union REG_ISP_YNR_OUT_SEL OUT_SEL; + union REG_ISP_YNR_INDEX_CLR INDEX_CLR; + union REG_ISP_YNR_NS0_LUMA_TH_00 NS0_LUMA_TH_00; + union REG_ISP_YNR_NS0_LUMA_TH_01 NS0_LUMA_TH_01; + union REG_ISP_YNR_NS0_LUMA_TH_02 NS0_LUMA_TH_02; + union REG_ISP_YNR_NS0_LUMA_TH_03 NS0_LUMA_TH_03; + union REG_ISP_YNR_NS0_LUMA_TH_04 NS0_LUMA_TH_04; + union REG_ISP_YNR_NS0_LUMA_TH_05 NS0_LUMA_TH_05; + union REG_ISP_YNR_NS0_SLOPE_00 NS0_SLOPE_00; + union REG_ISP_YNR_NS0_SLOPE_01 NS0_SLOPE_01; + union REG_ISP_YNR_NS0_SLOPE_02 NS0_SLOPE_02; + union REG_ISP_YNR_NS0_SLOPE_03 NS0_SLOPE_03; + union REG_ISP_YNR_NS0_SLOPE_04 NS0_SLOPE_04; + union REG_ISP_YNR_NS0_OFFSET_00 NS0_OFFSET_00; + union REG_ISP_YNR_NS0_OFFSET_01 NS0_OFFSET_01; + union REG_ISP_YNR_NS0_OFFSET_02 NS0_OFFSET_02; + union REG_ISP_YNR_NS0_OFFSET_03 NS0_OFFSET_03; + union REG_ISP_YNR_NS0_OFFSET_04 NS0_OFFSET_04; + union REG_ISP_YNR_NS0_OFFSET_05 NS0_OFFSET_05; + union REG_ISP_YNR_NS1_LUMA_TH_00 NS1_LUMA_TH_00; + union REG_ISP_YNR_NS1_LUMA_TH_01 NS1_LUMA_TH_01; + union REG_ISP_YNR_NS1_LUMA_TH_02 NS1_LUMA_TH_02; + union REG_ISP_YNR_NS1_LUMA_TH_03 NS1_LUMA_TH_03; + union REG_ISP_YNR_NS1_LUMA_TH_04 NS1_LUMA_TH_04; + union REG_ISP_YNR_NS1_LUMA_TH_05 NS1_LUMA_TH_05; + union REG_ISP_YNR_NS1_SLOPE_00 NS1_SLOPE_00; + union REG_ISP_YNR_NS1_SLOPE_01 NS1_SLOPE_01; + union REG_ISP_YNR_NS1_SLOPE_02 NS1_SLOPE_02; + union REG_ISP_YNR_NS1_SLOPE_03 NS1_SLOPE_03; + union REG_ISP_YNR_NS1_SLOPE_04 NS1_SLOPE_04; + union REG_ISP_YNR_NS1_OFFSET_00 NS1_OFFSET_00; + union REG_ISP_YNR_NS1_OFFSET_01 NS1_OFFSET_01; + union REG_ISP_YNR_NS1_OFFSET_02 NS1_OFFSET_02; + union REG_ISP_YNR_NS1_OFFSET_03 NS1_OFFSET_03; + union REG_ISP_YNR_NS1_OFFSET_04 NS1_OFFSET_04; + union REG_ISP_YNR_NS1_OFFSET_05 NS1_OFFSET_05; + union REG_ISP_YNR_NS_GAIN NS_GAIN; + union REG_ISP_YNR_MOTION_LUT_00 MOTION_LUT_00; + union REG_ISP_YNR_MOTION_LUT_01 MOTION_LUT_01; + union REG_ISP_YNR_MOTION_LUT_02 MOTION_LUT_02; + union REG_ISP_YNR_MOTION_LUT_03 MOTION_LUT_03; + union REG_ISP_YNR_MOTION_LUT_04 MOTION_LUT_04; + union REG_ISP_YNR_MOTION_LUT_05 MOTION_LUT_05; + union REG_ISP_YNR_MOTION_LUT_06 MOTION_LUT_06; + union REG_ISP_YNR_MOTION_LUT_07 MOTION_LUT_07; + union REG_ISP_YNR_MOTION_LUT_08 MOTION_LUT_08; + union REG_ISP_YNR_MOTION_LUT_09 MOTION_LUT_09; + union REG_ISP_YNR_MOTION_LUT_10 MOTION_LUT_10; + union REG_ISP_YNR_MOTION_LUT_11 MOTION_LUT_11; + union REG_ISP_YNR_MOTION_LUT_12 MOTION_LUT_12; + union REG_ISP_YNR_MOTION_LUT_13 MOTION_LUT_13; + union REG_ISP_YNR_MOTION_LUT_14 MOTION_LUT_14; + union REG_ISP_YNR_MOTION_LUT_15 MOTION_LUT_15; + union REG_ISP_YNR_WEIGHT_INTRA_0 WEIGHT_INTRA_0; + union REG_ISP_YNR_WEIGHT_INTRA_1 WEIGHT_INTRA_1; + union REG_ISP_YNR_WEIGHT_INTRA_2 WEIGHT_INTRA_2; + union REG_ISP_YNR_WEIGHT_NORM_1 WEIGHT_NORM_1; + union REG_ISP_YNR_WEIGHT_NORM_2 WEIGHT_NORM_2; + union REG_ISP_YNR_ALPHA_GAIN ALPHA_GAIN; + union REG_ISP_YNR_VAR_TH VAR_TH; + union REG_ISP_YNR_WEIGHT_SM WEIGHT_SM; + union REG_ISP_YNR_WEIGHT_V WEIGHT_V; + union REG_ISP_YNR_WEIGHT_H WEIGHT_H; + union REG_ISP_YNR_WEIGHT_D45 WEIGHT_D45; + union REG_ISP_YNR_WEIGHT_D135 WEIGHT_D135; + union REG_ISP_YNR_NEIGHBOR_MAX NEIGHBOR_MAX; + union REG_ISP_YNR_RES_K_SMOOTH RES_K_SMOOTH; + union REG_ISP_YNR_RES_K_TEXTURE RES_K_TEXTURE; + union REG_ISP_YNR_FILTER_MODE_EN FILTER_MODE_EN; + union REG_ISP_YNR_FILTER_MODE_ALPHA FILTER_MODE_ALPHA; + union REG_ISP_YNR_RES_MOT_LUT_00 RES_MOT_LUT_00; + union REG_ISP_YNR_RES_MOT_LUT_01 RES_MOT_LUT_01; + union REG_ISP_YNR_RES_MOT_LUT_02 RES_MOT_LUT_02; + union REG_ISP_YNR_RES_MOT_LUT_03 RES_MOT_LUT_03; + union REG_ISP_YNR_RES_MOT_LUT_04 RES_MOT_LUT_04; + union REG_ISP_YNR_RES_MOT_LUT_05 RES_MOT_LUT_05; + union REG_ISP_YNR_RES_MOT_LUT_06 RES_MOT_LUT_06; + union REG_ISP_YNR_RES_MOT_LUT_07 RES_MOT_LUT_07; + union REG_ISP_YNR_RES_MOT_LUT_08 RES_MOT_LUT_08; + union REG_ISP_YNR_RES_MOT_LUT_09 RES_MOT_LUT_09; + union REG_ISP_YNR_RES_MOT_LUT_10 RES_MOT_LUT_10; + union REG_ISP_YNR_RES_MOT_LUT_11 RES_MOT_LUT_11; + union REG_ISP_YNR_RES_MOT_LUT_12 RES_MOT_LUT_12; + union REG_ISP_YNR_RES_MOT_LUT_13 RES_MOT_LUT_13; + union REG_ISP_YNR_RES_MOT_LUT_14 RES_MOT_LUT_14; + union REG_ISP_YNR_RES_MOT_LUT_15 RES_MOT_LUT_15; + union REG_ISP_YNR_RES_MAX RES_MAX; + union REG_ISP_YNR_RES_MOTION_MAX RES_MOTION_MAX; + union REG_ISP_YNR_MOTION_NS_CLIP_MAX MOTION_NS_CLIP_MAX; + uint32_t _resv_0x168[38]; + union REG_ISP_YNR_WEIGHT_LUT WEIGHT_LUT; + uint32_t _resv_0x204[894]; + union REG_ISP_YNR_DUMMY DUMMY; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CNR_T { + union REG_ISP_CNR_ENABLE CNR_ENABLE; + union REG_ISP_CNR_STRENGTH_MODE CNR_STRENGTH_MODE; + union REG_ISP_CNR_PURPLE_TH CNR_PURPLE_TH; + union REG_ISP_CNR_PURPLE_CB CNR_PURPLE_CB; + union REG_ISP_CNR_GREEN_CB CNR_GREEN_CB; + union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_00 WEIGHT_LUT_INTER_CNR_00; + union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_04 WEIGHT_LUT_INTER_CNR_04; + union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_08 WEIGHT_LUT_INTER_CNR_08; + union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_12 WEIGHT_LUT_INTER_CNR_12; + uint32_t _resv_0x24[2]; + union REG_ISP_CNR_MOTION_LUT_0 CNR_MOTION_LUT_0; + union REG_ISP_CNR_MOTION_LUT_4 CNR_MOTION_LUT_4; + union REG_ISP_CNR_MOTION_LUT_8 CNR_MOTION_LUT_8; + union REG_ISP_CNR_MOTION_LUT_12 CNR_MOTION_LUT_12; + union REG_ISP_CNR_PURPLE_CB2 CNR_PURPLE_CB2; + union REG_ISP_CNR_MASK CNR_MASK; + union REG_ISP_CNR_DUMMY CNR_DUMMY; + union REG_ISP_CNR_EDGE_SCALE CNR_EDGE_SCALE; + union REG_ISP_CNR_EDGE_RATIO_SPEED CNR_EDGE_RATIO_SPEED; + union REG_ISP_CNR_DEPURPLE_WEIGHT_TH CNR_DEPURPLE_WEIGHT_TH; + union REG_ISP_CNR_CORING_MOTION_LUT_0 CNR_CORING_MOTION_LUT_0; + union REG_ISP_CNR_CORING_MOTION_LUT_4 CNR_CORING_MOTION_LUT_4; + union REG_ISP_CNR_CORING_MOTION_LUT_8 CNR_CORING_MOTION_LUT_8; + union REG_ISP_CNR_CORING_MOTION_LUT_12 CNR_CORING_MOTION_LUT_12; + union REG_ISP_CNR_EDGE_SCALE_LUT_0 CNR_EDGE_SCALE_LUT_0; + union REG_ISP_CNR_EDGE_SCALE_LUT_4 CNR_EDGE_SCALE_LUT_4; + union REG_ISP_CNR_EDGE_SCALE_LUT_8 CNR_EDGE_SCALE_LUT_8; + union REG_ISP_CNR_EDGE_SCALE_LUT_12 CNR_EDGE_SCALE_LUT_12; + union REG_ISP_CNR_EDGE_SCALE_LUT_16 CNR_EDGE_SCALE_LUT_16; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_YCURV_T { + union REG_ISP_YCURV_YCUR_CTRL YCUR_CTRL; + union REG_ISP_YCURV_YCUR_PROG_CTRL YCUR_PROG_CTRL; + union REG_ISP_YCURV_YCUR_PROG_ST_ADDR YCUR_PROG_ST_ADDR; + union REG_ISP_YCURV_YCUR_PROG_DATA YCUR_PROG_DATA; + union REG_ISP_YCURV_YCUR_PROG_MAX YCUR_PROG_MAX; + union REG_ISP_YCURV_YCUR_MEM_SW_MODE YCUR_SW_MODE; + union REG_ISP_YCURV_YCUR_MEM_SW_RDATA YCUR_SW_RDATA; + uint32_t _resv_0x1c[1]; + union REG_ISP_YCURV_YCUR_DBG YCUR_DBG; + union REG_ISP_YCURV_YCUR_DMY0 YCUR_DMY0; + union REG_ISP_YCURV_YCUR_DMY1 YCUR_DMY1; + union REG_ISP_YCURV_YCUR_DMY_R YCUR_DMY_R; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_TOP_T { + union REG_ISP_TOP_INT_EVENT0 INT_EVENT0; + union REG_ISP_TOP_INT_EVENT1 INT_EVENT1; + union REG_ISP_TOP_INT_EVENT2 INT_EVENT2; + union REG_ISP_TOP_ERROR_STS ERROR_STS; + union REG_ISP_TOP_INT_EVENT0_EN INT_EVENT0_EN; + union REG_ISP_TOP_INT_EVENT1_EN INT_EVENT1_EN; + union REG_ISP_TOP_INT_EVENT2_EN INT_EVENT2_EN; + uint32_t _resv_0x1c[1]; + union REG_ISP_TOP_SW_CTRL_0 SW_CTRL_0; + union REG_ISP_TOP_SW_CTRL_1 SW_CTRL_1; + union REG_ISP_TOP_CTRL_MODE_SEL0 CTRL_MODE_SEL0; + union REG_ISP_TOP_CTRL_MODE_SEL1 CTRL_MODE_SEL1; + union REG_ISP_TOP_SCENARIOS_CTRL SCENARIOS_CTRL; + union REG_ISP_TOP_SW_RST SW_RST; + union REG_ISP_TOP_BLK_IDLE BLK_IDLE; + union REG_ISP_TOP_BLK_IDLE_ENABLE BLK_IDLE_ENABLE; + union REG_ISP_TOP_DBUS0 DBUS0; + union REG_ISP_TOP_DBUS1 DBUS1; + union REG_ISP_TOP_DBUS2 DBUS2; + union REG_ISP_TOP_DBUS3 DBUS3; + union REG_ISP_TOP_FORCE_INT FORCE_INT; + union REG_ISP_TOP_DUMMY DUMMY; + union REG_ISP_TOP_IP_ENABLE0 IP_ENABLE0; + union REG_ISP_TOP_IP_ENABLE1 IP_ENABLE1; + union REG_ISP_TOP_IP_ENABLE2 IP_ENABLE2; + uint32_t _resv_0x64[1]; + union REG_ISP_TOP_CMDQ_CTRL CMDQ_CTRL; + union REG_ISP_TOP_CMDQ_TRIG CMDQ_TRIG; + union REG_ISP_TOP_TRIG_CNT TRIG_CNT; + union REG_ISP_TOP_SVN_VERSION SVN_VERSION; + union REG_ISP_TOP_TIMESTAMP TIMESTAMP; + uint32_t _resv_0x7c[1]; + union REG_ISP_TOP_SCLIE_ENABLE SCLIE_ENABLE; + union REG_ISP_TOP_W_SLICE_THRESH_MAIN W_SLICE_THRESH_MAIN; + union REG_ISP_TOP_W_SLICE_THRESH_SUB_CURR W_SLICE_THRESH_SUB_CURR; + union REG_ISP_TOP_W_SLICE_THRESH_SUB_PRV W_SLICE_THRESH_SUB_PRV; + union REG_ISP_TOP_R_SLICE_THRESH_MAIN R_SLICE_THRESH_MAIN; + union REG_ISP_TOP_R_SLICE_THRESH_SUB_CURR R_SLICE_THRESH_SUB_CURR; + union REG_ISP_TOP_R_SLICE_THRESH_SUB_PRV R_SLICE_THRESH_SUB_PRV; + union REG_ISP_TOP_RAW_FRAME_VALID RAW_FRAME_VALID; + union REG_ISP_TOP_FIRST_FRAME FIRST_FRAME; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_WDMA_CORE_T { + union REG_WDMA_CORE_SHADOW_RD_SEL SHADOW_RD_SEL; + union REG_WDMA_CORE_IP_DISABLE IP_DISABLE; + union REG_WDMA_CORE_DISABLE_SEGLEN DISABLE_SEGLEN; + union REG_WDMA_CORE_UP_RING_BASE UP_RING_BASE; + union REG_WDMA_CORE_NORM_STATUS0 NORM_STATUS0; + union REG_WDMA_CORE_NORM_STATUS1 NORM_STATUS1; + union REG_WDMA_CORE_RING_BUFFER_EN RING_BUFFER_EN; + uint32_t _resv_0x1c[1]; + union REG_WDMA_CORE_NORM_PERF NORM_PERF; + uint32_t _resv_0x24[1]; + union REG_WDMA_CORE_RING_PATCH_ENABLE RING_PATCH_ENABLE; + union REG_WDMA_CORE_SET_RING_BASE SET_RING_BASE; + union REG_WDMA_CORE_RING_BASE_ADDR_L RING_BASE_ADDR_L; + union REG_WDMA_CORE_RING_BASE_ADDR_H RING_BASE_ADDR_H; + uint32_t _resv_0x38[18]; + union REG_WDMA_CORE_RING_BUFFER_SIZE0 RING_BUFFER_SIZE0; + union REG_WDMA_CORE_RING_BUFFER_SIZE1 RING_BUFFER_SIZE1; + union REG_WDMA_CORE_RING_BUFFER_SIZE2 RING_BUFFER_SIZE2; + union REG_WDMA_CORE_RING_BUFFER_SIZE3 RING_BUFFER_SIZE3; + union REG_WDMA_CORE_RING_BUFFER_SIZE4 RING_BUFFER_SIZE4; + union REG_WDMA_CORE_RING_BUFFER_SIZE5 RING_BUFFER_SIZE5; + union REG_WDMA_CORE_RING_BUFFER_SIZE6 RING_BUFFER_SIZE6; + union REG_WDMA_CORE_RING_BUFFER_SIZE7 RING_BUFFER_SIZE7; + union REG_WDMA_CORE_RING_BUFFER_SIZE8 RING_BUFFER_SIZE8; + union REG_WDMA_CORE_RING_BUFFER_SIZE9 RING_BUFFER_SIZE9; + union REG_WDMA_CORE_RING_BUFFER_SIZE10 RING_BUFFER_SIZE10; + union REG_WDMA_CORE_RING_BUFFER_SIZE11 RING_BUFFER_SIZE11; + union REG_WDMA_CORE_RING_BUFFER_SIZE12 RING_BUFFER_SIZE12; + union REG_WDMA_CORE_RING_BUFFER_SIZE13 RING_BUFFER_SIZE13; + union REG_WDMA_CORE_RING_BUFFER_SIZE14 RING_BUFFER_SIZE14; + union REG_WDMA_CORE_RING_BUFFER_SIZE15 RING_BUFFER_SIZE15; + union REG_WDMA_CORE_RING_BUFFER_SIZE16 RING_BUFFER_SIZE16; + union REG_WDMA_CORE_RING_BUFFER_SIZE17 RING_BUFFER_SIZE17; + union REG_WDMA_CORE_RING_BUFFER_SIZE18 RING_BUFFER_SIZE18; + union REG_WDMA_CORE_RING_BUFFER_SIZE19 RING_BUFFER_SIZE19; + union REG_WDMA_CORE_RING_BUFFER_SIZE20 RING_BUFFER_SIZE20; + union REG_WDMA_CORE_RING_BUFFER_SIZE21 RING_BUFFER_SIZE21; + union REG_WDMA_CORE_RING_BUFFER_SIZE22 RING_BUFFER_SIZE22; + union REG_WDMA_CORE_RING_BUFFER_SIZE23 RING_BUFFER_SIZE23; + union REG_WDMA_CORE_RING_BUFFER_SIZE24 RING_BUFFER_SIZE24; + union REG_WDMA_CORE_RING_BUFFER_SIZE25 RING_BUFFER_SIZE25; + union REG_WDMA_CORE_RING_BUFFER_SIZE26 RING_BUFFER_SIZE26; + union REG_WDMA_CORE_RING_BUFFER_SIZE27 RING_BUFFER_SIZE27; + union REG_WDMA_CORE_RING_BUFFER_SIZE28 RING_BUFFER_SIZE28; + union REG_WDMA_CORE_RING_BUFFER_SIZE29 RING_BUFFER_SIZE29; + union REG_WDMA_CORE_RING_BUFFER_SIZE30 RING_BUFFER_SIZE30; + union REG_WDMA_CORE_RING_BUFFER_SIZE31 RING_BUFFER_SIZE31; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS0 NEXT_DMA_ADDR_STS0; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS1 NEXT_DMA_ADDR_STS1; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS2 NEXT_DMA_ADDR_STS2; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS3 NEXT_DMA_ADDR_STS3; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS4 NEXT_DMA_ADDR_STS4; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS5 NEXT_DMA_ADDR_STS5; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS6 NEXT_DMA_ADDR_STS6; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS7 NEXT_DMA_ADDR_STS7; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS8 NEXT_DMA_ADDR_STS8; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS9 NEXT_DMA_ADDR_STS9; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS10 NEXT_DMA_ADDR_STS10; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS11 NEXT_DMA_ADDR_STS11; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS12 NEXT_DMA_ADDR_STS12; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS13 NEXT_DMA_ADDR_STS13; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS14 NEXT_DMA_ADDR_STS14; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS15 NEXT_DMA_ADDR_STS15; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS16 NEXT_DMA_ADDR_STS16; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS17 NEXT_DMA_ADDR_STS17; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS18 NEXT_DMA_ADDR_STS18; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS19 NEXT_DMA_ADDR_STS19; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS20 NEXT_DMA_ADDR_STS20; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS21 NEXT_DMA_ADDR_STS21; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS22 NEXT_DMA_ADDR_STS22; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS23 NEXT_DMA_ADDR_STS23; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS24 NEXT_DMA_ADDR_STS24; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS25 NEXT_DMA_ADDR_STS25; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS26 NEXT_DMA_ADDR_STS26; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS27 NEXT_DMA_ADDR_STS27; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS28 NEXT_DMA_ADDR_STS28; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS29 NEXT_DMA_ADDR_STS29; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS30 NEXT_DMA_ADDR_STS30; + union REG_WDMA_CORE_NEXT_DMA_ADDR_STS31 NEXT_DMA_ADDR_STS31; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_RDMA_CORE_T { + union REG_RDMA_CORE_SHADOW_RD_SEL SHADOW_RD_SEL; + union REG_RDMA_CORE_IP_DISABLE IP_DISABLE; + uint32_t _resv_0x8[1]; + union REG_RDMA_CORE_UP_RING_BASE UP_RING_BASE; + union REG_RDMA_CORE_NORM_STATUS0 NORM_STATUS0; + union REG_RDMA_CORE_NORM_STATUS1 NORM_STATUS1; + union REG_RDMA_CORE_RING_BUFFER_EN RING_BUFFER_EN; + uint32_t _resv_0x1c[1]; + union REG_RDMA_CORE_NORM_PERF NORM_PERF; + union REG_RDMA_CORE_AR_PRIORITY_SEL AR_PRIORITY_SEL; + union REG_RDMA_CORE_RING_PATCH_ENABLE RING_PATCH_ENABLE; + union REG_RDMA_CORE_SET_RING_BASE SET_RING_BASE; + union REG_RDMA_CORE_RING_BASE_ADDR_L RING_BASE_ADDR_L; + union REG_RDMA_CORE_RING_BASE_ADDR_H RING_BASE_ADDR_H; + uint32_t _resv_0x38[18]; + union REG_RDMA_CORE_RING_BUFFER_SIZE0 RING_BUFFER_SIZE0; + union REG_RDMA_CORE_RING_BUFFER_SIZE1 RING_BUFFER_SIZE1; + union REG_RDMA_CORE_RING_BUFFER_SIZE2 RING_BUFFER_SIZE2; + union REG_RDMA_CORE_RING_BUFFER_SIZE3 RING_BUFFER_SIZE3; + union REG_RDMA_CORE_RING_BUFFER_SIZE4 RING_BUFFER_SIZE4; + union REG_RDMA_CORE_RING_BUFFER_SIZE5 RING_BUFFER_SIZE5; + union REG_RDMA_CORE_RING_BUFFER_SIZE6 RING_BUFFER_SIZE6; + union REG_RDMA_CORE_RING_BUFFER_SIZE7 RING_BUFFER_SIZE7; + union REG_RDMA_CORE_RING_BUFFER_SIZE8 RING_BUFFER_SIZE8; + union REG_RDMA_CORE_RING_BUFFER_SIZE9 RING_BUFFER_SIZE9; + union REG_RDMA_CORE_RING_BUFFER_SIZE10 RING_BUFFER_SIZE10; + union REG_RDMA_CORE_RING_BUFFER_SIZE11 RING_BUFFER_SIZE11; + union REG_RDMA_CORE_RING_BUFFER_SIZE12 RING_BUFFER_SIZE12; + union REG_RDMA_CORE_RING_BUFFER_SIZE13 RING_BUFFER_SIZE13; + union REG_RDMA_CORE_RING_BUFFER_SIZE14 RING_BUFFER_SIZE14; + union REG_RDMA_CORE_RING_BUFFER_SIZE15 RING_BUFFER_SIZE15; + union REG_RDMA_CORE_RING_BUFFER_SIZE16 RING_BUFFER_SIZE16; + union REG_RDMA_CORE_RING_BUFFER_SIZE17 RING_BUFFER_SIZE17; + union REG_RDMA_CORE_RING_BUFFER_SIZE18 RING_BUFFER_SIZE18; + union REG_RDMA_CORE_RING_BUFFER_SIZE19 RING_BUFFER_SIZE19; + union REG_RDMA_CORE_RING_BUFFER_SIZE20 RING_BUFFER_SIZE20; + union REG_RDMA_CORE_RING_BUFFER_SIZE21 RING_BUFFER_SIZE21; + union REG_RDMA_CORE_RING_BUFFER_SIZE22 RING_BUFFER_SIZE22; + union REG_RDMA_CORE_RING_BUFFER_SIZE23 RING_BUFFER_SIZE23; + union REG_RDMA_CORE_RING_BUFFER_SIZE24 RING_BUFFER_SIZE24; + union REG_RDMA_CORE_RING_BUFFER_SIZE25 RING_BUFFER_SIZE25; + union REG_RDMA_CORE_RING_BUFFER_SIZE26 RING_BUFFER_SIZE26; + union REG_RDMA_CORE_RING_BUFFER_SIZE27 RING_BUFFER_SIZE27; + union REG_RDMA_CORE_RING_BUFFER_SIZE28 RING_BUFFER_SIZE28; + union REG_RDMA_CORE_RING_BUFFER_SIZE29 RING_BUFFER_SIZE29; + union REG_RDMA_CORE_RING_BUFFER_SIZE30 RING_BUFFER_SIZE30; + union REG_RDMA_CORE_RING_BUFFER_SIZE31 RING_BUFFER_SIZE31; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS0 NEXT_DMA_ADDR_STS0; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS1 NEXT_DMA_ADDR_STS1; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS2 NEXT_DMA_ADDR_STS2; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS3 NEXT_DMA_ADDR_STS3; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS4 NEXT_DMA_ADDR_STS4; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS5 NEXT_DMA_ADDR_STS5; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS6 NEXT_DMA_ADDR_STS6; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS7 NEXT_DMA_ADDR_STS7; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS8 NEXT_DMA_ADDR_STS8; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS9 NEXT_DMA_ADDR_STS9; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS10 NEXT_DMA_ADDR_STS10; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS11 NEXT_DMA_ADDR_STS11; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS12 NEXT_DMA_ADDR_STS12; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS13 NEXT_DMA_ADDR_STS13; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS14 NEXT_DMA_ADDR_STS14; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS15 NEXT_DMA_ADDR_STS15; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS16 NEXT_DMA_ADDR_STS16; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS17 NEXT_DMA_ADDR_STS17; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS18 NEXT_DMA_ADDR_STS18; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS19 NEXT_DMA_ADDR_STS19; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS20 NEXT_DMA_ADDR_STS20; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS21 NEXT_DMA_ADDR_STS21; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS22 NEXT_DMA_ADDR_STS22; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS23 NEXT_DMA_ADDR_STS23; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS24 NEXT_DMA_ADDR_STS24; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS25 NEXT_DMA_ADDR_STS25; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS26 NEXT_DMA_ADDR_STS26; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS27 NEXT_DMA_ADDR_STS27; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS28 NEXT_DMA_ADDR_STS28; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS29 NEXT_DMA_ADDR_STS29; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS30 NEXT_DMA_ADDR_STS30; + union REG_RDMA_CORE_NEXT_DMA_ADDR_STS31 NEXT_DMA_ADDR_STS31; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CSI_BDG_LITE_T { + union REG_ISP_CSI_BDG_LITE_BDG_TOP_CTRL CSI_BDG_TOP_CTRL; + union REG_ISP_CSI_BDG_LITE_BDG_INTERRUPT_CTRL_0 CSI_BDG_INTERRUPT_CTRL_0; + union REG_ISP_CSI_BDG_LITE_BDG_INTERRUPT_CTRL_1 CSI_BDG_INTERRUPT_CTRL_1; + union REG_ISP_CSI_BDG_LITE_FRAME_VLD FRAME_VLD; + union REG_ISP_CSI_BDG_LITE_CH0_SIZE CH0_SIZE; + union REG_ISP_CSI_BDG_LITE_CH1_SIZE CH1_SIZE; + union REG_ISP_CSI_BDG_LITE_CH2_SIZE CH2_SIZE; + union REG_ISP_CSI_BDG_LITE_CH3_SIZE CH3_SIZE; + union REG_ISP_CSI_BDG_LITE_CH0_CROP_EN CH0_CROP_EN; + union REG_ISP_CSI_BDG_LITE_CH0_HORZ_CROP CH0_HORZ_CROP; + union REG_ISP_CSI_BDG_LITE_CH0_VERT_CROP CH0_VERT_CROP; + uint32_t _resv_0x2c[1]; + union REG_ISP_CSI_BDG_LITE_CH1_CROP_EN CH1_CROP_EN; + union REG_ISP_CSI_BDG_LITE_CH1_HORZ_CROP CH1_HORZ_CROP; + union REG_ISP_CSI_BDG_LITE_CH1_VERT_CROP CH1_VERT_CROP; + uint32_t _resv_0x3c[1]; + union REG_ISP_CSI_BDG_LITE_CH2_CROP_EN CH2_CROP_EN; + union REG_ISP_CSI_BDG_LITE_CH2_HORZ_CROP CH2_HORZ_CROP; + union REG_ISP_CSI_BDG_LITE_CH2_VERT_CROP CH2_VERT_CROP; + uint32_t _resv_0x4c[1]; + union REG_ISP_CSI_BDG_LITE_CH3_CROP_EN CH3_CROP_EN; + union REG_ISP_CSI_BDG_LITE_CH3_HORZ_CROP CH3_HORZ_CROP; + union REG_ISP_CSI_BDG_LITE_CH3_VERT_CROP CH3_VERT_CROP; + uint32_t _resv_0x5c[16]; + union REG_ISP_CSI_BDG_LITE_LINE_INTP_HEIGHT LINE_INTP_HEIGHT; + union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_0 CH0_DEBUG_0; + union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_1 CH0_DEBUG_1; + union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_2 CH0_DEBUG_2; + union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_3 CH0_DEBUG_3; + union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_0 CH1_DEBUG_0; + union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_1 CH1_DEBUG_1; + union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_2 CH1_DEBUG_2; + union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_3 CH1_DEBUG_3; + union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_0 CH2_DEBUG_0; + union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_1 CH2_DEBUG_1; + union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_2 CH2_DEBUG_2; + union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_3 CH2_DEBUG_3; + union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_0 CH3_DEBUG_0; + union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_1 CH3_DEBUG_1; + union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_2 CH3_DEBUG_2; + union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_3 CH3_DEBUG_3; + union REG_ISP_CSI_BDG_LITE_INTERRUPT_STATUS_0 INTERRUPT_STATUS_0; + union REG_ISP_CSI_BDG_LITE_INTERRUPT_STATUS_1 INTERRUPT_STATUS_1; + union REG_ISP_CSI_BDG_LITE_BDG_DEBUG BDG_DEBUG; + uint32_t _resv_0xec[1]; + union REG_ISP_CSI_BDG_LITE_WR_URGENT_CTRL CSI_WR_URGENT_CTRL; + union REG_ISP_CSI_BDG_LITE_RD_URGENT_CTRL CSI_RD_URGENT_CTRL; + union REG_ISP_CSI_BDG_LITE_DUMMY CSI_DUMMY; + uint32_t _resv_0xfc[21]; + union REG_ISP_CSI_BDG_LITE_TRIG_DLY_CONTROL_0 TRIG_DLY_CONTROL_0; + union REG_ISP_CSI_BDG_LITE_TRIG_DLY_CONTROL_1 TRIG_DLY_CONTROL_1; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_RAW_RDMA_CTRL_T { + union REG_RAW_RDMA_CTRL_READ_SEL READ_SEL; + union REG_RAW_RDMA_CTRL_CONFIG CONFIG; + union REG_RAW_RDMA_CTRL_RDMA_SIZE RDMA_SIZE; + union REG_RAW_RDMA_CTRL_DPCM_MODE DPCM_MODE; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_LDCI_T { + union REG_ISP_LDCI_ENABLE LDCI_ENABLE; + union REG_ISP_LDCI_STRENGTH LDCI_STRENGTH; + union REG_ISP_LDCI_LUMA_WGT_MAX LDCI_LUMA_WGT_MAX; + union REG_ISP_LDCI_IDX_IIR_ALPHA LDCI_IDX_IIR_ALPHA; + union REG_ISP_LDCI_EDGE_SCALE LDCI_EDGE_SCALE; + union REG_ISP_LDCI_EDGE_CLAMP LDCI_EDGE_CLAMP; + union REG_ISP_LDCI_IDX_FILTER_NORM LDCI_IDX_FILTER_NORM; + union REG_ISP_LDCI_TONE_CURVE_IDX_00 LDCI_TONE_CURVE_IDX_00; + uint32_t _resv_0x20[3]; + union REG_ISP_LDCI_BLK_SIZE_X LDCI_BLK_SIZE_X; + union REG_ISP_LDCI_BLK_SIZE_X1 LDCI_BLK_SIZE_X1; + union REG_ISP_LDCI_SUBBLK_SIZE_X LDCI_SUBBLK_SIZE_X; + union REG_ISP_LDCI_SUBBLK_SIZE_X1 LDCI_SUBBLK_SIZE_X1; + union REG_ISP_LDCI_INTERP_NORM_LR LDCI_INTERP_NORM_LR; + union REG_ISP_LDCI_SUB_INTERP_NORM_LR LDCI_SUB_INTERP_NORM_LR; + union REG_ISP_LDCI_MEAN_NORM_X LDCI_MEAN_NORM_X; + union REG_ISP_LDCI_VAR_NORM_Y LDCI_VAR_NORM_Y; + union REG_ISP_LDCI_UV_GAIN_MAX LDCI_UV_GAIN_MAX; + union REG_ISP_LDCI_IMG_WIDTHM1 LDCI_IMG_WIDTHM1; + uint32_t _resv_0x54[11]; + union REG_ISP_LDCI_STATUS LDCI_STATUS; + union REG_ISP_LDCI_GRACE_RESET LDCI_GRACE_RESET; + union REG_ISP_LDCI_MONITOR LDCI_MONITOR; + union REG_ISP_LDCI_FLOW LDCI_FLOW; + union REG_ISP_LDCI_MONITOR_SELECT LDCI_MONITOR_SELECT; + union REG_ISP_LDCI_LOCATION LDCI_LOCATION; + union REG_ISP_LDCI_DEBUG LDCI_DEBUG; + union REG_ISP_LDCI_DUMMY LDCI_DUMMY; + union REG_ISP_LDCI_DMI_ENABLE DMI_ENABLE; + uint32_t _resv_0xa4[1]; + union REG_ISP_LDCI_DCI_BAYER_STARTING DCI_BAYER_STARTING; + uint32_t _resv_0xac[1]; + union REG_ISP_LDCI_IDX_FILTER_LUT_00 LDCI_IDX_FILTER_LUT_00; + union REG_ISP_LDCI_IDX_FILTER_LUT_02 LDCI_IDX_FILTER_LUT_02; + union REG_ISP_LDCI_IDX_FILTER_LUT_04 LDCI_IDX_FILTER_LUT_04; + union REG_ISP_LDCI_IDX_FILTER_LUT_06 LDCI_IDX_FILTER_LUT_06; + union REG_ISP_LDCI_IDX_FILTER_LUT_08 LDCI_IDX_FILTER_LUT_08; + union REG_ISP_LDCI_IDX_FILTER_LUT_10 LDCI_IDX_FILTER_LUT_10; + union REG_ISP_LDCI_IDX_FILTER_LUT_12 LDCI_IDX_FILTER_LUT_12; + union REG_ISP_LDCI_IDX_FILTER_LUT_14 LDCI_IDX_FILTER_LUT_14; + union REG_ISP_LDCI_INTERP_NORM_LR1 LDCI_INTERP_NORM_LR1; + union REG_ISP_LDCI_SUB_INTERP_NORM_LR1 LDCI_SUB_INTERP_NORM_LR1; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_00 LDCI_TONE_CURVE_LUT_00_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_02 LDCI_TONE_CURVE_LUT_00_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_04 LDCI_TONE_CURVE_LUT_00_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_06 LDCI_TONE_CURVE_LUT_00_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_08 LDCI_TONE_CURVE_LUT_00_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_10 LDCI_TONE_CURVE_LUT_00_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_12 LDCI_TONE_CURVE_LUT_00_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_14 LDCI_TONE_CURVE_LUT_00_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_00 LDCI_TONE_CURVE_LUT_01_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_02 LDCI_TONE_CURVE_LUT_01_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_04 LDCI_TONE_CURVE_LUT_01_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_06 LDCI_TONE_CURVE_LUT_01_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_08 LDCI_TONE_CURVE_LUT_01_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_10 LDCI_TONE_CURVE_LUT_01_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_12 LDCI_TONE_CURVE_LUT_01_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_14 LDCI_TONE_CURVE_LUT_01_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_00 LDCI_TONE_CURVE_LUT_02_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_02 LDCI_TONE_CURVE_LUT_02_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_04 LDCI_TONE_CURVE_LUT_02_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_06 LDCI_TONE_CURVE_LUT_02_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_08 LDCI_TONE_CURVE_LUT_02_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_10 LDCI_TONE_CURVE_LUT_02_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_12 LDCI_TONE_CURVE_LUT_02_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_14 LDCI_TONE_CURVE_LUT_02_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_00 LDCI_TONE_CURVE_LUT_03_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_02 LDCI_TONE_CURVE_LUT_03_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_04 LDCI_TONE_CURVE_LUT_03_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_06 LDCI_TONE_CURVE_LUT_03_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_08 LDCI_TONE_CURVE_LUT_03_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_10 LDCI_TONE_CURVE_LUT_03_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_12 LDCI_TONE_CURVE_LUT_03_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_14 LDCI_TONE_CURVE_LUT_03_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_00 LDCI_TONE_CURVE_LUT_04_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_02 LDCI_TONE_CURVE_LUT_04_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_04 LDCI_TONE_CURVE_LUT_04_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_06 LDCI_TONE_CURVE_LUT_04_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_08 LDCI_TONE_CURVE_LUT_04_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_10 LDCI_TONE_CURVE_LUT_04_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_12 LDCI_TONE_CURVE_LUT_04_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_14 LDCI_TONE_CURVE_LUT_04_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_00 LDCI_TONE_CURVE_LUT_05_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_02 LDCI_TONE_CURVE_LUT_05_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_04 LDCI_TONE_CURVE_LUT_05_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_06 LDCI_TONE_CURVE_LUT_05_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_08 LDCI_TONE_CURVE_LUT_05_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_10 LDCI_TONE_CURVE_LUT_05_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_12 LDCI_TONE_CURVE_LUT_05_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_14 LDCI_TONE_CURVE_LUT_05_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_00 LDCI_TONE_CURVE_LUT_06_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_02 LDCI_TONE_CURVE_LUT_06_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_04 LDCI_TONE_CURVE_LUT_06_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_06 LDCI_TONE_CURVE_LUT_06_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_08 LDCI_TONE_CURVE_LUT_06_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_10 LDCI_TONE_CURVE_LUT_06_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_12 LDCI_TONE_CURVE_LUT_06_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_14 LDCI_TONE_CURVE_LUT_06_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_00 LDCI_TONE_CURVE_LUT_07_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_02 LDCI_TONE_CURVE_LUT_07_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_04 LDCI_TONE_CURVE_LUT_07_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_06 LDCI_TONE_CURVE_LUT_07_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_08 LDCI_TONE_CURVE_LUT_07_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_10 LDCI_TONE_CURVE_LUT_07_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_12 LDCI_TONE_CURVE_LUT_07_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_14 LDCI_TONE_CURVE_LUT_07_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_00 LDCI_TONE_CURVE_LUT_P_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_02 LDCI_TONE_CURVE_LUT_P_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_04 LDCI_TONE_CURVE_LUT_P_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_06 LDCI_TONE_CURVE_LUT_P_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_08 LDCI_TONE_CURVE_LUT_P_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_10 LDCI_TONE_CURVE_LUT_P_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_12 LDCI_TONE_CURVE_LUT_P_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_14 LDCI_TONE_CURVE_LUT_P_14; + uint32_t _resv_0x1f8[2]; + union REG_ISP_LDCI_LUMA_WGT_LUT_00 LDCI_LUMA_WGT_LUT_00; + union REG_ISP_LDCI_LUMA_WGT_LUT_04 LDCI_LUMA_WGT_LUT_04; + union REG_ISP_LDCI_LUMA_WGT_LUT_08 LDCI_LUMA_WGT_LUT_08; + union REG_ISP_LDCI_LUMA_WGT_LUT_12 LDCI_LUMA_WGT_LUT_12; + union REG_ISP_LDCI_LUMA_WGT_LUT_16 LDCI_LUMA_WGT_LUT_16; + union REG_ISP_LDCI_LUMA_WGT_LUT_20 LDCI_LUMA_WGT_LUT_20; + union REG_ISP_LDCI_LUMA_WGT_LUT_24 LDCI_LUMA_WGT_LUT_24; + union REG_ISP_LDCI_LUMA_WGT_LUT_28 LDCI_LUMA_WGT_LUT_28; + union REG_ISP_LDCI_LUMA_WGT_LUT_32 LDCI_LUMA_WGT_LUT_32; + uint32_t _resv_0x224[3]; + union REG_ISP_LDCI_VAR_FILTER_LUT_00 LDCI_VAR_FILTER_LUT_00; + union REG_ISP_LDCI_VAR_FILTER_LUT_02 LDCI_VAR_FILTER_LUT_02; + union REG_ISP_LDCI_VAR_FILTER_LUT_04 LDCI_VAR_FILTER_LUT_04; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_RGB_TOP_T { + union REG_ISP_RGB_TOP_0 REG_0; + union REG_ISP_RGB_TOP_1 REG_1; + union REG_ISP_RGB_TOP_2 REG_2; + union REG_ISP_RGB_TOP_3 REG_3; + union REG_ISP_RGB_TOP_4 REG_4; + union REG_ISP_RGB_TOP_5 REG_5; + union REG_ISP_RGB_TOP_6 REG_6; + union REG_ISP_RGB_TOP_7 REG_7; + union REG_ISP_RGB_TOP_8 REG_8; + union REG_ISP_RGB_TOP_9 REG_9; + uint32_t _resv_0x28[2]; + union REG_ISP_RGB_TOP_10 REG_10; + union REG_ISP_RGB_TOP_11 REG_11; + union REG_ISP_RGB_TOP_12 REG_12; + union REG_ISP_RGB_TOP_13 REG_13; + union REG_ISP_RGB_TOP_14 REG_14; + uint32_t _resv_0x44[3]; + union REG_ISP_RGB_TOP_DBG_IP_S_VLD DBG_IP_S_VLD; + union REG_ISP_RGB_TOP_DBG_IP_S_RDY DBG_IP_S_RDY; + union REG_ISP_RGB_TOP_DBG_DMI_VLD DBG_DMI_VLD; + union REG_ISP_RGB_TOP_DBG_DMI_RDY DBG_DMI_RDY; + union REG_ISP_RGB_TOP_PATGEN1 PATGEN1; + union REG_ISP_RGB_TOP_PATGEN2 PATGEN2; + union REG_ISP_RGB_TOP_PATGEN3 PATGEN3; + union REG_ISP_RGB_TOP_PATGEN4 PATGEN4; + union REG_ISP_RGB_TOP_CHK_SUM CHK_SUM; + union REG_ISP_RGB_TOP_DMA_IDLE DMA_IDLE; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_PRE_WDMA_CTRL_T { + union REG_PRE_WDMA_CTRL PRE_WDMA_CTRL; + union REG_PRE_WDMA_CTRL_PRE_RAW_BE_RDMI_DPCM PRE_RAW_BE_RDMI_DPCM; + union REG_PRE_WDMA_CTRL_DUMMY DUMMY; + uint32_t _resv_0xc[12]; + union REG_PRE_WDMA_CTRL_DEBUG_INFO INFO; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_EE_T { + union REG_ISP_EE_00 REG_00; + union REG_ISP_EE_04 REG_04; + uint32_t _resv_0x8[1]; + union REG_ISP_EE_0C REG_0C; + union REG_ISP_EE_10 REG_10; + uint32_t _resv_0x14[36]; + union REG_ISP_EE_A4 REG_A4; + union REG_ISP_EE_A8 REG_A8; + union REG_ISP_EE_AC REG_AC; + union REG_ISP_EE_B0 REG_B0; + union REG_ISP_EE_B4 REG_B4; + union REG_ISP_EE_B8 REG_B8; + union REG_ISP_EE_BC REG_BC; + union REG_ISP_EE_C0 REG_C0; + union REG_ISP_EE_C4 REG_C4; + union REG_ISP_EE_C8 REG_C8; + union REG_ISP_EE_HCC REG_HCC; + union REG_ISP_EE_HD0 REG_HD0; + uint32_t _resv_0xd4[23]; + union REG_ISP_EE_130 REG_130; + union REG_ISP_EE_134 REG_134; + union REG_ISP_EE_138 REG_138; + union REG_ISP_EE_13C REG_13C; + union REG_ISP_EE_140 REG_140; + union REG_ISP_EE_144 REG_144; + union REG_ISP_EE_148 REG_148; + union REG_ISP_EE_14C REG_14C; + union REG_ISP_EE_150 REG_150; + union REG_ISP_EE_154 REG_154; + union REG_ISP_EE_158 REG_158; + union REG_ISP_EE_15C REG_15C; + union REG_ISP_EE_160 REG_160; + union REG_ISP_EE_164 REG_164; + union REG_ISP_EE_168 REG_168; + union REG_ISP_EE_16C REG_16C; + union REG_ISP_EE_170 REG_170; + union REG_ISP_EE_174 REG_174; + union REG_ISP_EE_178 REG_178; + union REG_ISP_EE_17C REG_17C; + union REG_ISP_EE_180 REG_180; + union REG_ISP_EE_184 REG_184; + union REG_ISP_EE_188 REG_188; + union REG_ISP_EE_18C REG_18C; + union REG_ISP_EE_190 REG_190; + union REG_ISP_EE_194 REG_194; + union REG_ISP_EE_198 REG_198; + union REG_ISP_EE_19C REG_19C; + union REG_ISP_EE_1A0 REG_1A0; + union REG_ISP_EE_1A4 REG_1A4; + union REG_ISP_EE_1A8 REG_1A8; + uint32_t _resv_0x1ac[6]; + union REG_ISP_EE_1C4 REG_1C4; + union REG_ISP_EE_1C8 REG_1C8; + union REG_ISP_EE_1CC REG_1CC; + union REG_ISP_EE_1D0 REG_1D0; + union REG_ISP_EE_1D4 REG_1D4; + union REG_ISP_EE_1D8 REG_1D8; + union REG_ISP_EE_1DC REG_1DC; + union REG_ISP_EE_1E0 REG_1E0; + union REG_ISP_EE_1E4 REG_1E4; + union REG_ISP_EE_1E8 REG_1E8; + union REG_ISP_EE_1EC REG_1EC; + union REG_ISP_EE_1F0 REG_1F0; + union REG_ISP_EE_1F4 REG_1F4; + union REG_ISP_EE_1F8 REG_1F8; + union REG_ISP_EE_1FC REG_1FC; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_YGAMMA_T { + union REG_YGAMMA_GAMMA_CTRL GAMMA_CTRL; + union REG_YGAMMA_GAMMA_PROG_CTRL GAMMA_PROG_CTRL; + union REG_YGAMMA_GAMMA_PROG_ST_ADDR GAMMA_PROG_ST_ADDR; + union REG_YGAMMA_GAMMA_PROG_DATA GAMMA_PROG_DATA; + union REG_YGAMMA_GAMMA_PROG_MAX GAMMA_PROG_MAX; + union REG_YGAMMA_GAMMA_MEM_SW_RADDR GAMMA_SW_RADDR; + union REG_YGAMMA_GAMMA_MEM_SW_RDATA GAMMA_SW_RDATA; + union REG_YGAMMA_GAMMA_MEM_SW_RDATA_BG GAMMA_SW_RDATA_BG; + union REG_YGAMMA_GAMMA_DBG GAMMA_DBG; + union REG_YGAMMA_GAMMA_DMY0 GAMMA_DMY0; + union REG_YGAMMA_GAMMA_DMY1 GAMMA_DMY1; + union REG_YGAMMA_GAMMA_DMY_R GAMMA_DMY_R; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_PREYEE_T { + union REG_ISP_PREYEE_00 REG_00; + union REG_ISP_PREYEE_04 REG_04; + uint32_t _resv_0x8[1]; + union REG_ISP_PREYEE_0C REG_0C; + union REG_ISP_PREYEE_10 REG_10; + uint32_t _resv_0x14[36]; + union REG_ISP_PREYEE_A4 REG_A4; + union REG_ISP_PREYEE_A8 REG_A8; + union REG_ISP_PREYEE_AC REG_AC; + union REG_ISP_PREYEE_B0 REG_B0; + union REG_ISP_PREYEE_B4 REG_B4; + union REG_ISP_PREYEE_B8 REG_B8; + union REG_ISP_PREYEE_BC REG_BC; + union REG_ISP_PREYEE_C0 REG_C0; + union REG_ISP_PREYEE_C4 REG_C4; + union REG_ISP_PREYEE_C8 REG_C8; + union REG_ISP_PREYEE_HCC REG_HCC; + union REG_ISP_PREYEE_HD0 REG_HD0; + uint32_t _resv_0xd4[23]; + union REG_ISP_PREYEE_130 REG_130; + union REG_ISP_PREYEE_134 REG_134; + union REG_ISP_PREYEE_138 REG_138; + union REG_ISP_PREYEE_13C REG_13C; + union REG_ISP_PREYEE_140 REG_140; + union REG_ISP_PREYEE_144 REG_144; + union REG_ISP_PREYEE_148 REG_148; + union REG_ISP_PREYEE_14C REG_14C; + union REG_ISP_PREYEE_150 REG_150; + union REG_ISP_PREYEE_154 REG_154; + union REG_ISP_PREYEE_158 REG_158; + union REG_ISP_PREYEE_15C REG_15C; + union REG_ISP_PREYEE_160 REG_160; + union REG_ISP_PREYEE_164 REG_164; + union REG_ISP_PREYEE_168 REG_168; + union REG_ISP_PREYEE_16C REG_16C; + union REG_ISP_PREYEE_170 REG_170; + union REG_ISP_PREYEE_174 REG_174; + union REG_ISP_PREYEE_178 REG_178; + union REG_ISP_PREYEE_17C REG_17C; + union REG_ISP_PREYEE_180 REG_180; + union REG_ISP_PREYEE_184 REG_184; + union REG_ISP_PREYEE_188 REG_188; + union REG_ISP_PREYEE_18C REG_18C; + union REG_ISP_PREYEE_190 REG_190; + union REG_ISP_PREYEE_194 REG_194; + union REG_ISP_PREYEE_198 REG_198; + union REG_ISP_PREYEE_19C REG_19C; + union REG_ISP_PREYEE_1A0 REG_1A0; + union REG_ISP_PREYEE_1A4 REG_1A4; + union REG_ISP_PREYEE_1A8 REG_1A8; + uint32_t _resv_0x1ac[6]; + union REG_ISP_PREYEE_1C4 REG_1C4; + union REG_ISP_PREYEE_1C8 REG_1C8; + union REG_ISP_PREYEE_1CC REG_1CC; + union REG_ISP_PREYEE_1D0 REG_1D0; + union REG_ISP_PREYEE_1D4 REG_1D4; + union REG_ISP_PREYEE_1D8 REG_1D8; + union REG_ISP_PREYEE_1DC REG_1DC; + union REG_ISP_PREYEE_1E0 REG_1E0; + union REG_ISP_PREYEE_1E4 REG_1E4; + union REG_ISP_PREYEE_1E8 REG_1E8; + union REG_ISP_PREYEE_1EC REG_1EC; + union REG_ISP_PREYEE_1F0 REG_1F0; + uint32_t _resv_0x1f4[2]; + union REG_ISP_PREYEE_1FC REG_1FC; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CSI_BDG_T { + union REG_ISP_CSI_BDG_TOP_CTRL CSI_BDG_TOP_CTRL; + union REG_ISP_CSI_BDG_INTERRUPT_CTRL CSI_BDG_INTERRUPT_CTRL; + union REG_ISP_CSI_BDG_DMA_DPCM_MODE CSI_BDG_DMA_DPCM_MODE; + union REG_ISP_CSI_BDG_DMA_LD_DPCM_MODE CSI_BDG_DMA_LD_DPCM_MODE; + union REG_ISP_CSI_BDG_CH0_SIZE CH0_SIZE; + union REG_ISP_CSI_BDG_CH1_SIZE CH1_SIZE; + union REG_ISP_CSI_BDG_CH2_SIZE CH2_SIZE; + union REG_ISP_CSI_BDG_CH3_SIZE CH3_SIZE; + union REG_ISP_CSI_BDG_CH0_CROP_EN CH0_CROP_EN; + union REG_ISP_CSI_BDG_CH0_HORZ_CROP CH0_HORZ_CROP; + union REG_ISP_CSI_BDG_CH0_VERT_CROP CH0_VERT_CROP; + union REG_ISP_CSI_BDG_CH0_BLC_SUM CH0_BLC_SUM; + union REG_ISP_CSI_BDG_CH1_CROP_EN CH1_CROP_EN; + union REG_ISP_CSI_BDG_CH1_HORZ_CROP CH1_HORZ_CROP; + union REG_ISP_CSI_BDG_CH1_VERT_CROP CH1_VERT_CROP; + union REG_ISP_CSI_BDG_CH1_BLC_SUM CH1_BLC_SUM; + union REG_ISP_CSI_BDG_CH2_CROP_EN CH2_CROP_EN; + union REG_ISP_CSI_BDG_CH2_HORZ_CROP CH2_HORZ_CROP; + union REG_ISP_CSI_BDG_CH2_VERT_CROP CH2_VERT_CROP; + union REG_ISP_CSI_BDG_CH2_BLC_SUM CH2_BLC_SUM; + union REG_ISP_CSI_BDG_CH3_CROP_EN CH3_CROP_EN; + union REG_ISP_CSI_BDG_CH3_HORZ_CROP CH3_HORZ_CROP; + union REG_ISP_CSI_BDG_CH3_VERT_CROP CH3_VERT_CROP; + union REG_ISP_CSI_BDG_CH3_BLC_SUM CH3_BLC_SUM; + union REG_ISP_CSI_BDG_PAT_GEN_CTRL CSI_PAT_GEN_CTRL; + union REG_ISP_CSI_BDG_PAT_IDX_CTRL CSI_PAT_IDX_CTRL; + union REG_ISP_CSI_BDG_PAT_COLOR_0 CSI_PAT_COLOR_0; + union REG_ISP_CSI_BDG_PAT_COLOR_1 CSI_PAT_COLOR_1; + union REG_ISP_CSI_BDG_BACKGROUND_COLOR_0 CSI_BACKGROUND_COLOR_0; + union REG_ISP_CSI_BDG_BACKGROUND_COLOR_1 CSI_BACKGROUND_COLOR_1; + union REG_ISP_CSI_BDG_FIX_COLOR_0 CSI_FIX_COLOR_0; + union REG_ISP_CSI_BDG_FIX_COLOR_1 CSI_FIX_COLOR_1; + union REG_ISP_CSI_BDG_MDE_V_SIZE CSI_MDE_V_SIZE; + union REG_ISP_CSI_BDG_MDE_H_SIZE CSI_MDE_H_SIZE; + union REG_ISP_CSI_BDG_FDE_V_SIZE CSI_FDE_V_SIZE; + union REG_ISP_CSI_BDG_FDE_H_SIZE CSI_FDE_H_SIZE; + union REG_ISP_CSI_BDG_HSYNC_CTRL CSI_HSYNC_CTRL; + union REG_ISP_CSI_BDG_VSYNC_CTRL CSI_VSYNC_CTRL; + union REG_ISP_CSI_BDG_TGEN_TT_SIZE CSI_TGEN_TT_SIZE; + union REG_ISP_CSI_BDG_LINE_INTP_HEIGHT_0 LINE_INTP_HEIGHT_0; + union REG_ISP_CSI_BDG_CH0_DEBUG_0 CH0_DEBUG_0; + union REG_ISP_CSI_BDG_CH0_DEBUG_1 CH0_DEBUG_1; + union REG_ISP_CSI_BDG_CH0_DEBUG_2 CH0_DEBUG_2; + union REG_ISP_CSI_BDG_CH0_DEBUG_3 CH0_DEBUG_3; + union REG_ISP_CSI_BDG_CH1_DEBUG_0 CH1_DEBUG_0; + union REG_ISP_CSI_BDG_CH1_DEBUG_1 CH1_DEBUG_1; + union REG_ISP_CSI_BDG_CH1_DEBUG_2 CH1_DEBUG_2; + union REG_ISP_CSI_BDG_CH1_DEBUG_3 CH1_DEBUG_3; + union REG_ISP_CSI_BDG_CH2_DEBUG_0 CH2_DEBUG_0; + union REG_ISP_CSI_BDG_CH2_DEBUG_1 CH2_DEBUG_1; + union REG_ISP_CSI_BDG_CH2_DEBUG_2 CH2_DEBUG_2; + union REG_ISP_CSI_BDG_CH2_DEBUG_3 CH2_DEBUG_3; + union REG_ISP_CSI_BDG_CH3_DEBUG_0 CH3_DEBUG_0; + union REG_ISP_CSI_BDG_CH3_DEBUG_1 CH3_DEBUG_1; + union REG_ISP_CSI_BDG_CH3_DEBUG_2 CH3_DEBUG_2; + union REG_ISP_CSI_BDG_CH3_DEBUG_3 CH3_DEBUG_3; + union REG_ISP_CSI_BDG_INTERRUPT_STATUS_0 INTERRUPT_STATUS_0; + union REG_ISP_CSI_BDG_INTERRUPT_STATUS_1 INTERRUPT_STATUS_1; + union REG_ISP_CSI_BDG_DEBUG BDG_DEBUG; + union REG_ISP_CSI_BDG_OUT_VSYNC_LINE_DELAY CSI_OUT_VSYNC_LINE_DELAY; + union REG_ISP_CSI_BDG_WR_URGENT_CTRL CSI_WR_URGENT_CTRL; + union REG_ISP_CSI_BDG_RD_URGENT_CTRL CSI_RD_URGENT_CTRL; + union REG_ISP_CSI_BDG_DUMMY CSI_DUMMY; + union REG_ISP_CSI_BDG_LINE_INTP_HEIGHT_1 LINE_INTP_HEIGHT_1; + union REG_ISP_CSI_BDG_SLICE_LINE_INTP_HEIGHT_0 SLICE_LINE_INTP_HEIGHT_0; + union REG_ISP_CSI_BDG_SLICE_LINE_INTP_HEIGHT_1 SLICE_LINE_INTP_HEIGHT_1; + uint32_t _resv_0x108[2]; + union REG_ISP_CSI_BDG_WDMA_CH0_CROP_EN WDMA_CH0_CROP_EN; + union REG_ISP_CSI_BDG_WDMA_CH0_HORZ_CROP WDMA_CH0_HORZ_CROP; + union REG_ISP_CSI_BDG_WDMA_CH0_VERT_CROP WDMA_CH0_VERT_CROP; + uint32_t _resv_0x11c[1]; + union REG_ISP_CSI_BDG_WDMA_CH1_CROP_EN WDMA_CH1_CROP_EN; + union REG_ISP_CSI_BDG_WDMA_CH1_HORZ_CROP WDMA_CH1_HORZ_CROP; + union REG_ISP_CSI_BDG_WDMA_CH1_VERT_CROP WDMA_CH1_VERT_CROP; + uint32_t _resv_0x12c[1]; + union REG_ISP_CSI_BDG_WDMA_CH2_CROP_EN WDMA_CH2_CROP_EN; + union REG_ISP_CSI_BDG_WDMA_CH2_HORZ_CROP WDMA_CH2_HORZ_CROP; + union REG_ISP_CSI_BDG_WDMA_CH2_VERT_CROP WDMA_CH2_VERT_CROP; + uint32_t _resv_0x13c[1]; + union REG_ISP_CSI_BDG_WDMA_CH3_CROP_EN WDMA_CH3_CROP_EN; + union REG_ISP_CSI_BDG_WDMA_CH3_HORZ_CROP WDMA_CH3_HORZ_CROP; + union REG_ISP_CSI_BDG_WDMA_CH3_VERT_CROP WDMA_CH3_VERT_CROP; + uint32_t _resv_0x14c[1]; + union REG_ISP_CSI_BDG_TRIG_DLY_CONTROL_0 TRIG_DLY_CONTROL_0; + union REG_ISP_CSI_BDG_TRIG_DLY_CONTROL_1 TRIG_DLY_CONTROL_1; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_LCAC_T { + union REG_ISP_LCAC_REG00 REG00; + union REG_ISP_LCAC_REG04 REG04; + union REG_ISP_LCAC_REG08 REG08; + union REG_ISP_LCAC_REG0C REG0C; + union REG_ISP_LCAC_REG10 REG10; + union REG_ISP_LCAC_REG14 REG14; + union REG_ISP_LCAC_REG18 REG18; + union REG_ISP_LCAC_REG1C REG1C; + union REG_ISP_LCAC_REG20 REG20; + union REG_ISP_LCAC_REG24 REG24; + union REG_ISP_LCAC_REG28 REG28; + union REG_ISP_LCAC_REG2C REG2C; + union REG_ISP_LCAC_REG30 REG30; + union REG_ISP_LCAC_REG34 REG34; + union REG_ISP_LCAC_REG38 REG38; + union REG_ISP_LCAC_REG3C REG3C; + union REG_ISP_LCAC_REG40 REG40; + union REG_ISP_LCAC_REG44 REG44; + union REG_ISP_LCAC_REG48 REG48; + union REG_ISP_LCAC_REG4C REG4C; + union REG_ISP_LCAC_REG50 REG50; + union REG_ISP_LCAC_REG54 REG54; + union REG_ISP_LCAC_REG58 REG58; + union REG_ISP_LCAC_REG5C REG5C; + union REG_ISP_LCAC_REG60 REG60; + union REG_ISP_LCAC_REG64 REG64; + union REG_ISP_LCAC_REG68 REG68; + union REG_ISP_LCAC_REG6C REG6C; + union REG_ISP_LCAC_REG70 REG70; + union REG_ISP_LCAC_REG74 REG74; + union REG_ISP_LCAC_REG78 REG78; + union REG_ISP_LCAC_REG7C REG7C; + union REG_ISP_LCAC_REG80 REG80; + union REG_ISP_LCAC_REG84 REG84; + union REG_ISP_LCAC_REG88 REG88; + union REG_ISP_LCAC_REG8C REG8C; + union REG_ISP_LCAC_REG90 REG90; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_CFA_T { + union REG_ISP_CFA_00 REG_00; + union REG_ISP_CFA_04 REG_04; + uint32_t _resv_0x8[1]; + union REG_ISP_CFA_0C REG_0C; + union REG_ISP_CFA_10 REG_10; + union REG_ISP_CFA_14 REG_14; + union REG_ISP_CFA_18 REG_18; + union REG_ISP_CFA_1C REG_1C; + union REG_ISP_CFA_20 REG_20; + uint32_t _resv_0x24[3]; + union REG_ISP_CFA_30 REG_30; + union REG_ISP_CFA_34 REG_34; + union REG_ISP_CFA_38 REG_38; + union REG_ISP_CFA_3C REG_3C; + union REG_ISP_CFA_40 REG_40; + union REG_ISP_CFA_44 REG_44; + union REG_ISP_CFA_48 REG_48; + union REG_ISP_CFA_4C REG_4C; + uint32_t _resv_0x50[8]; + union REG_ISP_CFA_70 REG_70; + union REG_ISP_CFA_74 REG_74; + union REG_ISP_CFA_78 REG_78; + union REG_ISP_CFA_7C REG_7C; + union REG_ISP_CFA_80 REG_80; + uint32_t _resv_0x84[3]; + union REG_ISP_CFA_90 REG_90; + union REG_ISP_CFA_94 REG_94; + union REG_ISP_CFA_98 REG_98; + union REG_ISP_CFA_9C REG_9C; + union REG_ISP_CFA_A0 REG_A0; + union REG_ISP_CFA_A4 REG_A4; + union REG_ISP_CFA_A8 REG_A8; + uint32_t _resv_0xac[25]; + union REG_ISP_CFA_110 REG_110; + uint32_t _resv_0x114[3]; + union REG_ISP_CFA_120 REG_120; + union REG_ISP_CFA_124 REG_124; + union REG_ISP_CFA_128 REG_128; + union REG_ISP_CFA_12C REG_12C; + union REG_ISP_CFA_130 REG_130; + union REG_ISP_CFA_134 REG_134; + union REG_ISP_CFA_138 REG_138; + union REG_ISP_CFA_13C REG_13C; + union REG_ISP_CFA_140 REG_140; + union REG_ISP_CFA_144 REG_144; + union REG_ISP_CFA_148 REG_148; + union REG_ISP_CFA_14C REG_14C; + union REG_ISP_CFA_150 REG_150; + union REG_ISP_CFA_154 REG_154; + union REG_ISP_CFA_158 REG_158; + union REG_ISP_CFA_15C REG_15C; + union REG_ISP_CFA_160 REG_160; + union REG_ISP_CFA_164 REG_164; + union REG_ISP_CFA_168 REG_168; + union REG_ISP_CFA_16C REG_16C; + union REG_ISP_CFA_170 REG_170; + union REG_ISP_CFA_174 REG_174; + union REG_ISP_CFA_178 REG_178; + union REG_ISP_CFA_17C REG_17C; + union REG_ISP_CFA_180 REG_180; + union REG_ISP_CFA_184 REG_184; + union REG_ISP_CFA_188 REG_188; + union REG_ISP_CFA_18C REG_18C; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_PRE_RAW_VI_SEL_T { + union REG_PRE_RAW_VI_SEL_0 REG_0; + union REG_PRE_RAW_VI_SEL_1 REG_1; + uint32_t _resv_0x8[2]; + union REG_PRE_RAW_VI_SEL_2 REG_2; + union REG_PRE_RAW_VI_SEL_3 REG_3; + uint32_t _resv_0x18[2]; + union REG_PRE_RAW_VI_SEL_4 REG_4; + union REG_PRE_RAW_VI_SEL_5 REG_5; + union REG_PRE_RAW_VI_SEL_6 REG_6; + union REG_PRE_RAW_VI_SEL_7 REG_7; + union REG_PRE_RAW_VI_SEL_8 REG_8; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_YUV_TOP_T { + union REG_YUV_TOP_YUV_0 YUV_0; + uint32_t _resv_0x4[1]; + union REG_YUV_TOP_YUV_2 YUV_2; + union REG_YUV_TOP_YUV_3 YUV_3; + union REG_YUV_TOP_YUV_DEBUG_0 YUV_DEBUG_0; + union REG_YUV_TOP_YUV_4 YUV_4; + union REG_YUV_TOP_YUV_DEBUG_STATE YUV_DEBUG_STATE; + uint32_t _resv_0x1c[1]; + union REG_YUV_TOP_YUV_5 YUV_5; + uint32_t _resv_0x24[15]; + union REG_YUV_TOP_YUV_CTRL YUV_CTRL; + union REG_YUV_TOP_IMGW_M1 IMGW_M1; + uint32_t _resv_0x68[1]; + union REG_YUV_TOP_STVALID_STATUS STVALID_STATUS; + union REG_YUV_TOP_STREADY_STATUS STREADY_STATUS; + union REG_YUV_TOP_PATGEN1 PATGEN1; + union REG_YUV_TOP_PATGEN2 PATGEN2; + union REG_YUV_TOP_PATGEN3 PATGEN3; + union REG_YUV_TOP_PATGEN4 PATGEN4; + union REG_YUV_TOP_CHECK_SUM CHECK_SUM; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_ISP_LSC_T { + union REG_ISP_LSC_STATUS LSC_STATUS; + union REG_ISP_LSC_GRACE_RESET LSC_GRACE_RESET; + union REG_ISP_LSC_MONITOR LSC_MONITOR; + union REG_ISP_LSC_ENABLE LSC_ENABLE; + union REG_ISP_LSC_KICKOFF LSC_KICKOFF; + union REG_ISP_LSC_STRENGTH LSC_STRENGTH; + union REG_ISP_LSC_IMG_BAYERID IMG_BAYERID; + union REG_ISP_LSC_MONITOR_SELECT LSC_MONITOR_SELECT; + uint32_t _resv_0x20[2]; + union REG_ISP_LSC_DMI_WIDTHM1 LSC_DMI_WIDTHM1; + union REG_ISP_LSC_DMI_HEIGHTM1 LSC_DMI_HEIGHTM1; + uint32_t _resv_0x30[3]; + union REG_ISP_LSC_GAIN_BASE LSC_GAIN_BASE; + union REG_ISP_LSC_XSTEP LSC_XSTEP; + union REG_ISP_LSC_YSTEP LSC_YSTEP; + union REG_ISP_LSC_IMGX0 LSC_IMGX0; + union REG_ISP_LSC_IMGY0 LSC_IMGY0; + uint32_t _resv_0x50[2]; + union REG_ISP_LSC_INITX0 LSC_INITX0; + union REG_ISP_LSC_INITY0 LSC_INITY0; + union REG_ISP_LSC_KERNEL_TABLE_WRITE LSC_KERNEL_TABLE_WRITE; + union REG_ISP_LSC_KERNEL_TABLE_DATA LSC_KERNEL_TABLE_DATA; + union REG_ISP_LSC_KERNEL_TABLE_CTRL LSC_KERNEL_TABLE_CTRL; + union REG_ISP_LSC_DUMMY LSC_DUMMY; + union REG_ISP_LSC_LOCATION LSC_LOCATION; + union REG_ISP_LSC_1ST_RUNHIT LSC_1ST_RUNHIT; + union REG_ISP_LSC_COMPARE_VALUE LSC_COMPARE_VALUE; + uint32_t _resv_0x7c[1]; + union REG_ISP_LSC_MEM_SW_MODE LSC_SW_MODE; + union REG_ISP_LSC_MEM_SW_RADDR LSC_SW_RADDR; + uint32_t _resv_0x88[1]; + union REG_ISP_LSC_MEM_SW_RDATA LSC_SW_RDATA; + union REG_ISP_LSC_INTERPOLATION INTERPOLATION; + uint32_t _resv_0x94[3]; + union REG_ISP_LSC_DMI_ENABLE DMI_ENABLE; + union REG_ISP_LSC_BLD LSC_BLD; + union REG_ISP_LSC_INTP_GAIN_MAX LSC_INTP_GAIN_MAX; + union REG_ISP_LSC_INTP_GAIN_MIN LSC_INTP_GAIN_MIN; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* _VI_REG_BLOCKS_H_ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_reg_fields.h b/freertos/cvitek/install/include/driver/vi/vi_reg_fields.h new file mode 100644 index 000000000..7d4622df6 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_reg_fields.h @@ -0,0 +1,15304 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved. + * + * File Name:vi_reg_fields.h + * Description:HW register description + */ + +#ifndef _VI_REG_FIELDS_H_ +#define _VI_REG_FIELDS_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_PRE_RAW_BE_TOP_CTRL { + uint32_t raw; + struct { + uint32_t BAYER_TYPE_LE : 4; + uint32_t BAYER_TYPE_SE : 4; + uint32_t RGBIR_EN : 1; + uint32_t CH_NUM : 1; + uint32_t _rsv_10 : 21; + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_PRE_RAW_BE_UP_PQ_EN { + uint32_t raw; + struct { + uint32_t UP_PQ_EN : 1; + } bits; +}; + +union REG_PRE_RAW_BE_IMG_SIZE_LE { + uint32_t raw; + struct { + uint32_t FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_PRE_RAW_BE_PRE_RAW_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY_RW : 16; + uint32_t DUMMY_RO : 16; + } bits; +}; + +union REG_PRE_RAW_BE_DEBUG_INFO { + uint32_t raw; + struct { + uint32_t CH0_CROP_DONE : 1; + uint32_t CH0_BLC_DONE : 1; + uint32_t CH0_AF_DONE : 1; + uint32_t CH0_DPC_DONE : 1; + uint32_t CH0_ASYNC_DONE : 1; + uint32_t CH0_PRE_WDMA_DONE : 1; + uint32_t _rsv_6 : 10; + uint32_t CH1_CROP_DONE : 1; + uint32_t CH1_BLC_DONE : 1; + uint32_t CH1_DPC_DONE : 1; + uint32_t CH1_ASYNC_DONE : 1; + uint32_t CH1_PRE_WDMA_DONE : 1; + } bits; +}; + +union REG_PRE_RAW_BE_DMA_IDLE_INFO { + uint32_t raw; + struct { + uint32_t AF_DMA_IDLE : 1; + uint32_t PRE_WDMA0_IDLE : 1; + uint32_t PRE_WDMA1_IDLE : 1; + } bits; +}; + +union REG_PRE_RAW_BE_IP_IDLE_INFO { + uint32_t raw; + struct { + uint32_t CH0_CROP_IDLE : 1; + uint32_t CH0_BLC_IDLE : 1; + uint32_t CH0_DPC_IDLE : 1; + uint32_t CH0_AF_IDLE : 1; + uint32_t CH0_ASYNC_IDLE : 1; + uint32_t CH0_PRE_WDMA_IDLE : 1; + uint32_t _rsv_6 : 10; + uint32_t CH1_CROP_IDLE : 1; + uint32_t CH1_BLC_IDLE : 1; + uint32_t CH1_DPC_IDLE : 1; + uint32_t CH1_ASYNC_IDLE : 1; + uint32_t CH1_PRE_WDMA_IDLE : 1; + } bits; +}; + +union REG_PRE_RAW_BE_LINE_BALANCE_CTRL { + uint32_t raw; + struct { + uint32_t PASS_SEL : 1; + uint32_t _rsv_1 : 7; + uint32_t PASS_CNT_M1 : 8; + } bits; +}; + +union REG_PRE_RAW_BE_DEBUG_ENABLE { + uint32_t raw; + struct { + uint32_t DEBUG_EN : 1; + } bits; +}; + +union REG_PRE_RAW_BE_TVALID_STATUS { + uint32_t raw; + struct { + uint32_t IP_TVALID : 16; + } bits; +}; + +union REG_PRE_RAW_BE_TREADY_STATUS { + uint32_t raw; + struct { + uint32_t IP_TREADY : 16; + } bits; +}; + +union REG_PRE_RAW_BE_PATGEN1 { + uint32_t raw; + struct { + uint32_t X_CURSER : 14; + uint32_t _rsv_14 : 2; + uint32_t Y_CURSER : 14; + uint32_t CURSER_EN : 1; + uint32_t PG_ENABLE : 1; + } bits; +}; + +union REG_PRE_RAW_BE_PATGEN2 { + uint32_t raw; + struct { + uint32_t CURSER_VALUE : 16; + } bits; +}; + +union REG_PRE_RAW_BE_PATGEN3 { + uint32_t raw; + struct { + uint32_t VALUE_REPORT : 32; + } bits; +}; + +union REG_PRE_RAW_BE_PATGEN4 { + uint32_t raw; + struct { + uint32_t XCNT_RPT : 14; + uint32_t _rsv_14 : 2; + uint32_t YCNT_RPT : 14; + } bits; +}; + +union REG_PRE_RAW_BE_CHKSUM_ENABLE { + uint32_t raw; + struct { + uint32_t LEXP_CHKSUM_ENABLE : 1; + uint32_t SEXP_CHKSUM_ENABLE : 1; + } bits; +}; + +union REG_PRE_RAW_BE_CHKSUM { + uint32_t raw; + struct { + uint32_t UM_LEXP : 12; + uint32_t UM_SEXP : 16; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_DMA_CTL_SYS_CONTROL { + uint32_t raw; + struct { + uint32_t QOS_SEL : 1; + uint32_t SW_QOS : 1; + uint32_t ENABLE_SEL : 1; + uint32_t SW_DISABLE : 1; + uint32_t _rsv_4 : 4; + uint32_t BASEH : 8; + uint32_t BASE_SEL : 1; + uint32_t STRIDE_SEL : 1; + uint32_t SEGLEN_SEL : 1; + uint32_t SEGNUM_SEL : 1; + uint32_t SLICE_ENABLE : 1; + uint32_t UPDATE_BASE_ADDR : 1; + uint32_t _rsv_22 : 6; + uint32_t DBG_SEL : 3; + } bits; +}; + +union REG_ISP_DMA_CTL_BASE_ADDR { + uint32_t raw; + struct { + uint32_t BASEL : 32; + } bits; +}; + +union REG_ISP_DMA_CTL_DMA_SEGLEN { + uint32_t raw; + struct { + uint32_t SEGLEN : 24; + } bits; +}; + +union REG_ISP_DMA_CTL_DMA_STRIDE { + uint32_t raw; + struct { + uint32_t STRIDE : 24; + } bits; +}; + +union REG_ISP_DMA_CTL_DMA_SEGNUM { + uint32_t raw; + struct { + uint32_t SEGNUM : 13; + } bits; +}; + +union REG_ISP_DMA_CTL_DMA_STATUS { + uint32_t raw; + struct { + uint32_t STATUS : 32; + } bits; +}; + +union REG_ISP_DMA_CTL_DMA_SLICESIZE { + uint32_t raw; + struct { + uint32_t SLICE_SIZE : 6; + uint32_t _rsv_6 : 10; + uint32_t SLICE_NUM : 13; + } bits; +}; + +union REG_ISP_DMA_CTL_DMA_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY : 16; + uint32_t PERF_PATCH_ENABLE : 1; + uint32_t SEGLEN_LESS16_ENABLE : 1; + uint32_t SYNC_PATCH_ENABLE : 1; + uint32_t TRIG_PATCH_ENABLE : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_AE_HIST_AE_HIST_STATUS { + uint32_t raw; + struct { + uint32_t AE_HIST_STATUS : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_GRACE_RESET { + uint32_t raw; + struct { + uint32_t AE_HIST_GRACE_RESET : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_MONITOR { + uint32_t raw; + struct { + uint32_t AE_HIST_MONITOR : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_BYPASS { + uint32_t raw; + struct { + uint32_t AE_HIST_BYPASS : 1; + uint32_t _rsv_1 : 19; + uint32_t HIST_ZEROING_ENABLE : 1; + uint32_t _rsv_21 : 7; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_KICKOFF { + uint32_t raw; + struct { + uint32_t AE_ZERO_AE_SUM : 1; + uint32_t _rsv_1 : 1; + uint32_t AE_WBGAIN_APPLY : 1; + uint32_t _rsv_3 : 1; + uint32_t LOADSHADOWREG : 1; + uint32_t _rsv_5 : 1; + uint32_t HIST_ZEROHISTOGRAM : 1; + uint32_t _rsv_7 : 1; + uint32_t HIST_WBGAIN_APPLY : 1; + uint32_t _rsv_9 : 1; + uint32_t AE_HIST_SHADOW_SELECT : 1; + uint32_t _rsv_11 : 5; + uint32_t AE_FACE_ENABLE : 4; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE0_HIST_ENABLE { + uint32_t raw; + struct { + uint32_t STS_AE0_HIST_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t AE0_GAIN_ENABLE : 1; + uint32_t _rsv_5 : 3; + uint32_t HIST0_ENABLE : 1; + uint32_t _rsv_9 : 3; + uint32_t HIST0_GAIN_ENABLE : 1; + uint32_t _rsv_13 : 3; + uint32_t IR_AE_ENABLE : 1; + uint32_t _rsv_17 : 3; + uint32_t IR_AE_GAIN_ENABLE : 1; + uint32_t _rsv_21 : 3; + uint32_t IR_HIST_ENABLE : 1; + uint32_t _rsv_25 : 3; + uint32_t IR_HIST_GAIN_ENABLE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE_OFFSETX { + uint32_t raw; + struct { + uint32_t STS_AE0_OFFSETX : 13; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE_OFFSETY { + uint32_t raw; + struct { + uint32_t STS_AE0_OFFSETY : 13; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE_NUMXM1 { + uint32_t raw; + struct { + uint32_t STS_AE0_NUMXM1 : 6; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE_NUMYM1 { + uint32_t raw; + struct { + uint32_t STS_AE0_NUMYM1 : 6; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE_WIDTH { + uint32_t raw; + struct { + uint32_t STS_AE0_WIDTH : 8; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE_HEIGHT { + uint32_t raw; + struct { + uint32_t STS_AE0_HEIGHT : 8; + } bits; +}; + +union REG_ISP_AE_HIST_STS_AE_STS_DIV { + uint32_t raw; + struct { + uint32_t STS_AE0_STS_DIV : 13; + } bits; +}; + +union REG_ISP_AE_HIST_STS_HIST_MODE { + uint32_t raw; + struct { + uint32_t STS_HIST0_MODE : 2; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_MONITOR_SELECT { + uint32_t raw; + struct { + uint32_t AE_HIST_MONITOR_SELECT : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_LOCATION { + uint32_t raw; + struct { + uint32_t AE_HIST_LOCATION : 32; + } bits; +}; + +union REG_ISP_AE_HIST_STS_IR_AE_OFFSETX { + uint32_t raw; + struct { + uint32_t STS_IR_AE_OFFSETX : 13; + } bits; +}; + +union REG_ISP_AE_HIST_STS_IR_AE_OFFSETY { + uint32_t raw; + struct { + uint32_t STS_IR_AE_OFFSETY : 13; + } bits; +}; + +union REG_ISP_AE_HIST_STS_IR_AE_NUMXM1 { + uint32_t raw; + struct { + uint32_t STS_IR_AE_NUMXM1 : 5; + } bits; +}; + +union REG_ISP_AE_HIST_STS_IR_AE_NUMYM1 { + uint32_t raw; + struct { + uint32_t STS_IR_AE_NUMYM1 : 5; + } bits; +}; + +union REG_ISP_AE_HIST_STS_IR_AE_WIDTH { + uint32_t raw; + struct { + uint32_t STS_IR_AE_WIDTH : 10; + } bits; +}; + +union REG_ISP_AE_HIST_STS_IR_AE_HEIGHT { + uint32_t raw; + struct { + uint32_t STS_IR_AE_HEIGHT : 10; + } bits; +}; + +union REG_ISP_AE_HIST_STS_IR_AE_STS_DIV { + uint32_t raw; + struct { + uint32_t STS_IR_AE_STS_DIV : 3; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_BAYER_STARTING { + uint32_t raw; + struct { + uint32_t AE_HIST_BAYER_STARTING : 4; + uint32_t _rsv_4 : 12; + uint32_t FORCE_BAYER_ENABLE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_DUMMY { + uint32_t raw; + struct { + uint32_t AE_HIST_DUMMY : 16; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_CHECKSUM { + uint32_t raw; + struct { + uint32_t AE_HIST_CHECKSUM : 32; + } bits; +}; + +union REG_ISP_AE_HIST_WBG_4 { + uint32_t raw; + struct { + uint32_t AE0_WBG_RGAIN : 14; + uint32_t _rsv_14 : 2; + uint32_t AE0_WBG_GGAIN : 14; + } bits; +}; + +union REG_ISP_AE_HIST_WBG_5 { + uint32_t raw; + struct { + uint32_t AE0_WBG_BGAIN : 14; + uint32_t _rsv_14 : 2; + uint32_t AE1_WBG_BGAIN : 14; + } bits; +}; + +union REG_ISP_AE_HIST_WBG_6 { + uint32_t raw; + struct { + uint32_t AE1_WBG_RGAIN : 14; + uint32_t _rsv_14 : 2; + uint32_t AE1_WBG_GGAIN : 14; + } bits; +}; + +union REG_ISP_AE_HIST_WBG_7 { + uint32_t raw; + struct { + uint32_t AE0_WBG_VGAIN : 14; + } bits; +}; + +union REG_ISP_AE_HIST_DMI_ENABLE { + uint32_t raw; + struct { + uint32_t DMI_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DMI_QOS : 1; + uint32_t _rsv_5 : 3; + uint32_t FORCE_DMA_DISABLE : 1; + uint32_t _rsv_9 : 7; + uint32_t IR_DMI_ENABLE : 1; + uint32_t _rsv_17 : 3; + uint32_t IR_DMI_QOS : 1; + uint32_t _rsv_21 : 3; + uint32_t IR_FORCE_DMA_DISABLE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE0_LOCATION { + uint32_t raw; + struct { + uint32_t AE_FACE0_OFFSET_X : 13; + uint32_t AE_FACE0_OFFSET_Y : 13; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE1_LOCATION { + uint32_t raw; + struct { + uint32_t AE_FACE1_OFFSET_X : 13; + uint32_t AE_FACE1_OFFSET_Y : 13; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE2_LOCATION { + uint32_t raw; + struct { + uint32_t AE_FACE2_OFFSET_X : 13; + uint32_t AE_FACE2_OFFSET_Y : 13; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE3_LOCATION { + uint32_t raw; + struct { + uint32_t AE_FACE3_OFFSET_X : 13; + uint32_t AE_FACE3_OFFSET_Y : 13; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE0_SIZE { + uint32_t raw; + struct { + uint32_t AE_FACE0_SIZE_MINUS1_X : 8; + uint32_t _rsv_8 : 8; + uint32_t AE_FACE0_SIZE_MINUS1_Y : 8; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE1_SIZE { + uint32_t raw; + struct { + uint32_t AE_FACE1_SIZE_MINUS1_X : 8; + uint32_t _rsv_8 : 8; + uint32_t AE_FACE1_SIZE_MINUS1_Y : 8; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE2_SIZE { + uint32_t raw; + struct { + uint32_t AE_FACE2_SIZE_MINUS1_X : 8; + uint32_t _rsv_8 : 8; + uint32_t AE_FACE2_SIZE_MINUS1_Y : 8; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE3_SIZE { + uint32_t raw; + struct { + uint32_t AE_FACE3_SIZE_MINUS1_X : 8; + uint32_t _rsv_8 : 8; + uint32_t AE_FACE3_SIZE_MINUS1_Y : 8; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE0_LOCATION { + uint32_t raw; + struct { + uint32_t IR_AE_FACE0_OFFSET_X : 16; + uint32_t IR_AE_FACE0_OFFSET_Y : 16; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE1_LOCATION { + uint32_t raw; + struct { + uint32_t IR_AE_FACE1_OFFSET_X : 16; + uint32_t IR_AE_FACE1_OFFSET_Y : 16; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE2_LOCATION { + uint32_t raw; + struct { + uint32_t IR_AE_FACE2_OFFSET_X : 16; + uint32_t IR_AE_FACE2_OFFSET_Y : 16; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE3_LOCATION { + uint32_t raw; + struct { + uint32_t IR_AE_FACE3_OFFSET_X : 16; + uint32_t IR_AE_FACE3_OFFSET_Y : 16; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE0_SIZE { + uint32_t raw; + struct { + uint32_t IR_AE_FACE0_SIZE_MINUS1_X : 7; + uint32_t _rsv_7 : 9; + uint32_t IR_AE_FACE0_SIZE_MINUS1_Y : 7; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE1_SIZE { + uint32_t raw; + struct { + uint32_t IR_AE_FACE1_SIZE_MINUS1_X : 7; + uint32_t _rsv_7 : 9; + uint32_t IR_AE_FACE1_SIZE_MINUS1_Y : 7; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE2_SIZE { + uint32_t raw; + struct { + uint32_t IR_AE_FACE2_SIZE_MINUS1_X : 7; + uint32_t _rsv_7 : 9; + uint32_t IR_AE_FACE2_SIZE_MINUS1_Y : 7; + } bits; +}; + +union REG_ISP_AE_HIST_IR_AE_FACE3_SIZE { + uint32_t raw; + struct { + uint32_t IR_AE_FACE3_SIZE_MINUS1_X : 7; + uint32_t _rsv_7 : 9; + uint32_t IR_AE_FACE3_SIZE_MINUS1_Y : 7; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE0_ENABLE { + uint32_t raw; + struct { + uint32_t AE_FACE0_ENABLE : 1; + uint32_t AE_FACE1_ENABLE : 1; + uint32_t AE_FACE2_ENABLE : 1; + uint32_t AE_FACE3_ENABLE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE0_STS_DIV { + uint32_t raw; + struct { + uint32_t AE_FACE0_STS_DIV : 13; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE1_STS_DIV { + uint32_t raw; + struct { + uint32_t AE_FACE1_STS_DIV : 13; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE2_STS_DIV { + uint32_t raw; + struct { + uint32_t AE_FACE2_STS_DIV : 13; + } bits; +}; + +union REG_ISP_AE_HIST_AE_FACE3_STS_DIV { + uint32_t raw; + struct { + uint32_t AE_FACE3_STS_DIV : 13; + } bits; +}; + +union REG_ISP_AE_HIST_STS_ENABLE { + uint32_t raw; + struct { + uint32_t STS_AWB_ENABLE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_ALGO_ENABLE { + uint32_t raw; + struct { + uint32_t _rsv_0 : 1; + uint32_t AE_ALGO_ENABLE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_LOW { + uint32_t raw; + struct { + uint32_t AE_HIST_LOW : 8; + } bits; +}; + +union REG_ISP_AE_HIST_AE_HIST_HIGH { + uint32_t raw; + struct { + uint32_t _rsv_0 : 8; + uint32_t AE_HIST_HIGH : 8; + } bits; +}; + +union REG_ISP_AE_HIST_AE_TOP { + uint32_t raw; + struct { + uint32_t AE_AWB_TOP : 12; + } bits; +}; + +union REG_ISP_AE_HIST_AE_BOT { + uint32_t raw; + struct { + uint32_t _rsv_0 : 12; + uint32_t AE_AWB_BOT : 12; + } bits; +}; + +union REG_ISP_AE_HIST_AE_OVEREXP_THR { + uint32_t raw; + struct { + uint32_t AE_OVEREXP_THR : 10; + } bits; +}; + +union REG_ISP_AE_HIST_AE_NUM_GAPLINE { + uint32_t raw; + struct { + uint32_t AE_NUM_GAPLINE : 1; + } bits; +}; + +union REG_ISP_AE_HIST_AE_SIMPLE2A_RESULT_LUMA { + uint32_t raw; + struct { + uint32_t SIMPLE2A_RESULT_LUMA : 10; + uint32_t _rsv_10 : 6; + uint32_t E_COUNTER_0 : 16; + } bits; +}; + +union REG_ISP_AE_HIST_AE_SIMPLE2A_RESULT_RGAIN { + uint32_t raw; + struct { + uint32_t SIMPLE2A_RESULT_RGAIN : 10; + uint32_t _rsv_10 : 6; + uint32_t E_COUNTER_1 : 16; + } bits; +}; + +union REG_ISP_AE_HIST_AE_SIMPLE2A_RESULT_BGAIN { + uint32_t raw; + struct { + uint32_t SIMPLE2A_RESULT_BGAIN : 10; + uint32_t _rsv_10 : 6; + uint32_t E_COUNTER_2 : 16; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_00 { + uint32_t raw; + struct { + uint32_t AE_WGT_00 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_01 { + uint32_t raw; + struct { + uint32_t AE_WGT_01 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_02 { + uint32_t raw; + struct { + uint32_t AE_WGT_02 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_03 { + uint32_t raw; + struct { + uint32_t AE_WGT_03 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_04 { + uint32_t raw; + struct { + uint32_t AE_WGT_04 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_05 { + uint32_t raw; + struct { + uint32_t AE_WGT_05 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_06 { + uint32_t raw; + struct { + uint32_t AE_WGT_06 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_07 { + uint32_t raw; + struct { + uint32_t AE_WGT_07 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_08 { + uint32_t raw; + struct { + uint32_t AE_WGT_08 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_09 { + uint32_t raw; + struct { + uint32_t AE_WGT_09 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_10 { + uint32_t raw; + struct { + uint32_t AE_WGT_10 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_11 { + uint32_t raw; + struct { + uint32_t AE_WGT_11 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_12 { + uint32_t raw; + struct { + uint32_t AE_WGT_12 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_13 { + uint32_t raw; + struct { + uint32_t AE_WGT_13 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_14 { + uint32_t raw; + struct { + uint32_t AE_WGT_14 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_15 { + uint32_t raw; + struct { + uint32_t AE_WGT_15 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_16 { + uint32_t raw; + struct { + uint32_t AE_WGT_16 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_17 { + uint32_t raw; + struct { + uint32_t AE_WGT_17 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_18 { + uint32_t raw; + struct { + uint32_t AE_WGT_18 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_19 { + uint32_t raw; + struct { + uint32_t AE_WGT_19 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_20 { + uint32_t raw; + struct { + uint32_t AE_WGT_20 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_21 { + uint32_t raw; + struct { + uint32_t AE_WGT_21 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_22 { + uint32_t raw; + struct { + uint32_t AE_WGT_22 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_23 { + uint32_t raw; + struct { + uint32_t AE_WGT_23 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_24 { + uint32_t raw; + struct { + uint32_t AE_WGT_24 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_25 { + uint32_t raw; + struct { + uint32_t AE_WGT_25 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_26 { + uint32_t raw; + struct { + uint32_t AE_WGT_26 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_27 { + uint32_t raw; + struct { + uint32_t AE_WGT_27 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_28 { + uint32_t raw; + struct { + uint32_t AE_WGT_28 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_29 { + uint32_t raw; + struct { + uint32_t AE_WGT_29 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_30 { + uint32_t raw; + struct { + uint32_t AE_WGT_30 : 32; + } bits; +}; + +union REG_ISP_AE_HIST_AE_WGT_31 { + uint32_t raw; + struct { + uint32_t AE_WGT_31 : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_GMS_STATUS { + uint32_t raw; + struct { + uint32_t GMS_STATUS : 32; + } bits; +}; + +union REG_ISP_GMS_GRACE_RESET { + uint32_t raw; + struct { + uint32_t GMS_GRACE_RESET : 1; + } bits; +}; + +union REG_ISP_GMS_MONITOR { + uint32_t raw; + struct { + uint32_t GMS_MONITOR : 32; + } bits; +}; + +union REG_ISP_GMS_ENABLE { + uint32_t raw; + struct { + uint32_t GMS_ENABLE : 1; + uint32_t OUT_SHIFTBIT : 3; + uint32_t _rsv_4 : 12; + uint32_t FORCE_BAYER_ENABLE : 1; + uint32_t _rsv_17 : 11; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_GMS_FLOW { + uint32_t raw; + struct { + uint32_t GMS_ZEROGMSOGRAM : 1; + uint32_t _rsv_1 : 3; + uint32_t GMS_SHADOW_SELECT : 1; + } bits; +}; + +union REG_ISP_GMS_START_X { + uint32_t raw; + struct { + uint32_t GMS_START_X : 13; + } bits; +}; + +union REG_ISP_GMS_START_Y { + uint32_t raw; + struct { + uint32_t GMS_START_Y : 13; + } bits; +}; + +union REG_ISP_GMS_LOCATION { + uint32_t raw; + struct { + uint32_t GMS_LOCATION : 32; + } bits; +}; + +union REG_ISP_GMS_X_SIZEM1 { + uint32_t raw; + struct { + uint32_t GMS_X_SIZEM1 : 10; + } bits; +}; + +union REG_ISP_GMS_Y_SIZEM1 { + uint32_t raw; + struct { + uint32_t GMS_Y_SIZEM1 : 10; + } bits; +}; + +union REG_ISP_GMS_X_GAP { + uint32_t raw; + struct { + uint32_t GMS_X_GAP : 10; + } bits; +}; + +union REG_ISP_GMS_Y_GAP { + uint32_t raw; + struct { + uint32_t GMS_Y_GAP : 10; + } bits; +}; + +union REG_ISP_GMS_DUMMY { + uint32_t raw; + struct { + uint32_t GMS_DUMMY : 16; + } bits; +}; + +union REG_ISP_GMS_MEM_SW_MODE { + uint32_t raw; + struct { + uint32_t GMS_MEM_SW_MODE : 1; + uint32_t _rsv_1 : 3; + uint32_t GMS_MEM_SEL : 6; + } bits; +}; + +union REG_ISP_GMS_MEM_SW_RADDR { + uint32_t raw; + struct { + uint32_t GMS_SW_RADDR : 11; + } bits; +}; + +union REG_ISP_GMS_MEM_SW_RDATA { + uint32_t raw; + struct { + uint32_t GMS_RDATA_R : 31; + uint32_t GMS_SW_R : 1; + } bits; +}; + +union REG_ISP_GMS_MONITOR_SELECT { + uint32_t raw; + struct { + uint32_t GMS_MONITOR_SELECT : 32; + } bits; +}; + +union REG_ISP_GMS_DMI_ENABLE { + uint32_t raw; + struct { + uint32_t DMI_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DMI_QOS : 1; + uint32_t _rsv_5 : 3; + uint32_t FORCE_DMA_DISABLE : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_AF_STATUS { + uint32_t raw; + struct { + uint32_t AF_STATUS : 32; + } bits; +}; + +union REG_ISP_AF_GRACE_RESET { + uint32_t raw; + struct { + uint32_t AF_GRACE_RESET : 1; + } bits; +}; + +union REG_ISP_AF_MONITOR { + uint32_t raw; + struct { + uint32_t AF_MONITOR : 32; + } bits; +}; + +union REG_ISP_AF_BYPASS { + uint32_t raw; + struct { + uint32_t AF_BYPASS : 1; + } bits; +}; + +union REG_ISP_AF_KICKOFF { + uint32_t raw; + struct { + uint32_t AF_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t AF_WBGAIN_APPLY : 1; + uint32_t _rsv_5 : 3; + uint32_t AF_REVERT_EXPOSURE : 1; + uint32_t _rsv_9 : 7; + uint32_t AF_GAIN_ENABLE : 1; + } bits; +}; + +union REG_ISP_AF_ENABLES { + uint32_t raw; + struct { + uint32_t AF_HORIZON_0_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t AF_HORIZON_1_ENABLE : 1; + uint32_t _rsv_5 : 3; + uint32_t AF_VERTICAL_0_ENABLE : 1; + uint32_t _rsv_9 : 3; + uint32_t AF_GAMMA_ENABLE : 1; + uint32_t _rsv_13 : 3; + uint32_t AF_DPC_ENABLE : 1; + uint32_t _rsv_17 : 3; + uint32_t AF_HLC_ENABLE : 1; + uint32_t _rsv_21 : 3; + uint32_t AF_SHADOW_SELECT : 1; + uint32_t _rsv_25 : 3; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_AF_OFFSET_X { + uint32_t raw; + struct { + uint32_t AF_OFFSET_X : 13; + uint32_t _rsv_13 : 3; + uint32_t AF_OFFSET_Y : 13; + } bits; +}; + +union REG_ISP_AF_MXN_IMAGE_WIDTH_M1 { + uint32_t raw; + struct { + uint32_t AF_MXN_IMAGE_WIDTH : 13; + uint32_t _rsv_13 : 3; + uint32_t AF_MXN_IMAGE_HEIGHT : 13; + } bits; +}; + +union REG_ISP_AF_BLOCK_WIDTH { + uint32_t raw; + struct { + uint32_t AF_BLOCK_WIDTH : 8; + } bits; +}; + +union REG_ISP_AF_BLOCK_HEIGHT { + uint32_t raw; + struct { + uint32_t AF_BLOCK_HEIGHT : 8; + } bits; +}; + +union REG_ISP_AF_BLOCK_NUM_X { + uint32_t raw; + struct { + uint32_t AF_BLOCK_NUM_X : 5; + } bits; +}; + +union REG_ISP_AF_BLOCK_NUM_Y { + uint32_t raw; + struct { + uint32_t AF_BLOCK_NUM_Y : 4; + uint32_t _rsv_4 : 12; + uint32_t FORCE_BAYER_ENABLE : 1; + } bits; +}; + +union REG_ISP_AF_HOR_LOW_PASS_VALUE_SHIFT { + uint32_t raw; + struct { + uint32_t AF_HOR_LOW_PASS_VALUE_SHIFT : 4; + } bits; +}; + +union REG_ISP_AF_CORNING_OFFSET_HORIZONTAL_0 { + uint32_t raw; + struct { + uint32_t AF_CORNING_OFFSET_HORIZONTAL_0 : 8; + } bits; +}; + +union REG_ISP_AF_CORNING_OFFSET_HORIZONTAL_1 { + uint32_t raw; + struct { + uint32_t AF_CORNING_OFFSET_HORIZONTAL_1 : 8; + } bits; +}; + +union REG_ISP_AF_CORNING_OFFSET_VERTICAL { + uint32_t raw; + struct { + uint32_t AF_CORNING_OFFSET_VERTICAL : 8; + } bits; +}; + +union REG_ISP_AF_HIGH_Y_THRE { + uint32_t raw; + struct { + uint32_t AF_HIGH_Y_THRE : 8; + } bits; +}; + +union REG_ISP_AF_LOW_PASS_HORIZON { + uint32_t raw; + struct { + uint32_t AF_LOW_PASS_HORIZON_0 : 6; + uint32_t AF_LOW_PASS_HORIZON_1 : 6; + uint32_t AF_LOW_PASS_HORIZON_2 : 6; + uint32_t AF_LOW_PASS_HORIZON_3 : 6; + uint32_t AF_LOW_PASS_HORIZON_4 : 6; + } bits; +}; + +union REG_ISP_AF_LOCATION { + uint32_t raw; + struct { + uint32_t AF_LOCATION : 32; + } bits; +}; + +union REG_ISP_AF_HIGH_PASS_HORIZON_0 { + uint32_t raw; + struct { + uint32_t AF_HIGH_PASS_HORIZON_0_0 : 6; + uint32_t AF_HIGH_PASS_HORIZON_0_1 : 6; + uint32_t AF_HIGH_PASS_HORIZON_0_2 : 6; + uint32_t AF_HIGH_PASS_HORIZON_0_3 : 6; + uint32_t AF_HIGH_PASS_HORIZON_0_4 : 6; + } bits; +}; + +union REG_ISP_AF_HIGH_PASS_HORIZON_1 { + uint32_t raw; + struct { + uint32_t AF_HIGH_PASS_HORIZON_1_0 : 6; + uint32_t AF_HIGH_PASS_HORIZON_1_1 : 6; + uint32_t AF_HIGH_PASS_HORIZON_1_2 : 6; + uint32_t AF_HIGH_PASS_HORIZON_1_3 : 6; + uint32_t AF_HIGH_PASS_HORIZON_1_4 : 6; + } bits; +}; + +union REG_ISP_AF_HIGH_PASS_VERTICAL_0 { + uint32_t raw; + struct { + uint32_t AF_HIGH_PASS_VERTICAL_0_0 : 6; + uint32_t AF_HIGH_PASS_VERTICAL_0_1 : 6; + uint32_t AF_HIGH_PASS_VERTICAL_0_2 : 6; + } bits; +}; + +union REG_ISP_AF_MEM_SW_MODE { + uint32_t raw; + struct { + uint32_t AF_MEM_SW_MODE : 1; + uint32_t AF_R_MEM_SEL : 1; + uint32_t AF_G_MEM_SEL : 1; + uint32_t AF_B_MEM_SEL : 1; + uint32_t AF_BLK_DIV_MEM_SEL : 1; + uint32_t AF_GAMMA_G_MEM_SEL : 1; + uint32_t AF_MAGFACTOR_MEM_SEL : 1; + uint32_t AF_BLK_DIV_DFF_SEL : 1; + uint32_t AF_GAMMA_G_DFF_SEL : 1; + uint32_t AF_MAGFACTOR_DFF_SEL : 1; + } bits; +}; + +union REG_ISP_AF_MONITOR_SELECT { + uint32_t raw; + struct { + uint32_t AF_MONITOR_SELECT : 32; + } bits; +}; + +union REG_ISP_AF_IMAGE_WIDTH { + uint32_t raw; + struct { + uint32_t AF_IMAGE_WIDTH : 16; + } bits; +}; + +union REG_ISP_AF_DUMMY { + uint32_t raw; + struct { + uint32_t AF_DUMMY : 16; + } bits; +}; + +union REG_ISP_AF_MEM_SW_RADDR { + uint32_t raw; + struct { + uint32_t AF_SW_RADDR : 7; + } bits; +}; + +union REG_ISP_AF_MEM_SW_RDATA { + uint32_t raw; + struct { + uint32_t AF_RDATA : 31; + uint32_t AF_SW_READ : 1; + } bits; +}; + +union REG_ISP_AF_MXN_BORDER { + uint32_t raw; + struct { + uint32_t AF_MXN_BORDER : 2; + } bits; +}; + +union REG_ISP_AF_TH_LOW { + uint32_t raw; + struct { + uint32_t AF_TH_LOW : 8; + uint32_t _rsv_8 : 8; + uint32_t AF_TH_HIGH : 8; + } bits; +}; + +union REG_ISP_AF_GAIN_LOW { + uint32_t raw; + struct { + uint32_t AF_GAIN_LOW : 8; + uint32_t _rsv_8 : 8; + uint32_t AF_GAIN_HIGH : 8; + } bits; +}; + +union REG_ISP_AF_SLOP_LOW { + uint32_t raw; + struct { + uint32_t AF_SLOP_LOW : 4; + uint32_t AF_SLOP_HIGH : 4; + } bits; +}; + +union REG_ISP_AF_DMI_ENABLE { + uint32_t raw; + struct { + uint32_t DMI_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DMI_QOS : 1; + uint32_t _rsv_5 : 3; + uint32_t FORCE_DMA_DISABLE : 1; + } bits; +}; + +union REG_ISP_AF_SQUARE_ENABLE { + uint32_t raw; + struct { + uint32_t AF_SQUARE_ENABLE : 1; + } bits; +}; + +union REG_ISP_AF_OUTSHIFT { + uint32_t raw; + struct { + uint32_t _rsv_0 : 4; + uint32_t AF_OUTSHIFT : 3; + } bits; +}; + +union REG_ISP_AF_NUM_GAPLINE { + uint32_t raw; + struct { + uint32_t AF_NUM_GAPLINE : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_PRE_RAW_FE_PRE_RAW_CTRL { + uint32_t raw; + struct { + uint32_t BAYER_TYPE_LE : 4; + uint32_t BAYER_TYPE_SE : 4; + uint32_t _rsv_8 : 8; + uint32_t UP_PQ_EN : 1; + uint32_t _rsv_17 : 3; + uint32_t RGBIR_EN : 1; + uint32_t _rsv_21 : 10; + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_PRE_RAW_FE_PRE_RAW_FRAME_SIZE { + uint32_t raw; + struct { + uint32_t FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_PRE_RAW_FE_LE_RGBMAP_GRID_NUMBER { + uint32_t raw; + struct { + uint32_t LE_RGBMP_H_GRID_NUMM1 : 10; + uint32_t _rsv_10 : 2; + uint32_t LE_RGBMP_H_GRID_SIZE : 3; + uint32_t _rsv_15 : 1; + uint32_t LE_RGBMP_V_GRID_NUMM1 : 10; + uint32_t _rsv_26 : 2; + uint32_t LE_RGBMP_V_GRID_SIZE : 3; + } bits; +}; + +union REG_PRE_RAW_FE_SE_RGBMAP_GRID_NUMBER { + uint32_t raw; + struct { + uint32_t SE_RGBMP_H_GRID_NUMM1 : 10; + uint32_t _rsv_10 : 2; + uint32_t SE_RGBMP_H_GRID_SIZE : 3; + uint32_t _rsv_15 : 1; + uint32_t SE_RGBMP_V_GRID_NUMM1 : 10; + uint32_t _rsv_26 : 2; + uint32_t SE_RGBMP_V_GRID_SIZE : 3; + } bits; +}; + +union REG_PRE_RAW_FE_PRE_RAW_POST_NO_RSPD_CYC { + uint32_t raw; + struct { + uint32_t POST_NO_RSPD_CYC : 32; + } bits; +}; + +union REG_PRE_RAW_FE_PRE_RAW_POST_RGBMAP_NO_RSPD_CYC { + uint32_t raw; + struct { + uint32_t POST_RGBMAP_NO_RSPD_CYC : 32; + } bits; +}; + +union REG_PRE_RAW_FE_PRE_RAW_FRAME_VLD { + uint32_t raw; + struct { + uint32_t FE_FRAME_VLD_CH0 : 1; + uint32_t FE_FRAME_VLD_CH1 : 1; + uint32_t FE_FRAME_VLD_CH2 : 1; + uint32_t FE_FRAME_VLD_CH3 : 1; + uint32_t FE_PQ_VLD_CH0 : 1; + uint32_t FE_PQ_VLD_CH1 : 1; + uint32_t FE_PQ_VLD_CH2 : 1; + uint32_t FE_PQ_VLD_CH3 : 1; + uint32_t _rsv_8 : 8; + uint32_t POST_RAW_IDLE : 1; + } bits; +}; + +union REG_PRE_RAW_FE_PRE_RAW_DEBUG_STATE { + uint32_t raw; + struct { + uint32_t PRE_RAW_FE_IDLE : 32; + } bits; +}; + +union REG_PRE_RAW_FE_PRE_RAW_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY_RW : 16; + uint32_t DUMMY_RO : 16; + } bits; +}; + +union REG_PRE_RAW_FE_PRE_RAW_DEBUG_INFO { + uint32_t raw; + struct { + uint32_t IP_FRAME_DONE_STS : 32; + } bits; +}; + +union REG_PRE_RAW_FE_IDLE_INFO { + uint32_t raw; + struct { + uint32_t IP_DMA_IDLE : 32; + } bits; +}; + +union REG_PRE_RAW_FE_CHECK_SUM { + uint32_t raw; + struct { + uint32_t LEXP_CHKSUM_ENABLE : 1; + uint32_t SEXP_CHKSUM_ENABLE : 1; + } bits; +}; + +union REG_PRE_RAW_FE_CHECK_SUM_VALUE { + uint32_t raw; + struct { + uint32_t LEXP_CHKSUM_VALUE : 8; + uint32_t _rsv_8 : 8; + uint32_t SEXP_CHKSUM_VALUE : 8; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CSI_BDG_DVP_BDG_TOP_CTRL { + uint32_t raw; + struct { + uint32_t CSI_MODE : 2; + uint32_t CSI_IN_FORMAT : 1; + uint32_t CSI_IN_YUV_FORMAT : 1; + uint32_t CH_NUM : 2; + uint32_t CH0_DMA_WR_ENABLE : 1; + uint32_t _rsv_7 : 2; + uint32_t Y_ONLY : 1; + uint32_t PXL_DATA_SEL : 1; + uint32_t VS_POL : 1; + uint32_t HS_POL : 1; + uint32_t RESET_MODE : 1; + uint32_t VS_MODE : 1; + uint32_t ABORT_MODE : 1; + uint32_t RESET : 1; + uint32_t ABORT : 1; + uint32_t _rsv_18 : 2; + uint32_t YUV_PACK_MODE : 1; + uint32_t MULTI_CH_FRAME_SYNC_EN : 1; + uint32_t CH0_DMA_420_WR_ENABLE : 1; + uint32_t _rsv_23 : 1; + uint32_t CSI_ENABLE : 1; + uint32_t TGEN_ENABLE : 1; + uint32_t YUV2BAY_ENABLE : 1; + uint32_t _rsv_27 : 1; + uint32_t SHDW_READ_SEL : 1; + uint32_t _rsv_29 : 2; + uint32_t CSI_UP_REG : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_BDG_INTERRUPT_CTRL { + uint32_t raw; + struct { + uint32_t CH0_VS_INT_EN : 1; + uint32_t CH0_TRIG_INT_EN : 1; + uint32_t CH0_DROP_INT_EN : 1; + uint32_t CH0_SIZE_ERROR_INT_EN : 1; + uint32_t _rsv_4 : 24; + uint32_t SLICE_LINE_INTP_EN : 1; + uint32_t DMA_ERROR_INTP_EN : 1; + uint32_t LINE_INTP_EN : 1; + uint32_t FIFO_OVERFLOW_INT_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_BDG_DMA_DPCM_MODE { + uint32_t raw; + struct { + uint32_t DMA_ST_DPCM_MODE : 3; + uint32_t _rsv_3 : 1; + uint32_t DPCM_MIPI_OPT : 1; + uint32_t _rsv_5 : 3; + uint32_t DROP_MODE : 1; + uint32_t _rsv_9 : 3; + uint32_t AVG_MODE : 1; + uint32_t _rsv_13 : 3; + uint32_t DPCM_XSTR : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_BDG_DMA_LD_DPCM_MODE { + uint32_t raw; + struct { + uint32_t DMA_LD_DPCM_MODE : 3; + uint32_t _rsv_3 : 13; + uint32_t DPCM_RX_XSTR : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_SIZE { + uint32_t raw; + struct { + uint32_t CH0_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_CROP_EN { + uint32_t raw; + struct { + uint32_t CH0_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH0_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH0_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_BLC_SUM { + uint32_t raw; + struct { + uint32_t CH0_BLC_SUM : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_PAT_GEN_CTRL { + uint32_t raw; + struct { + uint32_t PAT_EN : 1; + uint32_t GRA_INV : 1; + uint32_t AUTO_EN : 1; + uint32_t DITH_EN : 1; + uint32_t SNOW_EN : 1; + uint32_t FIX_MC : 1; + uint32_t _rsv_6 : 2; + uint32_t DITH_MD : 3; + uint32_t _rsv_11 : 1; + uint32_t BAYER_ID : 2; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_PAT_IDX_CTRL { + uint32_t raw; + struct { + uint32_t PAT_PRD : 8; + uint32_t PAT_IDX : 5; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_PAT_COLOR_0 { + uint32_t raw; + struct { + uint32_t PAT_R : 12; + uint32_t _rsv_12 : 4; + uint32_t PAT_G : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_PAT_COLOR_1 { + uint32_t raw; + struct { + uint32_t PAT_B : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_BACKGROUND_COLOR_0 { + uint32_t raw; + struct { + uint32_t FDE_R : 12; + uint32_t _rsv_12 : 4; + uint32_t FDE_G : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_BACKGROUND_COLOR_1 { + uint32_t raw; + struct { + uint32_t FDE_B : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_FIX_COLOR_0 { + uint32_t raw; + struct { + uint32_t MDE_R : 12; + uint32_t _rsv_12 : 4; + uint32_t MDE_G : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_FIX_COLOR_1 { + uint32_t raw; + struct { + uint32_t MDE_B : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_MDE_V_SIZE { + uint32_t raw; + struct { + uint32_t VMDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t VMDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_MDE_H_SIZE { + uint32_t raw; + struct { + uint32_t HMDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t HMDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_FDE_V_SIZE { + uint32_t raw; + struct { + uint32_t VFDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t VFDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_FDE_H_SIZE { + uint32_t raw; + struct { + uint32_t HFDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t HFDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_HSYNC_CTRL { + uint32_t raw; + struct { + uint32_t HS_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t HS_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_VSYNC_CTRL { + uint32_t raw; + struct { + uint32_t VS_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t VS_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_TGEN_TT_SIZE { + uint32_t raw; + struct { + uint32_t HTT : 13; + uint32_t _rsv_13 : 3; + uint32_t VTT : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_LINE_INTP_HEIGHT_0 { + uint32_t raw; + struct { + uint32_t CH0_LINE_INTP_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH0_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH0_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH0_VS_CNT : 16; + uint32_t CH0_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_CH0_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH0_TOT_BLK_IDLE : 1; + uint32_t CH0_TOT_DMA_IDLE : 1; + uint32_t CH0_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_INTERRUPT_STATUS_0 { + uint32_t raw; + struct { + uint32_t CH0_FRAME_DROP_INT : 1; + uint32_t CH0_VS_INT : 1; + uint32_t CH0_TRIG_INT : 1; + uint32_t _rsv_3 : 1; + uint32_t CH0_FRAME_WIDTH_GT_INT : 1; + uint32_t CH0_FRAME_WIDTH_LS_INT : 1; + uint32_t CH0_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH0_FRAME_HEIGHT_LS_INT : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_INTERRUPT_STATUS_1 { + uint32_t raw; + struct { + uint32_t FIFO_OVERFLOW_INT : 1; + uint32_t FRAME_RESOLUTION_OVER_MAX_INT : 1; + uint32_t _rsv_2 : 2; + uint32_t DMA_ERROR_INT : 1; + uint32_t _rsv_5 : 3; + uint32_t CH0_LINE_INTP_INT : 1; + uint32_t _rsv_9 : 3; + uint32_t CH0_SLICE_LINE_INTP_INT : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_BDG_DEBUG { + uint32_t raw; + struct { + uint32_t RING_BUFF_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_OUT_VSYNC_LINE_DELAY { + uint32_t raw; + struct { + uint32_t OUT_VSYNC_LINE_DELAY : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_WR_URGENT_CTRL { + uint32_t raw; + struct { + uint32_t WR_NEAR_OVERFLOW_THRESHOLD : 13; + uint32_t _rsv_13 : 3; + uint32_t WR_SAFE_THRESHOLD : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_RD_URGENT_CTRL { + uint32_t raw; + struct { + uint32_t RD_NEAR_OVERFLOW_THRESHOLD : 13; + uint32_t _rsv_13 : 3; + uint32_t RD_SAFE_THRESHOLD : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY_IN : 16; + uint32_t DUMMY_OUT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_SLICE_LINE_INTP_HEIGHT_0 { + uint32_t raw; + struct { + uint32_t CH0_SLICE_LINE_INTP_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_WDMA_CH0_CROP_EN { + uint32_t raw; + struct { + uint32_t ST_CH0_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_WDMA_CH0_HORZ_CROP { + uint32_t raw; + struct { + uint32_t ST_CH0_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH0_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_WDMA_CH0_VERT_CROP { + uint32_t raw; + struct { + uint32_t ST_CH0_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH0_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_TRIG_DLY_CONTROL_0 { + uint32_t raw; + struct { + uint32_t TRIG_DLY_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DVP_TRIG_DLY_CONTROL_1 { + uint32_t raw; + struct { + uint32_t TRIG_DLY_VALUE : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_CROP_0 { + uint32_t raw; + struct { + uint32_t CROP_ENABLE : 1; + uint32_t DMA_ENABLE : 1; + uint32_t SHAW_READ_SEL : 1; + uint32_t DMI_QOS : 1; + uint32_t _rsv_4 : 4; + uint32_t DPCM_MODE : 3; + uint32_t _rsv_11 : 5; + uint32_t DPCM_XSTR : 13; + uint32_t _rsv_29 : 2; + uint32_t DMI16B_EN : 1; + } bits; +}; + +union REG_CROP_1 { + uint32_t raw; + struct { + uint32_t CROP_START_Y : 13; + uint32_t _rsv_13 : 3; + uint32_t CROP_END_Y : 13; + } bits; +}; + +union REG_CROP_2 { + uint32_t raw; + struct { + uint32_t CROP_START_X : 13; + uint32_t _rsv_13 : 3; + uint32_t CROP_END_X : 13; + } bits; +}; + +union REG_CROP_3 { + uint32_t raw; + struct { + uint32_t IN_WIDTHM1 : 16; + uint32_t IN_HEIGHTM1 : 16; + } bits; +}; + +union REG_CROP_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY : 32; + } bits; +}; + +union REG_CROP_DEBUG { + uint32_t raw; + struct { + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t FORCE_DMA_DISABLE : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_BLC_0 { + uint32_t raw; + struct { + uint32_t BLC_BYPASS : 1; + } bits; +}; + +union REG_ISP_BLC_1 { + uint32_t raw; + struct { + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_ISP_BLC_2 { + uint32_t raw; + struct { + uint32_t BLC_ENABLE : 1; + uint32_t _rsv_1 : 27; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_BLC_3 { + uint32_t raw; + struct { + uint32_t BLC_OFFSET_R : 12; + uint32_t _rsv_12 : 4; + uint32_t BLC_OFFSET_GR : 12; + } bits; +}; + +union REG_ISP_BLC_4 { + uint32_t raw; + struct { + uint32_t BLC_OFFSET_GB : 12; + uint32_t _rsv_12 : 4; + uint32_t BLC_OFFSET_B : 12; + } bits; +}; + +union REG_ISP_BLC_5 { + uint32_t raw; + struct { + uint32_t BLC_GAIN_R : 16; + uint32_t BLC_GAIN_GR : 16; + } bits; +}; + +union REG_ISP_BLC_6 { + uint32_t raw; + struct { + uint32_t BLC_GAIN_GB : 16; + uint32_t BLC_GAIN_B : 16; + } bits; +}; + +union REG_ISP_BLC_7 { + uint32_t raw; + struct { + uint32_t BLC_CHECKSUM : 32; + } bits; +}; + +union REG_ISP_BLC_8 { + uint32_t raw; + struct { + uint32_t BLC_INT : 1; + uint32_t _rsv_1 : 15; + uint32_t FORCE_BAYER_ENABLE : 1; + } bits; +}; + +union REG_ISP_BLC_DUMMY { + uint32_t raw; + struct { + uint32_t BLC_DUMMY : 16; + } bits; +}; + +union REG_ISP_BLC_LOCATION { + uint32_t raw; + struct { + uint32_t BLC_LOCATION : 32; + } bits; +}; + +union REG_ISP_BLC_9 { + uint32_t raw; + struct { + uint32_t BLC_2NDOFFSET_R : 12; + uint32_t _rsv_12 : 4; + uint32_t BLC_2NDOFFSET_GR : 12; + } bits; +}; + +union REG_ISP_BLC_A { + uint32_t raw; + struct { + uint32_t BLC_2NDOFFSET_GB : 12; + uint32_t _rsv_12 : 4; + uint32_t BLC_2NDOFFSET_B : 12; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_LMAP_LMP_0 { + uint32_t raw; + struct { + uint32_t LMAP_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t LMAP_Y_MODE : 2; + uint32_t LMAP_THD_L : 8; + uint32_t LMAP_THD_H : 8; + uint32_t _rsv_22 : 8; + uint32_t LMAP_SOFTRST : 1; + uint32_t FORCE_DMA_DISABLE : 1; + } bits; +}; + +union REG_ISP_LMAP_LMP_1 { + uint32_t raw; + struct { + uint32_t LMAP_CROP_WIDTHM1 : 13; + uint32_t LMAP_CROP_HEIGHTM1 : 13; + uint32_t _rsv_26 : 1; + uint32_t LMAP_BAYER_ID : 4; + uint32_t LMAP_SHDW_SEL : 1; + } bits; +}; + +union REG_ISP_LMAP_LMP_2 { + uint32_t raw; + struct { + uint32_t LMAP_W_GRID_NUM : 10; + uint32_t _rsv_10 : 2; + uint32_t LMAP_W_BIT : 3; + uint32_t _rsv_15 : 1; + uint32_t LMAP_H_GRID_NUM : 10; + uint32_t _rsv_26 : 2; + uint32_t LMAP_H_BIT : 3; + uint32_t LMAP_OUT_SEL : 1; + } bits; +}; + +union REG_ISP_LMAP_LMP_DEBUG_0 { + uint32_t raw; + struct { + uint32_t LMAP_DEBUG_0 : 32; + } bits; +}; + +union REG_ISP_LMAP_LMP_DEBUG_1 { + uint32_t raw; + struct { + uint32_t LMAP_DEBUG_1 : 32; + } bits; +}; + +union REG_ISP_LMAP_DUMMY { + uint32_t raw; + struct { + uint32_t LMAP_DUMMY : 32; + } bits; +}; + +union REG_ISP_LMAP_LMP_DEBUG_2 { + uint32_t raw; + struct { + uint32_t LMAP_DEBUG_2 : 32; + } bits; +}; + +union REG_ISP_LMAP_LMP_3 { + uint32_t raw; + struct { + uint32_t DEBUG_DATA_SEL : 2; + } bits; +}; + +union REG_ISP_LMAP_LMP_4 { + uint32_t raw; + struct { + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_LMAP_LMP_SET_SEL { + uint32_t raw; + struct { + uint32_t SET_SEL : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_RGBMAP_0 { + uint32_t raw; + struct { + uint32_t RGBMAP_ENABLE : 1; + uint32_t RGBMAP_W_BIT : 3; + uint32_t RGBMAP_H_BIT : 3; + uint32_t IMG_BAYERID : 4; + uint32_t RGBMAP_W_GRID_NUM : 10; + uint32_t RGBMAP_H_GRID_NUM : 10; + uint32_t RGBMAP_SOFTRST : 1; + } bits; +}; + +union REG_ISP_RGBMAP_1 { + uint32_t raw; + struct { + uint32_t IMG_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t IMG_HEIGHTM1 : 13; + uint32_t RGBMAP_SHDW_SEL : 1; + } bits; +}; + +union REG_ISP_RGBMAP_DEBUG_0 { + uint32_t raw; + struct { + uint32_t RGBMAP_DEBUG_0 : 32; + } bits; +}; + +union REG_ISP_RGBMAP_DEBUG_1 { + uint32_t raw; + struct { + uint32_t RGBMAP_DEBUG_1 : 32; + } bits; +}; + +union REG_ISP_RGBMAP_DUMMY { + uint32_t raw; + struct { + uint32_t RGBMAP_DUMMY : 32; + } bits; +}; + +union REG_ISP_RGBMAP_2 { + uint32_t raw; + struct { + uint32_t FORCE_DMA_DISABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DEBUG_DATA_SEL : 2; + } bits; +}; + +union REG_ISP_RGBMAP_DEBUG_2 { + uint32_t raw; + struct { + uint32_t RGBMAP_DEBUG_2 : 32; + } bits; +}; + +union REG_ISP_RGBMAP_3 { + uint32_t raw; + struct { + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_RGBMAP_SET_SEL { + uint32_t raw; + struct { + uint32_t SET_SEL : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_WBG_0 { + uint32_t raw; + struct { + uint32_t WBG_BYPASS : 1; + } bits; +}; + +union REG_ISP_WBG_1 { + uint32_t raw; + struct { + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_ISP_WBG_2 { + uint32_t raw; + struct { + uint32_t WBG_ENABLE : 1; + uint32_t _rsv_1 : 27; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_WBG_4 { + uint32_t raw; + struct { + uint32_t WBG_RGAIN : 14; + uint32_t _rsv_14 : 2; + uint32_t WBG_GGAIN : 14; + } bits; +}; + +union REG_ISP_WBG_5 { + uint32_t raw; + struct { + uint32_t WBG_BGAIN : 14; + uint32_t _rsv_14 : 2; + uint32_t WBG_IRGAIN : 14; + } bits; +}; + +union REG_ISP_WBG_6 { + uint32_t raw; + struct { + uint32_t WBG_CHECKSUM : 32; + } bits; +}; + +union REG_ISP_WBG_7 { + uint32_t raw; + struct { + uint32_t WBG_INT : 1; + } bits; +}; + +union REG_ISP_WBG_IMG_BAYERID { + uint32_t raw; + struct { + uint32_t IMG_BAYERID : 4; + uint32_t _rsv_4 : 12; + uint32_t FORCE_BAYER_ENABLE : 1; + } bits; +}; + +union REG_ISP_WBG_DUMMY { + uint32_t raw; + struct { + uint32_t WBG_DUMMY : 32; + } bits; +}; + +union REG_ISP_WBG_LOCATION { + uint32_t raw; + struct { + uint32_t WBG_LOCATION : 32; + } bits; +}; + +union REG_ISP_WBG_34 { + uint32_t raw; + struct { + uint32_t RGAIN_FRACTION : 24; + } bits; +}; + +union REG_ISP_WBG_38 { + uint32_t raw; + struct { + uint32_t GGAIN_FRACTION : 24; + } bits; +}; + +union REG_ISP_WBG_3C { + uint32_t raw; + struct { + uint32_t BGAIN_FRACTION : 24; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_DPC_0 { + uint32_t raw; + struct { + uint32_t PROG_HDK_DIS : 1; + uint32_t CONT_EN : 1; + uint32_t SOFTRST : 1; + uint32_t DBG_EN : 1; + uint32_t CH_NM : 1; + } bits; +}; + +union REG_ISP_DPC_1 { + uint32_t raw; + struct { + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_ISP_DPC_2 { + uint32_t raw; + struct { + uint32_t DPC_ENABLE : 1; + uint32_t GE_ENABLE : 1; + uint32_t DPC_DYNAMICBPC_ENABLE : 1; + uint32_t DPC_STATICBPC_ENABLE : 1; + uint32_t DELAY : 1; + uint32_t _rsv_5 : 3; + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t _rsv_9 : 7; + uint32_t DPC_CLUSTER_SIZE : 2; + } bits; +}; + +union REG_ISP_DPC_3 { + uint32_t raw; + struct { + uint32_t DPC_R_BRIGHT_PIXEL_RATIO : 10; + uint32_t _rsv_10 : 6; + uint32_t DPC_G_BRIGHT_PIXEL_RATIO : 10; + } bits; +}; + +union REG_ISP_DPC_4 { + uint32_t raw; + struct { + uint32_t DPC_B_BRIGHT_PIXEL_RATIO : 10; + uint32_t _rsv_10 : 6; + uint32_t DPC_R_DARK_PIXEL_RATIO : 10; + } bits; +}; + +union REG_ISP_DPC_5 { + uint32_t raw; + struct { + uint32_t DPC_G_DARK_PIXEL_RATIO : 10; + uint32_t _rsv_10 : 6; + uint32_t DPC_B_DARK_PIXEL_RATIO : 10; + } bits; +}; + +union REG_ISP_DPC_6 { + uint32_t raw; + struct { + uint32_t DPC_R_DARK_PIXEL_MINDIFF : 8; + uint32_t DPC_G_DARK_PIXEL_MINDIFF : 8; + uint32_t DPC_B_DARK_PIXEL_MINDIFF : 8; + } bits; +}; + +union REG_ISP_DPC_7 { + uint32_t raw; + struct { + uint32_t DPC_R_BRIGHT_PIXEL_UPBOUD_RATIO : 8; + uint32_t DPC_G_BRIGHT_PIXEL_UPBOUD_RATIO : 8; + uint32_t DPC_B_BRIGHT_PIXEL_UPBOUD_RATIO : 8; + } bits; +}; + +union REG_ISP_DPC_8 { + uint32_t raw; + struct { + uint32_t DPC_FLAT_THRE_MIN_RB : 8; + uint32_t DPC_FLAT_THRE_MIN_G : 8; + } bits; +}; + +union REG_ISP_DPC_9 { + uint32_t raw; + struct { + uint32_t DPC_FLAT_THRE_R : 8; + uint32_t DPC_FLAT_THRE_G : 8; + uint32_t DPC_FLAT_THRE_B : 8; + } bits; +}; + +union REG_ISP_DPC_10 { + uint32_t raw; + struct { + uint32_t GE_STRENGTH : 9; + uint32_t _rsv_9 : 7; + uint32_t GE_COMBINEWEIGHT : 4; + } bits; +}; + +union REG_ISP_DPC_11 { + uint32_t raw; + struct { + uint32_t GE_THRE1 : 12; + uint32_t _rsv_12 : 4; + uint32_t GE_THRE2 : 12; + } bits; +}; + +union REG_ISP_DPC_12 { + uint32_t raw; + struct { + uint32_t GE_THRE3 : 12; + uint32_t _rsv_12 : 4; + uint32_t GE_THRE4 : 12; + } bits; +}; + +union REG_ISP_DPC_13 { + uint32_t raw; + struct { + uint32_t GE_THRE11 : 12; + uint32_t _rsv_12 : 4; + uint32_t GE_THRE21 : 12; + } bits; +}; + +union REG_ISP_DPC_14 { + uint32_t raw; + struct { + uint32_t GE_THRE31 : 12; + uint32_t _rsv_12 : 4; + uint32_t GE_THRE41 : 12; + } bits; +}; + +union REG_ISP_DPC_15 { + uint32_t raw; + struct { + uint32_t GE_THRE12 : 12; + uint32_t _rsv_12 : 4; + uint32_t GE_THRE22 : 12; + } bits; +}; + +union REG_ISP_DPC_16 { + uint32_t raw; + struct { + uint32_t GE_THRE32 : 12; + uint32_t _rsv_12 : 4; + uint32_t GE_THRE42 : 12; + } bits; +}; + +union REG_ISP_DPC_17 { + uint32_t raw; + struct { + uint32_t DPC_MEM0_IMG0_ADDR : 11; + uint32_t _rsv_11 : 5; + uint32_t DPC_MEM0_IMG1_ADDR : 11; + uint32_t _rsv_27 : 3; + uint32_t DPC_MEM0_IMG_ADDR_SEL : 1; + uint32_t DPC_MEM_PROG_MODE : 1; + } bits; +}; + +union REG_ISP_DPC_18 { + uint32_t raw; + struct { + uint32_t DPC_SW_RADDR : 12; + } bits; +}; + +union REG_ISP_DPC_19 { + uint32_t raw; + struct { + uint32_t DPC_RDATA_R : 24; + uint32_t _rsv_24 : 7; + uint32_t DPC_SW_R : 1; + } bits; +}; + +union REG_ISP_DPC_MEM_W0 { + uint32_t raw; + struct { + uint32_t DPC_BP_MEM_D : 24; + uint32_t _rsv_24 : 7; + uint32_t DPC_BP_MEM_W : 1; + } bits; +}; + +union REG_ISP_DPC_WINDOW { + uint32_t raw; + struct { + uint32_t IMG_WD : 12; + uint32_t _rsv_12 : 4; + uint32_t IMG_HT : 12; + } bits; +}; + +union REG_ISP_DPC_MEM_ST_ADDR { + uint32_t raw; + struct { + uint32_t DPC_BP_MEM_ST_ADDR : 11; + uint32_t _rsv_11 : 20; + uint32_t DPC_BP_MEM_ST_ADDR_W : 1; + } bits; +}; + +union REG_ISP_DPC_CHECKSUM { + uint32_t raw; + struct { + uint32_t DPC_CHECKSUM : 32; + } bits; +}; + +union REG_ISP_DPC_INT { + uint32_t raw; + struct { + uint32_t DPC_INT : 1; + } bits; +}; + +union REG_ISP_DPC_20 { + uint32_t raw; + struct { + uint32_t PROB_OUT_SEL : 4; + uint32_t PROB_PERFMT : 1; + uint32_t _rsv_5 : 3; + uint32_t PROB_FMT : 6; + } bits; +}; + +union REG_ISP_DPC_21 { + uint32_t raw; + struct { + uint32_t PROB_LINE : 12; + uint32_t _rsv_12 : 4; + uint32_t PROB_PIX : 12; + } bits; +}; + +union REG_ISP_DPC_22 { + uint32_t raw; + struct { + uint32_t DPC_DBG0 : 32; + } bits; +}; + +union REG_ISP_DPC_23 { + uint32_t raw; + struct { + uint32_t DPC_DBG1 : 32; + } bits; +}; + +union REG_ISP_DPC_24 { + uint32_t raw; + struct { + uint32_t DPC_IR_BRIGHT_PIXEL_RATIO : 10; + uint32_t _rsv_10 : 6; + uint32_t DPC_IR_DARK_PIXEL_RATIO : 10; + } bits; +}; + +union REG_ISP_DPC_25 { + uint32_t raw; + struct { + uint32_t DPC_IR_DARK_PIXEL_MINDIFF : 8; + uint32_t DPC_IR_BRIGHT_PIXEL_UPBOUD_RATIO: 8; + uint32_t DPC_FLAT_THRE_MIN_IR : 8; + uint32_t DPC_FLAT_THRE_IR : 8; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_RAW_TOP_RAW_0 { + uint32_t raw; + struct { + uint32_t SVN_VERSION : 32; + } bits; +}; + +union REG_RAW_TOP_READ_SEL { + uint32_t raw; + struct { + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_RAW_TOP_RAW_1 { + uint32_t raw; + struct { + uint32_t TIMESTAMP : 32; + } bits; +}; + +union REG_RAW_TOP_CTRL { + uint32_t raw; + struct { + uint32_t LS_CROP_DST_SEL : 1; + uint32_t _rsv_1 : 15; + uint32_t FRAME_DONE_SEL_TAIL0_ALL1 : 1; + } bits; +}; + +union REG_RAW_TOP_UP_PQ_EN { + uint32_t raw; + struct { + uint32_t UP_PQ_EN : 1; + uint32_t _rsv_1 : 15; + uint32_t CHK_SUM_EN : 1; + } bits; +}; + +union REG_RAW_TOP_RAW_2 { + uint32_t raw; + struct { + uint32_t IMG_WIDTHM1 : 14; + uint32_t _rsv_14 : 2; + uint32_t IMG_HEIGHTM1 : 14; + } bits; +}; + +union REG_RAW_TOP_DUMMY { + uint32_t raw; + struct { + uint32_t RAW_TOP_DUMMY : 32; + } bits; +}; + +union REG_RAW_TOP_RAW_4 { + uint32_t raw; + struct { + uint32_t YUV_IN_MODE : 1; + } bits; +}; + +union REG_RAW_TOP_STATUS { + uint32_t raw; + struct { + uint32_t RAW_TOP_STATUS : 32; + } bits; +}; + +union REG_RAW_TOP_DEBUG { + uint32_t raw; + struct { + uint32_t RAW_TOP_DEBUG : 32; + } bits; +}; + +union REG_RAW_TOP_DEBUG_SELECT { + uint32_t raw; + struct { + uint32_t RAW_TOP_DEBUG_SELECT : 32; + } bits; +}; + +union REG_RAW_TOP_RAW_BAYER_TYPE_TOPLEFT { + uint32_t raw; + struct { + uint32_t BAYER_TYPE_TOPLEFT : 4; + uint32_t _rsv_4 : 12; + uint32_t RGBIR_ENABLE : 1; + } bits; +}; + +union REG_RAW_TOP_RDMI_ENBALE { + uint32_t raw; + struct { + uint32_t RDMI_EN : 1; + uint32_t _rsv_1 : 3; + uint32_t PASS_SEL : 1; + uint32_t _rsv_5 : 3; + uint32_t PASS_CNT_M1 : 8; + uint32_t CH_NUM : 1; + } bits; +}; + +union REG_RAW_TOP_RDMA_SIZE { + uint32_t raw; + struct { + uint32_t RDMI_WIDTHM1 : 16; + uint32_t RDMI_HEIGHTM1 : 16; + } bits; +}; + +union REG_RAW_TOP_DPCM_MODE { + uint32_t raw; + struct { + uint32_t DPCM_MODE : 3; + uint32_t _rsv_3 : 5; + uint32_t DPCM_XSTR : 13; + } bits; +}; + +union REG_RAW_TOP_STVALID_STATUS { + uint32_t raw; + struct { + uint32_t STVALID_STATUS : 32; + } bits; +}; + +union REG_RAW_TOP_STREADY_STATUS { + uint32_t raw; + struct { + uint32_t STREADY_STATUS : 32; + } bits; +}; + +union REG_RAW_TOP_PATGEN1 { + uint32_t raw; + struct { + uint32_t X_CURSER : 14; + uint32_t _rsv_14 : 2; + uint32_t Y_CURSER : 14; + uint32_t CURSER_EN : 1; + uint32_t PG_ENABLE : 1; + } bits; +}; + +union REG_RAW_TOP_PATGEN2 { + uint32_t raw; + struct { + uint32_t CURSER_VALUE : 16; + } bits; +}; + +union REG_RAW_TOP_PATGEN3 { + uint32_t raw; + struct { + uint32_t VALUE_REPORT : 32; + } bits; +}; + +union REG_RAW_TOP_PATGEN4 { + uint32_t raw; + struct { + uint32_t XCNT_RPT : 14; + uint32_t _rsv_14 : 2; + uint32_t YCNT_RPT : 14; + uint32_t PG_LCAC_ENABLE : 1; + uint32_t CURSER_LCAC_EN : 1; + } bits; +}; + +union REG_RAW_TOP_RO_IDLE { + uint32_t raw; + struct { + uint32_t RAW_TOP_RO_IDLE : 32; + } bits; +}; + +union REG_RAW_TOP_RO_DONE { + uint32_t raw; + struct { + uint32_t RAW_TOP_RO_DONE : 32; + } bits; +}; + +union REG_RAW_TOP_DMA_IDLE { + uint32_t raw; + struct { + uint32_t RAW_TOP_DMA_IDLE : 32; + } bits; +}; + +union REG_RAW_TOP_LE_LMAP_GRID_NUMBER { + uint32_t raw; + struct { + uint32_t LE_LMP_H_GRID_NUMM1 : 10; + uint32_t _rsv_10 : 2; + uint32_t LE_LMP_H_GRID_SIZE : 3; + uint32_t _rsv_15 : 1; + uint32_t LE_LMP_V_GRID_NUMM1 : 10; + uint32_t _rsv_26 : 2; + uint32_t LE_LMP_V_GRID_SIZE : 3; + } bits; +}; + +union REG_RAW_TOP_SE_LMAP_GRID_NUMBER { + uint32_t raw; + struct { + uint32_t SE_LMP_H_GRID_NUMM1 : 10; + uint32_t _rsv_10 : 2; + uint32_t SE_LMP_H_GRID_SIZE : 3; + uint32_t _rsv_15 : 1; + uint32_t SE_LMP_V_GRID_NUMM1 : 10; + uint32_t _rsv_26 : 2; + uint32_t SE_LMP_V_GRID_SIZE : 3; + } bits; +}; + +union REG_RAW_TOP_CHECKSUM_0 { + uint32_t raw; + struct { + uint32_t RAW_TOP_CHECKSUM_0 : 32; + } bits; +}; + +union REG_RAW_TOP_CHECKSUM_1 { + uint32_t raw; + struct { + uint32_t RAW_TOP_CHECKSUM_1 : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_RGBCAC_CTRL { + uint32_t raw; + struct { + uint32_t RGBCAC_ENABLE : 1; + uint32_t RGBCAC_OUT_SEL : 2; + uint32_t RGBCAC_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t SOFTRST : 1; + } bits; +}; + +union REG_ISP_RGBCAC_PURPLE_TH { + uint32_t raw; + struct { + uint32_t RGBCAC_PURPLE_TH_LE : 8; + uint32_t RGBCAC_PURPLE_TH_SE : 8; + uint32_t RGBCAC_CORRECT_STRENGTH_LE : 8; + uint32_t RGBCAC_CORRECT_STRENGTH_SE : 8; + } bits; +}; + +union REG_ISP_RGBCAC_PURPLE_CBCR { + uint32_t raw; + struct { + uint32_t RGBCAC_PURPLE_CB : 12; + uint32_t _rsv_12 : 4; + uint32_t RGBCAC_PURPLE_CR : 12; + } bits; +}; + +union REG_ISP_RGBCAC_PURPLE_CBCR2 { + uint32_t raw; + struct { + uint32_t RGBCAC_PURPLE_CB2 : 12; + uint32_t _rsv_12 : 4; + uint32_t RGBCAC_PURPLE_CR2 : 12; + } bits; +}; + +union REG_ISP_RGBCAC_PURPLE_CBCR3 { + uint32_t raw; + struct { + uint32_t RGBCAC_PURPLE_CB3 : 12; + uint32_t _rsv_12 : 4; + uint32_t RGBCAC_PURPLE_CR3 : 12; + } bits; +}; + +union REG_ISP_RGBCAC_GREEN_CBCR { + uint32_t raw; + struct { + uint32_t RGBCAC_GREEN_CB : 12; + uint32_t _rsv_12 : 4; + uint32_t RGBCAC_GREEN_CR : 12; + } bits; +}; + +union REG_ISP_RGBCAC_EDGE_CORING { + uint32_t raw; + struct { + uint32_t RGBCAC_EDGE_CORING : 12; + uint32_t _rsv_12 : 4; + uint32_t RGBCAC_EDGE_SCALE : 12; + } bits; +}; + +union REG_ISP_RGBCAC_DEPURPLE_STR_RATIO_MIN { + uint32_t raw; + struct { + uint32_t RGBCAC_DEPURPLE_STR_RATIO_MIN_LE: 12; + uint32_t _rsv_12 : 4; + uint32_t RGBCAC_DEPURPLE_STR_RATIO_MIN_SE: 12; + } bits; +}; + +union REG_ISP_RGBCAC_DEPURPLE_STR_RATIO_MAX { + uint32_t raw; + struct { + uint32_t RGBCAC_DEPURPLE_STR_RATIO_MAX_LE: 12; + uint32_t _rsv_12 : 4; + uint32_t RGBCAC_DEPURPLE_STR_RATIO_MAX_SE: 12; + } bits; +}; + +union REG_ISP_RGBCAC_EDGE_WGT_LUT0 { + uint32_t raw; + struct { + uint32_t RGBCAC_EDGE_WGT_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_03 : 6; + } bits; +}; + +union REG_ISP_RGBCAC_EDGE_WGT_LUT1 { + uint32_t raw; + struct { + uint32_t RGBCAC_EDGE_WGT_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_07 : 6; + } bits; +}; + +union REG_ISP_RGBCAC_EDGE_WGT_LUT2 { + uint32_t raw; + struct { + uint32_t RGBCAC_EDGE_WGT_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_11 : 6; + } bits; +}; + +union REG_ISP_RGBCAC_EDGE_WGT_LUT3 { + uint32_t raw; + struct { + uint32_t RGBCAC_EDGE_WGT_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t RGBCAC_EDGE_WGT_LUT_15 : 6; + } bits; +}; + +union REG_ISP_RGBCAC_EDGE_WGT_LUT4 { + uint32_t raw; + struct { + uint32_t RGBCAC_EDGE_WGT_LUT_16 : 6; + } bits; +}; + +union REG_ISP_RGBCAC_LUMA { + uint32_t raw; + struct { + uint32_t RGBCAC_LUMA_SCALE : 11; + uint32_t _rsv_11 : 5; + uint32_t RGBCAC_LUMA2 : 12; + } bits; +}; + +union REG_ISP_RGBCAC_LUMA_BLEND { + uint32_t raw; + struct { + uint32_t RGBCAC_LUMA_BLEND_WGT : 6; + uint32_t _rsv_6 : 2; + uint32_t RGBCAC_LUMA_BLEND_WGT2 : 6; + uint32_t _rsv_14 : 2; + uint32_t RGBCAC_LUMA_BLEND_WGT3 : 6; + } bits; +}; + +union REG_ISP_RGBCAC_LUMA_FILTER0 { + uint32_t raw; + struct { + uint32_t RGBCAC_LUMA_FILTER_00 : 7; + uint32_t _rsv_7 : 1; + uint32_t RGBCAC_LUMA_FILTER_01 : 7; + uint32_t _rsv_15 : 1; + uint32_t RGBCAC_LUMA_FILTER_02 : 7; + } bits; +}; + +union REG_ISP_RGBCAC_LUMA_FILTER1 { + uint32_t raw; + struct { + uint32_t RGBCAC_LUMA_FILTER_03 : 7; + uint32_t _rsv_7 : 1; + uint32_t RGBCAC_LUMA_FILTER_04 : 7; + uint32_t _rsv_15 : 1; + uint32_t RGBCAC_LUMA_FILTER_05 : 7; + } bits; +}; + +union REG_ISP_RGBCAC_VAR_FILTER0 { + uint32_t raw; + struct { + uint32_t RGBCAC_VAR_FILTER_00 : 7; + uint32_t _rsv_7 : 1; + uint32_t RGBCAC_VAR_FILTER_01 : 7; + uint32_t _rsv_15 : 1; + uint32_t RGBCAC_VAR_FILTER_02 : 7; + } bits; +}; + +union REG_ISP_RGBCAC_VAR_FILTER1 { + uint32_t raw; + struct { + uint32_t RGBCAC_VAR_FILTER_03 : 7; + uint32_t _rsv_7 : 1; + uint32_t RGBCAC_VAR_FILTER_04 : 7; + uint32_t _rsv_15 : 1; + uint32_t RGBCAC_VAR_FILTER_05 : 7; + } bits; +}; + +union REG_ISP_RGBCAC_CHROMA_FILTER0 { + uint32_t raw; + struct { + uint32_t RGBCAC_CHROMA_FILTER_00 : 7; + uint32_t _rsv_7 : 1; + uint32_t RGBCAC_CHROMA_FILTER_01 : 7; + uint32_t _rsv_15 : 1; + uint32_t RGBCAC_CHROMA_FILTER_02 : 7; + } bits; +}; + +union REG_ISP_RGBCAC_CHROMA_FILTER1 { + uint32_t raw; + struct { + uint32_t RGBCAC_CHROMA_FILTER_03 : 7; + uint32_t _rsv_7 : 1; + uint32_t RGBCAC_CHROMA_FILTER_04 : 7; + uint32_t _rsv_15 : 1; + uint32_t RGBCAC_CHROMA_FILTER_05 : 7; + } bits; +}; + +union REG_ISP_RGBCAC_CBCR_STR { + uint32_t raw; + struct { + uint32_t RGBCAC_CB_STR_LE : 5; + uint32_t _rsv_5 : 3; + uint32_t RGBCAC_CR_STR_LE : 5; + uint32_t _rsv_13 : 3; + uint32_t RGBCAC_CB_STR_SE : 5; + uint32_t _rsv_21 : 3; + uint32_t RGBCAC_CR_STR_SE : 5; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_BNR_SHADOW_RD_SEL { + uint32_t raw; + struct { + uint32_t SHADOW_RD_SEL : 1; + } bits; +}; + +union REG_ISP_BNR_OUT_SEL { + uint32_t raw; + struct { + uint32_t BNR_OUT_SEL : 4; + } bits; +}; + +union REG_ISP_BNR_INDEX_CLR { + uint32_t raw; + struct { + uint32_t BNR_INDEX_CLR : 1; + } bits; +}; + +union REG_ISP_BNR_NS_LUMA_TH_R { + uint32_t raw; + struct { + uint32_t BNR_NS_LUMA_TH_R : 10; + } bits; +}; + +union REG_ISP_BNR_NS_SLOPE_R { + uint32_t raw; + struct { + uint32_t BNR_NS_SLOPE_R : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET0_R { + uint32_t raw; + struct { + uint32_t BNR_NS_LOW_OFFSET_R : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET1_R { + uint32_t raw; + struct { + uint32_t BNR_NS_HIGH_OFFSET_R : 10; + } bits; +}; + +union REG_ISP_BNR_NS_LUMA_TH_GR { + uint32_t raw; + struct { + uint32_t BNR_NS_LUMA_TH_GR : 10; + } bits; +}; + +union REG_ISP_BNR_NS_SLOPE_GR { + uint32_t raw; + struct { + uint32_t BNR_NS_SLOPE_GR : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET0_GR { + uint32_t raw; + struct { + uint32_t BNR_NS_LOW_OFFSET_GR : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET1_GR { + uint32_t raw; + struct { + uint32_t BNR_NS_HIGH_OFFSET_GR : 10; + } bits; +}; + +union REG_ISP_BNR_NS_LUMA_TH_GB { + uint32_t raw; + struct { + uint32_t BNR_NS_LUMA_TH_GB : 10; + } bits; +}; + +union REG_ISP_BNR_NS_SLOPE_GB { + uint32_t raw; + struct { + uint32_t BNR_NS_SLOPE_GB : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET0_GB { + uint32_t raw; + struct { + uint32_t BNR_NS_LOW_OFFSET_GB : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET1_GB { + uint32_t raw; + struct { + uint32_t BNR_NS_HIGH_OFFSET_GB : 10; + } bits; +}; + +union REG_ISP_BNR_NS_LUMA_TH_B { + uint32_t raw; + struct { + uint32_t BNR_NS_LUMA_TH_B : 10; + } bits; +}; + +union REG_ISP_BNR_NS_SLOPE_B { + uint32_t raw; + struct { + uint32_t BNR_NS_SLOPE_B : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET0_B { + uint32_t raw; + struct { + uint32_t BNR_NS_LOW_OFFSET_B : 10; + } bits; +}; + +union REG_ISP_BNR_NS_OFFSET1_B { + uint32_t raw; + struct { + uint32_t BNR_NS_HIGH_OFFSET_B : 10; + } bits; +}; + +union REG_ISP_BNR_NS_GAIN { + uint32_t raw; + struct { + uint32_t BNR_NS_GAIN : 8; + } bits; +}; + +union REG_ISP_BNR_STRENGTH_MODE { + uint32_t raw; + struct { + uint32_t BNR_STRENGTH_MODE : 8; + } bits; +}; + +union REG_ISP_BNR_INTENSITY_SEL { + uint32_t raw; + struct { + uint32_t BNR_INTENSITY_SEL_00 : 5; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_INTRA_0 { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_INTRA_0 : 3; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_INTRA_1 { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_INTRA_1 : 3; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_INTRA_2 { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_INTRA_2 : 3; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_NORM_1 { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_NORM_1 : 7; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_NORM_2 { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_NORM_2 : 8; + } bits; +}; + +union REG_ISP_BNR_VAR_TH { + uint32_t raw; + struct { + uint32_t BNR_VAR_TH : 8; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_LUT { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_LUT : 5; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_SM { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_SMOOTH : 5; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_V { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_V : 5; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_H { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_H : 5; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_D45 { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_D45 : 5; + } bits; +}; + +union REG_ISP_BNR_WEIGHT_D135 { + uint32_t raw; + struct { + uint32_t BNR_WEIGHT_D135 : 5; + } bits; +}; + +union REG_ISP_BNR_NEIGHBOR_MAX { + uint32_t raw; + struct { + uint32_t BNR_FLAG_NEIGHBOR_MAX : 1; + } bits; +}; + +union REG_ISP_BNR_RES_K_SMOOTH { + uint32_t raw; + struct { + uint32_t BNR_RES_RATIO_K_SMOOTH : 9; + } bits; +}; + +union REG_ISP_BNR_RES_K_TEXTURE { + uint32_t raw; + struct { + uint32_t BNR_RES_RATIO_K_TEXTURE : 9; + } bits; +}; + +union REG_ISP_BNR_RES_MAX { + uint32_t raw; + struct { + uint32_t BNR_RES_MAX : 12; + } bits; +}; + +union REG_ISP_BNR_DUMMY { + uint32_t raw; + struct { + uint32_t BNR_DUMMY : 16; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_CA_00 { + uint32_t raw; + struct { + uint32_t CACP_ENABLE : 1; + uint32_t CACP_MODE : 1; + uint32_t CACP_DBG_MODE : 1; + uint32_t CACP_MEM_SW_MODE : 1; + uint32_t CACP_SHDW_READ_SEL : 1; + uint32_t _rsv_5 : 3; + uint32_t PROG_HDK_DIS : 1; + uint32_t _rsv_9 : 7; + uint32_t CACP_ISO_RATIO : 11; + } bits; +}; + +union REG_CA_04 { + uint32_t raw; + struct { + uint32_t CACP_MEM_D : 24; + uint32_t _rsv_24 : 7; + uint32_t CACP_MEM_W : 1; + } bits; +}; + +union REG_CA_08 { + uint32_t raw; + struct { + uint32_t CACP_MEM_ST_ADDR : 8; + uint32_t _rsv_8 : 23; + uint32_t CACP_MEM_ST_ADDR_W : 1; + } bits; +}; + +union REG_CA_0C { + uint32_t raw; + struct { + uint32_t CACP_MEM_SW_RADDR : 8; + uint32_t _rsv_8 : 23; + uint32_t CACP_MEM_SW_R : 1; + } bits; +}; + +union REG_CA_10 { + uint32_t raw; + struct { + uint32_t CACP_MEM_SW_RDATA_R : 24; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CCM_00 { + uint32_t raw; + struct { + uint32_t CCM_00 : 14; + } bits; +}; + +union REG_ISP_CCM_01 { + uint32_t raw; + struct { + uint32_t CCM_01 : 14; + } bits; +}; + +union REG_ISP_CCM_02 { + uint32_t raw; + struct { + uint32_t CCM_02 : 14; + } bits; +}; + +union REG_ISP_CCM_10 { + uint32_t raw; + struct { + uint32_t CCM_10 : 14; + } bits; +}; + +union REG_ISP_CCM_11 { + uint32_t raw; + struct { + uint32_t CCM_11 : 14; + } bits; +}; + +union REG_ISP_CCM_12 { + uint32_t raw; + struct { + uint32_t CCM_12 : 14; + } bits; +}; + +union REG_ISP_CCM_20 { + uint32_t raw; + struct { + uint32_t CCM_20 : 14; + } bits; +}; + +union REG_ISP_CCM_21 { + uint32_t raw; + struct { + uint32_t CCM_21 : 14; + } bits; +}; + +union REG_ISP_CCM_22 { + uint32_t raw; + struct { + uint32_t CCM_22 : 14; + } bits; +}; + +union REG_ISP_CCM_CTRL { + uint32_t raw; + struct { + uint32_t CCM_SHDW_SEL : 1; + uint32_t _rsv_1 : 1; + uint32_t CCM_ENABLE : 1; + } bits; +}; + +union REG_ISP_CCM_DBG { + uint32_t raw; + struct { + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t SOFTRST : 1; + } bits; +}; + +union REG_ISP_CCM_DMY0 { + uint32_t raw; + struct { + uint32_t DMY_DEF0 : 32; + } bits; +}; + +union REG_ISP_CCM_DMY1 { + uint32_t raw; + struct { + uint32_t DMY_DEF1 : 32; + } bits; +}; + +union REG_ISP_CCM_DMY_R { + uint32_t raw; + struct { + uint32_t DMY_RO : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_MMAP_00 { + uint32_t raw; + struct { + uint32_t MMAP_0_ENABLE : 1; + uint32_t MMAP_1_ENABLE : 1; + uint32_t MMAP_MRG_MODE : 1; + uint32_t MM_DOUBLE_BUF_SEL : 1; + uint32_t ON_THE_FLY : 1; + uint32_t FIRST_FRAME_RESET : 1; + uint32_t REG_2_TAP_EN : 1; + uint32_t MIRROR_MODE_EN : 1; + uint32_t MMAP_MRG_ALPH : 8; + uint32_t GUARD_CNT : 8; + uint32_t BYPASS : 1; + uint32_t INTER_1_EN : 1; + uint32_t INTER_2_EN : 1; + uint32_t INTER_3_EN : 1; + uint32_t INTER_4_EN : 1; + uint32_t DMA_SEL : 1; + uint32_t RGBMAP_SW_CROP : 1; + } bits; +}; + +union REG_ISP_MMAP_04 { + uint32_t raw; + struct { + uint32_t MMAP_0_LPF_00 : 3; + uint32_t MMAP_0_LPF_01 : 3; + uint32_t MMAP_0_LPF_02 : 3; + uint32_t MMAP_0_LPF_10 : 3; + uint32_t MMAP_0_LPF_11 : 3; + uint32_t MMAP_0_LPF_12 : 3; + uint32_t MMAP_0_LPF_20 : 3; + uint32_t MMAP_0_LPF_21 : 3; + uint32_t MMAP_0_LPF_22 : 3; + uint32_t _rsv_27 : 2; + uint32_t FORCE_CLK_EN : 1; + uint32_t REG_8BIT_RGBMAP_MODE : 1; + uint32_t WH_SW_MODE : 1; + } bits; +}; + +union REG_ISP_MMAP_08 { + uint32_t raw; + struct { + uint32_t MMAP_0_MAP_CORING : 8; + uint32_t MMAP_0_MAP_GAIN : 8; + uint32_t MMAP_0_MAP_THD_L : 8; + uint32_t MMAP_0_MAP_THD_H : 8; + } bits; +}; + +union REG_ISP_MMAP_0C { + uint32_t raw; + struct { + uint32_t MMAP_0_LUMA_ADAPT_LUT_IN_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_0_LUMA_ADAPT_LUT_IN_1 : 12; + } bits; +}; + +union REG_ISP_MMAP_10 { + uint32_t raw; + struct { + uint32_t MMAP_0_LUMA_ADAPT_LUT_IN_2 : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_0_LUMA_ADAPT_LUT_IN_3 : 12; + } bits; +}; + +union REG_ISP_MMAP_14 { + uint32_t raw; + struct { + uint32_t MMAP_0_LUMA_ADAPT_LUT_OUT_0 : 6; + uint32_t _rsv_6 : 2; + uint32_t MMAP_0_LUMA_ADAPT_LUT_OUT_1 : 6; + uint32_t _rsv_14 : 2; + uint32_t MMAP_0_LUMA_ADAPT_LUT_OUT_2 : 6; + uint32_t _rsv_22 : 2; + uint32_t MMAP_0_LUMA_ADAPT_LUT_OUT_3 : 6; + } bits; +}; + +union REG_ISP_MMAP_18 { + uint32_t raw; + struct { + uint32_t MMAP_0_LUMA_ADAPT_LUT_SLOPE_0 : 11; + uint32_t _rsv_11 : 5; + uint32_t MMAP_0_LUMA_ADAPT_LUT_SLOPE_1 : 11; + } bits; +}; + +union REG_ISP_MMAP_1C { + uint32_t raw; + struct { + uint32_t MMAP_0_LUMA_ADAPT_LUT_SLOPE_2 : 11; + uint32_t _rsv_11 : 1; + uint32_t MMAP_0_MAP_DSHIFT_BIT : 3; + } bits; +}; + +union REG_ISP_MMAP_20 { + uint32_t raw; + struct { + uint32_t MMAP_0_IIR_PRTCT_LUT_IN_0 : 8; + uint32_t MMAP_0_IIR_PRTCT_LUT_IN_1 : 8; + uint32_t MMAP_0_IIR_PRTCT_LUT_IN_2 : 8; + uint32_t MMAP_0_IIR_PRTCT_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_MMAP_24 { + uint32_t raw; + struct { + uint32_t MMAP_0_IIR_PRTCT_LUT_OUT_0 : 4; + uint32_t MMAP_0_IIR_PRTCT_LUT_OUT_1 : 4; + uint32_t MMAP_0_IIR_PRTCT_LUT_OUT_2 : 4; + uint32_t MMAP_0_IIR_PRTCT_LUT_OUT_3 : 4; + } bits; +}; + +union REG_ISP_MMAP_28 { + uint32_t raw; + struct { + uint32_t MMAP_0_IIR_PRTCT_LUT_SLOPE_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t MMAP_0_IIR_PRTCT_LUT_SLOPE_1 : 9; + } bits; +}; + +union REG_ISP_MMAP_2C { + uint32_t raw; + struct { + uint32_t MMAP_0_IIR_PRTCT_LUT_SLOPE_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t MMAP_0_MH_WGT : 4; + } bits; +}; + +union REG_ISP_MMAP_30 { + uint32_t raw; + struct { + uint32_t IMG_WIDTHM1_SW : 14; + uint32_t _rsv_14 : 2; + uint32_t IMG_HEIGHTM1_SW : 14; + } bits; +}; + +union REG_ISP_MMAP_34 { + uint32_t raw; + struct { + uint32_t V_THD_L : 12; + uint32_t _rsv_12 : 4; + uint32_t V_THD_H : 12; + } bits; +}; + +union REG_ISP_MMAP_38 { + uint32_t raw; + struct { + uint32_t MMAP_1_MAP_CORING : 8; + } bits; +}; + +union REG_ISP_MMAP_3C { + uint32_t raw; + struct { + uint32_t V_WGT_SLP : 19; + uint32_t _rsv_19 : 5; + uint32_t MOTION_LS_MODE : 1; + uint32_t MOTION_LS_SEL : 1; + uint32_t MOTION_YV_LS_MODE : 1; + uint32_t MOTION_YV_LS_SEL : 1; + } bits; +}; + +union REG_ISP_MMAP_40 { + uint32_t raw; + struct { + uint32_t V_WGT_MAX : 9; + uint32_t _rsv_9 : 7; + uint32_t V_WGT_MIN : 9; + } bits; +}; + +union REG_ISP_MMAP_44 { + uint32_t raw; + struct { + uint32_t MMAP_MED_WGT : 9; + uint32_t _rsv_9 : 6; + uint32_t MMAP_MED_ENABLE : 1; + } bits; +}; + +union REG_ISP_MMAP_4C { + uint32_t raw; + struct { + uint32_t MMAP_1_LUMA_ADAPT_LUT_IN_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_1_LUMA_ADAPT_LUT_IN_1 : 12; + } bits; +}; + +union REG_ISP_MMAP_50 { + uint32_t raw; + struct { + uint32_t MMAP_1_LUMA_ADAPT_LUT_IN_2 : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_1_LUMA_ADAPT_LUT_IN_3 : 12; + } bits; +}; + +union REG_ISP_MMAP_54 { + uint32_t raw; + struct { + uint32_t MMAP_1_LUMA_ADAPT_LUT_OUT_0 : 6; + uint32_t _rsv_6 : 2; + uint32_t MMAP_1_LUMA_ADAPT_LUT_OUT_1 : 6; + uint32_t _rsv_14 : 2; + uint32_t MMAP_1_LUMA_ADAPT_LUT_OUT_2 : 6; + uint32_t _rsv_22 : 2; + uint32_t MMAP_1_LUMA_ADAPT_LUT_OUT_3 : 6; + } bits; +}; + +union REG_ISP_MMAP_58 { + uint32_t raw; + struct { + uint32_t MMAP_1_LUMA_ADAPT_LUT_SLOPE_0 : 11; + uint32_t _rsv_11 : 5; + uint32_t MMAP_1_LUMA_ADAPT_LUT_SLOPE_1 : 11; + } bits; +}; + +union REG_ISP_MMAP_5C { + uint32_t raw; + struct { + uint32_t MMAP_1_LUMA_ADAPT_LUT_SLOPE_2 : 11; + } bits; +}; + +union REG_ISP_MMAP_60 { + uint32_t raw; + struct { + uint32_t RGBMAP_W_BIT : 3; + uint32_t _rsv_3 : 1; + uint32_t RGBMAP_H_BIT : 3; + } bits; +}; + +union REG_ISP_MMAP_64 { + uint32_t raw; + struct { + uint32_t SRAM_WDATA_0 : 32; + } bits; +}; + +union REG_ISP_MMAP_68 { + uint32_t raw; + struct { + uint32_t SRAM_WDATA_1 : 32; + } bits; +}; + +union REG_ISP_MMAP_6C { + uint32_t raw; + struct { + uint32_t SRAM_WADD : 7; + uint32_t SRAM_WEN : 1; + uint32_t FORCE_DMA_DISABLE : 8; + uint32_t MANR_DEBUG : 16; + } bits; +}; + +union REG_ISP_MMAP_70 { + uint32_t raw; + struct { + uint32_t MMAP_0_GAIN_RATIO_R : 16; + uint32_t MMAP_0_GAIN_RATIO_G : 16; + } bits; +}; + +union REG_ISP_MMAP_74 { + uint32_t raw; + struct { + uint32_t MMAP_0_GAIN_RATIO_B : 16; + } bits; +}; + +union REG_ISP_MMAP_78 { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_SLOPE_R : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_0_NS_SLOPE_G : 10; + } bits; +}; + +union REG_ISP_MMAP_7C { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_SLOPE_B : 10; + } bits; +}; + +union REG_ISP_MMAP_80 { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_LUMA_TH0_R : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_0_NS_LUMA_TH0_G : 12; + } bits; +}; + +union REG_ISP_MMAP_84 { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_LUMA_TH0_B : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_0_NS_LOW_OFFSET_R : 12; + } bits; +}; + +union REG_ISP_MMAP_88 { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_LOW_OFFSET_G : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_0_NS_LOW_OFFSET_B : 12; + } bits; +}; + +union REG_ISP_MMAP_8C { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_HIGH_OFFSET_R : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_0_NS_HIGH_OFFSET_G : 12; + } bits; +}; + +union REG_ISP_MMAP_90 { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_HIGH_OFFSET_B : 12; + } bits; +}; + +union REG_ISP_MMAP_A0 { + uint32_t raw; + struct { + uint32_t MMAP_1_GAIN_RATIO_R : 16; + uint32_t MMAP_1_GAIN_RATIO_G : 16; + } bits; +}; + +union REG_ISP_MMAP_A4 { + uint32_t raw; + struct { + uint32_t MMAP_1_GAIN_RATIO_B : 16; + } bits; +}; + +union REG_ISP_MMAP_A8 { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_SLOPE_R : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_1_NS_SLOPE_G : 10; + } bits; +}; + +union REG_ISP_MMAP_AC { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_SLOPE_B : 10; + } bits; +}; + +union REG_ISP_MMAP_B0 { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_LUMA_TH0_R : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_1_NS_LUMA_TH0_G : 12; + } bits; +}; + +union REG_ISP_MMAP_B4 { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_LUMA_TH0_B : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_1_NS_LOW_OFFSET_R : 12; + } bits; +}; + +union REG_ISP_MMAP_B8 { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_LOW_OFFSET_G : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_1_NS_LOW_OFFSET_B : 12; + } bits; +}; + +union REG_ISP_MMAP_BC { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_HIGH_OFFSET_R : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_1_NS_HIGH_OFFSET_G : 12; + } bits; +}; + +union REG_ISP_MMAP_C0 { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_HIGH_OFFSET_B : 12; + } bits; +}; + +union REG_ISP_MMAP_C4 { + uint32_t raw; + struct { + uint32_t IMG_WIDTH_CROP : 14; + uint32_t _rsv_14 : 2; + uint32_t IMG_HEIGHT_CROP : 14; + uint32_t _rsv_30 : 1; + uint32_t CROP_ENABLE : 1; + } bits; +}; + +union REG_ISP_MMAP_C8 { + uint32_t raw; + struct { + uint32_t CROP_W_STR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_W_END : 14; + } bits; +}; + +union REG_ISP_MMAP_CC { + uint32_t raw; + struct { + uint32_t CROP_H_STR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_H_END : 14; + } bits; +}; + +union REG_ISP_MMAP_D0 { + uint32_t raw; + struct { + uint32_t IMG_WIDTH_CROP_SCALAR : 14; + uint32_t _rsv_14 : 2; + uint32_t IMG_HEIGHT_CROP_SCALAR : 14; + uint32_t _rsv_30 : 1; + uint32_t CROP_ENABLE_SCALAR : 1; + } bits; +}; + +union REG_ISP_MMAP_D4 { + uint32_t raw; + struct { + uint32_t CROP_W_STR_SCALAR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_W_END_SCALAR : 14; + } bits; +}; + +union REG_ISP_MMAP_D8 { + uint32_t raw; + struct { + uint32_t CROP_H_STR_SCALAR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_H_END_SCALAR : 14; + } bits; +}; + +union REG_ISP_MMAP_DC { + uint32_t raw; + struct { + uint32_t COEF_R : 11; + uint32_t _rsv_11 : 5; + uint32_t COEF_G : 11; + } bits; +}; + +union REG_ISP_MMAP_E0 { + uint32_t raw; + struct { + uint32_t COEF_B : 11; + uint32_t _rsv_11 : 5; + uint32_t COEF_I : 11; + } bits; +}; + +union REG_ISP_MMAP_E4 { + uint32_t raw; + struct { + uint32_t MMAP_0_GAIN_RATIO_I : 16; + uint32_t MMAP_0_NS_SLOPE_I : 10; + } bits; +}; + +union REG_ISP_MMAP_E8 { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_LUMA_TH0_I : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_0_NS_LOW_OFFSET_I : 12; + } bits; +}; + +union REG_ISP_MMAP_EC { + uint32_t raw; + struct { + uint32_t MMAP_0_NS_HIGH_OFFSET_I : 12; + } bits; +}; + +union REG_ISP_MMAP_F0 { + uint32_t raw; + struct { + uint32_t MMAP_1_GAIN_RATIO_I : 16; + uint32_t MMAP_1_NS_SLOPE_I : 10; + } bits; +}; + +union REG_ISP_MMAP_F4 { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_LUMA_TH0_I : 12; + uint32_t _rsv_12 : 4; + uint32_t MMAP_1_NS_LOW_OFFSET_I : 12; + } bits; +}; + +union REG_ISP_MMAP_F8 { + uint32_t raw; + struct { + uint32_t MMAP_1_NS_HIGH_OFFSET_I : 12; + uint32_t _rsv_12 : 4; + uint32_t HISTORY_SEL_0 : 1; + uint32_t HISTORY_SEL_1 : 1; + uint32_t HISTORY_SEL_2 : 1; + uint32_t HISTORY_SEL_3 : 1; + } bits; +}; + +union REG_ISP_MMAP_FC { + uint32_t raw; + struct { + uint32_t MANR_STATUS : 28; + uint32_t MANR_STATUS_MUX : 4; + } bits; +}; + +union REG_ISP_MMAP_100 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_CENTERX : 13; + uint32_t _rsv_13 : 3; + uint32_t MMAP_LSC_CENTERY : 13; + } bits; +}; + +union REG_ISP_MMAP_104 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_NORM : 15; + uint32_t _rsv_15 : 1; + uint32_t MMAP_LSC_DY_GAIN : 8; + } bits; +}; + +union REG_ISP_MMAP_108 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_01 : 10; + } bits; +}; + +union REG_ISP_MMAP_10C { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_03 : 10; + } bits; +}; + +union REG_ISP_MMAP_110 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_05 : 10; + } bits; +}; + +union REG_ISP_MMAP_114 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_07 : 10; + } bits; +}; + +union REG_ISP_MMAP_118 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_09 : 10; + } bits; +}; + +union REG_ISP_MMAP_11C { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_11 : 10; + } bits; +}; + +union REG_ISP_MMAP_120 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_13 : 10; + } bits; +}; + +union REG_ISP_MMAP_124 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t MMAP_LSC_COMP_GAIN_LUT_15 : 10; + } bits; +}; + +union REG_ISP_MMAP_128 { + uint32_t raw; + struct { + uint32_t MMAP_LSC_COMP_GAIN_LUT_16 : 10; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_GAMMA_CTRL { + uint32_t raw; + struct { + uint32_t GAMMA_ENABLE : 1; + uint32_t GAMMA_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_GAMMA_PROG_CTRL { + uint32_t raw; + struct { + uint32_t GAMMA_WSEL : 1; + uint32_t _rsv_1 : 3; + uint32_t GAMMA_RSEL : 1; + uint32_t _rsv_5 : 3; + uint32_t GAMMA_PROG_EN : 1; + uint32_t _rsv_9 : 3; + uint32_t GAMMA_PROG_1TO3_EN : 1; + uint32_t _rsv_13 : 3; + uint32_t GAMMA_PROG_MODE : 2; + } bits; +}; + +union REG_ISP_GAMMA_PROG_ST_ADDR { + uint32_t raw; + struct { + uint32_t GAMMA_ST_ADDR : 8; + uint32_t _rsv_8 : 23; + uint32_t GAMMA_ST_W : 1; + } bits; +}; + +union REG_ISP_GAMMA_PROG_DATA { + uint32_t raw; + struct { + uint32_t GAMMA_DATA_E : 12; + uint32_t _rsv_12 : 4; + uint32_t GAMMA_DATA_O : 12; + uint32_t _rsv_28 : 3; + uint32_t GAMMA_W : 1; + } bits; +}; + +union REG_ISP_GAMMA_PROG_MAX { + uint32_t raw; + struct { + uint32_t GAMMA_MAX : 13; + } bits; +}; + +union REG_ISP_GAMMA_MEM_SW_RADDR { + uint32_t raw; + struct { + uint32_t GAMMA_SW_RADDR : 8; + uint32_t _rsv_8 : 4; + uint32_t GAMMA_SW_R_MEM_SEL : 1; + } bits; +}; + +union REG_ISP_GAMMA_MEM_SW_RDATA { + uint32_t raw; + struct { + uint32_t GAMMA_RDATA_R : 12; + uint32_t _rsv_12 : 19; + uint32_t GAMMA_SW_R : 1; + } bits; +}; + +union REG_ISP_GAMMA_MEM_SW_RDATA_BG { + uint32_t raw; + struct { + uint32_t GAMMA_RDATA_G : 12; + uint32_t _rsv_12 : 4; + uint32_t GAMMA_RDATA_B : 12; + } bits; +}; + +union REG_ISP_GAMMA_DBG { + uint32_t raw; + struct { + uint32_t PROG_HDK_DIS : 1; + uint32_t SOFTRST : 1; + } bits; +}; + +union REG_ISP_GAMMA_DMY0 { + uint32_t raw; + struct { + uint32_t DMY_DEF0 : 32; + } bits; +}; + +union REG_ISP_GAMMA_DMY1 { + uint32_t raw; + struct { + uint32_t DMY_DEF1 : 32; + } bits; +}; + +union REG_ISP_GAMMA_DMY_R { + uint32_t raw; + struct { + uint32_t DMY_RO : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CLUT_CTRL { + uint32_t raw; + struct { + uint32_t CLUT_ENABLE : 1; + uint32_t CLUT_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t PROG_EN : 1; + } bits; +}; + +union REG_ISP_CLUT_PROG_ADDR { + uint32_t raw; + struct { + uint32_t SRAM_R_IDX : 5; + uint32_t _rsv_5 : 3; + uint32_t SRAM_G_IDX : 5; + uint32_t _rsv_13 : 3; + uint32_t SRAM_B_IDX : 5; + } bits; +}; + +union REG_ISP_CLUT_PROG_DATA { + uint32_t raw; + struct { + uint32_t SRAM_WDATA : 30; + uint32_t _rsv_30 : 1; + uint32_t SRAM_WR : 1; + } bits; +}; + +union REG_ISP_CLUT_PROG_RDATA { + uint32_t raw; + struct { + uint32_t SRAM_RDATA : 30; + uint32_t _rsv_30 : 1; + uint32_t SRAM_RD : 1; + } bits; +}; + +union REG_ISP_CLUT_DBG { + uint32_t raw; + struct { + uint32_t PROG_HDK_DIS : 1; + } bits; +}; + +union REG_ISP_CLUT_DMY0 { + uint32_t raw; + struct { + uint32_t DMY_DEF0 : 32; + } bits; +}; + +union REG_ISP_CLUT_DMY1 { + uint32_t raw; + struct { + uint32_t DMY_DEF1 : 32; + } bits; +}; + +union REG_ISP_CLUT_DMY_R { + uint32_t raw; + struct { + uint32_t DMY_RO : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_DEHAZE_DHZ_SMOOTH { + uint32_t raw; + struct { + uint32_t DEHAZE_W : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TH_SMOOTH : 10; + } bits; +}; + +union REG_ISP_DEHAZE_DHZ_SKIN { + uint32_t raw; + struct { + uint32_t DEHAZE_SKIN_CB : 8; + uint32_t DEHAZE_SKIN_CR : 8; + } bits; +}; + +union REG_ISP_DEHAZE_DHZ_WGT { + uint32_t raw; + struct { + uint32_t DEHAZE_A_LUMA_WGT : 6; + uint32_t _rsv_6 : 2; + uint32_t DEHAZE_BLEND_WGT : 6; + uint32_t _rsv_14 : 2; + uint32_t DEHAZE_TMAP_SCALE : 8; + uint32_t DEHAZE_D_WGT : 5; + } bits; +}; + +union REG_ISP_DEHAZE_DHZ_BYPASS { + uint32_t raw; + struct { + uint32_t DEHAZE_ENABLE : 1; + uint32_t DEHAZE_LUMA_LUT_ENABLE : 1; + uint32_t DEHAZE_SKIN_LUT_ENABLE : 1; + uint32_t DEHAZE_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_DEHAZE_0 { + uint32_t raw; + struct { + uint32_t SOFTRST : 1; + uint32_t _rsv_1 : 4; + uint32_t DBG_EN : 1; + uint32_t _rsv_6 : 10; + uint32_t CHECK_SUM : 16; + } bits; +}; + +union REG_ISP_DEHAZE_1 { + uint32_t raw; + struct { + uint32_t DEHAZE_CUM_TH : 14; + uint32_t _rsv_14 : 2; + uint32_t DEHAZE_HIST_TH : 14; + } bits; +}; + +union REG_ISP_DEHAZE_2 { + uint32_t raw; + struct { + uint32_t DEHAZE_SW_DC_TH : 10; + uint32_t _rsv_10 : 6; + uint32_t DEHAZE_SW_AGLOBAL_R : 12; + uint32_t DEHAZE_SW_DC_TRIG : 1; + uint32_t _rsv_29 : 2; + uint32_t DEHAZE_SW_DC_AGLOBAL_TRIG : 1; + } bits; +}; + +union REG_ISP_DEHAZE_28 { + uint32_t raw; + struct { + uint32_t DEHAZE_SW_AGLOBAL_G : 12; + uint32_t _rsv_12 : 4; + uint32_t DEHAZE_SW_AGLOBAL_B : 12; + } bits; +}; + +union REG_ISP_DEHAZE_2C { + uint32_t raw; + struct { + uint32_t DEHAZE_AGLOBAL_MAX : 12; + uint32_t _rsv_12 : 4; + uint32_t DEHAZE_AGLOBAL_MIN : 12; + } bits; +}; + +union REG_ISP_DEHAZE_3 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_MIN : 13; + uint32_t _rsv_13 : 3; + uint32_t DEHAZE_TMAP_MAX : 13; + } bits; +}; + +union REG_ISP_DEHAZE_5 { + uint32_t raw; + struct { + uint32_t FMT_ST : 12; + uint32_t _rsv_12 : 4; + uint32_t FMT_END : 12; + uint32_t TILE_NM : 4; + } bits; +}; + +union REG_ISP_DEHAZE_6 { + uint32_t raw; + struct { + uint32_t DBG_SEL : 3; + } bits; +}; + +union REG_ISP_DEHAZE_7 { + uint32_t raw; + struct { + uint32_t DHZ_DBG0 : 32; + } bits; +}; + +union REG_ISP_DEHAZE_8 { + uint32_t raw; + struct { + uint32_t DHZ_DBG1 : 32; + } bits; +}; + +union REG_ISP_DEHAZE_9 { + uint32_t raw; + struct { + uint32_t DEHAZE_LUMA_LUT00 : 8; + uint32_t DEHAZE_LUMA_LUT01 : 8; + uint32_t DEHAZE_LUMA_LUT02 : 8; + uint32_t DEHAZE_LUMA_LUT03 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_10 { + uint32_t raw; + struct { + uint32_t DEHAZE_LUMA_LUT04 : 8; + uint32_t DEHAZE_LUMA_LUT05 : 8; + uint32_t DEHAZE_LUMA_LUT06 : 8; + uint32_t DEHAZE_LUMA_LUT07 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_11 { + uint32_t raw; + struct { + uint32_t DEHAZE_LUMA_LUT08 : 8; + uint32_t DEHAZE_LUMA_LUT09 : 8; + uint32_t DEHAZE_LUMA_LUT10 : 8; + uint32_t DEHAZE_LUMA_LUT11 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_12 { + uint32_t raw; + struct { + uint32_t DEHAZE_LUMA_LUT12 : 8; + uint32_t DEHAZE_LUMA_LUT13 : 8; + uint32_t DEHAZE_LUMA_LUT14 : 8; + uint32_t DEHAZE_LUMA_LUT15 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_17 { + uint32_t raw; + struct { + uint32_t DEHAZE_SKIN_LUT00 : 8; + uint32_t DEHAZE_SKIN_LUT01 : 8; + uint32_t DEHAZE_SKIN_LUT02 : 8; + uint32_t DEHAZE_SKIN_LUT03 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_18 { + uint32_t raw; + struct { + uint32_t DEHAZE_SKIN_LUT04 : 8; + uint32_t DEHAZE_SKIN_LUT05 : 8; + uint32_t DEHAZE_SKIN_LUT06 : 8; + uint32_t DEHAZE_SKIN_LUT07 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_19 { + uint32_t raw; + struct { + uint32_t DEHAZE_SKIN_LUT08 : 8; + uint32_t DEHAZE_SKIN_LUT09 : 8; + uint32_t DEHAZE_SKIN_LUT10 : 8; + uint32_t DEHAZE_SKIN_LUT11 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_20 { + uint32_t raw; + struct { + uint32_t DEHAZE_SKIN_LUT12 : 8; + uint32_t DEHAZE_SKIN_LUT13 : 8; + uint32_t DEHAZE_SKIN_LUT14 : 8; + uint32_t DEHAZE_SKIN_LUT15 : 8; + } bits; +}; + +union REG_ISP_DEHAZE_25 { + uint32_t raw; + struct { + uint32_t AGLOBAL_R : 12; + uint32_t _rsv_12 : 4; + uint32_t AGLOBAL_G : 12; + } bits; +}; + +union REG_ISP_DEHAZE_26 { + uint32_t raw; + struct { + uint32_t AGLOBAL_B : 12; + uint32_t _rsv_12 : 4; + uint32_t DC_TH : 10; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_00 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT000 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT001 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT002 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT003 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_01 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT004 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT005 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT006 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT007 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_02 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT008 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT009 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT010 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT011 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_03 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT012 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT013 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT014 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT015 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_04 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT016 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT017 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT018 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT019 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_05 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT020 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT021 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT022 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT023 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_06 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT024 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT025 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT026 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT027 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_07 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT028 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT029 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT030 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT031 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_08 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT032 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT033 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT034 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT035 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_09 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT036 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT037 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT038 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT039 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_10 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT040 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT041 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT042 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT043 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_11 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT044 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT045 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT046 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT047 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_12 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT048 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT049 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT050 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT051 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_13 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT052 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT053 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT054 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT055 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_14 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT056 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT057 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT058 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT059 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_15 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT060 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT061 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT062 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT063 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_16 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT064 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT065 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT066 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT067 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_17 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT068 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT069 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT070 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT071 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_18 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT072 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT073 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT074 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT075 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_19 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT076 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT077 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT078 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT079 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_20 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT080 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT081 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT082 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT083 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_21 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT084 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT085 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT086 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT087 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_22 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT088 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT089 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT090 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT091 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_23 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT092 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT093 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT094 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT095 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_24 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT096 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT097 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT098 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT099 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_25 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT100 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT101 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT102 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT103 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_26 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT104 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT105 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT106 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT107 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_27 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT108 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT109 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT110 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT111 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_28 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT112 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT113 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT114 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT115 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_29 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT116 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT117 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT118 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT119 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_30 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT120 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT121 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT122 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT123 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_31 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT124 : 7; + uint32_t _rsv_7 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT125 : 7; + uint32_t _rsv_15 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT126 : 7; + uint32_t _rsv_23 : 1; + uint32_t DEHAZE_TMAP_GAIN_LUT127 : 7; + } bits; +}; + +union REG_ISP_DEHAZE_TMAP_32 { + uint32_t raw; + struct { + uint32_t DEHAZE_TMAP_GAIN_LUT128 : 7; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CSC_0 { + uint32_t raw; + struct { + uint32_t CSC_ENABLE : 1; + uint32_t R2Y4_SHDW_SEL : 1; + } bits; +}; + +union REG_ISP_CSC_1 { + uint32_t raw; + struct { + uint32_t OP_START : 1; + uint32_t CONT_EN : 1; + uint32_t R2Y4_BYPASS : 1; + uint32_t SOFTRST : 1; + uint32_t AUTO_UPDATE_EN : 1; + uint32_t DBG_EN : 1; + uint32_t _rsv_6 : 10; + uint32_t CHECK_SUM : 16; + } bits; +}; + +union REG_ISP_CSC_2 { + uint32_t raw; + struct { + uint32_t SHDW_UPDATE_REQ : 1; + } bits; +}; + +union REG_ISP_CSC_3 { + uint32_t raw; + struct { + uint32_t DMY0 : 32; + } bits; +}; + +union REG_ISP_CSC_4 { + uint32_t raw; + struct { + uint32_t COEFF_00 : 14; + uint32_t _rsv_14 : 2; + uint32_t COEFF_01 : 14; + } bits; +}; + +union REG_ISP_CSC_5 { + uint32_t raw; + struct { + uint32_t COEFF_02 : 14; + uint32_t _rsv_14 : 2; + uint32_t COEFF_10 : 14; + } bits; +}; + +union REG_ISP_CSC_6 { + uint32_t raw; + struct { + uint32_t COEFF_11 : 14; + uint32_t _rsv_14 : 2; + uint32_t COEFF_12 : 14; + } bits; +}; + +union REG_ISP_CSC_7 { + uint32_t raw; + struct { + uint32_t COEFF_20 : 14; + uint32_t _rsv_14 : 2; + uint32_t COEFF_21 : 14; + } bits; +}; + +union REG_ISP_CSC_8 { + uint32_t raw; + struct { + uint32_t COEFF_22 : 14; + uint32_t _rsv_14 : 2; + uint32_t OFFSET_0 : 11; + } bits; +}; + +union REG_ISP_CSC_9 { + uint32_t raw; + struct { + uint32_t OFFSET_1 : 11; + uint32_t _rsv_11 : 5; + uint32_t OFFSET_2 : 11; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_RGB_DITHER_RGB_DITHER { + uint32_t raw; + struct { + uint32_t RGB_DITHER_ENABLE : 1; + uint32_t RGB_DITHER_MOD_EN : 1; + uint32_t RGB_DITHER_HISTIDX_EN : 1; + uint32_t RGB_DITHER_FMNUM_EN : 1; + uint32_t RGB_DITHER_SHDW_SEL : 1; + uint32_t RGB_DITHER_SOFTRST : 1; + uint32_t _rsv_6 : 2; + uint32_t CROP_WIDTHM1 : 12; + uint32_t CROP_HEIGHTM1 : 12; + } bits; +}; + +union REG_ISP_RGB_DITHER_RGB_DITHER_DEBUG0 { + uint32_t raw; + struct { + uint32_t RGB_DITHER_DEBUG0 : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_DCI_STATUS { + uint32_t raw; + struct { + uint32_t DCI_STATUS : 32; + } bits; +}; + +union REG_ISP_DCI_GRACE_RESET { + uint32_t raw; + struct { + uint32_t DCI_GRACE_RESET : 1; + } bits; +}; + +union REG_ISP_DCI_MONITOR { + uint32_t raw; + struct { + uint32_t DCI_MONITOR : 32; + } bits; +}; + +union REG_ISP_DCI_ENABLE { + uint32_t raw; + struct { + uint32_t DCI_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DCI_HIST_ENABLE : 1; + uint32_t _rsv_5 : 3; + uint32_t DCI_UV_GAIN_ENABLE : 1; + uint32_t _rsv_9 : 19; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_DCI_MAP_ENABLE { + uint32_t raw; + struct { + uint32_t DCI_MAP_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DCI_PER1SAMPLE_ENABLE : 1; + uint32_t _rsv_5 : 3; + uint32_t DCI_HISTO_BIG_ENDIAN : 1; + uint32_t _rsv_9 : 3; + uint32_t DCI_ROI_ENABLE : 1; + uint32_t _rsv_13 : 7; + uint32_t DCI_ZEROING_ENABLE : 1; + uint32_t _rsv_21 : 3; + uint32_t DCI_SHIFT_ENABLE : 1; + uint32_t _rsv_25 : 3; + uint32_t DCI_INDEX_ENABLE : 1; + } bits; +}; + +union REG_ISP_DCI_FLOW { + uint32_t raw; + struct { + uint32_t DCI_ZERODCIOGRAM : 1; + uint32_t _rsv_1 : 3; + uint32_t DCI_SHADOW_SELECT : 1; + } bits; +}; + +union REG_ISP_DCI_DEMO_MODE { + uint32_t raw; + struct { + uint32_t DCI_DEMO_MODE : 1; + } bits; +}; + +union REG_ISP_DCI_MONITOR_SELECT { + uint32_t raw; + struct { + uint32_t DCI_MONITOR_SELECT : 32; + } bits; +}; + +union REG_ISP_DCI_LOCATION { + uint32_t raw; + struct { + uint32_t DCI_LOCATION : 32; + } bits; +}; + +union REG_ISP_DCI_PROG_DATA { + uint32_t raw; + struct { + uint32_t DCI_PROG_DATA : 32; + } bits; +}; + +union REG_ISP_DCI_PROG_CTRL { + uint32_t raw; + struct { + uint32_t DCI_PROG_CTRL : 32; + } bits; +}; + +union REG_ISP_DCI_PROG_MAX { + uint32_t raw; + struct { + uint32_t DCI_PROG_MAX : 32; + } bits; +}; + +union REG_ISP_DCI_CTRL { + uint32_t raw; + struct { + uint32_t DCI_CTRL : 32; + } bits; +}; + +union REG_ISP_DCI_MEM_SW_MODE { + uint32_t raw; + struct { + uint32_t DCI_MEM_SW_MODE : 32; + } bits; +}; + +union REG_ISP_DCI_MEM_RADDR { + uint32_t raw; + struct { + uint32_t DCI_MEM_RADDR : 32; + } bits; +}; + +union REG_ISP_DCI_MEM_RDATA { + uint32_t raw; + struct { + uint32_t DCI_MEM_RDATA : 32; + } bits; +}; + +union REG_ISP_DCI_DEBUG { + uint32_t raw; + struct { + uint32_t DCI_DEBUG : 32; + } bits; +}; + +union REG_ISP_DCI_DUMMY { + uint32_t raw; + struct { + uint32_t DCI_DUMMY : 32; + } bits; +}; + +union REG_ISP_DCI_IMG_WIDTHM1 { + uint32_t raw; + struct { + uint32_t IMG_WIDTHM1 : 16; + } bits; +}; + +union REG_ISP_DCI_LUT_ORDER_SELECT { + uint32_t raw; + struct { + uint32_t DCI_LUT_ORDER_SELECT : 1; + } bits; +}; + +union REG_ISP_DCI_ROI_START { + uint32_t raw; + struct { + uint32_t DCI_ROI_START_X : 13; + uint32_t _rsv_13 : 3; + uint32_t DCI_ROI_START_Y : 13; + } bits; +}; + +union REG_ISP_DCI_ROI_GEO { + uint32_t raw; + struct { + uint32_t DCI_ROI_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t DCI_ROI_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_DCI_UV_GAIN_MAX { + uint32_t raw; + struct { + uint32_t DCI_UV_GAIN_MAX : 7; + uint32_t _rsv_7 : 9; + uint32_t DCI_UV_GAIN_MIN : 7; + } bits; +}; + +union REG_ISP_DCI_MAP_DBG { + uint32_t raw; + struct { + uint32_t PROG_HDK_DIS : 1; + uint32_t CONT_EN : 1; + uint32_t SOFTRST : 1; + uint32_t DBG_EN : 1; + uint32_t _rsv_4 : 12; + uint32_t CHECK_SUM : 16; + } bits; +}; + +union REG_ISP_DCI_BAYER_STARTING { + uint32_t raw; + struct { + uint32_t DCI_BAYER_STARTING : 4; + uint32_t _rsv_4 : 12; + uint32_t FORCE_BAYER_ENABLE : 1; + } bits; +}; + +union REG_ISP_DCI_DMI_ENABLE { + uint32_t raw; + struct { + uint32_t DMI_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DMI_QOS : 1; + uint32_t _rsv_5 : 3; + uint32_t FORCE_DMA_DISABLE : 1; + } bits; +}; + +union REG_ISP_DCI_GAMMA_CTRL { + uint32_t raw; + struct { + uint32_t _rsv_1 : 1; + uint32_t GAMMA_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_DCI_GAMMA_PROG_CTRL { + uint32_t raw; + struct { + uint32_t GAMMA_WSEL : 1; + uint32_t _rsv_1 : 3; + uint32_t GAMMA_RSEL : 1; + uint32_t _rsv_5 : 3; + uint32_t GAMMA_PROG_EN : 1; + uint32_t _rsv_9 : 3; + uint32_t GAMMA_PROG_1TO3_EN : 1; + uint32_t _rsv_13 : 3; + uint32_t GAMMA_PROG_MODE : 2; + } bits; +}; + +union REG_ISP_DCI_GAMMA_PROG_DATA { + uint32_t raw; + struct { + uint32_t GAMMA_DATA_E : 12; + uint32_t _rsv_12 : 4; + uint32_t GAMMA_DATA_O : 12; + uint32_t _rsv_28 : 3; + uint32_t GAMMA_W : 1; + } bits; +}; + +union REG_ISP_DCI_GAMMA_PROG_MAX { + uint32_t raw; + struct { + uint32_t GAMMA_MAX : 12; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_HIST_EDGE_V_STATUS { + uint32_t raw; + struct { + uint32_t STATUS : 32; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_SW_CTL { + uint32_t raw; + struct { + uint32_t SW_RESET : 1; + uint32_t CLR_SRAM : 1; + uint32_t _rsv_2 : 1; + uint32_t SHAW_SEL : 1; + uint32_t TILE_NM : 4; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_BYPASS { + uint32_t raw; + struct { + uint32_t BYPASS : 1; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_IP_CONFIG { + uint32_t raw; + struct { + uint32_t HIST_EDGE_V_ENABLE : 1; + uint32_t HIST_EDGE_V_LUMA_MODE : 1; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_HIST_EDGE_V_OFFSETX { + uint32_t raw; + struct { + uint32_t HIST_EDGE_V_OFFSETX : 13; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_HIST_EDGE_V_OFFSETY { + uint32_t raw; + struct { + uint32_t HIST_EDGE_V_OFFSETY : 13; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_MONITOR { + uint32_t raw; + struct { + uint32_t MONITOR : 32; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_MONITOR_SELECT { + uint32_t raw; + struct { + uint32_t MONITOR_SEL : 32; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_LOCATION { + uint32_t raw; + struct { + uint32_t LOCATION : 32; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY : 16; + } bits; +}; + +union REG_ISP_HIST_EDGE_V_DMI_ENABLE { + uint32_t raw; + struct { + uint32_t DMI_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DMI_QOS : 1; + uint32_t _rsv_5 : 3; + uint32_t FORCE_DMA_DISABLE : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_FUSION_FS_CTRL_0 { + uint32_t raw; + struct { + uint32_t FS_ENABLE : 1; + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t SE_IN_SEL : 1; + uint32_t FORCE_PCLK_ENABLE : 1; + uint32_t FS_MC_ENABLE : 1; + uint32_t FS_DC_MODE : 1; + uint32_t FS_LUMA_MODE : 1; + uint32_t FS_LMAP_GUIDE_DC_MODE : 1; + uint32_t FS_LMAP_GUIDE_LUMA_MODE : 1; + uint32_t _rsv_9 : 3; + uint32_t FS_S_MAX : 20; + } bits; +}; + +union REG_FUSION_FS_SE_GAIN { + uint32_t raw; + struct { + uint32_t FS_LS_GAIN : 14; + uint32_t _rsv_14 : 2; + uint32_t FS_OUT_SEL : 4; + } bits; +}; + +union REG_FUSION_FS_LUMA_THD { + uint32_t raw; + struct { + uint32_t FS_LUMA_THD_L : 12; + uint32_t _rsv_12 : 4; + uint32_t FS_LUMA_THD_H : 12; + } bits; +}; + +union REG_FUSION_FS_WGT { + uint32_t raw; + struct { + uint32_t FS_WGT_MAX : 9; + uint32_t _rsv_9 : 7; + uint32_t FS_WGT_MIN : 9; + } bits; +}; + +union REG_FUSION_FS_WGT_SLOPE { + uint32_t raw; + struct { + uint32_t FS_WGT_SLP : 19; + } bits; +}; + +union REG_FUSION_FS_SHDW_READ_SEL { + uint32_t raw; + struct { + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_FUSION_FS_MOTION_LUT_IN { + uint32_t raw; + struct { + uint32_t FS_MOTION_LUT_IN_0 : 8; + uint32_t FS_MOTION_LUT_IN_1 : 8; + uint32_t FS_MOTION_LUT_IN_2 : 8; + uint32_t FS_MOTION_LUT_IN_3 : 8; + } bits; +}; + +union REG_FUSION_FS_MOTION_LUT_OUT_0 { + uint32_t raw; + struct { + uint32_t FS_MOTION_LUT_OUT_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t FS_MOTION_LUT_OUT_1 : 9; + } bits; +}; + +union REG_FUSION_FS_MOTION_LUT_OUT_1 { + uint32_t raw; + struct { + uint32_t FS_MOTION_LUT_OUT_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t FS_MOTION_LUT_OUT_3 : 9; + } bits; +}; + +union REG_FUSION_FS_MOTION_LUT_SLOPE_0 { + uint32_t raw; + struct { + uint32_t FS_MOTION_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t FS_MOTION_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_FUSION_FS_MOTION_LUT_SLOPE_1 { + uint32_t raw; + struct { + uint32_t FS_MOTION_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_FUSION_FS_CTRL_1 { + uint32_t raw; + struct { + uint32_t LE_IN_SEL : 1; + uint32_t _rsv_1 : 5; + uint32_t FS_FUSION_TYPE : 2; + uint32_t _rsv_8 : 8; + uint32_t FS_FUSION_LWGT : 9; + } bits; +}; + +union REG_FUSION_FS_CALIB_CTRL_0 { + uint32_t raw; + struct { + uint32_t FS_CALIB_LUMA_LOW_TH : 12; + uint32_t _rsv_12 : 4; + uint32_t FS_CALIB_LUMA_HIGH_TH : 12; + } bits; +}; + +union REG_FUSION_FS_CALIB_CTRL_1 { + uint32_t raw; + struct { + uint32_t FS_CALIB_DIF_TH : 12; + } bits; +}; + +union REG_FUSION_FS_SE_FIX_OFFSET_0 { + uint32_t raw; + struct { + uint32_t FS_SE_FIX_OFFSET_R : 21; + } bits; +}; + +union REG_FUSION_FS_SE_FIX_OFFSET_1 { + uint32_t raw; + struct { + uint32_t FS_SE_FIX_OFFSET_G : 21; + } bits; +}; + +union REG_FUSION_FS_SE_FIX_OFFSET_2 { + uint32_t raw; + struct { + uint32_t FS_SE_FIX_OFFSET_B : 21; + } bits; +}; + +union REG_FUSION_FS_CALIB_OUT_0 { + uint32_t raw; + struct { + uint32_t FS_CAL_PXL_NUM : 20; + } bits; +}; + +union REG_FUSION_FS_CALIB_OUT_1 { + uint32_t raw; + struct { + uint32_t FS_PXL_DIFF_SUM_R : 32; + } bits; +}; + +union REG_FUSION_FS_CALIB_OUT_2 { + uint32_t raw; + struct { + uint32_t FS_PXL_DIFF_SUM_G : 32; + } bits; +}; + +union REG_FUSION_FS_CALIB_OUT_3 { + uint32_t raw; + struct { + uint32_t FS_PXL_DIFF_SUM_B : 32; + } bits; +}; + +union REG_FUSION_FS_LMAP_DARK_THD { + uint32_t raw; + struct { + uint32_t FS_LMAP_GUIDE_DARK_THD_L : 12; + uint32_t _rsv_12 : 4; + uint32_t FS_LMAP_GUIDE_DARK_THD_H : 12; + } bits; +}; + +union REG_FUSION_FS_LMAP_DARK_WGT { + uint32_t raw; + struct { + uint32_t FS_LMAP_GUIDE_DARK_WGT_L : 9; + uint32_t _rsv_9 : 7; + uint32_t FS_LMAP_GUIDE_DARK_WGT_H : 9; + } bits; +}; + +union REG_FUSION_FS_LMAP_DARK_WGT_SLOPE { + uint32_t raw; + struct { + uint32_t FS_LMAP_GUIDE_DARK_WGT_SLP : 19; + } bits; +}; + +union REG_FUSION_FS_LMAP_BRIT_THD { + uint32_t raw; + struct { + uint32_t FS_LMAP_GUIDE_BRIT_THD_L : 12; + uint32_t _rsv_12 : 4; + uint32_t FS_LMAP_GUIDE_BRIT_THD_H : 12; + } bits; +}; + +union REG_FUSION_FS_LMAP_BRIT_WGT { + uint32_t raw; + struct { + uint32_t FS_LMAP_GUIDE_BRIT_WGT_L : 9; + uint32_t _rsv_9 : 7; + uint32_t FS_LMAP_GUIDE_BRIT_WGT_H : 9; + } bits; +}; + +union REG_FUSION_FS_LMAP_BRIT_WGT_SLOPE { + uint32_t raw; + struct { + uint32_t FS_LMAP_GUIDE_BRIT_WGT_SLP : 19; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_LTM_H00 { + uint32_t raw; + struct { + uint32_t LTM_ENABLE : 1; + uint32_t LTM_DARK_ENH_ENABLE : 1; + uint32_t LTM_BRIT_ENH_ENABLE : 1; + uint32_t _rsv_3 : 2; + uint32_t SHDW_READ_SEL : 1; + uint32_t _rsv_6 : 4; + uint32_t FORCE_PCLK_ENABLE : 1; + uint32_t _rsv_11 : 2; + uint32_t LTM_DBG_MODE : 3; + uint32_t FORCE_DMA_DISABLE : 2; + uint32_t DARK_TONE_WGT_REFINE_ENABLE : 1; + uint32_t BRIT_TONE_WGT_REFINE_ENABLE : 1; + uint32_t _rsv_20 : 11; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_LTM_H04 { + uint32_t raw; + struct { + uint32_t IMG_WIDTHM1_SW : 14; + uint32_t _rsv_14 : 2; + uint32_t IMG_HEIGHTM1_SW : 14; + uint32_t FIRST_FRAME_RESET : 1; + uint32_t WH_SW_MODE : 1; + } bits; +}; + +union REG_LTM_H08 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 8; + uint32_t LTM_BE_STRTH_DSHFT : 5; + uint32_t _rsv_13 : 3; + uint32_t LTM_BE_STRTH_GAIN : 11; + } bits; +}; + +union REG_LTM_H0C { + uint32_t raw; + struct { + uint32_t _rsv_0 : 8; + uint32_t LTM_DE_STRTH_DSHFT : 5; + uint32_t _rsv_13 : 3; + uint32_t LTM_DE_STRTH_GAIN : 11; + } bits; +}; + +union REG_LTM_H14 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 16; + uint32_t LTM_BE_RNG : 4; + uint32_t _rsv_20 : 4; + uint32_t LTM_DE_RNG : 4; + } bits; +}; + +union REG_LTM_H18 { + uint32_t raw; + struct { + uint32_t LTM_BRI_IN_THD_L : 8; + uint32_t LTM_BRI_IN_THD_H : 8; + uint32_t _rsv_16 : 7; + uint32_t LTM_BRI_OUT_THD_L : 9; + } bits; +}; + +union REG_LTM_H1C { + uint32_t raw; + struct { + uint32_t LTM_BRI_OUT_THD_H : 9; + uint32_t LTM_BRI_IN_GAIN_SLOP : 17; + } bits; +}; + +union REG_LTM_H20 { + uint32_t raw; + struct { + uint32_t LTM_DAR_IN_THD_L : 8; + uint32_t LTM_DAR_IN_THD_H : 8; + uint32_t _rsv_16 : 7; + uint32_t LTM_DAR_OUT_THD_L : 9; + } bits; +}; + +union REG_LTM_H24 { + uint32_t raw; + struct { + uint32_t LTM_DAR_OUT_THD_H : 9; + uint32_t LTM_DAR_IN_GAIN_SLOP : 17; + } bits; +}; + +union REG_LTM_H28 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 4; + uint32_t LTM_B_CURVE_QUAN_BIT : 4; + uint32_t _rsv_8 : 4; + uint32_t LTM_G_CURVE_1_QUAN_BIT : 4; + } bits; +}; + +union REG_LTM_H2C { + uint32_t raw; + struct { + uint32_t LTM_BE_DIST_WGT_00 : 5; + uint32_t LTM_BE_DIST_WGT_01 : 5; + uint32_t LTM_BE_DIST_WGT_02 : 5; + uint32_t LTM_BE_DIST_WGT_03 : 5; + uint32_t LTM_BE_DIST_WGT_04 : 5; + uint32_t LTM_BE_DIST_WGT_05 : 5; + } bits; +}; + +union REG_LTM_H30 { + uint32_t raw; + struct { + uint32_t LTM_DE_DIST_WGT_00 : 5; + uint32_t LTM_DE_DIST_WGT_01 : 5; + uint32_t LTM_DE_DIST_WGT_02 : 5; + uint32_t LTM_DE_DIST_WGT_03 : 5; + uint32_t LTM_DE_DIST_WGT_04 : 5; + uint32_t LTM_DE_DIST_WGT_05 : 5; + } bits; +}; + +union REG_LTM_H34 { + uint32_t raw; + struct { + uint32_t LUT_DBG_RADDR : 10; + uint32_t _rsv_10 : 4; + uint32_t LUT_DBG_RSEL : 1; + uint32_t LUT_DBG_READ_EN_1T : 1; + uint32_t LUT_PROG_EN_BRIGHT : 1; + uint32_t LUT_PROG_EN_DARK : 1; + uint32_t LUT_PROG_EN_GLOBAL : 1; + } bits; +}; + +union REG_LTM_H38 { + uint32_t raw; + struct { + uint32_t LUT_WDATA : 32; + } bits; +}; + +union REG_LTM_H3C { + uint32_t raw; + struct { + uint32_t LUT_WSTADDR : 10; + uint32_t _rsv_10 : 4; + uint32_t LUT_WSEL : 1; + uint32_t LUT_WDATA_TRIG_1T : 1; + uint32_t LUT_WSTADDR_TRIG_1T : 1; + } bits; +}; + +union REG_LTM_H40 { + uint32_t raw; + struct { + uint32_t BRIGHT_LUT_MAX : 16; + } bits; +}; + +union REG_LTM_H44 { + uint32_t raw; + struct { + uint32_t DARK_LUT_MAX : 16; + } bits; +}; + +union REG_LTM_H48 { + uint32_t raw; + struct { + uint32_t GLOBAL_LUT_MAX : 16; + } bits; +}; + +union REG_LTM_H4C { + uint32_t raw; + struct { + uint32_t LUT_DBG_RDATA : 32; + } bits; +}; + +union REG_LTM_H50 { + uint32_t raw; + struct { + uint32_t DUMMY_RW : 16; + uint32_t DUMMY_RO : 16; + } bits; +}; + +union REG_LTM_H54 { + uint32_t raw; + struct { + uint32_t CROP_W_STR_SCALAR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_W_END_SCALAR : 14; + uint32_t _rsv_30 : 1; + uint32_t CROP_ENABLE_SCALAR : 1; + } bits; +}; + +union REG_LTM_H58 { + uint32_t raw; + struct { + uint32_t CROP_H_STR_SCALAR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_H_END_SCALAR : 14; + } bits; +}; + +union REG_LTM_H5C { + uint32_t raw; + struct { + uint32_t IMG_HEIGHT_CROP_SCALAR : 14; + uint32_t _rsv_14 : 2; + uint32_t IMG_WIDTH_CROP_SCALAR : 14; + } bits; +}; + +union REG_LTM_H60 { + uint32_t raw; + struct { + uint32_t HW_MEM_SEL : 1; + uint32_t INTER_1_BYPASS : 1; + uint32_t INTER_2_BYPASS : 1; + uint32_t _rsv_3 : 1; + uint32_t LMAP_ASSIGN : 1; + uint32_t LMAP_DEBUG : 1; + uint32_t PHASE_COMP : 1; + uint32_t SCALER_PUSH_ON : 1; + uint32_t _rsv_8 : 16; + uint32_t LMAP_DEBUG_VALUE : 8; + } bits; +}; + +union REG_LTM_H64 { + uint32_t raw; + struct { + uint32_t LTM_EE_ENABLE : 1; + uint32_t LTM_EE_TOTAL_GAIN : 8; + uint32_t LTM_EE_LUMA_GAIN_ENABLE : 1; + uint32_t LTM_EE_LUMA_MODE : 1; + uint32_t LTM_EE_SOFT_CLAMP_ENABLE : 1; + } bits; +}; + +union REG_LTM_H68 { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_00 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_01 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_02 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_03 : 8; + } bits; +}; + +union REG_LTM_H6C { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_04 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_05 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_06 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_07 : 8; + } bits; +}; + +union REG_LTM_H70 { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_08 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_09 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_10 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_11 : 8; + } bits; +}; + +union REG_LTM_H74 { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_12 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_13 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_14 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_15 : 8; + } bits; +}; + +union REG_LTM_H78 { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_16 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_17 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_18 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_19 : 8; + } bits; +}; + +union REG_LTM_H7C { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_20 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_21 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_22 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_23 : 8; + } bits; +}; + +union REG_LTM_H80 { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_24 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_25 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_26 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_27 : 8; + } bits; +}; + +union REG_LTM_H84 { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_28 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_29 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_30 : 8; + uint32_t LTM_EE_LUMA_GAIN_LUT_31 : 8; + } bits; +}; + +union REG_LTM_H88 { + uint32_t raw; + struct { + uint32_t LTM_EE_LUMA_GAIN_LUT_32 : 8; + } bits; +}; + +union REG_LTM_H8C { + uint32_t raw; + struct { + uint32_t _rsv_0 : 12; + uint32_t LMAP_W_BIT : 3; + uint32_t _rsv_15 : 13; + uint32_t LMAP_H_BIT : 3; + } bits; +}; + +union REG_LTM_H90 { + uint32_t raw; + struct { + uint32_t LTM_V_BLEND_THD_L : 10; + uint32_t LTM_V_BLEND_THD_H : 10; + } bits; +}; + +union REG_LTM_H94 { + uint32_t raw; + struct { + uint32_t LTM_V_BLEND_WGT_MIN : 9; + uint32_t LTM_V_BLEND_WGT_MAX : 9; + } bits; +}; + +union REG_LTM_H98 { + uint32_t raw; + struct { + uint32_t LTM_V_BLEND_WGT_SLOPE : 19; + } bits; +}; + +union REG_LTM_H9C { + uint32_t raw; + struct { + uint32_t LTM_DE_LMAP_LUT_IN_0 : 8; + uint32_t LTM_DE_LMAP_LUT_IN_1 : 8; + uint32_t LTM_DE_LMAP_LUT_IN_2 : 8; + uint32_t LTM_DE_LMAP_LUT_IN_3 : 8; + } bits; +}; + +union REG_LTM_HA0 { + uint32_t raw; + struct { + uint32_t LTM_DE_LMAP_LUT_OUT_0 : 8; + uint32_t LTM_DE_LMAP_LUT_OUT_1 : 8; + uint32_t LTM_DE_LMAP_LUT_OUT_2 : 8; + uint32_t LTM_DE_LMAP_LUT_OUT_3 : 8; + } bits; +}; + +union REG_LTM_HA4 { + uint32_t raw; + struct { + uint32_t LTM_DE_LMAP_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t LTM_DE_LMAP_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_LTM_HA8 { + uint32_t raw; + struct { + uint32_t LTM_DE_LMAP_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_LTM_HAC { + uint32_t raw; + struct { + uint32_t LTM_BE_LMAP_LUT_IN_0 : 8; + uint32_t LTM_BE_LMAP_LUT_IN_1 : 8; + uint32_t LTM_BE_LMAP_LUT_IN_2 : 8; + uint32_t LTM_BE_LMAP_LUT_IN_3 : 8; + } bits; +}; + +union REG_LTM_HB0 { + uint32_t raw; + struct { + uint32_t LTM_BE_LMAP_LUT_OUT_0 : 8; + uint32_t LTM_BE_LMAP_LUT_OUT_1 : 8; + uint32_t LTM_BE_LMAP_LUT_OUT_2 : 8; + uint32_t LTM_BE_LMAP_LUT_OUT_3 : 8; + } bits; +}; + +union REG_LTM_HB4 { + uint32_t raw; + struct { + uint32_t LTM_BE_LMAP_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t LTM_BE_LMAP_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_LTM_HB8 { + uint32_t raw; + struct { + uint32_t LTM_BE_LMAP_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_LTM_HBC { + uint32_t raw; + struct { + uint32_t LTM_EE_MOTION_LUT_IN_0 : 8; + uint32_t LTM_EE_MOTION_LUT_IN_1 : 8; + uint32_t LTM_EE_MOTION_LUT_IN_2 : 8; + uint32_t LTM_EE_MOTION_LUT_IN_3 : 8; + } bits; +}; + +union REG_LTM_HC0 { + uint32_t raw; + struct { + uint32_t LTM_EE_MOTION_LUT_OUT_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t LTM_EE_MOTION_LUT_OUT_1 : 9; + } bits; +}; + +union REG_LTM_HC4 { + uint32_t raw; + struct { + uint32_t LTM_EE_MOTION_LUT_OUT_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t LTM_EE_MOTION_LUT_OUT_3 : 9; + } bits; +}; + +union REG_LTM_HC8 { + uint32_t raw; + struct { + uint32_t LTM_EE_MOTION_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t LTM_EE_MOTION_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_LTM_HCC { + uint32_t raw; + struct { + uint32_t LTM_EE_MOTION_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_LTM_HD0 { + uint32_t raw; + struct { + uint32_t LTM_EE_TOTAL_OSHTTHRD : 8; + uint32_t LTM_EE_TOTAL_USHTTHRD : 8; + uint32_t LTM_EE_SHTCTRL_OSHTGAIN : 6; + uint32_t _rsv_22 : 2; + uint32_t LTM_EE_SHTCTRL_USHTGAIN : 6; + } bits; +}; + +union REG_LTM_HD4 { + uint32_t raw; + struct { + uint32_t LTM_EE_TOTAL_OSHTTHRD_CLP : 8; + uint32_t LTM_EE_TOTAL_USHTTHRD_CLP : 8; + } bits; +}; + +union REG_LTM_HD8 { + uint32_t raw; + struct { + uint32_t LTM_EE_UPPER_BOUND_LEFT_DIFF : 8; + uint32_t LTM_EE_LOWER_BOUND_RIGHT_DIFF : 8; + } bits; +}; + +union REG_LTM_HDC { + uint32_t raw; + struct { + uint32_t _rsv_0 : 16; + uint32_t LTM_EE_MIN_Y : 12; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_CA_LITE_00 { + uint32_t raw; + struct { + uint32_t CA_LITE_ENABLE : 1; + uint32_t CA_LITE_SHDW_READ_SEL : 1; + } bits; +}; + +union REG_CA_LITE_04 { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_IN_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t CA_LITE_LUT_IN_1 : 9; + } bits; +}; + +union REG_CA_LITE_08 { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_IN_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t CA_LITE_LUT_IN_3 : 9; + } bits; +}; + +union REG_CA_LITE_0C { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_IN_4 : 9; + uint32_t _rsv_9 : 7; + uint32_t CA_LITE_LUT_IN_5 : 9; + } bits; +}; + +union REG_CA_LITE_10 { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_OUT_0 : 11; + uint32_t _rsv_11 : 5; + uint32_t CA_LITE_LUT_OUT_1 : 11; + } bits; +}; + +union REG_CA_LITE_14 { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_OUT_2 : 11; + uint32_t _rsv_11 : 5; + uint32_t CA_LITE_LUT_OUT_3 : 11; + } bits; +}; + +union REG_CA_LITE_18 { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_OUT_4 : 11; + uint32_t _rsv_11 : 5; + uint32_t CA_LITE_LUT_OUT_5 : 11; + } bits; +}; + +union REG_CA_LITE_1C { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_SLP_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t CA_LITE_LUT_SLP_1 : 12; + } bits; +}; + +union REG_CA_LITE_20 { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_SLP_2 : 12; + uint32_t _rsv_12 : 4; + uint32_t CA_LITE_LUT_SLP_3 : 12; + } bits; +}; + +union REG_CA_LITE_24 { + uint32_t raw; + struct { + uint32_t CA_LITE_LUT_SLP_4 : 12; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_444_422_0 { + uint32_t raw; + struct { + uint32_t OP_START : 1; + uint32_t CONT_EN : 1; + uint32_t BYPASS_EN : 1; + uint32_t SOFTRST : 1; + uint32_t AUTO_UPDATE_EN : 1; + uint32_t DBG_EN : 1; + uint32_t _rsv_6 : 1; + uint32_t FORCE_CLK_EN : 1; + } bits; +}; + +union REG_ISP_444_422_1 { + uint32_t raw; + struct { + uint32_t SHDW_UPDATE_REQ : 1; + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_ISP_444_422_2 { + uint32_t raw; + struct { + uint32_t FD_INT : 1; + uint32_t _rsv_1 : 1; + uint32_t FRAME_OVERFLOW : 1; + } bits; +}; + +union REG_ISP_444_422_3 { + uint32_t raw; + struct { + uint32_t CHECKSUM : 32; + } bits; +}; + +union REG_ISP_444_422_4 { + uint32_t raw; + struct { + uint32_t REG_422_444 : 1; + uint32_t SWAP : 2; + } bits; +}; + +union REG_ISP_444_422_5 { + uint32_t raw; + struct { + uint32_t FIRST_FRAME_RESET : 1; + uint32_t TDNR_ENABLE : 1; + uint32_t DMA_CROP_ENABLE : 1; + uint32_t FORCE_MONO_ENABLE : 1; + uint32_t DEBUG_STATUS_EN : 1; + uint32_t REG_3DNR_COMP_GAIN_ENABLE : 1; + uint32_t REG_3DNR_LUMAREF_LPF_ENABLE : 1; + } bits; +}; + +union REG_ISP_444_422_6 { + uint32_t raw; + struct { + uint32_t TDNR_DEBUG_STATUS : 32; + } bits; +}; + +union REG_ISP_444_422_8 { + uint32_t raw; + struct { + uint32_t GUARD_CNT : 8; + uint32_t FORCE_DMA_DISABLE : 6; + uint32_t UV_ROUNDING_TYPE_SEL : 1; + uint32_t TDNR_PIXEL_LP : 1; + uint32_t TDNR_DEBUG_SEL : 16; + } bits; +}; + +union REG_ISP_444_422_9 { + uint32_t raw; + struct { + uint32_t DMA_WRITE_SEL_Y : 1; + uint32_t DMA_WRITE_SEL_C : 1; + uint32_t DMA_SEL : 1; + uint32_t _rsv_3 : 2; + uint32_t AVG_MODE_READ : 1; + uint32_t AVG_MODE_WRITE : 1; + uint32_t DROP_MODE_WRITE : 1; + } bits; +}; + +union REG_ISP_444_422_10 { + uint32_t raw; + struct { + uint32_t IMG_WIDTH_CROP : 14; + uint32_t _rsv_14 : 2; + uint32_t IMG_HEIGHT_CROP : 14; + uint32_t _rsv_30 : 1; + uint32_t CROP_ENABLE : 1; + } bits; +}; + +union REG_ISP_444_422_11 { + uint32_t raw; + struct { + uint32_t CROP_W_STR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_W_END : 14; + } bits; +}; + +union REG_ISP_444_422_12 { + uint32_t raw; + struct { + uint32_t CROP_H_STR : 14; + uint32_t _rsv_14 : 2; + uint32_t CROP_H_END : 14; + } bits; +}; + +union REG_ISP_444_422_13 { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_LUT_IN_0 : 8; + uint32_t REG_3DNR_Y_LUT_IN_1 : 8; + uint32_t REG_3DNR_Y_LUT_IN_2 : 8; + uint32_t REG_3DNR_Y_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_444_422_14 { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_LUT_OUT_0 : 8; + uint32_t REG_3DNR_Y_LUT_OUT_1 : 8; + uint32_t REG_3DNR_Y_LUT_OUT_2 : 8; + uint32_t REG_3DNR_Y_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_444_422_15 { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_Y_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_444_422_16 { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_LUT_SLOPE_2 : 12; + uint32_t _rsv_12 : 3; + uint32_t MOTION_SEL : 1; + uint32_t REG_3DNR_Y_BETA_MAX : 8; + } bits; +}; + +union REG_ISP_444_422_17 { + uint32_t raw; + struct { + uint32_t REG_3DNR_U_LUT_IN_0 : 8; + uint32_t REG_3DNR_U_LUT_IN_1 : 8; + uint32_t REG_3DNR_U_LUT_IN_2 : 8; + uint32_t REG_3DNR_U_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_444_422_18 { + uint32_t raw; + struct { + uint32_t REG_3DNR_U_LUT_OUT_0 : 8; + uint32_t REG_3DNR_U_LUT_OUT_1 : 8; + uint32_t REG_3DNR_U_LUT_OUT_2 : 8; + uint32_t REG_3DNR_U_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_444_422_19 { + uint32_t raw; + struct { + uint32_t REG_3DNR_U_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_U_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_444_422_20 { + uint32_t raw; + struct { + uint32_t REG_3DNR_U_LUT_SLOPE_2 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_U_BETA_MAX : 8; + } bits; +}; + +union REG_ISP_444_422_21 { + uint32_t raw; + struct { + uint32_t REG_3DNR_V_LUT_IN_0 : 8; + uint32_t REG_3DNR_V_LUT_IN_1 : 8; + uint32_t REG_3DNR_V_LUT_IN_2 : 8; + uint32_t REG_3DNR_V_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_444_422_22 { + uint32_t raw; + struct { + uint32_t REG_3DNR_V_LUT_OUT_0 : 8; + uint32_t REG_3DNR_V_LUT_OUT_1 : 8; + uint32_t REG_3DNR_V_LUT_OUT_2 : 8; + uint32_t REG_3DNR_V_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_444_422_23 { + uint32_t raw; + struct { + uint32_t REG_3DNR_V_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_V_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_444_422_24 { + uint32_t raw; + struct { + uint32_t REG_3DNR_V_LUT_SLOPE_2 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_V_BETA_MAX : 8; + } bits; +}; + +union REG_ISP_444_422_25 { + uint32_t raw; + struct { + uint32_t REG_3DNR_MOTION_Y_LUT_IN_0 : 8; + uint32_t REG_3DNR_MOTION_Y_LUT_IN_1 : 8; + uint32_t REG_3DNR_MOTION_Y_LUT_IN_2 : 8; + uint32_t REG_3DNR_MOTION_Y_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_444_422_26 { + uint32_t raw; + struct { + uint32_t REG_3DNR_MOTION_Y_LUT_OUT_0 : 8; + uint32_t REG_3DNR_MOTION_Y_LUT_OUT_1 : 8; + uint32_t REG_3DNR_MOTION_Y_LUT_OUT_2 : 8; + uint32_t REG_3DNR_MOTION_Y_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_444_422_27 { + uint32_t raw; + struct { + uint32_t REG_3DNR_MOTION_Y_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_MOTION_Y_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_444_422_28 { + uint32_t raw; + struct { + uint32_t REG_3DNR_MOTION_Y_LUT_SLOPE_2 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_MOTION_C_LUT_SLOPE_0 : 12; + } bits; +}; + +union REG_ISP_444_422_29 { + uint32_t raw; + struct { + uint32_t REG_3DNR_MOTION_C_LUT_SLOPE_1 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_MOTION_C_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_444_422_30 { + uint32_t raw; + struct { + uint32_t REG_3DNR_MOTION_C_LUT_IN_0 : 8; + uint32_t REG_3DNR_MOTION_C_LUT_IN_1 : 8; + uint32_t REG_3DNR_MOTION_C_LUT_IN_2 : 8; + uint32_t REG_3DNR_MOTION_C_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_444_422_31 { + uint32_t raw; + struct { + uint32_t REG_3DNR_MOTION_C_LUT_OUT_0 : 8; + uint32_t REG_3DNR_MOTION_C_LUT_OUT_1 : 8; + uint32_t REG_3DNR_MOTION_C_LUT_OUT_2 : 8; + uint32_t REG_3DNR_MOTION_C_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_444_422_80 { + uint32_t raw; + struct { + uint32_t REG_3DNR_EE_COMP_GAIN : 9; + } bits; +}; + +union REG_ISP_444_422_84 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_01 : 10; + } bits; +}; + +union REG_ISP_444_422_88 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_03 : 10; + } bits; +}; + +union REG_ISP_444_422_8C { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_05 : 10; + } bits; +}; + +union REG_ISP_444_422_90 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_07 : 10; + } bits; +}; + +union REG_ISP_444_422_94 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_09 : 10; + } bits; +}; + +union REG_ISP_444_422_98 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_11 : 10; + } bits; +}; + +union REG_ISP_444_422_9C { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_13 : 10; + } bits; +}; + +union REG_ISP_444_422_A0 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_15 : 10; + } bits; +}; + +union REG_ISP_444_422_A4 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LUMA_COMP_GAIN_LUT_16 : 10; + } bits; +}; + +union REG_ISP_444_422_A8 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_CENTERX : 13; + uint32_t _rsv_13 : 3; + uint32_t REG_3DNR_LSC_CENTERY : 13; + } bits; +}; + +union REG_ISP_444_422_AC { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_NORM : 15; + uint32_t _rsv_15 : 1; + uint32_t REG_3DNR_LSC_DY_GAIN : 8; + } bits; +}; + +union REG_ISP_444_422_B0 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_01 : 10; + } bits; +}; + +union REG_ISP_444_422_B4 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_03 : 10; + } bits; +}; + +union REG_ISP_444_422_B8 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_05 : 10; + } bits; +}; + +union REG_ISP_444_422_BC { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_07 : 10; + } bits; +}; + +union REG_ISP_444_422_C0 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_09 : 10; + } bits; +}; + +union REG_ISP_444_422_C4 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_11 : 10; + } bits; +}; + +union REG_ISP_444_422_C8 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_13 : 10; + } bits; +}; + +union REG_ISP_444_422_CC { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_15 : 10; + } bits; +}; + +union REG_ISP_444_422_D0 { + uint32_t raw; + struct { + uint32_t REG_3DNR_LSC_COMP_GAIN_LUT_16 : 10; + } bits; +}; + +union REG_ISP_444_422_D4 { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_GAIN_LUT_IN_0 : 8; + uint32_t REG_3DNR_Y_GAIN_LUT_IN_1 : 8; + uint32_t REG_3DNR_Y_GAIN_LUT_IN_2 : 8; + uint32_t REG_3DNR_Y_GAIN_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_444_422_D8 { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_GAIN_LUT_OUT_0 : 8; + uint32_t REG_3DNR_Y_GAIN_LUT_OUT_1 : 8; + uint32_t REG_3DNR_Y_GAIN_LUT_OUT_2 : 8; + uint32_t REG_3DNR_Y_GAIN_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_444_422_DC { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_GAIN_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_Y_GAIN_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_444_422_E0 { + uint32_t raw; + struct { + uint32_t REG_3DNR_Y_GAIN_LUT_SLOPE_2 : 12; + uint32_t _rsv_12 : 4; + uint32_t REG_3DNR_Y_MOTION_MAX : 8; + uint32_t REG_3DNR_C_MOTION_MAX : 8; + } bits; +}; + +union REG_ISP_444_422_E4 { + uint32_t raw; + struct { + uint32_t MOT_DEBUG_LUT_IN_0 : 8; + uint32_t MOT_DEBUG_LUT_IN_1 : 8; + uint32_t MOT_DEBUG_LUT_IN_2 : 8; + uint32_t MOT_DEBUG_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_444_422_E8 { + uint32_t raw; + struct { + uint32_t MOT_DEBUG_LUT_OUT_0 : 8; + uint32_t MOT_DEBUG_LUT_OUT_1 : 8; + uint32_t MOT_DEBUG_LUT_OUT_2 : 8; + uint32_t MOT_DEBUG_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_444_422_EC { + uint32_t raw; + struct { + uint32_t MOT_DEBUG_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t MOT_DEBUG_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_444_422_F0 { + uint32_t raw; + struct { + uint32_t MOT_DEBUG_LUT_SLOPE_2 : 12; + uint32_t MOT_DEBUG_SWITCH : 1; + uint32_t REG_3DNR_Y_PIX_GAIN_ENABLE : 1; + uint32_t REG_3DNR_C_PIX_GAIN_ENABLE : 1; + uint32_t REG_3DNR_PIX_GAIN_MODE : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_FBCE_00 { + uint32_t raw; + struct { + uint32_t FBCE_EN : 1; + uint32_t SHD_RD : 1; + uint32_t FORCE_CKE : 1; + uint32_t _rsv_3 : 5; + uint32_t DEBUG : 16; + uint32_t DUMMY : 8; + } bits; +}; + +union REG_FBCE_10 { + uint32_t raw; + struct { + uint32_t Y_LOSSLESS : 1; + uint32_t Y_BASE_QDPCM_Q : 1; + uint32_t _rsv_2 : 2; + uint32_t Y_BASE_PCM_BD_MINUS2 : 3; + uint32_t _rsv_7 : 1; + uint32_t Y_DEFAULT_GR_K : 3; + uint32_t _rsv_11 : 1; + uint32_t Y_CPLX_SHIFT : 3; + uint32_t _rsv_15 : 1; + uint32_t Y_PEN_POS_SHIFT : 3; + } bits; +}; + +union REG_FBCE_14 { + uint32_t raw; + struct { + uint32_t Y_MIN_CU_BIT : 7; + uint32_t _rsv_7 : 1; + uint32_t Y_MAX_CU_BIT : 7; + uint32_t _rsv_15 : 1; + uint32_t Y_TOTAL_LINE_BIT_BUDGET : 15; + } bits; +}; + +union REG_FBCE_18 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 6; + uint32_t Y_BIT_STREAM_SIZE : 18; + } bits; +}; + +union REG_FBCE_20 { + uint32_t raw; + struct { + uint32_t C_LOSSLESS : 1; + uint32_t C_BASE_QDPCM_Q : 1; + uint32_t _rsv_2 : 2; + uint32_t C_BASE_PCM_BD_MINUS2 : 3; + uint32_t _rsv_7 : 1; + uint32_t C_DEFAULT_GR_K : 3; + uint32_t _rsv_11 : 1; + uint32_t C_CPLX_SHIFT : 3; + uint32_t _rsv_15 : 1; + uint32_t C_PEN_POS_SHIFT : 3; + } bits; +}; + +union REG_FBCE_24 { + uint32_t raw; + struct { + uint32_t C_MIN_CU_BIT : 7; + uint32_t _rsv_7 : 1; + uint32_t C_MAX_CU_BIT : 7; + uint32_t _rsv_15 : 1; + uint32_t C_TOTAL_LINE_BIT_BUDGET : 15; + } bits; +}; + +union REG_FBCE_28 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 6; + uint32_t C_BIT_STREAM_SIZE : 18; + } bits; +}; + +union REG_FBCE_2C { + uint32_t raw; + struct { + uint32_t Y_TOTAL_FIRST_LINE_BIT_BUDGET : 15; + uint32_t _rsv_15 : 1; + uint32_t C_TOTAL_FIRST_LINE_BIT_BUDGET : 15; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_FBCD_00 { + uint32_t raw; + struct { + uint32_t FBCD_EN : 1; + uint32_t FF_DROP : 1; + uint32_t FBCD_AUTO : 1; + uint32_t FORCE_CKE : 1; + } bits; +}; + +union REG_FBCD_0C { + uint32_t raw; + struct { + uint32_t Y_BIT_STREAM_SIZE : 22; + uint32_t _rsv_22 : 3; + uint32_t Y_STREAM_TAG : 3; + } bits; +}; + +union REG_FBCD_10 { + uint32_t raw; + struct { + uint32_t C_BIT_STREAM_SIZE : 22; + uint32_t _rsv_22 : 3; + uint32_t C_STREAM_TAG : 3; + } bits; +}; + +union REG_FBCD_14 { + uint32_t raw; + struct { + uint32_t DEBUG_SEL : 4; + } bits; +}; + +union REG_FBCD_20 { + uint32_t raw; + struct { + uint32_t DUMMY : 8; + uint32_t SHD_RD : 1; + } bits; +}; + +union REG_FBCD_24 { + uint32_t raw; + struct { + uint32_t Y_LOSSLESS : 1; + uint32_t Y_BASE_QDPCM_Q : 1; + uint32_t _rsv_2 : 2; + uint32_t Y_BASE_PCM_BD_MINUS2 : 3; + uint32_t _rsv_7 : 1; + uint32_t Y_DEFAULT_GR_K : 3; + } bits; +}; + +union REG_FBCD_28 { + uint32_t raw; + struct { + uint32_t C_LOSSLESS : 1; + uint32_t C_BASE_QDPCM_Q : 1; + uint32_t _rsv_2 : 2; + uint32_t C_BASE_PCM_BD_MINUS2 : 3; + uint32_t _rsv_7 : 1; + uint32_t C_DEFAULT_GR_K : 3; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_YUV_DITHER_Y_DITHER { + uint32_t raw; + struct { + uint32_t Y_DITHER_ENABLE : 1; + uint32_t Y_DITHER_MOD_ENABLE : 1; + uint32_t Y_DITHER_HISTIDX_ENABLE : 1; + uint32_t Y_DITHER_FMNUM_ENABLE : 1; + uint32_t Y_DITHER_SHDW_SEL : 1; + uint32_t Y_DITHER_SOFTRST : 1; + uint32_t _rsv_6 : 2; + uint32_t Y_DITHER_HEIGHTM1 : 12; + uint32_t Y_DITHER_WIDTHM1 : 12; + } bits; +}; + +union REG_ISP_YUV_DITHER_UV_DITHER { + uint32_t raw; + struct { + uint32_t UV_DITHER_ENABLE : 1; + uint32_t UV_DITHER_MOD_ENABLE : 1; + uint32_t UV_DITHER_HISTIDX_ENABLE : 1; + uint32_t UV_DITHER_FMNUM_ENABLE : 1; + uint32_t _rsv_4 : 4; + uint32_t UV_DITHER_HEIGHTM1 : 12; + uint32_t UV_DITHER_WIDTHM1 : 12; + } bits; +}; + +union REG_ISP_YUV_DITHER_DEBUG_00 { + uint32_t raw; + struct { + uint32_t UV_DITHER_DEBUG0 : 32; + } bits; +}; + +union REG_ISP_YUV_DITHER_DEBUG_01 { + uint32_t raw; + struct { + uint32_t Y_DITHER_DEBUG0 : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_YNR_SHADOW_RD_SEL { + uint32_t raw; + struct { + uint32_t SHADOW_RD_SEL : 1; + } bits; +}; + +union REG_ISP_YNR_OUT_SEL { + uint32_t raw; + struct { + uint32_t YNR_OUT_SEL : 4; + } bits; +}; + +union REG_ISP_YNR_INDEX_CLR { + uint32_t raw; + struct { + uint32_t YNR_INDEX_CLR : 1; + } bits; +}; + +union REG_ISP_YNR_NS0_LUMA_TH_00 { + uint32_t raw; + struct { + uint32_t YNR_NS0_LUMA_TH_00 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_LUMA_TH_01 { + uint32_t raw; + struct { + uint32_t YNR_NS0_LUMA_TH_01 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_LUMA_TH_02 { + uint32_t raw; + struct { + uint32_t YNR_NS0_LUMA_TH_02 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_LUMA_TH_03 { + uint32_t raw; + struct { + uint32_t YNR_NS0_LUMA_TH_03 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_LUMA_TH_04 { + uint32_t raw; + struct { + uint32_t YNR_NS0_LUMA_TH_04 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_LUMA_TH_05 { + uint32_t raw; + struct { + uint32_t YNR_NS0_LUMA_TH_05 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_SLOPE_00 { + uint32_t raw; + struct { + uint32_t YNR_NS0_SLOPE_00 : 11; + } bits; +}; + +union REG_ISP_YNR_NS0_SLOPE_01 { + uint32_t raw; + struct { + uint32_t YNR_NS0_SLOPE_01 : 11; + } bits; +}; + +union REG_ISP_YNR_NS0_SLOPE_02 { + uint32_t raw; + struct { + uint32_t YNR_NS0_SLOPE_02 : 11; + } bits; +}; + +union REG_ISP_YNR_NS0_SLOPE_03 { + uint32_t raw; + struct { + uint32_t YNR_NS0_SLOPE_03 : 11; + } bits; +}; + +union REG_ISP_YNR_NS0_SLOPE_04 { + uint32_t raw; + struct { + uint32_t YNR_NS0_SLOPE_04 : 11; + } bits; +}; + +union REG_ISP_YNR_NS0_OFFSET_00 { + uint32_t raw; + struct { + uint32_t YNR_NS0_OFFSET_00 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_OFFSET_01 { + uint32_t raw; + struct { + uint32_t YNR_NS0_OFFSET_01 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_OFFSET_02 { + uint32_t raw; + struct { + uint32_t YNR_NS0_OFFSET_02 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_OFFSET_03 { + uint32_t raw; + struct { + uint32_t YNR_NS0_OFFSET_03 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_OFFSET_04 { + uint32_t raw; + struct { + uint32_t YNR_NS0_OFFSET_04 : 8; + } bits; +}; + +union REG_ISP_YNR_NS0_OFFSET_05 { + uint32_t raw; + struct { + uint32_t YNR_NS0_OFFSET_05 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_LUMA_TH_00 { + uint32_t raw; + struct { + uint32_t YNR_NS1_LUMA_TH_00 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_LUMA_TH_01 { + uint32_t raw; + struct { + uint32_t YNR_NS1_LUMA_TH_01 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_LUMA_TH_02 { + uint32_t raw; + struct { + uint32_t YNR_NS1_LUMA_TH_02 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_LUMA_TH_03 { + uint32_t raw; + struct { + uint32_t YNR_NS1_LUMA_TH_03 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_LUMA_TH_04 { + uint32_t raw; + struct { + uint32_t YNR_NS1_LUMA_TH_04 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_LUMA_TH_05 { + uint32_t raw; + struct { + uint32_t YNR_NS1_LUMA_TH_05 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_SLOPE_00 { + uint32_t raw; + struct { + uint32_t YNR_NS1_SLOPE_00 : 11; + } bits; +}; + +union REG_ISP_YNR_NS1_SLOPE_01 { + uint32_t raw; + struct { + uint32_t YNR_NS1_SLOPE_01 : 11; + } bits; +}; + +union REG_ISP_YNR_NS1_SLOPE_02 { + uint32_t raw; + struct { + uint32_t YNR_NS1_SLOPE_02 : 11; + } bits; +}; + +union REG_ISP_YNR_NS1_SLOPE_03 { + uint32_t raw; + struct { + uint32_t YNR_NS1_SLOPE_03 : 11; + } bits; +}; + +union REG_ISP_YNR_NS1_SLOPE_04 { + uint32_t raw; + struct { + uint32_t YNR_NS1_SLOPE_04 : 11; + } bits; +}; + +union REG_ISP_YNR_NS1_OFFSET_00 { + uint32_t raw; + struct { + uint32_t YNR_NS1_OFFSET_00 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_OFFSET_01 { + uint32_t raw; + struct { + uint32_t YNR_NS1_OFFSET_01 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_OFFSET_02 { + uint32_t raw; + struct { + uint32_t YNR_NS1_OFFSET_02 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_OFFSET_03 { + uint32_t raw; + struct { + uint32_t YNR_NS1_OFFSET_03 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_OFFSET_04 { + uint32_t raw; + struct { + uint32_t YNR_NS1_OFFSET_04 : 8; + } bits; +}; + +union REG_ISP_YNR_NS1_OFFSET_05 { + uint32_t raw; + struct { + uint32_t YNR_NS1_OFFSET_05 : 8; + } bits; +}; + +union REG_ISP_YNR_NS_GAIN { + uint32_t raw; + struct { + uint32_t YNR_NS_GAIN : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_00 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_00 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_01 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_01 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_02 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_02 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_03 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_03 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_04 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_04 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_05 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_05 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_06 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_06 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_07 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_07 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_08 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_08 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_09 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_09 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_10 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_10 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_11 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_11 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_12 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_12 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_13 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_13 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_14 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_14 : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_LUT_15 { + uint32_t raw; + struct { + uint32_t YNR_MOTION_LUT_15 : 8; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_INTRA_0 { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_INTRA_0 : 3; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_INTRA_1 { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_INTRA_1 : 3; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_INTRA_2 { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_INTRA_2 : 3; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_NORM_1 { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_NORM_1 : 7; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_NORM_2 { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_NORM_2 : 8; + } bits; +}; + +union REG_ISP_YNR_ALPHA_GAIN { + uint32_t raw; + struct { + uint32_t YNR_ALPHA_GAIN : 10; + } bits; +}; + +union REG_ISP_YNR_VAR_TH { + uint32_t raw; + struct { + uint32_t YNR_VAR_TH : 8; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_SM { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_SMOOTH : 5; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_V { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_V : 5; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_H { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_H : 5; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_D45 { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_D45 : 5; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_D135 { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_D135 : 5; + } bits; +}; + +union REG_ISP_YNR_NEIGHBOR_MAX { + uint32_t raw; + struct { + uint32_t YNR_FLAG_NEIGHBOR_MAX_WEIGHT : 1; + } bits; +}; + +union REG_ISP_YNR_RES_K_SMOOTH { + uint32_t raw; + struct { + uint32_t YNR_RES_RATIO_K_SMOOTH : 9; + } bits; +}; + +union REG_ISP_YNR_RES_K_TEXTURE { + uint32_t raw; + struct { + uint32_t YNR_RES_RATIO_K_TEXTURE : 9; + } bits; +}; + +union REG_ISP_YNR_FILTER_MODE_EN { + uint32_t raw; + struct { + uint32_t YNR_FILTER_MODE_ENABLE : 1; + } bits; +}; + +union REG_ISP_YNR_FILTER_MODE_ALPHA { + uint32_t raw; + struct { + uint32_t YNR_FILTER_MODE_ALPHA : 9; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_00 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_00 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_01 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_01 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_02 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_02 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_03 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_03 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_04 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_04 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_05 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_05 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_06 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_06 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_07 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_07 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_08 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_08 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_09 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_09 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_10 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_10 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_11 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_11 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_12 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_12 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_13 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_13 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_14 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_14 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOT_LUT_15 { + uint32_t raw; + struct { + uint32_t YNR_RES_MOT_LUT_15 : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MAX { + uint32_t raw; + struct { + uint32_t YNR_RES_MAX : 8; + } bits; +}; + +union REG_ISP_YNR_RES_MOTION_MAX { + uint32_t raw; + struct { + uint32_t YNR_RES_MOTION_MAX : 8; + } bits; +}; + +union REG_ISP_YNR_MOTION_NS_CLIP_MAX { + uint32_t raw; + struct { + uint32_t YNR_MOTION_NS_CLIP_MAX : 8; + } bits; +}; + +union REG_ISP_YNR_WEIGHT_LUT { + uint32_t raw; + struct { + uint32_t YNR_WEIGHT_LUT : 5; + } bits; +}; + +union REG_ISP_YNR_DUMMY { + uint32_t raw; + struct { + uint32_t YNR_DUMMY : 16; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CNR_ENABLE { + uint32_t raw; + struct { + uint32_t CNR_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t PFC_ENABLE : 1; + uint32_t _rsv_5 : 3; + uint32_t CNR_DIFF_SHIFT_VAL : 8; + uint32_t CNR_RATIO : 8; + uint32_t CNR_OUT_SEL : 2; + } bits; +}; + +union REG_ISP_CNR_STRENGTH_MODE { + uint32_t raw; + struct { + uint32_t CNR_STRENGTH_MODE : 8; + uint32_t CNR_FUSION_INTENSITY_WEIGHT : 4; + uint32_t _rsv_12 : 4; + uint32_t CNR_WEIGHT_INTER_SEL : 4; + uint32_t CNR_VAR_TH : 9; + uint32_t _rsv_29 : 1; + uint32_t CNR_FLAG_NEIGHBOR_MAX_WEIGHT : 1; + uint32_t CNR_SHDW_SEL : 1; + } bits; +}; + +union REG_ISP_CNR_PURPLE_TH { + uint32_t raw; + struct { + uint32_t CNR_PURPLE_TH : 8; + uint32_t CNR_CORRECT_STRENGTH : 8; + uint32_t CNR_DIFF_GAIN : 4; + uint32_t _rsv_20 : 4; + uint32_t CNR_MOTION_ENABLE : 1; + } bits; +}; + +union REG_ISP_CNR_PURPLE_CB { + uint32_t raw; + struct { + uint32_t CNR_PURPLE_CB : 8; + uint32_t _rsv_8 : 8; + uint32_t CNR_PURPLE_CR : 8; + } bits; +}; + +union REG_ISP_CNR_GREEN_CB { + uint32_t raw; + struct { + uint32_t CNR_GREEN_CB : 8; + uint32_t _rsv_8 : 8; + uint32_t CNR_GREEN_CR : 8; + } bits; +}; + +union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_00 { + uint32_t raw; + struct { + uint32_t WEIGHT_LUT_INTER_CNR_00 : 5; + uint32_t _rsv_5 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_01 : 5; + uint32_t _rsv_13 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_02 : 5; + uint32_t _rsv_21 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_03 : 5; + } bits; +}; + +union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_04 { + uint32_t raw; + struct { + uint32_t WEIGHT_LUT_INTER_CNR_04 : 5; + uint32_t _rsv_5 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_05 : 5; + uint32_t _rsv_13 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_06 : 5; + uint32_t _rsv_21 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_07 : 5; + } bits; +}; + +union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_08 { + uint32_t raw; + struct { + uint32_t WEIGHT_LUT_INTER_CNR_08 : 5; + uint32_t _rsv_5 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_09 : 5; + uint32_t _rsv_13 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_10 : 5; + uint32_t _rsv_21 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_11 : 5; + } bits; +}; + +union REG_ISP_CNR_WEIGHT_LUT_INTER_CNR_12 { + uint32_t raw; + struct { + uint32_t WEIGHT_LUT_INTER_CNR_12 : 5; + uint32_t _rsv_5 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_13 : 5; + uint32_t _rsv_13 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_14 : 5; + uint32_t _rsv_21 : 3; + uint32_t WEIGHT_LUT_INTER_CNR_15 : 5; + } bits; +}; + +union REG_ISP_CNR_MOTION_LUT_0 { + uint32_t raw; + struct { + uint32_t CNR_MOTION_LUT_0 : 8; + uint32_t CNR_MOTION_LUT_1 : 8; + uint32_t CNR_MOTION_LUT_2 : 8; + uint32_t CNR_MOTION_LUT_3 : 8; + } bits; +}; + +union REG_ISP_CNR_MOTION_LUT_4 { + uint32_t raw; + struct { + uint32_t CNR_MOTION_LUT_4 : 8; + uint32_t CNR_MOTION_LUT_5 : 8; + uint32_t CNR_MOTION_LUT_6 : 8; + uint32_t CNR_MOTION_LUT_7 : 8; + } bits; +}; + +union REG_ISP_CNR_MOTION_LUT_8 { + uint32_t raw; + struct { + uint32_t CNR_MOTION_LUT_8 : 8; + uint32_t CNR_MOTION_LUT_9 : 8; + uint32_t CNR_MOTION_LUT_10 : 8; + uint32_t CNR_MOTION_LUT_11 : 8; + } bits; +}; + +union REG_ISP_CNR_MOTION_LUT_12 { + uint32_t raw; + struct { + uint32_t CNR_MOTION_LUT_12 : 8; + uint32_t CNR_MOTION_LUT_13 : 8; + uint32_t CNR_MOTION_LUT_14 : 8; + uint32_t CNR_MOTION_LUT_15 : 8; + } bits; +}; + +union REG_ISP_CNR_PURPLE_CB2 { + uint32_t raw; + struct { + uint32_t CNR_PURPLE_CB2 : 8; + uint32_t CNR_PURPLE_CR2 : 8; + uint32_t CNR_PURPLE_CB3 : 8; + uint32_t CNR_PURPLE_CR3 : 8; + } bits; +}; + +union REG_ISP_CNR_MASK { + uint32_t raw; + struct { + uint32_t CNR_MASK : 8; + } bits; +}; + +union REG_ISP_CNR_DUMMY { + uint32_t raw; + struct { + uint32_t CNR_DUMMY : 32; + } bits; +}; + +union REG_ISP_CNR_EDGE_SCALE { + uint32_t raw; + struct { + uint32_t CNR_EDGE_SCALE : 8; + uint32_t CNR_EDGE_CORING : 8; + uint32_t CNR_EDGE_MIN : 8; + uint32_t CNR_EDGE_MAX : 8; + } bits; +}; + +union REG_ISP_CNR_EDGE_RATIO_SPEED { + uint32_t raw; + struct { + uint32_t CNR_RATIO_SPEED : 7; + uint32_t _rsv_7 : 1; + uint32_t CNR_CB_STR : 5; + uint32_t _rsv_13 : 3; + uint32_t CNR_CR_STR : 5; + } bits; +}; + +union REG_ISP_CNR_DEPURPLE_WEIGHT_TH { + uint32_t raw; + struct { + uint32_t CNR_DEPURPLE_WEIGHT_TH : 8; + uint32_t CNR_DEPURPLE_STR_MIN_RATIO : 7; + uint32_t _rsv_15 : 1; + uint32_t CNR_DEPURPLE_STR_MAX_RATIO : 7; + } bits; +}; + +union REG_ISP_CNR_CORING_MOTION_LUT_0 { + uint32_t raw; + struct { + uint32_t CNR_CORING_MOTION_LUT_00 : 8; + uint32_t CNR_CORING_MOTION_LUT_01 : 8; + uint32_t CNR_CORING_MOTION_LUT_02 : 8; + uint32_t CNR_CORING_MOTION_LUT_03 : 8; + } bits; +}; + +union REG_ISP_CNR_CORING_MOTION_LUT_4 { + uint32_t raw; + struct { + uint32_t CNR_CORING_MOTION_LUT_04 : 8; + uint32_t CNR_CORING_MOTION_LUT_05 : 8; + uint32_t CNR_CORING_MOTION_LUT_06 : 8; + uint32_t CNR_CORING_MOTION_LUT_07 : 8; + } bits; +}; + +union REG_ISP_CNR_CORING_MOTION_LUT_8 { + uint32_t raw; + struct { + uint32_t CNR_CORING_MOTION_LUT_08 : 8; + uint32_t CNR_CORING_MOTION_LUT_09 : 8; + uint32_t CNR_CORING_MOTION_LUT_10 : 8; + uint32_t CNR_CORING_MOTION_LUT_11 : 8; + } bits; +}; + +union REG_ISP_CNR_CORING_MOTION_LUT_12 { + uint32_t raw; + struct { + uint32_t CNR_CORING_MOTION_LUT_12 : 8; + uint32_t CNR_CORING_MOTION_LUT_13 : 8; + uint32_t CNR_CORING_MOTION_LUT_14 : 8; + uint32_t CNR_CORING_MOTION_LUT_15 : 8; + } bits; +}; + +union REG_ISP_CNR_EDGE_SCALE_LUT_0 { + uint32_t raw; + struct { + uint32_t CNR_EDGE_SCALE_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t CNR_EDGE_SCALE_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t CNR_EDGE_SCALE_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t CNR_EDGE_SCALE_LUT_03 : 6; + } bits; +}; + +union REG_ISP_CNR_EDGE_SCALE_LUT_4 { + uint32_t raw; + struct { + uint32_t CNR_EDGE_SCALE_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t CNR_EDGE_SCALE_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t CNR_EDGE_SCALE_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t CNR_EDGE_SCALE_LUT_07 : 6; + } bits; +}; + +union REG_ISP_CNR_EDGE_SCALE_LUT_8 { + uint32_t raw; + struct { + uint32_t CNR_EDGE_SCALE_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t CNR_EDGE_SCALE_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t CNR_EDGE_SCALE_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t CNR_EDGE_SCALE_LUT_11 : 6; + } bits; +}; + +union REG_ISP_CNR_EDGE_SCALE_LUT_12 { + uint32_t raw; + struct { + uint32_t CNR_EDGE_SCALE_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t CNR_EDGE_SCALE_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t CNR_EDGE_SCALE_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t CNR_EDGE_SCALE_LUT_15 : 6; + } bits; +}; + +union REG_ISP_CNR_EDGE_SCALE_LUT_16 { + uint32_t raw; + struct { + uint32_t CNR_EDGE_SCALE_LUT_16 : 6; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_YCURV_YCUR_CTRL { + uint32_t raw; + struct { + uint32_t YCUR_ENABLE : 1; + uint32_t YCUR_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_YCURV_YCUR_PROG_CTRL { + uint32_t raw; + struct { + uint32_t YCUR_WSEL : 1; + uint32_t _rsv_1 : 3; + uint32_t YCUR_RSEL : 1; + uint32_t _rsv_5 : 3; + uint32_t YCUR_PROG_EN : 1; + } bits; +}; + +union REG_ISP_YCURV_YCUR_PROG_ST_ADDR { + uint32_t raw; + struct { + uint32_t YCUR_ST_ADDR : 6; + uint32_t _rsv_6 : 25; + uint32_t YCUR_ST_W : 1; + } bits; +}; + +union REG_ISP_YCURV_YCUR_PROG_DATA { + uint32_t raw; + struct { + uint32_t YCUR_DATA_E : 8; + uint32_t _rsv_8 : 8; + uint32_t YCUR_DATA_O : 8; + uint32_t _rsv_24 : 7; + uint32_t YCUR_W : 1; + } bits; +}; + +union REG_ISP_YCURV_YCUR_PROG_MAX { + uint32_t raw; + struct { + uint32_t YCUR_MAX : 9; + } bits; +}; + +union REG_ISP_YCURV_YCUR_MEM_SW_MODE { + uint32_t raw; + struct { + uint32_t YCUR_SW_RADDR : 6; + uint32_t _rsv_6 : 2; + uint32_t YCUR_SW_R_MEM_SEL : 1; + } bits; +}; + +union REG_ISP_YCURV_YCUR_MEM_SW_RDATA { + uint32_t raw; + struct { + uint32_t YCUR_RDATA_R : 8; + uint32_t _rsv_8 : 23; + uint32_t YCUR_SW_R : 1; + } bits; +}; + +union REG_ISP_YCURV_YCUR_DBG { + uint32_t raw; + struct { + uint32_t PROG_HDK_DIS : 1; + uint32_t SOFTRST : 1; + } bits; +}; + +union REG_ISP_YCURV_YCUR_DMY0 { + uint32_t raw; + struct { + uint32_t DMY_DEF0 : 32; + } bits; +}; + +union REG_ISP_YCURV_YCUR_DMY1 { + uint32_t raw; + struct { + uint32_t DMY_DEF1 : 32; + } bits; +}; + +union REG_ISP_YCURV_YCUR_DMY_R { + uint32_t raw; + struct { + uint32_t DMY_RO : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_TOP_INT_EVENT0 { + uint32_t raw; + struct { + uint32_t FRAME_DONE_FE0 : 4; + uint32_t FRAME_DONE_FE1 : 2; + uint32_t FRAME_DONE_FE2 : 2; + uint32_t FRAME_DONE_BE : 2; + uint32_t FRAME_DONE_RAW : 1; + uint32_t FRAME_DONE_RGB : 1; + uint32_t FRAME_DONE_YUV : 1; + uint32_t FRAME_DONE_POST : 1; + uint32_t _rsv_14 : 2; + uint32_t SHAW_DONE_FE0 : 4; + uint32_t SHAW_DONE_FE1 : 2; + uint32_t SHAW_DONE_FE2 : 2; + uint32_t SHAW_DONE_BE : 2; + uint32_t SHAW_DONE_RAW : 1; + uint32_t SHAW_DONE_RGB : 1; + uint32_t SHAW_DONE_YUV : 1; + uint32_t SHAW_DONE_POST : 1; + } bits; +}; + +union REG_ISP_TOP_INT_EVENT1 { + uint32_t raw; + struct { + uint32_t PQ_DONE_FE0 : 4; + uint32_t PQ_DONE_FE1 : 2; + uint32_t PQ_DONE_FE2 : 2; + uint32_t PQ_DONE_BE : 2; + uint32_t PQ_DONE_RAW : 1; + uint32_t PQ_DONE_RGB : 1; + uint32_t PQ_DONE_YUV : 1; + uint32_t PQ_DONE_POST : 1; + } bits; +}; + +union REG_ISP_TOP_INT_EVENT2 { + uint32_t raw; + struct { + uint32_t FRAME_START_FE0 : 4; + uint32_t FRAME_START_FE1 : 2; + uint32_t FRAME_START_FE2 : 2; + uint32_t FRAME_ERR : 1; + uint32_t PCHK_ERR : 1; + uint32_t CMDQ_INT : 1; + uint32_t LINE_INTP_FE0 : 1; + uint32_t LINE_INTP_FE1 : 1; + uint32_t LINE_INTP_FE2 : 1; + uint32_t LINE_INTP_POST : 1; + uint32_t INT_BDG_LITE : 1; + uint32_t INT_DMA_ERR : 1; + } bits; +}; + +union REG_ISP_TOP_ERROR_STS { + uint32_t raw; + struct { + uint32_t PCHK0_ERR_FE0 : 1; + uint32_t PCHK0_ERR_FE1 : 1; + uint32_t PCHK0_ERR_FE2 : 1; + uint32_t PCHK0_ERR_BE : 1; + uint32_t PCHK0_ERR_RAW : 1; + uint32_t PCHK0_ERR_RGB : 1; + uint32_t PCHK0_ERR_YUV : 1; + uint32_t PCHK1_ERR_FE0 : 1; + uint32_t PCHK1_ERR_FE1 : 1; + uint32_t PCHK1_ERR_FE2 : 1; + uint32_t PCHK1_ERR_BE : 1; + uint32_t PCHK1_ERR_RAW : 1; + uint32_t PCHK1_ERR_RGB : 1; + uint32_t PCHK1_ERR_YUV : 1; + } bits; +}; + +union REG_ISP_TOP_INT_EVENT0_EN { + uint32_t raw; + struct { + uint32_t FRAME_DONE_ENABLE_FE0 : 4; + uint32_t FRAME_DONE_ENABLE_FE1 : 2; + uint32_t FRAME_DONE_ENABLE_FE2 : 2; + uint32_t FRAME_DONE_ENABLE_BE : 2; + uint32_t FRAME_DONE_ENABLE_RAW : 1; + uint32_t FRAME_DONE_ENABLE_RGB : 1; + uint32_t FRAME_DONE_ENABLE_YUV : 1; + uint32_t FRAME_DONE_ENABLE_POST : 1; + uint32_t _rsv_14 : 2; + uint32_t SHAW_DONE_ENABLE_FE0 : 4; + uint32_t SHAW_DONE_ENABLE_FE1 : 2; + uint32_t SHAW_DONE_ENABLE_FE2 : 2; + uint32_t SHAW_DONE_ENABLE_BE : 2; + uint32_t SHAW_DONE_ENABLE_RAW : 1; + uint32_t SHAW_DONE_ENABLE_RGB : 1; + uint32_t SHAW_DONE_ENABLE_YUV : 1; + uint32_t SHAW_DONE_ENABLE_POST : 1; + } bits; +}; + +union REG_ISP_TOP_INT_EVENT1_EN { + uint32_t raw; + struct { + uint32_t PQ_DONE_ENABLE_FE0 : 4; + uint32_t PQ_DONE_ENABLE_FE1 : 2; + uint32_t PQ_DONE_ENABLE_FE2 : 2; + uint32_t PQ_DONE_ENABLE_BE : 2; + uint32_t PQ_DONE_ENABLE_RAW : 1; + uint32_t PQ_DONE_ENABLE_RGB : 1; + uint32_t PQ_DONE_ENABLE_YUV : 1; + uint32_t PQ_DONE_ENABLE_POST : 1; + } bits; +}; + +union REG_ISP_TOP_INT_EVENT2_EN { + uint32_t raw; + struct { + uint32_t FRAME_START_ENABLE_FE0 : 4; + uint32_t FRAME_START_ENABLE_FE1 : 2; + uint32_t FRAME_START_ENABLE_FE2 : 2; + uint32_t FRAME_ERR_ENABLE : 1; + uint32_t PCHK_ERR_ENABLE : 1; + uint32_t CMDQ_INT_ENABLE : 1; + uint32_t LINE_INTP_ENABLE_FE0 : 1; + uint32_t LINE_INTP_ENABLE_FE1 : 1; + uint32_t LINE_INTP_ENABLE_FE2 : 1; + uint32_t LINE_INTP_ENABLE_POST : 1; + uint32_t INT_BDG_LITE_ENABLE : 1; + uint32_t INT_DMA_ERR_ENABLE : 1; + } bits; +}; + +union REG_ISP_TOP_SW_CTRL_0 { + uint32_t raw; + struct { + uint32_t TRIG_STR_FE0 : 4; + uint32_t TRIG_STR_FE1 : 2; + uint32_t TRIG_STR_FE2 : 2; + uint32_t TRIG_STR_BE : 2; + uint32_t TRIG_STR_RAW : 1; + uint32_t TRIG_STR_POST : 1; + uint32_t _rsv_12 : 4; + uint32_t SHAW_UP_FE0 : 4; + uint32_t SHAW_UP_FE1 : 2; + uint32_t SHAW_UP_FE2 : 2; + uint32_t SHAW_UP_BE : 2; + uint32_t SHAW_UP_RAW : 1; + uint32_t SHAW_UP_POST : 1; + } bits; +}; + +union REG_ISP_TOP_SW_CTRL_1 { + uint32_t raw; + struct { + uint32_t PQ_UP_FE0 : 4; + uint32_t PQ_UP_FE1 : 2; + uint32_t PQ_UP_FE2 : 2; + uint32_t PQ_UP_BE : 2; + uint32_t PQ_UP_RAW : 1; + uint32_t PQ_UP_POST : 1; + } bits; +}; + +union REG_ISP_TOP_CTRL_MODE_SEL0 { + uint32_t raw; + struct { + uint32_t TRIG_STR_SEL_FE0 : 4; + uint32_t TRIG_STR_SEL_FE1 : 2; + uint32_t TRIG_STR_SEL_FE2 : 2; + uint32_t TRIG_STR_SEL_BE : 2; + uint32_t TRIG_STR_SEL_RAW : 1; + uint32_t TRIG_STR_SEL_POST : 1; + uint32_t _rsv_12 : 4; + uint32_t SHAW_UP_SEL_FE0 : 4; + uint32_t SHAW_UP_SEL_FE1 : 2; + uint32_t SHAW_UP_SEL_FE2 : 2; + uint32_t SHAW_UP_SEL_BE : 2; + uint32_t SHAW_UP_SEL_RAW : 1; + uint32_t SHAW_UP_SEL_POST : 1; + } bits; +}; + +union REG_ISP_TOP_CTRL_MODE_SEL1 { + uint32_t raw; + struct { + uint32_t PQ_UP_SEL_FE0 : 4; + uint32_t PQ_UP_SEL_FE1 : 2; + uint32_t PQ_UP_SEL_FE2 : 2; + uint32_t PQ_UP_SEL_BE : 2; + uint32_t PQ_UP_SEL_RAW : 1; + uint32_t PQ_UP_SEL_POST : 1; + } bits; +}; + +union REG_ISP_TOP_SCENARIOS_CTRL { + uint32_t raw; + struct { + uint32_t DST2SC : 1; + uint32_t DST2DMA : 1; + uint32_t PRE2BE_L_ENABLE : 1; + uint32_t PRE2BE_S_ENABLE : 1; + uint32_t PRE2YUV_422_ENABLE : 1; + uint32_t BE2RAW_L_ENABLE : 1; + uint32_t BE2RAW_S_ENABLE : 1; + uint32_t BE_RDMA_L_ENABLE : 1; + uint32_t BE_RDMA_S_ENABLE : 1; + uint32_t BE_WDMA_L_ENABLE : 1; + uint32_t BE_WDMA_S_ENABLE : 1; + uint32_t BE_SRC_SEL : 2; + uint32_t AF_RAW0YUV1 : 1; + uint32_t RGBMP_ONLINE_L_ENABLE : 1; + uint32_t RGBMP_ONLINE_S_ENABLE : 1; + uint32_t RAW2YUV_422_ENABLE : 1; + uint32_t HDR_ENABLE : 1; + uint32_t HW_AUTO_ENABLE : 1; + uint32_t HW_AUTO_ISO : 2; + uint32_t DCI_RGB0YUV1 : 1; + uint32_t FE_DMA_SHARE_ENABLE : 1; + uint32_t FE2_DMA_SHARE_ENABLE : 1; + } bits; +}; + +union REG_ISP_TOP_SW_RST { + uint32_t raw; + struct { + uint32_t ISP_RST : 1; + uint32_t CSI0_RST : 1; + uint32_t CSI1_RST : 1; + uint32_t CSI_BE_RST : 1; + uint32_t CSI2_RST : 1; + uint32_t BDG_LITE_RST : 1; + uint32_t AXI_RST : 1; + uint32_t CMDQ_RST : 1; + uint32_t APB_RST : 1; + uint32_t RAW_RST : 1; + } bits; +}; + +union REG_ISP_TOP_BLK_IDLE { + uint32_t raw; + struct { + uint32_t FE0_BLK_IDLE : 1; + uint32_t FE1_BLK_IDLE : 1; + uint32_t FE2_BLK_IDLE : 1; + uint32_t BE_BLK_IDLE : 1; + uint32_t RAW_BLK_IDLE : 1; + uint32_t RGB_BLK_IDLE : 1; + uint32_t YUV_BLK_IDLE : 1; + uint32_t RDMA_IDLE : 1; + uint32_t WDMA0_IDLE : 1; + uint32_t WDMA1_IDLE : 1; + } bits; +}; + +union REG_ISP_TOP_BLK_IDLE_ENABLE { + uint32_t raw; + struct { + uint32_t BLK_IDLE_CSI0_EN : 1; + uint32_t BLK_IDLE_CSI1_EN : 1; + uint32_t BLK_IDLE_CSI2_EN : 1; + uint32_t BLK_IDLE_BDG_LITE_EN : 1; + uint32_t BLK_IDLE_BE_EN : 1; + uint32_t BLK_IDLE_POST_EN : 1; + uint32_t BLK_IDLE_APB_EN : 1; + uint32_t BLK_IDLE_AXI_EN : 1; + uint32_t BLK_IDLE_CMDQ_EN : 1; + uint32_t BLK_IDLE_RAW_EN : 1; + uint32_t BLK_IDLE_RGB_EN : 1; + uint32_t BLK_IDLE_YUV_EN : 1; + } bits; +}; + +union REG_ISP_TOP_DBUS0 { + uint32_t raw; + struct { + uint32_t DBUS0 : 32; + } bits; +}; + +union REG_ISP_TOP_DBUS1 { + uint32_t raw; + struct { + uint32_t DBUS1 : 32; + } bits; +}; + +union REG_ISP_TOP_DBUS2 { + uint32_t raw; + struct { + uint32_t DBUS2 : 32; + } bits; +}; + +union REG_ISP_TOP_DBUS3 { + uint32_t raw; + struct { + uint32_t DBUS3 : 32; + } bits; +}; + +union REG_ISP_TOP_FORCE_INT { + uint32_t raw; + struct { + uint32_t FORCE_ISP_INT : 1; + uint32_t FORCE_ISP_INT_EN : 1; + } bits; +}; + +union REG_ISP_TOP_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY : 28; + uint32_t DBUS_SEL : 4; + } bits; +}; + +union REG_ISP_TOP_IP_ENABLE0 { + uint32_t raw; + struct { + uint32_t FE0_RGBMAP_L_ENABLE : 1; + uint32_t FE0_RGBMAP_S_ENABLE : 1; + uint32_t FE0_BLC_L_ENABLE : 1; + uint32_t FE0_BLC_S_ENABLE : 1; + uint32_t FE1_RGBMAP_L_ENABLE : 1; + uint32_t FE1_RGBMAP_S_ENABLE : 1; + uint32_t FE1_BLC_L_ENABLE : 1; + uint32_t FE1_BLC_S_ENABLE : 1; + uint32_t FE2_RGBMAP_L_ENABLE : 1; + uint32_t FE2_RGBMAP_S_ENABLE : 1; + uint32_t FE2_BLC_L_ENABLE : 1; + uint32_t FE2_BLC_S_ENABLE : 1; + uint32_t _rsv_12 : 4; + uint32_t BE_BLC_L_ENABLE : 1; + uint32_t BE_BLC_S_ENABLE : 1; + uint32_t BE_CROP_L_ENABLE : 1; + uint32_t BE_CROP_S_ENABLE : 1; + uint32_t BE_DPC_L_ENABLE : 1; + uint32_t BE_DPC_S_ENABLE : 1; + uint32_t BE_AF_ENABLE : 1; + } bits; +}; + +union REG_ISP_TOP_IP_ENABLE1 { + uint32_t raw; + struct { + uint32_t RAW_CROP_L_ENABLE : 1; + uint32_t RAW_CROP_S_ENABLE : 1; + uint32_t RAW_BNR_ENABLE : 1; + uint32_t RAW_CFA_ENABLE : 1; + uint32_t RAW_LSCM_ENABLE : 1; + uint32_t RAW_WBG_L_ENABLE : 1; + uint32_t RAW_WBG_S_ENABLE : 1; + uint32_t RAW_LMP_L_ENABLE : 1; + uint32_t RAW_LMP_S_ENABLE : 1; + uint32_t RAW_AE_L_ENABLE : 1; + uint32_t RAW_AE_S_ENABLE : 1; + uint32_t RAW_GMS_ENABLE : 1; + uint32_t RAW_RGBCAC_ENABLE : 1; + uint32_t RAW_LCAC_ENABLE : 1; + uint32_t _rsv_14 : 2; + uint32_t RGB_FUSION_ENABLE : 1; + uint32_t RGB_LTM_ENABLE : 1; + uint32_t RGB_MANR_ENABLE : 1; + uint32_t RGB_HISTV_ENABLE : 1; + uint32_t RGB_GAMMA_ENABLE : 1; + uint32_t RGB_DHZ_ENABLE : 1; + uint32_t RGB_RGBDITHER_ENABLE : 1; + uint32_t RGB_CLUT_ENABLE : 1; + uint32_t RGB_R2Y4_ENABLE : 1; + uint32_t RGB_USER_GAMMA_ENABLE : 1; + uint32_t RGB_CCM_0_ENABLE : 1; + uint32_t RGB_CCM_1_ENABLE : 1; + } bits; +}; + +union REG_ISP_TOP_IP_ENABLE2 { + uint32_t raw; + struct { + uint32_t YUV_PREYEE_ENABLE : 1; + uint32_t YUV_DITHER_ENABLE : 1; + uint32_t YUV_3DNR_ENABLE : 1; + uint32_t YUV_YNR_ENABLE : 1; + uint32_t YUV_CNR_ENABLE : 1; + uint32_t YUV_EE_ENABLE : 1; + uint32_t YUV_CROP_Y_ENABLE : 1; + uint32_t YUV_CROP_C_ENABLE : 1; + uint32_t YUV_YCURVE_ENABLE : 1; + uint32_t YUV_CA2_ENABLE : 1; + uint32_t YUV_CA_ENABLE : 1; + uint32_t YUV_DCI_ENABLE : 1; + uint32_t YUV_LDCI_ENABLE : 1; + } bits; +}; + +union REG_ISP_TOP_CMDQ_CTRL { + uint32_t raw; + struct { + uint32_t CMDQ_TSK_EN : 8; + uint32_t CMDQ_FLAG_SEL : 2; + uint32_t CMDQ_TASK_SEL : 2; + } bits; +}; + +union REG_ISP_TOP_CMDQ_TRIG { + uint32_t raw; + struct { + uint32_t CMDQ_TSK_TRIG : 8; + } bits; +}; + +union REG_ISP_TOP_TRIG_CNT { + uint32_t raw; + struct { + uint32_t TRIG_STR_CNT : 4; + uint32_t VSYNC_DELAY : 4; + } bits; +}; + +union REG_ISP_TOP_SVN_VERSION { + uint32_t raw; + struct { + uint32_t SVN_REVISION : 32; + } bits; +}; + +union REG_ISP_TOP_TIMESTAMP { + uint32_t raw; + struct { + uint32_t UNIX_TIMESTAMP : 32; + } bits; +}; + +union REG_ISP_TOP_SCLIE_ENABLE { + uint32_t raw; + struct { + uint32_t SLICE_ENABLE_MAIN_LEXP : 1; + uint32_t SLICE_ENABLE_MAIN_SEXP : 1; + uint32_t SLICE_ENABLE_SUB_LEXP : 1; + uint32_t SLICE_ENABLE_SUB_SEXP : 1; + } bits; +}; + +union REG_ISP_TOP_W_SLICE_THRESH_MAIN { + uint32_t raw; + struct { + uint32_t W_SLICE_THR_MAIN_LEXP : 16; + uint32_t W_SLICE_THR_MAIN_SEXP : 16; + } bits; +}; + +union REG_ISP_TOP_W_SLICE_THRESH_SUB_CURR { + uint32_t raw; + struct { + uint32_t W_SLICE_THR_SUB_CUR_LEXP : 16; + uint32_t W_SLICE_THR_SUB_CUR_SEXP : 16; + } bits; +}; + +union REG_ISP_TOP_W_SLICE_THRESH_SUB_PRV { + uint32_t raw; + struct { + uint32_t W_SLICE_THR_SUB_PRV_LEXP : 16; + uint32_t W_SLICE_THR_SUB_PRV_SEXP : 16; + } bits; +}; + +union REG_ISP_TOP_R_SLICE_THRESH_MAIN { + uint32_t raw; + struct { + uint32_t R_SLICE_THR_MAIN_LEXP : 16; + uint32_t R_SLICE_THR_MAIN_SEXP : 16; + } bits; +}; + +union REG_ISP_TOP_R_SLICE_THRESH_SUB_CURR { + uint32_t raw; + struct { + uint32_t R_SLICE_THR_SUB_CUR_LEXP : 16; + uint32_t R_SLICE_THR_SUB_CUR_SEXP : 16; + } bits; +}; + +union REG_ISP_TOP_R_SLICE_THRESH_SUB_PRV { + uint32_t raw; + struct { + uint32_t R_SLICE_THR_SUB_PRV_LEXP : 16; + uint32_t R_SLICE_THR_SUB_PRV_SEXP : 16; + } bits; +}; + +union REG_ISP_TOP_RAW_FRAME_VALID { + uint32_t raw; + struct { + uint32_t RAW_FRAME_VLD : 1; + uint32_t RAW_PQ_VLD : 1; + } bits; +}; + +union REG_ISP_TOP_FIRST_FRAME { + uint32_t raw; + struct { + uint32_t FIRST_FRAME_SW : 5; + uint32_t FIRST_FRAME_TOP : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_WDMA_CORE_SHADOW_RD_SEL { + uint32_t raw; + struct { + uint32_t SHADOW_RD_SEL : 1; + uint32_t ABORT_MODE : 1; + } bits; +}; + +union REG_WDMA_CORE_IP_DISABLE { + uint32_t raw; + struct { + uint32_t IP_DISABLE : 32; + } bits; +}; + +union REG_WDMA_CORE_DISABLE_SEGLEN { + uint32_t raw; + struct { + uint32_t SEGLEN_DISABLE : 32; + } bits; +}; + +union REG_WDMA_CORE_UP_RING_BASE { + uint32_t raw; + struct { + uint32_t UP_RING_BASE : 32; + } bits; +}; + +union REG_WDMA_CORE_NORM_STATUS0 { + uint32_t raw; + struct { + uint32_t ABORT_DONE : 1; + uint32_t _rsv_1 : 3; + uint32_t ERROR_AXI : 1; + uint32_t ERROR_DMI : 1; + uint32_t SLOT_FULL : 1; + uint32_t _rsv_7 : 1; + uint32_t ERROR_ID : 5; + uint32_t _rsv_13 : 3; + uint32_t DMA_VERSION : 16; + } bits; +}; + +union REG_WDMA_CORE_NORM_STATUS1 { + uint32_t raw; + struct { + uint32_t ID_IDLE : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_EN { + uint32_t raw; + struct { + uint32_t RING_ENABLE : 32; + } bits; +}; + +union REG_WDMA_CORE_NORM_PERF { + uint32_t raw; + struct { + uint32_t BWLWIN : 10; + uint32_t BWLTXN : 6; + uint32_t QOSO_TH : 4; + uint32_t QOSO_EN : 1; + } bits; +}; + +union REG_WDMA_CORE_RING_PATCH_ENABLE { + uint32_t raw; + struct { + uint32_t RING_PATCH_ENABLE : 32; + } bits; +}; + +union REG_WDMA_CORE_SET_RING_BASE { + uint32_t raw; + struct { + uint32_t SET_RING_BASE : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BASE_ADDR_L { + uint32_t raw; + struct { + uint32_t RING_BASE_L : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BASE_ADDR_H { + uint32_t raw; + struct { + uint32_t RING_BASE_H : 8; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE0 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE0 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE1 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE1 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE2 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE2 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE3 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE3 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE4 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE4 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE5 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE5 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE6 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE6 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE7 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE7 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE8 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE8 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE9 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE9 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE10 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE10 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE11 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE11 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE12 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE12 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE13 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE13 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE14 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE14 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE15 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE15 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE16 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE16 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE17 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE17 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE18 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE18 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE19 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE19 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE20 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE20 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE21 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE21 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE22 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE22 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE23 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE23 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE24 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE24 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE25 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE25 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE26 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE26 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE27 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE27 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE28 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE28 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE29 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE29 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE30 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE30 : 32; + } bits; +}; + +union REG_WDMA_CORE_RING_BUFFER_SIZE31 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE31 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS0 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR0 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS1 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR1 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS2 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR2 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS3 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR3 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS4 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR4 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS5 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR5 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS6 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR6 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS7 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR7 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS8 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR8 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS9 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR9 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS10 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR10 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS11 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR11 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS12 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR12 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS13 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR13 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS14 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR14 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS15 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR15 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS16 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR16 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS17 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR17 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS18 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR18 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS19 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR19 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS20 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR20 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS21 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR21 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS22 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR22 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS23 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR23 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS24 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR24 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS25 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR25 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS26 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR26 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS27 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR27 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS28 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR28 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS29 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR29 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS30 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR30 : 32; + } bits; +}; + +union REG_WDMA_CORE_NEXT_DMA_ADDR_STS31 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR31 : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_RDMA_CORE_SHADOW_RD_SEL { + uint32_t raw; + struct { + uint32_t SHADOW_RD_SEL : 1; + uint32_t ABORT_MODE : 1; + uint32_t _rsv_2 : 6; + uint32_t MAX_OSTD : 8; + uint32_t OSTD_SW_EN : 1; + } bits; +}; + +union REG_RDMA_CORE_IP_DISABLE { + uint32_t raw; + struct { + uint32_t IP_DISABLE : 32; + } bits; +}; + +union REG_RDMA_CORE_UP_RING_BASE { + uint32_t raw; + struct { + uint32_t UP_RING_BASE : 32; + } bits; +}; + +union REG_RDMA_CORE_NORM_STATUS0 { + uint32_t raw; + struct { + uint32_t ABORT_DONE : 1; + uint32_t _rsv_1 : 3; + uint32_t ERROR_AXI : 1; + uint32_t _rsv_5 : 3; + uint32_t ERROR_ID : 5; + uint32_t _rsv_13 : 3; + uint32_t DMA_VERSION : 16; + } bits; +}; + +union REG_RDMA_CORE_NORM_STATUS1 { + uint32_t raw; + struct { + uint32_t ID_IDLE : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_EN { + uint32_t raw; + struct { + uint32_t RING_ENABLE : 32; + } bits; +}; + +union REG_RDMA_CORE_NORM_PERF { + uint32_t raw; + struct { + uint32_t BWLWIN : 10; + uint32_t BWLTXN : 6; + } bits; +}; + +union REG_RDMA_CORE_AR_PRIORITY_SEL { + uint32_t raw; + struct { + uint32_t AR_PRIORITY_SEL : 1; + uint32_t QOS_PRIORITY_SEL : 1; + uint32_t ARB_HIST_DISABLE : 1; + uint32_t _rsv_3 : 1; + uint32_t ARB_USAGE_TH : 4; + } bits; +}; + +union REG_RDMA_CORE_RING_PATCH_ENABLE { + uint32_t raw; + struct { + uint32_t RING_PATCH_ENABLE : 32; + } bits; +}; + +union REG_RDMA_CORE_SET_RING_BASE { + uint32_t raw; + struct { + uint32_t SET_RING_BASE : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BASE_ADDR_L { + uint32_t raw; + struct { + uint32_t RING_BASE_L : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BASE_ADDR_H { + uint32_t raw; + struct { + uint32_t RING_BASE_H : 8; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE0 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE0 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE1 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE1 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE2 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE2 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE3 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE3 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE4 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE4 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE5 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE5 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE6 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE6 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE7 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE7 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE8 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE8 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE9 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE9 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE10 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE10 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE11 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE11 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE12 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE12 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE13 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE13 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE14 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE14 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE15 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE15 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE16 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE16 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE17 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE17 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE18 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE18 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE19 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE19 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE20 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE20 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE21 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE21 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE22 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE22 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE23 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE23 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE24 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE24 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE25 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE25 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE26 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE26 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE27 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE27 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE28 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE28 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE29 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE29 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE30 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE30 : 32; + } bits; +}; + +union REG_RDMA_CORE_RING_BUFFER_SIZE31 { + uint32_t raw; + struct { + uint32_t RBUF_SIZE31 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS0 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR0 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS1 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR1 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS2 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR2 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS3 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR3 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS4 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR4 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS5 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR5 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS6 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR6 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS7 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR7 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS8 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR8 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS9 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR9 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS10 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR10 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS11 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR11 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS12 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR12 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS13 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR13 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS14 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR14 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS15 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR15 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS16 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR16 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS17 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR17 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS18 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR18 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS19 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR19 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS20 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR20 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS21 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR21 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS22 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR22 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS23 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR23 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS24 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR24 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS25 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR25 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS26 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR26 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS27 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR27 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS28 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR28 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS29 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR29 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS30 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR30 : 32; + } bits; +}; + +union REG_RDMA_CORE_NEXT_DMA_ADDR_STS31 { + uint32_t raw; + struct { + uint32_t NEXT_DMA_ADDR31 : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CSI_BDG_LITE_BDG_TOP_CTRL { + uint32_t raw; + struct { + uint32_t CSI_MODE : 2; + uint32_t _rsv_2 : 2; + uint32_t CH_NUM : 2; + uint32_t CH0_DMA_WR_ENABLE : 1; + uint32_t CH1_DMA_WR_ENABLE : 1; + uint32_t CH2_DMA_WR_ENABLE : 1; + uint32_t Y_ONLY : 1; + uint32_t _rsv_10 : 1; + uint32_t VS_POL : 1; + uint32_t HS_POL : 1; + uint32_t RESET_MODE : 1; + uint32_t VS_MODE : 1; + uint32_t ABORT_MODE : 1; + uint32_t RESET : 1; + uint32_t ABORT : 1; + uint32_t CH3_DMA_WR_ENABLE : 1; + uint32_t CH3_DMA_420_WR_ENABLE : 1; + uint32_t _rsv_20 : 2; + uint32_t CH0_DMA_420_WR_ENABLE : 1; + uint32_t CH1_DMA_420_WR_ENABLE : 1; + uint32_t CSI_ENABLE : 1; + uint32_t _rsv_25 : 2; + uint32_t CH2_DMA_420_WR_ENABLE : 1; + uint32_t SHDW_READ_SEL : 1; + uint32_t _rsv_29 : 2; + uint32_t CSI_UP_REG : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_BDG_INTERRUPT_CTRL_0 { + uint32_t raw; + struct { + uint32_t CH0_VS_INT_EN : 1; + uint32_t CH0_TRIG_INT_EN : 1; + uint32_t CH0_DROP_INT_EN : 1; + uint32_t CH0_SIZE_ERROR_INT_EN : 1; + uint32_t CH0_FRAME_DONE_EN : 1; + uint32_t _rsv_5 : 3; + uint32_t CH1_VS_INT_EN : 1; + uint32_t CH1_TRIG_INT_EN : 1; + uint32_t CH1_DROP_INT_EN : 1; + uint32_t CH1_SIZE_ERROR_INT_EN : 1; + uint32_t CH1_FRAME_DONE_EN : 1; + uint32_t _rsv_13 : 3; + uint32_t CH2_VS_INT_EN : 1; + uint32_t CH2_TRIG_INT_EN : 1; + uint32_t CH2_DROP_INT_EN : 1; + uint32_t CH2_SIZE_ERROR_INT_EN : 1; + uint32_t CH2_FRAME_DONE_EN : 1; + uint32_t _rsv_21 : 3; + uint32_t CH3_VS_INT_EN : 1; + uint32_t CH3_TRIG_INT_EN : 1; + uint32_t CH3_DROP_INT_EN : 1; + uint32_t CH3_SIZE_ERROR_INT_EN : 1; + uint32_t CH3_FRAME_DONE_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_BDG_INTERRUPT_CTRL_1 { + uint32_t raw; + struct { + uint32_t LINE_INTP_EN : 1; + uint32_t FIFO_OVERFLOW_INT_EN : 1; + uint32_t DMA_ERROR_INTP_EN : 1; + uint32_t _rsv_3 : 5; + uint32_t DROP_MODE : 4; + uint32_t AVG_MODE : 4; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_FRAME_VLD { + uint32_t raw; + struct { + uint32_t FRAME_VLD_CH0 : 1; + uint32_t FRAME_VLD_CH1 : 1; + uint32_t FRAME_VLD_CH2 : 1; + uint32_t FRAME_VLD_CH3 : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_SIZE { + uint32_t raw; + struct { + uint32_t CH0_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_SIZE { + uint32_t raw; + struct { + uint32_t CH1_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_SIZE { + uint32_t raw; + struct { + uint32_t CH2_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH2_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_SIZE { + uint32_t raw; + struct { + uint32_t CH3_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_CROP_EN { + uint32_t raw; + struct { + uint32_t CH0_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH0_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH0_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_CROP_EN { + uint32_t raw; + struct { + uint32_t CH1_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH1_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH1_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_CROP_EN { + uint32_t raw; + struct { + uint32_t CH2_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH2_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH2_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH2_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH2_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_CROP_EN { + uint32_t raw; + struct { + uint32_t CH3_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH3_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH3_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_LINE_INTP_HEIGHT { + uint32_t raw; + struct { + uint32_t LINE_INTP_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH0_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH0_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH0_VS_CNT : 16; + uint32_t CH0_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH0_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH0_TOT_BLK_IDLE : 1; + uint32_t CH0_TOT_DMA_IDLE : 1; + uint32_t CH0_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH1_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH1_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH1_VS_CNT : 16; + uint32_t CH1_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH1_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH1_TOT_BLK_IDLE : 1; + uint32_t CH1_TOT_DMA_IDLE : 1; + uint32_t CH1_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH2_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH2_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH2_VS_CNT : 16; + uint32_t CH2_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH2_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH2_TOT_BLK_IDLE : 1; + uint32_t CH2_TOT_DMA_IDLE : 1; + uint32_t CH2_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH3_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH3_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH3_VS_CNT : 16; + uint32_t CH3_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_CH3_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH3_TOT_BLK_IDLE : 1; + uint32_t CH3_TOT_DMA_IDLE : 1; + uint32_t CH3_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_INTERRUPT_STATUS_0 { + uint32_t raw; + struct { + uint32_t CH0_FRAME_DROP_INT : 1; + uint32_t CH0_VS_INT : 1; + uint32_t CH0_TRIG_INT : 1; + uint32_t CH0_FRAME_DONE : 1; + uint32_t CH0_FRAME_WIDTH_GT_INT : 1; + uint32_t CH0_FRAME_WIDTH_LS_INT : 1; + uint32_t CH0_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH0_FRAME_HEIGHT_LS_INT : 1; + uint32_t CH1_FRAME_DROP_INT : 1; + uint32_t CH1_VS_INT : 1; + uint32_t CH1_TRIG_INT : 1; + uint32_t CH1_FRAME_DONE : 1; + uint32_t CH1_FRAME_WIDTH_GT_INT : 1; + uint32_t CH1_FRAME_WIDTH_LS_INT : 1; + uint32_t CH1_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH1_FRAME_HEIGHT_LS_INT : 1; + uint32_t CH2_FRAME_DROP_INT : 1; + uint32_t CH2_VS_INT : 1; + uint32_t CH2_TRIG_INT : 1; + uint32_t CH2_FRAME_DONE : 1; + uint32_t CH2_FRAME_WIDTH_GT_INT : 1; + uint32_t CH2_FRAME_WIDTH_LS_INT : 1; + uint32_t CH2_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH2_FRAME_HEIGHT_LS_INT : 1; + uint32_t CH3_FRAME_DROP_INT : 1; + uint32_t CH3_VS_INT : 1; + uint32_t CH3_TRIG_INT : 1; + uint32_t CH3_FRAME_DONE : 1; + uint32_t CH3_FRAME_WIDTH_GT_INT : 1; + uint32_t CH3_FRAME_WIDTH_LS_INT : 1; + uint32_t CH3_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH3_FRAME_HEIGHT_LS_INT : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_INTERRUPT_STATUS_1 { + uint32_t raw; + struct { + uint32_t FIFO_OVERFLOW_INT : 1; + uint32_t FRAME_RESOLUTION_OVER_MAX_INT : 1; + uint32_t _rsv_2 : 1; + uint32_t LINE_INTP_INT : 1; + uint32_t DMA_ERROR_INT : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_BDG_DEBUG { + uint32_t raw; + struct { + uint32_t RING_BUFF_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_WR_URGENT_CTRL { + uint32_t raw; + struct { + uint32_t WR_NEAR_OVERFLOW_THRESHOLD : 13; + uint32_t _rsv_13 : 3; + uint32_t WR_SAFE_THRESHOLD : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_RD_URGENT_CTRL { + uint32_t raw; + struct { + uint32_t RD_NEAR_OVERFLOW_THRESHOLD : 13; + uint32_t _rsv_13 : 3; + uint32_t RD_SAFE_THRESHOLD : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY_IN : 16; + uint32_t DUMMY_OUT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_TRIG_DLY_CONTROL_0 { + uint32_t raw; + struct { + uint32_t TRIG_DLY_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_LITE_TRIG_DLY_CONTROL_1 { + uint32_t raw; + struct { + uint32_t TRIG_DLY_VALUE : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_RAW_RDMA_CTRL_READ_SEL { + uint32_t raw; + struct { + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_RAW_RDMA_CTRL_CONFIG { + uint32_t raw; + struct { + uint32_t LE_RDMA_EN : 1; + uint32_t SE_RDMA_EN : 1; + } bits; +}; + +union REG_RAW_RDMA_CTRL_RDMA_SIZE { + uint32_t raw; + struct { + uint32_t RDMI_WIDTHM1 : 16; + uint32_t RDMI_HEIGHTM1 : 16; + } bits; +}; + +union REG_RAW_RDMA_CTRL_DPCM_MODE { + uint32_t raw; + struct { + uint32_t DPCM_MODE : 3; + uint32_t _rsv_3 : 5; + uint32_t DPCM_XSTR : 13; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_LDCI_ENABLE { + uint32_t raw; + struct { + uint32_t LDCI_ENABLE : 1; + uint32_t LDCI_STATS_ENABLE : 1; + uint32_t LDCI_MAP_ENABLE : 1; + uint32_t LDCI_UV_GAIN_ENABLE : 1; + uint32_t _rsv_4 : 2; + uint32_t LDCI_FIRST_FRAME_ENABLE : 1; + uint32_t LDCI_ZEROING_ENABLE : 1; + uint32_t LDCI_IMAGE_SIZE_DIV_BY_16X12 : 1; + uint32_t _rsv_9 : 19; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_LDCI_STRENGTH { + uint32_t raw; + struct { + uint32_t LDCI_STRENGTH : 9; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_MAX { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_MAX : 8; + uint32_t _rsv_8 : 8; + uint32_t LDCI_LUMA_WGT_MIN : 8; + } bits; +}; + +union REG_ISP_LDCI_IDX_IIR_ALPHA { + uint32_t raw; + struct { + uint32_t LDCI_IDX_IIR_ALPHA : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_VAR_IIR_ALPHA : 10; + } bits; +}; + +union REG_ISP_LDCI_EDGE_SCALE { + uint32_t raw; + struct { + uint32_t LDCI_EDGE_SCALE : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_EDGE_CORING : 8; + } bits; +}; + +union REG_ISP_LDCI_EDGE_CLAMP { + uint32_t raw; + struct { + uint32_t LDCI_VAR_MAP_MAX : 8; + uint32_t _rsv_8 : 8; + uint32_t LDCI_VAR_MAP_MIN : 8; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_NORM { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_NORM : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_VAR_FILTER_NORM : 9; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_IDX_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_IDX_00 : 4; + uint32_t LDCI_TONE_CURVE_IDX_01 : 4; + uint32_t LDCI_TONE_CURVE_IDX_02 : 4; + uint32_t LDCI_TONE_CURVE_IDX_03 : 4; + uint32_t LDCI_TONE_CURVE_IDX_04 : 4; + uint32_t LDCI_TONE_CURVE_IDX_05 : 4; + uint32_t LDCI_TONE_CURVE_IDX_06 : 4; + uint32_t LDCI_TONE_CURVE_IDX_07 : 4; + } bits; +}; + +union REG_ISP_LDCI_BLK_SIZE_X { + uint32_t raw; + struct { + uint32_t LDCI_BLK_SIZE_X : 13; + uint32_t _rsv_13 : 3; + uint32_t LDCI_BLK_SIZE_Y : 13; + } bits; +}; + +union REG_ISP_LDCI_BLK_SIZE_X1 { + uint32_t raw; + struct { + uint32_t LDCI_BLK_SIZE_X1 : 13; + uint32_t _rsv_13 : 3; + uint32_t LDCI_BLK_SIZE_Y1 : 13; + } bits; +}; + +union REG_ISP_LDCI_SUBBLK_SIZE_X { + uint32_t raw; + struct { + uint32_t LDCI_SUBBLK_SIZE_X : 13; + uint32_t _rsv_13 : 3; + uint32_t LDCI_SUBBLK_SIZE_Y : 16; + } bits; +}; + +union REG_ISP_LDCI_SUBBLK_SIZE_X1 { + uint32_t raw; + struct { + uint32_t LDCI_SUBBLK_SIZE_X1 : 13; + uint32_t _rsv_13 : 3; + uint32_t LDCI_SUBBLK_SIZE_Y1 : 16; + } bits; +}; + +union REG_ISP_LDCI_INTERP_NORM_LR { + uint32_t raw; + struct { + uint32_t LDCI_INTERP_NORM_LR : 16; + uint32_t LDCI_INTERP_NORM_UD : 16; + } bits; +}; + +union REG_ISP_LDCI_SUB_INTERP_NORM_LR { + uint32_t raw; + struct { + uint32_t LDCI_SUB_INTERP_NORM_LR : 16; + uint32_t LDCI_SUB_INTERP_NORM_UD : 13; + } bits; +}; + +union REG_ISP_LDCI_MEAN_NORM_X { + uint32_t raw; + struct { + uint32_t LDCI_MEAN_NORM_X : 15; + uint32_t _rsv_15 : 1; + uint32_t LDCI_MEAN_NORM_Y : 14; + } bits; +}; + +union REG_ISP_LDCI_VAR_NORM_Y { + uint32_t raw; + struct { + uint32_t LDCI_VAR_NORM_Y : 14; + } bits; +}; + +union REG_ISP_LDCI_UV_GAIN_MAX { + uint32_t raw; + struct { + uint32_t LDCI_UV_GAIN_MAX : 7; + uint32_t _rsv_7 : 9; + uint32_t LDCI_UV_GAIN_MIN : 7; + } bits; +}; + +union REG_ISP_LDCI_IMG_WIDTHM1 { + uint32_t raw; + struct { + uint32_t LDCI_IMG_WIDTHM1 : 14; + uint32_t _rsv_14 : 2; + uint32_t LDCI_IMG_HEIGHTM1 : 14; + } bits; +}; + +union REG_ISP_LDCI_STATUS { + uint32_t raw; + struct { + uint32_t LDCI_STATUS : 32; + } bits; +}; + +union REG_ISP_LDCI_GRACE_RESET { + uint32_t raw; + struct { + uint32_t LDCI_GRACE_RESET : 1; + } bits; +}; + +union REG_ISP_LDCI_MONITOR { + uint32_t raw; + struct { + uint32_t LDCI_MONITOR : 32; + } bits; +}; + +union REG_ISP_LDCI_FLOW { + uint32_t raw; + struct { + uint32_t LDCI_ZERODCIOGRAM : 1; + uint32_t _rsv_1 : 3; + uint32_t LDCI_SHADOW_SELECT : 1; + } bits; +}; + +union REG_ISP_LDCI_MONITOR_SELECT { + uint32_t raw; + struct { + uint32_t LDCI_MONITOR_SELECT : 32; + } bits; +}; + +union REG_ISP_LDCI_LOCATION { + uint32_t raw; + struct { + uint32_t LDCI_LOCATION : 32; + } bits; +}; + +union REG_ISP_LDCI_DEBUG { + uint32_t raw; + struct { + uint32_t LDCI_DEBUG : 32; + } bits; +}; + +union REG_ISP_LDCI_DUMMY { + uint32_t raw; + struct { + uint32_t LDCI_DUMMY : 32; + } bits; +}; + +union REG_ISP_LDCI_DMI_ENABLE { + uint32_t raw; + struct { + uint32_t DMI_ENABLE : 2; + uint32_t _rsv_2 : 2; + uint32_t DMI_QOS : 2; + uint32_t _rsv_6 : 2; + uint32_t FORCE_DMA_DISABLE : 2; + } bits; +}; + +union REG_ISP_LDCI_DCI_BAYER_STARTING { + uint32_t raw; + struct { + uint32_t DCI_BAYER_STARTING : 4; + uint32_t _rsv_4 : 12; + uint32_t FORCE_BAYER_ENABLE : 1; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_00 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_00 : 11; + uint32_t _rsv_11 : 5; + uint32_t LDCI_IDX_FILTER_LUT_01 : 11; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_02 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_02 : 11; + uint32_t _rsv_11 : 5; + uint32_t LDCI_IDX_FILTER_LUT_03 : 11; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_04 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_04 : 11; + uint32_t _rsv_11 : 5; + uint32_t LDCI_IDX_FILTER_LUT_05 : 11; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_06 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_06 : 11; + uint32_t _rsv_11 : 5; + uint32_t LDCI_IDX_FILTER_LUT_07 : 11; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_08 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_08 : 11; + uint32_t _rsv_11 : 5; + uint32_t LDCI_IDX_FILTER_LUT_09 : 11; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_10 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_10 : 11; + uint32_t _rsv_11 : 5; + uint32_t LDCI_IDX_FILTER_LUT_11 : 11; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_12 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_12 : 11; + uint32_t _rsv_11 : 5; + uint32_t LDCI_IDX_FILTER_LUT_13 : 11; + } bits; +}; + +union REG_ISP_LDCI_IDX_FILTER_LUT_14 { + uint32_t raw; + struct { + uint32_t LDCI_IDX_FILTER_LUT_14 : 11; + } bits; +}; + +union REG_ISP_LDCI_INTERP_NORM_LR1 { + uint32_t raw; + struct { + uint32_t LDCI_INTERP_NORM_LR1 : 16; + uint32_t LDCI_INTERP_NORM_UD1 : 16; + } bits; +}; + +union REG_ISP_LDCI_SUB_INTERP_NORM_LR1 { + uint32_t raw; + struct { + uint32_t LDCI_SUB_INTERP_NORM_LR1 : 16; + uint32_t LDCI_SUB_INTERP_NORM_UD1 : 13; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_00_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_00_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_00_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_01_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_01_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_01_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_02_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_02_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_02_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_03_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_03_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_03_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_04_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_04_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_04_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_05_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_05_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_05_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_06_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_06_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_06_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_07_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_07_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_07_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_00 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_02 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_04 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_05 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_06 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_06 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_07 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_08 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_08 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_09 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_10 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_10 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_11 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_12 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_12 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_13 : 10; + } bits; +}; + +union REG_ISP_LDCI_TONE_CURVE_LUT_P_14 { + uint32_t raw; + struct { + uint32_t LDCI_TONE_CURVE_LUT_P_14 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_TONE_CURVE_LUT_P_15 : 10; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_00 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_00 : 8; + uint32_t LDCI_LUMA_WGT_LUT_01 : 8; + uint32_t LDCI_LUMA_WGT_LUT_02 : 8; + uint32_t LDCI_LUMA_WGT_LUT_03 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_04 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_04 : 8; + uint32_t LDCI_LUMA_WGT_LUT_05 : 8; + uint32_t LDCI_LUMA_WGT_LUT_06 : 8; + uint32_t LDCI_LUMA_WGT_LUT_07 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_08 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_08 : 8; + uint32_t LDCI_LUMA_WGT_LUT_09 : 8; + uint32_t LDCI_LUMA_WGT_LUT_10 : 8; + uint32_t LDCI_LUMA_WGT_LUT_11 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_12 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_12 : 8; + uint32_t LDCI_LUMA_WGT_LUT_13 : 8; + uint32_t LDCI_LUMA_WGT_LUT_14 : 8; + uint32_t LDCI_LUMA_WGT_LUT_15 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_16 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_16 : 8; + uint32_t LDCI_LUMA_WGT_LUT_17 : 8; + uint32_t LDCI_LUMA_WGT_LUT_18 : 8; + uint32_t LDCI_LUMA_WGT_LUT_19 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_20 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_20 : 8; + uint32_t LDCI_LUMA_WGT_LUT_21 : 8; + uint32_t LDCI_LUMA_WGT_LUT_22 : 8; + uint32_t LDCI_LUMA_WGT_LUT_23 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_24 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_24 : 8; + uint32_t LDCI_LUMA_WGT_LUT_25 : 8; + uint32_t LDCI_LUMA_WGT_LUT_26 : 8; + uint32_t LDCI_LUMA_WGT_LUT_27 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_28 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_28 : 8; + uint32_t LDCI_LUMA_WGT_LUT_29 : 8; + uint32_t LDCI_LUMA_WGT_LUT_30 : 8; + uint32_t LDCI_LUMA_WGT_LUT_31 : 8; + } bits; +}; + +union REG_ISP_LDCI_LUMA_WGT_LUT_32 { + uint32_t raw; + struct { + uint32_t LDCI_LUMA_WGT_LUT_32 : 8; + } bits; +}; + +union REG_ISP_LDCI_VAR_FILTER_LUT_00 { + uint32_t raw; + struct { + uint32_t LDCI_VAR_FILTER_LUT_00 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_VAR_FILTER_LUT_01 : 10; + } bits; +}; + +union REG_ISP_LDCI_VAR_FILTER_LUT_02 { + uint32_t raw; + struct { + uint32_t LDCI_VAR_FILTER_LUT_02 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_VAR_FILTER_LUT_03 : 10; + } bits; +}; + +union REG_ISP_LDCI_VAR_FILTER_LUT_04 { + uint32_t raw; + struct { + uint32_t LDCI_VAR_FILTER_LUT_04 : 10; + uint32_t _rsv_10 : 6; + uint32_t LDCI_VAR_FILTER_LUT_05 : 10; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_RGB_TOP_0 { + uint32_t raw; + struct { + uint32_t RGBTOP_BAYER_TYPE : 4; + uint32_t RGBTOP_RGBIR_ENABLE : 1; + uint32_t _rsv_5 : 3; + uint32_t UP_PQ_EN : 1; + uint32_t _rsv_9 : 3; + uint32_t PROG_HDK_DIS : 1; + } bits; +}; + +union REG_ISP_RGB_TOP_1 { + uint32_t raw; + struct { + uint32_t RGB_SHDW_SEL : 1; + } bits; +}; + +union REG_ISP_RGB_TOP_2 { + uint32_t raw; + struct { + uint32_t SHDW_DMY : 32; + } bits; +}; + +union REG_ISP_RGB_TOP_3 { + uint32_t raw; + struct { + uint32_t DMY : 32; + } bits; +}; + +union REG_ISP_RGB_TOP_4 { + uint32_t raw; + struct { + uint32_t PROB_OUT_SEL : 5; + uint32_t PROB_PERFMT : 1; + uint32_t _rsv_6 : 2; + uint32_t PROB_FMT : 6; + } bits; +}; + +union REG_ISP_RGB_TOP_5 { + uint32_t raw; + struct { + uint32_t PROB_LINE : 12; + uint32_t _rsv_12 : 4; + uint32_t PROB_PIX : 12; + } bits; +}; + +union REG_ISP_RGB_TOP_6 { + uint32_t raw; + struct { + uint32_t PROB_R : 12; + uint32_t _rsv_12 : 4; + uint32_t PROB_G : 12; + } bits; +}; + +union REG_ISP_RGB_TOP_7 { + uint32_t raw; + struct { + uint32_t PROB_B : 12; + } bits; +}; + +union REG_ISP_RGB_TOP_8 { + uint32_t raw; + struct { + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t DBG_EN : 1; + } bits; +}; + +union REG_ISP_RGB_TOP_9 { + uint32_t raw; + struct { + uint32_t RGBTOP_IMGW_M1 : 13; + uint32_t _rsv_13 : 3; + uint32_t RGBTOP_IMGH_M1 : 13; + } bits; +}; + +union REG_ISP_RGB_TOP_10 { + uint32_t raw; + struct { + uint32_t IR_BIT_MODE : 1; + uint32_t IR_SW_MODE : 1; + uint32_t IR_DMI_ENABLE : 1; + uint32_t IR_CROP_ENABLE : 1; + uint32_t IR_DMI_NUM_SW : 14; + } bits; +}; + +union REG_ISP_RGB_TOP_11 { + uint32_t raw; + struct { + uint32_t IR_IMG_WIDTH : 14; + uint32_t _rsv_14 : 2; + uint32_t IR_IMG_HEIGHT : 14; + } bits; +}; + +union REG_ISP_RGB_TOP_12 { + uint32_t raw; + struct { + uint32_t IR_CROP_W_STR : 14; + uint32_t _rsv_14 : 2; + uint32_t IR_CROP_W_END : 14; + } bits; +}; + +union REG_ISP_RGB_TOP_13 { + uint32_t raw; + struct { + uint32_t IR_CROP_H_STR : 14; + uint32_t _rsv_14 : 2; + uint32_t IR_CROP_H_END : 14; + } bits; +}; + +union REG_ISP_RGB_TOP_14 { + uint32_t raw; + struct { + uint32_t IRM_ENABLE : 1; + uint32_t IRM_HW_RQOS : 1; + uint32_t _rsv_2 : 2; + uint32_t IR_BLENDING_WGT : 9; + uint32_t _rsv_13 : 3; + uint32_t IR_DMI_NUM : 14; + } bits; +}; + +union REG_ISP_RGB_TOP_DBG_IP_S_VLD { + uint32_t raw; + struct { + uint32_t IP_S_TVALID : 31; + uint32_t IP_DBG_EN : 1; + } bits; +}; + +union REG_ISP_RGB_TOP_DBG_IP_S_RDY { + uint32_t raw; + struct { + uint32_t IP_S_TREADY : 31; + } bits; +}; + +union REG_ISP_RGB_TOP_DBG_DMI_VLD { + uint32_t raw; + struct { + uint32_t IP_DMI_VALID : 16; + } bits; +}; + +union REG_ISP_RGB_TOP_DBG_DMI_RDY { + uint32_t raw; + struct { + uint32_t IP_DMI_READY : 16; + } bits; +}; + +union REG_ISP_RGB_TOP_PATGEN1 { + uint32_t raw; + struct { + uint32_t X_CURSER : 14; + uint32_t _rsv_14 : 2; + uint32_t Y_CURSER : 14; + uint32_t CURSER_EN : 1; + uint32_t PG_ENABLE : 1; + } bits; +}; + +union REG_ISP_RGB_TOP_PATGEN2 { + uint32_t raw; + struct { + uint32_t CURSER_VALUE : 16; + } bits; +}; + +union REG_ISP_RGB_TOP_PATGEN3 { + uint32_t raw; + struct { + uint32_t VALUE_REPORT : 32; + } bits; +}; + +union REG_ISP_RGB_TOP_PATGEN4 { + uint32_t raw; + struct { + uint32_t XCNT_RPT : 14; + uint32_t _rsv_14 : 2; + uint32_t YCNT_RPT : 14; + } bits; +}; + +union REG_ISP_RGB_TOP_CHK_SUM { + uint32_t raw; + struct { + uint32_t CHK_SUM_Y : 8; + uint32_t CHK_SUM_U : 8; + uint32_t CHK_SUM_V : 8; + uint32_t CHK_SUM_EN : 1; + } bits; +}; + +union REG_ISP_RGB_TOP_DMA_IDLE { + uint32_t raw; + struct { + uint32_t IP_DMA_IDLE : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_PRE_WDMA_CTRL { + uint32_t raw; + struct { + uint32_t WDMI_EN_LE : 1; + uint32_t WDMI_EN_SE : 1; + uint32_t DMA_WR_MODE : 1; + uint32_t DMA_WR_MSB : 1; + uint32_t _rsv_4 : 27; + uint32_t SHDW_READ_SEL : 1; + } bits; +}; + +union REG_PRE_WDMA_CTRL_PRE_RAW_BE_RDMI_DPCM { + uint32_t raw; + struct { + uint32_t DPCM_MODE : 3; + uint32_t MIPI_OPT : 1; + uint32_t _rsv_4 : 12; + uint32_t DPCM_XSTR : 13; + } bits; +}; + +union REG_PRE_WDMA_CTRL_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY_RW : 16; + uint32_t DUMMY_RO : 16; + } bits; +}; + +union REG_PRE_WDMA_CTRL_DEBUG_INFO { + uint32_t raw; + struct { + uint32_t WDMA_DONE_LE : 1; + uint32_t WDMA_DONE_SE : 1; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_EE_00 { + uint32_t raw; + struct { + uint32_t EE_ENABLE : 1; + uint32_t EE_SHADOW_SEL : 1; + uint32_t _rsv_2 : 2; + uint32_t EE_DEBUG_MODE : 4; + uint32_t EE_TOTAL_CORING : 8; + uint32_t EE_TOTAL_MOTION_CORING : 8; + uint32_t EE_TOTAL_GAIN : 8; + } bits; +}; + +union REG_ISP_EE_04 { + uint32_t raw; + struct { + uint32_t EE_TOTAL_OSHTTHRD : 8; + uint32_t EE_TOTAL_USHTTHRD : 8; + uint32_t EE_DEBUG_SHIFT_BIT : 3; + uint32_t _rsv_19 : 12; + uint32_t EE_PRE_PROC_ENABLE : 1; + } bits; +}; + +union REG_ISP_EE_0C { + uint32_t raw; + struct { + uint32_t EE_LUMAREF_LPF_EN : 1; + uint32_t EE_LUMA_CORING_EN : 1; + uint32_t _rsv_2 : 4; + uint32_t EE_LUMA_ADPTCTRL_EN : 1; + uint32_t EE_DELTA_ADPTCTRL_EN : 1; + uint32_t EE_DELTA_ADPTCTRL_SHIFT : 2; + uint32_t EE_CHROMAREF_LPF_EN : 1; + uint32_t EE_CHROMA_ADPTCTRL_EN : 1; + uint32_t _rsv_12 : 4; + uint32_t EE_MF_CORE_GAIN : 8; + } bits; +}; + +union REG_ISP_EE_10 { + uint32_t raw; + struct { + uint32_t HF_BLEND_WGT : 8; + uint32_t MF_BLEND_WGT : 8; + } bits; +}; + +union REG_ISP_EE_A4 { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_IN_0 : 8; + uint32_t EE_LUMA_CORING_LUT_IN_1 : 8; + uint32_t EE_LUMA_CORING_LUT_IN_2 : 8; + uint32_t EE_LUMA_CORING_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_EE_A8 { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_OUT_0 : 8; + uint32_t EE_LUMA_CORING_LUT_OUT_1 : 8; + uint32_t EE_LUMA_CORING_LUT_OUT_2 : 8; + uint32_t EE_LUMA_CORING_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_EE_AC { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_LUMA_CORING_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_EE_B0 { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_EE_B4 { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_IN_0 : 8; + uint32_t EE_MOTION_CORING_LUT_IN_1 : 8; + uint32_t EE_MOTION_CORING_LUT_IN_2 : 8; + uint32_t EE_MOTION_CORING_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_EE_B8 { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_OUT_0 : 8; + uint32_t EE_MOTION_CORING_LUT_OUT_1 : 8; + uint32_t EE_MOTION_CORING_LUT_OUT_2 : 8; + uint32_t EE_MOTION_CORING_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_EE_BC { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_MOTION_CORING_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_EE_C0 { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_EE_C4 { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_IN_0 : 8; + uint32_t EE_MCORE_GAIN_LUT_IN_1 : 8; + uint32_t EE_MCORE_GAIN_LUT_IN_2 : 8; + uint32_t EE_MCORE_GAIN_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_EE_C8 { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_OUT_0 : 8; + uint32_t EE_MCORE_GAIN_LUT_OUT_1 : 8; + uint32_t EE_MCORE_GAIN_LUT_OUT_2 : 8; + uint32_t EE_MCORE_GAIN_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_EE_HCC { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_MCORE_GAIN_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_EE_HD0 { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_EE_130 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_03 : 6; + } bits; +}; + +union REG_ISP_EE_134 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_07 : 6; + } bits; +}; + +union REG_ISP_EE_138 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_11 : 6; + } bits; +}; + +union REG_ISP_EE_13C { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_15 : 6; + } bits; +}; + +union REG_ISP_EE_140 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_16 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_17 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_18 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_19 : 6; + } bits; +}; + +union REG_ISP_EE_144 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_20 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_21 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_22 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_23 : 6; + } bits; +}; + +union REG_ISP_EE_148 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_24 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_25 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_26 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_27 : 6; + } bits; +}; + +union REG_ISP_EE_14C { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_28 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_29 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_30 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_31 : 6; + } bits; +}; + +union REG_ISP_EE_150 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_32 : 6; + } bits; +}; + +union REG_ISP_EE_154 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_03 : 6; + } bits; +}; + +union REG_ISP_EE_158 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_07 : 6; + } bits; +}; + +union REG_ISP_EE_15C { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_11 : 6; + } bits; +}; + +union REG_ISP_EE_160 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_15 : 6; + } bits; +}; + +union REG_ISP_EE_164 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_16 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_17 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_18 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_19 : 6; + } bits; +}; + +union REG_ISP_EE_168 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_20 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_21 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_22 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_23 : 6; + } bits; +}; + +union REG_ISP_EE_16C { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_24 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_25 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_26 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_27 : 6; + } bits; +}; + +union REG_ISP_EE_170 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_28 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_29 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_30 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_31 : 6; + } bits; +}; + +union REG_ISP_EE_174 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_32 : 6; + } bits; +}; + +union REG_ISP_EE_178 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_03 : 6; + } bits; +}; + +union REG_ISP_EE_17C { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_07 : 6; + } bits; +}; + +union REG_ISP_EE_180 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_11 : 6; + } bits; +}; + +union REG_ISP_EE_184 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_15 : 6; + } bits; +}; + +union REG_ISP_EE_188 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_16 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_17 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_18 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_19 : 6; + } bits; +}; + +union REG_ISP_EE_18C { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_20 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_21 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_22 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_23 : 6; + } bits; +}; + +union REG_ISP_EE_190 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_24 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_25 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_26 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_27 : 6; + } bits; +}; + +union REG_ISP_EE_194 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_28 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_29 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_30 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_31 : 6; + } bits; +}; + +union REG_ISP_EE_198 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_32 : 6; + } bits; +}; + +union REG_ISP_EE_19C { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_IN_0 : 8; + uint32_t EE_CHROMA_AMP_LUT_IN_1 : 8; + uint32_t EE_CHROMA_AMP_LUT_IN_2 : 8; + uint32_t EE_CHROMA_AMP_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_EE_1A0 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_OUT_0 : 8; + uint32_t EE_CHROMA_AMP_LUT_OUT_1 : 8; + uint32_t EE_CHROMA_AMP_LUT_OUT_2 : 8; + uint32_t EE_CHROMA_AMP_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_EE_1A4 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_CHROMA_AMP_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_EE_1A8 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_EE_1C4 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 16; + uint32_t EE_SHTCTRL_OSHTGAIN : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_SHTCTRL_USHTGAIN : 6; + } bits; +}; + +union REG_ISP_EE_1C8 { + uint32_t raw; + struct { + uint32_t EE_TOTAL_OSHTTHRD_CLP : 8; + uint32_t EE_TOTAL_USHTTHRD_CLP : 8; + } bits; +}; + +union REG_ISP_EE_1CC { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_IN_0 : 8; + uint32_t EE_MOTION_LUT_IN_1 : 8; + uint32_t EE_MOTION_LUT_IN_2 : 8; + uint32_t EE_MOTION_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_EE_1D0 { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_OUT_0 : 8; + uint32_t EE_MOTION_LUT_OUT_1 : 8; + uint32_t EE_MOTION_LUT_OUT_2 : 8; + uint32_t EE_MOTION_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_EE_1D4 { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_MOTION_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_EE_1D8 { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_EE_1DC { + uint32_t raw; + struct { + uint32_t HF_COEF_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t HF_COEF_1 : 9; + } bits; +}; + +union REG_ISP_EE_1E0 { + uint32_t raw; + struct { + uint32_t HF_COEF_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t HF_COEF_3 : 9; + } bits; +}; + +union REG_ISP_EE_1E4 { + uint32_t raw; + struct { + uint32_t HF_COEF_4 : 9; + uint32_t _rsv_9 : 7; + uint32_t HF_COEF_5 : 9; + } bits; +}; + +union REG_ISP_EE_1E8 { + uint32_t raw; + struct { + uint32_t MF_COEF_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_1 : 9; + } bits; +}; + +union REG_ISP_EE_1EC { + uint32_t raw; + struct { + uint32_t MF_COEF_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_3 : 9; + } bits; +}; + +union REG_ISP_EE_1F0 { + uint32_t raw; + struct { + uint32_t MF_COEF_4 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_5 : 9; + } bits; +}; + +union REG_ISP_EE_1F4 { + uint32_t raw; + struct { + uint32_t MF_COEF_6 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_7 : 9; + } bits; +}; + +union REG_ISP_EE_1F8 { + uint32_t raw; + struct { + uint32_t MF_COEF_8 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_9 : 9; + } bits; +}; + +union REG_ISP_EE_1FC { + uint32_t raw; + struct { + uint32_t EE_SOFT_CLAMP_ENABLE : 1; + uint32_t EE_CBCR_SWITCH : 1; + uint32_t _rsv_2 : 6; + uint32_t EE_UPPER_BOUND_LEFT_DIFF : 8; + uint32_t EE_LOWER_BOUND_RIGHT_DIFF : 8; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_YGAMMA_GAMMA_CTRL { + uint32_t raw; + struct { + uint32_t YGAMMA_ENABLE : 1; + uint32_t GAMMA_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_YGAMMA_GAMMA_PROG_CTRL { + uint32_t raw; + struct { + uint32_t GAMMA_WSEL : 1; + uint32_t _rsv_1 : 3; + uint32_t GAMMA_RSEL : 1; + uint32_t _rsv_5 : 3; + uint32_t GAMMA_PROG_EN : 1; + uint32_t _rsv_9 : 3; + uint32_t GAMMA_PROG_1TO3_EN : 1; + uint32_t _rsv_13 : 3; + uint32_t GAMMA_PROG_MODE : 2; + uint32_t _rsv_18 : 6; + uint32_t GAMMA_W : 1; + } bits; +}; + +union REG_YGAMMA_GAMMA_PROG_ST_ADDR { + uint32_t raw; + struct { + uint32_t GAMMA_ST_ADDR : 8; + uint32_t _rsv_8 : 23; + uint32_t GAMMA_ST_W : 1; + } bits; +}; + +union REG_YGAMMA_GAMMA_PROG_DATA { + uint32_t raw; + struct { + uint32_t GAMMA_DATA_E : 16; + uint32_t GAMMA_DATA_O : 16; + } bits; +}; + +union REG_YGAMMA_GAMMA_PROG_MAX { + uint32_t raw; + struct { + uint32_t YGAMMA_MAX : 17; + } bits; +}; + +union REG_YGAMMA_GAMMA_MEM_SW_RADDR { + uint32_t raw; + struct { + uint32_t GAMMA_SW_RADDR : 8; + uint32_t _rsv_8 : 4; + uint32_t GAMMA_SW_R_MEM_SEL : 1; + } bits; +}; + +union REG_YGAMMA_GAMMA_MEM_SW_RDATA { + uint32_t raw; + struct { + uint32_t GAMMA_RDATA_R : 16; + uint32_t _rsv_16 : 15; + uint32_t GAMMA_SW_R : 1; + } bits; +}; + +union REG_YGAMMA_GAMMA_MEM_SW_RDATA_BG { + uint32_t raw; + struct { + uint32_t GAMMA_RDATA_G : 12; + uint32_t _rsv_12 : 4; + uint32_t GAMMA_RDATA_B : 12; + } bits; +}; + +union REG_YGAMMA_GAMMA_DBG { + uint32_t raw; + struct { + uint32_t PROG_HDK_DIS : 1; + uint32_t SOFTRST : 1; + } bits; +}; + +union REG_YGAMMA_GAMMA_DMY0 { + uint32_t raw; + struct { + uint32_t DMY_DEF0 : 32; + } bits; +}; + +union REG_YGAMMA_GAMMA_DMY1 { + uint32_t raw; + struct { + uint32_t DMY_DEF1 : 32; + } bits; +}; + +union REG_YGAMMA_GAMMA_DMY_R { + uint32_t raw; + struct { + uint32_t DMY_RO : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_PREYEE_00 { + uint32_t raw; + struct { + uint32_t EE_ENABLE : 1; + uint32_t EE_SHADOW_SEL : 1; + uint32_t _rsv_2 : 2; + uint32_t EE_DEBUG_MODE : 4; + uint32_t EE_TOTAL_CORING : 8; + uint32_t EE_TOTAL_MOTION_CORING : 8; + uint32_t EE_TOTAL_GAIN : 8; + } bits; +}; + +union REG_ISP_PREYEE_04 { + uint32_t raw; + struct { + uint32_t EE_TOTAL_OSHTTHRD : 8; + uint32_t EE_TOTAL_USHTTHRD : 8; + uint32_t EE_DEBUG_SHIFT_BIT : 3; + uint32_t _rsv_19 : 12; + uint32_t EE_PRE_PROC_ENABLE : 1; + } bits; +}; + +union REG_ISP_PREYEE_0C { + uint32_t raw; + struct { + uint32_t EE_LUMAREF_LPF_EN : 1; + uint32_t EE_LUMA_CORING_EN : 1; + uint32_t _rsv_2 : 4; + uint32_t EE_LUMA_ADPTCTRL_EN : 1; + uint32_t EE_DELTA_ADPTCTRL_EN : 1; + uint32_t EE_DELTA_ADPTCTRL_SHIFT : 2; + uint32_t EE_CHROMAREF_LPF_EN : 1; + uint32_t EE_CHROMA_ADPTCTRL_EN : 1; + uint32_t _rsv_12 : 4; + uint32_t EE_MF_CORE_GAIN : 8; + } bits; +}; + +union REG_ISP_PREYEE_10 { + uint32_t raw; + struct { + uint32_t HF_BLEND_WGT : 8; + uint32_t MF_BLEND_WGT : 8; + } bits; +}; + +union REG_ISP_PREYEE_A4 { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_IN_0 : 8; + uint32_t EE_LUMA_CORING_LUT_IN_1 : 8; + uint32_t EE_LUMA_CORING_LUT_IN_2 : 8; + uint32_t EE_LUMA_CORING_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_A8 { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_OUT_0 : 8; + uint32_t EE_LUMA_CORING_LUT_OUT_1 : 8; + uint32_t EE_LUMA_CORING_LUT_OUT_2 : 8; + uint32_t EE_LUMA_CORING_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_AC { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_LUMA_CORING_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_PREYEE_B0 { + uint32_t raw; + struct { + uint32_t EE_LUMA_CORING_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_PREYEE_B4 { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_IN_0 : 8; + uint32_t EE_MOTION_CORING_LUT_IN_1 : 8; + uint32_t EE_MOTION_CORING_LUT_IN_2 : 8; + uint32_t EE_MOTION_CORING_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_B8 { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_OUT_0 : 8; + uint32_t EE_MOTION_CORING_LUT_OUT_1 : 8; + uint32_t EE_MOTION_CORING_LUT_OUT_2 : 8; + uint32_t EE_MOTION_CORING_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_BC { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_MOTION_CORING_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_PREYEE_C0 { + uint32_t raw; + struct { + uint32_t EE_MOTION_CORING_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_PREYEE_C4 { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_IN_0 : 8; + uint32_t EE_MCORE_GAIN_LUT_IN_1 : 8; + uint32_t EE_MCORE_GAIN_LUT_IN_2 : 8; + uint32_t EE_MCORE_GAIN_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_C8 { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_OUT_0 : 8; + uint32_t EE_MCORE_GAIN_LUT_OUT_1 : 8; + uint32_t EE_MCORE_GAIN_LUT_OUT_2 : 8; + uint32_t EE_MCORE_GAIN_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_HCC { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_MCORE_GAIN_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_PREYEE_HD0 { + uint32_t raw; + struct { + uint32_t EE_MCORE_GAIN_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_PREYEE_130 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_03 : 6; + } bits; +}; + +union REG_ISP_PREYEE_134 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_07 : 6; + } bits; +}; + +union REG_ISP_PREYEE_138 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_11 : 6; + } bits; +}; + +union REG_ISP_PREYEE_13C { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_15 : 6; + } bits; +}; + +union REG_ISP_PREYEE_140 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_16 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_17 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_18 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_19 : 6; + } bits; +}; + +union REG_ISP_PREYEE_144 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_20 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_21 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_22 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_23 : 6; + } bits; +}; + +union REG_ISP_PREYEE_148 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_24 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_25 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_26 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_27 : 6; + } bits; +}; + +union REG_ISP_PREYEE_14C { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_28 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_29 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_30 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_LUMA_ADPTCTRL_LUT_31 : 6; + } bits; +}; + +union REG_ISP_PREYEE_150 { + uint32_t raw; + struct { + uint32_t EE_LUMA_ADPTCTRL_LUT_32 : 6; + } bits; +}; + +union REG_ISP_PREYEE_154 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_03 : 6; + } bits; +}; + +union REG_ISP_PREYEE_158 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_07 : 6; + } bits; +}; + +union REG_ISP_PREYEE_15C { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_11 : 6; + } bits; +}; + +union REG_ISP_PREYEE_160 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_15 : 6; + } bits; +}; + +union REG_ISP_PREYEE_164 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_16 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_17 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_18 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_19 : 6; + } bits; +}; + +union REG_ISP_PREYEE_168 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_20 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_21 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_22 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_23 : 6; + } bits; +}; + +union REG_ISP_PREYEE_16C { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_24 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_25 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_26 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_27 : 6; + } bits; +}; + +union REG_ISP_PREYEE_170 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_28 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_29 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_30 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_DELTA_ADPTCTRL_LUT_31 : 6; + } bits; +}; + +union REG_ISP_PREYEE_174 { + uint32_t raw; + struct { + uint32_t EE_DELTA_ADPTCTRL_LUT_32 : 6; + } bits; +}; + +union REG_ISP_PREYEE_178 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_00 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_01 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_02 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_03 : 6; + } bits; +}; + +union REG_ISP_PREYEE_17C { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_04 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_05 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_06 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_07 : 6; + } bits; +}; + +union REG_ISP_PREYEE_180 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_08 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_09 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_10 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_11 : 6; + } bits; +}; + +union REG_ISP_PREYEE_184 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_12 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_13 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_14 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_15 : 6; + } bits; +}; + +union REG_ISP_PREYEE_188 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_16 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_17 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_18 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_19 : 6; + } bits; +}; + +union REG_ISP_PREYEE_18C { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_20 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_21 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_22 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_23 : 6; + } bits; +}; + +union REG_ISP_PREYEE_190 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_24 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_25 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_26 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_27 : 6; + } bits; +}; + +union REG_ISP_PREYEE_194 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_28 : 6; + uint32_t _rsv_6 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_29 : 6; + uint32_t _rsv_14 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_30 : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_CHROMA_ADPTCTRL_LUT_31 : 6; + } bits; +}; + +union REG_ISP_PREYEE_198 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_ADPTCTRL_LUT_32 : 6; + } bits; +}; + +union REG_ISP_PREYEE_19C { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_IN_0 : 8; + uint32_t EE_CHROMA_AMP_LUT_IN_1 : 8; + uint32_t EE_CHROMA_AMP_LUT_IN_2 : 8; + uint32_t EE_CHROMA_AMP_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_1A0 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_OUT_0 : 8; + uint32_t EE_CHROMA_AMP_LUT_OUT_1 : 8; + uint32_t EE_CHROMA_AMP_LUT_OUT_2 : 8; + uint32_t EE_CHROMA_AMP_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_1A4 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_CHROMA_AMP_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_PREYEE_1A8 { + uint32_t raw; + struct { + uint32_t EE_CHROMA_AMP_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_PREYEE_1C4 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 16; + uint32_t EE_SHTCTRL_OSHTGAIN : 6; + uint32_t _rsv_22 : 2; + uint32_t EE_SHTCTRL_USHTGAIN : 6; + } bits; +}; + +union REG_ISP_PREYEE_1C8 { + uint32_t raw; + struct { + uint32_t EE_TOTAL_OSHTTHRD_CLP : 8; + uint32_t EE_TOTAL_USHTTHRD_CLP : 8; + } bits; +}; + +union REG_ISP_PREYEE_1CC { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_IN_0 : 8; + uint32_t EE_MOTION_LUT_IN_1 : 8; + uint32_t EE_MOTION_LUT_IN_2 : 8; + uint32_t EE_MOTION_LUT_IN_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_1D0 { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_OUT_0 : 8; + uint32_t EE_MOTION_LUT_OUT_1 : 8; + uint32_t EE_MOTION_LUT_OUT_2 : 8; + uint32_t EE_MOTION_LUT_OUT_3 : 8; + } bits; +}; + +union REG_ISP_PREYEE_1D4 { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_SLOPE_0 : 12; + uint32_t _rsv_12 : 4; + uint32_t EE_MOTION_LUT_SLOPE_1 : 12; + } bits; +}; + +union REG_ISP_PREYEE_1D8 { + uint32_t raw; + struct { + uint32_t EE_MOTION_LUT_SLOPE_2 : 12; + } bits; +}; + +union REG_ISP_PREYEE_1DC { + uint32_t raw; + struct { + uint32_t HF_COEF_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t HF_COEF_1 : 9; + } bits; +}; + +union REG_ISP_PREYEE_1E0 { + uint32_t raw; + struct { + uint32_t HF_COEF_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t HF_COEF_3 : 9; + } bits; +}; + +union REG_ISP_PREYEE_1E4 { + uint32_t raw; + struct { + uint32_t HF_COEF_4 : 9; + uint32_t _rsv_9 : 7; + uint32_t HF_COEF_5 : 9; + } bits; +}; + +union REG_ISP_PREYEE_1E8 { + uint32_t raw; + struct { + uint32_t MF_COEF_0 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_1 : 9; + } bits; +}; + +union REG_ISP_PREYEE_1EC { + uint32_t raw; + struct { + uint32_t MF_COEF_2 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_3 : 9; + } bits; +}; + +union REG_ISP_PREYEE_1F0 { + uint32_t raw; + struct { + uint32_t MF_COEF_4 : 9; + uint32_t _rsv_9 : 7; + uint32_t MF_COEF_5 : 9; + } bits; +}; + +union REG_ISP_PREYEE_1FC { + uint32_t raw; + struct { + uint32_t EE_SOFT_CLAMP_ENABLE : 1; + uint32_t EE_CBCR_SWITCH : 1; + uint32_t _rsv_2 : 6; + uint32_t EE_UPPER_BOUND_LEFT_DIFF : 8; + uint32_t EE_LOWER_BOUND_RIGHT_DIFF : 8; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CSI_BDG_TOP_CTRL { + uint32_t raw; + struct { + uint32_t CSI_MODE : 2; + uint32_t CSI_IN_FORMAT : 1; + uint32_t CSI_IN_YUV_FORMAT : 1; + uint32_t CH_NUM : 2; + uint32_t CH0_DMA_WR_ENABLE : 1; + uint32_t CH1_DMA_WR_ENABLE : 1; + uint32_t CH2_DMA_WR_ENABLE : 1; + uint32_t Y_ONLY : 1; + uint32_t PXL_DATA_SEL : 1; + uint32_t VS_POL : 1; + uint32_t HS_POL : 1; + uint32_t RESET_MODE : 1; + uint32_t VS_MODE : 1; + uint32_t ABORT_MODE : 1; + uint32_t RESET : 1; + uint32_t ABORT : 1; + uint32_t CH3_DMA_WR_ENABLE : 1; + uint32_t CH3_DMA_420_WR_ENABLE : 1; + uint32_t YUV_PACK_MODE : 1; + uint32_t MULTI_CH_FRAME_SYNC_EN : 1; + uint32_t CH0_DMA_420_WR_ENABLE : 1; + uint32_t CH1_DMA_420_WR_ENABLE : 1; + uint32_t CSI_ENABLE : 1; + uint32_t TGEN_ENABLE : 1; + uint32_t YUV2BAY_ENABLE : 1; + uint32_t CH2_DMA_420_WR_ENABLE : 1; + uint32_t SHDW_READ_SEL : 1; + uint32_t _rsv_29 : 2; + uint32_t CSI_UP_REG : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_INTERRUPT_CTRL { + uint32_t raw; + struct { + uint32_t CH0_VS_INT_EN : 1; + uint32_t CH0_TRIG_INT_EN : 1; + uint32_t CH0_DROP_INT_EN : 1; + uint32_t CH0_SIZE_ERROR_INT_EN : 1; + uint32_t CH1_VS_INT_EN : 1; + uint32_t CH1_TRIG_INT_EN : 1; + uint32_t CH1_DROP_INT_EN : 1; + uint32_t CH1_SIZE_ERROR_INT_EN : 1; + uint32_t CH2_VS_INT_EN : 1; + uint32_t CH2_TRIG_INT_EN : 1; + uint32_t CH2_DROP_INT_EN : 1; + uint32_t CH2_SIZE_ERROR_INT_EN : 1; + uint32_t CH3_VS_INT_EN : 1; + uint32_t CH3_TRIG_INT_EN : 1; + uint32_t CH3_DROP_INT_EN : 1; + uint32_t CH3_SIZE_ERROR_INT_EN : 1; + uint32_t _rsv_16 : 12; + uint32_t SLICE_LINE_INTP_EN : 1; + uint32_t DMA_ERROR_INTP_EN : 1; + uint32_t LINE_INTP_EN : 1; + uint32_t FIFO_OVERFLOW_INT_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DMA_DPCM_MODE { + uint32_t raw; + struct { + uint32_t DMA_ST_DPCM_MODE : 3; + uint32_t _rsv_3 : 1; + uint32_t DPCM_MIPI_OPT : 1; + uint32_t _rsv_5 : 3; + uint32_t DROP_MODE : 4; + uint32_t AVG_MODE : 4; + uint32_t DPCM_XSTR : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DMA_LD_DPCM_MODE { + uint32_t raw; + struct { + uint32_t DMA_LD_DPCM_MODE : 3; + uint32_t _rsv_3 : 13; + uint32_t DPCM_RX_XSTR : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_SIZE { + uint32_t raw; + struct { + uint32_t CH0_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_SIZE { + uint32_t raw; + struct { + uint32_t CH1_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_SIZE { + uint32_t raw; + struct { + uint32_t CH2_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH2_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_SIZE { + uint32_t raw; + struct { + uint32_t CH3_FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_CROP_EN { + uint32_t raw; + struct { + uint32_t CH0_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH0_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH0_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH0_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_BLC_SUM { + uint32_t raw; + struct { + uint32_t CH0_BLC_SUM : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_CROP_EN { + uint32_t raw; + struct { + uint32_t CH1_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH1_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH1_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_BLC_SUM { + uint32_t raw; + struct { + uint32_t CH1_BLC_SUM : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_CROP_EN { + uint32_t raw; + struct { + uint32_t CH2_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH2_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH2_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH2_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH2_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_BLC_SUM { + uint32_t raw; + struct { + uint32_t CH2_BLC_SUM : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_CROP_EN { + uint32_t raw; + struct { + uint32_t CH3_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_HORZ_CROP { + uint32_t raw; + struct { + uint32_t CH3_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_VERT_CROP { + uint32_t raw; + struct { + uint32_t CH3_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_BLC_SUM { + uint32_t raw; + struct { + uint32_t CH3_BLC_SUM : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_PAT_GEN_CTRL { + uint32_t raw; + struct { + uint32_t PAT_EN : 1; + uint32_t GRA_INV : 1; + uint32_t AUTO_EN : 1; + uint32_t DITH_EN : 1; + uint32_t SNOW_EN : 1; + uint32_t FIX_MC : 1; + uint32_t _rsv_6 : 2; + uint32_t DITH_MD : 3; + uint32_t _rsv_11 : 1; + uint32_t BAYER_ID : 2; + } bits; +}; + +union REG_ISP_CSI_BDG_PAT_IDX_CTRL { + uint32_t raw; + struct { + uint32_t PAT_PRD : 8; + uint32_t PAT_IDX : 5; + } bits; +}; + +union REG_ISP_CSI_BDG_PAT_COLOR_0 { + uint32_t raw; + struct { + uint32_t PAT_R : 12; + uint32_t _rsv_12 : 4; + uint32_t PAT_G : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_PAT_COLOR_1 { + uint32_t raw; + struct { + uint32_t PAT_B : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_BACKGROUND_COLOR_0 { + uint32_t raw; + struct { + uint32_t FDE_R : 12; + uint32_t _rsv_12 : 4; + uint32_t FDE_G : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_BACKGROUND_COLOR_1 { + uint32_t raw; + struct { + uint32_t FDE_B : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_FIX_COLOR_0 { + uint32_t raw; + struct { + uint32_t MDE_R : 12; + uint32_t _rsv_12 : 4; + uint32_t MDE_G : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_FIX_COLOR_1 { + uint32_t raw; + struct { + uint32_t MDE_B : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_MDE_V_SIZE { + uint32_t raw; + struct { + uint32_t VMDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t VMDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_MDE_H_SIZE { + uint32_t raw; + struct { + uint32_t HMDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t HMDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_FDE_V_SIZE { + uint32_t raw; + struct { + uint32_t VFDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t VFDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_FDE_H_SIZE { + uint32_t raw; + struct { + uint32_t HFDE_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t HFDE_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_HSYNC_CTRL { + uint32_t raw; + struct { + uint32_t HS_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t HS_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_VSYNC_CTRL { + uint32_t raw; + struct { + uint32_t VS_STR : 13; + uint32_t _rsv_13 : 3; + uint32_t VS_STP : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_TGEN_TT_SIZE { + uint32_t raw; + struct { + uint32_t HTT : 13; + uint32_t _rsv_13 : 3; + uint32_t VTT : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_LINE_INTP_HEIGHT_0 { + uint32_t raw; + struct { + uint32_t CH0_LINE_INTP_HEIGHTM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_LINE_INTP_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH0_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH0_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH0_VS_CNT : 16; + uint32_t CH0_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH0_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH0_TOT_BLK_IDLE : 1; + uint32_t CH0_TOT_DMA_IDLE : 1; + uint32_t CH0_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH1_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH1_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH1_VS_CNT : 16; + uint32_t CH1_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH1_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH1_TOT_BLK_IDLE : 1; + uint32_t CH1_TOT_DMA_IDLE : 1; + uint32_t CH1_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH2_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH2_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH2_VS_CNT : 16; + uint32_t CH2_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH2_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH2_TOT_BLK_IDLE : 1; + uint32_t CH2_TOT_DMA_IDLE : 1; + uint32_t CH2_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_DEBUG_0 { + uint32_t raw; + struct { + uint32_t CH3_PXL_CNT : 32; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_DEBUG_1 { + uint32_t raw; + struct { + uint32_t CH3_LINE_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_DEBUG_2 { + uint32_t raw; + struct { + uint32_t CH3_VS_CNT : 16; + uint32_t CH3_TRIG_CNT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_CH3_DEBUG_3 { + uint32_t raw; + struct { + uint32_t CH3_TOT_BLK_IDLE : 1; + uint32_t CH3_TOT_DMA_IDLE : 1; + uint32_t CH3_BDG_DMA_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_INTERRUPT_STATUS_0 { + uint32_t raw; + struct { + uint32_t CH0_FRAME_DROP_INT : 1; + uint32_t CH0_VS_INT : 1; + uint32_t CH0_TRIG_INT : 1; + uint32_t _rsv_3 : 1; + uint32_t CH0_FRAME_WIDTH_GT_INT : 1; + uint32_t CH0_FRAME_WIDTH_LS_INT : 1; + uint32_t CH0_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH0_FRAME_HEIGHT_LS_INT : 1; + uint32_t CH1_FRAME_DROP_INT : 1; + uint32_t CH1_VS_INT : 1; + uint32_t CH1_TRIG_INT : 1; + uint32_t _rsv_11 : 1; + uint32_t CH1_FRAME_WIDTH_GT_INT : 1; + uint32_t CH1_FRAME_WIDTH_LS_INT : 1; + uint32_t CH1_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH1_FRAME_HEIGHT_LS_INT : 1; + uint32_t CH2_FRAME_DROP_INT : 1; + uint32_t CH2_VS_INT : 1; + uint32_t CH2_TRIG_INT : 1; + uint32_t _rsv_19 : 1; + uint32_t CH2_FRAME_WIDTH_GT_INT : 1; + uint32_t CH2_FRAME_WIDTH_LS_INT : 1; + uint32_t CH2_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH2_FRAME_HEIGHT_LS_INT : 1; + uint32_t CH3_FRAME_DROP_INT : 1; + uint32_t CH3_VS_INT : 1; + uint32_t CH3_TRIG_INT : 1; + uint32_t _rsv_27 : 1; + uint32_t CH3_FRAME_WIDTH_GT_INT : 1; + uint32_t CH3_FRAME_WIDTH_LS_INT : 1; + uint32_t CH3_FRAME_HEIGHT_GT_INT : 1; + uint32_t CH3_FRAME_HEIGHT_LS_INT : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_INTERRUPT_STATUS_1 { + uint32_t raw; + struct { + uint32_t FIFO_OVERFLOW_INT : 1; + uint32_t FRAME_RESOLUTION_OVER_MAX_INT : 1; + uint32_t _rsv_2 : 2; + uint32_t DMA_ERROR_INT : 1; + uint32_t _rsv_5 : 3; + uint32_t CH0_LINE_INTP_INT : 1; + uint32_t CH1_LINE_INTP_INT : 1; + uint32_t CH2_LINE_INTP_INT : 1; + uint32_t CH3_LINE_INTP_INT : 1; + uint32_t CH0_SLICE_LINE_INTP_INT : 1; + uint32_t CH1_SLICE_LINE_INTP_INT : 1; + uint32_t CH2_SLICE_LINE_INTP_INT : 1; + uint32_t CH3_SLICE_LINE_INTP_INT : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_DEBUG { + uint32_t raw; + struct { + uint32_t RING_BUFF_IDLE : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_OUT_VSYNC_LINE_DELAY { + uint32_t raw; + struct { + uint32_t OUT_VSYNC_LINE_DELAY : 12; + } bits; +}; + +union REG_ISP_CSI_BDG_WR_URGENT_CTRL { + uint32_t raw; + struct { + uint32_t WR_NEAR_OVERFLOW_THRESHOLD : 13; + uint32_t _rsv_13 : 3; + uint32_t WR_SAFE_THRESHOLD : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_RD_URGENT_CTRL { + uint32_t raw; + struct { + uint32_t RD_NEAR_OVERFLOW_THRESHOLD : 13; + uint32_t _rsv_13 : 3; + uint32_t RD_SAFE_THRESHOLD : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_DUMMY { + uint32_t raw; + struct { + uint32_t DUMMY_IN : 16; + uint32_t DUMMY_OUT : 16; + } bits; +}; + +union REG_ISP_CSI_BDG_LINE_INTP_HEIGHT_1 { + uint32_t raw; + struct { + uint32_t CH2_LINE_INTP_HEIGHTM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_LINE_INTP_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_SLICE_LINE_INTP_HEIGHT_0 { + uint32_t raw; + struct { + uint32_t CH0_SLICE_LINE_INTP_HEIGHTM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH1_SLICE_LINE_INTP_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_SLICE_LINE_INTP_HEIGHT_1 { + uint32_t raw; + struct { + uint32_t CH2_SLICE_LINE_INTP_HEIGHTM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CH3_SLICE_LINE_INTP_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH0_CROP_EN { + uint32_t raw; + struct { + uint32_t ST_CH0_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH0_HORZ_CROP { + uint32_t raw; + struct { + uint32_t ST_CH0_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH0_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH0_VERT_CROP { + uint32_t raw; + struct { + uint32_t ST_CH0_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH0_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH1_CROP_EN { + uint32_t raw; + struct { + uint32_t ST_CH1_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH1_HORZ_CROP { + uint32_t raw; + struct { + uint32_t ST_CH1_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH1_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH1_VERT_CROP { + uint32_t raw; + struct { + uint32_t ST_CH1_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH1_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH2_CROP_EN { + uint32_t raw; + struct { + uint32_t ST_CH2_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH2_HORZ_CROP { + uint32_t raw; + struct { + uint32_t ST_CH2_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH2_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH2_VERT_CROP { + uint32_t raw; + struct { + uint32_t ST_CH2_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH2_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH3_CROP_EN { + uint32_t raw; + struct { + uint32_t ST_CH3_CROP_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH3_HORZ_CROP { + uint32_t raw; + struct { + uint32_t ST_CH3_HORZ_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH3_HORZ_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_WDMA_CH3_VERT_CROP { + uint32_t raw; + struct { + uint32_t ST_CH3_VERT_CROP_START : 13; + uint32_t _rsv_13 : 3; + uint32_t ST_CH3_VERT_CROP_END : 13; + } bits; +}; + +union REG_ISP_CSI_BDG_TRIG_DLY_CONTROL_0 { + uint32_t raw; + struct { + uint32_t TRIG_DLY_EN : 1; + } bits; +}; + +union REG_ISP_CSI_BDG_TRIG_DLY_CONTROL_1 { + uint32_t raw; + struct { + uint32_t TRIG_DLY_VALUE : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_LCAC_REG00 { + uint32_t raw; + struct { + uint32_t LCAC_ENABLE : 1; + uint32_t LCAC_SHDW_SEL : 1; + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t LCAC_OUT_SEL : 3; + } bits; +}; + +union REG_ISP_LCAC_REG04 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_STR_R1 : 12; + uint32_t _rsv_12 : 4; + uint32_t LCAC_LTI_STR_B1 : 12; + } bits; +}; + +union REG_ISP_LCAC_REG08 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_STR_R2_LE : 7; + uint32_t _rsv_7 : 1; + uint32_t LCAC_LTI_STR_B2_LE : 7; + uint32_t _rsv_15 : 1; + uint32_t LCAC_LTI_WGT_R_LE : 7; + uint32_t _rsv_23 : 1; + uint32_t LCAC_LTI_WGT_B_LE : 7; + } bits; +}; + +union REG_ISP_LCAC_REG0C { + uint32_t raw; + struct { + uint32_t LCAC_LTI_STR_R2_SE : 7; + uint32_t _rsv_7 : 1; + uint32_t LCAC_LTI_STR_B2_SE : 7; + uint32_t _rsv_15 : 1; + uint32_t LCAC_LTI_WGT_R_SE : 7; + uint32_t _rsv_23 : 1; + uint32_t LCAC_LTI_WGT_B_SE : 7; + } bits; +}; + +union REG_ISP_LCAC_REG10 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_KERNEL_R0 : 10; + uint32_t _rsv_10 : 6; + uint32_t LCAC_LTI_KERNEL_R1 : 10; + } bits; +}; + +union REG_ISP_LCAC_REG14 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_KERNEL_R2 : 10; + uint32_t _rsv_10 : 6; + uint32_t LCAC_LTI_KERNEL_B0 : 10; + } bits; +}; + +union REG_ISP_LCAC_REG18 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_KERNEL_B1 : 10; + uint32_t _rsv_10 : 6; + uint32_t LCAC_LTI_KERNEL_B2 : 10; + } bits; +}; + +union REG_ISP_LCAC_REG1C { + uint32_t raw; + struct { + uint32_t LCAC_LTI_EDGE_SCALE_R_LE : 6; + uint32_t _rsv_6 : 2; + uint32_t LCAC_LTI_EDGE_SCALE_G_LE : 6; + uint32_t _rsv_14 : 2; + uint32_t LCAC_LTI_EDGE_SCALE_B_LE : 6; + } bits; +}; + +union REG_ISP_LCAC_REG20 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_EDGE_SCALE_R_SE : 6; + uint32_t _rsv_6 : 2; + uint32_t LCAC_LTI_EDGE_SCALE_G_SE : 6; + uint32_t _rsv_14 : 2; + uint32_t LCAC_LTI_EDGE_SCALE_B_SE : 6; + } bits; +}; + +union REG_ISP_LCAC_REG24 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_EDGE_CORING_R : 8; + uint32_t LCAC_LTI_EDGE_CORING_G : 8; + uint32_t LCAC_LTI_EDGE_CORING_B : 8; + } bits; +}; + +union REG_ISP_LCAC_REG28 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_WGT_MAX_R : 8; + uint32_t LCAC_LTI_WGT_MIN_R : 8; + uint32_t LCAC_LTI_WGT_MAX_B : 8; + uint32_t LCAC_LTI_WGT_MIN_B : 8; + } bits; +}; + +union REG_ISP_LCAC_REG2C { + uint32_t raw; + struct { + uint32_t LCAC_LTI_VAR_WGT_R : 5; + uint32_t _rsv_5 : 3; + uint32_t LCAC_LTI_VAR_WGT_B : 5; + uint32_t _rsv_13 : 3; + uint32_t LCAC_FILTER_SCALE : 4; + uint32_t _rsv_20 : 4; + uint32_t LCAC_FCF_LUMA_BLEND_WGT : 7; + } bits; +}; + +union REG_ISP_LCAC_REG30 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_EDGE_SCALE_R_LE : 6; + uint32_t _rsv_6 : 2; + uint32_t LCAC_FCF_EDGE_SCALE_G_LE : 6; + uint32_t _rsv_14 : 2; + uint32_t LCAC_FCF_EDGE_SCALE_B_LE : 6; + uint32_t _rsv_22 : 2; + uint32_t LCAC_FCF_EDGE_SCALE_Y_LE : 6; + } bits; +}; + +union REG_ISP_LCAC_REG34 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_EDGE_SCALE_R_SE : 6; + uint32_t _rsv_6 : 2; + uint32_t LCAC_FCF_EDGE_SCALE_G_SE : 6; + uint32_t _rsv_14 : 2; + uint32_t LCAC_FCF_EDGE_SCALE_B_SE : 6; + uint32_t _rsv_22 : 2; + uint32_t LCAC_FCF_EDGE_SCALE_Y_SE : 6; + } bits; +}; + +union REG_ISP_LCAC_REG38 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_EDGE_CORING_R : 8; + uint32_t LCAC_FCF_EDGE_CORING_G : 8; + uint32_t LCAC_FCF_EDGE_CORING_B : 8; + uint32_t LCAC_FCF_EDGE_CORING_Y : 8; + } bits; +}; + +union REG_ISP_LCAC_REG3C { + uint32_t raw; + struct { + uint32_t LCAC_FCF_WGT_MAX_R : 8; + uint32_t LCAC_FCF_WGT_MIN_R : 8; + uint32_t LCAC_FCF_WGT_MAX_B : 8; + uint32_t LCAC_FCF_WGT_MIN_B : 8; + } bits; +}; + +union REG_ISP_LCAC_REG40 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_VAR_WGT_R : 5; + uint32_t _rsv_5 : 3; + uint32_t LCAC_FCF_VAR_WGT_G : 5; + uint32_t _rsv_13 : 3; + uint32_t LCAC_FCF_VAR_WGT_B : 5; + } bits; +}; + +union REG_ISP_LCAC_REG44 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_FILTER_KERNEL_00 : 7; + uint32_t _rsv_7 : 1; + uint32_t LCAC_FCF_FILTER_KERNEL_01 : 7; + uint32_t _rsv_15 : 1; + uint32_t LCAC_FCF_FILTER_KERNEL_02 : 7; + uint32_t _rsv_23 : 1; + uint32_t LCAC_FCF_FILTER_KERNEL_03 : 7; + } bits; +}; + +union REG_ISP_LCAC_REG48 { + uint32_t raw; + struct { + uint32_t LCAC_LUMA_KERNEL_00 : 7; + uint32_t _rsv_7 : 1; + uint32_t LCAC_LUMA_KERNEL_01 : 7; + uint32_t _rsv_15 : 1; + uint32_t LCAC_LUMA_KERNEL_02 : 7; + uint32_t _rsv_23 : 1; + uint32_t LCAC_LUMA_KERNEL_03 : 7; + } bits; +}; + +union REG_ISP_LCAC_REG4C { + uint32_t raw; + struct { + uint32_t LCAC_FCF_FILTER_KERNEL_04 : 7; + uint32_t _rsv_7 : 1; + uint32_t LCAC_LUMA_KERNEL_04 : 7; + } bits; +}; + +union REG_ISP_LCAC_REG50 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_00 : 8; + uint32_t LCAC_LTI_LUMA_LUT_01 : 8; + uint32_t LCAC_LTI_LUMA_LUT_02 : 8; + uint32_t LCAC_LTI_LUMA_LUT_03 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG54 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_04 : 8; + uint32_t LCAC_LTI_LUMA_LUT_05 : 8; + uint32_t LCAC_LTI_LUMA_LUT_06 : 8; + uint32_t LCAC_LTI_LUMA_LUT_07 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG58 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_08 : 8; + uint32_t LCAC_LTI_LUMA_LUT_09 : 8; + uint32_t LCAC_LTI_LUMA_LUT_10 : 8; + uint32_t LCAC_LTI_LUMA_LUT_11 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG5C { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_12 : 8; + uint32_t LCAC_LTI_LUMA_LUT_13 : 8; + uint32_t LCAC_LTI_LUMA_LUT_14 : 8; + uint32_t LCAC_LTI_LUMA_LUT_15 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG60 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_16 : 8; + uint32_t LCAC_LTI_LUMA_LUT_17 : 8; + uint32_t LCAC_LTI_LUMA_LUT_18 : 8; + uint32_t LCAC_LTI_LUMA_LUT_19 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG64 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_20 : 8; + uint32_t LCAC_LTI_LUMA_LUT_21 : 8; + uint32_t LCAC_LTI_LUMA_LUT_22 : 8; + uint32_t LCAC_LTI_LUMA_LUT_23 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG68 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_24 : 8; + uint32_t LCAC_LTI_LUMA_LUT_25 : 8; + uint32_t LCAC_LTI_LUMA_LUT_26 : 8; + uint32_t LCAC_LTI_LUMA_LUT_27 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG6C { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_28 : 8; + uint32_t LCAC_LTI_LUMA_LUT_29 : 8; + uint32_t LCAC_LTI_LUMA_LUT_30 : 8; + uint32_t LCAC_LTI_LUMA_LUT_31 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG70 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_00 : 8; + uint32_t LCAC_FCF_LUMA_LUT_01 : 8; + uint32_t LCAC_FCF_LUMA_LUT_02 : 8; + uint32_t LCAC_FCF_LUMA_LUT_03 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG74 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_04 : 8; + uint32_t LCAC_FCF_LUMA_LUT_05 : 8; + uint32_t LCAC_FCF_LUMA_LUT_06 : 8; + uint32_t LCAC_FCF_LUMA_LUT_07 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG78 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_08 : 8; + uint32_t LCAC_FCF_LUMA_LUT_09 : 8; + uint32_t LCAC_FCF_LUMA_LUT_10 : 8; + uint32_t LCAC_FCF_LUMA_LUT_11 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG7C { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_12 : 8; + uint32_t LCAC_FCF_LUMA_LUT_13 : 8; + uint32_t LCAC_FCF_LUMA_LUT_14 : 8; + uint32_t LCAC_FCF_LUMA_LUT_15 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG80 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_16 : 8; + uint32_t LCAC_FCF_LUMA_LUT_17 : 8; + uint32_t LCAC_FCF_LUMA_LUT_18 : 8; + uint32_t LCAC_FCF_LUMA_LUT_19 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG84 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_20 : 8; + uint32_t LCAC_FCF_LUMA_LUT_21 : 8; + uint32_t LCAC_FCF_LUMA_LUT_22 : 8; + uint32_t LCAC_FCF_LUMA_LUT_23 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG88 { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_24 : 8; + uint32_t LCAC_FCF_LUMA_LUT_25 : 8; + uint32_t LCAC_FCF_LUMA_LUT_26 : 8; + uint32_t LCAC_FCF_LUMA_LUT_27 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG8C { + uint32_t raw; + struct { + uint32_t LCAC_FCF_LUMA_LUT_28 : 8; + uint32_t LCAC_FCF_LUMA_LUT_29 : 8; + uint32_t LCAC_FCF_LUMA_LUT_30 : 8; + uint32_t LCAC_FCF_LUMA_LUT_31 : 8; + } bits; +}; + +union REG_ISP_LCAC_REG90 { + uint32_t raw; + struct { + uint32_t LCAC_LTI_LUMA_LUT_32 : 8; + uint32_t _rsv_8 : 8; + uint32_t LCAC_FCF_LUMA_LUT_32 : 8; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_CFA_00 { + uint32_t raw; + struct { + uint32_t CFA_SHDW_SEL : 1; + uint32_t CFA_ENABLE : 1; + uint32_t _rsv_2 : 1; + uint32_t CFA_YMOIRE_ENABLE : 1; + uint32_t DELAY : 1; + uint32_t FORCE_CLK_ENABLE : 1; + uint32_t CFA_FORCE_DIR_ENABLE : 1; + uint32_t _rsv_7 : 1; + uint32_t CFA_FORCE_DIR_SEL : 2; + } bits; +}; + +union REG_ISP_CFA_04 { + uint32_t raw; + struct { + uint32_t CFA_OUT_SEL : 1; + uint32_t CONT_EN : 1; + uint32_t _rsv_2 : 1; + uint32_t SOFTRST : 1; + uint32_t _rsv_4 : 1; + uint32_t DBG_EN : 1; + uint32_t _rsv_6 : 10; + uint32_t CFA_EDGEE_THD2 : 12; + } bits; +}; + +union REG_ISP_CFA_0C { + uint32_t raw; + struct { + uint32_t CFA_EDGEE_THD : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_SIGE_THD : 12; + } bits; +}; + +union REG_ISP_CFA_10 { + uint32_t raw; + struct { + uint32_t CFA_GSIG_TOL : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_RBSIG_TOL : 12; + } bits; +}; + +union REG_ISP_CFA_14 { + uint32_t raw; + struct { + uint32_t CFA_EDGE_TOL : 12; + } bits; +}; + +union REG_ISP_CFA_18 { + uint32_t raw; + struct { + uint32_t CFA_GHP_THD : 16; + } bits; +}; + +union REG_ISP_CFA_1C { + uint32_t raw; + struct { + uint32_t CFA_RB_VT_ENABLE : 1; + } bits; +}; + +union REG_ISP_CFA_20 { + uint32_t raw; + struct { + uint32_t CFA_RBSIG_LUMA_THD : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_VW_THD : 12; + } bits; +}; + +union REG_ISP_CFA_30 { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT00 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT01 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT02 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT03 : 6; + } bits; +}; + +union REG_ISP_CFA_34 { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT04 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT05 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT06 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT07 : 6; + } bits; +}; + +union REG_ISP_CFA_38 { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT08 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT09 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT10 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT11 : 6; + } bits; +}; + +union REG_ISP_CFA_3C { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT12 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT13 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT14 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT15 : 6; + } bits; +}; + +union REG_ISP_CFA_40 { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT16 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT17 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT18 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT19 : 6; + } bits; +}; + +union REG_ISP_CFA_44 { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT20 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT21 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT22 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT23 : 6; + } bits; +}; + +union REG_ISP_CFA_48 { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT24 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT25 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT26 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT27 : 6; + } bits; +}; + +union REG_ISP_CFA_4C { + uint32_t raw; + struct { + uint32_t CFA_GHP_LUT28 : 6; + uint32_t _rsv_6 : 2; + uint32_t CFA_GHP_LUT29 : 6; + uint32_t _rsv_14 : 2; + uint32_t CFA_GHP_LUT30 : 6; + uint32_t _rsv_22 : 2; + uint32_t CFA_GHP_LUT31 : 6; + } bits; +}; + +union REG_ISP_CFA_70 { + uint32_t raw; + struct { + uint32_t DIR_READCNT_FROM_LINE0 : 5; + } bits; +}; + +union REG_ISP_CFA_74 { + uint32_t raw; + struct { + uint32_t PROB_OUT_SEL : 4; + uint32_t PROB_PERFMT : 1; + uint32_t _rsv_5 : 3; + uint32_t PROB_FMT : 6; + } bits; +}; + +union REG_ISP_CFA_78 { + uint32_t raw; + struct { + uint32_t PROB_LINE : 12; + uint32_t _rsv_12 : 4; + uint32_t PROB_PIX : 12; + } bits; +}; + +union REG_ISP_CFA_7C { + uint32_t raw; + struct { + uint32_t CFA_DBG0 : 32; + } bits; +}; + +union REG_ISP_CFA_80 { + uint32_t raw; + struct { + uint32_t CFA_DBG1 : 32; + } bits; +}; + +union REG_ISP_CFA_90 { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_REF_MAXG_ONLY : 1; + uint32_t _rsv_1 : 7; + uint32_t CFA_YMOIRE_NP : 8; + } bits; +}; + +union REG_ISP_CFA_94 { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_DETAIL_TH : 8; + uint32_t CFA_YMOIRE_DETAIL_LOW : 9; + } bits; +}; + +union REG_ISP_CFA_98 { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_DETAIL_HIGH : 9; + uint32_t _rsv_9 : 7; + uint32_t CFA_YMOIRE_DETAIL_SLOPE : 15; + } bits; +}; + +union REG_ISP_CFA_9C { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_EDGE_TH : 8; + uint32_t CFA_YMOIRE_EDGE_LOW : 9; + } bits; +}; + +union REG_ISP_CFA_A0 { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_EDGE_HIGH : 9; + uint32_t _rsv_9 : 7; + uint32_t CFA_YMOIRE_EDGE_SLOPE : 15; + } bits; +}; + +union REG_ISP_CFA_A4 { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_LUT_TH : 10; + uint32_t _rsv_10 : 6; + uint32_t CFA_YMOIRE_LUT_LOW : 9; + } bits; +}; + +union REG_ISP_CFA_A8 { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_LUT_HIGH : 9; + uint32_t _rsv_9 : 7; + uint32_t CFA_YMOIRE_LUT_SLOPE : 15; + } bits; +}; + +union REG_ISP_CFA_110 { + uint32_t raw; + struct { + uint32_t CFA_YMOIRE_LPF_W : 8; + uint32_t CFA_YMOIRE_DC_W : 8; + } bits; +}; + +union REG_ISP_CFA_120 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_ENABLE : 1; + uint32_t _rsv_1 : 7; + uint32_t CFA_CMOIRE_STRTH : 8; + } bits; +}; + +union REG_ISP_CFA_124 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_SAT_X0 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_SAT_Y0 : 12; + } bits; +}; + +union REG_ISP_CFA_128 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_SAT_SLP0 : 18; + } bits; +}; + +union REG_ISP_CFA_12C { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_SAT_X1 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_SAT_Y1 : 12; + } bits; +}; + +union REG_ISP_CFA_130 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PTCLR_X0 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_PTCLR_Y0 : 12; + } bits; +}; + +union REG_ISP_CFA_134 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PTCLR_SLP0 : 18; + } bits; +}; + +union REG_ISP_CFA_138 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PTCLR_X1 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_PTCLR_Y1 : 12; + } bits; +}; + +union REG_ISP_CFA_13C { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PROTCLR1_ENABLE : 1; + uint32_t CFA_CMOIRE_PROTCLR2_ENABLE : 1; + uint32_t CFA_CMOIRE_PROTCLR3_ENABLE : 1; + } bits; +}; + +union REG_ISP_CFA_140 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PROTCLR1 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_PROTCLR2 : 12; + } bits; +}; + +union REG_ISP_CFA_144 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PROTCLR3 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_PD_X0 : 12; + } bits; +}; + +union REG_ISP_CFA_148 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PD_Y0 : 12; + } bits; +}; + +union REG_ISP_CFA_14C { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PD_SLP0 : 18; + } bits; +}; + +union REG_ISP_CFA_150 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_PD_X1 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_PD_Y1 : 12; + } bits; +}; + +union REG_ISP_CFA_154 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_X0 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_EDGE_Y0 : 12; + } bits; +}; + +union REG_ISP_CFA_158 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_SLP0 : 18; + } bits; +}; + +union REG_ISP_CFA_15C { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_X1 : 12; + uint32_t _rsv_12 : 4; + uint32_t CFA_CMOIRE_EDGE_Y1 : 12; + } bits; +}; + +union REG_ISP_CFA_160 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_LUMAGAIN_ENABLE : 1; + } bits; +}; + +union REG_ISP_CFA_164 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_LUMATG : 12; + } bits; +}; + +union REG_ISP_CFA_168 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_D0C0 : 13; + uint32_t _rsv_13 : 3; + uint32_t CFA_CMOIRE_EDGE_D0C1 : 13; + } bits; +}; + +union REG_ISP_CFA_16C { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_D0C2 : 13; + uint32_t _rsv_13 : 3; + uint32_t CFA_CMOIRE_EDGE_D45C0 : 13; + } bits; +}; + +union REG_ISP_CFA_170 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_D45C1 : 13; + uint32_t _rsv_13 : 3; + uint32_t CFA_CMOIRE_EDGE_D45C2 : 13; + } bits; +}; + +union REG_ISP_CFA_174 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_D45C3 : 13; + uint32_t _rsv_13 : 3; + uint32_t CFA_CMOIRE_EDGE_D45C4 : 13; + } bits; +}; + +union REG_ISP_CFA_178 { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_D45C5 : 13; + uint32_t _rsv_13 : 3; + uint32_t CFA_CMOIRE_EDGE_D45C6 : 13; + } bits; +}; + +union REG_ISP_CFA_17C { + uint32_t raw; + struct { + uint32_t CFA_CMOIRE_EDGE_D45C7 : 13; + uint32_t _rsv_13 : 3; + uint32_t CFA_CMOIRE_EDGE_D45C8 : 13; + } bits; +}; + +union REG_ISP_CFA_180 { + uint32_t raw; + struct { + uint32_t _CFA_SHPN_ENABLE : 1; + uint32_t _CFA_SHPN_PRE_PROC_ENABLE : 1; + uint32_t _rsv_2 : 6; + uint32_t _CFA_SHPN_MIN_Y : 12; + } bits; +}; + +union REG_ISP_CFA_184 { + uint32_t raw; + struct { + uint32_t _CFA_SHPN_MIN_GAIN : 12; + uint32_t _rsv_12 : 4; + uint32_t _CFA_SHPN_MAX_GAIN : 12; + } bits; +}; + +union REG_ISP_CFA_188 { + uint32_t raw; + struct { + uint32_t CFA_SHPN_MF_CORE_GAIN : 8; + uint32_t CFA_SHPN_HF_BLEND_WGT : 8; + uint32_t CFA_SHPN_MF_BLEND_WGT : 8; + } bits; +}; + +union REG_ISP_CFA_18C { + uint32_t raw; + struct { + uint32_t CFA_SHPN_CORE_VALUE : 12; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_PRE_RAW_VI_SEL_0 { + uint32_t raw; + struct { + uint32_t RING_BUFF_RESET : 1; + uint32_t RING_BUFF_MONITOR_EN : 1; + uint32_t DMA_LD_DPCM_MODE : 3; + uint32_t _rsv_5 : 11; + uint32_t DPCM_RX_XSTR : 13; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_1 { + uint32_t raw; + struct { + uint32_t FRAME_WIDTHM1 : 13; + uint32_t _rsv_13 : 3; + uint32_t FRAME_HEIGHTM1 : 13; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_2 { + uint32_t raw; + struct { + uint32_t RING_BUFF_THRESHOLD_0 : 16; + uint32_t RING_BUFF_THRESHOLD_1 : 16; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_3 { + uint32_t raw; + struct { + uint32_t RING_BUFF_THRESHOLD_2 : 16; + uint32_t RING_BUFF_THRESHOLD_3 : 16; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_4 { + uint32_t raw; + struct { + uint32_t RING_BUFF_ABOVE_TH_0 : 32; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_5 { + uint32_t raw; + struct { + uint32_t RING_BUFF_ABOVE_TH_1 : 32; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_6 { + uint32_t raw; + struct { + uint32_t RING_BUFF_ABOVE_TH_2 : 32; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_7 { + uint32_t raw; + struct { + uint32_t RING_BUFF_ABOVE_TH_3 : 32; + } bits; +}; + +union REG_PRE_RAW_VI_SEL_8 { + uint32_t raw; + struct { + uint32_t IP_DMA_IDLE : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_YUV_TOP_YUV_0 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 8; + uint32_t YUV_TOP_SEL : 1; + } bits; +}; + +union REG_YUV_TOP_YUV_2 { + uint32_t raw; + struct { + uint32_t FD_INT : 1; + uint32_t DMA_INT : 1; + uint32_t FRAME_OVERFLOW : 1; + } bits; +}; + +union REG_YUV_TOP_YUV_3 { + uint32_t raw; + struct { + uint32_t _rsv_0 : 2; + uint32_t YONLY_EN : 1; + } bits; +}; + +union REG_YUV_TOP_YUV_DEBUG_0 { + uint32_t raw; + struct { + uint32_t DEBUG_BUS : 32; + } bits; +}; + +union REG_YUV_TOP_YUV_4 { + uint32_t raw; + struct { + uint32_t DUMMY : 32; + } bits; +}; + +union REG_YUV_TOP_YUV_DEBUG_STATE { + uint32_t raw; + struct { + uint32_t MA_IDLE : 16; + uint32_t _rsv_16 : 15; + uint32_t IDLE : 1; + } bits; +}; + +union REG_YUV_TOP_YUV_5 { + uint32_t raw; + struct { + uint32_t DIS_UV2DRAM : 1; + uint32_t LINE_THRES_EN : 1; + uint32_t _rsv_2 : 6; + uint32_t LINE_THRES : 12; + uint32_t _rsv_20 : 4; + uint32_t PG2_ENABLE : 1; + } bits; +}; + +union REG_YUV_TOP_YUV_CTRL { + uint32_t raw; + struct { + uint32_t CHECKSUM_ENABLE : 1; + uint32_t SC_DMA_SWITCH : 1; + uint32_t AVG_MODE : 1; + uint32_t BYPASS_H : 1; + uint32_t BYPASS_V : 1; + uint32_t DROP_MODE : 1; + uint32_t YC_SWAP : 1; + uint32_t CURSER2_EN : 1; + uint32_t GUARD_CNT : 8; + } bits; +}; + +union REG_YUV_TOP_IMGW_M1 { + uint32_t raw; + struct { + uint32_t YUV_TOP_IMGW_M1 : 13; + uint32_t _rsv_13 : 3; + uint32_t YUV_TOP_IMGH_M1 : 13; + } bits; +}; + +union REG_YUV_TOP_STVALID_STATUS { + uint32_t raw; + struct { + uint32_t STVALID_STATUS : 32; + } bits; +}; + +union REG_YUV_TOP_STREADY_STATUS { + uint32_t raw; + struct { + uint32_t STREADY_STATUS : 32; + } bits; +}; + +union REG_YUV_TOP_PATGEN1 { + uint32_t raw; + struct { + uint32_t X_CURSER : 14; + uint32_t _rsv_14 : 2; + uint32_t Y_CURSER : 14; + uint32_t CURSER_EN : 1; + uint32_t PG_ENABLE : 1; + } bits; +}; + +union REG_YUV_TOP_PATGEN2 { + uint32_t raw; + struct { + uint32_t CURSER_VALUE : 16; + } bits; +}; + +union REG_YUV_TOP_PATGEN3 { + uint32_t raw; + struct { + uint32_t VALUE_REPORT : 32; + } bits; +}; + +union REG_YUV_TOP_PATGEN4 { + uint32_t raw; + struct { + uint32_t XCNT_RPT : 14; + uint32_t _rsv_14 : 2; + uint32_t YCNT_RPT : 14; + } bits; +}; + +union REG_YUV_TOP_CHECK_SUM { + uint32_t raw; + struct { + uint32_t K_SUM : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_ISP_LSC_STATUS { + uint32_t raw; + struct { + uint32_t LSC_STATUS : 32; + } bits; +}; + +union REG_ISP_LSC_GRACE_RESET { + uint32_t raw; + struct { + uint32_t LSC_GRACE_RESET : 1; + } bits; +}; + +union REG_ISP_LSC_MONITOR { + uint32_t raw; + struct { + uint32_t LSC_MONITOR : 32; + } bits; +}; + +union REG_ISP_LSC_ENABLE { + uint32_t raw; + struct { + uint32_t LSC_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t LSC_GAIN_3P9_0_4P8_1 : 1; + uint32_t _rsv_5 : 3; + uint32_t LSC_GAIN_BICUBIC_0_BILINEAR_1 : 1; + uint32_t LSC_BOUNDARY_INTERPOLATION_MODE : 1; + uint32_t _rsv_10 : 2; + uint32_t LSC_RENORMALIZE_ENABLE : 1; + uint32_t _rsv_13 : 3; + uint32_t LSC_HDR_ENABLE : 1; + uint32_t _rsv_17 : 3; + uint32_t LSC_BLOCKING_GAIN_UPDATE_ENABLE : 1; + uint32_t _rsv_21 : 3; + uint32_t LSC_35TILE_ENABLE : 1; + uint32_t _rsv_25 : 3; + uint32_t FORCE_CLK_ENABLE : 1; + } bits; +}; + +union REG_ISP_LSC_KICKOFF { + uint32_t raw; + struct { + uint32_t LSC_KICKOFF : 1; + uint32_t _rsv_1 : 3; + uint32_t LSC_GAINMOVER_ENABLE : 1; + uint32_t _rsv_5 : 7; + uint32_t LSC_SHADOW_SELECT : 1; + } bits; +}; + +union REG_ISP_LSC_STRENGTH { + uint32_t raw; + struct { + uint32_t LSC_STRENGTH : 12; + } bits; +}; + +union REG_ISP_LSC_IMG_BAYERID { + uint32_t raw; + struct { + uint32_t IMG_BAYERID : 4; + uint32_t _rsv_4 : 12; + uint32_t FORCE_BAYER_ENABLE : 1; + } bits; +}; + +union REG_ISP_LSC_MONITOR_SELECT { + uint32_t raw; + struct { + uint32_t LSC_MONITOR_SELECT : 32; + } bits; +}; + +union REG_ISP_LSC_DMI_WIDTHM1 { + uint32_t raw; + struct { + uint32_t LSC_DMI_WIDTHM1 : 13; + } bits; +}; + +union REG_ISP_LSC_DMI_HEIGHTM1 { + uint32_t raw; + struct { + uint32_t LSC_DMI_HEIGHTM1 : 13; + } bits; +}; + +union REG_ISP_LSC_GAIN_BASE { + uint32_t raw; + struct { + uint32_t LSC_GAIN_BASE : 2; + } bits; +}; + +union REG_ISP_LSC_XSTEP { + uint32_t raw; + struct { + uint32_t LSC_XSTEP : 15; + } bits; +}; + +union REG_ISP_LSC_YSTEP { + uint32_t raw; + struct { + uint32_t LSC_YSTEP : 15; + } bits; +}; + +union REG_ISP_LSC_IMGX0 { + uint32_t raw; + struct { + uint32_t LSC_IMGX0 : 22; + } bits; +}; + +union REG_ISP_LSC_IMGY0 { + uint32_t raw; + struct { + uint32_t LSC_IMGY0 : 22; + } bits; +}; + +union REG_ISP_LSC_INITX0 { + uint32_t raw; + struct { + uint32_t LSC_INITX0 : 22; + } bits; +}; + +union REG_ISP_LSC_INITY0 { + uint32_t raw; + struct { + uint32_t LSC_INITY0 : 22; + } bits; +}; + +union REG_ISP_LSC_KERNEL_TABLE_WRITE { + uint32_t raw; + struct { + uint32_t LSC_KERNEL_TABLE_WRITE : 1; + } bits; +}; + +union REG_ISP_LSC_KERNEL_TABLE_DATA { + uint32_t raw; + struct { + uint32_t LSC_KERNEL_TABLE_DATA : 32; + } bits; +}; + +union REG_ISP_LSC_KERNEL_TABLE_CTRL { + uint32_t raw; + struct { + uint32_t LSC_KERNEL_TABLE_START : 1; + uint32_t _rsv_1 : 3; + uint32_t LSC_KERNEL_TABLE_W : 1; + uint32_t _rsv_5 : 3; + uint32_t LSC_KERNEL_TABLE_DONE : 1; + } bits; +}; + +union REG_ISP_LSC_DUMMY { + uint32_t raw; + struct { + uint32_t LSC_DUMMY : 16; + uint32_t LSC_DEBUG : 16; + } bits; +}; + +union REG_ISP_LSC_LOCATION { + uint32_t raw; + struct { + uint32_t LSC_LOCATION : 32; + } bits; +}; + +union REG_ISP_LSC_1ST_RUNHIT { + uint32_t raw; + struct { + uint32_t LSC_1ST_RUNHIT : 32; + } bits; +}; + +union REG_ISP_LSC_COMPARE_VALUE { + uint32_t raw; + struct { + uint32_t LSC_COMPARE_VALUE : 32; + } bits; +}; + +union REG_ISP_LSC_MEM_SW_MODE { + uint32_t raw; + struct { + uint32_t LSC_MEM_SW_MODE : 1; + uint32_t _rsv_1 : 4; + uint32_t LSC_CUBIC_KERNEL_MEM_SEL : 1; + } bits; +}; + +union REG_ISP_LSC_MEM_SW_RADDR { + uint32_t raw; + struct { + uint32_t LSC_SW_RADDR : 7; + } bits; +}; + +union REG_ISP_LSC_MEM_SW_RDATA { + uint32_t raw; + struct { + uint32_t LSC_RDATA : 31; + uint32_t LSC_SW_READ : 1; + } bits; +}; + +union REG_ISP_LSC_INTERPOLATION { + uint32_t raw; + struct { + uint32_t LSC_BOUNDARY_INTERPOLATION_LF_RANGE: 6; + uint32_t _rsv_6 : 2; + uint32_t LSC_BOUNDARY_INTERPOLATION_UP_RANGE: 6; + uint32_t _rsv_14 : 2; + uint32_t LSC_BOUNDARY_INTERPOLATION_RT_RANGE: 6; + uint32_t _rsv_22 : 2; + uint32_t LSC_BOUNDARY_INTERPOLATION_DN_RANGE: 6; + } bits; +}; + +union REG_ISP_LSC_DMI_ENABLE { + uint32_t raw; + struct { + uint32_t DMI_ENABLE : 1; + uint32_t _rsv_1 : 3; + uint32_t DMI_QOS : 1; + uint32_t _rsv_5 : 3; + uint32_t FORCE_DMA_DISABLE : 1; + uint32_t _rsv_9 : 3; + uint32_t DMI_PULL_AFTER_DONE : 1; + } bits; +}; + +union REG_ISP_LSC_BLD { + uint32_t raw; + struct { + uint32_t LSC_BLDRATIO_ENABLE : 1; + uint32_t _rsv_1 : 15; + uint32_t LSC_BLDRATIO : 9; + } bits; +}; + +union REG_ISP_LSC_INTP_GAIN_MAX { + uint32_t raw; + struct { + uint32_t LSC_INTP_GAIN_MAX : 26; + } bits; +}; + +union REG_ISP_LSC_INTP_GAIN_MIN { + uint32_t raw; + struct { + uint32_t LSC_INTP_GAIN_MIN : 26; + } bits; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* _VI_REG_FIELDS_H_ */ diff --git a/freertos/cvitek/install/include/driver/vi/vi_snsr.h b/freertos/cvitek/install/include/driver/vi/vi_snsr.h new file mode 100644 index 000000000..c586bd69e --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_snsr.h @@ -0,0 +1,164 @@ +#ifndef __U_VI_SNSR_H__ +#define __U_VI_SNSR_H__ + +//#include + +#define MAX_WDR_FRAME_NUM 2 +#define ISP_MAX_SNS_REGS 32 + +struct manual_wdr_attr_s { + unsigned int manual_en; + unsigned short l2s_distance; + unsigned short lsef_length; + unsigned int discard_padding_lines; + unsigned int update; +}; + +struct manual_wdr_s { + unsigned int devno; + struct manual_wdr_attr_s attr; +}; + +/** + * struct active_size_s - linear/wdr image information + * + * @width: image total width + * @height: image total height + * @start_x: horizontal shift of the 1st pixel + * @start_y: horizontal shift of the 1st pixel + * @active_w: effective image width + * @active_h: effective image height + * @max_width: max width for buffer allocation + * @max_height: max height for buffer allocation + */ + +struct active_size_s { + unsigned short width; + unsigned short height; + unsigned short start_x; + unsigned short start_y; + unsigned short active_w; + unsigned short active_h; + unsigned short max_width; + unsigned short max_height; +}; + +/** + * struct wdr_size_s - structure for CVI_SNSR_G_WDR_SIZE + * + * @frm_num: [output] Effective image instance. 1 for linear mode, >1 for wdr mode. + * @img_size: [output] Image information. + */ + +struct wdr_size_s { + unsigned int frm_num; + struct active_size_s img_size[MAX_WDR_FRAME_NUM]; +}; + +enum isp_sns_type_e { + ISP_SNS_I2C_TYPE = 0, + ISP_SNS_TYPE_BUTT, +}; + +enum sns_wdr_e { + SNS_WDR_MODE_NONE = 0, + SNS_WDR_MODE_2TO1_LINE, + SNS_WDR_MODE_BUTT +}; + +/** + * struct isp_i2c_data - sensor setting with i2c interface. + * + * @update: update this register or not + * @drop_frame: drop next frame or not + * @i2c_dev: i2c device number. + * @dev_addr: sensor slave address + * @dly_frm_num: this setting would be set with delay frame number + * @drop_frame_cnt: this setting would be set with drop frame + * @reg_addr: sensor register address + * @addr_bytes: sensor register address bytes number + * @data: sensor register value + * @data_bytes: sensor register value bytes number + */ + +struct isp_i2c_data { + unsigned char update; + unsigned char drop_frame; + unsigned char i2c_dev; + unsigned char dev_addr; + unsigned char dly_frm_num; + unsigned short drop_frame_cnt; + unsigned short reg_addr; + unsigned short addr_bytes; + unsigned short data; + unsigned short data_bytes; +}; + +/** + * struct snsr_regs_s - structure of sensor update wrapper + * + * @sns_type: i2c or other interface + * @regs_num: the maximum sensor registers to be updated + * @i2c_data: sensor registers to be updated + * @use_snsr_sram: does this sensor support group update + * @need_update: global flag for sensor update. Ignore this wrapper + * when it is zero. + */ + +struct snsr_regs_s { + enum isp_sns_type_e sns_type; + unsigned int magic_num; + unsigned int regs_num; + struct isp_i2c_data i2c_data[ISP_MAX_SNS_REGS]; + unsigned char cfg_valid_max_dly_frm; + unsigned char use_snsr_sram; + unsigned char need_update; +}; + +/** + * struct snsr_isp_s - structure of isp update wrapper + * + * @wdr: the image information for isp driver. + * @need_update: global flag for isp update. Ignore this wrapper + * when it is zero. + */ + +struct snsr_isp_s { + struct wdr_size_s wdr; + unsigned char dly_frm_num; + unsigned char need_update; +}; + +/** + * struct snsr_cif_s - structure of cif(mipi_rx) update wrapper + * + * @wdr: the image information for isp driver. + * @need_update: global flag for cif update. Ignore this wrapper + * when it is zero. + */ + +struct snsr_cif_s { + struct manual_wdr_s wdr_manu; + unsigned char dly_frm_num; + unsigned char need_update; +}; + +/** + * struct snsr_cfg_node_s - structure of cfg node for runtime update + * + * @snsr: [output] snsr wrapper for runtime update + * @isp: [output] isp wrapper for runtime update + * @cif: [output] cif wrapper for runtime update + * @configed: [intput] after CVI_SNSR_G_CFG_NODE is called, this flag + * is set as false by sensor driver. The caller shall set it as + * true after this cfg_node is passed to isp driver. + */ + +struct snsr_cfg_node_s { + struct snsr_regs_s snsr; + struct snsr_isp_s isp; + struct snsr_cif_s cif; + unsigned char configed; +}; + +#endif // __U_VI_SNSR_H__ diff --git a/freertos/cvitek/install/include/driver/vi/vi_tun_cfg.h b/freertos/cvitek/install/include/driver/vi/vi_tun_cfg.h new file mode 100644 index 000000000..b202b10d6 --- /dev/null +++ b/freertos/cvitek/install/include/driver/vi/vi_tun_cfg.h @@ -0,0 +1,1467 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: cvi_vip_tun_cfg.h + * Description: + */ + +#ifndef _U_CVI_VIP_TUN_CFG_H_ +#define _U_CVI_VIP_TUN_CFG_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "isp_reg.h" + +#define TUNING_NODE_NUM 2 + +enum cvi_isp_raw { + ISP_PRERAW_A, + ISP_PRERAW_B, + ISP_PRERAW_MAX, +}; + +enum cvi_isp_chn_num { + ISP_CHN0, + ISP_CHN1, + ISP_CHN2, + ISP_CHN3, + ISP_CHN_MAX, +}; + +enum cvi_isp_pre_chn_num { + ISP_FE_CH0, + ISP_FE_CH1, + ISP_FE_CH2, + ISP_FE_CH3, + ISP_FE_CHN_MAX, +}; + +enum cvi_isp_be_chn_num { + ISP_BE_CH0, + ISP_BE_CH1, + ISP_BE_CHN_MAX, +}; + +struct cvi_vip_isp_blc_config { + __u8 update; + __u8 inst; + __u8 enable; + __u8 bypass; + __u16 roffset; + __u16 groffset; + __u16 gboffset; + __u16 boffset; + __u16 roffset_2nd; + __u16 groffset_2nd; + __u16 gboffset_2nd; + __u16 boffset_2nd; + __u16 rgain; + __u16 grgain; + __u16 gbgain; + __u16 bgain; +}; + +struct cvi_vip_isp_wbg_config { + __u8 update; + __u8 inst; + __u8 enable; + __u8 bypass; + __u16 rgain; + __u16 ggain; + __u16 bgain; + __u32 rgain_fraction; + __u32 ggain_fraction; + __u32 bgain_fraction; +}; + +/* struct cvi_vip_isp_ccm_config + * @enable: ccm module enable or not + * @coef: s3.10, (2's complement) + */ +struct cvi_vip_isp_ccm_config { + __u8 update; + __u8 inst; + __u8 enable; + __u16 coef[3][3]; +}; + +struct cvi_vip_isp_cacp_config { + __u8 update; + __u8 enable; + __u8 mode; + __u16 iso_ratio; + __u16 ca_y_ratio_lut[256]; + __u8 cp_y_lut[256]; + __u8 cp_u_lut[256]; + __u8 cp_v_lut[256]; +}; + +struct cvi_vip_isp_ca2_config { + __u8 update; + __u8 enable; + __u16 lut_in[6]; + __u16 lut_out[6]; + __u16 lut_slp[5]; +}; + +struct cvi_vip_isp_ygamma_config { + __u8 update; + __u8 enable; + __u32 max; + __u16 lut[256]; +}; + +struct cvi_vip_isp_gamma_config { + __u8 update; + __u8 enable; + __u16 max; + __u16 lut[256]; +}; + +struct cvi_isp_demosiac_tun_cfg { + union REG_ISP_CFA_0C REG_0C; + union REG_ISP_CFA_10 REG_10; + union REG_ISP_CFA_14 REG_14; + union REG_ISP_CFA_18 REG_18; + union REG_ISP_CFA_1C REG_1C; +}; + +struct cvi_isp_demosiac_tun_1_cfg { + union REG_ISP_CFA_120 REG_120; + union REG_ISP_CFA_124 REG_124; + union REG_ISP_CFA_128 REG_128; + union REG_ISP_CFA_12C REG_12C; + union REG_ISP_CFA_130 REG_130; + union REG_ISP_CFA_134 REG_134; + union REG_ISP_CFA_138 REG_138; + union REG_ISP_CFA_13C REG_13C; + union REG_ISP_CFA_140 REG_140; + union REG_ISP_CFA_144 REG_144; + union REG_ISP_CFA_148 REG_148; + union REG_ISP_CFA_14C REG_14C; + union REG_ISP_CFA_150 REG_150; + union REG_ISP_CFA_154 REG_154; + union REG_ISP_CFA_158 REG_158; + union REG_ISP_CFA_15C REG_15C; + union REG_ISP_CFA_160 REG_160; + union REG_ISP_CFA_164 REG_164; + union REG_ISP_CFA_168 REG_168; + union REG_ISP_CFA_16C REG_16C; + union REG_ISP_CFA_170 REG_170; + union REG_ISP_CFA_174 REG_174; + union REG_ISP_CFA_178 REG_178; + union REG_ISP_CFA_17C REG_17C; + union REG_ISP_CFA_180 REG_180; + union REG_ISP_CFA_184 REG_184; + union REG_ISP_CFA_188 REG_188; + union REG_ISP_CFA_18C REG_18C; +}; + +struct cvi_isp_demosiac_tun_2_cfg { + union REG_ISP_CFA_90 REG_90; + union REG_ISP_CFA_94 REG_94; + union REG_ISP_CFA_98 REG_98; + union REG_ISP_CFA_9C REG_9C; + union REG_ISP_CFA_A0 REG_A0; + union REG_ISP_CFA_A4 REG_A4; + union REG_ISP_CFA_A8 REG_A8; +}; + +struct cvi_vip_isp_demosiac_config { + __u8 update; + __u8 cfa_enable; + __u16 cfa_edgee_thd2; + __u8 cfa_out_sel; + __u8 cfa_force_dir_enable; + __u8 cfa_force_dir_sel; + __u16 cfa_rbsig_luma_thd; + __u8 cfa_ghp_lut[32]; + __u8 cfa_ymoire_enable; + __u8 cfa_ymoire_dc_w; + __u8 cfa_ymoire_lpf_w; + struct cvi_isp_demosiac_tun_cfg demosiac_cfg; + struct cvi_isp_demosiac_tun_1_cfg demosiac_1_cfg; + struct cvi_isp_demosiac_tun_2_cfg demosiac_2_cfg; +}; + +struct cvi_vip_isp_lsc_config { + __u8 update; + __u8 enable; + __u16 strength; + __u8 debug; + __u8 gain_base; + __u8 gain_3p9_0_4p8_1; + __u8 renormalize_enable; + __u8 gain_bicubic_0_bilinear_1; + __u8 boundary_interpolation_mode; + __u8 boundary_interpolation_lf_range; + __u8 boundary_interpolation_up_range; + __u8 boundary_interpolation_rt_range; + __u8 boundary_interpolation_dn_range; + __u8 bldratio_enable; + __u16 bldratio; + __u32 intp_gain_max; + __u32 intp_gain_min; +}; + +struct cvi_isp_bnr_tun_1_cfg { + union REG_ISP_BNR_NS_LUMA_TH_R NS_LUMA_TH_R; + union REG_ISP_BNR_NS_SLOPE_R NS_SLOPE_R; + union REG_ISP_BNR_NS_OFFSET0_R NS_OFFSET0_R; + union REG_ISP_BNR_NS_OFFSET1_R NS_OFFSET1_R; + union REG_ISP_BNR_NS_LUMA_TH_GR NS_LUMA_TH_GR; + union REG_ISP_BNR_NS_SLOPE_GR NS_SLOPE_GR; + union REG_ISP_BNR_NS_OFFSET0_GR NS_OFFSET0_GR; + union REG_ISP_BNR_NS_OFFSET1_GR NS_OFFSET1_GR; + union REG_ISP_BNR_NS_LUMA_TH_GB NS_LUMA_TH_GB; + union REG_ISP_BNR_NS_SLOPE_GB NS_SLOPE_GB; + union REG_ISP_BNR_NS_OFFSET0_GB NS_OFFSET0_GB; + union REG_ISP_BNR_NS_OFFSET1_GB NS_OFFSET1_GB; + union REG_ISP_BNR_NS_LUMA_TH_B NS_LUMA_TH_B; + union REG_ISP_BNR_NS_SLOPE_B NS_SLOPE_B; + union REG_ISP_BNR_NS_OFFSET0_B NS_OFFSET0_B; + union REG_ISP_BNR_NS_OFFSET1_B NS_OFFSET1_B; + union REG_ISP_BNR_NS_GAIN NS_GAIN; + union REG_ISP_BNR_STRENGTH_MODE STRENGTH_MODE; +}; + +struct cvi_isp_bnr_tun_2_cfg { + union REG_ISP_BNR_VAR_TH VAR_TH; + union REG_ISP_BNR_WEIGHT_LUT WEIGHT_LUT; + union REG_ISP_BNR_WEIGHT_SM WEIGHT_SM; + union REG_ISP_BNR_WEIGHT_V WEIGHT_V; + union REG_ISP_BNR_WEIGHT_H WEIGHT_H; + union REG_ISP_BNR_WEIGHT_D45 WEIGHT_D45; + union REG_ISP_BNR_WEIGHT_D135 WEIGHT_D135; + union REG_ISP_BNR_NEIGHBOR_MAX NEIGHBOR_MAX; +}; + +struct cvi_vip_isp_bnr_config { + __u8 update; + __u8 enable; + __u8 out_sel; + __u8 weight_lut[256]; + __u8 intensity_sel[8]; + __u8 weight_intra_0; + __u8 weight_intra_1; + __u8 weight_intra_2; + __u8 weight_norm_1; + __u8 weight_norm_2; + __u16 k_smooth; + __u16 k_texture; + struct cvi_isp_bnr_tun_1_cfg bnr_1_cfg; + struct cvi_isp_bnr_tun_2_cfg bnr_2_cfg; +}; + +struct cvi_vip_isp_clut_config { + __u8 update; + __u8 enable; + __u8 is_update_partial; + __u8 tbl_idx; + __u16 r_lut[4913]; + __u16 g_lut[4913]; + __u16 b_lut[4913]; + __u16 update_length; + __u32 lut[1024][2]; //0:addr, 1:value +}; + +struct cvi_isp_drc_tun_1_cfg { + union REG_LTM_H90 REG_H90; + union REG_LTM_H94 REG_H94; + union REG_LTM_H98 REG_H98; + union REG_LTM_H9C REG_H9C; + union REG_LTM_HA0 REG_HA0; + union REG_LTM_HA4 REG_HA4; + union REG_LTM_HA8 REG_HA8; + union REG_LTM_HAC REG_HAC; + union REG_LTM_HB0 REG_HB0; + union REG_LTM_HB4 REG_HB4; + union REG_LTM_HB8 REG_HB8; + union REG_LTM_HBC REG_HBC; + union REG_LTM_HC0 REG_HC0; + union REG_LTM_HC4 REG_HC4; + union REG_LTM_HC8 REG_HC8; + union REG_LTM_HCC REG_HCC; + union REG_LTM_HD0 REG_HD0; + union REG_LTM_HD4 REG_HD4; + union REG_LTM_HD8 REG_HD8; + union REG_LTM_HDC REG_HDC; +}; + +struct cvi_isp_drc_tun_2_cfg { + union REG_LTM_H14 REG_H14; + union REG_LTM_H18 REG_H18; + union REG_LTM_H1C REG_H1C; + union REG_LTM_H20 REG_H20; + union REG_LTM_H24 REG_H24; + union REG_LTM_H28 REG_H28; + union REG_LTM_H2C REG_H2C; + union REG_LTM_H30 REG_H30; +}; + +struct cvi_isp_drc_tun_3_cfg { + union REG_LTM_H64 REG_H64; + union REG_LTM_H68 REG_H68; + union REG_LTM_H6C REG_H6C; + union REG_LTM_H70 REG_H70; + union REG_LTM_H74 REG_H74; + union REG_LTM_H78 REG_H78; + union REG_LTM_H7C REG_H7C; + union REG_LTM_H80 REG_H80; + union REG_LTM_H84 REG_H84; + union REG_LTM_H88 REG_H88; +}; + +struct cvi_vip_isp_drc_config { + __u8 update; + __u8 ltm_enable; + __u8 dark_enh_en; + __u8 brit_enh_en; + __u8 dbg_mode; + __u8 dark_tone_wgt_refine_en; + __u8 brit_tone_wgt_refine_en; + __u16 global_lut[769]; + __u16 dark_lut[257]; + __u16 brit_lut[513]; + __u8 lmap_enable; + __u8 lmap_w_bit; + __u8 lmap_h_bit; + __u16 lmap_thd_l; + __u16 lmap_thd_h; + __u8 lmap_y_mode; + __u8 de_strth_dshft; + __u16 de_strth_gain; + __u8 be_strth_dshft; + __u16 be_strth_gain; + struct cvi_isp_drc_tun_1_cfg drc_1_cfg; + struct cvi_isp_drc_tun_2_cfg drc_2_cfg; + struct cvi_isp_drc_tun_3_cfg drc_3_cfg; +}; + +struct cvi_isp_ynr_tun_1_cfg { + union REG_ISP_YNR_NS0_LUMA_TH_00 NS0_LUMA_TH_00; + union REG_ISP_YNR_NS0_LUMA_TH_01 NS0_LUMA_TH_01; + union REG_ISP_YNR_NS0_LUMA_TH_02 NS0_LUMA_TH_02; + union REG_ISP_YNR_NS0_LUMA_TH_03 NS0_LUMA_TH_03; + union REG_ISP_YNR_NS0_LUMA_TH_04 NS0_LUMA_TH_04; + union REG_ISP_YNR_NS0_LUMA_TH_05 NS0_LUMA_TH_05; + union REG_ISP_YNR_NS0_SLOPE_00 NS0_SLOPE_00; + union REG_ISP_YNR_NS0_SLOPE_01 NS0_SLOPE_01; + union REG_ISP_YNR_NS0_SLOPE_02 NS0_SLOPE_02; + union REG_ISP_YNR_NS0_SLOPE_03 NS0_SLOPE_03; + union REG_ISP_YNR_NS0_SLOPE_04 NS0_SLOPE_04; + union REG_ISP_YNR_NS0_OFFSET_00 NS0_OFFSET_00; + union REG_ISP_YNR_NS0_OFFSET_01 NS0_OFFSET_01; + union REG_ISP_YNR_NS0_OFFSET_02 NS0_OFFSET_02; + union REG_ISP_YNR_NS0_OFFSET_03 NS0_OFFSET_03; + union REG_ISP_YNR_NS0_OFFSET_04 NS0_OFFSET_04; + union REG_ISP_YNR_NS0_OFFSET_05 NS0_OFFSET_05; + union REG_ISP_YNR_NS1_LUMA_TH_00 NS1_LUMA_TH_00; + union REG_ISP_YNR_NS1_LUMA_TH_01 NS1_LUMA_TH_01; + union REG_ISP_YNR_NS1_LUMA_TH_02 NS1_LUMA_TH_02; + union REG_ISP_YNR_NS1_LUMA_TH_03 NS1_LUMA_TH_03; + union REG_ISP_YNR_NS1_LUMA_TH_04 NS1_LUMA_TH_04; + union REG_ISP_YNR_NS1_LUMA_TH_05 NS1_LUMA_TH_05; + union REG_ISP_YNR_NS1_SLOPE_00 NS1_SLOPE_00; + union REG_ISP_YNR_NS1_SLOPE_01 NS1_SLOPE_01; + union REG_ISP_YNR_NS1_SLOPE_02 NS1_SLOPE_02; + union REG_ISP_YNR_NS1_SLOPE_03 NS1_SLOPE_03; + union REG_ISP_YNR_NS1_SLOPE_04 NS1_SLOPE_04; + union REG_ISP_YNR_NS1_OFFSET_00 NS1_OFFSET_00; + union REG_ISP_YNR_NS1_OFFSET_01 NS1_OFFSET_01; + union REG_ISP_YNR_NS1_OFFSET_02 NS1_OFFSET_02; + union REG_ISP_YNR_NS1_OFFSET_03 NS1_OFFSET_03; + union REG_ISP_YNR_NS1_OFFSET_04 NS1_OFFSET_04; + union REG_ISP_YNR_NS1_OFFSET_05 NS1_OFFSET_05; + union REG_ISP_YNR_NS_GAIN NS_GAIN; +}; + +struct cvi_isp_ynr_tun_2_cfg { + union REG_ISP_YNR_MOTION_LUT_00 MOTION_LUT_00; + union REG_ISP_YNR_MOTION_LUT_01 MOTION_LUT_01; + union REG_ISP_YNR_MOTION_LUT_02 MOTION_LUT_02; + union REG_ISP_YNR_MOTION_LUT_03 MOTION_LUT_03; + union REG_ISP_YNR_MOTION_LUT_04 MOTION_LUT_04; + union REG_ISP_YNR_MOTION_LUT_05 MOTION_LUT_05; + union REG_ISP_YNR_MOTION_LUT_06 MOTION_LUT_06; + union REG_ISP_YNR_MOTION_LUT_07 MOTION_LUT_07; + union REG_ISP_YNR_MOTION_LUT_08 MOTION_LUT_08; + union REG_ISP_YNR_MOTION_LUT_09 MOTION_LUT_09; + union REG_ISP_YNR_MOTION_LUT_10 MOTION_LUT_10; + union REG_ISP_YNR_MOTION_LUT_11 MOTION_LUT_11; + union REG_ISP_YNR_MOTION_LUT_12 MOTION_LUT_12; + union REG_ISP_YNR_MOTION_LUT_13 MOTION_LUT_13; + union REG_ISP_YNR_MOTION_LUT_14 MOTION_LUT_14; + union REG_ISP_YNR_MOTION_LUT_15 MOTION_LUT_15; +}; + +struct cvi_isp_ynr_tun_3_cfg { + union REG_ISP_YNR_ALPHA_GAIN ALPHA_GAIN; + union REG_ISP_YNR_VAR_TH VAR_TH; + union REG_ISP_YNR_WEIGHT_SM WEIGHT_SM; + union REG_ISP_YNR_WEIGHT_V WEIGHT_V; + union REG_ISP_YNR_WEIGHT_H WEIGHT_H; + union REG_ISP_YNR_WEIGHT_D45 WEIGHT_D45; + union REG_ISP_YNR_WEIGHT_D135 WEIGHT_D135; + union REG_ISP_YNR_NEIGHBOR_MAX NEIGHBOR_MAX; + union REG_ISP_YNR_RES_K_SMOOTH RES_K_SMOOTH; + union REG_ISP_YNR_RES_K_TEXTURE RES_K_TEXTURE; + union REG_ISP_YNR_FILTER_MODE_EN FILTER_MODE_EN; + union REG_ISP_YNR_FILTER_MODE_ALPHA FILTER_MODE_ALPHA; +}; + +struct cvi_isp_ynr_tun_4_cfg { + union REG_ISP_YNR_RES_MOT_LUT_00 RES_MOT_LUT_00; + union REG_ISP_YNR_RES_MOT_LUT_01 RES_MOT_LUT_01; + union REG_ISP_YNR_RES_MOT_LUT_02 RES_MOT_LUT_02; + union REG_ISP_YNR_RES_MOT_LUT_03 RES_MOT_LUT_03; + union REG_ISP_YNR_RES_MOT_LUT_04 RES_MOT_LUT_04; + union REG_ISP_YNR_RES_MOT_LUT_05 RES_MOT_LUT_05; + union REG_ISP_YNR_RES_MOT_LUT_06 RES_MOT_LUT_06; + union REG_ISP_YNR_RES_MOT_LUT_07 RES_MOT_LUT_07; + union REG_ISP_YNR_RES_MOT_LUT_08 RES_MOT_LUT_08; + union REG_ISP_YNR_RES_MOT_LUT_09 RES_MOT_LUT_09; + union REG_ISP_YNR_RES_MOT_LUT_10 RES_MOT_LUT_10; + union REG_ISP_YNR_RES_MOT_LUT_11 RES_MOT_LUT_11; + union REG_ISP_YNR_RES_MOT_LUT_12 RES_MOT_LUT_12; + union REG_ISP_YNR_RES_MOT_LUT_13 RES_MOT_LUT_13; + union REG_ISP_YNR_RES_MOT_LUT_14 RES_MOT_LUT_14; + union REG_ISP_YNR_RES_MOT_LUT_15 RES_MOT_LUT_15; +}; + +struct cvi_vip_isp_ynr_config { + __u8 update; + __u8 enable; + __u8 out_sel; + __u8 weight_intra_0; + __u8 weight_intra_1; + __u8 weight_intra_2; + __u8 weight_norm_1; + __u8 weight_norm_2; + __u8 res_max; + __u8 res_motion_max; + __u8 motion_ns_clip_max; + __u8 weight_lut_h[64]; + struct cvi_isp_ynr_tun_1_cfg ynr_1_cfg; + struct cvi_isp_ynr_tun_2_cfg ynr_2_cfg; + struct cvi_isp_ynr_tun_3_cfg ynr_3_cfg; + struct cvi_isp_ynr_tun_4_cfg ynr_4_cfg; +}; + +struct cvi_vip_isp_cnr_config { + __u8 update; + __u8 enable; + __u8 strength_mode; + __u8 diff_shift_val; + __u8 diff_gain; + __u8 ratio; + __u8 fusion_intensity_weight; + __u8 flag_neighbor_max_weight; + __u8 weight_lut_inter[16]; + __u8 motion_enable; + __u8 coring_motion_lut[16]; + __u8 motion_lut[16]; +}; + +struct cvi_isp_tnr_tun_cfg { + union REG_ISP_MMAP_0C REG_0C; + union REG_ISP_MMAP_10 REG_10; + union REG_ISP_MMAP_14 REG_14; + union REG_ISP_MMAP_18 REG_18; +}; + +struct cvi_isp_tnr_tun_5_cfg { + union REG_ISP_MMAP_20 REG_20; + union REG_ISP_MMAP_24 REG_24; + union REG_ISP_MMAP_28 REG_28; + union REG_ISP_MMAP_2C REG_2C; +}; + +struct cvi_isp_tnr_tun_1_cfg { + union REG_ISP_MMAP_4C REG_4C; + union REG_ISP_MMAP_50 REG_50; + union REG_ISP_MMAP_54 REG_54; + union REG_ISP_MMAP_58 REG_58; + union REG_ISP_MMAP_5C REG_5C; +}; + +struct cvi_isp_tnr_tun_2_cfg { + union REG_ISP_MMAP_70 REG_70; + union REG_ISP_MMAP_74 REG_74; + union REG_ISP_MMAP_78 REG_78; + union REG_ISP_MMAP_7C REG_7C; + union REG_ISP_MMAP_80 REG_80; + union REG_ISP_MMAP_84 REG_84; + union REG_ISP_MMAP_88 REG_88; + union REG_ISP_MMAP_8C REG_8C; + union REG_ISP_MMAP_90 REG_90; +}; + +struct cvi_isp_tnr_tun_3_cfg { + union REG_ISP_MMAP_A0 REG_A0; + union REG_ISP_MMAP_A4 REG_A4; + union REG_ISP_MMAP_A8 REG_A8; + union REG_ISP_MMAP_AC REG_AC; + union REG_ISP_MMAP_B0 REG_B0; + union REG_ISP_MMAP_B4 REG_B4; + union REG_ISP_MMAP_B8 REG_B8; + union REG_ISP_MMAP_BC REG_BC; + union REG_ISP_MMAP_C0 REG_C0; +}; + +struct cvi_isp_tnr_tun_4_cfg { + union REG_ISP_444_422_13 REG_13; + union REG_ISP_444_422_14 REG_14; + union REG_ISP_444_422_15 REG_15; + union REG_ISP_444_422_16 REG_16; + union REG_ISP_444_422_17 REG_17; + union REG_ISP_444_422_18 REG_18; + union REG_ISP_444_422_19 REG_19; + union REG_ISP_444_422_20 REG_20; + union REG_ISP_444_422_21 REG_21; + union REG_ISP_444_422_22 REG_22; + union REG_ISP_444_422_23 REG_23; + union REG_ISP_444_422_24 REG_24; + union REG_ISP_444_422_25 REG_25; + union REG_ISP_444_422_26 REG_26; + union REG_ISP_444_422_27 REG_27; + union REG_ISP_444_422_28 REG_28; + union REG_ISP_444_422_29 REG_29; + union REG_ISP_444_422_30 REG_30; + union REG_ISP_444_422_31 REG_31; +}; + +struct cvi_isp_tnr_tun_6_cfg { + union REG_ISP_444_422_84 REG_84; + union REG_ISP_444_422_88 REG_88; + union REG_ISP_444_422_8C REG_8C; + union REG_ISP_444_422_90 REG_90; + union REG_ISP_444_422_94 REG_94; + union REG_ISP_444_422_98 REG_98; + union REG_ISP_444_422_9C REG_9C; + union REG_ISP_444_422_A0 REG_A0; + union REG_ISP_444_422_A4 REG_A4; + union REG_ISP_444_422_A8 REG_A8; + union REG_ISP_444_422_AC REG_AC; + union REG_ISP_444_422_B0 REG_B0; + union REG_ISP_444_422_B4 REG_B4; + union REG_ISP_444_422_B8 REG_B8; + union REG_ISP_444_422_BC REG_BC; + union REG_ISP_444_422_C0 REG_C0; + union REG_ISP_444_422_C4 REG_C4; + union REG_ISP_444_422_C8 REG_C8; + union REG_ISP_444_422_CC REG_CC; + union REG_ISP_444_422_D0 REG_D0; + union REG_ISP_444_422_D4 REG_D4; + union REG_ISP_444_422_D8 REG_D8; + union REG_ISP_444_422_DC REG_DC; + union REG_ISP_444_422_E0 REG_E0; + union REG_ISP_444_422_E4 REG_E4; + union REG_ISP_444_422_E8 REG_E8; + union REG_ISP_444_422_EC REG_EC; + union REG_ISP_444_422_F0 REG_F0; +}; + +struct cvi_isp_tnr_tun_7_cfg { + union REG_ISP_MMAP_100 REG_100; + union REG_ISP_MMAP_104 REG_104; + union REG_ISP_MMAP_108 REG_108; + union REG_ISP_MMAP_10C REG_10C; + union REG_ISP_MMAP_110 REG_110; + union REG_ISP_MMAP_114 REG_114; + union REG_ISP_MMAP_118 REG_118; + union REG_ISP_MMAP_11C REG_11C; + union REG_ISP_MMAP_120 REG_120; + union REG_ISP_MMAP_124 REG_124; + union REG_ISP_MMAP_128 REG_128; +}; + +struct cvi_vip_isp_tnr_config { + __u8 update; + __u8 manr_enable; + __u8 rgbmap_w_bit; + __u8 rgbmap_h_bit; + __u8 mh_wgt; + __u8 lpf[3][3]; + __u8 map_gain; + __u8 map_thd_l; + __u8 map_thd_h; + __u8 uv_rounding_type_sel; + __u8 history_sel_0; + __u8 history_sel_1; + __u8 history_sel_3; + __u16 tdnr_debug_sel; + __s16 luma_adapt_lut_slope_2; + __u8 med_enable; + __u16 med_wgt; + __u8 mtluma_mode; + __u8 avg_mode_write; + __u8 drop_mode_write; + __u8 tdnr_pixel_lp; + __u8 tdnr_comp_gain_enable; + __u16 tdnr_ee_comp_gain; + struct cvi_isp_tnr_tun_cfg tnr_cfg; + struct cvi_isp_tnr_tun_1_cfg tnr_1_cfg; + struct cvi_isp_tnr_tun_2_cfg tnr_2_cfg; + struct cvi_isp_tnr_tun_3_cfg tnr_3_cfg; + struct cvi_isp_tnr_tun_4_cfg tnr_4_cfg; + struct cvi_isp_tnr_tun_5_cfg tnr_5_cfg; + struct cvi_isp_tnr_tun_6_cfg tnr_6_cfg; + struct cvi_isp_tnr_tun_7_cfg tnr_7_cfg; +}; + +struct cvi_isp_ee_tun_1_cfg { + union REG_ISP_EE_A4 REG_A4; + union REG_ISP_EE_A8 REG_A8; + union REG_ISP_EE_AC REG_AC; + union REG_ISP_EE_B0 REG_B0; + union REG_ISP_EE_B4 REG_B4; + union REG_ISP_EE_B8 REG_B8; + union REG_ISP_EE_BC REG_BC; + union REG_ISP_EE_C0 REG_C0; + union REG_ISP_EE_C4 REG_C4; + union REG_ISP_EE_C8 REG_C8; + union REG_ISP_EE_HCC REG_HCC; + union REG_ISP_EE_HD0 REG_HD0; +}; + +struct cvi_isp_ee_tun_2_cfg { + union REG_ISP_EE_19C REG_19C; + union REG_ISP_EE_1A0 REG_1A0; + union REG_ISP_EE_1A4 REG_1A4; + union REG_ISP_EE_1A8 REG_1A8; +}; + +struct cvi_isp_ee_tun_3_cfg { + union REG_ISP_EE_1C4 REG_1C4; + union REG_ISP_EE_1C8 REG_1C8; + union REG_ISP_EE_1CC REG_1CC; + union REG_ISP_EE_1D0 REG_1D0; + union REG_ISP_EE_1D4 REG_1D4; + union REG_ISP_EE_1D8 REG_1D8; +}; + +struct cvi_vip_isp_ee_config { + __u8 update; + __u8 enable; + __u8 dbg_mode; + __u8 total_coring; + __u8 total_motion_coring; + __u8 total_gain; + __u8 total_oshtthrd; + __u8 total_ushtthrd; + __u8 pre_proc_enable; + __u8 lumaref_lpf_en; + __u8 luma_coring_en; + __u8 luma_adptctrl_en; + __u8 delta_adptctrl_en; + __u8 delta_adptctrl_shift; + __u8 chromaref_lpf_en; + __u8 chroma_adptctrl_en; + __u8 mf_core_gain; + __u8 hf_blend_wgt; + __u8 mf_blend_wgt; + __u8 soft_clamp_enable; + __u8 upper_bound_left_diff; + __u8 lower_bound_right_diff; + __u8 luma_adptctrl_lut[33]; + __u8 delta_adptctrl_lut[33]; + __u8 chroma_adptctrl_lut[33]; + struct cvi_isp_ee_tun_1_cfg ee_1_cfg; + struct cvi_isp_ee_tun_2_cfg ee_2_cfg; + struct cvi_isp_ee_tun_3_cfg ee_3_cfg; +}; + +struct cvi_vip_isp_pre_ee_config { + __u8 update; + __u8 enable; + __u8 dbg_mode; + __u8 total_coring; + __u8 total_motion_coring; + __u8 total_gain; + __u8 total_oshtthrd; + __u8 total_ushtthrd; + __u8 pre_proc_enable; + __u8 lumaref_lpf_en; + __u8 luma_coring_en; + __u8 luma_adptctrl_en; + __u8 delta_adptctrl_en; + __u8 delta_adptctrl_shift; + __u8 chromaref_lpf_en; + __u8 chroma_adptctrl_en; + __u8 mf_core_gain; + __u8 hf_blend_wgt; + __u8 mf_blend_wgt; + __u8 soft_clamp_enable; + __u8 upper_bound_left_diff; + __u8 lower_bound_right_diff; + __u8 luma_adptctrl_lut[33]; + __u8 delta_adptctrl_lut[33]; + __u8 chroma_adptctrl_lut[33]; + struct cvi_isp_ee_tun_1_cfg pre_ee_1_cfg; + struct cvi_isp_ee_tun_2_cfg pre_ee_2_cfg; + struct cvi_isp_ee_tun_3_cfg pre_ee_3_cfg; +}; + +struct cvi_isp_fswdr_tun_cfg { + union REG_FUSION_FS_SE_GAIN FS_SE_GAIN; + union REG_FUSION_FS_LUMA_THD FS_LUMA_THD; + union REG_FUSION_FS_WGT FS_WGT; + union REG_FUSION_FS_WGT_SLOPE FS_WGT_SLOPE; +}; + +struct cvi_isp_fswdr_tun_2_cfg { + union REG_FUSION_FS_MOTION_LUT_IN FS_MOTION_LUT_IN; + union REG_FUSION_FS_MOTION_LUT_OUT_0 FS_MOTION_LUT_OUT_0; + union REG_FUSION_FS_MOTION_LUT_OUT_1 FS_MOTION_LUT_OUT_1; + union REG_FUSION_FS_MOTION_LUT_SLOPE_0 FS_MOTION_LUT_SLOPE_0; + union REG_FUSION_FS_MOTION_LUT_SLOPE_1 FS_MOTION_LUT_SLOPE_1; +}; + +struct cvi_isp_fswdr_tun_3_cfg { + union REG_FUSION_FS_CALIB_CTRL_0 FS_CALIB_CTRL_0; + union REG_FUSION_FS_CALIB_CTRL_1 FS_CALIB_CTRL_1; + union REG_FUSION_FS_SE_FIX_OFFSET_0 FS_SE_FIX_OFFSET_0; + union REG_FUSION_FS_SE_FIX_OFFSET_1 FS_SE_FIX_OFFSET_1; + union REG_FUSION_FS_SE_FIX_OFFSET_2 FS_SE_FIX_OFFSET_2; + union REG_FUSION_FS_CALIB_OUT_0 FS_CALIB_OUT_0; + union REG_FUSION_FS_CALIB_OUT_1 FS_CALIB_OUT_1; + union REG_FUSION_FS_CALIB_OUT_2 FS_CALIB_OUT_2; + union REG_FUSION_FS_CALIB_OUT_3 FS_CALIB_OUT_3; + union REG_FUSION_FS_LMAP_DARK_THD FS_LMAP_DARK_THD; + union REG_FUSION_FS_LMAP_DARK_WGT FS_LMAP_DARK_WGT; + union REG_FUSION_FS_LMAP_DARK_WGT_SLOPE FS_LMAP_DARK_WGT_SLOPE; + union REG_FUSION_FS_LMAP_BRIT_THD FS_LMAP_BRIT_THD; + union REG_FUSION_FS_LMAP_BRIT_WGT FS_LMAP_BRIT_WGT; + union REG_FUSION_FS_LMAP_BRIT_WGT_SLOPE FS_LMAP_BRIT_WGT_SLOPE; +}; + +struct cvi_vip_isp_fswdr_config { + __u8 update; + __u8 enable; + __u8 mc_enable; + __u8 dc_mode; + __u8 luma_mode; + __u8 lmap_guide_dc_mode; + __u8 lmap_guide_luma_mode; + __u32 s_max; + __u8 fusion_type; + __u16 fusion_lwgt; + __u8 motion_ls_mode; + __u8 mmap_mrg_mode; + __u8 mmap_1_enable; + __u8 motion_ls_sel; + __u8 mmap_mrg_alph; + __u8 history_sel_2; + __u16 mmap_v_thd_l; + __u16 mmap_v_thd_h; + __u16 mmap_v_wgt_min; + __u16 mmap_v_wgt_max; + __s32 mmap_v_wgt_slp; + __u8 le_in_sel; + __u8 se_in_sel; + struct cvi_isp_fswdr_tun_cfg fswdr_cfg; + struct cvi_isp_fswdr_tun_2_cfg fswdr_2_cfg; + struct cvi_isp_fswdr_tun_3_cfg fswdr_3_cfg; +}; + +struct cvi_vip_isp_fswdr_report { + uint32_t cal_pix_num; + int32_t diff_sum_r; + int32_t diff_sum_g; + int32_t diff_sum_b; +}; + +struct cvi_vip_isp_ldci_tun_1_cfg { + union REG_ISP_LDCI_LUMA_WGT_MAX LDCI_LUMA_WGT_MAX; + union REG_ISP_LDCI_IDX_IIR_ALPHA LDCI_IDX_IIR_ALPHA; + union REG_ISP_LDCI_EDGE_SCALE LDCI_EDGE_SCALE; + union REG_ISP_LDCI_EDGE_CLAMP LDCI_EDGE_CLAMP; + union REG_ISP_LDCI_IDX_FILTER_NORM LDCI_IDX_FILTER_NORM; + union REG_ISP_LDCI_TONE_CURVE_IDX_00 LDCI_TONE_CURVE_IDX_00; +}; + +struct cvi_vip_isp_ldci_tun_2_cfg { + union REG_ISP_LDCI_BLK_SIZE_X LDCI_BLK_SIZE_X; + union REG_ISP_LDCI_BLK_SIZE_X1 LDCI_BLK_SIZE_X1; + union REG_ISP_LDCI_SUBBLK_SIZE_X LDCI_SUBBLK_SIZE_X; + union REG_ISP_LDCI_SUBBLK_SIZE_X1 LDCI_SUBBLK_SIZE_X1; + union REG_ISP_LDCI_INTERP_NORM_LR LDCI_INTERP_NORM_LR; + union REG_ISP_LDCI_SUB_INTERP_NORM_LR LDCI_SUB_INTERP_NORM_LR; + union REG_ISP_LDCI_MEAN_NORM_X LDCI_MEAN_NORM_X; + union REG_ISP_LDCI_VAR_NORM_Y LDCI_VAR_NORM_Y; + union REG_ISP_LDCI_UV_GAIN_MAX LDCI_UV_GAIN_MAX; +}; + +struct cvi_vip_isp_ldci_tun_3_cfg { + union REG_ISP_LDCI_IDX_FILTER_LUT_00 LDCI_IDX_FILTER_LUT_00; + union REG_ISP_LDCI_IDX_FILTER_LUT_02 LDCI_IDX_FILTER_LUT_02; + union REG_ISP_LDCI_IDX_FILTER_LUT_04 LDCI_IDX_FILTER_LUT_04; + union REG_ISP_LDCI_IDX_FILTER_LUT_06 LDCI_IDX_FILTER_LUT_06; + union REG_ISP_LDCI_IDX_FILTER_LUT_08 LDCI_IDX_FILTER_LUT_08; + union REG_ISP_LDCI_IDX_FILTER_LUT_10 LDCI_IDX_FILTER_LUT_10; + union REG_ISP_LDCI_IDX_FILTER_LUT_12 LDCI_IDX_FILTER_LUT_12; + union REG_ISP_LDCI_IDX_FILTER_LUT_14 LDCI_IDX_FILTER_LUT_14; + union REG_ISP_LDCI_INTERP_NORM_LR1 LDCI_INTERP_NORM_LR1; + union REG_ISP_LDCI_SUB_INTERP_NORM_LR1 LDCI_SUB_INTERP_NORM_LR1; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_00 LDCI_TONE_CURVE_LUT_00_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_02 LDCI_TONE_CURVE_LUT_00_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_04 LDCI_TONE_CURVE_LUT_00_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_06 LDCI_TONE_CURVE_LUT_00_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_08 LDCI_TONE_CURVE_LUT_00_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_10 LDCI_TONE_CURVE_LUT_00_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_12 LDCI_TONE_CURVE_LUT_00_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_00_14 LDCI_TONE_CURVE_LUT_00_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_00 LDCI_TONE_CURVE_LUT_01_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_02 LDCI_TONE_CURVE_LUT_01_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_04 LDCI_TONE_CURVE_LUT_01_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_06 LDCI_TONE_CURVE_LUT_01_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_08 LDCI_TONE_CURVE_LUT_01_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_10 LDCI_TONE_CURVE_LUT_01_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_12 LDCI_TONE_CURVE_LUT_01_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_01_14 LDCI_TONE_CURVE_LUT_01_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_00 LDCI_TONE_CURVE_LUT_02_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_02 LDCI_TONE_CURVE_LUT_02_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_04 LDCI_TONE_CURVE_LUT_02_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_06 LDCI_TONE_CURVE_LUT_02_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_08 LDCI_TONE_CURVE_LUT_02_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_10 LDCI_TONE_CURVE_LUT_02_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_12 LDCI_TONE_CURVE_LUT_02_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_02_14 LDCI_TONE_CURVE_LUT_02_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_00 LDCI_TONE_CURVE_LUT_03_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_02 LDCI_TONE_CURVE_LUT_03_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_04 LDCI_TONE_CURVE_LUT_03_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_06 LDCI_TONE_CURVE_LUT_03_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_08 LDCI_TONE_CURVE_LUT_03_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_10 LDCI_TONE_CURVE_LUT_03_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_12 LDCI_TONE_CURVE_LUT_03_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_03_14 LDCI_TONE_CURVE_LUT_03_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_00 LDCI_TONE_CURVE_LUT_04_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_02 LDCI_TONE_CURVE_LUT_04_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_04 LDCI_TONE_CURVE_LUT_04_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_06 LDCI_TONE_CURVE_LUT_04_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_08 LDCI_TONE_CURVE_LUT_04_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_10 LDCI_TONE_CURVE_LUT_04_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_12 LDCI_TONE_CURVE_LUT_04_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_04_14 LDCI_TONE_CURVE_LUT_04_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_00 LDCI_TONE_CURVE_LUT_05_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_02 LDCI_TONE_CURVE_LUT_05_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_04 LDCI_TONE_CURVE_LUT_05_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_06 LDCI_TONE_CURVE_LUT_05_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_08 LDCI_TONE_CURVE_LUT_05_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_10 LDCI_TONE_CURVE_LUT_05_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_12 LDCI_TONE_CURVE_LUT_05_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_05_14 LDCI_TONE_CURVE_LUT_05_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_00 LDCI_TONE_CURVE_LUT_06_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_02 LDCI_TONE_CURVE_LUT_06_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_04 LDCI_TONE_CURVE_LUT_06_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_06 LDCI_TONE_CURVE_LUT_06_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_08 LDCI_TONE_CURVE_LUT_06_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_10 LDCI_TONE_CURVE_LUT_06_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_12 LDCI_TONE_CURVE_LUT_06_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_06_14 LDCI_TONE_CURVE_LUT_06_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_00 LDCI_TONE_CURVE_LUT_07_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_02 LDCI_TONE_CURVE_LUT_07_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_04 LDCI_TONE_CURVE_LUT_07_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_06 LDCI_TONE_CURVE_LUT_07_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_08 LDCI_TONE_CURVE_LUT_07_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_10 LDCI_TONE_CURVE_LUT_07_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_12 LDCI_TONE_CURVE_LUT_07_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_07_14 LDCI_TONE_CURVE_LUT_07_14; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_00 LDCI_TONE_CURVE_LUT_P_00; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_02 LDCI_TONE_CURVE_LUT_P_02; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_04 LDCI_TONE_CURVE_LUT_P_04; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_06 LDCI_TONE_CURVE_LUT_P_06; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_08 LDCI_TONE_CURVE_LUT_P_08; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_10 LDCI_TONE_CURVE_LUT_P_10; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_12 LDCI_TONE_CURVE_LUT_P_12; + union REG_ISP_LDCI_TONE_CURVE_LUT_P_14 LDCI_TONE_CURVE_LUT_P_14; +}; + +struct cvi_vip_isp_ldci_tun_4_cfg { + union REG_ISP_LDCI_LUMA_WGT_LUT_00 LDCI_LUMA_WGT_LUT_00; + union REG_ISP_LDCI_LUMA_WGT_LUT_04 LDCI_LUMA_WGT_LUT_04; + union REG_ISP_LDCI_LUMA_WGT_LUT_08 LDCI_LUMA_WGT_LUT_08; + union REG_ISP_LDCI_LUMA_WGT_LUT_12 LDCI_LUMA_WGT_LUT_12; + union REG_ISP_LDCI_LUMA_WGT_LUT_16 LDCI_LUMA_WGT_LUT_16; + union REG_ISP_LDCI_LUMA_WGT_LUT_20 LDCI_LUMA_WGT_LUT_20; + union REG_ISP_LDCI_LUMA_WGT_LUT_24 LDCI_LUMA_WGT_LUT_24; + union REG_ISP_LDCI_LUMA_WGT_LUT_28 LDCI_LUMA_WGT_LUT_28; + union REG_ISP_LDCI_LUMA_WGT_LUT_32 LDCI_LUMA_WGT_LUT_32; +}; + +struct cvi_vip_isp_ldci_tun_5_cfg { + union REG_ISP_LDCI_VAR_FILTER_LUT_00 LDCI_VAR_FILTER_LUT_00; + union REG_ISP_LDCI_VAR_FILTER_LUT_02 LDCI_VAR_FILTER_LUT_02; + union REG_ISP_LDCI_VAR_FILTER_LUT_04 LDCI_VAR_FILTER_LUT_04; +}; + +struct cvi_vip_isp_ldci_config { + __u8 update; + __u8 enable; + __u8 stats_enable; + __u8 map_enable; + __u8 uv_gain_enable; + __u8 first_frame_enable; + __u8 image_size_div_by_16x12; + __u16 strength; + struct cvi_vip_isp_ldci_tun_1_cfg ldci_1_cfg; + struct cvi_vip_isp_ldci_tun_2_cfg ldci_2_cfg; + struct cvi_vip_isp_ldci_tun_3_cfg ldci_3_cfg; + struct cvi_vip_isp_ldci_tun_4_cfg ldci_4_cfg; + struct cvi_vip_isp_ldci_tun_5_cfg ldci_5_cfg; +}; + +struct cvi_vip_isp_ycur_config { + __u8 update; + __u8 enable; + __u8 lut[64]; + __u16 lut_256; +}; + +struct cvi_vip_isp_dci_config { + __u8 update; + __u8 enable; + __u8 map_enable; + __u8 demo_mode; + __u16 map_lut[256]; + __u8 per1sample_enable; + __u8 hist_enable; +}; + +struct cvi_vip_isp_dhz_luma_tun_cfg { + union REG_ISP_DEHAZE_9 LUMA_00; + union REG_ISP_DEHAZE_10 LUMA_04; + union REG_ISP_DEHAZE_11 LUMA_08; + union REG_ISP_DEHAZE_12 LUMA_12; +}; + +struct cvi_vip_isp_dhz_skin_tun_cfg { + union REG_ISP_DEHAZE_17 SKIN_00; + union REG_ISP_DEHAZE_18 SKIN_04; + union REG_ISP_DEHAZE_19 SKIN_08; + union REG_ISP_DEHAZE_20 SKIN_12; +}; + +struct cvi_vip_isp_dhz_tmap_tun_cfg { + union REG_ISP_DEHAZE_TMAP_00 TMAP_00; + union REG_ISP_DEHAZE_TMAP_01 TMAP_01; + union REG_ISP_DEHAZE_TMAP_02 TMAP_02; + union REG_ISP_DEHAZE_TMAP_03 TMAP_03; + union REG_ISP_DEHAZE_TMAP_04 TMAP_04; + union REG_ISP_DEHAZE_TMAP_05 TMAP_05; + union REG_ISP_DEHAZE_TMAP_06 TMAP_06; + union REG_ISP_DEHAZE_TMAP_07 TMAP_07; + union REG_ISP_DEHAZE_TMAP_08 TMAP_08; + union REG_ISP_DEHAZE_TMAP_09 TMAP_09; + union REG_ISP_DEHAZE_TMAP_10 TMAP_10; + union REG_ISP_DEHAZE_TMAP_11 TMAP_11; + union REG_ISP_DEHAZE_TMAP_12 TMAP_12; + union REG_ISP_DEHAZE_TMAP_13 TMAP_13; + union REG_ISP_DEHAZE_TMAP_14 TMAP_14; + union REG_ISP_DEHAZE_TMAP_15 TMAP_15; + union REG_ISP_DEHAZE_TMAP_16 TMAP_16; + union REG_ISP_DEHAZE_TMAP_17 TMAP_17; + union REG_ISP_DEHAZE_TMAP_18 TMAP_18; + union REG_ISP_DEHAZE_TMAP_19 TMAP_19; + union REG_ISP_DEHAZE_TMAP_20 TMAP_20; + union REG_ISP_DEHAZE_TMAP_21 TMAP_21; + union REG_ISP_DEHAZE_TMAP_22 TMAP_22; + union REG_ISP_DEHAZE_TMAP_23 TMAP_23; + union REG_ISP_DEHAZE_TMAP_24 TMAP_24; + union REG_ISP_DEHAZE_TMAP_25 TMAP_25; + union REG_ISP_DEHAZE_TMAP_26 TMAP_26; + union REG_ISP_DEHAZE_TMAP_27 TMAP_27; + union REG_ISP_DEHAZE_TMAP_28 TMAP_28; + union REG_ISP_DEHAZE_TMAP_29 TMAP_29; + union REG_ISP_DEHAZE_TMAP_30 TMAP_30; + union REG_ISP_DEHAZE_TMAP_31 TMAP_31; + union REG_ISP_DEHAZE_TMAP_32 TMAP_32; +}; + +/* struct cvi_vip_isp_dhz_config + * @param strength: (0~127) dehaze strength + * @param th_smooth: (0~1023) threshold for edge/smooth classification. + */ +struct cvi_vip_isp_dhz_config { + __u8 update; + __u8 enable; + __u8 strength; + __u16 cum_th; + __u16 hist_th; + __u16 tmap_min; + __u16 tmap_max; + __u16 th_smooth; + __u8 luma_lut_enable; + __u8 skin_lut_enable; + __u8 a_luma_wgt; + __u8 blend_wgt; + __u8 tmap_scale; + __u8 d_wgt; + __u16 sw_dc_th; + __u16 sw_aglobal_r; + __u16 sw_aglobal_g; + __u16 sw_aglobal_b; + __u16 aglobal_max; + __u16 aglobal_min; + __u8 skin_cb; + __u8 skin_cr; + struct cvi_vip_isp_dhz_luma_tun_cfg luma_cfg; + struct cvi_vip_isp_dhz_skin_tun_cfg skin_cfg; + struct cvi_vip_isp_dhz_tmap_tun_cfg tmap_cfg; +}; + +struct cvi_isp_rgbcac_tun_cfg { + union REG_ISP_RGBCAC_PURPLE_TH RGBCAC_PURPLE_TH; + union REG_ISP_RGBCAC_PURPLE_CBCR RGBCAC_PURPLE_CBCR; + union REG_ISP_RGBCAC_PURPLE_CBCR2 RGBCAC_PURPLE_CBCR2; + union REG_ISP_RGBCAC_PURPLE_CBCR3 RGBCAC_PURPLE_CBCR3; + union REG_ISP_RGBCAC_GREEN_CBCR RGBCAC_GREEN_CBCR; + union REG_ISP_RGBCAC_EDGE_CORING RGBCAC_EDGE_CORING; + union REG_ISP_RGBCAC_DEPURPLE_STR_RATIO_MIN RGBCAC_DEPURPLE_STR_RATIO_MIN; + union REG_ISP_RGBCAC_DEPURPLE_STR_RATIO_MAX RGBCAC_DEPURPLE_STR_RATIO_MAX; + union REG_ISP_RGBCAC_EDGE_WGT_LUT0 RGBCAC_EDGE_WGT_LUT0; + union REG_ISP_RGBCAC_EDGE_WGT_LUT1 RGBCAC_EDGE_WGT_LUT1; + union REG_ISP_RGBCAC_EDGE_WGT_LUT2 RGBCAC_EDGE_WGT_LUT2; + union REG_ISP_RGBCAC_EDGE_WGT_LUT3 RGBCAC_EDGE_WGT_LUT3; + union REG_ISP_RGBCAC_EDGE_WGT_LUT4 RGBCAC_EDGE_WGT_LUT4; + union REG_ISP_RGBCAC_LUMA RGBCAC_LUMA; + union REG_ISP_RGBCAC_LUMA_BLEND RGBCAC_LUMA_BLEND; + union REG_ISP_RGBCAC_LUMA_FILTER0 RGBCAC_LUMA_FILTER0; + union REG_ISP_RGBCAC_LUMA_FILTER1 RGBCAC_LUMA_FILTER1; + union REG_ISP_RGBCAC_VAR_FILTER0 RGBCAC_VAR_FILTER0; + union REG_ISP_RGBCAC_VAR_FILTER1 RGBCAC_VAR_FILTER1; + union REG_ISP_RGBCAC_CHROMA_FILTER0 RGBCAC_CHROMA_FILTER0; + union REG_ISP_RGBCAC_CHROMA_FILTER1 RGBCAC_CHROMA_FILTER1; + union REG_ISP_RGBCAC_CBCR_STR RGBCAC_CBCR_STR; +}; + +struct cvi_vip_isp_rgbcac_config { + __u8 update; + __u8 enable; + __u8 out_sel; + struct cvi_isp_rgbcac_tun_cfg rgbcac_cfg; +}; + +struct cvi_isp_cac_tun_cfg { + union REG_ISP_CNR_PURPLE_CB CNR_PURPLE_CB; + union REG_ISP_CNR_GREEN_CB CNR_GREEN_CB; +}; + +struct cvi_isp_cac_2_tun_cfg { + union REG_ISP_CNR_EDGE_SCALE CNR_EDGE_SCALE; + union REG_ISP_CNR_EDGE_RATIO_SPEED CNR_EDGE_RATIO_SPEED; + union REG_ISP_CNR_DEPURPLE_WEIGHT_TH CNR_DEPURPLE_WEIGHT_TH; +}; + +struct cvi_isp_cac_3_tun_cfg { + union REG_ISP_CNR_EDGE_SCALE_LUT_0 CNR_EDGE_SCALE_LUT_0; + union REG_ISP_CNR_EDGE_SCALE_LUT_4 CNR_EDGE_SCALE_LUT_4; + union REG_ISP_CNR_EDGE_SCALE_LUT_8 CNR_EDGE_SCALE_LUT_8; + union REG_ISP_CNR_EDGE_SCALE_LUT_12 CNR_EDGE_SCALE_LUT_12; + union REG_ISP_CNR_EDGE_SCALE_LUT_16 CNR_EDGE_SCALE_LUT_16; +}; + +struct cvi_vip_isp_cac_config { + __u8 update; + __u8 enable; + __u8 out_sel; + __u8 purple_th; + __u8 correct_strength; + __u8 purple_cb2; + __u8 purple_cr2; + __u8 purple_cb3; + __u8 purple_cr3; + struct cvi_isp_cac_tun_cfg cac_cfg; + struct cvi_isp_cac_2_tun_cfg cac_2_cfg; + struct cvi_isp_cac_3_tun_cfg cac_3_cfg; +}; + +struct cvi_isp_lcac_tun_cfg { + union REG_ISP_LCAC_REG04 REG04; + union REG_ISP_LCAC_REG08 REG08; + union REG_ISP_LCAC_REG0C REG0C; + union REG_ISP_LCAC_REG10 REG10; + union REG_ISP_LCAC_REG14 REG14; + union REG_ISP_LCAC_REG18 REG18; + union REG_ISP_LCAC_REG1C REG1C; + union REG_ISP_LCAC_REG20 REG20; + union REG_ISP_LCAC_REG24 REG24; + union REG_ISP_LCAC_REG28 REG28; + union REG_ISP_LCAC_REG2C REG2C; + union REG_ISP_LCAC_REG30 REG30; + union REG_ISP_LCAC_REG34 REG34; + union REG_ISP_LCAC_REG38 REG38; + union REG_ISP_LCAC_REG3C REG3C; + union REG_ISP_LCAC_REG40 REG40; + union REG_ISP_LCAC_REG44 REG44; + union REG_ISP_LCAC_REG48 REG48; + union REG_ISP_LCAC_REG4C REG4C; +}; + +struct cvi_isp_lcac_2_tun_cfg { + union REG_ISP_LCAC_REG50 REG50; + union REG_ISP_LCAC_REG54 REG54; + union REG_ISP_LCAC_REG58 REG58; + union REG_ISP_LCAC_REG5C REG5C; + union REG_ISP_LCAC_REG60 REG60; + union REG_ISP_LCAC_REG64 REG64; + union REG_ISP_LCAC_REG68 REG68; + union REG_ISP_LCAC_REG6C REG6C; +}; + +struct cvi_isp_lcac_3_tun_cfg { + union REG_ISP_LCAC_REG70 REG70; + union REG_ISP_LCAC_REG74 REG74; + union REG_ISP_LCAC_REG78 REG78; + union REG_ISP_LCAC_REG7C REG7C; + union REG_ISP_LCAC_REG80 REG80; + union REG_ISP_LCAC_REG84 REG84; + union REG_ISP_LCAC_REG88 REG88; + union REG_ISP_LCAC_REG8C REG8C; +}; + +struct cvi_vip_isp_lcac_config { + __u8 update; + __u8 enable; + __u8 out_sel; + __u8 lti_luma_lut_32; + __u8 fcf_luma_lut_32; + struct cvi_isp_lcac_tun_cfg lcac_cfg; + struct cvi_isp_lcac_2_tun_cfg lcac_2_cfg; + struct cvi_isp_lcac_3_tun_cfg lcac_3_cfg; +}; + +struct cvi_vip_isp_csc_config { + __u8 update; + __u8 enable; + __s16 coeff[9]; + __s16 offset[3]; +}; + +struct cvi_isp_dpc_tun_cfg { + union REG_ISP_DPC_3 DPC_3; + union REG_ISP_DPC_4 DPC_4; + union REG_ISP_DPC_5 DPC_5; + union REG_ISP_DPC_6 DPC_6; + union REG_ISP_DPC_7 DPC_7; + union REG_ISP_DPC_8 DPC_8; + union REG_ISP_DPC_9 DPC_9; +}; + +struct cvi_vip_isp_dpc_config { + __u8 update; + __u8 inst; + __u8 enable; + __u8 staticbpc_enable; + __u8 dynamicbpc_enable; + __u8 cluster_size; + __u32 bp_tbl[2047]; + __u16 bp_cnt; + struct cvi_isp_dpc_tun_cfg dpc_cfg; +}; + +struct cvi_isp_ae_tun_cfg { + union REG_ISP_AE_HIST_AE_FACE0_ENABLE AE_FACE0_ENABLE; + union REG_ISP_AE_HIST_AE_FACE0_STS_DIV AE_FACE0_STS_DIV; + union REG_ISP_AE_HIST_AE_FACE1_STS_DIV AE_FACE1_STS_DIV; + union REG_ISP_AE_HIST_AE_FACE2_STS_DIV AE_FACE2_STS_DIV; + union REG_ISP_AE_HIST_AE_FACE3_STS_DIV AE_FACE3_STS_DIV; + union REG_ISP_AE_HIST_STS_ENABLE STS_ENABLE; + union REG_ISP_AE_HIST_AE_ALGO_ENABLE AE_ALGO_ENABLE; + union REG_ISP_AE_HIST_AE_HIST_LOW AE_HIST_LOW; + union REG_ISP_AE_HIST_AE_HIST_HIGH AE_HIST_HIGH; + union REG_ISP_AE_HIST_AE_TOP AE_TOP; + union REG_ISP_AE_HIST_AE_BOT AE_BOT; + union REG_ISP_AE_HIST_AE_OVEREXP_THR AE_OVEREXP_THR; + union REG_ISP_AE_HIST_AE_NUM_GAPLINE AE_NUM_GAPLINE; +}; + +struct cvi_isp_ae_2_tun_cfg { + union REG_ISP_AE_HIST_AE_WGT_00 AE_WGT_00; + union REG_ISP_AE_HIST_AE_WGT_01 AE_WGT_01; + union REG_ISP_AE_HIST_AE_WGT_02 AE_WGT_02; + union REG_ISP_AE_HIST_AE_WGT_03 AE_WGT_03; + union REG_ISP_AE_HIST_AE_WGT_04 AE_WGT_04; + union REG_ISP_AE_HIST_AE_WGT_05 AE_WGT_05; + union REG_ISP_AE_HIST_AE_WGT_06 AE_WGT_06; + union REG_ISP_AE_HIST_AE_WGT_07 AE_WGT_07; + union REG_ISP_AE_HIST_AE_WGT_08 AE_WGT_08; + union REG_ISP_AE_HIST_AE_WGT_09 AE_WGT_09; + union REG_ISP_AE_HIST_AE_WGT_10 AE_WGT_10; + union REG_ISP_AE_HIST_AE_WGT_11 AE_WGT_11; + union REG_ISP_AE_HIST_AE_WGT_12 AE_WGT_12; + union REG_ISP_AE_HIST_AE_WGT_13 AE_WGT_13; + union REG_ISP_AE_HIST_AE_WGT_14 AE_WGT_14; + union REG_ISP_AE_HIST_AE_WGT_15 AE_WGT_15; + union REG_ISP_AE_HIST_AE_WGT_16 AE_WGT_16; + union REG_ISP_AE_HIST_AE_WGT_17 AE_WGT_17; + union REG_ISP_AE_HIST_AE_WGT_18 AE_WGT_18; + union REG_ISP_AE_HIST_AE_WGT_19 AE_WGT_19; + union REG_ISP_AE_HIST_AE_WGT_20 AE_WGT_20; + union REG_ISP_AE_HIST_AE_WGT_21 AE_WGT_21; + union REG_ISP_AE_HIST_AE_WGT_22 AE_WGT_22; + union REG_ISP_AE_HIST_AE_WGT_23 AE_WGT_23; + union REG_ISP_AE_HIST_AE_WGT_24 AE_WGT_24; + union REG_ISP_AE_HIST_AE_WGT_25 AE_WGT_25; + union REG_ISP_AE_HIST_AE_WGT_26 AE_WGT_26; + union REG_ISP_AE_HIST_AE_WGT_27 AE_WGT_27; + union REG_ISP_AE_HIST_AE_WGT_28 AE_WGT_28; + union REG_ISP_AE_HIST_AE_WGT_29 AE_WGT_29; + union REG_ISP_AE_HIST_AE_WGT_30 AE_WGT_30; + union REG_ISP_AE_HIST_AE_WGT_31 AE_WGT_31; +}; + +struct cvi_vip_isp_ae_config { + __u8 update; + __u8 inst; + __u8 ae_enable; + __u16 ae_offsetx; + __u16 ae_offsety; + __u8 ae_numx; + __u8 ae_numy; + __u16 ae_width; + __u16 ae_height; + __u16 ae_sts_div; + __u16 ae_face_offset_x[4]; + __u16 ae_face_offset_y[4]; + __u8 ae_face_size_minus1_x[4]; + __u8 ae_face_size_minus1_y[4]; + struct cvi_isp_ae_tun_cfg ae_cfg; + struct cvi_isp_ae_2_tun_cfg ae_2_cfg; +}; + +struct cvi_isp_ge_tun_cfg { + union REG_ISP_DPC_10 DPC_10; + union REG_ISP_DPC_11 DPC_11; + union REG_ISP_DPC_12 DPC_12; + union REG_ISP_DPC_13 DPC_13; + union REG_ISP_DPC_14 DPC_14; + union REG_ISP_DPC_15 DPC_15; + union REG_ISP_DPC_16 DPC_16; +}; + +struct cvi_vip_isp_ge_config { + __u8 update; + __u8 inst; + __u8 enable; + struct cvi_isp_ge_tun_cfg ge_cfg; +}; + +struct cvi_vip_isp_af_config { + __u8 update; + __u8 inst; + __u8 enable; + __u8 dpc_enable; + __u8 hlc_enable; + __u8 square_enable; + __u8 outshift; + __u8 num_gapline; + __u16 offsetx; + __u16 offsety; + __u16 block_width; + __u16 block_height; + __u8 block_numx; + __u8 block_numy; + __u8 h_low_pass_value_shift; + __u32 h_corning_offset_0; + __u32 h_corning_offset_1; + __u16 v_corning_offset; + __u16 high_luma_threshold; + __u8 h_low_pass_coef[5]; + __u8 h_high_pass_coef_0[5]; + __u8 h_high_pass_coef_1[5]; + __u8 v_high_pass_coef[3]; + __u8 th_low; + __u8 th_high; + __u8 gain_low; + __u8 gain_high; + __u8 slop_low; + __u8 slop_high; +}; + +struct cvi_vip_isp_hist_v_config { + __u8 update; + __u8 enable; + __u8 luma_mode; + __u16 offset_x; + __u16 offset_y; +}; + +struct cvi_vip_isp_gms_config { + __u8 update; + __u8 inst; + __u8 enable; + __u16 offset_x; + __u16 offset_y; + __u16 x_section_size; + __u16 y_section_size; + __u8 x_gap; + __u8 y_gap; +}; + +struct cvi_vip_isp_mono_config { + __u8 update; + __u8 force_mono_enable; +}; + +#if 0 +struct cvi_vip_isp_3dlut_config { + __u8 update; + __u8 enable; + __u8 h_clamp_wrap_opt; + __u16 h_lut[3276]; + __u16 s_lut[3276]; + __u16 v_lut[3276]; +}; + +struct cvi_vip_isp_lscr_config { + __u8 update; + __u8 inst; + __u8 enable; + __u16 strength; + __u16 strength_ir; + __u16 norm; + __u16 norm_ir; + __u16 centerx; + __u16 centery; + __u16 gain_lut[32]; + __u16 gain_lut1[32]; + __u16 gain_lut2[32]; + __u16 gain_lut_ir[32]; +}; + +struct cvi_vip_isp_awb_config { + __u8 update; + __u8 inst; + __u8 enable; + __u8 bayer_start; + __u16 awb_offsetx; + __u16 awb_offsety; + __u16 awb_sub_win_w; + __u16 awb_sub_win_h; + __u8 awb_numx; + __u8 awb_numy; + __u8 corner_avg_en; + __u8 corner_size; + __u8 awb_sts_div; + __u16 r_lower_bound; + __u16 r_upper_bound; + __u16 g_lower_bound; + __u16 g_upper_bound; + __u16 b_lower_bound; + __u16 b_upper_bound; +}; + +struct cvi_vip_isp_hsv_config { + __u8 update; + __u8 enable; + __u8 htune_enable; + __u8 stune_enable; + __u8 hsgain_enable; + __u8 hvgain_enable; + __u16 h_lut[769]; + __u16 s_lut[513]; + __u16 sgain_lut[769]; + __u16 vgain_lut[769]; +}; + +struct cvi_vip_isp_preproc_config { + __u8 update; + __u8 inst; + __u8 enable; + __s16 r_ir_ratio[128]; + __s16 g_ir_ratio[128]; + __s16 b_ir_ratio[128]; + __u8 w_lut[128]; +}; + +#endif + +struct cvi_vip_isp_fe_tun_cfg { + struct cvi_vip_isp_blc_config blc_cfg[2]; + struct cvi_vip_isp_wbg_config wbg_cfg[2]; +}; + +struct cvi_vip_isp_be_tun_cfg { + struct cvi_vip_isp_blc_config blc_cfg[2]; + struct cvi_vip_isp_dpc_config dpc_cfg[2]; + struct cvi_vip_isp_ge_config ge_cfg[2]; + struct cvi_vip_isp_af_config af_cfg; +}; + +struct cvi_vip_isp_post_tun_cfg { + struct cvi_vip_isp_bnr_config bnr_cfg; + struct cvi_vip_isp_lsc_config lsc_cfg; + struct cvi_vip_isp_ae_config ae_cfg[2]; + struct cvi_vip_isp_rgbcac_config rgbcac_cfg; + struct cvi_vip_isp_lcac_config lcac_cfg; + struct cvi_vip_isp_wbg_config wbg_cfg[2]; + struct cvi_vip_isp_ccm_config ccm_cfg[2]; + struct cvi_vip_isp_ygamma_config ygamma_cfg; + struct cvi_vip_isp_gamma_config gamma_cfg; + struct cvi_vip_isp_dhz_config dhz_cfg; + struct cvi_vip_isp_csc_config csc_cfg; + struct cvi_vip_isp_dci_config dci_cfg; + struct cvi_vip_isp_ldci_config ldci_cfg; + struct cvi_vip_isp_pre_ee_config pre_ee_cfg; + struct cvi_vip_isp_tnr_config tnr_cfg; + struct cvi_vip_isp_cnr_config cnr_cfg; + struct cvi_vip_isp_cac_config cac_cfg; + struct cvi_vip_isp_ynr_config ynr_cfg; + struct cvi_vip_isp_ee_config ee_cfg; + struct cvi_vip_isp_cacp_config cacp_cfg; + struct cvi_vip_isp_ca2_config ca2_cfg; + struct cvi_vip_isp_ycur_config ycur_cfg; + struct cvi_vip_isp_demosiac_config demosiac_cfg; + struct cvi_vip_isp_clut_config clut_cfg; + struct cvi_vip_isp_drc_config drc_cfg; + struct cvi_vip_isp_fswdr_config fswdr_cfg; + struct cvi_vip_isp_hist_v_config hist_v_cfg; + struct cvi_vip_isp_gms_config gms_cfg; + struct cvi_vip_isp_mono_config mono_cfg; +}; + +struct cvi_vip_isp_fe_cfg { + uint8_t tun_update[TUNING_NODE_NUM]; + uint8_t tun_idx; + struct cvi_vip_isp_fe_tun_cfg tun_cfg[TUNING_NODE_NUM]; +}; + +struct cvi_vip_isp_be_cfg { + uint8_t tun_update[TUNING_NODE_NUM]; + uint8_t tun_idx; + struct cvi_vip_isp_be_tun_cfg tun_cfg[TUNING_NODE_NUM]; +}; + +struct cvi_vip_isp_post_cfg { + uint8_t tun_update[TUNING_NODE_NUM]; + uint8_t tun_idx; + struct cvi_vip_isp_post_tun_cfg tun_cfg[TUNING_NODE_NUM]; +}; + +struct isp_tuning_cfg { + uint64_t fe_addr[ISP_PRERAW_MAX]; + void *fe_vir[ISP_PRERAW_MAX]; +#ifdef __arm__ + __u32 fe_padding[ISP_PRERAW_MAX]; +#endif + uint64_t be_addr[ISP_PRERAW_MAX]; + void *be_vir[ISP_PRERAW_MAX]; +#ifdef __arm__ + __u32 be_padding[ISP_PRERAW_MAX]; +#endif + uint64_t post_addr[ISP_PRERAW_MAX]; + void *post_vir[ISP_PRERAW_MAX]; +#ifdef __arm__ + __u32 post_padding[ISP_PRERAW_MAX]; +#endif +}; + +#ifdef __cplusplus +} +#endif + +#endif /* _U_CVI_VIP_TUN_CFG_H_ */ diff --git a/freertos/cvitek/install/include/hal/cif/cif_drv.h b/freertos/cvitek/install/include/hal/cif/cif_drv.h new file mode 100644 index 000000000..da95545e2 --- /dev/null +++ b/freertos/cvitek/install/include/hal/cif/cif_drv.h @@ -0,0 +1,531 @@ +#ifndef _CIF_DRV_H_ +#define _CIF_DRV_H_ + +#define MAX_LINK_NUM 3 +#define MAX_HDR_FRAME_NUM 2 +#define MAX_VC_NUM 4 + + +#define EXPORT_SYMBOL_GPL(x) + +#ifndef _OFST +#define _OFST(_BLK_T, _REG) ((uintptr_t)&(((struct _BLK_T *)0)->_REG)) +#endif + +#define CIF_RD_REG(_BA, _BLK_T, _REG) \ + (_reg_read(_BA+_OFST(_BLK_T, _REG))) + +#define CIF_RD_BITS(_BA, _BLK_T, _REG, _FLD) \ + ({\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = _reg_read(_BA+_OFST(_BLK_T, _REG));\ + _r.bits._FLD;\ + }) + +#define CIF_WR_REG(_BA, _BLK_T, _REG, _V) \ + (_reg_write((_BA+_OFST(_BLK_T, _REG)), _V)) + +#define CIF_WR_BITS(_BA, _BLK_T, _REG, _FLD, _V) \ + do {\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = _reg_read(_BA+_OFST(_BLK_T, _REG));\ + _r.bits._FLD = _V;\ + _reg_write((_BA+_OFST(_BLK_T, _REG)), _r.raw);\ + } while (0) + +#define CIF_WR_BITS_GRP2(_BA, _BLK_T, _REG, _FLD1, _V1, _FLD2, _V2) \ + do {\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = _reg_read(_BA+_OFST(_BLK_T, _REG));\ + _r.bits._FLD1 = _V1;\ + _r.bits._FLD2 = _V2;\ + _reg_write((_BA+_OFST(_BLK_T, _REG)), _r.raw);\ + } while (0) + +#define CIF_WR_BITS_GRP3(_BA, _BLK_T, _REG, _FLD1, _V1, _FLD2, _V2, \ + _FLD3, _V3) \ + do {\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = _reg_read(_BA+_OFST(_BLK_T, _REG));\ + _r.bits._FLD1 = _V1;\ + _r.bits._FLD2 = _V2;\ + _r.bits._FLD3 = _V3;\ + _reg_write((_BA+_OFST(_BLK_T, _REG)), _r.raw);\ + } while (0) + +#define CIF_WO_BITS(_BA, _BLK_T, _REG, _FLD, _V) \ + do {\ + typeof(((struct _BLK_T *)0)->_REG) _r;\ + _r.raw = 0;\ + _r.bits._FLD = _V;\ + _reg_write((_BA+_OFST(_BLK_T, _REG)), _r.raw);\ + } while (0) + +#define CIF_INT_STS_ECC_ERR_OFFSET 0U +#define CIF_INT_STS_CRC_ERR_OFFSET 1U +#define CIF_INT_STS_HDR_ERR_OFFSET 2U +#define CIF_INT_STS_WC_ERR_OFFSET 3U +#define CIF_INT_STS_FIFO_FULL_OFFSET 4U + +#define CIF_INT_STS_ECC_ERR_MASK (1U<> CIF_BLK_REGS_BITW) \ + & ((1 << CIF_BLK_ID_BITW) - 1)) + +/* CIF REG FIELD DEFINE */ + +/* CIF CSI MAC BLOCK ADDR OFFSET DEFINE */ +#define CIF_MAC_BLK_BA_TOP (0x00000000) //sensor mac +#define CIF_MAC_BLK_BA_SLVDS (0x00000200) //subLVDS +#define CIF_MAC_BLK_BA_CSI (0x00000400) //csi_ctrl_top + +enum CIF_MAC_BLK_ID_T { + CIF_MAC_BLK_ID_TOP = MAP_CIF_BLOCK_ID(CIF_MAC_BLK_BA_TOP), + CIF_MAC_BLK_ID_SLVDS = MAP_CIF_BLOCK_ID(CIF_MAC_BLK_BA_SLVDS), + CIF_MAC_BLK_ID_CSI = MAP_CIF_BLOCK_ID(CIF_MAC_BLK_BA_CSI), + CIF_MAC_BLK_ID_MAX +}; + +/* CIF CSI WRAP BLOCK ADDR OFFSET DEFINE */ +#define CIF_WRAP_BLK_BA_TOP (0x00000000) +#define CIF_WRAP_BLK_BA_4L (0x00000300) +#define CIF_WRAP_BLK_BA_2L (0x00000600) + +enum CIF_WRAP_BLK_ID_T { + CIF_WRAP_BLK_ID_TOP = MAP_CIF_BLOCK_ID(CIF_WRAP_BLK_BA_TOP), + CIF_WRAP_BLK_ID_4L = MAP_CIF_BLOCK_ID(CIF_WRAP_BLK_BA_4L), + CIF_WRAP_BLK_ID_2L = MAP_CIF_BLOCK_ID(CIF_WRAP_BLK_BA_2L), + CIF_WRAP_BLK_ID_MAX +}; + +#endif //_CIF_REG_H_ diff --git a/freertos/cvitek/install/include/hal/cif/reg_blocks_csi_mac.h b/freertos/cvitek/install/include/hal/cif/reg_blocks_csi_mac.h new file mode 100644 index 000000000..c0d2daba9 --- /dev/null +++ b/freertos/cvitek/install/include/hal/cif/reg_blocks_csi_mac.h @@ -0,0 +1,174 @@ +#ifndef _REG_BLOCKS_CSI_MAC_H_ +#define _REG_BLOCKS_CSI_MAC_H_ + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_SENSOR_MAC_T { + union REG_SENSOR_MAC_00 REG_00; + uint32_t _resv_0x4[3]; + union REG_SENSOR_MAC_10 REG_10; + union REG_SENSOR_MAC_14 REG_14; + union REG_SENSOR_MAC_18 REG_18; + union REG_SENSOR_MAC_1C REG_1C; + union REG_SENSOR_MAC_20 REG_20; + union REG_SENSOR_MAC_24 REG_24; + union REG_SENSOR_MAC_28 REG_28; + uint32_t _resv_0x2c[1]; + union REG_SENSOR_MAC_30 REG_30; + union REG_SENSOR_MAC_34 REG_34; + uint32_t _resv_0x38[2]; + union REG_SENSOR_MAC_40 REG_40; + union REG_SENSOR_MAC_44 REG_44; + union REG_SENSOR_MAC_48 REG_48; + union REG_SENSOR_MAC_4C REG_4C; + union REG_SENSOR_MAC_50 REG_50; + union REG_SENSOR_MAC_54 REG_54; + union REG_SENSOR_MAC_58 REG_58; + uint32_t _resv_0x5c[1]; + union REG_SENSOR_MAC_60 REG_60; + union REG_SENSOR_MAC_64 REG_64; + union REG_SENSOR_MAC_68 REG_68; + union REG_SENSOR_MAC_6C REG_6C; + union REG_SENSOR_MAC_70 REG_70; + union REG_SENSOR_MAC_74 REG_74; + uint32_t _resv_0x78[2]; + union REG_SENSOR_MAC_80 REG_80; + union REG_SENSOR_MAC_84 REG_84; + union REG_SENSOR_MAC_88 REG_88; + union REG_SENSOR_MAC_8C REG_8C; + union REG_SENSOR_MAC_90 REG_90; + union REG_SENSOR_MAC_94 REG_94; + union REG_SENSOR_MAC_98 REG_98; + union REG_SENSOR_MAC_9C REG_9C; + union REG_SENSOR_MAC_A0 REG_A0; + union REG_SENSOR_MAC_A4 REG_A4; + union REG_SENSOR_MAC_A8 REG_A8; + uint32_t _resv_0xac[1]; + union REG_SENSOR_MAC_B0 REG_B0; + union REG_SENSOR_MAC_B4 REG_B4; + union REG_SENSOR_MAC_B8 REG_B8; + union REG_SENSOR_MAC_BC REG_BC; + union REG_SENSOR_MAC_C0 REG_C0; + union REG_SENSOR_MAC_C4 REG_C4; + union REG_SENSOR_MAC_C8 REG_C8; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_SUBLVDS_CTRL_TOP_T { + union REG_SUBLVDS_CTRL_TOP_00 REG_00; + union REG_SUBLVDS_CTRL_TOP_04 REG_04; + union REG_SUBLVDS_CTRL_TOP_08 REG_08; + union REG_SUBLVDS_CTRL_TOP_0C REG_0C; + union REG_SUBLVDS_CTRL_TOP_10 REG_10; + union REG_SUBLVDS_CTRL_TOP_14 REG_14; + union REG_SUBLVDS_CTRL_TOP_18 REG_18; + union REG_SUBLVDS_CTRL_TOP_1C REG_1C; + union REG_SUBLVDS_CTRL_TOP_20 REG_20; + union REG_SUBLVDS_CTRL_TOP_24 REG_24; + union REG_SUBLVDS_CTRL_TOP_28 REG_28; + union REG_SUBLVDS_CTRL_TOP_2C REG_2C; + union REG_SUBLVDS_CTRL_TOP_30 REG_30; + uint32_t _resv_0x34[3]; + union REG_SUBLVDS_CTRL_TOP_40 REG_40; + uint32_t _resv_0x44[3]; + union REG_SUBLVDS_CTRL_TOP_50 REG_50; + union REG_SUBLVDS_CTRL_TOP_54 REG_54; + union REG_SUBLVDS_CTRL_TOP_58 REG_58; + uint32_t _resv_0x5c[1]; + union REG_SUBLVDS_CTRL_TOP_60 REG_60; + union REG_SUBLVDS_CTRL_TOP_64 REG_64; + union REG_SUBLVDS_CTRL_TOP_68 REG_68; + union REG_SUBLVDS_CTRL_TOP_6C REG_6C; + union REG_SUBLVDS_CTRL_TOP_70 REG_70; + union REG_SUBLVDS_CTRL_TOP_74 REG_74; + uint32_t _resv_0x78[2]; + union REG_SUBLVDS_CTRL_TOP_80 REG_80; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_CSI_CTRL_TOP_T { + union REG_CSI_CTRL_TOP_00 REG_00; + union REG_CSI_CTRL_TOP_04 REG_04; + union REG_CSI_CTRL_TOP_08 REG_08; + union REG_CSI_CTRL_TOP_0C REG_0C; + union REG_CSI_CTRL_TOP_10 REG_10; + union REG_CSI_CTRL_TOP_14 REG_14; + union REG_CSI_CTRL_TOP_18 REG_18; + union REG_CSI_CTRL_TOP_1C REG_1C; + union REG_CSI_CTRL_TOP_20 REG_20; + union REG_CSI_CTRL_TOP_24 REG_24; + uint32_t _resv_0x28[2]; + union REG_CSI_CTRL_TOP_30 REG_30; + union REG_CSI_CTRL_TOP_34 REG_34; + uint32_t _resv_0x38[2]; + union REG_CSI_CTRL_TOP_40 REG_40; + uint32_t _resv_0x44[1]; + union REG_CSI_CTRL_TOP_48 REG_48; + union REG_CSI_CTRL_TOP_4C REG_4C; + union REG_CSI_CTRL_TOP_50 REG_50; + union REG_CSI_CTRL_TOP_54 REG_54; + union REG_CSI_CTRL_TOP_58 REG_58; + union REG_CSI_CTRL_TOP_5C REG_5C; + union REG_CSI_CTRL_TOP_60 REG_60; + union REG_CSI_CTRL_TOP_64 REG_64; + uint32_t _resv_0x68[2]; + union REG_CSI_CTRL_TOP_70 REG_70; + union REG_CSI_CTRL_TOP_74 REG_74; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_SENSOR_MAC_VI_T { + union REG_SENSOR_MAC_VI_00 REG_00; + uint32_t _resv_0x4[3]; + union REG_SENSOR_MAC_VI_10 REG_10; + union REG_SENSOR_MAC_VI_14 REG_14; + union REG_SENSOR_MAC_VI_18 REG_18; + union REG_SENSOR_MAC_VI_1C REG_1C; + union REG_SENSOR_MAC_VI_20 REG_20; + union REG_SENSOR_MAC_VI_24 REG_24; + union REG_SENSOR_MAC_VI_28 REG_28; + uint32_t _resv_0x2c[1]; + union REG_SENSOR_MAC_VI_30 REG_30; + union REG_SENSOR_MAC_VI_34 REG_34; + uint32_t _resv_0x38[2]; + union REG_SENSOR_MAC_VI_40 REG_40; + union REG_SENSOR_MAC_VI_44 REG_44; + union REG_SENSOR_MAC_VI_48 REG_48; + union REG_SENSOR_MAC_VI_4C REG_4C; + uint32_t _resv_0x50[4]; + union REG_SENSOR_MAC_VI_60 REG_60; + union REG_SENSOR_MAC_VI_64 REG_64; + union REG_SENSOR_MAC_VI_68 REG_68; + union REG_SENSOR_MAC_VI_6C REG_6C; + union REG_SENSOR_MAC_VI_70 REG_70; + union REG_SENSOR_MAC_VI_74 REG_74; + uint32_t _resv_0x78[2]; + union REG_SENSOR_MAC_VI_80 REG_80; + union REG_SENSOR_MAC_VI_84 REG_84; + union REG_SENSOR_MAC_VI_88 REG_88; + union REG_SENSOR_MAC_VI_8C REG_8C; + union REG_SENSOR_MAC_VI_90 REG_90; + union REG_SENSOR_MAC_VI_94 REG_94; + union REG_SENSOR_MAC_VI_98 REG_98; + union REG_SENSOR_MAC_VI_9C REG_9C; + union REG_SENSOR_MAC_VI_A0 REG_A0; + union REG_SENSOR_MAC_VI_A4 REG_A4; + union REG_SENSOR_MAC_VI_A8 REG_A8; + uint32_t _resv_0xac[1]; + union REG_SENSOR_MAC_VI_B0 REG_B0; + union REG_SENSOR_MAC_VI_B4 REG_B4; + union REG_SENSOR_MAC_VI_B8 REG_B8; + union REG_SENSOR_MAC_VI_BC REG_BC; + union REG_SENSOR_MAC_VI_C0 REG_C0; + union REG_SENSOR_MAC_VI_C4 REG_C4; + union REG_SENSOR_MAC_VI_C8 REG_C8; +}; + +#endif // _REG_BLOCKS_CSI_MAC_H_ diff --git a/freertos/cvitek/install/include/hal/cif/reg_blocks_csi_wrap.h b/freertos/cvitek/install/include/hal/cif/reg_blocks_csi_wrap.h new file mode 100644 index 000000000..ec4c86af1 --- /dev/null +++ b/freertos/cvitek/install/include/hal/cif/reg_blocks_csi_wrap.h @@ -0,0 +1,222 @@ +#ifndef _REG_BLOCKS_CSI_WRAP_H_ +#define _REG_BLOCKS_CSI_WRAP_H_ + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_SENSOR_PHY_2L_T { + union REG_SENSOR_PHY_2L_00 REG_00; + union REG_SENSOR_PHY_2L_04 REG_04; + union REG_SENSOR_PHY_2L_08 REG_08; + union REG_SENSOR_PHY_2L_0C REG_0C; + union REG_SENSOR_PHY_2L_10 REG_10; + uint32_t _resv_0x14[3]; + union REG_SENSOR_PHY_2L_20 REG_20; + union REG_SENSOR_PHY_2L_24 REG_24; + union REG_SENSOR_PHY_2L_28 REG_28; + uint32_t _resv_0x2c[1]; + union REG_SENSOR_PHY_2L_30 REG_30; + union REG_SENSOR_PHY_2L_34 REG_34; + union REG_SENSOR_PHY_2L_38 REG_38; + union REG_SENSOR_PHY_2L_3C REG_3C; + union REG_SENSOR_PHY_2L_40 REG_40; + union REG_SENSOR_PHY_2L_44 REG_44; + union REG_SENSOR_PHY_2L_48 REG_48; + union REG_SENSOR_PHY_2L_4C REG_4C; + union REG_SENSOR_PHY_2L_50 REG_50; + union REG_SENSOR_PHY_2L_54 REG_54; + uint32_t _resv_0x58[14]; + union REG_SENSOR_PHY_2L_DBG_90 DBG_90; + union REG_SENSOR_PHY_2L_DBG_94 DBG_94; + union REG_SENSOR_PHY_2L_STATUS_98 STATUS_98; + union REG_SENSOR_PHY_2L_STATUS_9C STATUS_9C; + uint32_t _resv_0xa0[24]; + union REG_SENSOR_PHY_2L_D0_0 D0_0; + union REG_SENSOR_PHY_2L_D0_1 D0_1; + union REG_SENSOR_PHY_2L_D0_2 D0_2; + union REG_SENSOR_PHY_2L_D0_3 D0_3; + union REG_SENSOR_PHY_2L_D0_4 D0_4; + union REG_SENSOR_PHY_2L_D0_5 D0_5; + union REG_SENSOR_PHY_2L_D0_6 D0_6; + union REG_SENSOR_PHY_2L_D0_7 D0_7; + union REG_SENSOR_PHY_2L_D0_8 D0_8; + union REG_SENSOR_PHY_2L_D0_9 D0_9; + union REG_SENSOR_PHY_2L_D0_A D0_A; + union REG_SENSOR_PHY_2L_D0_B D0_B; + uint32_t _resv_0x130[4]; + union REG_SENSOR_PHY_2L_D1_0 D1_0; + union REG_SENSOR_PHY_2L_D1_1 D1_1; + union REG_SENSOR_PHY_2L_D1_2 D1_2; + union REG_SENSOR_PHY_2L_D1_3 D1_3; + union REG_SENSOR_PHY_2L_D1_4 D1_4; + union REG_SENSOR_PHY_2L_D1_5 D1_5; + union REG_SENSOR_PHY_2L_D1_6 D1_6; + union REG_SENSOR_PHY_2L_D1_7 D1_7; + union REG_SENSOR_PHY_2L_D1_8 D1_8; + union REG_SENSOR_PHY_2L_D1_9 D1_9; + union REG_SENSOR_PHY_2L_D1_A D1_A; + union REG_SENSOR_PHY_2L_D1_B D1_B; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_SENSOR_PHY_4L_T { + union REG_SENSOR_PHY_4L_00 REG_00; + union REG_SENSOR_PHY_4L_04 REG_04; + union REG_SENSOR_PHY_4L_08 REG_08; + union REG_SENSOR_PHY_4L_0C REG_0C; + union REG_SENSOR_PHY_4L_10 REG_10; + uint32_t _resv_0x14[3]; + union REG_SENSOR_PHY_4L_20 REG_20; + union REG_SENSOR_PHY_4L_24 REG_24; + union REG_SENSOR_PHY_4L_28 REG_28; + uint32_t _resv_0x2c[1]; + union REG_SENSOR_PHY_4L_30 REG_30; + union REG_SENSOR_PHY_4L_34 REG_34; + union REG_SENSOR_PHY_4L_38 REG_38; + union REG_SENSOR_PHY_4L_3C REG_3C; + union REG_SENSOR_PHY_4L_40 REG_40; + union REG_SENSOR_PHY_4L_44 REG_44; + union REG_SENSOR_PHY_4L_48 REG_48; + union REG_SENSOR_PHY_4L_4C REG_4C; + union REG_SENSOR_PHY_4L_50 REG_50; + union REG_SENSOR_PHY_4L_54 REG_54; + union REG_SENSOR_PHY_4L_58 REG_58; + union REG_SENSOR_PHY_4L_5C REG_5C; + union REG_SENSOR_PHY_4L_60 REG_60; + union REG_SENSOR_PHY_4L_64 REG_64; + uint32_t _resv_0x68[10]; + union REG_SENSOR_PHY_4L_DBG_90 DBG_90; + union REG_SENSOR_PHY_4L_DBG_94 DBG_94; + union REG_SENSOR_PHY_4L_STATUS_98 STATUS_98; + union REG_SENSOR_PHY_4L_STATUS_9C STATUS_9C; + uint32_t _resv_0xa0[1]; + union REG_SENSOR_PHY_4L_STATUS_A4 STATUS_A4; + union REG_SENSOR_PHY_4L_STATUS_A8 STATUS_A8; + uint32_t _resv_0xac[21]; + union REG_SENSOR_PHY_4L_D0_0 D0_0; + union REG_SENSOR_PHY_4L_D0_1 D0_1; + union REG_SENSOR_PHY_4L_D0_2 D0_2; + union REG_SENSOR_PHY_4L_D0_3 D0_3; + union REG_SENSOR_PHY_4L_D0_4 D0_4; + union REG_SENSOR_PHY_4L_D0_5 D0_5; + union REG_SENSOR_PHY_4L_D0_6 D0_6; + union REG_SENSOR_PHY_4L_D0_7 D0_7; + union REG_SENSOR_PHY_4L_D0_8 D0_8; + union REG_SENSOR_PHY_4L_D0_9 D0_9; + union REG_SENSOR_PHY_4L_D0_A D0_A; + union REG_SENSOR_PHY_4L_D0_B D0_B; + uint32_t _resv_0x130[4]; + union REG_SENSOR_PHY_4L_D1_0 D1_0; + union REG_SENSOR_PHY_4L_D1_1 D1_1; + union REG_SENSOR_PHY_4L_D1_2 D1_2; + union REG_SENSOR_PHY_4L_D1_3 D1_3; + union REG_SENSOR_PHY_4L_D1_4 D1_4; + union REG_SENSOR_PHY_4L_D1_5 D1_5; + union REG_SENSOR_PHY_4L_D1_6 D1_6; + union REG_SENSOR_PHY_4L_D1_7 D1_7; + union REG_SENSOR_PHY_4L_D1_8 D1_8; + union REG_SENSOR_PHY_4L_D1_9 D1_9; + union REG_SENSOR_PHY_4L_D1_A D1_A; + union REG_SENSOR_PHY_4L_D1_B D1_B; + uint32_t _resv_0x170[4]; + union REG_SENSOR_PHY_4L_D2_0 D2_0; + union REG_SENSOR_PHY_4L_D2_1 D2_1; + union REG_SENSOR_PHY_4L_D2_2 D2_2; + union REG_SENSOR_PHY_4L_D2_3 D2_3; + union REG_SENSOR_PHY_4L_D2_4 D2_4; + union REG_SENSOR_PHY_4L_D2_5 D2_5; + union REG_SENSOR_PHY_4L_D2_6 D2_6; + union REG_SENSOR_PHY_4L_D2_7 D2_7; + union REG_SENSOR_PHY_4L_D2_8 D2_8; + union REG_SENSOR_PHY_4L_D2_9 D2_9; + union REG_SENSOR_PHY_4L_D2_A D2_A; + union REG_SENSOR_PHY_4L_D2_B D2_B; + uint32_t _resv_0x1b0[4]; + union REG_SENSOR_PHY_4L_D3_0 D3_0; + union REG_SENSOR_PHY_4L_D3_1 D3_1; + union REG_SENSOR_PHY_4L_D3_2 D3_2; + union REG_SENSOR_PHY_4L_D3_3 D3_3; + union REG_SENSOR_PHY_4L_D3_4 D3_4; + union REG_SENSOR_PHY_4L_D3_5 D3_5; + union REG_SENSOR_PHY_4L_D3_6 D3_6; + union REG_SENSOR_PHY_4L_D3_7 D3_7; + union REG_SENSOR_PHY_4L_D3_8 D3_8; + union REG_SENSOR_PHY_4L_D3_9 D3_9; + union REG_SENSOR_PHY_4L_D3_A D3_A; + union REG_SENSOR_PHY_4L_D3_B D3_B; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +struct REG_SENSOR_PHY_TOP_T { + union REG_SENSOR_PHY_TOP_00 REG_00; + union REG_SENSOR_PHY_TOP_04 REG_04; + union REG_SENSOR_PHY_TOP_08 REG_08; + union REG_SENSOR_PHY_TOP_0C REG_0C; + union REG_SENSOR_PHY_TOP_10 REG_10; + uint32_t _resv_0x14[3]; + union REG_SENSOR_PHY_TOP_20 REG_20; + union REG_SENSOR_PHY_TOP_24 REG_24; + uint32_t _resv_0x28[1]; + union REG_SENSOR_PHY_TOP_2C REG_2C; + union REG_SENSOR_PHY_TOP_30 REG_30; + union REG_SENSOR_PHY_TOP_34 REG_34; + union REG_SENSOR_PHY_TOP_38 REG_38; + union REG_SENSOR_PHY_TOP_3C REG_3C; + union REG_SENSOR_PHY_TOP_40 REG_40; + union REG_SENSOR_PHY_TOP_44 REG_44; + union REG_SENSOR_PHY_TOP_48 REG_48; + uint32_t _resv_0x4c[9]; + union REG_SENSOR_PHY_TOP_70 REG_70; + union REG_SENSOR_PHY_TOP_74 REG_74; + uint32_t _resv_0x78[1]; + union REG_SENSOR_PHY_TOP_7C REG_7C; + union REG_SENSOR_PHY_TOP_80 REG_80; + union REG_SENSOR_PHY_TOP_84 REG_84; + union REG_SENSOR_PHY_TOP_88 REG_88; + uint32_t _resv_0x8c[1]; + union REG_SENSOR_PHY_TOP_90 REG_90; + union REG_SENSOR_PHY_TOP_94 REG_94; + uint32_t _resv_0x98[2]; + union REG_SENSOR_PHY_TOP_A0 REG_A0; + union REG_SENSOR_PHY_TOP_A4 REG_A4; + union REG_SENSOR_PHY_TOP_A8 REG_A8; + union REG_SENSOR_PHY_TOP_AC REG_AC; + uint32_t _resv_0xb0[20]; + union REG_SENSOR_PHY_TOP_DFT_100 DFT_100; + union REG_SENSOR_PHY_TOP_DFT_104 DFT_104; + union REG_SENSOR_PHY_TOP_DFT_108 DFT_108; + union REG_SENSOR_PHY_TOP_DFT_10C DFT_10C; + union REG_SENSOR_PHY_TOP_DFT_110 DFT_110; + union REG_SENSOR_PHY_TOP_DFT_114 DFT_114; + uint32_t _resv_0x118[1]; + union REG_SENSOR_PHY_TOP_DFT_11C DFT_11C; + union REG_SENSOR_PHY_TOP_DBG_12 DBG_12; + uint32_t _resv_0x124[55]; + union REG_SENSOR_PHY_TOP_TEST_0 TEST_0; + union REG_SENSOR_PHY_TOP_TEST_1 TEST_1; + union REG_SENSOR_PHY_TOP_TEST_2 TEST_2; + union REG_SENSOR_PHY_TOP_TEST_3 TEST_3; + union REG_SENSOR_PHY_TOP_TEST_4 TEST_4; + union REG_SENSOR_PHY_TOP_TEST_5 TEST_5; + union REG_SENSOR_PHY_TOP_TEST_6 TEST_6; + union REG_SENSOR_PHY_TOP_TEST_7 TEST_7; + union REG_SENSOR_PHY_TOP_TEST_8 TEST_8; + union REG_SENSOR_PHY_TOP_TEST_9 TEST_9; + union REG_SENSOR_PHY_TOP_TEST_A TEST_A; + union REG_SENSOR_PHY_TOP_TEST_B TEST_B; + uint32_t _resv_0x230[12]; + union REG_SENSOR_PHY_TOP_DUMMY_D0 DUMMY_D0; + union REG_SENSOR_PHY_TOP_DUMMY_D1 DUMMY_D1; + union REG_SENSOR_PHY_TOP_DUMMY_D2 DUMMY_D2; + union REG_SENSOR_PHY_TOP_DUMMY_D3 DUMMY_D3; + union REG_SENSOR_PHY_TOP_DUMMY_D4 DUMMY_D4; + union REG_SENSOR_PHY_TOP_DUMMY_D5 DUMMY_D5; + union REG_SENSOR_PHY_TOP_DUMMY_D6 DUMMY_D6; + union REG_SENSOR_PHY_TOP_DUMMY_D7 DUMMY_D7; +}; + +#endif // _REG_BLOCKS_CSI_WRAP_H_ diff --git a/freertos/cvitek/install/include/hal/cif/reg_fields_csi_mac.h b/freertos/cvitek/install/include/hal/cif/reg_fields_csi_mac.h new file mode 100644 index 000000000..9be26f6fc --- /dev/null +++ b/freertos/cvitek/install/include/hal/cif/reg_fields_csi_mac.h @@ -0,0 +1,1311 @@ +#ifndef _REG_FIELDS_CSI_MAC_H_ +#define _REG_FIELDS_CSI_MAC_H_ + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_SENSOR_MAC_00 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_MODE : 3; + uint32_t BT_DEMUX_ENABLE : 1; + uint32_t CSI_CTRL_ENABLE : 1; + uint32_t CSI_VS_INV : 1; + uint32_t CSI_HS_INV : 1; + uint32_t _rsv_7 : 1; + uint32_t SUBLVDS_CTRL_ENABLE : 1; + uint32_t SUBLVDS_VS_INV : 1; + uint32_t SUBLVDS_HS_INV : 1; + uint32_t SUBLVDS_HDR_INV : 1; + uint32_t SLVSEC_CTRL_ENABLE : 1; + uint32_t SLVSEC_VS_INV : 1; + uint32_t SLVSEC_HS_INV : 1; + uint32_t _rsv_15 : 1; + uint32_t MASK_UP : 1; + uint32_t SHRD_SEL : 1; + uint32_t SW_UP : 1; + uint32_t _rsv_19 : 5; + uint32_t DBG_SEL : 8; + } bits; +}; + +union REG_SENSOR_MAC_10 { + uint32_t raw; + struct { + uint32_t TTL_IP_EN : 1; + uint32_t TTL_SENSOR_BIT : 2; + uint32_t _rsv_3 : 1; + uint32_t TTL_BT_FMT_OUT : 2; + uint32_t _rsv_6 : 2; + uint32_t TTL_FMT_IN : 4; + uint32_t TTL_BT_DATA_SEQ : 2; + uint32_t TTL_VS_INV : 1; + uint32_t TTL_HS_INV : 1; + } bits; +}; + +union REG_SENSOR_MAC_14 { + uint32_t raw; + struct { + uint32_t TTL_VS_BP : 12; + uint32_t _rsv_12 : 4; + uint32_t TTL_HS_BP : 12; + } bits; +}; + +union REG_SENSOR_MAC_18 { + uint32_t raw; + struct { + uint32_t TTL_IMG_WD : 12; + uint32_t _rsv_12 : 4; + uint32_t TTL_IMG_HT : 12; + } bits; +}; + +union REG_SENSOR_MAC_1C { + uint32_t raw; + struct { + uint32_t TTL_SYNC_0 : 16; + uint32_t TTL_SYNC_1 : 16; + } bits; +}; + +union REG_SENSOR_MAC_20 { + uint32_t raw; + struct { + uint32_t TTL_SYNC_2 : 16; + } bits; +}; + +union REG_SENSOR_MAC_24 { + uint32_t raw; + struct { + uint32_t TTL_SAV_VLD : 16; + uint32_t TTL_SAV_BLK : 16; + } bits; +}; + +union REG_SENSOR_MAC_28 { + uint32_t raw; + struct { + uint32_t TTL_EAV_VLD : 16; + uint32_t TTL_EAV_BLK : 16; + } bits; +}; + +union REG_SENSOR_MAC_30 { + uint32_t raw; + struct { + uint32_t VI_SEL : 3; + uint32_t VI_FROM : 1; + uint32_t VI_CLK_INV : 1; + uint32_t VI_V_SEL_VS : 1; + uint32_t VI_VS_DBG : 1; + uint32_t _rsv_7 : 1; + uint32_t PAD_VI0_CLK_INV : 1; + uint32_t PAD_VI1_CLK_INV : 1; + uint32_t PAD_VI2_CLK_INV : 1; + } bits; +}; + +union REG_SENSOR_MAC_34 { + uint32_t raw; + struct { + uint32_t VI_VS_DLY : 5; + uint32_t _rsv_5 : 1; + uint32_t VI_VS_DLY_EN : 1; + uint32_t _rsv_7 : 1; + uint32_t VI_HS_DLY : 5; + uint32_t _rsv_13 : 1; + uint32_t VI_HS_DLY_EN : 1; + uint32_t _rsv_15 : 1; + uint32_t VI_VDE_DLY : 5; + uint32_t _rsv_21 : 1; + uint32_t VI_VDE_DLY_EN : 1; + uint32_t _rsv_23 : 1; + uint32_t VI_HDE_DLY : 5; + uint32_t _rsv_29 : 1; + uint32_t VI_HDE_DLY_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_40 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_HDR_EN : 1; + uint32_t SENSOR_MAC_HDR_VSINV : 1; + uint32_t SENSOR_MAC_HDR_HSINV : 1; + uint32_t SENSOR_MAC_HDR_DEINV : 1; + uint32_t SENSOR_MAC_HDR_HDR0INV : 1; + uint32_t SENSOR_MAC_HDR_HDR1INV : 1; + uint32_t SENSOR_MAC_HDR_BLCINV : 1; + uint32_t _rsv_7 : 1; + uint32_t SENSOR_MAC_HDR_MODE : 1; + } bits; +}; + +union REG_SENSOR_MAC_44 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_HDR_SHIFT : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_HDR_VSIZE : 13; + } bits; +}; + +union REG_SENSOR_MAC_48 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_INFO_LINE_NUM : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_RM_INFO_LINE : 1; + } bits; +}; + +union REG_SENSOR_MAC_4C { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_HDR_LINE_CNT : 14; + } bits; +}; + +union REG_SENSOR_MAC_50 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_BLC0_EN : 1; + uint32_t SENSOR_MAC_BLC1_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_54 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_BLC0_START : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_BLC0_SIZE : 13; + } bits; +}; + +union REG_SENSOR_MAC_58 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_BLC1_START : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_BLC1_SIZE : 13; + } bits; +}; + +union REG_SENSOR_MAC_60 { + uint32_t raw; + struct { + uint32_t VI_VS_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_HS_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_VDE_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_HDE_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_64 { + uint32_t raw; + struct { + uint32_t VI_D0_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D1_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D2_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D3_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_68 { + uint32_t raw; + struct { + uint32_t VI_D4_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D5_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D6_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D7_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_6C { + uint32_t raw; + struct { + uint32_t VI_D8_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D9_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D10_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D11_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_70 { + uint32_t raw; + struct { + uint32_t VI_D12_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D13_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D14_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D15_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_74 { + uint32_t raw; + struct { + uint32_t VI_BT_D0_SEL : 3; + uint32_t _rsv_3 : 1; + uint32_t VI_BT_D1_SEL : 3; + uint32_t _rsv_7 : 1; + uint32_t VI_BT_D2_SEL : 3; + uint32_t _rsv_11 : 1; + uint32_t VI_BT_D3_SEL : 3; + uint32_t _rsv_15 : 1; + uint32_t VI_BT_D4_SEL : 3; + uint32_t _rsv_19 : 1; + uint32_t VI_BT_D5_SEL : 3; + uint32_t _rsv_23 : 1; + uint32_t VI_BT_D6_SEL : 3; + uint32_t _rsv_27 : 1; + uint32_t VI_BT_D7_SEL : 3; + } bits; +}; + +union REG_SENSOR_MAC_80 { + uint32_t raw; + struct { + uint32_t BT_CLR_SYNC_LOST_1T : 1; + uint32_t BT_IP_EN : 1; + uint32_t BT_DDR_MODE : 1; + uint32_t BT_HS_GATE_BY_VDE : 1; + uint32_t BT_VS_INV : 1; + uint32_t BT_HS_INV : 1; + uint32_t BT_VS_AS_VDE : 1; + uint32_t BT_HS_AS_HDE : 1; + uint32_t BT_SW_EN_CLK : 7; + uint32_t _rsv_15 : 1; + uint32_t BT_DEMUX_CH : 2; + uint32_t _rsv_18 : 2; + uint32_t BT_FMT_SEL : 3; + uint32_t _rsv_23 : 1; + uint32_t BT_SYNC_LOST : 1; + } bits; +}; + +union REG_SENSOR_MAC_84 { + uint32_t raw; + struct { + uint32_t BT_V_CTRL_DLY : 5; + uint32_t _rsv_5 : 3; + uint32_t BT_H_CTRL_DLY : 5; + } bits; +}; + +union REG_SENSOR_MAC_88 { + uint32_t raw; + struct { + uint32_t BT_IMG_WD_M1 : 12; + uint32_t _rsv_12 : 4; + uint32_t BT_IMG_HT_M1 : 12; + } bits; +}; + +union REG_SENSOR_MAC_8C { + uint32_t raw; + struct { + uint32_t BT_VS_BP_M1 : 12; + uint32_t _rsv_12 : 4; + uint32_t BT_HS_BP_M1 : 12; + } bits; +}; + +union REG_SENSOR_MAC_90 { + uint32_t raw; + struct { + uint32_t BT_VS_FP_M1 : 8; + uint32_t BT_HS_FP_M1 : 8; + } bits; +}; + +union REG_SENSOR_MAC_94 { + uint32_t raw; + struct { + uint32_t BT_SYNC_0 : 8; + uint32_t BT_SYNC_1 : 8; + uint32_t BT_SYNC_2 : 8; + } bits; +}; + +union REG_SENSOR_MAC_98 { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_0 : 8; + uint32_t BT_SAV_BLK_0 : 8; + uint32_t BT_EAV_VLD_0 : 8; + uint32_t BT_EAV_BLK_0 : 8; + } bits; +}; + +union REG_SENSOR_MAC_9C { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_1 : 8; + uint32_t BT_SAV_BLK_1 : 8; + uint32_t BT_EAV_VLD_1 : 8; + uint32_t BT_EAV_BLK_1 : 8; + } bits; +}; + +union REG_SENSOR_MAC_A0 { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_2 : 8; + uint32_t BT_SAV_BLK_2 : 8; + uint32_t BT_EAV_VLD_2 : 8; + uint32_t BT_EAV_BLK_2 : 8; + } bits; +}; + +union REG_SENSOR_MAC_A4 { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_3 : 8; + uint32_t BT_SAV_BLK_3 : 8; + uint32_t BT_EAV_VLD_3 : 8; + uint32_t BT_EAV_BLK_3 : 8; + } bits; +}; + +union REG_SENSOR_MAC_A8 { + uint32_t raw; + struct { + uint32_t BT_YC_INV : 4; + } bits; +}; + +union REG_SENSOR_MAC_B0 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_CROP_START_X : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_CROP_END_X : 13; + uint32_t _rsv_29 : 2; + uint32_t SENSOR_MAC_CROP_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_B4 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_CROP_START_Y : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_CROP_END_Y : 13; + } bits; +}; + +union REG_SENSOR_MAC_B8 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_SWAPUV_EN : 1; + uint32_t SENSOR_MAC_SWAPYC_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_BC { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_HTOTAL_MAX : 16; + uint32_t SENSOR_MAC_DBG_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_C0 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_VTOTAL_MAX : 32; + } bits; +}; + +union REG_SENSOR_MAC_C4 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_HTOTAL : 16; + } bits; +}; + +union REG_SENSOR_MAC_C8 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_VTOTAL : 32; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_SUBLVDS_CTRL_TOP_00 { + uint32_t raw; + struct { + uint32_t SLVDS_ENABLE : 8; + uint32_t SLVDS_BIT_MODE : 2; + uint32_t SLVDS_DATA_REVERSE : 1; + uint32_t _rsv_11 : 1; + uint32_t SLVDS_HDR_MODE : 1; + uint32_t SLVDS_HDR_PATTERN : 1; + uint32_t _rsv_14 : 2; + uint32_t SLVDS_VFPORCH : 10; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_04 { + uint32_t raw; + struct { + uint32_t SLVDS_SYNC_1ST : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_SYNC_2ND : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_08 { + uint32_t raw; + struct { + uint32_t SLVDS_SYNC_3RD : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_NORM_BK_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_0C { + uint32_t raw; + struct { + uint32_t SLVDS_NORM_BK_EAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_NORM_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_10 { + uint32_t raw; + struct { + uint32_t SLVDS_NORM_EAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N0_BK_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_14 { + uint32_t raw; + struct { + uint32_t SLVDS_N0_BK_EAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N1_BK_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_18 { + uint32_t raw; + struct { + uint32_t SLVDS_N1_BK_EAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N0_LEF_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_1C { + uint32_t raw; + struct { + uint32_t SLVDS_N0_LEF_EAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N0_SEF_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_20 { + uint32_t raw; + struct { + uint32_t SLVDS_N0_SEF_EAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N1_LEF_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_24 { + uint32_t raw; + struct { + uint32_t SLVDS_N1_LEF_EAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N1_SEF_SAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_28 { + uint32_t raw; + struct { + uint32_t SLVDS_N1_SEF_EAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_2C { + uint32_t raw; + struct { + uint32_t VS_GEN_SYNC_CODE : 12; + uint32_t VS_GEN_BY_SYNC_CODE : 1; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_30 { + uint32_t raw; + struct { + uint32_t SLVDS_LANE_MODE : 3; + uint32_t _rsv_3 : 1; + uint32_t SLVDS_SYNC_SOURCE : 8; + uint32_t SLVDS_FIFO_CLR : 1; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_40 { + uint32_t raw; + struct { + uint32_t SLVDS_FIFO_FULL : 1; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_50 { + uint32_t raw; + struct { + uint32_t SLVDS_N0_LSEF_SAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N0_LSEF_EAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_54 { + uint32_t raw; + struct { + uint32_t SLVDS_N1_LSEF_SAV : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_N1_LSEF_EAV : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_58 { + uint32_t raw; + struct { + uint32_t SLVDS_HDR_P2_HSIZE : 14; + uint32_t _rsv_14 : 2; + uint32_t SLVDS_HDR_P2_HBLANK : 14; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_60 { + uint32_t raw; + struct { + uint32_t HISPI_MODE : 1; + uint32_t HISPI_USE_HSIZE : 1; + uint32_t _rsv_2 : 2; + uint32_t HISPI_HDR_PSP_MODE : 1; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_64 { + uint32_t raw; + struct { + uint32_t HISPI_NORM_SOF : 12; + uint32_t _rsv_12 : 4; + uint32_t HISPI_NORM_EOF : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_68 { + uint32_t raw; + struct { + uint32_t HISPI_HDR_T1_SOF : 12; + uint32_t _rsv_12 : 4; + uint32_t HISPI_HDR_T1_EOF : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_6C { + uint32_t raw; + struct { + uint32_t HISPI_HDR_T1_SOL : 12; + uint32_t _rsv_12 : 4; + uint32_t HISPI_HDR_T1_EOL : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_70 { + uint32_t raw; + struct { + uint32_t HISPI_HDR_T2_SOF : 12; + uint32_t _rsv_12 : 4; + uint32_t HISPI_HDR_T2_EOF : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_74 { + uint32_t raw; + struct { + uint32_t HISPI_HDR_T2_SOL : 12; + uint32_t _rsv_12 : 4; + uint32_t HISPI_HDR_T2_EOL : 12; + } bits; +}; + +union REG_SUBLVDS_CTRL_TOP_80 { + uint32_t raw; + struct { + uint32_t DBG_SEL : 8; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_CSI_CTRL_TOP_00 { + uint32_t raw; + struct { + uint32_t CSI_LANE_MODE : 3; + uint32_t CSI_IGNORE_ECC : 1; + uint32_t CSI_VC_CHECK : 1; + uint32_t _rsv_5 : 3; + uint32_t CSI_VC_SET : 4; + uint32_t CSI_LINE_START_SENT : 1; + uint32_t CSI_FORMAT_FRC : 1; + uint32_t _rsv_14 : 2; + uint32_t CSI_FORMAT_SET : 8; + } bits; +}; + +union REG_CSI_CTRL_TOP_04 { + uint32_t raw; + struct { + uint32_t CSI_INTR_MASK : 8; + uint32_t CSI_INTR_CLR : 8; + uint32_t CSI_HDR_EN : 1; + uint32_t CSI_HDR_MODE : 1; + uint32_t CSI_ID_RM_ELSE : 1; + uint32_t CSI_ID_RM_OB : 1; + } bits; +}; + +union REG_CSI_CTRL_TOP_08 { + uint32_t raw; + struct { + uint32_t CSI_N0_OB_LEF : 16; + uint32_t CSI_N0_OB_SEF : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_0C { + uint32_t raw; + struct { + uint32_t CSI_N0_LEF : 16; + uint32_t CSI_N1_OB_LEF : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_10 { + uint32_t raw; + struct { + uint32_t CSI_N1_OB_SEF : 16; + uint32_t CSI_N1_LEF : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_14 { + uint32_t raw; + struct { + uint32_t CSI_BLC_DT : 6; + uint32_t _rsv_6 : 2; + uint32_t CSI_BLC_EN : 1; + uint32_t _rsv_9 : 3; + uint32_t CSI_BLC_FORMAT_SET : 3; + } bits; +}; + +union REG_CSI_CTRL_TOP_18 { + uint32_t raw; + struct { + uint32_t CSI_VC_MAP_CH00 : 4; + uint32_t CSI_VC_MAP_CH01 : 4; + uint32_t CSI_VC_MAP_CH10 : 4; + uint32_t CSI_VC_MAP_CH11 : 4; + } bits; +}; + +union REG_CSI_CTRL_TOP_1C { + uint32_t raw; + struct { + uint32_t CSI_N0_SEF : 16; + uint32_t CSI_N1_SEF : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_20 { + uint32_t raw; + struct { + uint32_t CSI_N0_SEF2 : 16; + uint32_t CSI_N1_SEF2 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_24 { + uint32_t raw; + struct { + uint32_t CSI_N0_OB_SEF2 : 16; + uint32_t CSI_N1_OB_SEF2 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_30 { + uint32_t raw; + struct { + uint32_t CSI_ECC_PH_DBG : 32; + } bits; +}; + +union REG_CSI_CTRL_TOP_34 { + uint32_t raw; + struct { + uint32_t CSI_ECC_CLR_PH_DBG : 1; + } bits; +}; + +union REG_CSI_CTRL_TOP_40 { + uint32_t raw; + struct { + uint32_t CSI_ECC_NO_ERROR : 1; + uint32_t CSI_ECC_CORRECTED_ERROR : 1; + uint32_t CSI_ECC_ERROR : 1; + uint32_t _rsv_3 : 1; + uint32_t CSI_CRC_ERROR : 1; + uint32_t CSI_WC_ERROR : 1; + uint32_t _rsv_6 : 2; + uint32_t CSI_FIFO_FULL : 1; + uint32_t _rsv_9 : 7; + uint32_t CSI_DECODE_FORMAT : 6; + } bits; +}; + +union REG_CSI_CTRL_TOP_48 { + uint32_t raw; + struct { + uint32_t SHORT_PKT_RSV1 : 16; + uint32_t SHORT_PKT_RSV2 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_4C { + uint32_t raw; + struct { + uint32_t SHORT_PKT_RSV3 : 16; + uint32_t SHORT_PKT_RSV4 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_50 { + uint32_t raw; + struct { + uint32_t GENERIC_SHORT_PKT1 : 16; + uint32_t GENERIC_SHORT_PKT2 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_54 { + uint32_t raw; + struct { + uint32_t GENERIC_SHORT_PKT3 : 16; + uint32_t GENERIC_SHORT_PKT4 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_58 { + uint32_t raw; + struct { + uint32_t GENERIC_SHORT_PKT5 : 16; + uint32_t GENERIC_SHORT_PKT6 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_5C { + uint32_t raw; + struct { + uint32_t GENERIC_SHORT_PKT7 : 16; + uint32_t GENERIC_SHORT_PKT8 : 16; + } bits; +}; + +union REG_CSI_CTRL_TOP_60 { + uint32_t raw; + struct { + uint32_t CSI_INTR_STATUS : 8; + } bits; +}; + +union REG_CSI_CTRL_TOP_64 { + uint32_t raw; + struct { + uint32_t CSI_DBG_SEL : 8; + } bits; +}; + +union REG_CSI_CTRL_TOP_70 { + uint32_t raw; + struct { + uint32_t CSI_VS_GEN_MODE : 2; + uint32_t _rsv_2 : 2; + uint32_t CSI_VS_GEN_BY_VCSET : 1; + uint32_t _rsv_5 : 3; + uint32_t CSI_VS_DELAY_SEL : 2; + uint32_t CSI_HS_DELAY_SEL : 2; + } bits; +}; + +union REG_CSI_CTRL_TOP_74 { + uint32_t raw; + struct { + uint32_t CSI_HDR_DT_MODE : 1; + uint32_t _rsv_1 : 3; + uint32_t CSI_HDR_DT_FORMAT : 6; + uint32_t _rsv_10 : 2; + uint32_t CSI_HDR_DT_LEF : 6; + uint32_t _rsv_18 : 2; + uint32_t CSI_HDR_DT_SEF : 6; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_SENSOR_MAC_VI_00 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_MODE : 3; + uint32_t BT_DEMUX_ENABLE : 1; + uint32_t CSI_CTRL_ENABLE : 1; + uint32_t CSI_VS_INV : 1; + uint32_t CSI_HS_INV : 1; + uint32_t _rsv_7 : 1; + uint32_t SUBLVDS_CTRL_ENABLE : 1; + uint32_t SUBLVDS_VS_INV : 1; + uint32_t SUBLVDS_HS_INV : 1; + uint32_t SUBLVDS_HDR_INV : 1; + uint32_t SLVSEC_CTRL_ENABLE : 1; + uint32_t SLVSEC_VS_INV : 1; + uint32_t SLVSEC_HS_INV : 1; + uint32_t _rsv_15 : 1; + uint32_t MASK_UP : 1; + uint32_t SHRD_SEL : 1; + uint32_t SW_UP : 1; + uint32_t _rsv_19 : 5; + uint32_t DBG_SEL : 8; + } bits; +}; + +union REG_SENSOR_MAC_VI_10 { + uint32_t raw; + struct { + uint32_t TTL_IP_EN : 1; + uint32_t TTL_SENSOR_BIT : 2; + uint32_t _rsv_3 : 1; + uint32_t TTL_BT_FMT_OUT : 2; + uint32_t _rsv_6 : 2; + uint32_t TTL_FMT_IN : 4; + uint32_t TTL_BT_DATA_SEQ : 2; + uint32_t TTL_VS_INV : 1; + uint32_t TTL_HS_INV : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_14 { + uint32_t raw; + struct { + uint32_t TTL_VS_BP : 12; + uint32_t _rsv_12 : 4; + uint32_t TTL_HS_BP : 12; + } bits; +}; + +union REG_SENSOR_MAC_VI_18 { + uint32_t raw; + struct { + uint32_t TTL_IMG_WD : 12; + uint32_t _rsv_12 : 4; + uint32_t TTL_IMG_HT : 12; + } bits; +}; + +union REG_SENSOR_MAC_VI_1C { + uint32_t raw; + struct { + uint32_t TTL_SYNC_0 : 16; + uint32_t TTL_SYNC_1 : 16; + } bits; +}; + +union REG_SENSOR_MAC_VI_20 { + uint32_t raw; + struct { + uint32_t TTL_SYNC_2 : 16; + } bits; +}; + +union REG_SENSOR_MAC_VI_24 { + uint32_t raw; + struct { + uint32_t TTL_SAV_VLD : 16; + uint32_t TTL_SAV_BLK : 16; + } bits; +}; + +union REG_SENSOR_MAC_VI_28 { + uint32_t raw; + struct { + uint32_t TTL_EAV_VLD : 16; + uint32_t TTL_EAV_BLK : 16; + } bits; +}; + +union REG_SENSOR_MAC_VI_30 { + uint32_t raw; + struct { + uint32_t VI_SEL : 3; + uint32_t VI_FROM : 1; + uint32_t VI_CLK_INV : 1; + uint32_t VI_V_SEL_VS : 1; + uint32_t VI_VS_DBG : 1; + uint32_t _rsv_7 : 1; + uint32_t PAD_VI0_CLK_INV : 1; + uint32_t PAD_VI1_CLK_INV : 1; + uint32_t PAD_VI2_CLK_INV : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_34 { + uint32_t raw; + struct { + uint32_t VI_VS_DLY : 5; + uint32_t _rsv_5 : 1; + uint32_t VI_VS_DLY_EN : 1; + uint32_t _rsv_7 : 1; + uint32_t VI_HS_DLY : 5; + uint32_t _rsv_13 : 1; + uint32_t VI_HS_DLY_EN : 1; + uint32_t _rsv_15 : 1; + uint32_t VI_VDE_DLY : 5; + uint32_t _rsv_21 : 1; + uint32_t VI_VDE_DLY_EN : 1; + uint32_t _rsv_23 : 1; + uint32_t VI_HDE_DLY : 5; + uint32_t _rsv_29 : 1; + uint32_t VI_HDE_DLY_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_40 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_HDR_EN : 1; + uint32_t SENSOR_MAC_HDR_VSINV : 1; + uint32_t SENSOR_MAC_HDR_HSINV : 1; + uint32_t SENSOR_MAC_HDR_DEINV : 1; + uint32_t SENSOR_MAC_HDR_HDR0INV : 1; + uint32_t SENSOR_MAC_HDR_HDR1INV : 1; + uint32_t SENSOR_MAC_HDR_BLCINV : 1; + uint32_t _rsv_7 : 1; + uint32_t SENSOR_MAC_HDR_MODE : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_44 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_HDR_SHIFT : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_HDR_VSIZE : 13; + } bits; +}; + +union REG_SENSOR_MAC_VI_48 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_INFO_LINE_NUM : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_RM_INFO_LINE : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_4C { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_HDR_LINE_CNT : 14; + } bits; +}; + +union REG_SENSOR_MAC_VI_60 { + uint32_t raw; + struct { + uint32_t VI_VS_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_HS_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_VDE_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_HDE_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_VI_64 { + uint32_t raw; + struct { + uint32_t VI_D0_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D1_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D2_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D3_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_VI_68 { + uint32_t raw; + struct { + uint32_t VI_D4_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D5_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D6_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D7_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_VI_6C { + uint32_t raw; + struct { + uint32_t VI_D8_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D9_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D10_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D11_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_VI_70 { + uint32_t raw; + struct { + uint32_t VI_D12_SEL : 6; + uint32_t _rsv_6 : 2; + uint32_t VI_D13_SEL : 6; + uint32_t _rsv_14 : 2; + uint32_t VI_D14_SEL : 6; + uint32_t _rsv_22 : 2; + uint32_t VI_D15_SEL : 6; + } bits; +}; + +union REG_SENSOR_MAC_VI_74 { + uint32_t raw; + struct { + uint32_t VI_BT_D0_SEL : 3; + uint32_t _rsv_3 : 1; + uint32_t VI_BT_D1_SEL : 3; + uint32_t _rsv_7 : 1; + uint32_t VI_BT_D2_SEL : 3; + uint32_t _rsv_11 : 1; + uint32_t VI_BT_D3_SEL : 3; + uint32_t _rsv_15 : 1; + uint32_t VI_BT_D4_SEL : 3; + uint32_t _rsv_19 : 1; + uint32_t VI_BT_D5_SEL : 3; + uint32_t _rsv_23 : 1; + uint32_t VI_BT_D6_SEL : 3; + uint32_t _rsv_27 : 1; + uint32_t VI_BT_D7_SEL : 3; + } bits; +}; + +union REG_SENSOR_MAC_VI_80 { + uint32_t raw; + struct { + uint32_t BT_CLR_SYNC_LOST_1T : 1; + uint32_t BT_IP_EN : 1; + uint32_t BT_DDR_MODE : 1; + uint32_t BT_HS_GATE_BY_VDE : 1; + uint32_t BT_VS_INV : 1; + uint32_t BT_HS_INV : 1; + uint32_t BT_VS_AS_VDE : 1; + uint32_t BT_HS_AS_HDE : 1; + uint32_t BT_SW_EN_CLK : 7; + uint32_t _rsv_15 : 1; + uint32_t BT_DEMUX_CH : 2; + uint32_t _rsv_18 : 2; + uint32_t BT_FMT_SEL : 3; + uint32_t _rsv_23 : 1; + uint32_t BT_SYNC_LOST : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_84 { + uint32_t raw; + struct { + uint32_t BT_V_CTRL_DLY : 5; + uint32_t _rsv_5 : 3; + uint32_t BT_H_CTRL_DLY : 5; + } bits; +}; + +union REG_SENSOR_MAC_VI_88 { + uint32_t raw; + struct { + uint32_t BT_IMG_WD_M1 : 12; + uint32_t _rsv_12 : 4; + uint32_t BT_IMG_HT_M1 : 12; + } bits; +}; + +union REG_SENSOR_MAC_VI_8C { + uint32_t raw; + struct { + uint32_t BT_VS_BP_M1 : 12; + uint32_t _rsv_12 : 4; + uint32_t BT_HS_BP_M1 : 12; + } bits; +}; + +union REG_SENSOR_MAC_VI_90 { + uint32_t raw; + struct { + uint32_t BT_VS_FP_M1 : 8; + uint32_t BT_HS_FP_M1 : 8; + } bits; +}; + +union REG_SENSOR_MAC_VI_94 { + uint32_t raw; + struct { + uint32_t BT_SYNC_0 : 8; + uint32_t BT_SYNC_1 : 8; + uint32_t BT_SYNC_2 : 8; + } bits; +}; + +union REG_SENSOR_MAC_VI_98 { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_0 : 8; + uint32_t BT_SAV_BLK_0 : 8; + uint32_t BT_EAV_VLD_0 : 8; + uint32_t BT_EAV_BLK_0 : 8; + } bits; +}; + +union REG_SENSOR_MAC_VI_9C { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_1 : 8; + uint32_t BT_SAV_BLK_1 : 8; + uint32_t BT_EAV_VLD_1 : 8; + uint32_t BT_EAV_BLK_1 : 8; + } bits; +}; + +union REG_SENSOR_MAC_VI_A0 { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_2 : 8; + uint32_t BT_SAV_BLK_2 : 8; + uint32_t BT_EAV_VLD_2 : 8; + uint32_t BT_EAV_BLK_2 : 8; + } bits; +}; + +union REG_SENSOR_MAC_VI_A4 { + uint32_t raw; + struct { + uint32_t BT_SAV_VLD_3 : 8; + uint32_t BT_SAV_BLK_3 : 8; + uint32_t BT_EAV_VLD_3 : 8; + uint32_t BT_EAV_BLK_3 : 8; + } bits; +}; + +union REG_SENSOR_MAC_VI_A8 { + uint32_t raw; + struct { + uint32_t BT_YC_INV : 4; + } bits; +}; + +union REG_SENSOR_MAC_VI_B0 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_CROP_START_X : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_CROP_END_X : 13; + uint32_t _rsv_29 : 2; + uint32_t SENSOR_MAC_CROP_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_B4 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_CROP_START_Y : 13; + uint32_t _rsv_13 : 3; + uint32_t SENSOR_MAC_CROP_END_Y : 13; + } bits; +}; + +union REG_SENSOR_MAC_VI_B8 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_SWAPUV_EN : 1; + uint32_t SENSOR_MAC_SWAPYC_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_BC { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_HTOTAL_MAX : 16; + uint32_t SENSOR_MAC_DBG_EN : 1; + } bits; +}; + +union REG_SENSOR_MAC_VI_C0 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_VTOTAL_MAX : 32; + } bits; +}; + +union REG_SENSOR_MAC_VI_C4 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_HTOTAL : 16; + } bits; +}; + +union REG_SENSOR_MAC_VI_C8 { + uint32_t raw; + struct { + uint32_t SENSOR_MAC_DBG_VTOTAL : 32; + } bits; +}; + +#endif // _REG_FIELDS_CSI_MAC_H_ diff --git a/freertos/cvitek/install/include/hal/cif/reg_fields_csi_wrap.h b/freertos/cvitek/install/include/hal/cif/reg_fields_csi_wrap.h new file mode 100644 index 000000000..456f8140a --- /dev/null +++ b/freertos/cvitek/install/include/hal/cif/reg_fields_csi_wrap.h @@ -0,0 +1,1686 @@ +#ifndef _REG_FIELDS_CSI_WRAP_H_ +#define _REG_FIELDS_CSI_WRAP_H_ + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_SENSOR_PHY_2L_00 { + uint32_t raw; + struct { + uint32_t SENSOR_MODE : 2; + } bits; +}; + +union REG_SENSOR_PHY_2L_04 { + uint32_t raw; + struct { + uint32_t CSI_LANE_D0_SEL : 2; + uint32_t _rsv_2 : 2; + uint32_t CSI_LANE_D1_SEL : 2; + } bits; +}; + +union REG_SENSOR_PHY_2L_08 { + uint32_t raw; + struct { + uint32_t CSI_LANE_CK_SEL : 2; + uint32_t _rsv_2 : 2; + uint32_t CSI_LANE_CK_PNSWAP : 1; + uint32_t _rsv_5 : 3; + uint32_t CSI_LANE_D0_PNSWAP : 1; + uint32_t CSI_LANE_D1_PNSWAP : 1; + uint32_t _rsv_10 : 6; + uint32_t CSI_CK_PHASE : 8; + } bits; +}; + +union REG_SENSOR_PHY_2L_0C { + uint32_t raw; + struct { + uint32_t DESKEW_LANE_EN : 2; + uint32_t _rsv_2 : 14; + uint32_t PRBS9_TEST_PERIOD : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_10 { + uint32_t raw; + struct { + uint32_t T_HS_SETTLE : 8; + uint32_t T_ALL_ZERO : 8; + uint32_t AUTO_IGNORE : 1; + uint32_t AUTO_SYNC : 1; + } bits; +}; + +union REG_SENSOR_PHY_2L_20 { + uint32_t raw; + struct { + uint32_t SLVDS_INV_EN : 1; + uint32_t _rsv_1 : 1; + uint32_t SLVDS_BIT_MODE : 2; + uint32_t SLVDS_LANE_EN : 2; + uint32_t _rsv_6 : 6; + uint32_t SLVDS_FORCE_RESYNC : 1; + uint32_t SLVDS_RESYNC : 1; + uint32_t _rsv_14 : 2; + uint32_t SLVDS_SAV_1ST : 12; + } bits; +}; + +union REG_SENSOR_PHY_2L_24 { + uint32_t raw; + struct { + uint32_t SLVDS_SAV_2ND : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_SAV_3RD : 12; + } bits; +}; + +union REG_SENSOR_PHY_2L_28 { + uint32_t raw; + struct { + uint32_t SLVDS_D0_SYNC_STATE : 2; + uint32_t _rsv_2 : 2; + uint32_t SLVDS_D1_SYNC_STATE : 2; + } bits; +}; + +union REG_SENSOR_PHY_2L_30 { + uint32_t raw; + struct { + uint32_t SLVSEC_LANE_EN : 2; + uint32_t _rsv_2 : 6; + uint32_t SLVSEC_SKEW_CNT_EN : 1; + uint32_t SLVSEC_TRAIN_SEQ_CHK_EN : 1; + uint32_t _rsv_10 : 6; + uint32_t SLVSEC_SKEW_CONS : 5; + uint32_t SLVSEC_FORCE_RESYNC : 1; + uint32_t SLVSEC_RESYNC : 1; + uint32_t _rsv_23 : 1; + uint32_t SLVSEC_UNSTABLE_SKEW_CNT : 8; + } bits; +}; + +union REG_SENSOR_PHY_2L_34 { + uint32_t raw; + struct { + uint32_t SLVSEC_SYNC_SYMBOL : 9; + uint32_t _rsv_9 : 1; + uint32_t SLVSEC_STANDBY_SYMBOL : 9; + uint32_t _rsv_19 : 1; + uint32_t SLVSEC_DESKEW_SYMBOL : 9; + } bits; +}; + +union REG_SENSOR_PHY_2L_38 { + uint32_t raw; + struct { + uint32_t SLVSEC_PRBS9_TEST_PERIOD : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_3C { + uint32_t raw; + struct { + uint32_t SLVSEC_PHY_INTR_CLR : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_40 { + uint32_t raw; + struct { + uint32_t SLVSEC_PHY_INTR_MASK : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_44 { + uint32_t raw; + struct { + uint32_t SLVSEC_PHY_INTR_STATUS : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_48 { + uint32_t raw; + struct { + uint32_t SLVSEC_D0_TEST_PAT_EN : 1; + uint32_t SLVSEC_D0_CLR_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D0_TEST_STOP_WHEN_DONE : 1; + } bits; +}; + +union REG_SENSOR_PHY_2L_4C { + uint32_t raw; + struct { + uint32_t SLVSEC_D0_TEST_PAT_ERR_CNT : 16; + uint32_t SLVSEC_D0_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D0_TEST_PAT_PASS : 1; + uint32_t SLVSEC_D0_TEST_PAT_DONE : 1; + uint32_t _rsv_19 : 5; + uint32_t SLVSEC_D0_START_CODE_ERR : 1; + uint32_t SLVSEC_D0_END_CODE_ERR : 1; + uint32_t SLVSEC_D0_DESKEW_CODE_ERR : 1; + uint32_t SLVSEC_D0_STANDBY_CODE_ERR : 1; + uint32_t SLVSEC_D0_SYNC_CODE_ERR : 1; + } bits; +}; + +union REG_SENSOR_PHY_2L_50 { + uint32_t raw; + struct { + uint32_t SLVSEC_D1_TEST_PAT_EN : 1; + uint32_t SLVSEC_D1_CLR_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D1_TEST_STOP_WHEN_DONE : 1; + } bits; +}; + +union REG_SENSOR_PHY_2L_54 { + uint32_t raw; + struct { + uint32_t SLVSEC_D1_TEST_PAT_ERR_CNT : 16; + uint32_t SLVSEC_D1_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D1_TEST_PAT_PASS : 1; + uint32_t SLVSEC_D1_TEST_PAT_DONE : 1; + uint32_t _rsv_19 : 5; + uint32_t SLVSEC_D1_START_CODE_ERR : 1; + uint32_t SLVSEC_D1_END_CODE_ERR : 1; + uint32_t SLVSEC_D1_DESKEW_CODE_ERR : 1; + uint32_t SLVSEC_D1_STANDBY_CODE_ERR : 1; + uint32_t SLVSEC_D1_SYNC_CODE_ERR : 1; + } bits; +}; + +union REG_SENSOR_PHY_2L_DBG_90 { + uint32_t raw; + struct { + uint32_t CK_HS_STATE : 1; + uint32_t CK_ULPS_STATE : 1; + uint32_t CK_STOPSTATE : 1; + uint32_t CK_ERR_STATE : 1; + uint32_t DESKEW_STATE : 2; + } bits; +}; + +union REG_SENSOR_PHY_2L_DBG_94 { + uint32_t raw; + struct { + uint32_t D0_DATAHS_STATE : 3; + uint32_t _rsv_3 : 1; + uint32_t D1_DATAHS_STATE : 3; + } bits; +}; + +union REG_SENSOR_PHY_2L_STATUS_98 { + uint32_t raw; + struct { + uint32_t CK_LP_STATUS_CLR : 8; + uint32_t D0_LP_STATUS_CLR : 8; + uint32_t D1_LP_STATUS_CLR : 8; + } bits; +}; + +union REG_SENSOR_PHY_2L_STATUS_9C { + uint32_t raw; + struct { + uint32_t CK_LP_STATUS_OUT : 8; + uint32_t D0_LP_STATUS_OUT : 8; + uint32_t D1_LP_STATUS_OUT : 8; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_0 { + uint32_t raw; + struct { + uint32_t D0_PRBS9_EN : 1; + uint32_t D0_PRBS9_CLR_ERR : 1; + uint32_t D0_PRBS9_SOURCE : 1; + uint32_t D0_PRBS9_STOP_WHEN_DONE : 1; + uint32_t _rsv_4 : 4; + uint32_t D0_CALIB_MAX : 8; + uint32_t D0_CALIB_STEP : 8; + uint32_t D0_CALIB_PATTERN : 8; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_1 { + uint32_t raw; + struct { + uint32_t D0_CALIB_EN : 1; + uint32_t D0_CALIB_SOURCE : 1; + uint32_t D0_CALIB_MODE : 1; + uint32_t D0_CALIB_IGNORE : 1; + uint32_t D0_CALIB_SETTLE : 3; + uint32_t D0_CALIB_PHASE_NO_SHIFT : 1; + uint32_t D0_CALIB_SET_PHASE : 8; + uint32_t D0_CALIB_CYCLE : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_2 { + uint32_t raw; + struct { + uint32_t D0_PRBS9_RX_ERR : 1; + uint32_t D0_PRBS9_TEST_DONE : 1; + uint32_t D0_PRBS9_TEST_PASS : 1; + uint32_t D0_SKEW_CALIB_DONE : 1; + uint32_t D0_SKEW_CALIB_FAIL : 1; + uint32_t D0_DATALP_STATE : 4; + uint32_t D0_DATALP_LPREQ2ERR : 1; + uint32_t D0_DATALP_DATAESC2ERR : 1; + uint32_t D0_DATALP_RSTTRI2ERR : 1; + uint32_t D0_DATALP_HSTEST2ERR : 1; + uint32_t D0_DATALP_ESCULP2ERR : 1; + uint32_t D0_DATALP_HS2ERR : 1; + uint32_t D0_DATA_EXIST_1ST_BYTE : 1; + uint32_t D0_PRBS9_ERR_CNT : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_3 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_4 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_5 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_6 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_7 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_8 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_9 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_6 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_A { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_7 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D0_B { + uint32_t raw; + struct { + uint32_t D0_CALIB_OPTION : 1; + uint32_t _rsv_1 : 7; + uint32_t D0_CALIB_THRESHOLD : 8; + uint32_t D0_CALIB_GP_COUNT : 9; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_0 { + uint32_t raw; + struct { + uint32_t D1_PRBS9_EN : 1; + uint32_t D1_PRBS9_CLR_ERR : 1; + uint32_t D1_PRBS9_SOURCE : 1; + uint32_t D1_PRBS9_STOP_WHEN_DONE : 1; + uint32_t _rsv_4 : 4; + uint32_t D1_CALIB_MAX : 8; + uint32_t D1_CALIB_STEP : 8; + uint32_t D1_CALIB_PATTERN : 8; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_1 { + uint32_t raw; + struct { + uint32_t D1_CALIB_EN : 1; + uint32_t D1_CALIB_SOURCE : 1; + uint32_t D1_CALIB_MODE : 1; + uint32_t D1_CALIB_IGNORE : 1; + uint32_t D1_CALIB_SETTLE : 3; + uint32_t D1_CALIB_PHASE_NO_SHIFT : 1; + uint32_t D1_CALIB_SET_PHASE : 8; + uint32_t D1_CALIB_CYCLE : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_2 { + uint32_t raw; + struct { + uint32_t D1_PRBS9_RX_ERR : 1; + uint32_t D1_PRBS9_TEST_DONE : 1; + uint32_t D1_PRBS9_TEST_PASS : 1; + uint32_t D1_SKEW_CALIB_DONE : 1; + uint32_t D1_SKEW_CALIB_FAIL : 1; + uint32_t D1_DATALP_STATE : 4; + uint32_t D1_DATALP_LPREQ2ERR : 1; + uint32_t D1_DATALP_DATAESC2ERR : 1; + uint32_t D1_DATALP_RSTTRI2ERR : 1; + uint32_t D1_DATALP_HSTEST2ERR : 1; + uint32_t D1_DATALP_ESCULP2ERR : 1; + uint32_t D1_DATALP_HS2ERR : 1; + uint32_t D1_DATA_EXIST_1ST_BYTE : 1; + uint32_t D1_PRBS9_ERR_CNT : 16; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_3 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_4 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_5 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_6 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_7 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_8 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_9 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_6 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_A { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_7 : 32; + } bits; +}; + +union REG_SENSOR_PHY_2L_D1_B { + uint32_t raw; + struct { + uint32_t D1_CALIB_OPTION : 1; + uint32_t _rsv_1 : 7; + uint32_t D1_CALIB_THRESHOLD : 8; + uint32_t D1_CALIB_GP_COUNT : 9; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_SENSOR_PHY_4L_00 { + uint32_t raw; + struct { + uint32_t SENSOR_MODE : 2; + } bits; +}; + +union REG_SENSOR_PHY_4L_04 { + uint32_t raw; + struct { + uint32_t CSI_LANE_D0_SEL : 3; + uint32_t _rsv_3 : 1; + uint32_t CSI_LANE_D1_SEL : 3; + uint32_t _rsv_7 : 1; + uint32_t CSI_LANE_D2_SEL : 3; + uint32_t _rsv_11 : 1; + uint32_t CSI_LANE_D3_SEL : 3; + } bits; +}; + +union REG_SENSOR_PHY_4L_08 { + uint32_t raw; + struct { + uint32_t CSI_LANE_CK_SEL : 3; + uint32_t _rsv_3 : 1; + uint32_t CSI_LANE_CK_PNSWAP : 1; + uint32_t _rsv_5 : 3; + uint32_t CSI_LANE_D0_PNSWAP : 1; + uint32_t CSI_LANE_D1_PNSWAP : 1; + uint32_t CSI_LANE_D2_PNSWAP : 1; + uint32_t CSI_LANE_D3_PNSWAP : 1; + uint32_t _rsv_12 : 4; + uint32_t CSI_CK_PHASE : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_0C { + uint32_t raw; + struct { + uint32_t DESKEW_LANE_EN : 4; + uint32_t _rsv_4 : 12; + uint32_t PRBS9_TEST_PERIOD : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_10 { + uint32_t raw; + struct { + uint32_t T_HS_SETTLE : 8; + uint32_t T_ALL_ZERO : 8; + uint32_t AUTO_IGNORE : 1; + uint32_t AUTO_SYNC : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_20 { + uint32_t raw; + struct { + uint32_t SLVDS_INV_EN : 1; + uint32_t _rsv_1 : 1; + uint32_t SLVDS_BIT_MODE : 2; + uint32_t SLVDS_LANE_EN : 4; + uint32_t _rsv_8 : 4; + uint32_t SLVDS_FORCE_RESYNC : 1; + uint32_t SLVDS_RESYNC : 1; + uint32_t _rsv_14 : 2; + uint32_t SLVDS_SAV_1ST : 12; + } bits; +}; + +union REG_SENSOR_PHY_4L_24 { + uint32_t raw; + struct { + uint32_t SLVDS_SAV_2ND : 12; + uint32_t _rsv_12 : 4; + uint32_t SLVDS_SAV_3RD : 12; + } bits; +}; + +union REG_SENSOR_PHY_4L_28 { + uint32_t raw; + struct { + uint32_t SLVDS_D0_SYNC_STATE : 2; + uint32_t _rsv_2 : 2; + uint32_t SLVDS_D1_SYNC_STATE : 2; + uint32_t _rsv_6 : 2; + uint32_t SLVDS_D2_SYNC_STATE : 2; + uint32_t _rsv_10 : 2; + uint32_t SLVDS_D3_SYNC_STATE : 2; + } bits; +}; + +union REG_SENSOR_PHY_4L_30 { + uint32_t raw; + struct { + uint32_t SLVSEC_LANE_EN : 4; + uint32_t _rsv_4 : 4; + uint32_t SLVSEC_SKEW_CNT_EN : 1; + uint32_t SLVSEC_TRAIN_SEQ_CHK_EN : 1; + uint32_t _rsv_10 : 6; + uint32_t SLVSEC_SKEW_CONS : 5; + uint32_t SLVSEC_FORCE_RESYNC : 1; + uint32_t SLVSEC_RESYNC : 1; + uint32_t _rsv_23 : 1; + uint32_t SLVSEC_UNSTABLE_SKEW_CNT : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_34 { + uint32_t raw; + struct { + uint32_t SLVSEC_SYNC_SYMBOL : 9; + uint32_t _rsv_9 : 1; + uint32_t SLVSEC_STANDBY_SYMBOL : 9; + uint32_t _rsv_19 : 1; + uint32_t SLVSEC_DESKEW_SYMBOL : 9; + } bits; +}; + +union REG_SENSOR_PHY_4L_38 { + uint32_t raw; + struct { + uint32_t SLVSEC_PRBS9_TEST_PERIOD : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_3C { + uint32_t raw; + struct { + uint32_t SLVSEC_PHY_INTR_CLR : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_40 { + uint32_t raw; + struct { + uint32_t SLVSEC_PHY_INTR_MASK : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_44 { + uint32_t raw; + struct { + uint32_t SLVSEC_PHY_INTR_STATUS : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_48 { + uint32_t raw; + struct { + uint32_t SLVSEC_D0_TEST_PAT_EN : 1; + uint32_t SLVSEC_D0_CLR_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D0_TEST_STOP_WHEN_DONE : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_4C { + uint32_t raw; + struct { + uint32_t SLVSEC_D0_TEST_PAT_ERR_CNT : 16; + uint32_t SLVSEC_D0_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D0_TEST_PAT_PASS : 1; + uint32_t SLVSEC_D0_TEST_PAT_DONE : 1; + uint32_t _rsv_19 : 5; + uint32_t SLVSEC_D0_START_CODE_ERR : 1; + uint32_t SLVSEC_D0_END_CODE_ERR : 1; + uint32_t SLVSEC_D0_DESKEW_CODE_ERR : 1; + uint32_t SLVSEC_D0_STANDBY_CODE_ERR : 1; + uint32_t SLVSEC_D0_SYNC_CODE_ERR : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_50 { + uint32_t raw; + struct { + uint32_t SLVSEC_D1_TEST_PAT_EN : 1; + uint32_t SLVSEC_D1_CLR_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D1_TEST_STOP_WHEN_DONE : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_54 { + uint32_t raw; + struct { + uint32_t SLVSEC_D1_TEST_PAT_ERR_CNT : 16; + uint32_t SLVSEC_D1_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D1_TEST_PAT_PASS : 1; + uint32_t SLVSEC_D1_TEST_PAT_DONE : 1; + uint32_t _rsv_19 : 5; + uint32_t SLVSEC_D1_START_CODE_ERR : 1; + uint32_t SLVSEC_D1_END_CODE_ERR : 1; + uint32_t SLVSEC_D1_DESKEW_CODE_ERR : 1; + uint32_t SLVSEC_D1_STANDBY_CODE_ERR : 1; + uint32_t SLVSEC_D1_SYNC_CODE_ERR : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_58 { + uint32_t raw; + struct { + uint32_t SLVSEC_D2_TEST_PAT_EN : 1; + uint32_t SLVSEC_D2_CLR_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D2_TEST_STOP_WHEN_DONE : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_5C { + uint32_t raw; + struct { + uint32_t SLVSEC_D2_TEST_PAT_ERR_CNT : 16; + uint32_t SLVSEC_D2_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D2_TEST_PAT_PASS : 1; + uint32_t SLVSEC_D2_TEST_PAT_DONE : 1; + uint32_t _rsv_19 : 5; + uint32_t SLVSEC_D2_START_CODE_ERR : 1; + uint32_t SLVSEC_D2_END_CODE_ERR : 1; + uint32_t SLVSEC_D2_DESKEW_CODE_ERR : 1; + uint32_t SLVSEC_D2_STANDBY_CODE_ERR : 1; + uint32_t SLVSEC_D2_SYNC_CODE_ERR : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_60 { + uint32_t raw; + struct { + uint32_t SLVSEC_D3_TEST_PAT_EN : 1; + uint32_t SLVSEC_D3_CLR_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D3_TEST_STOP_WHEN_DONE : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_64 { + uint32_t raw; + struct { + uint32_t SLVSEC_D3_TEST_PAT_ERR_CNT : 16; + uint32_t SLVSEC_D3_TEST_PAT_ERR : 1; + uint32_t SLVSEC_D3_TEST_PAT_PASS : 1; + uint32_t SLVSEC_D3_TEST_PAT_DONE : 1; + uint32_t _rsv_19 : 5; + uint32_t SLVSEC_D3_START_CODE_ERR : 1; + uint32_t SLVSEC_D3_END_CODE_ERR : 1; + uint32_t SLVSEC_D3_DESKEW_CODE_ERR : 1; + uint32_t SLVSEC_D3_STANDBY_CODE_ERR : 1; + uint32_t SLVSEC_D3_SYNC_CODE_ERR : 1; + } bits; +}; + +union REG_SENSOR_PHY_4L_DBG_90 { + uint32_t raw; + struct { + uint32_t CK_HS_STATE : 1; + uint32_t CK_ULPS_STATE : 1; + uint32_t CK_STOPSTATE : 1; + uint32_t CK_ERR_STATE : 1; + uint32_t DESKEW_STATE : 2; + } bits; +}; + +union REG_SENSOR_PHY_4L_DBG_94 { + uint32_t raw; + struct { + uint32_t D0_DATAHS_STATE : 3; + uint32_t _rsv_3 : 1; + uint32_t D1_DATAHS_STATE : 3; + uint32_t _rsv_7 : 1; + uint32_t D2_DATAHS_STATE : 3; + uint32_t _rsv_11 : 1; + uint32_t D3_DATAHS_STATE : 3; + } bits; +}; + +union REG_SENSOR_PHY_4L_STATUS_98 { + uint32_t raw; + struct { + uint32_t CK_LP_STATUS_CLR : 8; + uint32_t D0_LP_STATUS_CLR : 8; + uint32_t D1_LP_STATUS_CLR : 8; + uint32_t D2_LP_STATUS_CLR : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_STATUS_9C { + uint32_t raw; + struct { + uint32_t D3_LP_STATUS_CLR : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_STATUS_A4 { + uint32_t raw; + struct { + uint32_t CK_LP_STATUS_OUT : 8; + uint32_t D0_LP_STATUS_OUT : 8; + uint32_t D1_LP_STATUS_OUT : 8; + uint32_t D2_LP_STATUS_OUT : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_STATUS_A8 { + uint32_t raw; + struct { + uint32_t D3_LP_STATUS_OUT : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_0 { + uint32_t raw; + struct { + uint32_t D0_PRBS9_EN : 1; + uint32_t D0_PRBS9_CLR_ERR : 1; + uint32_t D0_PRBS9_SOURCE : 1; + uint32_t D0_PRBS9_STOP_WHEN_DONE : 1; + uint32_t _rsv_4 : 4; + uint32_t D0_CALIB_MAX : 8; + uint32_t D0_CALIB_STEP : 8; + uint32_t D0_CALIB_PATTERN : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_1 { + uint32_t raw; + struct { + uint32_t D0_CALIB_EN : 1; + uint32_t D0_CALIB_SOURCE : 1; + uint32_t D0_CALIB_MODE : 1; + uint32_t D0_CALIB_IGNORE : 1; + uint32_t D0_CALIB_SETTLE : 3; + uint32_t D0_CALIB_PHASE_NO_SHIFT : 1; + uint32_t D0_CALIB_SET_PHASE : 8; + uint32_t D0_CALIB_CYCLE : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_2 { + uint32_t raw; + struct { + uint32_t D0_PRBS9_RX_ERR : 1; + uint32_t D0_PRBS9_TEST_DONE : 1; + uint32_t D0_PRBS9_TEST_PASS : 1; + uint32_t D0_SKEW_CALIB_DONE : 1; + uint32_t D0_SKEW_CALIB_FAIL : 1; + uint32_t D0_DATALP_STATE : 4; + uint32_t D0_DATALP_LPREQ2ERR : 1; + uint32_t D0_DATALP_DATAESC2ERR : 1; + uint32_t D0_DATALP_RSTTRI2ERR : 1; + uint32_t D0_DATALP_HSTEST2ERR : 1; + uint32_t D0_DATALP_ESCULP2ERR : 1; + uint32_t D0_DATALP_HS2ERR : 1; + uint32_t D0_DATA_EXIST_1ST_BYTE : 1; + uint32_t D0_PRBS9_ERR_CNT : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_3 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_4 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_5 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_6 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_7 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_8 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_9 { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_6 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_A { + uint32_t raw; + struct { + uint32_t D0_SKEW_CALIB_RESULT_7 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D0_B { + uint32_t raw; + struct { + uint32_t D0_CALIB_OPTION : 1; + uint32_t _rsv_1 : 7; + uint32_t D0_CALIB_THRESHOLD : 8; + uint32_t D0_CALIB_GP_COUNT : 9; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_0 { + uint32_t raw; + struct { + uint32_t D1_PRBS9_EN : 1; + uint32_t D1_PRBS9_CLR_ERR : 1; + uint32_t D1_PRBS9_SOURCE : 1; + uint32_t D1_PRBS9_STOP_WHEN_DONE : 1; + uint32_t _rsv_4 : 4; + uint32_t D1_CALIB_MAX : 8; + uint32_t D1_CALIB_STEP : 8; + uint32_t D1_CALIB_PATTERN : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_1 { + uint32_t raw; + struct { + uint32_t D1_CALIB_EN : 1; + uint32_t D1_CALIB_SOURCE : 1; + uint32_t D1_CALIB_MODE : 1; + uint32_t D1_CALIB_IGNORE : 1; + uint32_t D1_CALIB_SETTLE : 3; + uint32_t D1_CALIB_PHASE_NO_SHIFT : 1; + uint32_t D1_CALIB_SET_PHASE : 8; + uint32_t D1_CALIB_CYCLE : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_2 { + uint32_t raw; + struct { + uint32_t D1_PRBS9_RX_ERR : 1; + uint32_t D1_PRBS9_TEST_DONE : 1; + uint32_t D1_PRBS9_TEST_PASS : 1; + uint32_t D1_SKEW_CALIB_DONE : 1; + uint32_t D1_SKEW_CALIB_FAIL : 1; + uint32_t D1_DATALP_STATE : 4; + uint32_t D1_DATALP_LPREQ2ERR : 1; + uint32_t D1_DATALP_DATAESC2ERR : 1; + uint32_t D1_DATALP_RSTTRI2ERR : 1; + uint32_t D1_DATALP_HSTEST2ERR : 1; + uint32_t D1_DATALP_ESCULP2ERR : 1; + uint32_t D1_DATALP_HS2ERR : 1; + uint32_t D1_DATA_EXIST_1ST_BYTE : 1; + uint32_t D1_PRBS9_ERR_CNT : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_3 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_4 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_5 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_6 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_7 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_8 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_9 { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_6 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_A { + uint32_t raw; + struct { + uint32_t D1_SKEW_CALIB_RESULT_7 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D1_B { + uint32_t raw; + struct { + uint32_t D1_CALIB_OPTION : 1; + uint32_t _rsv_1 : 7; + uint32_t D1_CALIB_THRESHOLD : 8; + uint32_t D1_CALIB_GP_COUNT : 9; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_0 { + uint32_t raw; + struct { + uint32_t D2_PRBS9_EN : 1; + uint32_t D2_PRBS9_CLR_ERR : 1; + uint32_t D2_PRBS9_SOURCE : 1; + uint32_t D2_PRBS9_STOP_WHEN_DONE : 1; + uint32_t _rsv_4 : 4; + uint32_t D2_CALIB_MAX : 8; + uint32_t D2_CALIB_STEP : 8; + uint32_t D2_CALIB_PATTERN : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_1 { + uint32_t raw; + struct { + uint32_t D2_CALIB_EN : 1; + uint32_t D2_CALIB_SOURCE : 1; + uint32_t D2_CALIB_MODE : 1; + uint32_t D2_CALIB_IGNORE : 1; + uint32_t D2_CALIB_SETTLE : 3; + uint32_t D2_CALIB_PHASE_NO_SHIFT : 1; + uint32_t D2_CALIB_SET_PHASE : 8; + uint32_t D2_CALIB_CYCLE : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_2 { + uint32_t raw; + struct { + uint32_t D2_PRBS9_RX_ERR : 1; + uint32_t D2_PRBS9_TEST_DONE : 1; + uint32_t D2_PRBS9_TEST_PASS : 1; + uint32_t D2_SKEW_CALIB_DONE : 1; + uint32_t D2_SKEW_CALIB_FAIL : 1; + uint32_t D2_DATALP_STATE : 4; + uint32_t D2_DATALP_LPREQ2ERR : 1; + uint32_t D2_DATALP_DATAESC2ERR : 1; + uint32_t D2_DATALP_RSTTRI2ERR : 1; + uint32_t D2_DATALP_HSTEST2ERR : 1; + uint32_t D2_DATALP_ESCULP2ERR : 1; + uint32_t D2_DATALP_HS2ERR : 1; + uint32_t D2_DATA_EXIST_1ST_BYTE : 1; + uint32_t D2_PRBS9_ERR_CNT : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_3 { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_4 { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_5 { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_6 { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_7 { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_8 { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_9 { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_6 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_A { + uint32_t raw; + struct { + uint32_t D2_SKEW_CALIB_RESULT_7 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D2_B { + uint32_t raw; + struct { + uint32_t D2_CALIB_OPTION : 1; + uint32_t _rsv_1 : 7; + uint32_t D2_CALIB_THRESHOLD : 8; + uint32_t D2_CALIB_GP_COUNT : 9; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_0 { + uint32_t raw; + struct { + uint32_t D3_PRBS9_EN : 1; + uint32_t D3_PRBS9_CLR_ERR : 1; + uint32_t D3_PRBS9_SOURCE : 1; + uint32_t D3_PRBS9_STOP_WHEN_DONE : 1; + uint32_t _rsv_4 : 4; + uint32_t D3_CALIB_MAX : 8; + uint32_t D3_CALIB_STEP : 8; + uint32_t D3_CALIB_PATTERN : 8; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_1 { + uint32_t raw; + struct { + uint32_t D3_CALIB_EN : 1; + uint32_t D3_CALIB_SOURCE : 1; + uint32_t D3_CALIB_MODE : 1; + uint32_t D3_CALIB_IGNORE : 1; + uint32_t D3_CALIB_SETTLE : 3; + uint32_t D3_CALIB_PHASE_NO_SHIFT : 1; + uint32_t D3_CALIB_SET_PHASE : 8; + uint32_t D3_CALIB_CYCLE : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_2 { + uint32_t raw; + struct { + uint32_t D3_PRBS9_RX_ERR : 1; + uint32_t D3_PRBS9_TEST_DONE : 1; + uint32_t D3_PRBS9_TEST_PASS : 1; + uint32_t D3_SKEW_CALIB_DONE : 1; + uint32_t D3_SKEW_CALIB_FAIL : 1; + uint32_t D3_DATALP_STATE : 4; + uint32_t D3_DATALP_LPREQ2ERR : 1; + uint32_t D3_DATALP_DATAESC2ERR : 1; + uint32_t D3_DATALP_RSTTRI2ERR : 1; + uint32_t D3_DATALP_HSTEST2ERR : 1; + uint32_t D3_DATALP_ESCULP2ERR : 1; + uint32_t D3_DATALP_HS2ERR : 1; + uint32_t D3_DATA_EXIST_1ST_BYTE : 1; + uint32_t D3_PRBS9_ERR_CNT : 16; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_3 { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_4 { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_5 { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_6 { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_7 { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_8 { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_9 { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_6 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_A { + uint32_t raw; + struct { + uint32_t D3_SKEW_CALIB_RESULT_7 : 32; + } bits; +}; + +union REG_SENSOR_PHY_4L_D3_B { + uint32_t raw; + struct { + uint32_t D3_CALIB_OPTION : 1; + uint32_t _rsv_1 : 7; + uint32_t D3_CALIB_THRESHOLD : 8; + uint32_t D3_CALIB_GP_COUNT : 9; + } bits; +}; + +/******************************************/ +/* Module Definition */ +/******************************************/ +union REG_SENSOR_PHY_TOP_00 { + uint32_t raw; + struct { + uint32_t MIPIRX_EN_BIST : 6; + uint32_t _rsv_6 : 6; + uint32_t MIPIRX_EN_LOW_BAND_RXAFE : 2; + uint32_t MIPIRX_PD_IBIAS : 1; + uint32_t _rsv_15 : 1; + uint32_t MIPIRX_PD_RXLP : 6; + } bits; +}; + +union REG_SENSOR_PHY_TOP_04 { + uint32_t raw; + struct { + uint32_t MIPIRX_RT_CTRL : 4; + uint32_t MIPIRX_SAMPLE_MODE : 2; + uint32_t MIPIRX_SEL_CLK_P0TOP1 : 1; + uint32_t MIPIRX_SEL_CLK_P1TOP0 : 1; + uint32_t _rsv_8 : 8; + uint32_t MIPIRX_SEL_CLK_CHANNEL : 6; + uint32_t _rsv_22 : 6; + uint32_t MIPIRX_EN_CLKIN_MPLL_TOP0 : 1; + uint32_t MIPIRX_SEL_MPLL_DIV_TOP0 : 2; + uint32_t MIPIMPLL_CLK_CSI_EN : 1; + } bits; +}; + +union REG_SENSOR_PHY_TOP_08 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_BIST0 : 16; + uint32_t MIPIRX_TEST_BIST1 : 16; + } bits; +}; + +union REG_SENSOR_PHY_TOP_0C { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_BIST2 : 16; + uint32_t MIPIRX_TEST_BIST3 : 16; + } bits; +}; + +union REG_SENSOR_PHY_TOP_10 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_BIST4 : 16; + uint32_t MIPIRX_TEST_BIST5 : 16; + } bits; +}; + +union REG_SENSOR_PHY_TOP_20 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_DEMUX0 : 8; + uint32_t MIPIRX_TEST_DEMUX1 : 8; + uint32_t MIPIRX_TEST_DEMUX2 : 8; + uint32_t MIPIRX_TEST_DEMUX3 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_24 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_DEMUX4 : 8; + uint32_t MIPIRX_TEST_DEMUX5 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_2C { + uint32_t raw; + struct { + uint32_t MIPIRX_SEL_IBIAS_MODE : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_30 { + uint32_t raw; + struct { + uint32_t SENSOR_PHY_MODE : 3; + } bits; +}; + +union REG_SENSOR_PHY_TOP_34 { + uint32_t raw; + struct { + uint32_t MIPIRX_RO_CAL0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_38 { + uint32_t raw; + struct { + uint32_t MIPIRX_RO_CAL1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_3C { + uint32_t raw; + struct { + uint32_t MIPIRX_RO_CAL2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_40 { + uint32_t raw; + struct { + uint32_t MIPIRX_RO_CAL3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_44 { + uint32_t raw; + struct { + uint32_t MIPIRX_RO_CAL4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_48 { + uint32_t raw; + struct { + uint32_t MIPIRX_RO_CAL5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_70 { + uint32_t raw; + struct { + uint32_t AD_D0_DATA : 8; + uint32_t AD_D1_DATA : 8; + uint32_t AD_D2_DATA : 8; + uint32_t AD_D3_DATA : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_74 { + uint32_t raw; + struct { + uint32_t AD_D4_DATA : 8; + uint32_t AD_D5_DATA : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_7C { + uint32_t raw; + struct { + uint32_t AD_LPOUTN : 6; + uint32_t _rsv_6 : 10; + uint32_t AD_LPOUTP : 6; + } bits; +}; + +union REG_SENSOR_PHY_TOP_80 { + uint32_t raw; + struct { + uint32_t AD_D0_CLK_INV : 1; + uint32_t AD_D1_CLK_INV : 1; + uint32_t AD_D2_CLK_INV : 1; + uint32_t AD_D3_CLK_INV : 1; + uint32_t AD_D4_CLK_INV : 1; + uint32_t AD_D5_CLK_INV : 1; + uint32_t _rsv_6 : 10; + uint32_t FORCE_DESKEW_CODE0 : 1; + uint32_t FORCE_DESKEW_CODE1 : 1; + uint32_t FORCE_DESKEW_CODE2 : 1; + uint32_t FORCE_DESKEW_CODE3 : 1; + uint32_t FORCE_DESKEW_CODE4 : 1; + uint32_t FORCE_DESKEW_CODE5 : 1; + } bits; +}; + +union REG_SENSOR_PHY_TOP_84 { + uint32_t raw; + struct { + uint32_t DESKEW_CODE0 : 8; + uint32_t DESKEW_CODE1 : 8; + uint32_t DESKEW_CODE2 : 8; + uint32_t DESKEW_CODE3 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_88 { + uint32_t raw; + struct { + uint32_t DESKEW_CODE4 : 8; + uint32_t DESKEW_CODE5 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_90 { + uint32_t raw; + struct { + uint32_t PD_RT : 6; + uint32_t _rsv_6 : 10; + uint32_t FORCE_PD_RT : 6; + } bits; +}; + +union REG_SENSOR_PHY_TOP_94 { + uint32_t raw; + struct { + uint32_t PD_RXAFE_IB : 6; + uint32_t _rsv_6 : 10; + uint32_t FORCE_PD_RXAFE_IB : 6; + } bits; +}; + +union REG_SENSOR_PHY_TOP_A0 { + uint32_t raw; + struct { + uint32_t CAM0_VTT : 14; + uint32_t _rsv_14 : 2; + uint32_t CAM0_VS_STR : 14; + } bits; +}; + +union REG_SENSOR_PHY_TOP_A4 { + uint32_t raw; + struct { + uint32_t CAM0_VS_STP : 14; + uint32_t _rsv_14 : 2; + uint32_t CAM0_HTT : 14; + } bits; +}; + +union REG_SENSOR_PHY_TOP_A8 { + uint32_t raw; + struct { + uint32_t CAM0_HS_STR : 14; + uint32_t _rsv_14 : 2; + uint32_t CAM0_HS_STP : 14; + } bits; +}; + +union REG_SENSOR_PHY_TOP_AC { + uint32_t raw; + struct { + uint32_t CAM0_VS_POL : 1; + uint32_t CAM0_HS_POL : 1; + uint32_t CAM0_TGEN_EN : 1; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DFT_100 { + uint32_t raw; + struct { + uint32_t DUMMY_0 : 8; + uint32_t DUMMY_1 : 8; + uint32_t DUMMY_2 : 8; + uint32_t DUMMY_3 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DFT_104 { + uint32_t raw; + struct { + uint32_t DUMMY_4 : 8; + uint32_t DUMMY_5 : 8; + uint32_t DUMMY_6 : 8; + uint32_t DUMMY_7 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DFT_108 { + uint32_t raw; + struct { + uint32_t DUMMY_8 : 8; + uint32_t DUMMY_9 : 8; + uint32_t DUMMY_10 : 8; + uint32_t DUMMY_11 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DFT_10C { + uint32_t raw; + struct { + uint32_t DUMMY_12 : 8; + uint32_t DUMMY_13 : 8; + uint32_t DUMMY_14 : 8; + uint32_t DUMMY_15 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DFT_110 { + uint32_t raw; + struct { + uint32_t RO_DESKEW_CODE0 : 8; + uint32_t RO_DESKEW_CODE1 : 8; + uint32_t RO_DESKEW_CODE2 : 8; + uint32_t RO_DESKEW_CODE3 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DFT_114 { + uint32_t raw; + struct { + uint32_t RO_DESKEW_CODE4 : 8; + uint32_t RO_DESKEW_CODE5 : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DFT_11C { + uint32_t raw; + struct { + uint32_t RO_PD_RT : 6; + uint32_t _rsv_6 : 10; + uint32_t RO_PD_RXAFE_IB : 6; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DBG_12 { + uint32_t raw; + struct { + uint32_t DBG_SEL : 16; + uint32_t DBG_CK_SEL : 8; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_0 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE0_L : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_1 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE0_H : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_2 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE1_L : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_3 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE1_H : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_4 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE2_L : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_5 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE2_H : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_6 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE3_L : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_7 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE3_H : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_8 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE4_L : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_9 { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE4_H : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_A { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE5_L : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_TEST_B { + uint32_t raw; + struct { + uint32_t MIPIRX_TEST_RXAFE5_H : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D0 { + uint32_t raw; + struct { + uint32_t DUMMY_D0 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D1 { + uint32_t raw; + struct { + uint32_t DUMMY_D1 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D2 { + uint32_t raw; + struct { + uint32_t DUMMY_D2 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D3 { + uint32_t raw; + struct { + uint32_t DUMMY_D3 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D4 { + uint32_t raw; + struct { + uint32_t DUMMY_D4 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D5 { + uint32_t raw; + struct { + uint32_t DUMMY_D5 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D6 { + uint32_t raw; + struct { + uint32_t DUMMY_D6 : 32; + } bits; +}; + +union REG_SENSOR_PHY_TOP_DUMMY_D7 { + uint32_t raw; + struct { + uint32_t DUMMY_D7 : 32; + } bits; +}; + +#endif // _REG_FIELDS_CSI_WRAP_H_ diff --git a/freertos/cvitek/install/include/hal/config/cv180x_pinlist_swconfig.h b/freertos/cvitek/install/include/hal/config/cv180x_pinlist_swconfig.h new file mode 100644 index 000000000..2a13a616e --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/cv180x_pinlist_swconfig.h @@ -0,0 +1,407 @@ +//##============================================================================== +//##=== This script is generate by genswconfig.pl from .\00_Phobos_Pinlist_20220315.xls +//##=== Generate Time stamp is : 2022-03-17 14:04:49 +//##============================================================================== + +#ifndef __CV180X_PINLIST_SWCONFIG_H__ +#define __CV180X_PINLIST_SWCONFIG_H__ + +#define SD0_CLK__SDIO0_CLK 0 +#define SD0_CLK__IIC1_SDA 1 +#define SD0_CLK__SPI0_SCK 2 +#define SD0_CLK__XGPIOA_7 3 +#define SD0_CLK__PWM_15 5 +#define SD0_CLK__EPHY_LNK_LED 6 +#define SD0_CLK__DBG_0 7 +#define SD0_CMD__SDIO0_CMD 0 +#define SD0_CMD__IIC1_SCL 1 +#define SD0_CMD__SPI0_SDO 2 +#define SD0_CMD__XGPIOA_8 3 +#define SD0_CMD__PWM_14 5 +#define SD0_CMD__EPHY_SPD_LED 6 +#define SD0_CMD__DBG_1 7 +#define SD0_D0__SDIO0_D_0 0 +#define SD0_D0__CAM_MCLK1 1 +#define SD0_D0__SPI0_SDI 2 +#define SD0_D0__XGPIOA_9 3 +#define SD0_D0__UART3_TX 4 +#define SD0_D0__PWM_13 5 +#define SD0_D0__WG0_D0 6 +#define SD0_D0__DBG_2 7 +#define SD0_D1__SDIO0_D_1 0 +#define SD0_D1__IIC1_SDA 1 +#define SD0_D1__AUX0 2 +#define SD0_D1__XGPIOA_10 3 +#define SD0_D1__UART1_TX 4 +#define SD0_D1__PWM_12 5 +#define SD0_D1__WG0_D1 6 +#define SD0_D1__DBG_3 7 +#define SD0_D2__SDIO0_D_2 0 +#define SD0_D2__IIC1_SCL 1 +#define SD0_D2__AUX1 2 +#define SD0_D2__XGPIOA_11 3 +#define SD0_D2__UART1_RX 4 +#define SD0_D2__PWM_11 5 +#define SD0_D2__WG1_D0 6 +#define SD0_D2__DBG_4 7 +#define SD0_D3__SDIO0_D_3 0 +#define SD0_D3__CAM_MCLK0 1 +#define SD0_D3__SPI0_CS_X 2 +#define SD0_D3__XGPIOA_12 3 +#define SD0_D3__UART3_RX 4 +#define SD0_D3__PWM_10 5 +#define SD0_D3__WG1_D1 6 +#define SD0_D3__DBG_5 7 +#define SD0_CD__SDIO0_CD 0 +#define SD0_CD__XGPIOA_13 3 +#define SD0_PWR_EN__SDIO0_PWR_EN 0 +#define SD0_PWR_EN__XGPIOA_14 3 +#define SPK_EN__XGPIOA_15 3 +#define UART0_TX__UART0_TX 0 +#define UART0_TX__CAM_MCLK1 1 +#define UART0_TX__PWM_4 2 +#define UART0_TX__XGPIOA_16 3 +#define UART0_TX__UART1_TX 4 +#define UART0_TX__AUX1 5 +#define UART0_TX__JTAG_TMS 6 +#define UART0_TX__DBG_6 7 +#define UART0_RX__UART0_RX 0 +#define UART0_RX__CAM_MCLK0 1 +#define UART0_RX__PWM_5 2 +#define UART0_RX__XGPIOA_17 3 +#define UART0_RX__UART1_RX 4 +#define UART0_RX__AUX0 5 +#define UART0_RX__JTAG_TCK 6 +#define UART0_RX__DBG_7 7 +#define SPINOR_HOLD_X__SPINOR_HOLD_X 1 +#define SPINOR_HOLD_X__SPINAND_HOLD 2 +#define SPINOR_HOLD_X__XGPIOA_26 3 +#define SPINOR_SCK__SPINOR_SCK 1 +#define SPINOR_SCK__SPINAND_CLK 2 +#define SPINOR_SCK__XGPIOA_22 3 +#define SPINOR_MOSI__SPINOR_MOSI 1 +#define SPINOR_MOSI__SPINAND_MOSI 2 +#define SPINOR_MOSI__XGPIOA_25 3 +#define SPINOR_WP_X__SPINOR_WP_X 1 +#define SPINOR_WP_X__SPINAND_WP 2 +#define SPINOR_WP_X__XGPIOA_27 3 +#define SPINOR_MISO__SPINOR_MISO 1 +#define SPINOR_MISO__SPINAND_MISO 2 +#define SPINOR_MISO__XGPIOA_23 3 +#define SPINOR_CS_X__SPINOR_CS_X 1 +#define SPINOR_CS_X__SPINAND_CS 2 +#define SPINOR_CS_X__XGPIOA_24 3 +#define JTAG_CPU_TMS__JTAG_TMS 0 +#define JTAG_CPU_TMS__CAM_MCLK0 1 +#define JTAG_CPU_TMS__PWM_7 2 +#define JTAG_CPU_TMS__XGPIOA_19 3 +#define JTAG_CPU_TMS__UART1_RTS 4 +#define JTAG_CPU_TMS__AUX0 5 +#define JTAG_CPU_TMS__UART1_TX 6 +#define JTAG_CPU_TCK__JTAG_TCK 0 +#define JTAG_CPU_TCK__CAM_MCLK1 1 +#define JTAG_CPU_TCK__PWM_6 2 +#define JTAG_CPU_TCK__XGPIOA_18 3 +#define JTAG_CPU_TCK__UART1_CTS 4 +#define JTAG_CPU_TCK__AUX1 5 +#define JTAG_CPU_TCK__UART1_RX 6 +#define IIC0_SCL__CV_SCL0__CR_4WTDI 0 +#define IIC0_SDA__CV_SDA0__CR_4WTDO 0 +#define IIC0_SCL__JTAG_TDI 0 +#define IIC0_SCL__UART1_TX 1 +#define IIC0_SCL__UART2_TX 2 +#define IIC0_SCL__XGPIOA_28 3 +#define IIC0_SCL__IIC0_SCL 4 +#define IIC0_SCL__WG0_D0 5 +#define IIC0_SCL__DBG_10 7 +#define IIC0_SDA__JTAG_TDO 0 +#define IIC0_SDA__UART1_RX 1 +#define IIC0_SDA__UART2_RX 2 +#define IIC0_SDA__XGPIOA_29 3 +#define IIC0_SDA__IIC0_SDA 4 +#define IIC0_SDA__WG0_D1 5 +#define IIC0_SDA__WG1_D0 6 +#define IIC0_SDA__DBG_11 7 +#define AUX0__AUX0 0 +#define AUX0__XGPIOA_30 3 +#define AUX0__IIS1_MCLK 4 +#define AUX0__WG1_D1 6 +#define AUX0__DBG_12 7 +#define GPIO_ZQ__PWR_GPIO_24 3 +#define GPIO_ZQ__PWM_2 4 +#define PWR_VBAT_DET__PWR_VBAT_DET 0 +#define PWR_RSTN__PWR_RSTN 0 +#define PWR_SEQ1__PWR_SEQ1 0 +#define PWR_SEQ1__PWR_GPIO_3 3 +#define PWR_SEQ2__PWR_SEQ2 0 +#define PWR_SEQ2__PWR_GPIO_4 3 +#define PTEST__PWR_PTEST 0 +#define PWR_WAKEUP0__PWR_WAKEUP0 0 +#define PWR_WAKEUP0__PWR_IR0 1 +#define PWR_WAKEUP0__PWR_UART0_TX 2 +#define PWR_WAKEUP0__PWR_GPIO_6 3 +#define PWR_WAKEUP0__UART1_TX 4 +#define PWR_WAKEUP0__IIC4_SCL 5 +#define PWR_WAKEUP0__EPHY_LNK_LED 6 +#define PWR_WAKEUP0__WG2_D0 7 +#define PWR_BUTTON1__PWR_BUTTON1 0 +#define PWR_BUTTON1__PWR_GPIO_8 3 +#define PWR_BUTTON1__UART1_RX 4 +#define PWR_BUTTON1__IIC4_SDA 5 +#define PWR_BUTTON1__EPHY_SPD_LED 6 +#define PWR_BUTTON1__WG2_D1 7 +#define XTAL_XIN__PWR_XTAL_CLKIN 0 +#define PWR_GPIO0__PWR_GPIO_0 0 +#define PWR_GPIO0__UART2_TX 1 +#define PWR_GPIO0__PWR_UART0_RX 2 +#define PWR_GPIO0__PWM_8 4 +#define PWR_GPIO1__PWR_GPIO_1 0 +#define PWR_GPIO1__UART2_RX 1 +#define PWR_GPIO1__EPHY_LNK_LED 3 +#define PWR_GPIO1__PWM_9 4 +#define PWR_GPIO1__PWR_IIC_SCL 5 +#define PWR_GPIO1__IIC2_SCL 6 +#define PWR_GPIO1__IIC0_SDA 7 +#define PWR_GPIO2__PWR_GPIO_2 0 +#define PWR_GPIO2__PWR_SECTICK 2 +#define PWR_GPIO2__EPHY_SPD_LED 3 +#define PWR_GPIO2__PWM_10 4 +#define PWR_GPIO2__PWR_IIC_SDA 5 +#define PWR_GPIO2__IIC2_SDA 6 +#define PWR_GPIO2__IIC0_SCL 7 +#define SD1_GPIO1__UART4_TX 1 +#define SD1_GPIO1__PWR_GPIO_26 3 +#define SD1_GPIO1__PWM_10 7 +#define SD1_GPIO0__UART4_RX 1 +#define SD1_GPIO0__PWR_GPIO_25 3 +#define SD1_GPIO0__PWM_11 7 +#define SD1_D3__PWR_SD1_D3 0 +#define SD1_D3__SPI2_CS_X 1 +#define SD1_D3__IIC1_SCL 2 +#define SD1_D3__PWR_GPIO_18 3 +#define SD1_D3__CAM_MCLK0 4 +#define SD1_D3__UART3_CTS 5 +#define SD1_D3__PWR_SPINOR1_CS_X 6 +#define SD1_D3__PWM_4 7 +#define SD1_D2__PWR_SD1_D2 0 +#define SD1_D2__IIC1_SCL 1 +#define SD1_D2__UART2_TX 2 +#define SD1_D2__PWR_GPIO_19 3 +#define SD1_D2__CAM_MCLK0 4 +#define SD1_D2__UART3_TX 5 +#define SD1_D2__PWR_SPINOR1_HOLD_X 6 +#define SD1_D2__PWM_5 7 +#define SD1_D1__PWR_SD1_D1 0 +#define SD1_D1__IIC1_SDA 1 +#define SD1_D1__UART2_RX 2 +#define SD1_D1__PWR_GPIO_20 3 +#define SD1_D1__CAM_MCLK1 4 +#define SD1_D1__UART3_RX 5 +#define SD1_D1__PWR_SPINOR1_WP_X 6 +#define SD1_D1__PWM_6 7 +#define SD1_D0__PWR_SD1_D0 0 +#define SD1_D0__SPI2_SDI 1 +#define SD1_D0__IIC1_SDA 2 +#define SD1_D0__PWR_GPIO_21 3 +#define SD1_D0__CAM_MCLK1 4 +#define SD1_D0__UART3_RTS 5 +#define SD1_D0__PWR_SPINOR1_MISO 6 +#define SD1_D0__PWM_7 7 +#define SD1_CMD__PWR_SD1_CMD 0 +#define SD1_CMD__SPI2_SDO 1 +#define SD1_CMD__IIC3_SCL 2 +#define SD1_CMD__PWR_GPIO_22 3 +#define SD1_CMD__CAM_VS0 4 +#define SD1_CMD__EPHY_LNK_LED 5 +#define SD1_CMD__PWR_SPINOR1_MOSI 6 +#define SD1_CMD__PWM_8 7 +#define SD1_CLK__PWR_SD1_CLK 0 +#define SD1_CLK__SPI2_SCK 1 +#define SD1_CLK__IIC3_SDA 2 +#define SD1_CLK__PWR_GPIO_23 3 +#define SD1_CLK__CAM_HS0 4 +#define SD1_CLK__EPHY_SPD_LED 5 +#define SD1_CLK__PWR_SPINOR1_SCK 6 +#define SD1_CLK__PWM_9 7 +#define PWM0_BUCK__PWM_0 0 +#define PWM0_BUCK__XGPIOB_0 3 +#define ADC1__XGPIOB_3 3 +#define ADC1__KEY_COL2 4 +#define ADC1__PWM_3 6 +#define USB_VBUS_DET__USB_VBUS_DET 0 +#define USB_VBUS_DET__XGPIOB_6 3 +#define USB_VBUS_DET__CAM_MCLK0 4 +#define USB_VBUS_DET__CAM_MCLK1 5 +#define USB_VBUS_DET__PWM_4 6 +#define MUX_SPI1_MISO__UART3_RTS 1 +#define MUX_SPI1_MISO__IIC1_SDA 2 +#define MUX_SPI1_MISO__XGPIOB_8 3 +#define MUX_SPI1_MISO__PWM_9 4 +#define MUX_SPI1_MISO__KEY_COL1 5 +#define MUX_SPI1_MISO__SPI1_SDI 6 +#define MUX_SPI1_MISO__DBG_14 7 +#define MUX_SPI1_MOSI__UART3_RX 1 +#define MUX_SPI1_MOSI__IIC1_SCL 2 +#define MUX_SPI1_MOSI__XGPIOB_7 3 +#define MUX_SPI1_MOSI__PWM_8 4 +#define MUX_SPI1_MOSI__KEY_COL0 5 +#define MUX_SPI1_MOSI__SPI1_SDO 6 +#define MUX_SPI1_MOSI__DBG_13 7 +#define MUX_SPI1_CS__UART3_CTS 1 +#define MUX_SPI1_CS__CAM_MCLK0 2 +#define MUX_SPI1_CS__XGPIOB_10 3 +#define MUX_SPI1_CS__PWM_11 4 +#define MUX_SPI1_CS__KEY_ROW3 5 +#define MUX_SPI1_CS__SPI1_CS_X 6 +#define MUX_SPI1_CS__DBG_16 7 +#define MUX_SPI1_SCK__UART3_TX 1 +#define MUX_SPI1_SCK__CAM_MCLK1 2 +#define MUX_SPI1_SCK__XGPIOB_9 3 +#define MUX_SPI1_SCK__PWM_10 4 +#define MUX_SPI1_SCK__KEY_ROW2 5 +#define MUX_SPI1_SCK__SPI1_SCK 6 +#define MUX_SPI1_SCK__DBG_15 7 +#define PAD_ETH_TXP__UART3_RX 1 +#define PAD_ETH_TXP__IIC1_SCL 2 +#define PAD_ETH_TXP__XGPIOB_25 3 +#define PAD_ETH_TXP__PWM_13 4 +#define PAD_ETH_TXP__CAM_MCLK0 5 +#define PAD_ETH_TXP__SPI1_SDO 6 +#define PAD_ETH_TXP__IIS2_LRCK 7 +#define PAD_ETH_TXM__UART3_RTS 1 +#define PAD_ETH_TXM__IIC1_SDA 2 +#define PAD_ETH_TXM__XGPIOB_24 3 +#define PAD_ETH_TXM__PWM_12 4 +#define PAD_ETH_TXM__CAM_MCLK1 5 +#define PAD_ETH_TXM__SPI1_SDI 6 +#define PAD_ETH_TXM__IIS2_BCLK 7 +#define PAD_ETH_RXP__UART3_TX 1 +#define PAD_ETH_RXP__CAM_MCLK1 2 +#define PAD_ETH_RXP__XGPIOB_27 3 +#define PAD_ETH_RXP__PWM_15 4 +#define PAD_ETH_RXP__CAM_HS0 5 +#define PAD_ETH_RXP__SPI1_SCK 6 +#define PAD_ETH_RXP__IIS2_DO 7 +#define PAD_ETH_RXM__UART3_CTS 1 +#define PAD_ETH_RXM__CAM_MCLK0 2 +#define PAD_ETH_RXM__XGPIOB_26 3 +#define PAD_ETH_RXM__PWM_14 4 +#define PAD_ETH_RXM__CAM_VS0 5 +#define PAD_ETH_RXM__SPI1_CS_X 6 +#define PAD_ETH_RXM__IIS2_DI 7 +#define GPIO_RTX__VI0_D_15 1 +#define GPIO_RTX__XGPIOB_23 3 +#define GPIO_RTX__PWM_1 4 +#define GPIO_RTX__CAM_MCLK0 5 +#define GPIO_RTX__IIS2_MCLK 7 +#define PAD_MIPIRX4N__VI0_CLK 1 +#define PAD_MIPIRX4N__IIC0_SCL 2 +#define PAD_MIPIRX4N__XGPIOC_2 3 +#define PAD_MIPIRX4N__IIC1_SDA 4 +#define PAD_MIPIRX4N__CAM_MCLK0 5 +#define PAD_MIPIRX4N__KEY_ROW0 6 +#define PAD_MIPIRX4N__MUX_SPI1_SCK 7 +#define PAD_MIPIRX4P__VI0_D_0 1 +#define PAD_MIPIRX4P__IIC0_SDA 2 +#define PAD_MIPIRX4P__XGPIOC_3 3 +#define PAD_MIPIRX4P__IIC1_SCL 4 +#define PAD_MIPIRX4P__CAM_MCLK1 5 +#define PAD_MIPIRX4P__KEY_ROW1 6 +#define PAD_MIPIRX4P__MUX_SPI1_CS 7 +#define PAD_MIPIRX3N__VI0_D_1 1 +#define PAD_MIPIRX3N__XGPIOC_4 3 +#define PAD_MIPIRX3N__CAM_MCLK0 4 +#define PAD_MIPIRX3N__MUX_SPI1_MISO 7 +#define PAD_MIPIRX3P__VI0_D_2 1 +#define PAD_MIPIRX3P__XGPIOC_5 3 +#define PAD_MIPIRX3P__MUX_SPI1_MOSI 7 +#define PAD_MIPIRX2N__VI0_D_3 1 +#define PAD_MIPIRX2N__XGPIOC_6 3 +#define PAD_MIPIRX2N__IIC4_SCL 5 +#define PAD_MIPIRX2N__DBG_6 7 +#define PAD_MIPIRX2P__VI0_D_4 1 +#define PAD_MIPIRX2P__XGPIOC_7 3 +#define PAD_MIPIRX2P__IIC4_SDA 5 +#define PAD_MIPIRX2P__DBG_7 7 +#define PAD_MIPIRX1N__VI0_D_5 1 +#define PAD_MIPIRX1N__XGPIOC_8 3 +#define PAD_MIPIRX1N__KEY_ROW3 6 +#define PAD_MIPIRX1N__DBG_8 7 +#define PAD_MIPIRX1P__VI0_D_6 1 +#define PAD_MIPIRX1P__XGPIOC_9 3 +#define PAD_MIPIRX1P__IIC1_SDA 4 +#define PAD_MIPIRX1P__KEY_ROW2 6 +#define PAD_MIPIRX1P__DBG_9 7 +#define PAD_MIPIRX0N__VI0_D_7 1 +#define PAD_MIPIRX0N__XGPIOC_10 3 +#define PAD_MIPIRX0N__IIC1_SCL 4 +#define PAD_MIPIRX0N__CAM_MCLK1 5 +#define PAD_MIPIRX0N__DBG_10 7 +#define PAD_MIPIRX0P__VI0_D_8 1 +#define PAD_MIPIRX0P__XGPIOC_11 3 +#define PAD_MIPIRX0P__CAM_MCLK0 4 +#define PAD_MIPIRX0P__DBG_11 7 +#define PAD_MIPI_TXM2__VI0_D_13 1 +#define PAD_MIPI_TXM2__IIC0_SDA 2 +#define PAD_MIPI_TXM2__XGPIOC_16 3 +#define PAD_MIPI_TXM2__IIC1_SDA 4 +#define PAD_MIPI_TXM2__PWM_8 5 +#define PAD_MIPI_TXM2__SPI0_SCK 6 +#define PAD_MIPI_TXP2__VI0_D_14 1 +#define PAD_MIPI_TXP2__IIC0_SCL 2 +#define PAD_MIPI_TXP2__XGPIOC_17 3 +#define PAD_MIPI_TXP2__IIC1_SCL 4 +#define PAD_MIPI_TXP2__PWM_9 5 +#define PAD_MIPI_TXP2__SPI0_CS_X 6 +#define PAD_MIPI_TXP2__IIS1_MCLK 7 +#define PAD_MIPI_TXM1__SPI3_SDO 0 +#define PAD_MIPI_TXM1__VI0_D_11 1 +#define PAD_MIPI_TXM1__IIS1_LRCK 2 +#define PAD_MIPI_TXM1__XGPIOC_14 3 +#define PAD_MIPI_TXM1__IIC2_SDA 4 +#define PAD_MIPI_TXM1__PWM_10 5 +#define PAD_MIPI_TXM1__SPI0_SDO 6 +#define PAD_MIPI_TXM1__DBG_14 7 +#define PAD_MIPI_TXP1__SPI3_SDI 0 +#define PAD_MIPI_TXP1__VI0_D_12 1 +#define PAD_MIPI_TXP1__IIS1_DO 2 +#define PAD_MIPI_TXP1__XGPIOC_15 3 +#define PAD_MIPI_TXP1__IIC2_SCL 4 +#define PAD_MIPI_TXP1__PWM_11 5 +#define PAD_MIPI_TXP1__SPI0_SDI 6 +#define PAD_MIPI_TXP1__DBG_15 7 +#define PAD_MIPI_TXM0__SPI3_SCK 0 +#define PAD_MIPI_TXM0__VI0_D_9 1 +#define PAD_MIPI_TXM0__IIS1_DI 2 +#define PAD_MIPI_TXM0__XGPIOC_12 3 +#define PAD_MIPI_TXM0__CAM_MCLK1 4 +#define PAD_MIPI_TXM0__PWM_14 5 +#define PAD_MIPI_TXM0__CAM_VS0 6 +#define PAD_MIPI_TXM0__DBG_12 7 +#define PAD_MIPI_TXP0__SPI3_CS_X 0 +#define PAD_MIPI_TXP0__VI0_D_10 1 +#define PAD_MIPI_TXP0__IIS1_BCLK 2 +#define PAD_MIPI_TXP0__XGPIOC_13 3 +#define PAD_MIPI_TXP0__CAM_MCLK0 4 +#define PAD_MIPI_TXP0__PWM_15 5 +#define PAD_MIPI_TXP0__CAM_HS0 6 +#define PAD_MIPI_TXP0__DBG_13 7 +#define PKG_TYPE0__PKG_TYPE0 0 +#define PKG_TYPE1__PKG_TYPE1 0 +#define PKG_TYPE2__PKG_TYPE2 0 +#define PAD_AUD_AINL_MIC__XGPIOC_23 3 +#define PAD_AUD_AINL_MIC__IIS1_BCLK 4 +#define PAD_AUD_AINL_MIC__IIS2_BCLK 5 +#define PAD_AUD_AINR_MIC__XGPIOC_22 3 +#define PAD_AUD_AINR_MIC__IIS1_DO 4 +#define PAD_AUD_AINR_MIC__IIS2_DI 5 +#define PAD_AUD_AINR_MIC__IIS1_DI 6 +#define PAD_AUD_AOUTL__XGPIOC_25 3 +#define PAD_AUD_AOUTL__IIS1_LRCK 4 +#define PAD_AUD_AOUTL__IIS2_LRCK 5 +#define PAD_AUD_AOUTR__XGPIOC_24 3 +#define PAD_AUD_AOUTR__IIS1_DI 4 +#define PAD_AUD_AOUTR__IIS2_DO 5 +#define PAD_AUD_AOUTR__IIS1_DO 6 + +#endif /* __CV180X_PINLIST_SWCONFIG_H__ */ diff --git a/freertos/cvitek/install/include/hal/config/cv180x_pinmux.h b/freertos/cvitek/install/include/hal/config/cv180x_pinmux.h new file mode 100644 index 000000000..1b72bc23e --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/cv180x_pinmux.h @@ -0,0 +1,51 @@ +#ifndef _CV180X_PINMUX_H_ +#define _CV180X_PINMUX_H_ + +/* + * Pinmux definitions + */ +#define PINMUX_UART0 0 +#define PINMUX_UART1 1 +#define PINMUX_UART2 2 +#define PINMUX_UART3 3 +#define PINMUX_UART3_2 4 +#define PINMUX_I2C0 5 +#define PINMUX_I2C1 6 +#define PINMUX_I2C2 7 +#define PINMUX_I2C3 8 +#define PINMUX_I2C4 9 +#define PINMUX_I2C4_2 10 +#define PINMUX_SPI0 11 +#define PINMUX_SPI1 12 +#define PINMUX_SPI2 13 +#define PINMUX_SPI2_2 14 +#define PINMUX_SPI3 15 +#define PINMUX_SPI3_2 16 +#define PINMUX_I2S0 17 +#define PINMUX_I2S1 18 +#define PINMUX_I2S2 19 +#define PINMUX_I2S3 20 +#define PINMUX_USBID 21 +#define PINMUX_SDIO0 22 +#define PINMUX_SDIO1 23 +#define PINMUX_ND 24 +#define PINMUX_EMMC 25 +#define PINMUX_SPI_NOR 26 +#define PINMUX_SPI_NAND 27 +#define PINMUX_CAM0 28 +#define PINMUX_CAM1 29 +#define PINMUX_PCM0 30 +#define PINMUX_PCM1 31 +#define PINMUX_CSI0 32 +#define PINMUX_CSI1 33 +#define PINMUX_CSI2 34 +#define PINMUX_DSI 35 +#define PINMUX_VI0 36 +#define PINMUX_VO 37 +#define PINMUX_RMII1 38 +#define PINMUX_EPHY_LED 39 +#define PINMUX_I80 40 +#define PINMUX_LVDS 41 +#define PINMUX_USB 42 + +#endif // end of _CV180X_PINMUX_H_ diff --git a/freertos/cvitek/install/include/hal/config/cv180x_reg_fmux_gpio.h b/freertos/cvitek/install/include/hal/config/cv180x_reg_fmux_gpio.h new file mode 100644 index 000000000..a07236fba --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/cv180x_reg_fmux_gpio.h @@ -0,0 +1,337 @@ +// $Module: fmux_gpio $ +// $RegisterBank Version: V 1.0.00 $ +// $Author: ghost $ +// $Date: Thu, 17 Mar 2022 04:53:31 PM $ +// + +//GEN REG ADDR/OFFSET/MASK + +#ifndef __CV180X_REG_FMUX_GPIO_H__ +#define __CV180X_REG_FMUX_GPIO_H__ + +#define FMUX_GPIO_REG_IOCTRL_SD0_CLK 0x0 +#define FMUX_GPIO_REG_IOCTRL_SD0_CMD 0x4 +#define FMUX_GPIO_REG_IOCTRL_SD0_D0 0x8 +#define FMUX_GPIO_REG_IOCTRL_SD0_D1 0xc +#define FMUX_GPIO_REG_IOCTRL_SD0_D2 0x10 +#define FMUX_GPIO_REG_IOCTRL_SD0_D3 0x14 +#define FMUX_GPIO_REG_IOCTRL_SD0_CD 0x18 +#define FMUX_GPIO_REG_IOCTRL_SD0_PWR_EN 0x1c +#define FMUX_GPIO_REG_IOCTRL_SPK_EN 0x20 +#define FMUX_GPIO_REG_IOCTRL_UART0_TX 0x24 +#define FMUX_GPIO_REG_IOCTRL_UART0_RX 0x28 +#define FMUX_GPIO_REG_IOCTRL_SPINOR_HOLD_X 0x2c +#define FMUX_GPIO_REG_IOCTRL_SPINOR_SCK 0x30 +#define FMUX_GPIO_REG_IOCTRL_SPINOR_MOSI 0x34 +#define FMUX_GPIO_REG_IOCTRL_SPINOR_WP_X 0x38 +#define FMUX_GPIO_REG_IOCTRL_SPINOR_MISO 0x3c +#define FMUX_GPIO_REG_IOCTRL_SPINOR_CS_X 0x40 +#define FMUX_GPIO_REG_IOCTRL_JTAG_CPU_TMS 0x44 +#define FMUX_GPIO_REG_IOCTRL_JTAG_CPU_TCK 0x48 +#define FMUX_GPIO_REG_IOCTRL_IIC0_SCL 0x4c +#define FMUX_GPIO_REG_IOCTRL_IIC0_SDA 0x50 +#define FMUX_GPIO_REG_IOCTRL_AUX0 0x54 +#define FMUX_GPIO_REG_IOCTRL_GPIO_ZQ 0x58 +#define FMUX_GPIO_REG_IOCTRL_PWR_VBAT_DET 0x5c +#define FMUX_GPIO_REG_IOCTRL_PWR_RSTN 0x60 +#define FMUX_GPIO_REG_IOCTRL_PWR_SEQ1 0x64 +#define FMUX_GPIO_REG_IOCTRL_PWR_SEQ2 0x68 +#define FMUX_GPIO_REG_IOCTRL_PWR_WAKEUP0 0x6c +#define FMUX_GPIO_REG_IOCTRL_PWR_BUTTON1 0x70 +#define FMUX_GPIO_REG_IOCTRL_XTAL_XIN 0x74 +#define FMUX_GPIO_REG_IOCTRL_PWR_GPIO0 0x78 +#define FMUX_GPIO_REG_IOCTRL_PWR_GPIO1 0x7c +#define FMUX_GPIO_REG_IOCTRL_PWR_GPIO2 0x80 +#define FMUX_GPIO_REG_IOCTRL_SD1_GPIO1 0x84 +#define FMUX_GPIO_REG_IOCTRL_SD1_GPIO0 0x88 +#define FMUX_GPIO_REG_IOCTRL_SD1_D3 0x8c +#define FMUX_GPIO_REG_IOCTRL_SD1_D2 0x90 +#define FMUX_GPIO_REG_IOCTRL_SD1_D1 0x94 +#define FMUX_GPIO_REG_IOCTRL_SD1_D0 0x98 +#define FMUX_GPIO_REG_IOCTRL_SD1_CMD 0x9c +#define FMUX_GPIO_REG_IOCTRL_SD1_CLK 0xa0 +#define FMUX_GPIO_REG_IOCTRL_PWM0_BUCK 0xa4 +#define FMUX_GPIO_REG_IOCTRL_ADC1 0xa8 +#define FMUX_GPIO_REG_IOCTRL_USB_VBUS_DET 0xac +#define FMUX_GPIO_REG_IOCTRL_MUX_SPI1_MISO 0xb0 +#define FMUX_GPIO_REG_IOCTRL_MUX_SPI1_MOSI 0xb4 +#define FMUX_GPIO_REG_IOCTRL_MUX_SPI1_CS 0xb8 +#define FMUX_GPIO_REG_IOCTRL_MUX_SPI1_SCK 0xbc +#define FMUX_GPIO_REG_IOCTRL_PAD_ETH_TXP 0xc0 +#define FMUX_GPIO_REG_IOCTRL_PAD_ETH_TXM 0xc4 +#define FMUX_GPIO_REG_IOCTRL_PAD_ETH_RXP 0xc8 +#define FMUX_GPIO_REG_IOCTRL_PAD_ETH_RXM 0xcc +#define FMUX_GPIO_REG_IOCTRL_GPIO_RTX 0xd0 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX4N 0xd4 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX4P 0xd8 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX3N 0xdc +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX3P 0xe0 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX2N 0xe4 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX2P 0xe8 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX1N 0xec +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX1P 0xf0 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX0N 0xf4 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPIRX0P 0xf8 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPI_TXM2 0xfc +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPI_TXP2 0x100 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPI_TXM1 0x104 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPI_TXP1 0x108 +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPI_TXM0 0x10c +#define FMUX_GPIO_REG_IOCTRL_PAD_MIPI_TXP0 0x110 +#define FMUX_GPIO_REG_IOCTRL_PKG_TYPE0 0x114 +#define FMUX_GPIO_REG_IOCTRL_PKG_TYPE1 0x118 +#define FMUX_GPIO_REG_IOCTRL_PKG_TYPE2 0x11c +#define FMUX_GPIO_REG_IOCTRL_PAD_AUD_AINL_MIC 0x120 +#define FMUX_GPIO_REG_IOCTRL_PAD_AUD_AINR_MIC 0x124 +#define FMUX_GPIO_REG_IOCTRL_PAD_AUD_AOUTL 0x128 +#define FMUX_GPIO_REG_IOCTRL_PAD_AUD_AOUTR 0x12c +#define FMUX_GPIO_REG_DEVMATRIX_UART0_IP_SEL 0x1d4 +#define FMUX_GPIO_REG_DEVMATRIX_UART1_IP_SEL 0x1d8 +#define FMUX_GPIO_REG_DEVMATRIX_UART2_IP_SEL 0x1dc +#define FMUX_GPIO_REG_DEVMATRIX_UART3_IP_SEL 0x1e0 +#define FMUX_GPIO_REG_DEVMATRIX_UART4_IP_SEL 0x1e4 +#define FMUX_GPIO_FUNCSEL_SD0_CLK 0x0 +#define FMUX_GPIO_FUNCSEL_SD0_CLK_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_CLK_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD0_CMD 0x4 +#define FMUX_GPIO_FUNCSEL_SD0_CMD_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_CMD_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD0_D0 0x8 +#define FMUX_GPIO_FUNCSEL_SD0_D0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_D0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD0_D1 0xc +#define FMUX_GPIO_FUNCSEL_SD0_D1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_D1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD0_D2 0x10 +#define FMUX_GPIO_FUNCSEL_SD0_D2_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_D2_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD0_D3 0x14 +#define FMUX_GPIO_FUNCSEL_SD0_D3_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_D3_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD0_CD 0x18 +#define FMUX_GPIO_FUNCSEL_SD0_CD_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_CD_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD0_PWR_EN 0x1c +#define FMUX_GPIO_FUNCSEL_SD0_PWR_EN_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD0_PWR_EN_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SPK_EN 0x20 +#define FMUX_GPIO_FUNCSEL_SPK_EN_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SPK_EN_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_UART0_TX 0x24 +#define FMUX_GPIO_FUNCSEL_UART0_TX_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_UART0_TX_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_UART0_RX 0x28 +#define FMUX_GPIO_FUNCSEL_UART0_RX_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_UART0_RX_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SPINOR_HOLD_X 0x2c +#define FMUX_GPIO_FUNCSEL_SPINOR_HOLD_X_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SPINOR_HOLD_X_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SPINOR_SCK 0x30 +#define FMUX_GPIO_FUNCSEL_SPINOR_SCK_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SPINOR_SCK_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SPINOR_MOSI 0x34 +#define FMUX_GPIO_FUNCSEL_SPINOR_MOSI_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SPINOR_MOSI_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SPINOR_WP_X 0x38 +#define FMUX_GPIO_FUNCSEL_SPINOR_WP_X_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SPINOR_WP_X_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SPINOR_MISO 0x3c +#define FMUX_GPIO_FUNCSEL_SPINOR_MISO_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SPINOR_MISO_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SPINOR_CS_X 0x40 +#define FMUX_GPIO_FUNCSEL_SPINOR_CS_X_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SPINOR_CS_X_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_JTAG_CPU_TMS 0x44 +#define FMUX_GPIO_FUNCSEL_JTAG_CPU_TMS_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_JTAG_CPU_TMS_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_JTAG_CPU_TCK 0x48 +#define FMUX_GPIO_FUNCSEL_JTAG_CPU_TCK_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_JTAG_CPU_TCK_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_IIC0_SCL 0x4c +#define FMUX_GPIO_FUNCSEL_IIC0_SCL_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_IIC0_SCL_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_IIC0_SDA 0x50 +#define FMUX_GPIO_FUNCSEL_IIC0_SDA_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_IIC0_SDA_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_AUX0 0x54 +#define FMUX_GPIO_FUNCSEL_AUX0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_AUX0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_GPIO_ZQ 0x58 +#define FMUX_GPIO_FUNCSEL_GPIO_ZQ_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_GPIO_ZQ_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_VBAT_DET 0x5c +#define FMUX_GPIO_FUNCSEL_PWR_VBAT_DET_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_VBAT_DET_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_RSTN 0x60 +#define FMUX_GPIO_FUNCSEL_PWR_RSTN_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_RSTN_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_SEQ1 0x64 +#define FMUX_GPIO_FUNCSEL_PWR_SEQ1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_SEQ1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_SEQ2 0x68 +#define FMUX_GPIO_FUNCSEL_PWR_SEQ2_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_SEQ2_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_WAKEUP0 0x6c +#define FMUX_GPIO_FUNCSEL_PWR_WAKEUP0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_WAKEUP0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_BUTTON1 0x70 +#define FMUX_GPIO_FUNCSEL_PWR_BUTTON1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_BUTTON1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_XTAL_XIN 0x74 +#define FMUX_GPIO_FUNCSEL_XTAL_XIN_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_XTAL_XIN_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO0 0x78 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO1 0x7c +#define FMUX_GPIO_FUNCSEL_PWR_GPIO1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO2 0x80 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO2_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWR_GPIO2_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_GPIO1 0x84 +#define FMUX_GPIO_FUNCSEL_SD1_GPIO1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_GPIO1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_GPIO0 0x88 +#define FMUX_GPIO_FUNCSEL_SD1_GPIO0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_GPIO0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_D3 0x8c +#define FMUX_GPIO_FUNCSEL_SD1_D3_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_D3_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_D2 0x90 +#define FMUX_GPIO_FUNCSEL_SD1_D2_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_D2_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_D1 0x94 +#define FMUX_GPIO_FUNCSEL_SD1_D1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_D1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_D0 0x98 +#define FMUX_GPIO_FUNCSEL_SD1_D0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_D0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_CMD 0x9c +#define FMUX_GPIO_FUNCSEL_SD1_CMD_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_CMD_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_SD1_CLK 0xa0 +#define FMUX_GPIO_FUNCSEL_SD1_CLK_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_SD1_CLK_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PWM0_BUCK 0xa4 +#define FMUX_GPIO_FUNCSEL_PWM0_BUCK_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PWM0_BUCK_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_ADC1 0xa8 +#define FMUX_GPIO_FUNCSEL_ADC1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_ADC1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_USB_VBUS_DET 0xac +#define FMUX_GPIO_FUNCSEL_USB_VBUS_DET_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_USB_VBUS_DET_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_MISO 0xb0 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_MISO_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_MISO_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_MOSI 0xb4 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_MOSI_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_MOSI_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_CS 0xb8 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_CS_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_CS_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_SCK 0xbc +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_SCK_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_MUX_SPI1_SCK_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_TXP 0xc0 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_TXP_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_TXP_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_TXM 0xc4 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_TXM_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_TXM_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_RXP 0xc8 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_RXP_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_RXP_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_RXM 0xcc +#define FMUX_GPIO_FUNCSEL_PAD_ETH_RXM_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_ETH_RXM_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_GPIO_RTX 0xd0 +#define FMUX_GPIO_FUNCSEL_GPIO_RTX_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_GPIO_RTX_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX4N 0xd4 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX4N_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX4N_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P 0xd8 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N 0xdc +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P 0xe0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N 0xe4 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P 0xe8 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX1N 0xec +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX1N_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX1N_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX1P 0xf0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX1P_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX1P_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX0N 0xf4 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX0N_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX0N_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX0P 0xf8 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX0P_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPIRX0P_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM2 0xfc +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM2_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM2_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP2 0x100 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP2_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP2_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM1 0x104 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP1 0x108 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM0 0x10c +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP0 0x110 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE0 0x114 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE0_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE0_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE1 0x118 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE1_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE1_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE2 0x11c +#define FMUX_GPIO_FUNCSEL_PKG_TYPE2_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PKG_TYPE2_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AINL_MIC 0x120 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AINL_MIC_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AINL_MIC_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AINR_MIC 0x124 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AINR_MIC_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AINR_MIC_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AOUTL 0x128 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AOUTL_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AOUTL_MASK 0x7 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AOUTR 0x12c +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AOUTR_OFFSET 0 +#define FMUX_GPIO_FUNCSEL_PAD_AUD_AOUTR_MASK 0x7 +#define FMUX_GPIO_MUX_UART0_IP_SEL 0x1d4 +#define FMUX_GPIO_MUX_UART0_IP_SEL_OFFSET 0 +#define FMUX_GPIO_MUX_UART0_IP_SEL_MASK 0x7 +#define FMUX_GPIO_MUX_UART1_IP_SEL 0x1d8 +#define FMUX_GPIO_MUX_UART1_IP_SEL_OFFSET 0 +#define FMUX_GPIO_MUX_UART1_IP_SEL_MASK 0x7 +#define FMUX_GPIO_MUX_UART2_IP_SEL 0x1dc +#define FMUX_GPIO_MUX_UART2_IP_SEL_OFFSET 0 +#define FMUX_GPIO_MUX_UART2_IP_SEL_MASK 0x7 +#define FMUX_GPIO_MUX_UART3_IP_SEL 0x1e0 +#define FMUX_GPIO_MUX_UART3_IP_SEL_OFFSET 0 +#define FMUX_GPIO_MUX_UART3_IP_SEL_MASK 0x7 +#define FMUX_GPIO_MUX_UART4_IP_SEL 0x1e4 +#define FMUX_GPIO_MUX_UART4_IP_SEL_OFFSET 0 +#define FMUX_GPIO_MUX_UART4_IP_SEL_MASK 0x7 + +#endif /* __CV180X_REG_FMUX_GPIO_H__ */ diff --git a/freertos/cvitek/install/include/hal/config/intr_conf.h b/freertos/cvitek/install/include/hal/config/intr_conf.h new file mode 100644 index 000000000..bd6843409 --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/intr_conf.h @@ -0,0 +1,140 @@ +#ifndef _CV180X_INTERRUPT_CONFIG_H_ +#define _CV180X_INTERRUPT_CONFIG_H_ + +/* irq */ +#define IRQ_LEVEL 0 +#define IRQ_EDGE 3 + +#define NA 0xFFFF + +#define TEMPSEN_IRQ_O NA +#define RTC_ALARM_O NA +#define RTC_PWR_BUTTON1_LONGPRESS_O NA +#define VBAT_DEB_IRQ_O NA +#define JPEG_INTERRUPT 16 +#define H264_INTERRUPT 17 +#define H265_INTERRUPT 18 +#define VC_SBM_INT 19 +#define ISP_INT 20 +#define SC_INTR_0 21 +#define VIP_INT_CSI_MAC0 22 +#define VIP_INT_CSI_MAC1 23 +#define LDC_INT 24 +#define SDMA_INTR_CPU0 NA +#define SDMA_INTR_CPU1 NA +#define SDMA_INTR_CPU2 25 +#define USB_IRQS NA +#define ETH0_SBD_INTR_O NA +#define ETH0_LPI_INTR_O NA +#define EMMC_WAKEUP_INTR NA +#define EMMC_INTR NA +#define SD0_WAKEUP_INTR NA +#define SD0_INTR NA +#define SD1_WAKEUP_INTR NA +#define SD1_INTR NA +#define SPI_NAND_INTR NA +#define I2S0_INT 26 +#define I2S1_INT 27 +#define I2S2_INT 28 +#define I2S3_INT 29 +#define UART0_INTR 30 +#define UART1_INTR 31 +#define UART2_INTR NA +#define UART3_INTR NA +#define UART4_INTR NA +#define I2C0_INTR 32 +#define I2C1_INTR 33 +#define I2C2_INTR 34 +#define I2C3_INTR 35 +#define I2C4_INTR 36 +#define SPI_0_SSI_INTR 37 +#define SPI_1_SSI_INTR 38 +#define SPI_2_SSI_INTR NA +#define SPI_3_SSI_INTR NA +#define WDT0_INTR NA +#define WDT1_INTR NA +#define WDT2_INTR 39 +#define KEYSCAN_IRQ 40 +#define GPIO0_INTR_FLAG 41 +#define GPIO1_INTR_FLAG 42 +#define GPIO2_INTR_FLAG 43 +#define GPIO3_INTR_FLAG 44 +#define WGN0_IRQ 45 +#define WGN1_IRQ NA +#define WGN2_IRQ NA +#define MBOX_INT1 46 +#define IRRX_INT 47 +#define GPIO_INT 48 +#define UART_INT 49 +#define SPI_INT NA +#define I2C_INT 50 +#define WDT_INT 51 +#define TPU_INTR NA +#define TDMA_INTERRUPT 52 +#define SW_INT_0_CPU0 NA +#define SW_INT_1_CPU0 NA +#define SW_INT_0_CPU1 NA +#define SW_INT_1_CPU1 NA +#define SW_INT_0_CPU2 53 +#define SW_INT_1_CPU2 54 +#define TIMER_INTR_0 NA +#define TIMER_INTR_1 NA +#define TIMER_INTR_2 NA +#define TIMER_INTR_3 NA +#define TIMER_INTR_4 55 +#define TIMER_INTR_5 56 +#define TIMER_INTR_6 57 +#define TIMER_INTR_7 58 +#define PERI_FIREWALL_IRQ NA +#define HSPERI_FIREWALL_IRQ NA +#define DDR_FW_INTR NA +#define ROM_FIREWALL_IRQ NA +#define SPACC_IRQ 59 +#define TRNG_IRQ NA +#define AXI_MON_INTR NA +#define DDRC_PI_PHY_INTR NA +#define SF_SPI_INT NA +#define EPHY_INT_N_O NA +#define IVE_INT 60 +#define DBGSYS_APBUSMON_HANG_INT NA +#define INTR_SARADC NA +#define MBOX_INT_CA53 NA +#define MBOX_INT_C906 NA +#define MBOX_INT_C906_2ND 61 +#define NPMUIRQ_0 NA +#define CTIIRQ_0 NA +#define NEXTERRIRQ NA + +#define IRQF_TRIGGER_NONE 0x00000000 +#define IRQF_TRIGGER_RISING 0x00000001 +#define IRQF_TRIGGER_FALLING 0x00000002 +#define IRQF_TRIGGER_HIGH 0x00000004 +#define IRQF_TRIGGER_LOW 0x00000008 +#define IRQF_TRIGGER_MASK \ + (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW | IRQF_TRIGGER_RISING | \ + IRQF_TRIGGER_FALLING) + +typedef int (*irq_handler_t)(int irqn, void *priv); + +int request_irq(int irqn, irq_handler_t handler, + unsigned long flags, const char *name, void *priv); + +/* +void disable_irq(unsigned int irqn); +void enable_irq(unsigned int irqn); + +void cpu_enable_irqs(void); +void cpu_disable_irqs(void); + +extern void irq_trigger(int irqn); +extern void irq_clear(int irqn); +extern int irq_get_nums(void); +void pinmux_config(int io_type); +*/ +/*FIXME + * NUM_IRQ may be different accross + * different platform, we should review it when porting + */ +#define NUM_IRQ (62) + +#endif //end of_CV180X_INTERRUPT_CONFIG_H_ diff --git a/freertos/cvitek/install/include/hal/config/memmap.h b/freertos/cvitek/install/include/hal/config/memmap.h new file mode 100644 index 000000000..b145f8a3c --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/memmap.h @@ -0,0 +1,33 @@ +#ifndef __MEMMAP_H__ +#define __MEMMAP_H__ + +/* confirm with CONFIG_SYS_RESVIONSZ & CONFIG_SYS_RESVOSSZ by uboot defconfig */ +/* H26X_BITSTREAM_ADDR = CONFIG_SYS_BOOTMAPSZ - CONFIG_SYS_RESVIONSZ - CONFIG_SYS_RESVOSSZ*/ +#ifdef LINUX_BSP_64MB +#define H26X_BITSTREAM_ADDR (0x82700000) +#define H26X_BITSTREAM_SIZE (0x00200000) +#define H26X_ENC_BUFF_ADDR (H26X_BITSTREAM_ADDR + H26X_BITSTREAM_SIZE) +#define H26X_ENC_BUFF_SIZE (0x00000000) + +#define ISP_MEM_BASE_ADDR (H26X_ENC_BUFF_ADDR + H26X_ENC_BUFF_SIZE) +#define ISP_MEM_BASE_SIZE (0x00A00000) +#elif defined (LINUX_BSP_128MB) +#define H26X_BITSTREAM_ADDR (0x83C80000) +#define H26X_BITSTREAM_SIZE (0x00200000) +#define H26X_ENC_BUFF_ADDR (H26X_BITSTREAM_ADDR + H26X_BITSTREAM_SIZE) +#define H26X_ENC_BUFF_SIZE (0x00000000) + +#define ISP_MEM_BASE_ADDR (H26X_ENC_BUFF_ADDR + H26X_ENC_BUFF_SIZE) +#define ISP_MEM_BASE_SIZE (0x00A00000) +#else +#define H26X_BITSTREAM_ADDR (0x00000000) +#define H26X_BITSTREAM_SIZE (0x00000000) +#define H26X_ENC_BUFF_ADDR (H26X_BITSTREAM_ADDR + H26X_BITSTREAM_SIZE) +#define H26X_ENC_BUFF_SIZE (0x00000000) + +#define ISP_MEM_BASE_ADDR (H26X_ENC_BUFF_ADDR + H26X_ENC_BUFF_SIZE) +#define ISP_MEM_BASE_SIZE (0x00000000) +#endif + + +#endif // end of __MEMMAP_H__ diff --git a/freertos/cvitek/install/include/hal/config/pinctrl.h b/freertos/cvitek/install/include/hal/config/pinctrl.h new file mode 100644 index 000000000..0e5c3c911 --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/pinctrl.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: pinctrl.h + * Description: + */ + +#ifndef __PINCTRL_CV180X_H__ +#define __PINCTRL_CV180X_H__ + +#include "cv180x_pinlist_swconfig.h" +#include "cv180x_reg_fmux_gpio.h" + +#define PAD_MIPI_TXM4__MIPI_TXM4 0 +#define PAD_MIPI_TXP4__MIPI_TXP4 0 +#define PAD_MIPI_TXM3__MIPI_TXM3 0 +#define PAD_MIPI_TXP3__MIPI_TXP3 0 +#define PAD_MIPI_TXM2__MIPI_TXM2 0 +#define PAD_MIPI_TXP2__MIPI_TXP2 0 +#define PAD_MIPI_TXM1__MIPI_TXM1 0 +#define PAD_MIPI_TXP1__MIPI_TXP1 0 +#define PAD_MIPI_TXM0__MIPI_TXM0 0 +#define PAD_MIPI_TXP0__MIPI_TXP0 0 + +#define PINMUX_BASE 0x03001000 +#define PINMUX_MASK(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_MASK +#define PINMUX_OFFSET(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_OFFSET +#define PINMUX_VALUE(PIN_NAME, FUNC_NAME) PIN_NAME##__##FUNC_NAME +#define PINMUX_CONFIG(PIN_NAME, FUNC_NAME) \ + mmio_clrsetbits_32(PINMUX_BASE + FMUX_GPIO_FUNCSEL_##PIN_NAME, \ + FMUX_GPIO_FUNCSEL_##PIN_NAME##_MASK << FMUX_GPIO_FUNCSEL_##PIN_NAME##_OFFSET, \ + PIN_NAME##__##FUNC_NAME) + +#endif /* __PINCTRL_CV180X_H__ */ diff --git a/freertos/cvitek/install/include/hal/config/reg.h b/freertos/cvitek/install/include/hal/config/reg.h new file mode 100644 index 000000000..0d601d2aa --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/reg.h @@ -0,0 +1,9 @@ +#ifndef _CVI_REG_H_ +#define _CVI_REG_H_ +#include "mmio.h" + +#define _reg_read(addr) mmio_read_32(addr) +#define _reg_write(addr, data) mmio_write_32(addr, data) +#define _reg_write_mask(addr, mask, data) mmio_clrsetbits_32(addr, mask, data) + +#endif //_CVI_REG_H_ diff --git a/freertos/cvitek/install/include/hal/config/top_reg.h b/freertos/cvitek/install/include/hal/config/top_reg.h new file mode 100644 index 000000000..ca3026338 --- /dev/null +++ b/freertos/cvitek/install/include/hal/config/top_reg.h @@ -0,0 +1,77 @@ +#ifndef __CV180X_REG_H +#define __CV180X_REG_H + +#define SEC_BASE 0x02000000 +#define TOP_BASE 0x03000000 +// #define PINMUX_BASE (TOP_BASE + 0x00001000) +#define CLKGEN_BASE (TOP_BASE + 0x00002000) +#define WDT_BASE (TOP_BASE + 0x00011000) +#define TEMPSEN_BASE (TOP_BASE + 0x000E0000) + +#ifdef RISCV_QEMU +#define UART0_BASE 0x10000000 +#else +#define UART0_BASE 0x04140000 +#endif +#define UART1_BASE 0x04150000 +#define UART2_BASE 0x04160000 +#define UART3_BASE 0x04170000 +#define SRAM_BASE 0x0E000000 + +#define MAILBOX_REG_BASE 0x01900000 +#define MAILBOX_REG_BUFF (MAILBOX_REG_BASE + 0x0400) +#define SPINLOCK_REG_BASE (MAILBOX_REG_BASE + 0x00c0) + +#define I2C0 0x0 +#define I2C1 0x1 +#define I2C2 0x2 +#define I2C3 0x3 +#define I2C4 0x4 + +/* I2C */ +#define I2C0_BASE 0x4000000 +#define I2C1_BASE 0x4010000 +#define I2C2_BASE 0x4020000 +#define I2C3_BASE 0x4030000 +#define I2C4_BASE 0x4040000 + +/* Clock */ +#define REG_CLK_ENABLE_REG0 (CLKGEN_BASE) +#define REG_CLK_ENABLE_REG1 (CLKGEN_BASE + 0x4) +#define REG_CLK_ENABLE_REG2 (CLKGEN_BASE + 0x8) +#define REG_CLK_BYPASS_SEL_REG (CLKGEN_BASE + 0x30) +#define REG_CLK_BYPASS_SEL_REG2 (CLKGEN_BASE + 0x34) +#define REG_CLK_DIV0_CTL_CA53_REG (CLKGEN_BASE + 0x40) +#define REG_CLK_DIV0_CTL_CPU_AXI0_REG (CLKGEN_BASE + 0x48) +#define REG_CLK_DIV0_CTL_TPU_AXI_REG (CLKGEN_BASE + 0x54) +#define REG_CLK_DIV0_CTL_TPU_FAB_REG (CLKGEN_BASE + 0x5C) + +/* USB */ +#define TOP_USB_PHY_CTRSTS_REG (TOP_BASE + 0x48) +#define UPCR_EXTERNAL_VBUS_VALID_OFFSET 0 + +/* DRAM */ +#define TOP_DDR_ADDR_MODE_REG (TOP_BASE + 0x64) +#define DAMR_REG_USB_REMAP_ADDR_39_32_OFFSET 16 +#define DAMR_REG_USB_REMAP_ADDR_39_32_MSK (0xff) + +#define DAMR_REG_VD_REMAP_ADDR_39_32_OFFSET 24 +#define DAMR_REG_VD_REMAP_ADDR_39_32_MSK (0xff) + +#define SW_RESET (TOP_BASE + 0x3000) +#define JPEG_RESET 4 + +#define JPU_BASE 0x0B000000 + +/* rst */ +#define REG_TOP_SOFT_RST 0x3000 + +/* addr remap */ +#define REG_TOP_ADDR_REMAP 0x0064 +#define ADDR_REMAP_USB(a) ((a & 0xFF) << 16) + +/* ethernet phy */ + +/* watchdog */ + +#endif /* __CV180X_REG_H */ diff --git a/freertos/cvitek/install/include/hal/pinmux/hal_pinmux.h b/freertos/cvitek/install/include/hal/pinmux/hal_pinmux.h new file mode 100644 index 000000000..e715b6728 --- /dev/null +++ b/freertos/cvitek/install/include/hal/pinmux/hal_pinmux.h @@ -0,0 +1,6 @@ +#ifndef __HAL_PINMUX_CONFIG_H__ +#define __HAL_PINMUX_CONFIG_H__ +#include "cv180x_pinmux.h" +void hal_pinmux_config(int io_type); + +#endif //end of __HAL_PINMUX_CONFIG_H__ diff --git a/freertos/cvitek/install/include/hal/snsr_i2c/cvi_i2c.h b/freertos/cvitek/install/include/hal/snsr_i2c/cvi_i2c.h new file mode 100644 index 000000000..5d4c0bc69 --- /dev/null +++ b/freertos/cvitek/install/include/hal/snsr_i2c/cvi_i2c.h @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __CVI_I2C_H__ +#define __CVI_I2C_H__ + +#define CVI_I2C_MAX_NUM 4 +#define CVI_I2C_DMA_ENABLE 0 + +/* register definitions */ +#define REG_I2C_CON 0x000 +#define REG_I2C_TAR 0x004 +#define REG_I2C_SAR 0x008 +#define REG_I2C_HS_MADDR 0x00C +#define REG_I2C_DATA_CMD 0x010 +#define REG_I2C_SS_SCL_HCNT 0x014 +#define REG_I2C_SS_SCL_LCNT 0x018 +#define REG_I2C_FS_SCL_HCNT 0x01C +#define REG_I2C_FS_SCL_LCNT 0x020 +#define REG_I2C_HS_SCL_HCNT 0x024 +#define REG_I2C_HS_SCL_LCNT 0x028 +#define REG_I2C_INT_STAT 0x02C +#define REG_I2C_INT_MASK 0x030 +#define REG_I2C_RAW_INT_STAT 0x034 +#define REG_I2C_RX_TL 0x038 +#define REG_I2C_TX_TL 0x03C +#define REG_I2C_CLR_INTR 0x040 +#define REG_I2C_CLR_RX_UNDER 0x044 +#define REG_I2C_CLR_RX_OVER 0x048 +#define REG_I2C_CLR_TX_OVER 0x04C +#define REG_I2C_CLR_RD_REQ 0x050 +#define REG_I2C_CLR_TX_ABRT 0x054 +#define REG_I2C_CLR_RX_DONE 0x058 +#define REG_I2C_CLR_ACTIVITY 0x05C +#define REG_I2C_CLR_STOP_DET 0x060 +#define REG_I2C_CLR_START_DET 0x064 +#define REG_I2C_CLR_GEN_ALL 0x068 +#define REG_I2C_ENABLE 0x06C +#define REG_I2C_STATUS 0x070 +#define REG_I2C_TXFLR 0x074 +#define REG_I2C_RXFLR 0x078 +#define REG_I2C_SDA_HOLD 0x07C +#define REG_I2C_TX_ABRT_SOURCE 0x080 +#define REG_I2C_SLV_DATA_NACK_ONLY 0x084 +#define REG_I2C_DMA_CR 0x088 +#define REG_I2C_DMA_TDLR 0x08C +#define REG_I2C_DMA_RDLR 0x090 +#define REG_I2C_SDA_SETUP 0x094 +#define REG_I2C_ACK_GENERAL_CALL 0x098 +#define REG_I2C_ENABLE_STATUS 0x09C +#define REG_I2C_FS_SPKLEN 0x0A0 +#define REG_I2C_HS_SPKLEN 0x0A4 +#define REG_I2C_COMP_PARAM_1 0x0F4 +#define REG_I2C_COMP_VERSION 0x0F8 +#define REG_I2C_COMP_TYPE 0x0FC + +/* bit definition */ +#define BIT_I2C_CON_MASTER_MODE (0x01 << 0) +#define BIT_I2C_CON_STANDARD_SPEED (0x01 << 1) +#define BIT_I2C_CON_FULL_SPEED (0x02 << 1) +#define BIT_I2C_CON_HIGH_SPEED (0x03 << 1) +#define BIT_I2C_CON_10B_ADDR_SLAVE (0x01 << 3) +#define BIT_I2C_CON_10B_ADDR_MASTER (0x01 << 4) +#define BIT_I2C_CON_RESTART_EN (0x01 << 5) +#define BIT_I2C_CON_SLAVE_DIS (0x01 << 6) + +#define BIT_I2C_INT_RX_UNDER (0x01 << 0) +#define BIT_I2C_INT_RX_OVER (0x01 << 1) +#define BIT_I2C_INT_RX_FULL (0x01 << 2) +#define BIT_I2C_INT_TX_OVER (0x01 << 3) +#define BIT_I2C_INT_TX_EMPTY (0x01 << 4) +#define BIT_I2C_INT_RD_REQ (0x01 << 5) +#define BIT_I2C_INT_TX_ABRT (0x01 << 6) +#define BIT_I2C_INT_RX_DONE (0x01 << 7) +#define BIT_I2C_INT_ACTIVITY (0x01 << 8) +#define BIT_I2C_INT_STOP_DET (0x01 << 9) +#define BIT_I2C_INT_START_DET (0x01 << 10) +#define BIT_I2C_INT_GEN_ALL (0x01 << 11) + +#define BIT_I2C_INT_RX_UNDER_MASK (0x01 << 0) +#define BIT_I2C_INT_RX_OVER_MASK (0x01 << 1) +#define BIT_I2C_INT_RX_FULL_MASK (0x01 << 2) +#define BIT_I2C_INT_TX_OVER_MASK (0x01 << 3) +#define BIT_I2C_INT_TX_EMPTY_MASK (0x01 << 4) +#define BIT_I2C_INT_RD_REQ_MASK (0x01 << 5) +#define BIT_I2C_INT_TX_ABRT_MASK (0x01 << 6) +#define BIT_I2C_INT_RX_DONE_MASK (0x01 << 7) +#define BIT_I2C_INT_ACTIVITY_MASK (0x01 << 8) +#define BIT_I2C_INT_STOP_DET_MASK (0x01 << 9) +#define BIT_I2C_INT_START_DET_MASK (0x01 << 10) +#define BIT_I2C_INT_GEN_ALL_MASK (0x01 << 11) + +#define BIT_I2C_INT_RX_UNDER_RAW (0x01 << 0) +#define BIT_I2C_INT_RX_OVER_RAW (0x01 << 1) +#define BIT_I2C_INT_RX_FULL_RAW (0x01 << 2) +#define BIT_I2C_INT_TX_OVER_RAW (0x01 << 3) +#define BIT_I2C_INT_TX_EMPTY_RAW (0x01 << 4) +#define BIT_I2C_INT_RD_REQ_RAW (0x01 << 5) +#define BIT_I2C_INT_TX_ABRT_RAW (0x01 << 6) +#define BIT_I2C_INT_RX_DONE_RAW (0x01 << 7) +#define BIT_I2C_INT_ACTIVITY_RAW (0x01 << 8) +#define BIT_I2C_INT_STOP_DET_RAW (0x01 << 9) +#define BIT_I2C_INT_START_DET_RAW (0x01 << 10) +#define BIT_I2C_INT_GEN_ALL_RAW (0x01 << 11) + +#define BIT_I2C_CMD_DATA_READ_BIT (0x01 << 8) +#define BIT_I2C_CMD_DATA_STOP_BIT (0x01 << 9) +#define BIT_I2C_CMD_DATA_RESTART_BIT (0x01 << 10) + +#define BIT_I2C_DMA_CR_RDMAE (0x01 << 0) +#define BIT_I2C_DMA_CR_TDMAE (0x01 << 1) + +#define CH_I2C_TX 5 + +#define I2C_MAX_SPEED 3400000 // 3.4MHz +#define I2C_HIGH_SPEED 1000000 // 1MHz +#define I2C_FAST_SPEED 400000 // 400KHz +#define I2C_STANDARD_SPEED 100000 // 100KHz + +#define I2C_100KHZ 0 +#define I2C_400KHZ 1 + +struct i2c_info { + uint64_t ctrl_base; // i2c base address + uint8_t enable; + uint8_t slave_id; + uint8_t alen; // address length + uint8_t dlen; // data length +} __attribute__((packed)); + +int cvi_i2c_master_init(uint8_t bus_id, uint16_t slave_id, uint16_t speed, uint8_t alen, uint8_t dlen); +int cvi_i2c_master_write(uint8_t bus_id, uint16_t reg, uint16_t value); +uint16_t cvi_i2c_master_read(uint8_t bus_id, uint16_t reg); + +#if CVI_I2C_DMA_ENABLE +void cvi_i2c_master_dma_init(unsigned long base, uint32_t ch, uint16_t *tx_buf, uint32_t len); +void cvi_i2c_master_dma_write(uint32_t ch); +void cvi_i2c_enable_dma(void); +void cvi_i2c_disable_dma(void); +void cvi_i2c_enable_dma_ch(uint32_t ch); +uint8_t cvi_i2c_is_dma_ch_enable(uint32_t ch); +void cvi_i2c_dma_bind_ch(uint32_t i2c_ch); +#endif + +#endif /* __CVI_I2C_H__ */ diff --git a/freertos/cvitek/install/include/hal/uart/hal_uart_dw.h b/freertos/cvitek/install/include/hal/uart/hal_uart_dw.h new file mode 100644 index 000000000..ba4bba7fd --- /dev/null +++ b/freertos/cvitek/install/include/hal/uart/hal_uart_dw.h @@ -0,0 +1,77 @@ +#ifndef __HAL_UART_DW_HEADER__ +#define __HAL_UART_DW_HEADER__ +#include +//#include "linux/types.h" + +#define thr rbr +#define iir fcr +#define dll rbr +#define dlm ier + +#ifdef RISCV_QEMU +struct dw_regs { + volatile uint8_t rbr; /* 0x00 Data register */ + volatile uint8_t ier; /* 0x04 Interrupt Enable Register */ + volatile uint8_t fcr; /* 0x08 FIFO Control Register */ + volatile uint8_t lcr; /* 0x0C Line control register */ + volatile uint8_t mcr; /* 0x10 Line control register */ + volatile uint8_t lsr; /* 0x14 Line Status Register */ + volatile uint8_t msr; /* 0x18 Modem Status Register */ + volatile uint8_t spr; /* 0x20 Scratch Register */ +}; + +#else +struct dw_regs { + volatile uint32_t rbr; /* 0x00 Data register */ + volatile uint32_t ier; /* 0x04 Interrupt Enable Register */ + volatile uint32_t fcr; /* 0x08 FIFO Control Register */ + volatile uint32_t lcr; /* 0x0C Line control register */ + volatile uint32_t mcr; /* 0x10 Line control register */ + volatile uint32_t lsr; /* 0x14 Line Status Register */ + volatile uint32_t msr; /* 0x18 Modem Status Register */ + volatile uint32_t spr; /* 0x20 Scratch Register */ +}; +#endif +#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define UART_LCR_STB 0x04 /* # stop Bits, off=1, on=1.5 or 2) */ +#define UART_LCR_PEN 0x08 /* Parity eneble */ +#define UART_LCR_EPS 0x10 /* Even Parity Select */ +#define UART_LCR_STKP 0x20 /* Stick Parity */ +#define UART_LCR_SBRK 0x40 /* Set Break */ +#define UART_LCR_BKSE 0x80 /* Bank select enable */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ + +#define UART_MCR_DTR 0x01 /* DTR */ +#define UART_MCR_RTS 0x02 /* RTS */ + +#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ +#define UART_LSR_DR 0x01 /* Receiver data ready */ +#define UART_LSR_TEMT 0x40 /* Xmitter empty */ + +#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ + +#define UART_MCRVAL (UART_MCR_DTR | UART_MCR_RTS) /* RTS/DTR */ +#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR) +#define UART_LCR_8N1 0x03 + +typedef enum DEV_UART device_uart; + +enum DEV_UART{ + UART0, + UART1, + UART2, + UART3, +}; + +void hal_uart_init(device_uart dev_uart, int baudrate, int uart_clock); +void hal_uart_putc(uint8_t ch); +int hal_uart_getc(void); +int hal_uart_tstc(void); + +#endif // end of __HAL_UART_DW_HEADER__ diff --git a/freertos/cvitek/install/include/kernel/FreeRTOS.h b/freertos/cvitek/install/include/kernel/FreeRTOS.h new file mode 100644 index 000000000..61097df4f --- /dev/null +++ b/freertos/cvitek/install/include/kernel/FreeRTOS.h @@ -0,0 +1,1365 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef INC_FREERTOS_H +#define INC_FREERTOS_H + +/* + * Include the generic headers required for the FreeRTOS port being used. + */ +#include + +/* + * If stdint.h cannot be located then: + * + If using GCC ensure the -nostdint options is *not* being used. + * + Ensure the project's include path includes the directory in which your + * compiler stores stdint.h. + * + Set any compiler options necessary for it to support C99, as technically + * stdint.h is only mandatory with C99 (FreeRTOS does not require C99 in any + * other way). + * + The FreeRTOS download includes a simple stdint.h definition that can be + * used in cases where none is provided by the compiler. The files only + * contains the typedefs required to build FreeRTOS. Read the instructions + * in FreeRTOS/source/stdint.readme for more information. + */ + +#ifdef __BUILD_RTOS_KERNEL__ +#include /* READ COMMENT ABOVE. */ +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/* Application specific configuration options. */ +#include "FreeRTOSConfig.h" + +/* Basic FreeRTOS definitions. */ +#include "projdefs.h" + +/* Definitions specific to the port being used. */ +#include "portable.h" + +/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */ +#ifndef configUSE_NEWLIB_REENTRANT + #define configUSE_NEWLIB_REENTRANT 0 +#endif + +/* Required if struct _reent is used. */ +#if ( configUSE_NEWLIB_REENTRANT == 1 ) + #include +#endif + +/* + * Check all the required application specific macros have been defined. + * These macros are application specific and (as downloaded) are defined + * within FreeRTOSConfig.h. + */ + +#ifndef configMINIMAL_STACK_SIZE + #error Missing definition: configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h. configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task. Refer to the demo project provided for your port for a suitable value. +#endif + +#ifndef configMAX_PRIORITIES + #error Missing definition: configMAX_PRIORITIES must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#if configMAX_PRIORITIES < 1 + #error configMAX_PRIORITIES must be defined to be greater than or equal to 1. +#endif + +#ifndef configUSE_PREEMPTION + #error Missing definition: configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_IDLE_HOOK + #error Missing definition: configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_TICK_HOOK + #error Missing definition: configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_16_BIT_TICKS + #error Missing definition: configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_CO_ROUTINES + #define configUSE_CO_ROUTINES 0 +#endif + +#ifndef INCLUDE_vTaskPrioritySet + #define INCLUDE_vTaskPrioritySet 0 +#endif + +#ifndef INCLUDE_uxTaskPriorityGet + #define INCLUDE_uxTaskPriorityGet 0 +#endif + +#ifndef INCLUDE_vTaskDelete + #define INCLUDE_vTaskDelete 0 +#endif + +#ifndef INCLUDE_vTaskSuspend + #define INCLUDE_vTaskSuspend 0 +#endif + +#ifdef INCLUDE_xTaskDelayUntil + #ifdef INCLUDE_vTaskDelayUntil + +/* INCLUDE_vTaskDelayUntil was replaced by INCLUDE_xTaskDelayUntil. Backward + * compatibility is maintained if only one or the other is defined, but + * there is a conflict if both are defined. */ + #error INCLUDE_vTaskDelayUntil and INCLUDE_xTaskDelayUntil are both defined. INCLUDE_vTaskDelayUntil is no longer required and should be removed + #endif +#endif + +#ifndef INCLUDE_xTaskDelayUntil + #ifdef INCLUDE_vTaskDelayUntil + +/* If INCLUDE_vTaskDelayUntil is set but INCLUDE_xTaskDelayUntil is not then + * the project's FreeRTOSConfig.h probably pre-dates the introduction of + * xTaskDelayUntil and setting INCLUDE_xTaskDelayUntil to whatever + * INCLUDE_vTaskDelayUntil is set to will ensure backward compatibility. + */ + #define INCLUDE_xTaskDelayUntil INCLUDE_vTaskDelayUntil + #endif +#endif + +#ifndef INCLUDE_xTaskDelayUntil + #define INCLUDE_xTaskDelayUntil 0 +#endif + +#ifndef INCLUDE_vTaskDelay + #define INCLUDE_vTaskDelay 0 +#endif + +#ifndef INCLUDE_xTaskGetIdleTaskHandle + #define INCLUDE_xTaskGetIdleTaskHandle 0 +#endif + +#ifndef INCLUDE_xTaskAbortDelay + #define INCLUDE_xTaskAbortDelay 0 +#endif + +#ifndef INCLUDE_xQueueGetMutexHolder + #define INCLUDE_xQueueGetMutexHolder 0 +#endif + +#ifndef INCLUDE_xSemaphoreGetMutexHolder + #define INCLUDE_xSemaphoreGetMutexHolder INCLUDE_xQueueGetMutexHolder +#endif + +#ifndef INCLUDE_xTaskGetHandle + #define INCLUDE_xTaskGetHandle 0 +#endif + +#ifndef INCLUDE_uxTaskGetStackHighWaterMark + #define INCLUDE_uxTaskGetStackHighWaterMark 0 +#endif + +#ifndef INCLUDE_uxTaskGetStackHighWaterMark2 + #define INCLUDE_uxTaskGetStackHighWaterMark2 0 +#endif + +#ifndef INCLUDE_eTaskGetState + #define INCLUDE_eTaskGetState 0 +#endif + +#ifndef INCLUDE_xTaskResumeFromISR + #define INCLUDE_xTaskResumeFromISR 1 +#endif + +#ifndef INCLUDE_xTimerPendFunctionCall + #define INCLUDE_xTimerPendFunctionCall 0 +#endif + +#ifndef INCLUDE_xTaskGetSchedulerState + #define INCLUDE_xTaskGetSchedulerState 0 +#endif + +#ifndef INCLUDE_xTaskGetCurrentTaskHandle + #define INCLUDE_xTaskGetCurrentTaskHandle 0 +#endif + +#if configUSE_CO_ROUTINES != 0 + #ifndef configMAX_CO_ROUTINE_PRIORITIES + #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1. + #endif +#endif + +#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK + #define configUSE_DAEMON_TASK_STARTUP_HOOK 0 +#endif + +#ifndef configUSE_APPLICATION_TASK_TAG + #define configUSE_APPLICATION_TASK_TAG 0 +#endif + +#ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS + #define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 +#endif + +#ifndef configUSE_RECURSIVE_MUTEXES + #define configUSE_RECURSIVE_MUTEXES 0 +#endif + +#ifndef configUSE_MUTEXES + #define configUSE_MUTEXES 0 +#endif + +#ifndef configUSE_TIMERS + #define configUSE_TIMERS 0 +#endif + +#ifndef configUSE_COUNTING_SEMAPHORES + #define configUSE_COUNTING_SEMAPHORES 0 +#endif + +#ifndef configUSE_ALTERNATIVE_API + #define configUSE_ALTERNATIVE_API 0 +#endif + +#ifndef portCRITICAL_NESTING_IN_TCB + #define portCRITICAL_NESTING_IN_TCB 0 +#endif + +#ifndef configMAX_TASK_NAME_LEN + #define configMAX_TASK_NAME_LEN 16 +#endif + +#ifndef configIDLE_SHOULD_YIELD + #define configIDLE_SHOULD_YIELD 1 +#endif + +#if configMAX_TASK_NAME_LEN < 1 + #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h +#endif + +#ifndef configASSERT + #define configASSERT( x ) + #define configASSERT_DEFINED 0 +#else + #define configASSERT_DEFINED 1 +#endif + +/* configPRECONDITION should be defined as configASSERT. + * The CBMC proofs need a way to track assumptions and assertions. + * A configPRECONDITION statement should express an implicit invariant or + * assumption made. A configASSERT statement should express an invariant that must + * hold explicit before calling the code. */ +#ifndef configPRECONDITION + #define configPRECONDITION( X ) configASSERT( X ) + #define configPRECONDITION_DEFINED 0 +#else + #define configPRECONDITION_DEFINED 1 +#endif + +#ifndef portMEMORY_BARRIER + #define portMEMORY_BARRIER() +#endif + +#ifndef portSOFTWARE_BARRIER + #define portSOFTWARE_BARRIER() +#endif + +/* The timers module relies on xTaskGetSchedulerState(). */ +#if configUSE_TIMERS == 1 + + #ifndef configTIMER_TASK_PRIORITY + #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined. + #endif /* configTIMER_TASK_PRIORITY */ + + #ifndef configTIMER_QUEUE_LENGTH + #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined. + #endif /* configTIMER_QUEUE_LENGTH */ + + #ifndef configTIMER_TASK_STACK_DEPTH + #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined. + #endif /* configTIMER_TASK_STACK_DEPTH */ + +#endif /* configUSE_TIMERS */ + +#ifndef portSET_INTERRUPT_MASK_FROM_ISR + #define portSET_INTERRUPT_MASK_FROM_ISR() 0 +#endif + +#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR + #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue +#endif + +#ifndef portCLEAN_UP_TCB + #define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB +#endif + +#ifndef portPRE_TASK_DELETE_HOOK + #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending ) +#endif + +#ifndef portSETUP_TCB + #define portSETUP_TCB( pxTCB ) ( void ) pxTCB +#endif + +#ifndef configQUEUE_REGISTRY_SIZE + #define configQUEUE_REGISTRY_SIZE 0U +#endif + +#if ( configQUEUE_REGISTRY_SIZE < 1 ) + #define vQueueAddToRegistry( xQueue, pcName ) + #define vQueueUnregisterQueue( xQueue ) + #define pcQueueGetName( xQueue ) +#endif + +#ifndef portPOINTER_SIZE_TYPE + #define portPOINTER_SIZE_TYPE uint32_t +#endif + +/* Remove any unused trace macros. */ +#ifndef traceSTART + +/* Used to perform any necessary initialisation - for example, open a file + * into which trace is to be written. */ + #define traceSTART() +#endif + +#ifndef traceEND + +/* Use to close a trace, for example close a file into which trace has been + * written. */ + #define traceEND() +#endif + +#ifndef traceTASK_SWITCHED_IN + +/* Called after a task has been selected to run. pxCurrentTCB holds a pointer + * to the task control block of the selected task. */ + #define traceTASK_SWITCHED_IN() +#endif + +#ifndef traceINCREASE_TICK_COUNT + +/* Called before stepping the tick count after waking from tickless idle + * sleep. */ + #define traceINCREASE_TICK_COUNT( x ) +#endif + +#ifndef traceLOW_POWER_IDLE_BEGIN + /* Called immediately before entering tickless idle. */ + #define traceLOW_POWER_IDLE_BEGIN() +#endif + +#ifndef traceLOW_POWER_IDLE_END + /* Called when returning to the Idle task after a tickless idle. */ + #define traceLOW_POWER_IDLE_END() +#endif + +#ifndef traceTASK_SWITCHED_OUT + +/* Called before a task has been selected to run. pxCurrentTCB holds a pointer + * to the task control block of the task being switched out. */ + #define traceTASK_SWITCHED_OUT() +#endif + +#ifndef traceTASK_PRIORITY_INHERIT + +/* Called when a task attempts to take a mutex that is already held by a + * lower priority task. pxTCBOfMutexHolder is a pointer to the TCB of the task + * that holds the mutex. uxInheritedPriority is the priority the mutex holder + * will inherit (the priority of the task that is attempting to obtain the + * muted. */ + #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority ) +#endif + +#ifndef traceTASK_PRIORITY_DISINHERIT + +/* Called when a task releases a mutex, the holding of which had resulted in + * the task inheriting the priority of a higher priority task. + * pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the + * mutex. uxOriginalPriority is the task's configured (base) priority. */ + #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority ) +#endif + +#ifndef traceBLOCKING_ON_QUEUE_RECEIVE + +/* Task is about to block because it cannot read from a + * queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + * upon which the read was attempted. pxCurrentTCB points to the TCB of the + * task that attempted the read. */ + #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) +#endif + +#ifndef traceBLOCKING_ON_QUEUE_PEEK + +/* Task is about to block because it cannot read from a + * queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + * upon which the read was attempted. pxCurrentTCB points to the TCB of the + * task that attempted the read. */ + #define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) +#endif + +#ifndef traceBLOCKING_ON_QUEUE_SEND + +/* Task is about to block because it cannot write to a + * queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + * upon which the write was attempted. pxCurrentTCB points to the TCB of the + * task that attempted the write. */ + #define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) +#endif + +#ifndef configCHECK_FOR_STACK_OVERFLOW + #define configCHECK_FOR_STACK_OVERFLOW 0 +#endif + +#ifndef configRECORD_STACK_HIGH_ADDRESS + #define configRECORD_STACK_HIGH_ADDRESS 0 +#endif + +#ifndef configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H + #define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H 0 +#endif + +/* The following event macros are embedded in the kernel API calls. */ + +#ifndef traceMOVED_TASK_TO_READY_STATE + #define traceMOVED_TASK_TO_READY_STATE( pxTCB ) +#endif + +#ifndef tracePOST_MOVED_TASK_TO_READY_STATE + #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB ) +#endif + +#ifndef traceQUEUE_CREATE + #define traceQUEUE_CREATE( pxNewQueue ) +#endif + +#ifndef traceQUEUE_CREATE_FAILED + #define traceQUEUE_CREATE_FAILED( ucQueueType ) +#endif + +#ifndef traceCREATE_MUTEX + #define traceCREATE_MUTEX( pxNewQueue ) +#endif + +#ifndef traceCREATE_MUTEX_FAILED + #define traceCREATE_MUTEX_FAILED() +#endif + +#ifndef traceGIVE_MUTEX_RECURSIVE + #define traceGIVE_MUTEX_RECURSIVE( pxMutex ) +#endif + +#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED + #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) +#endif + +#ifndef traceTAKE_MUTEX_RECURSIVE + #define traceTAKE_MUTEX_RECURSIVE( pxMutex ) +#endif + +#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED + #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ) +#endif + +#ifndef traceCREATE_COUNTING_SEMAPHORE + #define traceCREATE_COUNTING_SEMAPHORE() +#endif + +#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED + #define traceCREATE_COUNTING_SEMAPHORE_FAILED() +#endif + +#ifndef traceQUEUE_SET_SEND + #define traceQUEUE_SET_SEND traceQUEUE_SEND +#endif + +#ifndef traceQUEUE_SEND + #define traceQUEUE_SEND( pxQueue ) +#endif + +#ifndef traceQUEUE_SEND_FAILED + #define traceQUEUE_SEND_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE + #define traceQUEUE_RECEIVE( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK + #define traceQUEUE_PEEK( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK_FAILED + #define traceQUEUE_PEEK_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK_FROM_ISR + #define traceQUEUE_PEEK_FROM_ISR( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE_FAILED + #define traceQUEUE_RECEIVE_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_SEND_FROM_ISR + #define traceQUEUE_SEND_FROM_ISR( pxQueue ) +#endif + +#ifndef traceQUEUE_SEND_FROM_ISR_FAILED + #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE_FROM_ISR + #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED + #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK_FROM_ISR_FAILED + #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_DELETE + #define traceQUEUE_DELETE( pxQueue ) +#endif + +#ifndef traceTASK_CREATE + #define traceTASK_CREATE( pxNewTCB ) +#endif + +#ifndef traceTASK_CREATE_FAILED + #define traceTASK_CREATE_FAILED() +#endif + +#ifndef traceTASK_DELETE + #define traceTASK_DELETE( pxTaskToDelete ) +#endif + +#ifndef traceTASK_DELAY_UNTIL + #define traceTASK_DELAY_UNTIL( x ) +#endif + +#ifndef traceTASK_DELAY + #define traceTASK_DELAY() +#endif + +#ifndef traceTASK_PRIORITY_SET + #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) +#endif + +#ifndef traceTASK_SUSPEND + #define traceTASK_SUSPEND( pxTaskToSuspend ) +#endif + +#ifndef traceTASK_RESUME + #define traceTASK_RESUME( pxTaskToResume ) +#endif + +#ifndef traceTASK_RESUME_FROM_ISR + #define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) +#endif + +#ifndef traceTASK_INCREMENT_TICK + #define traceTASK_INCREMENT_TICK( xTickCount ) +#endif + +#ifndef traceTIMER_CREATE + #define traceTIMER_CREATE( pxNewTimer ) +#endif + +#ifndef traceTIMER_CREATE_FAILED + #define traceTIMER_CREATE_FAILED() +#endif + +#ifndef traceTIMER_COMMAND_SEND + #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn ) +#endif + +#ifndef traceTIMER_EXPIRED + #define traceTIMER_EXPIRED( pxTimer ) +#endif + +#ifndef traceTIMER_COMMAND_RECEIVED + #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue ) +#endif + +#ifndef traceMALLOC + #define traceMALLOC( pvAddress, uiSize ) +#endif + +#ifndef traceFREE + #define traceFREE( pvAddress, uiSize ) +#endif + +#ifndef traceEVENT_GROUP_CREATE + #define traceEVENT_GROUP_CREATE( xEventGroup ) +#endif + +#ifndef traceEVENT_GROUP_CREATE_FAILED + #define traceEVENT_GROUP_CREATE_FAILED() +#endif + +#ifndef traceEVENT_GROUP_SYNC_BLOCK + #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ) +#endif + +#ifndef traceEVENT_GROUP_SYNC_END + #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred +#endif + +#ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK + #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ) +#endif + +#ifndef traceEVENT_GROUP_WAIT_BITS_END + #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred +#endif + +#ifndef traceEVENT_GROUP_CLEAR_BITS + #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ) +#endif + +#ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR + #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ) +#endif + +#ifndef traceEVENT_GROUP_SET_BITS + #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ) +#endif + +#ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR + #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ) +#endif + +#ifndef traceEVENT_GROUP_DELETE + #define traceEVENT_GROUP_DELETE( xEventGroup ) +#endif + +#ifndef tracePEND_FUNC_CALL + #define tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, ret ) +#endif + +#ifndef tracePEND_FUNC_CALL_FROM_ISR + #define tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, ret ) +#endif + +#ifndef traceQUEUE_REGISTRY_ADD + #define traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName ) +#endif + +#ifndef traceTASK_NOTIFY_TAKE_BLOCK + #define traceTASK_NOTIFY_TAKE_BLOCK( uxIndexToWait ) +#endif + +#ifndef traceTASK_NOTIFY_TAKE + #define traceTASK_NOTIFY_TAKE( uxIndexToWait ) +#endif + +#ifndef traceTASK_NOTIFY_WAIT_BLOCK + #define traceTASK_NOTIFY_WAIT_BLOCK( uxIndexToWait ) +#endif + +#ifndef traceTASK_NOTIFY_WAIT + #define traceTASK_NOTIFY_WAIT( uxIndexToWait ) +#endif + +#ifndef traceTASK_NOTIFY + #define traceTASK_NOTIFY( uxIndexToNotify ) +#endif + +#ifndef traceTASK_NOTIFY_FROM_ISR + #define traceTASK_NOTIFY_FROM_ISR( uxIndexToNotify ) +#endif + +#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR + #define traceTASK_NOTIFY_GIVE_FROM_ISR( uxIndexToNotify ) +#endif + +#ifndef traceSTREAM_BUFFER_CREATE_FAILED + #define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_CREATE_STATIC_FAILED + #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_CREATE + #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_DELETE + #define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_RESET + #define traceSTREAM_BUFFER_RESET( xStreamBuffer ) +#endif + +#ifndef traceBLOCKING_ON_STREAM_BUFFER_SEND + #define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_SEND + #define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent ) +#endif + +#ifndef traceSTREAM_BUFFER_SEND_FAILED + #define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_SEND_FROM_ISR + #define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent ) +#endif + +#ifndef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE + #define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_RECEIVE + #define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) +#endif + +#ifndef traceSTREAM_BUFFER_RECEIVE_FAILED + #define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_RECEIVE_FROM_ISR + #define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) +#endif + +#ifndef configGENERATE_RUN_TIME_STATS + #define configGENERATE_RUN_TIME_STATS 0 +#endif + +#if ( configGENERATE_RUN_TIME_STATS == 1 ) + + #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS + #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base. + #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */ + + #ifndef portGET_RUN_TIME_COUNTER_VALUE + #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE + #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information. + #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */ + #endif /* portGET_RUN_TIME_COUNTER_VALUE */ + +#endif /* configGENERATE_RUN_TIME_STATS */ + +#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS + #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() +#endif + +#ifndef configUSE_MALLOC_FAILED_HOOK + #define configUSE_MALLOC_FAILED_HOOK 0 +#endif + +#ifndef portPRIVILEGE_BIT + #define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 ) +#endif + +#ifndef portYIELD_WITHIN_API + #define portYIELD_WITHIN_API portYIELD +#endif + +#ifndef portSUPPRESS_TICKS_AND_SLEEP + #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) +#endif + +#ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP + #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 +#endif + +#if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2 + #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2 +#endif + +#ifndef configUSE_TICKLESS_IDLE + #define configUSE_TICKLESS_IDLE 0 +#endif + +#ifndef configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING + #define configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x ) +#endif + +#ifndef configPRE_SLEEP_PROCESSING + #define configPRE_SLEEP_PROCESSING( x ) +#endif + +#ifndef configPOST_SLEEP_PROCESSING + #define configPOST_SLEEP_PROCESSING( x ) +#endif + +#ifndef configUSE_QUEUE_SETS + #define configUSE_QUEUE_SETS 0 +#endif + +#ifndef portTASK_USES_FLOATING_POINT + #define portTASK_USES_FLOATING_POINT() +#endif + +#ifndef portALLOCATE_SECURE_CONTEXT + #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) +#endif + +#ifndef portDONT_DISCARD + #define portDONT_DISCARD +#endif + +#ifndef configUSE_TIME_SLICING + #define configUSE_TIME_SLICING 1 +#endif + +#ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS + #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0 +#endif + +#ifndef configUSE_STATS_FORMATTING_FUNCTIONS + #define configUSE_STATS_FORMATTING_FUNCTIONS 0 +#endif + +#ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID + #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() +#endif + +#ifndef configUSE_TRACE_FACILITY + #define configUSE_TRACE_FACILITY 0 +#endif + +#ifndef mtCOVERAGE_TEST_MARKER + #define mtCOVERAGE_TEST_MARKER() +#endif + +#ifndef mtCOVERAGE_TEST_DELAY + #define mtCOVERAGE_TEST_DELAY() +#endif + +#ifndef portASSERT_IF_IN_ISR + #define portASSERT_IF_IN_ISR() +#endif + +#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#endif + +#ifndef configAPPLICATION_ALLOCATED_HEAP + #define configAPPLICATION_ALLOCATED_HEAP 0 +#endif + +#ifndef configUSE_TASK_NOTIFICATIONS + #define configUSE_TASK_NOTIFICATIONS 1 +#endif + +#ifndef configTASK_NOTIFICATION_ARRAY_ENTRIES + #define configTASK_NOTIFICATION_ARRAY_ENTRIES 1 +#endif + +#if configTASK_NOTIFICATION_ARRAY_ENTRIES < 1 + #error configTASK_NOTIFICATION_ARRAY_ENTRIES must be at least 1 +#endif + +#ifndef configUSE_POSIX_ERRNO + #define configUSE_POSIX_ERRNO 0 +#endif + +#ifndef portTICK_TYPE_IS_ATOMIC + #define portTICK_TYPE_IS_ATOMIC 0 +#endif + +#ifndef configSUPPORT_STATIC_ALLOCATION + /* Defaults to 0 for backward compatibility. */ + #define configSUPPORT_STATIC_ALLOCATION 0 +#endif + +#ifndef configSUPPORT_DYNAMIC_ALLOCATION + /* Defaults to 1 for backward compatibility. */ + #define configSUPPORT_DYNAMIC_ALLOCATION 1 +#endif + +#ifndef configSTACK_DEPTH_TYPE + +/* Defaults to uint16_t for backward compatibility, but can be overridden + * in FreeRTOSConfig.h if uint16_t is too restrictive. */ + #define configSTACK_DEPTH_TYPE uint16_t +#endif + +#ifndef configRUN_TIME_COUNTER_TYPE + +/* Defaults to uint32_t for backward compatibility, but can be overridden in + * FreeRTOSConfig.h if uint32_t is too restrictive. */ + + #define configRUN_TIME_COUNTER_TYPE uint32_t +#endif + +#ifndef configMESSAGE_BUFFER_LENGTH_TYPE + +/* Defaults to size_t for backward compatibility, but can be overridden + * in FreeRTOSConfig.h if lengths will always be less than the number of bytes + * in a size_t. */ + #define configMESSAGE_BUFFER_LENGTH_TYPE size_t +#endif + +/* Sanity check the configuration. */ +#if ( configUSE_TICKLESS_IDLE != 0 ) + #if ( INCLUDE_vTaskSuspend != 1 ) + #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0 + #endif /* INCLUDE_vTaskSuspend */ +#endif /* configUSE_TICKLESS_IDLE */ + +#if ( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) ) + #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1. +#endif + +#if ( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) ) + #error configUSE_MUTEXES must be set to 1 to use recursive mutexes +#endif + +#ifndef configINITIAL_TICK_COUNT + #define configINITIAL_TICK_COUNT 0 +#endif + +#if ( portTICK_TYPE_IS_ATOMIC == 0 ) + +/* Either variables of tick type cannot be read atomically, or + * portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when + * the tick count is returned to the standard critical section macros. */ + #define portTICK_TYPE_ENTER_CRITICAL() portENTER_CRITICAL() + #define portTICK_TYPE_EXIT_CRITICAL() portEXIT_CRITICAL() + #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() + #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) ) +#else + +/* The tick type can be read atomically, so critical sections used when the + * tick count is returned can be defined away. */ + #define portTICK_TYPE_ENTER_CRITICAL() + #define portTICK_TYPE_EXIT_CRITICAL() + #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() 0 + #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( void ) x +#endif /* if ( portTICK_TYPE_IS_ATOMIC == 0 ) */ + +/* Definitions to allow backward compatibility with FreeRTOS versions prior to + * V8 if desired. */ +#ifndef configENABLE_BACKWARD_COMPATIBILITY + #define configENABLE_BACKWARD_COMPATIBILITY 1 +#endif + +#ifndef configPRINTF + +/* configPRINTF() was not defined, so define it away to nothing. To use + * configPRINTF() then define it as follows (where MyPrintFunction() is + * provided by the application writer): + * + * void MyPrintFunction(const char *pcFormat, ... ); + #define configPRINTF( X ) MyPrintFunction X + * + * Then call like a standard printf() function, but placing brackets around + * all parameters so they are passed as a single parameter. For example: + * configPRINTF( ("Value = %d", MyVariable) ); */ + #define configPRINTF( X ) +#endif + +#ifndef configMAX + +/* The application writer has not provided their own MAX macro, so define + * the following generic implementation. */ + #define configMAX( a, b ) ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) ) +#endif + +#ifndef configMIN + +/* The application writer has not provided their own MIN macro, so define + * the following generic implementation. */ + #define configMIN( a, b ) ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) ) +#endif + +#if configENABLE_BACKWARD_COMPATIBILITY == 1 + #define eTaskStateGet eTaskGetState + #define portTickType TickType_t + #define xTaskHandle TaskHandle_t + #define xQueueHandle QueueHandle_t + #define xSemaphoreHandle SemaphoreHandle_t + #define xQueueSetHandle QueueSetHandle_t + #define xQueueSetMemberHandle QueueSetMemberHandle_t + #define xTimeOutType TimeOut_t + #define xMemoryRegion MemoryRegion_t + #define xTaskParameters TaskParameters_t + #define xTaskStatusType TaskStatus_t + #define xTimerHandle TimerHandle_t + #define xCoRoutineHandle CoRoutineHandle_t + #define pdTASK_HOOK_CODE TaskHookFunction_t + #define portTICK_RATE_MS portTICK_PERIOD_MS + #define pcTaskGetTaskName pcTaskGetName + #define pcTimerGetTimerName pcTimerGetName + #define pcQueueGetQueueName pcQueueGetName + #define vTaskGetTaskInfo vTaskGetInfo + #define xTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter + +/* Backward compatibility within the scheduler code only - these definitions + * are not really required but are included for completeness. */ + #define tmrTIMER_CALLBACK TimerCallbackFunction_t + #define pdTASK_CODE TaskFunction_t + #define xListItem ListItem_t + #define xList List_t + +/* For libraries that break the list data hiding, and access list structure + * members directly (which is not supposed to be done). */ + #define pxContainer pvContainer +#endif /* configENABLE_BACKWARD_COMPATIBILITY */ + +#if ( configUSE_ALTERNATIVE_API != 0 ) + #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0 +#endif + +/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even + * if floating point hardware is otherwise supported by the FreeRTOS port in use. + * This constant is not supported by all FreeRTOS ports that include floating + * point support. */ +#ifndef configUSE_TASK_FPU_SUPPORT + #define configUSE_TASK_FPU_SUPPORT 1 +#endif + +/* Set configENABLE_MPU to 1 to enable MPU support and 0 to disable it. This is + * currently used in ARMv8M ports. */ +#ifndef configENABLE_MPU + #define configENABLE_MPU 0 +#endif + +/* Set configENABLE_FPU to 1 to enable FPU support and 0 to disable it. This is + * currently used in ARMv8M ports. */ +#ifndef configENABLE_FPU + #define configENABLE_FPU 1 +#endif + +/* Set configENABLE_TRUSTZONE to 1 enable TrustZone support and 0 to disable it. + * This is currently used in ARMv8M ports. */ +#ifndef configENABLE_TRUSTZONE + #define configENABLE_TRUSTZONE 1 +#endif + +/* Set configRUN_FREERTOS_SECURE_ONLY to 1 to run the FreeRTOS ARMv8M port on + * the Secure Side only. */ +#ifndef configRUN_FREERTOS_SECURE_ONLY + #define configRUN_FREERTOS_SECURE_ONLY 0 +#endif + +#ifndef configRUN_ADDITIONAL_TESTS + #define configRUN_ADDITIONAL_TESTS 0 +#endif + + +/* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using + * dynamically allocated RAM, in which case when any task is deleted it is known + * that both the task's stack and TCB need to be freed. Sometimes the + * FreeRTOSConfig.h settings only allow a task to be created using statically + * allocated RAM, in which case when any task is deleted it is known that neither + * the task's stack or TCB should be freed. Sometimes the FreeRTOSConfig.h + * settings allow a task to be created using either statically or dynamically + * allocated RAM, in which case a member of the TCB is used to record whether the + * stack and/or TCB were allocated statically or dynamically, so when a task is + * deleted the RAM that was allocated dynamically is freed again and no attempt is + * made to free the RAM that was allocated statically. + * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE is only true if it is possible for a + * task to be created using either statically or dynamically allocated RAM. Note + * that if portUSING_MPU_WRAPPERS is 1 then a protected task can be created with + * a statically allocated stack and a dynamically allocated TCB. + * + * The following table lists various combinations of portUSING_MPU_WRAPPERS, + * configSUPPORT_DYNAMIC_ALLOCATION and configSUPPORT_STATIC_ALLOCATION and + * when it is possible to have both static and dynamic allocation: + * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+ + * | MPU | Dynamic | Static | Available Functions | Possible Allocations | Both Dynamic and | Need Free | + * | | | | | | Static Possible | | + * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+ + * | 0 | 0 | 1 | xTaskCreateStatic | TCB - Static, Stack - Static | No | No | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 0 | 1 | 0 | xTaskCreate | TCB - Dynamic, Stack - Dynamic | No | Yes | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 0 | 1 | 1 | xTaskCreate, | 1. TCB - Dynamic, Stack - Dynamic | Yes | Yes | + * | | | | xTaskCreateStatic | 2. TCB - Static, Stack - Static | | | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 1 | 0 | 1 | xTaskCreateStatic, | TCB - Static, Stack - Static | No | No | + * | | | | xTaskCreateRestrictedStatic | | | | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 1 | 1 | 0 | xTaskCreate, | 1. TCB - Dynamic, Stack - Dynamic | Yes | Yes | + * | | | | xTaskCreateRestricted | 2. TCB - Dynamic, Stack - Static | | | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 1 | 1 | 1 | xTaskCreate, | 1. TCB - Dynamic, Stack - Dynamic | Yes | Yes | + * | | | | xTaskCreateStatic, | 2. TCB - Dynamic, Stack - Static | | | + * | | | | xTaskCreateRestricted, | 3. TCB - Static, Stack - Static | | | + * | | | | xTaskCreateRestrictedStatic | | | | + * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+ + */ +#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE \ + ( ( ( portUSING_MPU_WRAPPERS == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) || \ + ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) ) + +/* + * In line with software engineering best practice, FreeRTOS implements a strict + * data hiding policy, so the real structures used by FreeRTOS to maintain the + * state of tasks, queues, semaphores, etc. are not accessible to the application + * code. However, if the application writer wants to statically allocate such + * an object then the size of the object needs to be known. Dummy structures + * that are guaranteed to have the same size and alignment requirements of the + * real objects are used for this purpose. The dummy list and list item + * structures below are used for inclusion in such a dummy structure. + */ +struct xSTATIC_LIST_ITEM +{ + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + TickType_t xDummy2; + void * pvDummy3[ 4 ]; + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy4; + #endif +}; +typedef struct xSTATIC_LIST_ITEM StaticListItem_t; + +/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ +struct xSTATIC_MINI_LIST_ITEM +{ + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + TickType_t xDummy2; + void * pvDummy3[ 2 ]; +}; +typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t; + +/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ +typedef struct xSTATIC_LIST +{ + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + UBaseType_t uxDummy2; + void * pvDummy3; + StaticMiniListItem_t xDummy4; + #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy5; + #endif +} StaticList_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the Task structure used internally by + * FreeRTOS is not accessible to application code. However, if the application + * writer wants to statically allocate the memory required to create a task then + * the size of the task object needs to be known. The StaticTask_t structure + * below is provided for this purpose. Its sizes and alignment requirements are + * guaranteed to match those of the genuine structure, no matter which + * architecture is being used, and no matter how the values in FreeRTOSConfig.h + * are set. Its contents are somewhat obfuscated in the hope users will + * recognise that it would be unwise to make direct use of the structure members. + */ +typedef struct xSTATIC_TCB +{ + void * pxDummy1; + #if ( portUSING_MPU_WRAPPERS == 1 ) + xMPU_SETTINGS xDummy2; + #endif + StaticListItem_t xDummy3[ 2 ]; + UBaseType_t uxDummy5; + void * pxDummy6; + uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ]; + #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) ) + void * pxDummy8; + #endif + #if ( portCRITICAL_NESTING_IN_TCB == 1 ) + UBaseType_t uxDummy9; + #endif + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy10[ 2 ]; + #endif + #if ( configUSE_MUTEXES == 1 ) + UBaseType_t uxDummy12[ 2 ]; + #endif + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) + void * pxDummy14; + #endif + #if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) + void * pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ]; + #endif + #if ( configGENERATE_RUN_TIME_STATS == 1 ) + configRUN_TIME_COUNTER_TYPE ulDummy16; + #endif + #if ( configUSE_NEWLIB_REENTRANT == 1 ) + struct _reent xDummy17; + #endif + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) + uint32_t ulDummy18[ configTASK_NOTIFICATION_ARRAY_ENTRIES ]; + uint8_t ucDummy19[ configTASK_NOTIFICATION_ARRAY_ENTRIES ]; + #endif + #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) + uint8_t uxDummy20; + #endif + + #if ( INCLUDE_xTaskAbortDelay == 1 ) + uint8_t ucDummy21; + #endif + #if ( configUSE_POSIX_ERRNO == 1 ) + int iDummy22; + #endif +} StaticTask_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the Queue structure used internally by + * FreeRTOS is not accessible to application code. However, if the application + * writer wants to statically allocate the memory required to create a queue + * then the size of the queue object needs to be known. The StaticQueue_t + * structure below is provided for this purpose. Its sizes and alignment + * requirements are guaranteed to match those of the genuine structure, no + * matter which architecture is being used, and no matter how the values in + * FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in the hope + * users will recognise that it would be unwise to make direct use of the + * structure members. + */ +typedef struct xSTATIC_QUEUE +{ + void * pvDummy1[ 3 ]; + + union + { + void * pvDummy2; + UBaseType_t uxDummy2; + } u; + + StaticList_t xDummy3[ 2 ]; + UBaseType_t uxDummy4[ 3 ]; + uint8_t ucDummy5[ 2 ]; + + #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucDummy6; + #endif + + #if ( configUSE_QUEUE_SETS == 1 ) + void * pvDummy7; + #endif + + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy8; + uint8_t ucDummy9; + #endif +} StaticQueue_t; +typedef StaticQueue_t StaticSemaphore_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the event group structure used + * internally by FreeRTOS is not accessible to application code. However, if + * the application writer wants to statically allocate the memory required to + * create an event group then the size of the event group object needs to be + * know. The StaticEventGroup_t structure below is provided for this purpose. + * Its sizes and alignment requirements are guaranteed to match those of the + * genuine structure, no matter which architecture is being used, and no matter + * how the values in FreeRTOSConfig.h are set. Its contents are somewhat + * obfuscated in the hope users will recognise that it would be unwise to make + * direct use of the structure members. + */ +typedef struct xSTATIC_EVENT_GROUP +{ + TickType_t xDummy1; + StaticList_t xDummy2; + + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy3; + #endif + + #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucDummy4; + #endif +} StaticEventGroup_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the software timer structure used + * internally by FreeRTOS is not accessible to application code. However, if + * the application writer wants to statically allocate the memory required to + * create a software timer then the size of the queue object needs to be known. + * The StaticTimer_t structure below is provided for this purpose. Its sizes + * and alignment requirements are guaranteed to match those of the genuine + * structure, no matter which architecture is being used, and no matter how the + * values in FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in + * the hope users will recognise that it would be unwise to make direct use of + * the structure members. + */ +typedef struct xSTATIC_TIMER +{ + void * pvDummy1; + StaticListItem_t xDummy2; + TickType_t xDummy3; + void * pvDummy5; + TaskFunction_t pvDummy6; + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy7; + #endif + uint8_t ucDummy8; +} StaticTimer_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the stream buffer structure used + * internally by FreeRTOS is not accessible to application code. However, if + * the application writer wants to statically allocate the memory required to + * create a stream buffer then the size of the stream buffer object needs to be + * known. The StaticStreamBuffer_t structure below is provided for this + * purpose. Its size and alignment requirements are guaranteed to match those + * of the genuine structure, no matter which architecture is being used, and + * no matter how the values in FreeRTOSConfig.h are set. Its contents are + * somewhat obfuscated in the hope users will recognise that it would be unwise + * to make direct use of the structure members. + */ +typedef struct xSTATIC_STREAM_BUFFER +{ + size_t uxDummy1[ 4 ]; + void * pvDummy2[ 3 ]; + uint8_t ucDummy3; + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy4; + #endif +} StaticStreamBuffer_t; + +/* Message buffers are built on stream buffers. */ +typedef StaticStreamBuffer_t StaticMessageBuffer_t; + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* INC_FREERTOS_H */ diff --git a/freertos/cvitek/install/include/kernel/FreeRTOSConfig.h b/freertos/cvitek/install/include/kernel/FreeRTOSConfig.h new file mode 100644 index 000000000..b3aaacbe5 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/FreeRTOSConfig.h @@ -0,0 +1,148 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +#include "riscv-virt.h" +#include "arch_cpu.h" +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +/* See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html */ + + +#define _WINDOWS_ +#ifdef RISCV_QEMU +#define configMTIME_BASE_ADDRESS ( CLINT_ADDR + CLINT_MTIME ) +#else +#undef configMTIME_BASE_ADDRESS // get MTIME from rdtime +#endif +#define configMTIMECMP_BASE_ADDRESS ( CLINT_ADDR + CLINT_MTIMECMP ) + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 1 +#define configTICK_RATE_HZ ( ( TickType_t ) 200 ) +#define configMAX_PRIORITIES ( 8 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 1024 ) +#ifndef FAST_IMAGE_ENABLE +#define configTOTAL_HEAP_SIZE ( ( size_t ) 1 * 512 * 1024 ) +#else +#define configTOTAL_HEAP_SIZE ( ( size_t ) 1 * 650 * 1024 ) +#endif +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configUSE_TICKLESS_IDLE 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 50 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configUSE_APPLICATION_TASK_TAG 0 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 +#define configUSE_STATIC_ALLOCATION 1 +#define configGENERATE_RUN_TIME_STATS 0 +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configAPPLICATION_ALLOCATED_HEAP 1 +//#define configSUPPORT_DYNAMIC_ALLOCATION 1 +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +/* Software timer definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define configTIMER_QUEUE_LENGTH 5 +#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 ) + + +#define configTASK_NOTIFICATION_ARRAY_ENTRIES 3 +/* RISC-V definitions. */ +#define configISR_STACK_SIZE_WORDS 1024 + +/* Task priorities. Allow these to be overridden. */ +#ifndef uartPRIMARY_PRIORITY + #define uartPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 ) +#endif + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 1 +#define INCLUDE_xTaskGetHandle 1 +#define INCLUDE_xSemaphoreGetMutexHolder 1 + +#define fabs(x) __builtin_fabs(x) + + +/* FreeRTOS+POSIX + * Portable Operating System Interface (POSIX threading wrapper) for FreeRTOS + * + * Dependencies + * Both configUSE_POSIX_ERRNO and configUSE_APPLICATION_TASK_TAG must be set to 1 in FreeRTOSConfig.h. + */ +#define configUSE_POSIX_ERRNO 1 + + +/* Overwrite some of the stack sizes allocated to various test and demo tasks. +Like all task stack sizes, the value is the number of words, not bytes. */ +#define bktBLOCK_TIME_TASK_STACK_SIZE 100 +#define notifyNOTIFIED_TASK_STACK_SIZE 110 +#define priSUSPENDED_RX_TASK_STACK_SIZE 90 +#define tmrTIMER_TEST_TASK_STACK_SIZE 100 +#define ebRENDESVOUS_TEST_TASK_STACK_SIZE 100 +#define ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE 115 +#define genqMUTEX_TEST_TASK_STACK_SIZE 90 +#define recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE 110 + +/* Integrates the Tracealyzer recorder with FreeRTOS */ +#if ( configUSE_TRACE_FACILITY == 1 ) +#include "trcRecorder.h" +#endif + +#endif /* FREERTOS_CONFIG_H */ diff --git a/freertos/cvitek/install/include/kernel/StackMacros.h b/freertos/cvitek/install/include/kernel/StackMacros.h new file mode 100644 index 000000000..6ddeb3a95 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/StackMacros.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */ + #warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released. +#endif + +#include "stack_macros.h" diff --git a/freertos/cvitek/install/include/kernel/atomic.h b/freertos/cvitek/install/include/kernel/atomic.h new file mode 100644 index 000000000..8d7c1076f --- /dev/null +++ b/freertos/cvitek/install/include/kernel/atomic.h @@ -0,0 +1,419 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/** + * @file atomic.h + * @brief FreeRTOS atomic operation support. + * + * This file implements atomic functions by disabling interrupts globally. + * Implementations with architecture specific atomic instructions can be + * provided under each compiler directory. + */ + +#ifndef ATOMIC_H +#define ATOMIC_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include atomic.h" +#endif + +/* Standard includes. */ +#include + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/* + * Port specific definitions -- entering/exiting critical section. + * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h + * + * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with + * ATOMIC_ENTER_CRITICAL(). + * + */ +#if defined( portSET_INTERRUPT_MASK_FROM_ISR ) + +/* Nested interrupt scheme is supported in this port. */ + #define ATOMIC_ENTER_CRITICAL() \ + UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR() + + #define ATOMIC_EXIT_CRITICAL() \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType ) + +#else + +/* Nested interrupt scheme is NOT supported in this port. */ + #define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL() + #define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL() + +#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */ + +/* + * Port specific definition -- "always inline". + * Inline is compiler specific, and may not always get inlined depending on your + * optimization level. Also, inline is considered as performance optimization + * for atomic. Thus, if portFORCE_INLINE is not provided by portmacro.h, + * instead of resulting error, simply define it away. + */ +#ifndef portFORCE_INLINE + #define portFORCE_INLINE +#endif + +#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */ +#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */ + +/*----------------------------- Swap && CAS ------------------------------*/ + +/** + * Atomic compare-and-swap + * + * @brief Performs an atomic compare-and-swap operation on the specified values. + * + * @param[in, out] pulDestination Pointer to memory location from where value is + * to be loaded and checked. + * @param[in] ulExchange If condition meets, write this value to memory. + * @param[in] ulComparand Swap condition. + * + * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped. + * + * @note This function only swaps *pulDestination with ulExchange, if previous + * *pulDestination value equals ulComparand. + */ +static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination, + uint32_t ulExchange, + uint32_t ulComparand ) +{ + uint32_t ulReturnValue; + + ATOMIC_ENTER_CRITICAL(); + { + if( *pulDestination == ulComparand ) + { + *pulDestination = ulExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } + else + { + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; + } + } + ATOMIC_EXIT_CRITICAL(); + + return ulReturnValue; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic swap (pointers) + * + * @brief Atomically sets the address pointed to by *ppvDestination to the value + * of *pvExchange. + * + * @param[in, out] ppvDestination Pointer to memory location from where a pointer + * value is to be loaded and written back to. + * @param[in] pvExchange Pointer value to be written to *ppvDestination. + * + * @return The initial value of *ppvDestination. + */ +static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination, + void * pvExchange ) +{ + void * pReturnValue; + + ATOMIC_ENTER_CRITICAL(); + { + pReturnValue = *ppvDestination; + *ppvDestination = pvExchange; + } + ATOMIC_EXIT_CRITICAL(); + + return pReturnValue; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic compare-and-swap (pointers) + * + * @brief Performs an atomic compare-and-swap operation on the specified pointer + * values. + * + * @param[in, out] ppvDestination Pointer to memory location from where a pointer + * value is to be loaded and checked. + * @param[in] pvExchange If condition meets, write this value to memory. + * @param[in] pvComparand Swap condition. + * + * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped. + * + * @note This function only swaps *ppvDestination with pvExchange, if previous + * *ppvDestination value equals pvComparand. + */ +static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination, + void * pvExchange, + void * pvComparand ) +{ + uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; + + ATOMIC_ENTER_CRITICAL(); + { + if( *ppvDestination == pvComparand ) + { + *ppvDestination = pvExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } + } + ATOMIC_EXIT_CRITICAL(); + + return ulReturnValue; +} + + +/*----------------------------- Arithmetic ------------------------------*/ + +/** + * Atomic add + * + * @brief Atomically adds count to the value of the specified pointer points to. + * + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. + * @param[in] ulCount Value to be added to *pulAddend. + * + * @return previous *pulAddend value. + */ +static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend, + uint32_t ulCount ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend += ulCount; + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic subtract + * + * @brief Atomically subtracts count from the value of the specified pointer + * pointers to. + * + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. + * @param[in] ulCount Value to be subtract from *pulAddend. + * + * @return previous *pulAddend value. + */ +static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend, + uint32_t ulCount ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend -= ulCount; + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic increment + * + * @brief Atomically increments the value of the specified pointer points to. + * + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. + * + * @return *pulAddend value before increment. + */ +static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend += 1; + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic decrement + * + * @brief Atomically decrements the value of the specified pointer points to + * + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. + * + * @return *pulAddend value before decrement. + */ +static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulAddend; + *pulAddend -= 1; + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/*----------------------------- Bitwise Logical ------------------------------*/ + +/** + * Atomic OR + * + * @brief Performs an atomic OR operation on the specified values. + * + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be ORed with *pulDestination. + * + * @return The original value of *pulDestination. + */ +static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination |= ulValue; + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic AND + * + * @brief Performs an atomic AND operation on the specified values. + * + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be ANDed with *pulDestination. + * + * @return The original value of *pulDestination. + */ +static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination &= ulValue; + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic NAND + * + * @brief Performs an atomic NAND operation on the specified values. + * + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be NANDed with *pulDestination. + * + * @return The original value of *pulDestination. + */ +static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination = ~( ulCurrent & ulValue ); + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} +/*-----------------------------------------------------------*/ + +/** + * Atomic XOR + * + * @brief Performs an atomic XOR operation on the specified values. + * + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be XORed with *pulDestination. + * + * @return The original value of *pulDestination. + */ +static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + { + ulCurrent = *pulDestination; + *pulDestination ^= ulValue; + } + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* ATOMIC_H */ diff --git a/freertos/cvitek/install/include/kernel/aws_secure_sockets.tzext.h b/freertos/cvitek/install/include/kernel/aws_secure_sockets.tzext.h new file mode 100644 index 000000000..073023525 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/aws_secure_sockets.tzext.h @@ -0,0 +1,136 @@ +/* + * Trace Recorder for Tracealyzer v989.878.767 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * An example of a Tracealyzer extension for tracing API calls, in this case + * for tracing selected functions in Amazon FreeRTOS/aws_secure_sockets. + * See trcExtensions.h for information on how to use this. + * + * To create your own extension, first make sure to read the documentation + * in trcExtensions.h. Then, to create an extension header file like this + * one, you need to provide: + * + * - Extension Definitions - name and event codes of the extensions. + * + * - Trace Wrappers - calls the original function and traces the event. + * + * - Function Redefinitions - changes the function calls to the trace wrappers. + * + * See the below comments for details about these definitions. Note that you + * also need a matching .xml file for Tracealyzer to understand the data. + * See trcExtensions.h for further information. + */ + +#ifndef _AWS_SECURE_SOCKETS_TZEXT_H +#define _AWS_SECURE_SOCKETS_TZEXT_H + +/***** Extension Definitions *****/ + +/****************************************************************************** + * _NAME + * The name of the extension as a string constant. This name is used by the + * Tracealyzer host application to find the right XML file for interpreting + * the events. Assuming the extension name is "aws_secure_sockets", Tracealyzer + * will look for an XML file named "aws_secure_sockets-.xml", first in + * the folder of the current trace file, next in the Tracealyzer 4/cfg folder. + * For the VERSION part, see the TRC_EXT__VERSION macros below. + * + * Note: The extension name displayed in Tracealyzer is defined in the XML file + * in the EventGroup element (e.g. ) + * + *****************************************************************************/ +#define TRC_EXT_SOCKETS_NAME "aws_secure_sockets" + +/****************************************************************************** + * _VERSION_MAJOR + * _VERSION_MINOR + * _VERSION_PATCH + * + * The version code of the extension (MAJOR.MINOR.PATCH) + * + * If you increment the version code when modifying an extension, you can still + * show old traces recorded using an earlier version of the extension. + * + * Assuming the extension name is "aws_secure_sockets", and the below version + * codes are 1 (MAJOR), 2 (MINOR), 3 (PATCH), Tracealyzer will assume the + * corresponding XML file is named "aws_secure_sockets-v1.2.3.xml". So if then + * view a trace recorded with extension version 1.2.2, those traces will look + * for "aws_secure_sockets-v1.2.2.xml" instead. + * + * Note that major and minor are stored as 8 bit values, while patch is stored + * using 16 bits. They are treated as unsigned integers, so the maximum values + * are 256, 256 and 65535. + *****************************************************************************/ +#define TRC_EXT_SOCKETS_VERSION_MAJOR 1 + +#define TRC_EXT_SOCKETS_VERSION_MINOR 0 + +#define TRC_EXT_SOCKETS_VERSION_PATCH 0 + + +/****************************************************************************** + * _ + * The event codes used in the trace wrapper functions. Important that these + * are relative to _FIRST. + *****************************************************************************/ +#define EVENTCODE_SOCKETS_Connect (TRC_EXT_BASECODE + 0) + +#define EVENTCODE_SOCKETS_Send (TRC_EXT_BASECODE + 1) + +#define EVENTCODE_SOCKETS_Recv (TRC_EXT_BASECODE + 2) + +/****************************************************************************** + * _COUNT + * The number of event codes used by this extension. Should be at least 1. + * Tracealyzer allows for events codes up to 4095. + *****************************************************************************/ +#define TRC_EXT_SOCKETS_COUNT 2 + + +/***** Trace Wrappers *****/ + +#include /* Including the original header file, so that custom data types are understood. */ + +static inline int32_t SOCKETS_Connect__trace( Socket_t xSocket, SocketsSockaddr_t * pxAddress, Socklen_t xAddressLength ) +{ + int32_t ret = SOCKETS_Connect(xSocket, pxAddress, xAddressLength); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent3(EVENTCODE_SOCKETS_Connect, (uint32_t)xSocket, (uint32_t)pxAddress->ulAddress, (uint32_t)ret); + + return ret; +} + +static inline int32_t SOCKETS_Send__trace( Socket_t xSocket, const void * pvBuffer, size_t xDataLength, uint32_t ulFlags ) +{ + int32_t ret = SOCKETS_Send(xSocket, pvBuffer, xDataLength, ulFlags); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent2(EVENTCODE_SOCKETS_Send, (uint32_t)xSocket, (uint32_t)ret); + + return ret; +} + + +static inline int32_t SOCKETS_Recv__trace( Socket_t xSocket, void * pvBuffer, size_t xBufferLength, uint32_t ulFlags ) +{ + int32_t ret = SOCKETS_Recv(xSocket, pvBuffer, xBufferLength, ulFlags); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent2(EVENTCODE_SOCKETS_Recv, (uint32_t)xSocket, (uint32_t)ret); + + return ret; +} + +/***** Function Redefinitions *****/ + +#define SOCKETS_Connect SOCKETS_Connect__trace + +#define SOCKETS_Send SOCKETS_Send__trace + +#define SOCKETS_Recv SOCKETS_Recv__trace + +#endif /* _AWS_SECURE_SOCKETS_TZEXT_H */ diff --git a/freertos/cvitek/install/include/kernel/aws_wifi.tzext.h b/freertos/cvitek/install/include/kernel/aws_wifi.tzext.h new file mode 100644 index 000000000..6bbb01dee --- /dev/null +++ b/freertos/cvitek/install/include/kernel/aws_wifi.tzext.h @@ -0,0 +1,135 @@ +/* + * Trace Recorder for Tracealyzer v989.878.767 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * An example of a Tracealyzer extension for tracing API calls, in this case + * for tracing selected functions in Amazon FreeRTOS/aws_wifi. + * See trcExtensions.h for information on how to use this. + * + * To create your own extension, first make sure to read the documentation + * in trcExtensions.h. Then, to create an extension header file like this + * one, you need to provide: + * + * - Extension Definitions - name and event codes of the extensions. + * + * - Trace Wrappers - calls the original function and traces the event. + * + * - Function Redefinitions - changes the function calls to the trace wrappers. + * + * See the below comments for details about these definitions. Note that you + * also need a matching .xml file for Tracealyzer to understand the data. + * See trcExtensions.h for further information. + */ + +#ifndef _AWS_WIFI_TZEXT_H +#define _AWS_WIFI_TZEXT_H + +/***** Extension Definitions (must use the same prefix!) *****/ + +/****************************************************************************** + * _NAME + * The name of the extension as a string constant. This name is used by the + * Tracealyzer host application to find the right XML file for interpreting + * the events. Assuming the extension name is "aws_secure_sockets", Tracealyzer + * will look for an XML file named "aws_secure_sockets-.xml", first in + * the folder of the current trace file, next in the Tracealyzer 4/cfg folder. + * For the VERSION part, see the TRC_EXT__VERSION macros below. + * + * Note: The extension name displayed in Tracealyzer is defined in the XML file + * in the EventGroup element (e.g. ) + * + *****************************************************************************/ +#define TRC_EXT_WIFI_NAME "aws_wifi" + +/****************************************************************************** + * _VERSION_MAJOR + * _VERSION_MINOR + * _VERSION_PATCH + * + * The version code of the extension (MAJOR.MINOR.PATCH) + * + * If you increment the version code when modifying an extension, you can still + * show old traces recorded using an earlier version of the extension. + * + * Assuming the extension name is "aws_secure_sockets", and the below version + * codes are 1 (MAJOR), 2 (MINOR), 3 (PATCH), Tracealyzer will assume the + * corresponding XML file is named "aws_secure_sockets-v1.2.3.xml". So if then + * view a trace recorded with extension version 1.2.2, those traces will look + * for "aws_secure_sockets-v1.2.2.xml" instead. + * + * Note that major and minor are stored as 8 bit values, while patch is stored + * using 16 bits. They are treated as unsigned integers, so the maximum values + * are 256, 256 and 65535. + *****************************************************************************/ +#define TRC_EXT_WIFI_VERSION_MAJOR 1 + +#define TRC_EXT_WIFI_VERSION_MINOR 0 + +#define TRC_EXT_WIFI_VERSION_PATCH 0 + +/****************************************************************************** + * _ + * The event codes used in the trace wrapper functions. Important that these + * are relative to _FIRST. + *****************************************************************************/ +#define EVENTCODE_WIFI_On (TRC_EXT_BASECODE + 0) + +#define EVENTCODE_WIFI_Off (TRC_EXT_BASECODE + 1) + +#define EVENTCODE_WIFI_ConnectAP (TRC_EXT_BASECODE + 2) + +/****************************************************************************** + * _COUNT + * The number of event codes used by this extension. Should be at least 1. + * Tracealyzer allows for events codes up to 4095. + *****************************************************************************/ +#define TRC_EXT_WIFI_COUNT 3 + + +/***** Trace Wrappers *****/ + +#include /* Including the original header file, so that custom data types are understood. */ + +static inline WIFIReturnCode_t WIFI_On__trace( void ) +{ + WIFIReturnCode_t ret = WIFI_On(); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent1(EVENTCODE_WIFI_On, (uint32_t)ret); + + return ret; +} + + static inline WIFIReturnCode_t WIFI_Off__trace( void ) + { + WIFIReturnCode_t ret = WIFI_Off(); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + prvTraceStoreEvent1(EVENTCODE_WIFI_Off, (uint32_t)ret); + + return ret; + } + + static inline WIFIReturnCode_t WIFI_ConnectAP__trace( const WIFINetworkParams_t * const pxNetworkParams ) + { + WIFIReturnCode_t ret = WIFI_ConnectAP(pxNetworkParams); + + // Note: The host-side xml file assumes that ret == 0 means OK, otherwise timeout/error. + + prvTraceStoreStringEvent(2, EVENTCODE_WIFI_ConnectAP, pxNetworkParams->pcSSID, pxNetworkParams->xSecurity, ret); + + return ret; + } + +/***** Function Redefinitions *****/ + +#define WIFI_On WIFI_On__trace + +#define WIFI_Off WIFI_Off__trace + +#define WIFI_ConnectAP WIFI_ConnectAP__trace + +#endif /* _AWS_SECURE_SOCKETS2_TZEXT_H */ diff --git a/freertos/cvitek/install/include/kernel/croutine.h b/freertos/cvitek/install/include/kernel/croutine.h new file mode 100644 index 000000000..51bdd4f3d --- /dev/null +++ b/freertos/cvitek/install/include/kernel/croutine.h @@ -0,0 +1,753 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef CO_ROUTINE_H +#define CO_ROUTINE_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include croutine.h" +#endif + +#include "list.h" + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/* Used to hide the implementation of the co-routine control block. The + * control block structure however has to be included in the header due to + * the macro implementation of the co-routine functionality. */ +typedef void * CoRoutineHandle_t; + +/* Defines the prototype to which co-routine functions must conform. */ +typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t, + UBaseType_t ); + +typedef struct corCoRoutineControlBlock +{ + crCOROUTINE_CODE pxCoRoutineFunction; + ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ + ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */ + UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ + UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ + uint16_t uxState; /*< Used internally by the co-routine implementation. */ +} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */ + +/** + * croutine. h + * @code{c} + * BaseType_t xCoRoutineCreate( + * crCOROUTINE_CODE pxCoRoutineCode, + * UBaseType_t uxPriority, + * UBaseType_t uxIndex + * ); + * @endcode + * + * Create a new co-routine and add it to the list of co-routines that are + * ready to run. + * + * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine + * functions require special syntax - see the co-routine section of the WEB + * documentation for more information. + * + * @param uxPriority The priority with respect to other co-routines at which + * the co-routine will run. + * + * @param uxIndex Used to distinguish between different co-routines that + * execute the same function. See the example below and the co-routine section + * of the WEB documentation for further information. + * + * @return pdPASS if the co-routine was successfully created and added to a ready + * list, otherwise an error code defined with ProjDefs.h. + * + * Example usage: + * @code{c} + * // Co-routine to be created. + * void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * // Variables in co-routines must be declared static if they must maintain value across a blocking call. + * // This may not be necessary for const variables. + * static const char cLedToFlash[ 2 ] = { 5, 6 }; + * static const TickType_t uxFlashRates[ 2 ] = { 200, 400 }; + * + * // Must start every co-routine with a call to crSTART(); + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // This co-routine just delays for a fixed period, then toggles + * // an LED. Two co-routines are created using this function, so + * // the uxIndex parameter is used to tell the co-routine which + * // LED to flash and how int32_t to delay. This assumes xQueue has + * // already been created. + * vParTestToggleLED( cLedToFlash[ uxIndex ] ); + * crDELAY( xHandle, uxFlashRates[ uxIndex ] ); + * } + * + * // Must end every co-routine with a call to crEND(); + * crEND(); + * } + * + * // Function that creates two co-routines. + * void vOtherFunction( void ) + * { + * uint8_t ucParameterToPass; + * TaskHandle_t xHandle; + * + * // Create two co-routines at priority 0. The first is given index 0 + * // so (from the code above) toggles LED 5 every 200 ticks. The second + * // is given index 1 so toggles LED 6 every 400 ticks. + * for( uxIndex = 0; uxIndex < 2; uxIndex++ ) + * { + * xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex ); + * } + * } + * @endcode + * \defgroup xCoRoutineCreate xCoRoutineCreate + * \ingroup Tasks + */ +BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, + UBaseType_t uxPriority, + UBaseType_t uxIndex ); + + +/** + * croutine. h + * @code{c} + * void vCoRoutineSchedule( void ); + * @endcode + * + * Run a co-routine. + * + * vCoRoutineSchedule() executes the highest priority co-routine that is able + * to run. The co-routine will execute until it either blocks, yields or is + * preempted by a task. Co-routines execute cooperatively so one + * co-routine cannot be preempted by another, but can be preempted by a task. + * + * If an application comprises of both tasks and co-routines then + * vCoRoutineSchedule should be called from the idle task (in an idle task + * hook). + * + * Example usage: + * @code{c} + * // This idle task hook will schedule a co-routine each time it is called. + * // The rest of the idle task will execute between co-routine calls. + * void vApplicationIdleHook( void ) + * { + * vCoRoutineSchedule(); + * } + * + * // Alternatively, if you do not require any other part of the idle task to + * // execute, the idle task hook can call vCoRoutineSchedule() within an + * // infinite loop. + * void vApplicationIdleHook( void ) + * { + * for( ;; ) + * { + * vCoRoutineSchedule(); + * } + * } + * @endcode + * \defgroup vCoRoutineSchedule vCoRoutineSchedule + * \ingroup Tasks + */ +void vCoRoutineSchedule( void ); + +/** + * croutine. h + * @code{c} + * crSTART( CoRoutineHandle_t xHandle ); + * @endcode + * + * This macro MUST always be called at the start of a co-routine function. + * + * Example usage: + * @code{c} + * // Co-routine to be created. + * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * // Variables in co-routines must be declared static if they must maintain value across a blocking call. + * static int32_t ulAVariable; + * + * // Must start every co-routine with a call to crSTART(); + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // Co-routine functionality goes here. + * } + * + * // Must end every co-routine with a call to crEND(); + * crEND(); + * } + * @endcode + * \defgroup crSTART crSTART + * \ingroup Tasks + */ +#define crSTART( pxCRCB ) \ + switch( ( ( CRCB_t * ) ( pxCRCB ) )->uxState ) { \ + case 0: + +/** + * croutine. h + * @code{c} + * crEND(); + * @endcode + * + * This macro MUST always be called at the end of a co-routine function. + * + * Example usage: + * @code{c} + * // Co-routine to be created. + * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * // Variables in co-routines must be declared static if they must maintain value across a blocking call. + * static int32_t ulAVariable; + * + * // Must start every co-routine with a call to crSTART(); + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // Co-routine functionality goes here. + * } + * + * // Must end every co-routine with a call to crEND(); + * crEND(); + * } + * @endcode + * \defgroup crSTART crSTART + * \ingroup Tasks + */ +#define crEND() } + +/* + * These macros are intended for internal use by the co-routine implementation + * only. The macros should not be used directly by application writers. + */ +#define crSET_STATE0( xHandle ) \ + ( ( CRCB_t * ) ( xHandle ) )->uxState = ( __LINE__ * 2 ); return; \ + case ( __LINE__ * 2 ): +#define crSET_STATE1( xHandle ) \ + ( ( CRCB_t * ) ( xHandle ) )->uxState = ( ( __LINE__ * 2 ) + 1 ); return; \ + case ( ( __LINE__ * 2 ) + 1 ): + +/** + * croutine. h + * @code{c} + * crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay ); + * @endcode + * + * Delay a co-routine for a fixed period of time. + * + * crDELAY can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * @param xHandle The handle of the co-routine to delay. This is the xHandle + * parameter of the co-routine function. + * + * @param xTickToDelay The number of ticks that the co-routine should delay + * for. The actual amount of time this equates to is defined by + * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_PERIOD_MS + * can be used to convert ticks to milliseconds. + * + * Example usage: + * @code{c} + * // Co-routine to be created. + * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * // Variables in co-routines must be declared static if they must maintain value across a blocking call. + * // This may not be necessary for const variables. + * // We are to delay for 200ms. + * static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS; + * + * // Must start every co-routine with a call to crSTART(); + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // Delay for 200ms. + * crDELAY( xHandle, xDelayTime ); + * + * // Do something here. + * } + * + * // Must end every co-routine with a call to crEND(); + * crEND(); + * } + * @endcode + * \defgroup crDELAY crDELAY + * \ingroup Tasks + */ +#define crDELAY( xHandle, xTicksToDelay ) \ + if( ( xTicksToDelay ) > 0 ) \ + { \ + vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \ + } \ + crSET_STATE0( ( xHandle ) ); + +/** + * @code{c} + * crQUEUE_SEND( + * CoRoutineHandle_t xHandle, + * QueueHandle_t pxQueue, + * void *pvItemToQueue, + * TickType_t xTicksToWait, + * BaseType_t *pxResult + * ) + * @endcode + * + * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine + * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. + * + * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas + * xQueueSend() and xQueueReceive() can only be used from tasks. + * + * crQUEUE_SEND can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xHandle The handle of the calling co-routine. This is the xHandle + * parameter of the co-routine function. + * + * @param pxQueue The handle of the queue on which the data will be posted. + * The handle is obtained as the return value when the queue is created using + * the xQueueCreate() API function. + * + * @param pvItemToQueue A pointer to the data being posted onto the queue. + * The number of bytes of each queued item is specified when the queue is + * created. This number of bytes is copied from pvItemToQueue into the queue + * itself. + * + * @param xTickToDelay The number of ticks that the co-routine should block + * to wait for space to become available on the queue, should space not be + * available immediately. The actual amount of time this equates to is defined + * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant + * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example + * below). + * + * @param pxResult The variable pointed to by pxResult will be set to pdPASS if + * data was successfully posted onto the queue, otherwise it will be set to an + * error defined within ProjDefs.h. + * + * Example usage: + * @code{c} + * // Co-routine function that blocks for a fixed period then posts a number onto + * // a queue. + * static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * // Variables in co-routines must be declared static if they must maintain value across a blocking call. + * static BaseType_t xNumberToPost = 0; + * static BaseType_t xResult; + * + * // Co-routines must begin with a call to crSTART(). + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // This assumes the queue has already been created. + * crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult ); + * + * if( xResult != pdPASS ) + * { + * // The message was not posted! + * } + * + * // Increment the number to be posted onto the queue. + * xNumberToPost++; + * + * // Delay for 100 ticks. + * crDELAY( xHandle, 100 ); + * } + * + * // Co-routines must end with a call to crEND(). + * crEND(); + * } + * @endcode + * \defgroup crQUEUE_SEND crQUEUE_SEND + * \ingroup Tasks + */ +#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ + { \ + *( pxResult ) = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), ( xTicksToWait ) ); \ + if( *( pxResult ) == errQUEUE_BLOCKED ) \ + { \ + crSET_STATE0( ( xHandle ) ); \ + *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \ + } \ + if( *pxResult == errQUEUE_YIELD ) \ + { \ + crSET_STATE1( ( xHandle ) ); \ + *pxResult = pdPASS; \ + } \ + } + +/** + * croutine. h + * @code{c} + * crQUEUE_RECEIVE( + * CoRoutineHandle_t xHandle, + * QueueHandle_t pxQueue, + * void *pvBuffer, + * TickType_t xTicksToWait, + * BaseType_t *pxResult + * ) + * @endcode + * + * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine + * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. + * + * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas + * xQueueSend() and xQueueReceive() can only be used from tasks. + * + * crQUEUE_RECEIVE can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xHandle The handle of the calling co-routine. This is the xHandle + * parameter of the co-routine function. + * + * @param pxQueue The handle of the queue from which the data will be received. + * The handle is obtained as the return value when the queue is created using + * the xQueueCreate() API function. + * + * @param pvBuffer The buffer into which the received item is to be copied. + * The number of bytes of each queued item is specified when the queue is + * created. This number of bytes is copied into pvBuffer. + * + * @param xTickToDelay The number of ticks that the co-routine should block + * to wait for data to become available from the queue, should data not be + * available immediately. The actual amount of time this equates to is defined + * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant + * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the + * crQUEUE_SEND example). + * + * @param pxResult The variable pointed to by pxResult will be set to pdPASS if + * data was successfully retrieved from the queue, otherwise it will be set to + * an error code as defined within ProjDefs.h. + * + * Example usage: + * @code{c} + * // A co-routine receives the number of an LED to flash from a queue. It + * // blocks on the queue until the number is received. + * static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * // Variables in co-routines must be declared static if they must maintain value across a blocking call. + * static BaseType_t xResult; + * static UBaseType_t uxLEDToFlash; + * + * // All co-routines must start with a call to crSTART(). + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // Wait for data to become available on the queue. + * crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult ); + * + * if( xResult == pdPASS ) + * { + * // We received the LED to flash - flash it! + * vParTestToggleLED( uxLEDToFlash ); + * } + * } + * + * crEND(); + * } + * @endcode + * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE + * \ingroup Tasks + */ +#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ + { \ + *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), ( xTicksToWait ) ); \ + if( *( pxResult ) == errQUEUE_BLOCKED ) \ + { \ + crSET_STATE0( ( xHandle ) ); \ + *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), 0 ); \ + } \ + if( *( pxResult ) == errQUEUE_YIELD ) \ + { \ + crSET_STATE1( ( xHandle ) ); \ + *( pxResult ) = pdPASS; \ + } \ + } + +/** + * croutine. h + * @code{c} + * crQUEUE_SEND_FROM_ISR( + * QueueHandle_t pxQueue, + * void *pvItemToQueue, + * BaseType_t xCoRoutinePreviouslyWoken + * ) + * @endcode + * + * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the + * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() + * functions used by tasks. + * + * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to + * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * xQueueReceiveFromISR() can only be used to pass data between a task and and + * ISR. + * + * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue + * that is being used from within a co-routine. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto + * the same queue multiple times from a single interrupt. The first call + * should always pass in pdFALSE. Subsequent calls should pass in + * the value returned from the previous call. + * + * @return pdTRUE if a co-routine was woken by posting onto the queue. This is + * used by the ISR to determine if a context switch may be required following + * the ISR. + * + * Example usage: + * @code{c} + * // A co-routine that blocks on a queue waiting for characters to be received. + * static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * char cRxedChar; + * BaseType_t xResult; + * + * // All co-routines must start with a call to crSTART(). + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // Wait for data to become available on the queue. This assumes the + * // queue xCommsRxQueue has already been created! + * crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult ); + * + * // Was a character received? + * if( xResult == pdPASS ) + * { + * // Process the character here. + * } + * } + * + * // All co-routines must end with a call to crEND(). + * crEND(); + * } + * + * // An ISR that uses a queue to send characters received on a serial port to + * // a co-routine. + * void vUART_ISR( void ) + * { + * char cRxedChar; + * BaseType_t xCRWokenByPost = pdFALSE; + * + * // We loop around reading characters until there are none left in the UART. + * while( UART_RX_REG_NOT_EMPTY() ) + * { + * // Obtain the character from the UART. + * cRxedChar = UART_RX_REG; + * + * // Post the character onto a queue. xCRWokenByPost will be pdFALSE + * // the first time around the loop. If the post causes a co-routine + * // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE. + * // In this manner we can ensure that if more than one co-routine is + * // blocked on the queue only one is woken by this ISR no matter how + * // many characters are posted to the queue. + * xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost ); + * } + * } + * @endcode + * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR + * \ingroup Tasks + */ +#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) \ + xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) ) + + +/** + * croutine. h + * @code{c} + * crQUEUE_SEND_FROM_ISR( + * QueueHandle_t pxQueue, + * void *pvBuffer, + * BaseType_t * pxCoRoutineWoken + * ) + * @endcode + * + * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the + * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() + * functions used by tasks. + * + * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to + * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * xQueueReceiveFromISR() can only be used to pass data between a task and and + * ISR. + * + * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data + * from a queue that is being used from within a co-routine (a co-routine + * posted to the queue). + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvBuffer A pointer to a buffer into which the received item will be + * placed. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from the queue into + * pvBuffer. + * + * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become + * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a + * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise + * *pxCoRoutineWoken will remain unchanged. + * + * @return pdTRUE an item was successfully received from the queue, otherwise + * pdFALSE. + * + * Example usage: + * @code{c} + * // A co-routine that posts a character to a queue then blocks for a fixed + * // period. The character is incremented each time. + * static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) + * { + * // cChar holds its value while this co-routine is blocked and must therefore + * // be declared static. + * static char cCharToTx = 'a'; + * BaseType_t xResult; + * + * // All co-routines must start with a call to crSTART(). + * crSTART( xHandle ); + * + * for( ;; ) + * { + * // Send the next character to the queue. + * crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult ); + * + * if( xResult == pdPASS ) + * { + * // The character was successfully posted to the queue. + * } + * else + * { + * // Could not post the character to the queue. + * } + * + * // Enable the UART Tx interrupt to cause an interrupt in this + * // hypothetical UART. The interrupt will obtain the character + * // from the queue and send it. + * ENABLE_RX_INTERRUPT(); + * + * // Increment to the next character then block for a fixed period. + * // cCharToTx will maintain its value across the delay as it is + * // declared static. + * cCharToTx++; + * if( cCharToTx > 'x' ) + * { + * cCharToTx = 'a'; + * } + * crDELAY( 100 ); + * } + * + * // All co-routines must end with a call to crEND(). + * crEND(); + * } + * + * // An ISR that uses a queue to receive characters to send on a UART. + * void vUART_ISR( void ) + * { + * char cCharToTx; + * BaseType_t xCRWokenByPost = pdFALSE; + * + * while( UART_TX_REG_EMPTY() ) + * { + * // Are there any characters in the queue waiting to be sent? + * // xCRWokenByPost will automatically be set to pdTRUE if a co-routine + * // is woken by the post - ensuring that only a single co-routine is + * // woken no matter how many times we go around this loop. + * if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) ) + * { + * SEND_CHARACTER( cCharToTx ); + * } + * } + * } + * @endcode + * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR + * \ingroup Tasks + */ +#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) \ + xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) ) + +/* + * This function is intended for internal use by the co-routine macros only. + * The macro nature of the co-routine implementation requires that the + * prototype appears here. The function should not be used by application + * writers. + * + * Removes the current co-routine from its ready list and places it in the + * appropriate delayed list. + */ +void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, + List_t * pxEventList ); + +/* + * This function is intended for internal use by the queue implementation only. + * The function should not be used by application writers. + * + * Removes the highest priority co-routine from the event list and places it in + * the pending ready list. + */ +BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList ); + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* CO_ROUTINE_H */ diff --git a/freertos/cvitek/install/include/kernel/deprecated_definitions.h b/freertos/cvitek/install/include/kernel/deprecated_definitions.h new file mode 100644 index 000000000..a83314124 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/deprecated_definitions.h @@ -0,0 +1,281 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef DEPRECATED_DEFINITIONS_H +#define DEPRECATED_DEFINITIONS_H + + +/* Each FreeRTOS port has a unique portmacro.h header file. Originally a + * pre-processor definition was used to ensure the pre-processor found the correct + * portmacro.h file for the port being used. That scheme was deprecated in favour + * of setting the compiler's include path such that it found the correct + * portmacro.h file - removing the need for the constant and allowing the + * portmacro.h file to be located anywhere in relation to the port being used. The + * definitions below remain in the code for backward compatibility only. New + * projects should not use them. */ + +#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT + #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" + typedef void ( __interrupt __far * pxISR )(); +#endif + +#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT + #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" + typedef void ( __interrupt __far * pxISR )(); +#endif + +#ifdef GCC_MEGA_AVR + #include "../portable/GCC/ATMega323/portmacro.h" +#endif + +#ifdef IAR_MEGA_AVR + #include "../portable/IAR/ATMega323/portmacro.h" +#endif + +#ifdef MPLAB_PIC24_PORT + #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" +#endif + +#ifdef MPLAB_DSPIC_PORT + #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" +#endif + +#ifdef MPLAB_PIC18F_PORT + #include "../../Source/portable/MPLAB/PIC18F/portmacro.h" +#endif + +#ifdef MPLAB_PIC32MX_PORT + #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h" +#endif + +#ifdef _FEDPICC + #include "libFreeRTOS/Include/portmacro.h" +#endif + +#ifdef SDCC_CYGNAL + #include "../../Source/portable/SDCC/Cygnal/portmacro.h" +#endif + +#ifdef GCC_ARM7 + #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" +#endif + +#ifdef GCC_ARM7_ECLIPSE + #include "portmacro.h" +#endif + +#ifdef ROWLEY_LPC23xx + #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" +#endif + +#ifdef IAR_MSP430 + #include "..\..\Source\portable\IAR\MSP430\portmacro.h" +#endif + +#ifdef GCC_MSP430 + #include "../../Source/portable/GCC/MSP430F449/portmacro.h" +#endif + +#ifdef ROWLEY_MSP430 + #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" +#endif + +#ifdef ARM7_LPC21xx_KEIL_RVDS + #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" +#endif + +#ifdef SAM7_GCC + #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" +#endif + +#ifdef SAM7_IAR + #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" +#endif + +#ifdef SAM9XE_IAR + #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" +#endif + +#ifdef LPC2000_IAR + #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" +#endif + +#ifdef STR71X_IAR + #include "..\..\Source\portable\IAR\STR71x\portmacro.h" +#endif + +#ifdef STR75X_IAR + #include "..\..\Source\portable\IAR\STR75x\portmacro.h" +#endif + +#ifdef STR75X_GCC + #include "..\..\Source\portable\GCC\STR75x\portmacro.h" +#endif + +#ifdef STR91X_IAR + #include "..\..\Source\portable\IAR\STR91x\portmacro.h" +#endif + +#ifdef GCC_H8S + #include "../../Source/portable/GCC/H8S2329/portmacro.h" +#endif + +#ifdef GCC_AT91FR40008 + #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" +#endif + +#ifdef RVDS_ARMCM3_LM3S102 + #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" +#endif + +#ifdef GCC_ARMCM3_LM3S102 + #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" +#endif + +#ifdef GCC_ARMCM3 + #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" +#endif + +#ifdef IAR_ARM_CM3 + #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" +#endif + +#ifdef IAR_ARMCM3_LM + #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" +#endif + +#ifdef HCS12_CODE_WARRIOR + #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" +#endif + +#ifdef MICROBLAZE_GCC + #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" +#endif + +#ifdef TERN_EE + #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" +#endif + +#ifdef GCC_HCS12 + #include "../../Source/portable/GCC/HCS12/portmacro.h" +#endif + +#ifdef GCC_MCF5235 + #include "../../Source/portable/GCC/MCF5235/portmacro.h" +#endif + +#ifdef COLDFIRE_V2_GCC + #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" +#endif + +#ifdef COLDFIRE_V2_CODEWARRIOR + #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" +#endif + +#ifdef GCC_PPC405 + #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" +#endif + +#ifdef GCC_PPC440 + #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" +#endif + +#ifdef _16FX_SOFTUNE + #include "..\..\Source\portable\Softune\MB96340\portmacro.h" +#endif + +#ifdef BCC_INDUSTRIAL_PC_PORT + +/* A short file name has to be used in place of the normal + * FreeRTOSConfig.h when using the Borland compiler. */ + #include "frconfig.h" + #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" + typedef void ( __interrupt __far * pxISR )(); +#endif + +#ifdef BCC_FLASH_LITE_186_PORT + +/* A short file name has to be used in place of the normal + * FreeRTOSConfig.h when using the Borland compiler. */ + #include "frconfig.h" + #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" + typedef void ( __interrupt __far * pxISR )(); +#endif + +#ifdef __GNUC__ + #ifdef __AVR32_AVR32A__ + #include "portmacro.h" + #endif +#endif + +#ifdef __ICCAVR32__ + #ifdef __CORE__ + #if __CORE__ == __AVR32A__ + #include "portmacro.h" + #endif + #endif +#endif + +#ifdef __91467D + #include "portmacro.h" +#endif + +#ifdef __96340 + #include "portmacro.h" +#endif + + +#ifdef __IAR_V850ES_Fx3__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Jx3__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Jx3_L__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Jx2__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Hx2__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_78K0R_Kx3__ + #include "../../Source/portable/IAR/78K0R/portmacro.h" +#endif + +#ifdef __IAR_78K0R_Kx3L__ + #include "../../Source/portable/IAR/78K0R/portmacro.h" +#endif + +#endif /* DEPRECATED_DEFINITIONS_H */ diff --git a/freertos/cvitek/install/include/kernel/event_groups.h b/freertos/cvitek/install/include/kernel/event_groups.h new file mode 100644 index 000000000..601a29ba9 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/event_groups.h @@ -0,0 +1,777 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef EVENT_GROUPS_H +#define EVENT_GROUPS_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h" must appear in source files before "include event_groups.h" +#endif + +/* FreeRTOS includes. */ +#include "timers.h" + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/** + * An event group is a collection of bits to which an application can assign a + * meaning. For example, an application may create an event group to convey + * the status of various CAN bus related events in which bit 0 might mean "A CAN + * message has been received and is ready for processing", bit 1 might mean "The + * application has queued a message that is ready for sending onto the CAN + * network", and bit 2 might mean "It is time to send a SYNC message onto the + * CAN network" etc. A task can then test the bit values to see which events + * are active, and optionally enter the Blocked state to wait for a specified + * bit or a group of specified bits to be active. To continue the CAN bus + * example, a CAN controlling task can enter the Blocked state (and therefore + * not consume any processing time) until either bit 0, bit 1 or bit 2 are + * active, at which time the bit that was actually active would inform the task + * which action it had to take (process a received message, send a message, or + * send a SYNC). + * + * The event groups implementation contains intelligence to avoid race + * conditions that would otherwise occur were an application to use a simple + * variable for the same purpose. This is particularly important with respect + * to when a bit within an event group is to be cleared, and when bits have to + * be set and then tested atomically - as is the case where event groups are + * used to create a synchronisation point between multiple tasks (a + * 'rendezvous'). + * + * \defgroup EventGroup + */ + + + +/** + * event_groups.h + * + * Type by which event groups are referenced. For example, a call to + * xEventGroupCreate() returns an EventGroupHandle_t variable that can then + * be used as a parameter to other event group functions. + * + * \defgroup EventGroupHandle_t EventGroupHandle_t + * \ingroup EventGroup + */ +struct EventGroupDef_t; +typedef struct EventGroupDef_t * EventGroupHandle_t; + +/* + * The type that holds event bits always matches TickType_t - therefore the + * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1, + * 32 bits if set to 0. + * + * \defgroup EventBits_t EventBits_t + * \ingroup EventGroup + */ +typedef TickType_t EventBits_t; + +/** + * event_groups.h + * @code{c} + * EventGroupHandle_t xEventGroupCreate( void ); + * @endcode + * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGroupCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see https://www.FreeRTOS.org/a00111.html). If an event group is created + * using xEventGroupCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @return If the event group was created then a handle to the event group is + * returned. If there was insufficient FreeRTOS heap available to create the + * event group then NULL is returned. See https://www.FreeRTOS.org/a00111.html + * + * Example usage: + * @code{c} + * // Declare a variable to hold the created event group. + * EventGroupHandle_t xCreatedEventGroup; + * + * // Attempt to create the event group. + * xCreatedEventGroup = xEventGroupCreate(); + * + * // Was the event group created successfully? + * if( xCreatedEventGroup == NULL ) + * { + * // The event group was not created because there was insufficient + * // FreeRTOS heap available. + * } + * else + * { + * // The event group was created. + * } + * @endcode + * \defgroup xEventGroupCreate xEventGroupCreate + * \ingroup EventGroup + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION; +#endif + +/** + * event_groups.h + * @code{c} + * EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer ); + * @endcode + * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGroupCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see https://www.FreeRTOS.org/a00111.html). If an event group is created + * using xEventGroupCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type + * StaticEventGroup_t, which will be then be used to hold the event group's data + * structures, removing the need for the memory to be allocated dynamically. + * + * @return If the event group was created then a handle to the event group is + * returned. If pxEventGroupBuffer was NULL then NULL is returned. + * + * Example usage: + * @code{c} + * // StaticEventGroup_t is a publicly accessible structure that has the same + * // size and alignment requirements as the real event group structure. It is + * // provided as a mechanism for applications to know the size of the event + * // group (which is dependent on the architecture and configuration file + * // settings) without breaking the strict data hiding policy by exposing the + * // real event group internals. This StaticEventGroup_t variable is passed + * // into the xSemaphoreCreateEventGroupStatic() function and is used to store + * // the event group's data structures + * StaticEventGroup_t xEventGroupBuffer; + * + * // Create the event group without dynamically allocating any memory. + * xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer ); + * @endcode + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION; +#endif + +/** + * event_groups.h + * @code{c} + * EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + * const EventBits_t uxBitsToWaitFor, + * const BaseType_t xClearOnExit, + * const BaseType_t xWaitForAllBits, + * const TickType_t xTicksToWait ); + * @endcode + * + * [Potentially] block to wait for one or more bits to be set within a + * previously created event group. + * + * This function cannot be called from an interrupt. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and/or bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within + * uxBitsToWaitFor that are set within the event group will be cleared before + * xEventGroupWaitBits() returns if the wait condition was met (if the function + * returns for a reason other than a timeout). If xClearOnExit is set to + * pdFALSE then the bits set in the event group are not altered when the call to + * xEventGroupWaitBits() returns. + * + * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then + * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor + * are set or the specified block time expires. If xWaitForAllBits is set to + * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set + * in uxBitsToWaitFor is set or the specified block time expires. The block + * time is specified by the xTicksToWait parameter. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for one/all (depending on the xWaitForAllBits value) of the bits specified by + * uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupWaitBits() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupWaitBits() returned because the bits it was waiting for were set + * then the returned value is the event group value before any bits were + * automatically cleared in the case that xClearOnExit parameter was set to + * pdTRUE. + * + * Example usage: + * @code{c} + * #define BIT_0 ( 1 << 0 ) + * #define BIT_4 ( 1 << 4 ) + * + * void aFunction( EventGroupHandle_t xEventGroup ) + * { + * EventBits_t uxBits; + * const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS; + * + * // Wait a maximum of 100ms for either bit 0 or bit 4 to be set within + * // the event group. Clear the bits before exiting. + * uxBits = xEventGroupWaitBits( + * xEventGroup, // The event group being tested. + * BIT_0 | BIT_4, // The bits within the event group to wait for. + * pdTRUE, // BIT_0 and BIT_4 should be cleared before returning. + * pdFALSE, // Don't wait for both bits, either bit will do. + * xTicksToWait ); // Wait a maximum of 100ms for either bit to be set. + * + * if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) ) + * { + * // xEventGroupWaitBits() returned because both bits were set. + * } + * else if( ( uxBits & BIT_0 ) != 0 ) + * { + * // xEventGroupWaitBits() returned because just BIT_0 was set. + * } + * else if( ( uxBits & BIT_4 ) != 0 ) + * { + * // xEventGroupWaitBits() returned because just BIT_4 was set. + * } + * else + * { + * // xEventGroupWaitBits() returned because xTicksToWait ticks passed + * // without either BIT_0 or BIT_4 becoming set. + * } + * } + * @endcode + * \defgroup xEventGroupWaitBits xEventGroupWaitBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xClearOnExit, + const BaseType_t xWaitForAllBits, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * @code{c} + * EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ); + * @endcode + * + * Clear bits within an event group. This function cannot be called from an + * interrupt. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear + * in the event group. For example, to clear bit 3 only, set uxBitsToClear to + * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09. + * + * @return The value of the event group before the specified bits were cleared. + * + * Example usage: + * @code{c} + * #define BIT_0 ( 1 << 0 ) + * #define BIT_4 ( 1 << 4 ) + * + * void aFunction( EventGroupHandle_t xEventGroup ) + * { + * EventBits_t uxBits; + * + * // Clear bit 0 and bit 4 in xEventGroup. + * uxBits = xEventGroupClearBits( + * xEventGroup, // The event group being updated. + * BIT_0 | BIT_4 );// The bits being cleared. + * + * if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) ) + * { + * // Both bit 0 and bit 4 were set before xEventGroupClearBits() was + * // called. Both will now be clear (not set). + * } + * else if( ( uxBits & BIT_0 ) != 0 ) + * { + * // Bit 0 was set before xEventGroupClearBits() was called. It will + * // now be clear. + * } + * else if( ( uxBits & BIT_4 ) != 0 ) + * { + * // Bit 4 was set before xEventGroupClearBits() was called. It will + * // now be clear. + * } + * else + * { + * // Neither bit 0 nor bit 4 were set in the first place. + * } + * } + * @endcode + * \defgroup xEventGroupClearBits xEventGroupClearBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * @code{c} + * BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ); + * @endcode + * + * A version of xEventGroupClearBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed + * while interrupts are disabled, so protects event groups that are accessed + * from tasks by suspending the scheduler rather than disabling interrupts. As + * a result event groups cannot be accessed directly from an interrupt service + * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the + * timer task to have the clear operation performed in the context of the timer + * task. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear. + * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3 + * and bit 0 set uxBitsToClear to 0x09. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: + * @code{c} + * #define BIT_0 ( 1 << 0 ) + * #define BIT_4 ( 1 << 4 ) + * + * // An event group which it is assumed has already been created by a call to + * // xEventGroupCreate(). + * EventGroupHandle_t xEventGroup; + * + * void anInterruptHandler( void ) + * { + * // Clear bit 0 and bit 4 in xEventGroup. + * xResult = xEventGroupClearBitsFromISR( + * xEventGroup, // The event group being updated. + * BIT_0 | BIT_4 ); // The bits being set. + * + * if( xResult == pdPASS ) + * { + * // The message was posted successfully. + * } + * } + * @endcode + * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR + * \ingroup EventGroup + */ +#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; +#else + #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) \ + xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ) +#endif + +/** + * event_groups.h + * @code{c} + * EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ); + * @endcode + * + * Set bits within an event group. + * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR() + * is a version that can be called from an interrupt. + * + * Setting bits in an event group will automatically unblock tasks that are + * blocked waiting for the bits. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @return The value of the event group at the time the call to + * xEventGroupSetBits() returns. There are two reasons why the returned value + * might have the bits specified by the uxBitsToSet parameter cleared. First, + * if setting a bit results in a task that was waiting for the bit leaving the + * blocked state then it is possible the bit will be cleared automatically + * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any + * unblocked (or otherwise Ready state) task that has a priority above that of + * the task that called xEventGroupSetBits() will execute and may change the + * event group value before the call to xEventGroupSetBits() returns. + * + * Example usage: + * @code{c} + * #define BIT_0 ( 1 << 0 ) + * #define BIT_4 ( 1 << 4 ) + * + * void aFunction( EventGroupHandle_t xEventGroup ) + * { + * EventBits_t uxBits; + * + * // Set bit 0 and bit 4 in xEventGroup. + * uxBits = xEventGroupSetBits( + * xEventGroup, // The event group being updated. + * BIT_0 | BIT_4 );// The bits being set. + * + * if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) ) + * { + * // Both bit 0 and bit 4 remained set when the function returned. + * } + * else if( ( uxBits & BIT_0 ) != 0 ) + * { + * // Bit 0 remained set when the function returned, but bit 4 was + * // cleared. It might be that bit 4 was cleared automatically as a + * // task that was waiting for bit 4 was removed from the Blocked + * // state. + * } + * else if( ( uxBits & BIT_4 ) != 0 ) + * { + * // Bit 4 remained set when the function returned, but bit 0 was + * // cleared. It might be that bit 0 was cleared automatically as a + * // task that was waiting for bit 0 was removed from the Blocked + * // state. + * } + * else + * { + * // Neither bit 0 nor bit 4 remained set. It might be that a task + * // was waiting for both of the bits to be set, and the bits were + * // cleared as the task left the Blocked state. + * } + * } + * @endcode + * \defgroup xEventGroupSetBits xEventGroupSetBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * @code{c} + * BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * A version of xEventGroupSetBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed in + * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR() + * sends a message to the timer task to have the set operation performed in the + * context of the timer task - where a scheduler lock is used in place of a + * critical section. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @param pxHigherPriorityTaskWoken As mentioned above, calling this function + * will result in a message being sent to the timer daemon task. If the + * priority of the timer daemon task is higher than the priority of the + * currently running task (the task the interrupt interrupted) then + * *pxHigherPriorityTaskWoken will be set to pdTRUE by + * xEventGroupSetBitsFromISR(), indicating that a context switch should be + * requested before the interrupt exits. For that reason + * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the + * example code below. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: + * @code{c} + * #define BIT_0 ( 1 << 0 ) + * #define BIT_4 ( 1 << 4 ) + * + * // An event group which it is assumed has already been created by a call to + * // xEventGroupCreate(). + * EventGroupHandle_t xEventGroup; + * + * void anInterruptHandler( void ) + * { + * BaseType_t xHigherPriorityTaskWoken, xResult; + * + * // xHigherPriorityTaskWoken must be initialised to pdFALSE. + * xHigherPriorityTaskWoken = pdFALSE; + * + * // Set bit 0 and bit 4 in xEventGroup. + * xResult = xEventGroupSetBitsFromISR( + * xEventGroup, // The event group being updated. + * BIT_0 | BIT_4 // The bits being set. + * &xHigherPriorityTaskWoken ); + * + * // Was the message posted successfully? + * if( xResult == pdPASS ) + * { + * // If xHigherPriorityTaskWoken is now set to pdTRUE then a context + * // switch should be requested. The macro used is port specific and + * // will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - + * // refer to the documentation page for the port being used. + * portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + * } + * } + * @endcode + * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR + * \ingroup EventGroup + */ +#if ( configUSE_TRACE_FACILITY == 1 ) + BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; +#else + #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) \ + xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ) +#endif + +/** + * event_groups.h + * @code{c} + * EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, + * const EventBits_t uxBitsToSet, + * const EventBits_t uxBitsToWaitFor, + * TickType_t xTicksToWait ); + * @endcode + * + * Atomically set bits within an event group, then wait for a combination of + * bits to be set within the same event group. This functionality is typically + * used to synchronise multiple tasks, where each task has to wait for the other + * tasks to reach a synchronisation point before proceeding. + * + * This function cannot be used from an interrupt. + * + * The function will return before its block time expires if the bits specified + * by the uxBitsToWait parameter are set, or become set within that time. In + * this case all the bits specified by uxBitsToWait will be automatically + * cleared before the function returns. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToSet The bits to set in the event group before determining + * if, and possibly waiting for, all the bits specified by the uxBitsToWait + * parameter are set. + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for all of the bits specified by uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupSync() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupSync() returned because all the bits it was waiting for were + * set then the returned value is the event group value before any bits were + * automatically cleared. + * + * Example usage: + * @code{c} + * // Bits used by the three tasks. + * #define TASK_0_BIT ( 1 << 0 ) + * #define TASK_1_BIT ( 1 << 1 ) + * #define TASK_2_BIT ( 1 << 2 ) + * + * #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT ) + * + * // Use an event group to synchronise three tasks. It is assumed this event + * // group has already been created elsewhere. + * EventGroupHandle_t xEventBits; + * + * void vTask0( void *pvParameters ) + * { + * EventBits_t uxReturn; + * TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS; + * + * for( ;; ) + * { + * // Perform task functionality here. + * + * // Set bit 0 in the event flag to note this task has reached the + * // sync point. The other two tasks will set the other two bits defined + * // by ALL_SYNC_BITS. All three tasks have reached the synchronisation + * // point when all the ALL_SYNC_BITS are set. Wait a maximum of 100ms + * // for this to happen. + * uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait ); + * + * if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS ) + * { + * // All three tasks reached the synchronisation point before the call + * // to xEventGroupSync() timed out. + * } + * } + * } + * + * void vTask1( void *pvParameters ) + * { + * for( ;; ) + * { + * // Perform task functionality here. + * + * // Set bit 1 in the event flag to note this task has reached the + * // synchronisation point. The other two tasks will set the other two + * // bits defined by ALL_SYNC_BITS. All three tasks have reached the + * // synchronisation point when all the ALL_SYNC_BITS are set. Wait + * // indefinitely for this to happen. + * xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY ); + * + * // xEventGroupSync() was called with an indefinite block time, so + * // this task will only reach here if the synchronisation was made by all + * // three tasks, so there is no need to test the return value. + * } + * } + * + * void vTask2( void *pvParameters ) + * { + * for( ;; ) + * { + * // Perform task functionality here. + * + * // Set bit 2 in the event flag to note this task has reached the + * // synchronisation point. The other two tasks will set the other two + * // bits defined by ALL_SYNC_BITS. All three tasks have reached the + * // synchronisation point when all the ALL_SYNC_BITS are set. Wait + * // indefinitely for this to happen. + * xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY ); + * + * // xEventGroupSync() was called with an indefinite block time, so + * // this task will only reach here if the synchronisation was made by all + * // three tasks, so there is no need to test the return value. + * } + * } + * + * @endcode + * \defgroup xEventGroupSync xEventGroupSync + * \ingroup EventGroup + */ +EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + const EventBits_t uxBitsToWaitFor, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + + +/** + * event_groups.h + * @code{c} + * EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup ); + * @endcode + * + * Returns the current value of the bits in an event group. This function + * cannot be used from an interrupt. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBits() was called. + * + * \defgroup xEventGroupGetBits xEventGroupGetBits + * \ingroup EventGroup + */ +#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 ) + +/** + * event_groups.h + * @code{c} + * EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ); + * @endcode + * + * A version of xEventGroupGetBits() that can be called from an ISR. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBitsFromISR() was called. + * + * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR + * \ingroup EventGroup + */ +EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + * @code{c} + * void xEventGroupDelete( EventGroupHandle_t xEventGroup ); + * @endcode + * + * Delete an event group that was previously created by a call to + * xEventGroupCreate(). Tasks that are blocked on the event group will be + * unblocked and obtain 0 as the event group's value. + * + * @param xEventGroup The event group being deleted. + */ +void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/* For internal use only. */ +void vEventGroupSetBitsCallback( void * pvEventGroup, + const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION; +void vEventGroupClearBitsCallback( void * pvEventGroup, + const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; + + +#if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxEventGroupGetNumber( void * xEventGroup ) PRIVILEGED_FUNCTION; + void vEventGroupSetNumber( void * xEventGroup, + UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION; +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* EVENT_GROUPS_H */ diff --git a/freertos/cvitek/install/include/kernel/freertos_risc_v_chip_specific_extensions.h b/freertos/cvitek/install/include/kernel/freertos_risc_v_chip_specific_extensions.h new file mode 100644 index 000000000..2df01c523 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/freertos_risc_v_chip_specific_extensions.h @@ -0,0 +1,148 @@ +/* + * FreeRTOS Kernel V10.3.1 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * The FreeRTOS kernel's RISC-V port is split between the the code that is + * common across all currently supported RISC-V chips (implementations of the + * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: + * + * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that + * is common to all currently supported RISC-V chips. There is only one + * portASM.S file because the same file is built for all RISC-V target chips. + * + * + Header files called freertos_risc_v_chip_specific_extensions.h contain the + * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V + * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files + * as there are multiple RISC-V chip implementations. + * + * !!!NOTE!!! + * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h + * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the + * compiler's!) include path. For example, if the chip in use includes a core + * local interrupter (CLINT) and does not include any chip specific register + * extensions then add the path below to the assembler's include path: + * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions + * + */ + + +#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__ +#define __FREERTOS_RISC_V_EXTENSIONS_H__ + +#define portasmHAS_SIFIVE_CLINT 1 +#define portasmHAS_MTIME 1 +#ifdef RISCV_FPU +#define portasmADDITIONAL_CONTEXT_SIZE (34) /*in test_if_asynchronous, it will store mepc in 0 * sp position*/ +#else +#define portasmADDITIONAL_CONTEXT_SIZE (0) /* Must be even number on 32-bit cores. */ +#endif + +#define portasmHANDLE_INTERRUPT do_irq + +.macro portasmSAVE_ADDITIONAL_REGISTERS + /* No additional registers to save, so this macro does nothing. */ +#ifdef RISCV_FPU + addi sp, sp, -(portasmADDITIONAL_CONTEXT_SIZE * portWORD_SIZE) + store_f f0, 1 * portWORD_SIZE( sp ) + store_f f1, 2 * portWORD_SIZE( sp ) + store_f f2, 3 * portWORD_SIZE( sp ) + store_f f3, 4 * portWORD_SIZE( sp ) + store_f f4, 5 * portWORD_SIZE( sp ) + store_f f5, 6 * portWORD_SIZE( sp ) + store_f f6, 7 * portWORD_SIZE( sp ) + store_f f7, 8 * portWORD_SIZE( sp ) + store_f f8, 9 * portWORD_SIZE( sp ) + store_f f9, 10 * portWORD_SIZE( sp ) + store_f f10, 11 * portWORD_SIZE( sp ) + store_f f11, 12 * portWORD_SIZE( sp ) + store_f f12, 13 * portWORD_SIZE( sp ) + store_f f13, 14 * portWORD_SIZE( sp ) + store_f f14, 15 * portWORD_SIZE( sp ) + store_f f15, 16 * portWORD_SIZE( sp ) + store_f f16, 17 * portWORD_SIZE( sp ) + store_f f17, 18 * portWORD_SIZE( sp ) + store_f f18, 19 * portWORD_SIZE( sp ) + store_f f19, 20 * portWORD_SIZE( sp ) + store_f f20, 21 * portWORD_SIZE( sp ) + store_f f21, 22 * portWORD_SIZE( sp ) + store_f f22, 23 * portWORD_SIZE( sp ) + store_f f23, 24 * portWORD_SIZE( sp ) + store_f f24, 25 * portWORD_SIZE( sp ) + store_f f25, 26 * portWORD_SIZE( sp ) + store_f f26, 27 * portWORD_SIZE( sp ) + store_f f27, 28 * portWORD_SIZE( sp ) + store_f f28, 29 * portWORD_SIZE( sp ) + store_f f29, 30 * portWORD_SIZE( sp ) + store_f f30, 31 * portWORD_SIZE( sp ) + store_f f31, 32 * portWORD_SIZE( sp ) + csrr t0, fcsr + store_x t0, 33 * portWORD_SIZE( sp ) +#endif + .endm + +.macro portasmRESTORE_ADDITIONAL_REGISTERS + /* No additional registers to restore, so this macro does nothing. */ +#ifdef RISCV_FPU + load_f f0, 1 * portWORD_SIZE( sp ) + load_f f1, 2 * portWORD_SIZE( sp ) + load_f f2, 3 * portWORD_SIZE( sp ) + load_f f3, 4 * portWORD_SIZE( sp ) + load_f f4, 5 * portWORD_SIZE( sp ) + load_f f5, 6 * portWORD_SIZE( sp ) + load_f f6, 7 * portWORD_SIZE( sp ) + load_f f7, 8 * portWORD_SIZE( sp ) + load_f f8, 9 * portWORD_SIZE( sp ) + load_f f9, 10 * portWORD_SIZE( sp ) + load_f f10, 11 * portWORD_SIZE( sp ) + load_f f11, 12 * portWORD_SIZE( sp ) + load_f f12, 13 * portWORD_SIZE( sp ) + load_f f13, 14 * portWORD_SIZE( sp ) + load_f f14, 15 * portWORD_SIZE( sp ) + load_f f15, 16 * portWORD_SIZE( sp ) + load_f f16, 17 * portWORD_SIZE( sp ) + load_f f17, 18 * portWORD_SIZE( sp ) + load_f f18, 19 * portWORD_SIZE( sp ) + load_f f19, 20 * portWORD_SIZE( sp ) + load_f f20, 21 * portWORD_SIZE( sp ) + load_f f21, 22 * portWORD_SIZE( sp ) + load_f f22, 23 * portWORD_SIZE( sp ) + load_f f23, 24 * portWORD_SIZE( sp ) + load_f f24, 25 * portWORD_SIZE( sp ) + load_f f25, 26 * portWORD_SIZE( sp ) + load_f f26, 27 * portWORD_SIZE( sp ) + load_f f27, 28 * portWORD_SIZE( sp ) + load_f f28, 29 * portWORD_SIZE( sp ) + load_f f29, 30 * portWORD_SIZE( sp ) + load_f f30, 31 * portWORD_SIZE( sp ) + load_f f31, 32 * portWORD_SIZE( sp ) + load_x t0, 33 * portWORD_SIZE( sp ) + csrw fcsr, t0 + addi sp, sp, (portasmADDITIONAL_CONTEXT_SIZE * portWORD_SIZE) +#endif + .endm + +#endif /* __FREERTOS_RISC_V_EXTENSIONS_H__ */ diff --git a/freertos/cvitek/install/include/kernel/list.h b/freertos/cvitek/install/include/kernel/list.h new file mode 100644 index 000000000..f866f9fd5 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/list.h @@ -0,0 +1,499 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* + * This is the list implementation used by the scheduler. While it is tailored + * heavily for the schedulers needs, it is also available for use by + * application code. + * + * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a + * numeric value (xItemValue). Most of the time the lists are sorted in + * ascending item value order. + * + * Lists are created already containing one list item. The value of this + * item is the maximum possible that can be stored, it is therefore always at + * the end of the list and acts as a marker. The list member pxHead always + * points to this marker - even though it is at the tail of the list. This + * is because the tail contains a wrap back pointer to the true head of + * the list. + * + * In addition to it's value, each list item contains a pointer to the next + * item in the list (pxNext), a pointer to the list it is in (pxContainer) + * and a pointer to back to the object that contains it. These later two + * pointers are included for efficiency of list manipulation. There is + * effectively a two way link between the object containing the list item and + * the list item itself. + * + * + * \page ListIntroduction List Implementation + * \ingroup FreeRTOSIntro + */ + + +#ifndef LIST_H +#define LIST_H + +#ifndef INC_FREERTOS_H + #error "FreeRTOS.h must be included before list.h" +#endif + +/* + * The list structure members are modified from within interrupts, and therefore + * by rights should be declared volatile. However, they are only modified in a + * functionally atomic way (within critical sections of with the scheduler + * suspended) and are either passed by reference into a function or indexed via + * a volatile variable. Therefore, in all use cases tested so far, the volatile + * qualifier can be omitted in order to provide a moderate performance + * improvement without adversely affecting functional behaviour. The assembly + * instructions generated by the IAR, ARM and GCC compilers when the respective + * compiler's options were set for maximum optimisation has been inspected and + * deemed to be as intended. That said, as compiler technology advances, and + * especially if aggressive cross module optimisation is used (a use case that + * has not been exercised to any great extend) then it is feasible that the + * volatile qualifier will be needed for correct optimisation. It is expected + * that a compiler removing essential code because, without the volatile + * qualifier on the list structure members and with aggressive cross module + * optimisation, the compiler deemed the code unnecessary will result in + * complete and obvious failure of the scheduler. If this is ever experienced + * then the volatile qualifier can be inserted in the relevant places within the + * list structures by simply defining configLIST_VOLATILE to volatile in + * FreeRTOSConfig.h (as per the example at the bottom of this comment block). + * If configLIST_VOLATILE is not defined then the preprocessor directives below + * will simply #define configLIST_VOLATILE away completely. + * + * To use volatile list structure members then add the following line to + * FreeRTOSConfig.h (without the quotes): + * "#define configLIST_VOLATILE volatile" + */ +#ifndef configLIST_VOLATILE + #define configLIST_VOLATILE +#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */ + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/* Macros that can be used to place known values within the list structures, + * then check that the known values do not get corrupted during the execution of + * the application. These may catch the list data structures being overwritten in + * memory. They will not catch data errors caused by incorrect configuration or + * use of FreeRTOS.*/ +#if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) + /* Define the macros to do nothing. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) + #define listTEST_LIST_INTEGRITY( pxList ) +#else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */ + /* Define macros that add new members into the list structures. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; + +/* Define macros that set the new structure members to known values. */ + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + +/* Define macros that will assert if one of the structure members does not + * contain its expected value. */ + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) + #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) +#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */ + + +/* + * Definition of the only type of object that a list can contain. + */ +struct xLIST; +struct xLIST_ITEM +{ + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in ascending order. */ + struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ + void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ + struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */ + listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ +}; +typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ + +struct xMINI_LIST_ITEM +{ + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; + struct xLIST_ITEM * configLIST_VOLATILE pxNext; + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; +}; +typedef struct xMINI_LIST_ITEM MiniListItem_t; + +/* + * Definition of the type of queue used by the scheduler. + */ +typedef struct xLIST +{ + listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + volatile UBaseType_t uxNumberOfItems; + ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ + MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ + listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ +} List_t; + +/* + * Access macro to set the owner of a list item. The owner of a list item + * is the object (usually a TCB) that contains the list item. + * + * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER + * \ingroup LinkedList + */ +#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) + +/* + * Access macro to get the owner of a list item. The owner of a list item + * is the object (usually a TCB) that contains the list item. + * + * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER + * \ingroup LinkedList + */ +#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) + +/* + * Access macro to set the value of the list item. In most cases the value is + * used to sort the list in ascending order. + * + * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) + +/* + * Access macro to retrieve the value of the list item. The value can + * represent anything - for example the priority of a task, or the time at + * which a task should be unblocked. + * + * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) + +/* + * Access macro to retrieve the value of the list item at the head of a given + * list. + * + * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) + +/* + * Return the list item at the head of the list. + * + * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY + * \ingroup LinkedList + */ +#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) + +/* + * Return the next list item. + * + * \page listGET_NEXT listGET_NEXT + * \ingroup LinkedList + */ +#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) + +/* + * Return the list item that marks the end of the list + * + * \page listGET_END_MARKER listGET_END_MARKER + * \ingroup LinkedList + */ +#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) + +/* + * Access macro to determine if a list contains any items. The macro will + * only have the value true if the list is empty. + * + * \page listLIST_IS_EMPTY listLIST_IS_EMPTY + * \ingroup LinkedList + */ +#define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE ) + +/* + * Access macro to return the number of items in the list. + */ +#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) + +/* + * Access function to obtain the owner of the next entry in a list. + * + * The list member pxIndex is used to walk through a list. Calling + * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list + * and returns that entry's pxOwner parameter. Using multiple calls to this + * function it is therefore possible to move through every item contained in + * a list. + * + * The pxOwner parameter of a list item is a pointer to the object that owns + * the list item. In the scheduler this is normally a task control block. + * The pxOwner parameter effectively creates a two way link between the list + * item and its owner. + * + * @param pxTCB pxTCB is set to the address of the owner of the next list item. + * @param pxList The list from which the next item owner is to be returned. + * + * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY + * \ingroup LinkedList + */ +#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ + { \ + List_t * const pxConstList = ( pxList ); \ + /* Increment the index to the next item and return the item, ensuring */ \ + /* we don't return the marker used at the end of the list. */ \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ + { \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + } \ + ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ + } + +/* + * Version of uxListRemove() that does not return a value. Provided as a slight + * optimisation for xTaskIncrementTick() by being inline. + * + * Remove an item from a list. The list item has a pointer to the list that + * it is in, so only the list item need be passed into the function. + * + * @param uxListRemove The item to be removed. The item will remove itself from + * the list pointed to by it's pxContainer parameter. + * + * @return The number of items that remain in the list after the list item has + * been removed. + * + * \page listREMOVE_ITEM listREMOVE_ITEM + * \ingroup LinkedList + */ +#define listREMOVE_ITEM( pxItemToRemove ) \ + { \ + /* The list item knows which list it is in. Obtain the list from the list \ + * item. */ \ + List_t * const pxList = ( pxItemToRemove )->pxContainer; \ + \ + ( pxItemToRemove )->pxNext->pxPrevious = ( pxItemToRemove )->pxPrevious; \ + ( pxItemToRemove )->pxPrevious->pxNext = ( pxItemToRemove )->pxNext; \ + /* Make sure the index is left pointing to a valid item. */ \ + if( pxList->pxIndex == ( pxItemToRemove ) ) \ + { \ + pxList->pxIndex = ( pxItemToRemove )->pxPrevious; \ + } \ + \ + ( pxItemToRemove )->pxContainer = NULL; \ + ( pxList->uxNumberOfItems )--; \ + } + +/* + * Inline version of vListInsertEnd() to provide slight optimisation for + * xTaskIncrementTick(). + * + * Insert a list item into a list. The item will be inserted in a position + * such that it will be the last item within the list returned by multiple + * calls to listGET_OWNER_OF_NEXT_ENTRY. + * + * The list member pxIndex is used to walk through a list. Calling + * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list. + * Placing an item in a list using vListInsertEnd effectively places the item + * in the list position pointed to by pxIndex. This means that every other + * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before + * the pxIndex parameter again points to the item being inserted. + * + * @param pxList The list into which the item is to be inserted. + * + * @param pxNewListItem The list item to be inserted into the list. + * + * \page listINSERT_END listINSERT_END + * \ingroup LinkedList + */ +#define listINSERT_END( pxList, pxNewListItem ) \ + { \ + ListItem_t * const pxIndex = ( pxList )->pxIndex; \ + \ + /* Only effective when configASSERT() is also defined, these tests may catch \ + * the list data structures being overwritten in memory. They will not catch \ + * data errors caused by incorrect configuration or use of FreeRTOS. */ \ + listTEST_LIST_INTEGRITY( ( pxList ) ); \ + listTEST_LIST_ITEM_INTEGRITY( ( pxNewListItem ) ); \ + \ + /* Insert a new list item into ( pxList ), but rather than sort the list, \ + * makes the new list item the last item to be removed by a call to \ + * listGET_OWNER_OF_NEXT_ENTRY(). */ \ + ( pxNewListItem )->pxNext = pxIndex; \ + ( pxNewListItem )->pxPrevious = pxIndex->pxPrevious; \ + \ + pxIndex->pxPrevious->pxNext = ( pxNewListItem ); \ + pxIndex->pxPrevious = ( pxNewListItem ); \ + \ + /* Remember which list the item is in. */ \ + ( pxNewListItem )->pxContainer = ( pxList ); \ + \ + ( ( pxList )->uxNumberOfItems )++; \ + } + +/* + * Access function to obtain the owner of the first entry in a list. Lists + * are normally sorted in ascending item value order. + * + * This function returns the pxOwner member of the first item in the list. + * The pxOwner parameter of a list item is a pointer to the object that owns + * the list item. In the scheduler this is normally a task control block. + * The pxOwner parameter effectively creates a two way link between the list + * item and its owner. + * + * @param pxList The list from which the owner of the head item is to be + * returned. + * + * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY + * \ingroup LinkedList + */ +#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner ) + +/* + * Check to see if a list item is within a list. The list item maintains a + * "container" pointer that points to the list it is in. All this macro does + * is check to see if the container and the list match. + * + * @param pxList The list we want to know if the list item is within. + * @param pxListItem The list item we want to know if is in the list. + * @return pdTRUE if the list item is in the list, otherwise pdFALSE. + */ +#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) ) + +/* + * Return the list a list item is contained within (referenced from). + * + * @param pxListItem The list item being queried. + * @return A pointer to the List_t object that references the pxListItem + */ +#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer ) + +/* + * This provides a crude means of knowing if a list has been initialised, as + * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise() + * function. + */ +#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) + +/* + * Must be called before a list is used! This initialises all the members + * of the list structure and inserts the xListEnd item into the list as a + * marker to the back of the list. + * + * @param pxList Pointer to the list being initialised. + * + * \page vListInitialise vListInitialise + * \ingroup LinkedList + */ +void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION; + +/* + * Must be called before a list item is used. This sets the list container to + * null so the item does not think that it is already contained in a list. + * + * @param pxItem Pointer to the list item being initialised. + * + * \page vListInitialiseItem vListInitialiseItem + * \ingroup LinkedList + */ +void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION; + +/* + * Insert a list item into a list. The item will be inserted into the list in + * a position determined by its item value (ascending item value order). + * + * @param pxList The list into which the item is to be inserted. + * + * @param pxNewListItem The item that is to be placed in the list. + * + * \page vListInsert vListInsert + * \ingroup LinkedList + */ +void vListInsert( List_t * const pxList, + ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; + +/* + * Insert a list item into a list. The item will be inserted in a position + * such that it will be the last item within the list returned by multiple + * calls to listGET_OWNER_OF_NEXT_ENTRY. + * + * The list member pxIndex is used to walk through a list. Calling + * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list. + * Placing an item in a list using vListInsertEnd effectively places the item + * in the list position pointed to by pxIndex. This means that every other + * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before + * the pxIndex parameter again points to the item being inserted. + * + * @param pxList The list into which the item is to be inserted. + * + * @param pxNewListItem The list item to be inserted into the list. + * + * \page vListInsertEnd vListInsertEnd + * \ingroup LinkedList + */ +void vListInsertEnd( List_t * const pxList, + ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; + +/* + * Remove an item from a list. The list item has a pointer to the list that + * it is in, so only the list item need be passed into the function. + * + * @param uxListRemove The item to be removed. The item will remove itself from + * the list pointed to by it's pxContainer parameter. + * + * @return The number of items that remain in the list after the list item has + * been removed. + * + * \page uxListRemove uxListRemove + * \ingroup LinkedList + */ +UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION; + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* ifndef LIST_H */ diff --git a/freertos/cvitek/install/include/kernel/message_buffer.h b/freertos/cvitek/install/include/kernel/message_buffer.h new file mode 100644 index 000000000..140626737 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/message_buffer.h @@ -0,0 +1,823 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +/* + * Message buffers build functionality on top of FreeRTOS stream buffers. + * Whereas stream buffers are used to send a continuous stream of data from one + * task or interrupt to another, message buffers are used to send variable + * length discrete messages from one task or interrupt to another. Their + * implementation is light weight, making them particularly suited for interrupt + * to task and core to core communication scenarios. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * timeout to 0. + * + * Message buffers hold variable length messages. To enable that, when a + * message is written to the message buffer an additional sizeof( size_t ) bytes + * are also written to store the message's length (that happens internally, with + * the API function). sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so writing a 10 byte message to a message buffer on a 32-bit + * architecture will actually reduce the available space in the message buffer + * by 14 bytes (10 byte are used by the message, and 4 bytes to hold the length + * of the message). + */ + +#ifndef FREERTOS_MESSAGE_BUFFER_H +#define FREERTOS_MESSAGE_BUFFER_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include message_buffer.h" +#endif + +/* Message buffers are built onto of stream buffers. */ +#include "stream_buffer.h" + +/* *INDENT-OFF* */ +#if defined( __cplusplus ) + extern "C" { +#endif +/* *INDENT-ON* */ + +/** + * Type by which message buffers are referenced. For example, a call to + * xMessageBufferCreate() returns an MessageBufferHandle_t variable that can + * then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(), + * etc. + */ +typedef void * MessageBufferHandle_t; + +/*-----------------------------------------------------------*/ + +/** + * message_buffer.h + * + * @code{c} + * MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes ); + * @endcode + * + * Creates a new message buffer using dynamically allocated memory. See + * xMessageBufferCreateStatic() for a version that uses statically allocated + * memory (memory that is allocated at compile time). + * + * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in + * FreeRTOSConfig.h for xMessageBufferCreate() to be available. + * + * @param xBufferSizeBytes The total number of bytes (not messages) the message + * buffer will be able to hold at any one time. When a message is written to + * the message buffer an additional sizeof( size_t ) bytes are also written to + * store the message's length. sizeof( size_t ) is typically 4 bytes on a + * 32-bit architecture, so on most 32-bit architectures a 10 byte message will + * take up 14 bytes of message buffer space. + * + * @return If NULL is returned, then the message buffer cannot be created + * because there is insufficient heap memory available for FreeRTOS to allocate + * the message buffer data structures and storage area. A non-NULL value being + * returned indicates that the message buffer has been created successfully - + * the returned value should be stored as the handle to the created message + * buffer. + * + * Example use: + * @code{c} + * + * void vAFunction( void ) + * { + * MessageBufferHandle_t xMessageBuffer; + * const size_t xMessageBufferSizeBytes = 100; + * + * // Create a message buffer that can hold 100 bytes. The memory used to hold + * // both the message buffer structure and the messages themselves is allocated + * // dynamically. Each message added to the buffer consumes an additional 4 + * // bytes which are used to hold the lengh of the message. + * xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes ); + * + * if( xMessageBuffer == NULL ) + * { + * // There was not enough heap memory space available to create the + * // message buffer. + * } + * else + * { + * // The message buffer was created successfully and can now be used. + * } + * + * @endcode + * \defgroup xMessageBufferCreate xMessageBufferCreate + * \ingroup MessageBufferManagement + */ +#define xMessageBufferCreate( xBufferSizeBytes ) \ + ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE ) + +/** + * message_buffer.h + * + * @code{c} + * MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes, + * uint8_t *pucMessageBufferStorageArea, + * StaticMessageBuffer_t *pxStaticMessageBuffer ); + * @endcode + * Creates a new message buffer using statically allocated memory. See + * xMessageBufferCreate() for a version that uses dynamically allocated memory. + * + * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the + * pucMessageBufferStorageArea parameter. When a message is written to the + * message buffer an additional sizeof( size_t ) bytes are also written to store + * the message's length. sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so on most 32-bit architecture a 10 byte message will take up + * 14 bytes of message buffer space. The maximum number of bytes that can be + * stored in the message buffer is actually (xBufferSizeBytes - 1). + * + * @param pucMessageBufferStorageArea Must point to a uint8_t array that is at + * least xBufferSizeBytes big. This is the array to which messages are + * copied when they are written to the message buffer. + * + * @param pxStaticMessageBuffer Must point to a variable of type + * StaticMessageBuffer_t, which will be used to hold the message buffer's data + * structure. + * + * @return If the message buffer is created successfully then a handle to the + * created message buffer is returned. If either pucMessageBufferStorageArea or + * pxStaticmessageBuffer are NULL then NULL is returned. + * + * Example use: + * @code{c} + * + * // Used to dimension the array used to hold the messages. The available space + * // will actually be one less than this, so 999. + #define STORAGE_SIZE_BYTES 1000 + * + * // Defines the memory that will actually hold the messages within the message + * // buffer. + * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ]; + * + * // The variable used to hold the message buffer structure. + * StaticMessageBuffer_t xMessageBufferStruct; + * + * void MyFunction( void ) + * { + * MessageBufferHandle_t xMessageBuffer; + * + * xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucStorageBuffer ), + * ucStorageBuffer, + * &xMessageBufferStruct ); + * + * // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer + * // parameters were NULL, xMessageBuffer will not be NULL, and can be used to + * // reference the created message buffer in other message buffer API calls. + * + * // Other code that uses the message buffer can go here. + * } + * + * @endcode + * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic + * \ingroup MessageBufferManagement + */ +#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \ + ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer ) + +/** + * message_buffer.h + * + * @code{c} + * size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer, + * const void *pvTxData, + * size_t xDataLengthBytes, + * TickType_t xTicksToWait ); + * @endcode + * + * Sends a discrete message to the message buffer. The message can be any + * length that fits within the buffer's free space, and is copied into the + * buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferSend() to write to a message buffer from a task. Use + * xMessageBufferSendFromISR() to write to a message buffer from an interrupt + * service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer to which a message is + * being sent. + * + * @param pvTxData A pointer to the message that is to be copied into the + * message buffer. + * + * @param xDataLengthBytes The length of the message. That is, the number of + * bytes to copy from pvTxData into the message buffer. When a message is + * written to the message buffer an additional sizeof( size_t ) bytes are also + * written to store the message's length. sizeof( size_t ) is typically 4 bytes + * on a 32-bit architecture, so on most 32-bit architecture setting + * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24 + * bytes (20 bytes of message data and 4 bytes to hold the message length). + * + * @param xTicksToWait The maximum amount of time the calling task should remain + * in the Blocked state to wait for enough space to become available in the + * message buffer, should the message buffer have insufficient space when + * xMessageBufferSend() is called. The calling task will never block if + * xTicksToWait is zero. The block time is specified in tick periods, so the + * absolute time it represents is dependent on the tick frequency. The macro + * pdMS_TO_TICKS() can be used to convert a time specified in milliseconds into + * a time specified in ticks. Setting xTicksToWait to portMAX_DELAY will cause + * the task to wait indefinitely (without timing out), provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h. Tasks do not use any + * CPU time when they are in the Blocked state. + * + * @return The number of bytes written to the message buffer. If the call to + * xMessageBufferSend() times out before there was enough space to write the + * message into the message buffer then zero is returned. If the call did not + * time out then xDataLengthBytes is returned. + * + * Example use: + * @code{c} + * void vAFunction( MessageBufferHandle_t xMessageBuffer ) + * { + * size_t xBytesSent; + * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 }; + * char *pcStringToSend = "String to send"; + * const TickType_t x100ms = pdMS_TO_TICKS( 100 ); + * + * // Send an array to the message buffer, blocking for a maximum of 100ms to + * // wait for enough space to be available in the message buffer. + * xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms ); + * + * if( xBytesSent != sizeof( ucArrayToSend ) ) + * { + * // The call to xMessageBufferSend() times out before there was enough + * // space in the buffer for the data to be written. + * } + * + * // Send the string to the message buffer. Return immediately if there is + * // not enough space in the buffer. + * xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 ); + * + * if( xBytesSent != strlen( pcStringToSend ) ) + * { + * // The string could not be added to the message buffer because there was + * // not enough free space in the buffer. + * } + * } + * @endcode + * \defgroup xMessageBufferSend xMessageBufferSend + * \ingroup MessageBufferManagement + */ +#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \ + xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) + +/** + * message_buffer.h + * + * @code{c} + * size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer, + * const void *pvTxData, + * size_t xDataLengthBytes, + * BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * Interrupt safe version of the API function that sends a discrete message to + * the message buffer. The message can be any length that fits within the + * buffer's free space, and is copied into the buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferSend() to write to a message buffer from a task. Use + * xMessageBufferSendFromISR() to write to a message buffer from an interrupt + * service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer to which a message is + * being sent. + * + * @param pvTxData A pointer to the message that is to be copied into the + * message buffer. + * + * @param xDataLengthBytes The length of the message. That is, the number of + * bytes to copy from pvTxData into the message buffer. When a message is + * written to the message buffer an additional sizeof( size_t ) bytes are also + * written to store the message's length. sizeof( size_t ) is typically 4 bytes + * on a 32-bit architecture, so on most 32-bit architecture setting + * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24 + * bytes (20 bytes of message data and 4 bytes to hold the message length). + * + * @param pxHigherPriorityTaskWoken It is possible that a message buffer will + * have a task blocked on it waiting for data. Calling + * xMessageBufferSendFromISR() can make data available, and so cause a task that + * was waiting for data to leave the Blocked state. If calling + * xMessageBufferSendFromISR() causes a task to leave the Blocked state, and the + * unblocked task has a priority higher than the currently executing task (the + * task that was interrupted), then, internally, xMessageBufferSendFromISR() + * will set *pxHigherPriorityTaskWoken to pdTRUE. If + * xMessageBufferSendFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. This will + * ensure that the interrupt returns directly to the highest priority Ready + * state task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it + * is passed into the function. See the code example below for an example. + * + * @return The number of bytes actually written to the message buffer. If the + * message buffer didn't have enough free space for the message to be stored + * then 0 is returned, otherwise xDataLengthBytes is returned. + * + * Example use: + * @code{c} + * // A message buffer that has already been created. + * MessageBufferHandle_t xMessageBuffer; + * + * void vAnInterruptServiceRoutine( void ) + * { + * size_t xBytesSent; + * char *pcStringToSend = "String to send"; + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + * + * // Attempt to send the string to the message buffer. + * xBytesSent = xMessageBufferSendFromISR( xMessageBuffer, + * ( void * ) pcStringToSend, + * strlen( pcStringToSend ), + * &xHigherPriorityTaskWoken ); + * + * if( xBytesSent != strlen( pcStringToSend ) ) + * { + * // The string could not be added to the message buffer because there was + * // not enough free space in the buffer. + * } + * + * // If xHigherPriorityTaskWoken was set to pdTRUE inside + * // xMessageBufferSendFromISR() then a task that has a priority above the + * // priority of the currently executing task was unblocked and a context + * // switch should be performed to ensure the ISR returns to the unblocked + * // task. In most FreeRTOS ports this is done by simply passing + * // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the + * // variables value, and perform the context switch if necessary. Check the + * // documentation for the port in use for port specific instructions. + * portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + * } + * @endcode + * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR + * \ingroup MessageBufferManagement + */ +#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \ + xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) + +/** + * message_buffer.h + * + * @code{c} + * size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer, + * void *pvRxData, + * size_t xBufferLengthBytes, + * TickType_t xTicksToWait ); + * @endcode + * + * Receives a discrete message from a message buffer. Messages can be of + * variable length and are copied out of the buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferReceive() to read from a message buffer from a task. Use + * xMessageBufferReceiveFromISR() to read from a message buffer from an + * interrupt service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer from which a message + * is being received. + * + * @param pvRxData A pointer to the buffer into which the received message is + * to be copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData + * parameter. This sets the maximum length of the message that can be received. + * If xBufferLengthBytes is too small to hold the next message then the message + * will be left in the message buffer and 0 will be returned. + * + * @param xTicksToWait The maximum amount of time the task should remain in the + * Blocked state to wait for a message, should the message buffer be empty. + * xMessageBufferReceive() will return immediately if xTicksToWait is zero and + * the message buffer is empty. The block time is specified in tick periods, so + * the absolute time it represents is dependent on the tick frequency. The + * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds + * into a time specified in ticks. Setting xTicksToWait to portMAX_DELAY will + * cause the task to wait indefinitely (without timing out), provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h. Tasks do not use any + * CPU time when they are in the Blocked state. + * + * @return The length, in bytes, of the message read from the message buffer, if + * any. If xMessageBufferReceive() times out before a message became available + * then zero is returned. If the length of the message is greater than + * xBufferLengthBytes then the message will be left in the message buffer and + * zero is returned. + * + * Example use: + * @code{c} + * void vAFunction( MessageBuffer_t xMessageBuffer ) + * { + * uint8_t ucRxData[ 20 ]; + * size_t xReceivedBytes; + * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 ); + * + * // Receive the next message from the message buffer. Wait in the Blocked + * // state (so not using any CPU processing time) for a maximum of 100ms for + * // a message to become available. + * xReceivedBytes = xMessageBufferReceive( xMessageBuffer, + * ( void * ) ucRxData, + * sizeof( ucRxData ), + * xBlockTime ); + * + * if( xReceivedBytes > 0 ) + * { + * // A ucRxData contains a message that is xReceivedBytes long. Process + * // the message here.... + * } + * } + * @endcode + * \defgroup xMessageBufferReceive xMessageBufferReceive + * \ingroup MessageBufferManagement + */ +#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \ + xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) + + +/** + * message_buffer.h + * + * @code{c} + * size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer, + * void *pvRxData, + * size_t xBufferLengthBytes, + * BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * An interrupt safe version of the API function that receives a discrete + * message from a message buffer. Messages can be of variable length and are + * copied out of the buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferReceive() to read from a message buffer from a task. Use + * xMessageBufferReceiveFromISR() to read from a message buffer from an + * interrupt service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer from which a message + * is being received. + * + * @param pvRxData A pointer to the buffer into which the received message is + * to be copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData + * parameter. This sets the maximum length of the message that can be received. + * If xBufferLengthBytes is too small to hold the next message then the message + * will be left in the message buffer and 0 will be returned. + * + * @param pxHigherPriorityTaskWoken It is possible that a message buffer will + * have a task blocked on it waiting for space to become available. Calling + * xMessageBufferReceiveFromISR() can make space available, and so cause a task + * that is waiting for space to leave the Blocked state. If calling + * xMessageBufferReceiveFromISR() causes a task to leave the Blocked state, and + * the unblocked task has a priority higher than the currently executing task + * (the task that was interrupted), then, internally, + * xMessageBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE. + * If xMessageBufferReceiveFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. That will + * ensure the interrupt returns directly to the highest priority Ready state + * task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it is + * passed into the function. See the code example below for an example. + * + * @return The length, in bytes, of the message read from the message buffer, if + * any. + * + * Example use: + * @code{c} + * // A message buffer that has already been created. + * MessageBuffer_t xMessageBuffer; + * + * void vAnInterruptServiceRoutine( void ) + * { + * uint8_t ucRxData[ 20 ]; + * size_t xReceivedBytes; + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + * + * // Receive the next message from the message buffer. + * xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer, + * ( void * ) ucRxData, + * sizeof( ucRxData ), + * &xHigherPriorityTaskWoken ); + * + * if( xReceivedBytes > 0 ) + * { + * // A ucRxData contains a message that is xReceivedBytes long. Process + * // the message here.... + * } + * + * // If xHigherPriorityTaskWoken was set to pdTRUE inside + * // xMessageBufferReceiveFromISR() then a task that has a priority above the + * // priority of the currently executing task was unblocked and a context + * // switch should be performed to ensure the ISR returns to the unblocked + * // task. In most FreeRTOS ports this is done by simply passing + * // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the + * // variables value, and perform the context switch if necessary. Check the + * // documentation for the port in use for port specific instructions. + * portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + * } + * @endcode + * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR + * \ingroup MessageBufferManagement + */ +#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \ + xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) + +/** + * message_buffer.h + * + * @code{c} + * void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer ); + * @endcode + * + * Deletes a message buffer that was previously created using a call to + * xMessageBufferCreate() or xMessageBufferCreateStatic(). If the message + * buffer was created using dynamic memory (that is, by xMessageBufferCreate()), + * then the allocated memory is freed. + * + * A message buffer handle must not be used after the message buffer has been + * deleted. + * + * @param xMessageBuffer The handle of the message buffer to be deleted. + * + */ +#define vMessageBufferDelete( xMessageBuffer ) \ + vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer ) + +/** + * message_buffer.h + * @code{c} + * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ); + * @endcode + * + * Tests to see if a message buffer is full. A message buffer is full if it + * cannot accept any more messages, of any size, until space is made available + * by a message being removed from the message buffer. + * + * @param xMessageBuffer The handle of the message buffer being queried. + * + * @return If the message buffer referenced by xMessageBuffer is full then + * pdTRUE is returned. Otherwise pdFALSE is returned. + */ +#define xMessageBufferIsFull( xMessageBuffer ) \ + xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer ) + +/** + * message_buffer.h + * @code{c} + * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ); + * @endcode + * + * Tests to see if a message buffer is empty (does not contain any messages). + * + * @param xMessageBuffer The handle of the message buffer being queried. + * + * @return If the message buffer referenced by xMessageBuffer is empty then + * pdTRUE is returned. Otherwise pdFALSE is returned. + * + */ +#define xMessageBufferIsEmpty( xMessageBuffer ) \ + xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer ) + +/** + * message_buffer.h + * @code{c} + * BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer ); + * @endcode + * + * Resets a message buffer to its initial empty state, discarding any message it + * contained. + * + * A message buffer can only be reset if there are no tasks blocked on it. + * + * @param xMessageBuffer The handle of the message buffer being reset. + * + * @return If the message buffer was reset then pdPASS is returned. If the + * message buffer could not be reset because either there was a task blocked on + * the message queue to wait for space to become available, or to wait for a + * a message to be available, then pdFAIL is returned. + * + * \defgroup xMessageBufferReset xMessageBufferReset + * \ingroup MessageBufferManagement + */ +#define xMessageBufferReset( xMessageBuffer ) \ + xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer ) + + +/** + * message_buffer.h + * @code{c} + * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ); + * @endcode + * Returns the number of bytes of free space in the message buffer. + * + * @param xMessageBuffer The handle of the message buffer being queried. + * + * @return The number of bytes that can be written to the message buffer before + * the message buffer would be full. When a message is written to the message + * buffer an additional sizeof( size_t ) bytes are also written to store the + * message's length. sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size + * of the largest message that can be written to the message buffer is 6 bytes. + * + * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable + * \ingroup MessageBufferManagement + */ +#define xMessageBufferSpaceAvailable( xMessageBuffer ) \ + xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) +#define xMessageBufferSpacesAvailable( xMessageBuffer ) \ + xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */ + +/** + * message_buffer.h + * @code{c} + * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ); + * @endcode + * Returns the length (in bytes) of the next message in a message buffer. + * Useful if xMessageBufferReceive() returned 0 because the size of the buffer + * passed into xMessageBufferReceive() was too small to hold the next message. + * + * @param xMessageBuffer The handle of the message buffer being queried. + * + * @return The length (in bytes) of the next message in the message buffer, or 0 + * if the message buffer is empty. + * + * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes + * \ingroup MessageBufferManagement + */ +#define xMessageBufferNextLengthBytes( xMessageBuffer ) \ + xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION; + +/** + * message_buffer.h + * + * @code{c} + * BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xMessageBuffer, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * For advanced users only. + * + * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is sent to a message buffer or stream buffer. If there was a task that + * was blocked on the message or stream buffer waiting for data to arrive then + * the sbSEND_COMPLETED() macro sends a notification to the task to remove it + * from the Blocked state. xMessageBufferSendCompletedFromISR() does the same + * thing. It is provided to enable application writers to implement their own + * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xMessageBuffer The handle of the stream buffer to which data was + * written. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xMessageBufferSendCompletedFromISR(). If calling + * xMessageBufferSendCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR + * \ingroup StreamBufferManagement + */ +#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \ + xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken ) + +/** + * message_buffer.h + * + * @code{c} + * BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xMessageBuffer, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * For advanced users only. + * + * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is read out of a message buffer or stream buffer. If there was a task + * that was blocked on the message or stream buffer waiting for data to arrive + * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to + * remove it from the Blocked state. xMessageBufferReceiveCompletedFromISR() + * does the same thing. It is provided to enable application writers to + * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT + * ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xMessageBuffer The handle of the stream buffer from which data was + * read. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xMessageBufferReceiveCompletedFromISR(). If calling + * xMessageBufferReceiveCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR + * \ingroup StreamBufferManagement + */ +#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \ + xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken ) + +/* *INDENT-OFF* */ +#if defined( __cplusplus ) + } /* extern "C" */ +#endif +/* *INDENT-ON* */ + +#endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */ diff --git a/freertos/cvitek/install/include/kernel/mpu_prototypes.h b/freertos/cvitek/install/include/kernel/mpu_prototypes.h new file mode 100644 index 000000000..cb743be55 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/mpu_prototypes.h @@ -0,0 +1,260 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* + * When the MPU is used the standard (non MPU) API functions are mapped to + * equivalents that start "MPU_", the prototypes for which are defined in this + * header files. This will cause the application code to call the MPU_ version + * which wraps the non-MPU version with privilege promoting then demoting code, + * so the kernel code always runs will full privileges. + */ + + +#ifndef MPU_PROTOTYPES_H +#define MPU_PROTOTYPES_H + +/* MPU versions of tasks.h API functions. */ +BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, + const char * const pcName, + const uint16_t usStackDepth, + void * const pvParameters, + UBaseType_t uxPriority, + TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL; +TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, + const char * const pcName, + const uint32_t ulStackDepth, + void * const pvParameters, + UBaseType_t uxPriority, + StackType_t * const puxStackBuffer, + StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; +eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskPrioritySet( TaskHandle_t xTask, + UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL; +TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL; +char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL; +TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; +configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL; +TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) FREERTOS_SYSTEM_CALL; +void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, + void * pvParameter ) FREERTOS_SYSTEM_CALL; +TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL; +configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL; +configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, + UBaseType_t uxIndexToNotify, + uint32_t ulValue, + eNotifyAction eAction, + uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, + uint32_t ulBitsToClearOnEntry, + uint32_t ulBitsToClearOnExit, + uint32_t * pulNotificationValue, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) FREERTOS_SYSTEM_CALL; +uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL; +TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL; +void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL; + +/* MPU versions of queue.h API functions. */ +BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; +void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; +QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL; +QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, + StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL; +QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, + const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL; +QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, + const UBaseType_t uxInitialCount, + StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL; +TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL; +void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcName ) FREERTOS_SYSTEM_CALL; +void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; +const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; +QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL; +QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + uint8_t * pucQueueStorage, + StaticQueue_t * pxStaticQueue, + const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL; +QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL; +QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, + BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL; +void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, + UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; +uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; + +/* MPU versions of timers.h API functions. */ +TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, + const TickType_t xTimerPeriodInTicks, + const UBaseType_t uxAutoReload, + void * const pvTimerID, + TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL; +TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, + const TickType_t xTimerPeriodInTicks, + const UBaseType_t uxAutoReload, + void * const pvTimerID, + TimerCallbackFunction_t pxCallbackFunction, + StaticTimer_t * pxTimerBuffer ) FREERTOS_SYSTEM_CALL; +void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; +void MPU_vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; +TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, + void * pvParameter1, + uint32_t ulParameter2, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; +void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, + const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; +TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; +TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, + const BaseType_t xCommandID, + const TickType_t xOptionalValue, + BaseType_t * const pxHigherPriorityTaskWoken, + const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; + +/* MPU versions of event_group.h API functions. */ +EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL; +EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL; +EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xClearOnExit, + const BaseType_t xWaitForAllBits, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL; +EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL; +EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + const EventBits_t uxBitsToWaitFor, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL; +UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL; + +/* MPU versions of message/stream_buffer.h API functions. */ +size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; +size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; +void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; +size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; +size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; +BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL; +StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL; +StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer, + uint8_t * const pucStreamBufferStorageArea, + StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL; + + + +#endif /* MPU_PROTOTYPES_H */ diff --git a/freertos/cvitek/install/include/kernel/mpu_wrappers.h b/freertos/cvitek/install/include/kernel/mpu_wrappers.h new file mode 100644 index 000000000..9b6cd7c92 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/mpu_wrappers.h @@ -0,0 +1,217 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef MPU_WRAPPERS_H +#define MPU_WRAPPERS_H + +/* This file redefines API functions to be called through a wrapper macro, but + * only for ports that are using the MPU. */ +#if ( portUSING_MPU_WRAPPERS == 1 ) + +/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is + * included from queue.c or task.c to prevent it from having an effect within + * those files. */ + #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* + * Map standard (non MPU) API functions to equivalents that start + * "MPU_". This will cause the application code to call the MPU_ + * version, which wraps the non-MPU version with privilege promoting + * then demoting code, so the kernel code always runs will full + * privileges. + */ + +/* Map standard tasks.h API functions to the MPU equivalents. */ + #define xTaskCreate MPU_xTaskCreate + #define xTaskCreateStatic MPU_xTaskCreateStatic + #define vTaskDelete MPU_vTaskDelete + #define vTaskDelay MPU_vTaskDelay + #define xTaskDelayUntil MPU_xTaskDelayUntil + #define xTaskAbortDelay MPU_xTaskAbortDelay + #define uxTaskPriorityGet MPU_uxTaskPriorityGet + #define eTaskGetState MPU_eTaskGetState + #define vTaskGetInfo MPU_vTaskGetInfo + #define vTaskPrioritySet MPU_vTaskPrioritySet + #define vTaskSuspend MPU_vTaskSuspend + #define vTaskResume MPU_vTaskResume + #define vTaskSuspendAll MPU_vTaskSuspendAll + #define xTaskResumeAll MPU_xTaskResumeAll + #define xTaskGetTickCount MPU_xTaskGetTickCount + #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks + #define pcTaskGetName MPU_pcTaskGetName + #define xTaskGetHandle MPU_xTaskGetHandle + #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark + #define uxTaskGetStackHighWaterMark2 MPU_uxTaskGetStackHighWaterMark2 + #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag + #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag + #define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer + #define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer + #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook + #define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle + #define uxTaskGetSystemState MPU_uxTaskGetSystemState + #define vTaskList MPU_vTaskList + #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats + #define ulTaskGetIdleRunTimeCounter MPU_ulTaskGetIdleRunTimeCounter + #define ulTaskGetIdleRunTimePercent MPU_ulTaskGetIdleRunTimePercent + #define xTaskGenericNotify MPU_xTaskGenericNotify + #define xTaskGenericNotifyWait MPU_xTaskGenericNotifyWait + #define ulTaskGenericNotifyTake MPU_ulTaskGenericNotifyTake + #define xTaskGenericNotifyStateClear MPU_xTaskGenericNotifyStateClear + #define ulTaskGenericNotifyValueClear MPU_ulTaskGenericNotifyValueClear + #define xTaskCatchUpTicks MPU_xTaskCatchUpTicks + + #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle + #define vTaskSetTimeOutState MPU_vTaskSetTimeOutState + #define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut + #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState + +/* Map standard queue.h API functions to the MPU equivalents. */ + #define xQueueGenericSend MPU_xQueueGenericSend + #define xQueueReceive MPU_xQueueReceive + #define xQueuePeek MPU_xQueuePeek + #define xQueueSemaphoreTake MPU_xQueueSemaphoreTake + #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting + #define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable + #define vQueueDelete MPU_vQueueDelete + #define xQueueCreateMutex MPU_xQueueCreateMutex + #define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic + #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore + #define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic + #define xQueueGetMutexHolder MPU_xQueueGetMutexHolder + #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive + #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive + #define xQueueGenericCreate MPU_xQueueGenericCreate + #define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic + #define xQueueCreateSet MPU_xQueueCreateSet + #define xQueueAddToSet MPU_xQueueAddToSet + #define xQueueRemoveFromSet MPU_xQueueRemoveFromSet + #define xQueueSelectFromSet MPU_xQueueSelectFromSet + #define xQueueGenericReset MPU_xQueueGenericReset + + #if ( configQUEUE_REGISTRY_SIZE > 0 ) + #define vQueueAddToRegistry MPU_vQueueAddToRegistry + #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue + #define pcQueueGetName MPU_pcQueueGetName + #endif + +/* Map standard timer.h API functions to the MPU equivalents. */ + #define xTimerCreate MPU_xTimerCreate + #define xTimerCreateStatic MPU_xTimerCreateStatic + #define pvTimerGetTimerID MPU_pvTimerGetTimerID + #define vTimerSetTimerID MPU_vTimerSetTimerID + #define xTimerIsTimerActive MPU_xTimerIsTimerActive + #define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle + #define xTimerPendFunctionCall MPU_xTimerPendFunctionCall + #define pcTimerGetName MPU_pcTimerGetName + #define vTimerSetReloadMode MPU_vTimerSetReloadMode + #define uxTimerGetReloadMode MPU_uxTimerGetReloadMode + #define xTimerGetPeriod MPU_xTimerGetPeriod + #define xTimerGetExpiryTime MPU_xTimerGetExpiryTime + #define xTimerGenericCommand MPU_xTimerGenericCommand + +/* Map standard event_group.h API functions to the MPU equivalents. */ + #define xEventGroupCreate MPU_xEventGroupCreate + #define xEventGroupCreateStatic MPU_xEventGroupCreateStatic + #define xEventGroupWaitBits MPU_xEventGroupWaitBits + #define xEventGroupClearBits MPU_xEventGroupClearBits + #define xEventGroupSetBits MPU_xEventGroupSetBits + #define xEventGroupSync MPU_xEventGroupSync + #define vEventGroupDelete MPU_vEventGroupDelete + +/* Map standard message/stream_buffer.h API functions to the MPU + * equivalents. */ + #define xStreamBufferSend MPU_xStreamBufferSend + #define xStreamBufferReceive MPU_xStreamBufferReceive + #define xStreamBufferNextMessageLengthBytes MPU_xStreamBufferNextMessageLengthBytes + #define vStreamBufferDelete MPU_vStreamBufferDelete + #define xStreamBufferIsFull MPU_xStreamBufferIsFull + #define xStreamBufferIsEmpty MPU_xStreamBufferIsEmpty + #define xStreamBufferReset MPU_xStreamBufferReset + #define xStreamBufferSpacesAvailable MPU_xStreamBufferSpacesAvailable + #define xStreamBufferBytesAvailable MPU_xStreamBufferBytesAvailable + #define xStreamBufferSetTriggerLevel MPU_xStreamBufferSetTriggerLevel + #define xStreamBufferGenericCreate MPU_xStreamBufferGenericCreate + #define xStreamBufferGenericCreateStatic MPU_xStreamBufferGenericCreateStatic + + +/* Remove the privileged function macro, but keep the PRIVILEGED_DATA + * macro so applications can place data in privileged access sections + * (useful when using statically allocated objects). */ + #define PRIVILEGED_FUNCTION + #define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) ) + #define FREERTOS_SYSTEM_CALL + + #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ + + /* Ensure API functions go in the privileged execution section. */ + #define PRIVILEGED_FUNCTION __attribute__( ( section( "privileged_functions" ) ) ) + #define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) ) + #define FREERTOS_SYSTEM_CALL __attribute__( ( section( "freertos_system_calls" ) ) ) + + /** + * @brief Calls the port specific code to raise the privilege. + * + * Sets xRunningPrivileged to pdFALSE if privilege was raised, else sets + * it to pdTRUE. + */ + #define xPortRaisePrivilege( xRunningPrivileged ) \ + { \ + /* Check whether the processor is already privileged. */ \ + xRunningPrivileged = portIS_PRIVILEGED(); \ + \ + /* If the processor is not already privileged, raise privilege. */ \ + if( xRunningPrivileged == pdFALSE ) \ + { \ + portRAISE_PRIVILEGE(); \ + } \ + } + + /** + * @brief If xRunningPrivileged is not pdTRUE, calls the port specific + * code to reset the privilege, otherwise does nothing. + */ + #define vPortResetPrivilege( xRunningPrivileged ) \ + { \ + if( xRunningPrivileged == pdFALSE ) \ + { \ + portRESET_PRIVILEGE(); \ + } \ + } + + #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ + +#else /* portUSING_MPU_WRAPPERS */ + + #define PRIVILEGED_FUNCTION + #define PRIVILEGED_DATA + #define FREERTOS_SYSTEM_CALL + +#endif /* portUSING_MPU_WRAPPERS */ + + +#endif /* MPU_WRAPPERS_H */ diff --git a/freertos/cvitek/install/include/kernel/portable.h b/freertos/cvitek/install/include/kernel/portable.h new file mode 100644 index 000000000..0ec6416ae --- /dev/null +++ b/freertos/cvitek/install/include/kernel/portable.h @@ -0,0 +1,223 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/*----------------------------------------------------------- +* Portable layer API. Each function must be defined for each port. +*----------------------------------------------------------*/ + +#ifndef PORTABLE_H +#define PORTABLE_H + +/* Each FreeRTOS port has a unique portmacro.h header file. Originally a + * pre-processor definition was used to ensure the pre-processor found the correct + * portmacro.h file for the port being used. That scheme was deprecated in favour + * of setting the compiler's include path such that it found the correct + * portmacro.h file - removing the need for the constant and allowing the + * portmacro.h file to be located anywhere in relation to the port being used. + * Purely for reasons of backward compatibility the old method is still valid, but + * to make it clear that new projects should not use it, support for the port + * specific constants has been moved into the deprecated_definitions.h header + * file. */ +#include "deprecated_definitions.h" + +/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h + * did not result in a portmacro.h header file being included - and it should be + * included here. In this case the path to the correct portmacro.h header file + * must be set in the compiler's include path. */ +#ifndef portENTER_CRITICAL + #include "portmacro.h" +#endif + +#if portBYTE_ALIGNMENT == 32 + #define portBYTE_ALIGNMENT_MASK ( 0x001f ) +#elif portBYTE_ALIGNMENT == 16 + #define portBYTE_ALIGNMENT_MASK ( 0x000f ) +#elif portBYTE_ALIGNMENT == 8 + #define portBYTE_ALIGNMENT_MASK ( 0x0007 ) +#elif portBYTE_ALIGNMENT == 4 + #define portBYTE_ALIGNMENT_MASK ( 0x0003 ) +#elif portBYTE_ALIGNMENT == 2 + #define portBYTE_ALIGNMENT_MASK ( 0x0001 ) +#elif portBYTE_ALIGNMENT == 1 + #define portBYTE_ALIGNMENT_MASK ( 0x0000 ) +#else /* if portBYTE_ALIGNMENT == 32 */ + #error "Invalid portBYTE_ALIGNMENT definition" +#endif /* if portBYTE_ALIGNMENT == 32 */ + +#ifndef portUSING_MPU_WRAPPERS + #define portUSING_MPU_WRAPPERS 0 +#endif + +#ifndef portNUM_CONFIGURABLE_REGIONS + #define portNUM_CONFIGURABLE_REGIONS 1 +#endif + +#ifndef portHAS_STACK_OVERFLOW_CHECKING + #define portHAS_STACK_OVERFLOW_CHECKING 0 +#endif + +#ifndef portARCH_NAME + #define portARCH_NAME NULL +#endif + +#ifndef configSTACK_ALLOCATION_FROM_SEPARATE_HEAP + /* Defaults to 0 for backward compatibility. */ + #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +#include "mpu_wrappers.h" + +/* + * Setup the stack of a new task so it is ready to be placed under the + * scheduler control. The registers have to be placed on the stack in + * the order that the port expects to find them. + * + */ +#if ( portUSING_MPU_WRAPPERS == 1 ) + #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION; + #else + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + TaskFunction_t pxCode, + void * pvParameters, + BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION; + #endif +#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */ + #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 ) + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + StackType_t * pxEndOfStack, + TaskFunction_t pxCode, + void * pvParameters ) PRIVILEGED_FUNCTION; + #else + StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, + TaskFunction_t pxCode, + void * pvParameters ) PRIVILEGED_FUNCTION; + #endif +#endif /* if ( portUSING_MPU_WRAPPERS == 1 ) */ + +/* Used by heap_5.c to define the start address and size of each memory region + * that together comprise the total FreeRTOS heap space. */ +typedef struct HeapRegion +{ + uint8_t * pucStartAddress; + size_t xSizeInBytes; +} HeapRegion_t; + +/* Used to pass information about the heap out of vPortGetHeapStats(). */ +typedef struct xHeapStats +{ + size_t xAvailableHeapSpaceInBytes; /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */ + size_t xSizeOfLargestFreeBlockInBytes; /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */ + size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */ + size_t xNumberOfFreeBlocks; /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */ + size_t xMinimumEverFreeBytesRemaining; /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */ + size_t xNumberOfSuccessfulAllocations; /* The number of calls to pvPortMalloc() that have returned a valid memory block. */ + size_t xNumberOfSuccessfulFrees; /* The number of calls to vPortFree() that has successfully freed a block of memory. */ +} HeapStats_t; + +/* + * Used to define multiple heap regions for use by heap_5.c. This function + * must be called before any calls to pvPortMalloc() - not creating a task, + * queue, semaphore, mutex, software timer, event group, etc. will result in + * pvPortMalloc being called. + * + * pxHeapRegions passes in an array of HeapRegion_t structures - each of which + * defines a region of memory that can be used as the heap. The array is + * terminated by a HeapRegions_t structure that has a size of 0. The region + * with the lowest start address must appear first in the array. + */ +void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION; + +/* + * Returns a HeapStats_t structure filled with information about the current + * heap state. + */ +void vPortGetHeapStats( HeapStats_t * pxHeapStats ); + +/* + * Map to the memory management routines required for the port. + */ +void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION; +void vPortFree( void * pv ) PRIVILEGED_FUNCTION; +void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION; +size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION; +size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION; + +#if ( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 ) + void * pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION; + void vPortFreeStack( void * pv ) PRIVILEGED_FUNCTION; +#else + #define pvPortMallocStack pvPortMalloc + #define vPortFreeStack vPortFree +#endif + +/* + * Setup the hardware ready for the scheduler to take control. This generally + * sets up a tick interrupt and sets timers for the correct tick frequency. + */ +BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION; + +/* + * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so + * the hardware is left in its original condition after the scheduler stops + * executing. + */ +void vPortEndScheduler( void ) PRIVILEGED_FUNCTION; + +/* + * The structures and methods of manipulating the MPU are contained within the + * port layer. + * + * Fills the xMPUSettings structure with the memory region information + * contained in xRegions. + */ +#if ( portUSING_MPU_WRAPPERS == 1 ) + struct xMEMORY_REGION; + void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, + const struct xMEMORY_REGION * const xRegions, + StackType_t * pxBottomOfStack, + uint32_t ulStackDepth ) PRIVILEGED_FUNCTION; +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* PORTABLE_H */ diff --git a/freertos/cvitek/install/include/kernel/portmacro.h b/freertos/cvitek/install/include/kernel/portmacro.h new file mode 100644 index 000000000..438560939 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/portmacro.h @@ -0,0 +1,191 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#if __riscv_xlen == 64 + #define portSTACK_TYPE uint64_t + #define portBASE_TYPE long long + #define portUBASE_TYPE uint64_t + #define portMAX_DELAY ( TickType_t ) 0xffffffffffffffffUL + #define portPOINTER_SIZE_TYPE uint64_t +#elif __riscv_xlen == 32 + #define portSTACK_TYPE uint32_t + #define portBASE_TYPE int32_t + #define portUBASE_TYPE uint32_t + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL +#else + #error Assembler did not define __riscv_xlen +#endif + + +typedef portSTACK_TYPE StackType_t; +typedef portBASE_TYPE BaseType_t; +typedef portUBASE_TYPE UBaseType_t; +typedef portUBASE_TYPE TickType_t; + +/* Legacy type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short + +/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do +not need to be guarded with a critical section. */ +#define portTICK_TYPE_IS_ATOMIC 1 +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#ifdef __riscv64 + #error This is the RV32 port that has not yet been adapted for 64. + #define portBYTE_ALIGNMENT 16 +#else + #define portBYTE_ALIGNMENT 16 +#endif +/*-----------------------------------------------------------*/ + + +/* Scheduler utilities. */ +extern void vTaskSwitchContext( void ); +#define portYIELD() __asm volatile( "ecall" ); +#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) vTaskSwitchContext(); } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +/*-----------------------------------------------------------*/ + + +/* Critical section management. */ +#define portCRITICAL_NESTING_IN_TCB 1 +extern void vTaskEnterCritical( void ); +extern void vTaskExitCritical( void ); + +#define portSET_INTERRUPT_MASK_FROM_ISR() 0 +#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue +#define portDISABLE_INTERRUPTS() __asm volatile( "csrc mstatus, 8" ) +#define portENABLE_INTERRUPTS() __asm volatile( "csrs mstatus, 8" ) +#define portENTER_CRITICAL() vTaskEnterCritical() +#define portEXIT_CRITICAL() vTaskExitCritical() + +/*-----------------------------------------------------------*/ + +/* Architecture specific optimisations. */ +#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 +#endif + +#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 ) + + /* Check the configuration. */ + #if( configMAX_PRIORITIES > 32 ) + #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. + #endif + + /* Store/clear the ready priorities in a bit map. */ + #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) + #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) + + /*-----------------------------------------------------------*/ + + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - __builtin_clz( uxReadyPriorities ) ) + +#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ + + +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. These are +not necessary for to use this port. They are defined so the common demo files +(which build with all the ports) will build. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +/*-----------------------------------------------------------*/ + +#define portNOP() __asm volatile ( " nop " ) + +#define portINLINE __inline + +#ifndef portFORCE_INLINE + #define portFORCE_INLINE inline __attribute__(( always_inline)) +#endif + +#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) +/*-----------------------------------------------------------*/ + + +/* configCLINT_BASE_ADDRESS is a legacy definition that was replaced by the +configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions. For +backward compatibility derive the newer definitions from the old if the old +definition is found. */ +#if defined( configCLINT_BASE_ADDRESS ) && !defined( configMTIME_BASE_ADDRESS ) && ( configCLINT_BASE_ADDRESS == 0 ) + /* Legacy case where configCLINT_BASE_ADDRESS was defined as 0 to indicate + there was no CLINT. Equivalent now is to set the MTIME and MTIMECMP + addresses to 0. */ + #define configMTIME_BASE_ADDRESS ( 0 ) + #define configMTIMECMP_BASE_ADDRESS ( 0 ) +#elif defined( configCLINT_BASE_ADDRESS ) && !defined( configMTIME_BASE_ADDRESS ) + /* Legacy case where configCLINT_BASE_ADDRESS was set to the base address of + the CLINT. Equivalent now is to derive the MTIME and MTIMECMP addresses + from the CLINT address. */ + #define configMTIME_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0xBFF8UL ) + #define configMTIMECMP_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0x4000UL ) +#elif defined(THEAD_C906) + /* configMTIMECMP_BASE_ADDRESS is defined in FreeRTOSConfig.h & + * get mtime by rdcycle SPR + */ +#elif !defined( configMTIME_BASE_ADDRESS ) || !defined( configMTIMECMP_BASE_ADDRESS ) + #error configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. Set them to zero if there is no MTIME (machine time) clock. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html +#endif + + + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ + diff --git a/freertos/cvitek/install/include/kernel/projdefs.h b/freertos/cvitek/install/include/kernel/projdefs.h new file mode 100644 index 000000000..e623bf7d9 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/projdefs.h @@ -0,0 +1,122 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef PROJDEFS_H +#define PROJDEFS_H + +/* + * Defines the prototype to which task functions must conform. Defined in this + * file to ensure the type is known before portable.h is included. + */ +typedef void (* TaskFunction_t)( void * ); + +/* Converts a time in milliseconds to a time in ticks. This macro can be + * overridden by a macro of the same name defined in FreeRTOSConfig.h in case the + * definition here is not suitable for your application. */ +#ifndef pdMS_TO_TICKS + #define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000U ) ) +#endif + +#define pdFALSE ( ( BaseType_t ) 0 ) +#define pdTRUE ( ( BaseType_t ) 1 ) + +#define pdPASS ( pdTRUE ) +#define pdFAIL ( pdFALSE ) +#define errQUEUE_EMPTY ( ( BaseType_t ) 0 ) +#define errQUEUE_FULL ( ( BaseType_t ) 0 ) + +/* FreeRTOS error definitions. */ +#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) +#define errQUEUE_BLOCKED ( -4 ) +#define errQUEUE_YIELD ( -5 ) + +/* Macros used for basic data corruption checks. */ +#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES + #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0 +#endif + +#if ( configUSE_16_BIT_TICKS == 1 ) + #define pdINTEGRITY_CHECK_VALUE 0x5a5a +#else + #define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL +#endif + +/* The following errno values are used by FreeRTOS+ components, not FreeRTOS + * itself. */ +#define pdFREERTOS_ERRNO_NONE 0 /* No errors */ +#define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */ +#define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */ +#define pdFREERTOS_ERRNO_EIO 5 /* I/O error */ +#define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */ +#define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */ +#define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */ +#define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */ +#define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */ +#define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */ +#define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */ +#define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */ +#define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */ +#define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */ +#define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */ +#define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */ +#define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */ +#define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */ +#define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */ +#define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */ +#define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */ +#define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */ +#define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */ +#define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */ +#define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */ +#define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */ +#define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */ +#define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */ +#define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */ +#define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */ +#define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */ +#define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */ +#define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */ +#define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */ +#define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */ +#define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */ +#define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */ +#define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */ +#define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */ + +/* The following endian values are used by FreeRTOS+ components, not FreeRTOS + * itself. */ +#define pdFREERTOS_LITTLE_ENDIAN 0 +#define pdFREERTOS_BIG_ENDIAN 1 + +/* Re-defining endian values for generic naming. */ +#define pdLITTLE_ENDIAN pdFREERTOS_LITTLE_ENDIAN +#define pdBIG_ENDIAN pdFREERTOS_BIG_ENDIAN + + +#endif /* PROJDEFS_H */ diff --git a/freertos/cvitek/install/include/kernel/queue.h b/freertos/cvitek/install/include/kernel/queue.h new file mode 100644 index 000000000..6a92b6bcb --- /dev/null +++ b/freertos/cvitek/install/include/kernel/queue.h @@ -0,0 +1,1722 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +#ifndef QUEUE_H +#define QUEUE_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h" must appear in source files before "include queue.h" +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +#include "task.h" + +/** + * Type by which queues are referenced. For example, a call to xQueueCreate() + * returns an QueueHandle_t variable that can then be used as a parameter to + * xQueueSend(), xQueueReceive(), etc. + */ +struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */ +typedef struct QueueDefinition * QueueHandle_t; + +/** + * Type by which queue sets are referenced. For example, a call to + * xQueueCreateSet() returns an xQueueSet variable that can then be used as a + * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc. + */ +typedef struct QueueDefinition * QueueSetHandle_t; + +/** + * Queue sets can contain both queues and semaphores, so the + * QueueSetMemberHandle_t is defined as a type to be used where a parameter or + * return value can be either an QueueHandle_t or an SemaphoreHandle_t. + */ +typedef struct QueueDefinition * QueueSetMemberHandle_t; + +/* For internal use only. */ +#define queueSEND_TO_BACK ( ( BaseType_t ) 0 ) +#define queueSEND_TO_FRONT ( ( BaseType_t ) 1 ) +#define queueOVERWRITE ( ( BaseType_t ) 2 ) + +/* For internal use only. These definitions *must* match those in queue.c. */ +#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U ) +#define queueQUEUE_TYPE_SET ( ( uint8_t ) 0U ) +#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U ) +#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U ) +#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U ) +#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U ) + +/** + * queue. h + * @code{c} + * QueueHandle_t xQueueCreate( + * UBaseType_t uxQueueLength, + * UBaseType_t uxItemSize + * ); + * @endcode + * + * Creates a new queue instance, and returns a handle by which the new queue + * can be referenced. + * + * Internally, within the FreeRTOS implementation, queues use two blocks of + * memory. The first block is used to hold the queue's data structures. The + * second block is used to hold items placed into the queue. If a queue is + * created using xQueueCreate() then both blocks of memory are automatically + * dynamically allocated inside the xQueueCreate() function. (see + * https://www.FreeRTOS.org/a00111.html). If a queue is created using + * xQueueCreateStatic() then the application writer must provide the memory that + * will get used by the queue. xQueueCreateStatic() therefore allows a queue to + * be created without using any dynamic memory allocation. + * + * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html + * + * @param uxQueueLength The maximum number of items that the queue can contain. + * + * @param uxItemSize The number of bytes each item in the queue will require. + * Items are queued by copy, not by reference, so this is the number of bytes + * that will be copied for each posted item. Each item on the queue must be + * the same size. + * + * @return If the queue is successfully create then a handle to the newly + * created queue is returned. If the queue cannot be created then 0 is + * returned. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * }; + * + * void vATask( void *pvParameters ) + * { + * QueueHandle_t xQueue1, xQueue2; + * + * // Create a queue capable of containing 10 uint32_t values. + * xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + * if( xQueue1 == 0 ) + * { + * // Queue was not created and must not be used. + * } + * + * // Create a queue capable of containing 10 pointers to AMessage structures. + * // These should be passed by pointer as they contain a lot of data. + * xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + * if( xQueue2 == 0 ) + * { + * // Queue was not created and must not be used. + * } + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueueCreate xQueueCreate + * \ingroup QueueManagement + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) ) +#endif + +/** + * queue. h + * @code{c} + * QueueHandle_t xQueueCreateStatic( + * UBaseType_t uxQueueLength, + * UBaseType_t uxItemSize, + * uint8_t *pucQueueStorage, + * StaticQueue_t *pxQueueBuffer + * ); + * @endcode + * + * Creates a new queue instance, and returns a handle by which the new queue + * can be referenced. + * + * Internally, within the FreeRTOS implementation, queues use two blocks of + * memory. The first block is used to hold the queue's data structures. The + * second block is used to hold items placed into the queue. If a queue is + * created using xQueueCreate() then both blocks of memory are automatically + * dynamically allocated inside the xQueueCreate() function. (see + * https://www.FreeRTOS.org/a00111.html). If a queue is created using + * xQueueCreateStatic() then the application writer must provide the memory that + * will get used by the queue. xQueueCreateStatic() therefore allows a queue to + * be created without using any dynamic memory allocation. + * + * https://www.FreeRTOS.org/Embedded-RTOS-Queues.html + * + * @param uxQueueLength The maximum number of items that the queue can contain. + * + * @param uxItemSize The number of bytes each item in the queue will require. + * Items are queued by copy, not by reference, so this is the number of bytes + * that will be copied for each posted item. Each item on the queue must be + * the same size. + * + * @param pucQueueStorage If uxItemSize is not zero then + * pucQueueStorage must point to a uint8_t array that is at least large + * enough to hold the maximum number of items that can be in the queue at any + * one time - which is ( uxQueueLength * uxItemsSize ) bytes. If uxItemSize is + * zero then pucQueueStorage can be NULL. + * + * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which + * will be used to hold the queue's data structure. + * + * @return If the queue is created then a handle to the created queue is + * returned. If pxQueueBuffer is NULL then NULL is returned. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * }; + * + #define QUEUE_LENGTH 10 + #define ITEM_SIZE sizeof( uint32_t ) + * + * // xQueueBuffer will hold the queue structure. + * StaticQueue_t xQueueBuffer; + * + * // ucQueueStorage will hold the items posted to the queue. Must be at least + * // [(queue length) * ( queue item size)] bytes long. + * uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ]; + * + * void vATask( void *pvParameters ) + * { + * QueueHandle_t xQueue1; + * + * // Create a queue capable of containing 10 uint32_t values. + * xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold. + * ITEM_SIZE // The size of each item in the queue + * &( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue. + * &xQueueBuffer ); // The buffer that will hold the queue structure. + * + * // The queue is guaranteed to be created successfully as no dynamic memory + * // allocation is used. Therefore xQueue1 is now a handle to a valid queue. + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueueCreateStatic xQueueCreateStatic + * \ingroup QueueManagement + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * queue. h + * @code{c} + * BaseType_t xQueueSendToToFront( + * QueueHandle_t xQueue, + * const void *pvItemToQueue, + * TickType_t xTicksToWait + * ); + * @endcode + * + * Post an item to the front of a queue. The item is queued by copy, not by + * reference. This function must not be called from an interrupt service + * routine. See xQueueSendFromISR () for an alternative which may be used + * in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the + * queue is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * } xMessage; + * + * uint32_t ulVar = 10UL; + * + * void vATask( void *pvParameters ) + * { + * QueueHandle_t xQueue1, xQueue2; + * struct AMessage *pxMessage; + * + * // Create a queue capable of containing 10 uint32_t values. + * xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + * + * // Create a queue capable of containing 10 pointers to AMessage structures. + * // These should be passed by pointer as they contain a lot of data. + * xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + * + * // ... + * + * if( xQueue1 != 0 ) + * { + * // Send an uint32_t. Wait for 10 ticks for space to become + * // available if necessary. + * if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS ) + * { + * // Failed to post the message, even after 10 ticks. + * } + * } + * + * if( xQueue2 != 0 ) + * { + * // Send a pointer to a struct AMessage object. Don't block if the + * // queue is already full. + * pxMessage = & xMessage; + * xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 ); + * } + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) \ + xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT ) + +/** + * queue. h + * @code{c} + * BaseType_t xQueueSendToBack( + * QueueHandle_t xQueue, + * const void *pvItemToQueue, + * TickType_t xTicksToWait + * ); + * @endcode + * + * This is a macro that calls xQueueGenericSend(). + * + * Post an item to the back of a queue. The item is queued by copy, not by + * reference. This function must not be called from an interrupt service + * routine. See xQueueSendFromISR () for an alternative which may be used + * in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the queue + * is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * } xMessage; + * + * uint32_t ulVar = 10UL; + * + * void vATask( void *pvParameters ) + * { + * QueueHandle_t xQueue1, xQueue2; + * struct AMessage *pxMessage; + * + * // Create a queue capable of containing 10 uint32_t values. + * xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + * + * // Create a queue capable of containing 10 pointers to AMessage structures. + * // These should be passed by pointer as they contain a lot of data. + * xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + * + * // ... + * + * if( xQueue1 != 0 ) + * { + * // Send an uint32_t. Wait for 10 ticks for space to become + * // available if necessary. + * if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS ) + * { + * // Failed to post the message, even after 10 ticks. + * } + * } + * + * if( xQueue2 != 0 ) + * { + * // Send a pointer to a struct AMessage object. Don't block if the + * // queue is already full. + * pxMessage = & xMessage; + * xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 ); + * } + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) \ + xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) + +/** + * queue. h + * @code{c} + * BaseType_t xQueueSend( + * QueueHandle_t xQueue, + * const void * pvItemToQueue, + * TickType_t xTicksToWait + * ); + * @endcode + * + * This is a macro that calls xQueueGenericSend(). It is included for + * backward compatibility with versions of FreeRTOS.org that did not + * include the xQueueSendToFront() and xQueueSendToBack() macros. It is + * equivalent to xQueueSendToBack(). + * + * Post an item on a queue. The item is queued by copy, not by reference. + * This function must not be called from an interrupt service routine. + * See xQueueSendFromISR () for an alternative which may be used in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the + * queue is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * } xMessage; + * + * uint32_t ulVar = 10UL; + * + * void vATask( void *pvParameters ) + * { + * QueueHandle_t xQueue1, xQueue2; + * struct AMessage *pxMessage; + * + * // Create a queue capable of containing 10 uint32_t values. + * xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + * + * // Create a queue capable of containing 10 pointers to AMessage structures. + * // These should be passed by pointer as they contain a lot of data. + * xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + * + * // ... + * + * if( xQueue1 != 0 ) + * { + * // Send an uint32_t. Wait for 10 ticks for space to become + * // available if necessary. + * if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS ) + * { + * // Failed to post the message, even after 10 ticks. + * } + * } + * + * if( xQueue2 != 0 ) + * { + * // Send a pointer to a struct AMessage object. Don't block if the + * // queue is already full. + * pxMessage = & xMessage; + * xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 ); + * } + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) \ + xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) + +/** + * queue. h + * @code{c} + * BaseType_t xQueueOverwrite( + * QueueHandle_t xQueue, + * const void * pvItemToQueue + * ); + * @endcode + * + * Only for use with queues that have a length of one - so the queue is either + * empty or full. + * + * Post an item on a queue. If the queue is already full then overwrite the + * value held in the queue. The item is queued by copy, not by reference. + * + * This function must not be called from an interrupt service routine. + * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR. + * + * @param xQueue The handle of the queue to which the data is being sent. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and + * therefore has the same return values as xQueueSendToFront(). However, pdPASS + * is the only value that can be returned because xQueueOverwrite() will write + * to the queue even when the queue is already full. + * + * Example usage: + * @code{c} + * + * void vFunction( void *pvParameters ) + * { + * QueueHandle_t xQueue; + * uint32_t ulVarToSend, ulValReceived; + * + * // Create a queue to hold one uint32_t value. It is strongly + * // recommended *not* to use xQueueOverwrite() on queues that can + * // contain more than one value, and doing so will trigger an assertion + * // if configASSERT() is defined. + * xQueue = xQueueCreate( 1, sizeof( uint32_t ) ); + * + * // Write the value 10 to the queue using xQueueOverwrite(). + * ulVarToSend = 10; + * xQueueOverwrite( xQueue, &ulVarToSend ); + * + * // Peeking the queue should now return 10, but leave the value 10 in + * // the queue. A block time of zero is used as it is known that the + * // queue holds a value. + * ulValReceived = 0; + * xQueuePeek( xQueue, &ulValReceived, 0 ); + * + * if( ulValReceived != 10 ) + * { + * // Error unless the item was removed by a different task. + * } + * + * // The queue is still full. Use xQueueOverwrite() to overwrite the + * // value held in the queue with 100. + * ulVarToSend = 100; + * xQueueOverwrite( xQueue, &ulVarToSend ); + * + * // This time read from the queue, leaving the queue empty once more. + * // A block time of 0 is used again. + * xQueueReceive( xQueue, &ulValReceived, 0 ); + * + * // The value read should be the last value written, even though the + * // queue was already full when the value was written. + * if( ulValReceived != 100 ) + * { + * // Error! + * } + * + * // ... + * } + * @endcode + * \defgroup xQueueOverwrite xQueueOverwrite + * \ingroup QueueManagement + */ +#define xQueueOverwrite( xQueue, pvItemToQueue ) \ + xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE ) + + +/** + * queue. h + * @code{c} + * BaseType_t xQueueGenericSend( + * QueueHandle_t xQueue, + * const void * pvItemToQueue, + * TickType_t xTicksToWait + * BaseType_t xCopyPosition + * ); + * @endcode + * + * It is preferred that the macros xQueueSend(), xQueueSendToFront() and + * xQueueSendToBack() are used in place of calling this function directly. + * + * Post an item on a queue. The item is queued by copy, not by reference. + * This function must not be called from an interrupt service routine. + * See xQueueSendFromISR () for an alternative which may be used in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the + * queue is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the + * item at the back of the queue, or queueSEND_TO_FRONT to place the item + * at the front of the queue (for high priority messages). + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * } xMessage; + * + * uint32_t ulVar = 10UL; + * + * void vATask( void *pvParameters ) + * { + * QueueHandle_t xQueue1, xQueue2; + * struct AMessage *pxMessage; + * + * // Create a queue capable of containing 10 uint32_t values. + * xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + * + * // Create a queue capable of containing 10 pointers to AMessage structures. + * // These should be passed by pointer as they contain a lot of data. + * xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + * + * // ... + * + * if( xQueue1 != 0 ) + * { + * // Send an uint32_t. Wait for 10 ticks for space to become + * // available if necessary. + * if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS ) + * { + * // Failed to post the message, even after 10 ticks. + * } + * } + * + * if( xQueue2 != 0 ) + * { + * // Send a pointer to a struct AMessage object. Don't block if the + * // queue is already full. + * pxMessage = & xMessage; + * xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK ); + * } + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +BaseType_t xQueueGenericSend( QueueHandle_t xQueue, + const void * const pvItemToQueue, + TickType_t xTicksToWait, + const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * BaseType_t xQueuePeek( + * QueueHandle_t xQueue, + * void * const pvBuffer, + * TickType_t xTicksToWait + * ); + * @endcode + * + * Receive an item from a queue without removing the item from the queue. + * The item is received by copy so a buffer of adequate size must be + * provided. The number of bytes copied into the buffer was defined when + * the queue was created. + * + * Successfully received items remain on the queue so will be returned again + * by the next call, or a call to xQueueReceive(). + * + * This macro must not be used in an interrupt service routine. See + * xQueuePeekFromISR() for an alternative that can be called from an interrupt + * service routine. + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for an item to receive should the queue be empty at the time + * of the call. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue + * is empty. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * } xMessage; + * + * QueueHandle_t xQueue; + * + * // Task to create a queue and post a value. + * void vATask( void *pvParameters ) + * { + * struct AMessage *pxMessage; + * + * // Create a queue capable of containing 10 pointers to AMessage structures. + * // These should be passed by pointer as they contain a lot of data. + * xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) ); + * if( xQueue == 0 ) + * { + * // Failed to create the queue. + * } + * + * // ... + * + * // Send a pointer to a struct AMessage object. Don't block if the + * // queue is already full. + * pxMessage = & xMessage; + * xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 ); + * + * // ... Rest of task code. + * } + * + * // Task to peek the data from the queue. + * void vADifferentTask( void *pvParameters ) + * { + * struct AMessage *pxRxedMessage; + * + * if( xQueue != 0 ) + * { + * // Peek a message on the created queue. Block for 10 ticks if a + * // message is not immediately available. + * if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) ) + * { + * // pcRxedMessage now points to the struct AMessage variable posted + * // by vATask, but the item still remains on the queue. + * } + * } + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueuePeek xQueuePeek + * \ingroup QueueManagement + */ +BaseType_t xQueuePeek( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * BaseType_t xQueuePeekFromISR( + * QueueHandle_t xQueue, + * void *pvBuffer, + * ); + * @endcode + * + * A version of xQueuePeek() that can be called from an interrupt service + * routine (ISR). + * + * Receive an item from a queue without removing the item from the queue. + * The item is received by copy so a buffer of adequate size must be + * provided. The number of bytes copied into the buffer was defined when + * the queue was created. + * + * Successfully received items remain on the queue so will be returned again + * by the next call, or a call to xQueueReceive(). + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * \defgroup xQueuePeekFromISR xQueuePeekFromISR + * \ingroup QueueManagement + */ +BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, + void * const pvBuffer ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * BaseType_t xQueueReceive( + * QueueHandle_t xQueue, + * void *pvBuffer, + * TickType_t xTicksToWait + * ); + * @endcode + * + * Receive an item from a queue. The item is received by copy so a buffer of + * adequate size must be provided. The number of bytes copied into the buffer + * was defined when the queue was created. + * + * Successfully received items are removed from the queue. + * + * This function must not be used in an interrupt service routine. See + * xQueueReceiveFromISR for an alternative that can. + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for an item to receive should the queue be empty at the time + * of the call. xQueueReceive() will return immediately if xTicksToWait + * is zero and the queue is empty. The time is defined in tick periods so the + * constant portTICK_PERIOD_MS should be used to convert to real time if this is + * required. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * Example usage: + * @code{c} + * struct AMessage + * { + * char ucMessageID; + * char ucData[ 20 ]; + * } xMessage; + * + * QueueHandle_t xQueue; + * + * // Task to create a queue and post a value. + * void vATask( void *pvParameters ) + * { + * struct AMessage *pxMessage; + * + * // Create a queue capable of containing 10 pointers to AMessage structures. + * // These should be passed by pointer as they contain a lot of data. + * xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) ); + * if( xQueue == 0 ) + * { + * // Failed to create the queue. + * } + * + * // ... + * + * // Send a pointer to a struct AMessage object. Don't block if the + * // queue is already full. + * pxMessage = & xMessage; + * xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 ); + * + * // ... Rest of task code. + * } + * + * // Task to receive from the queue. + * void vADifferentTask( void *pvParameters ) + * { + * struct AMessage *pxRxedMessage; + * + * if( xQueue != 0 ) + * { + * // Receive a message on the created queue. Block for 10 ticks if a + * // message is not immediately available. + * if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) ) + * { + * // pcRxedMessage now points to the struct AMessage variable posted + * // by vATask. + * } + * } + * + * // ... Rest of task code. + * } + * @endcode + * \defgroup xQueueReceive xQueueReceive + * \ingroup QueueManagement + */ +BaseType_t xQueueReceive( QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ); + * @endcode + * + * Return the number of messages stored in a queue. + * + * @param xQueue A handle to the queue being queried. + * + * @return The number of messages available in the queue. + * + * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting + * \ingroup QueueManagement + */ +UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ); + * @endcode + * + * Return the number of free spaces available in a queue. This is equal to the + * number of items that can be sent to the queue before the queue becomes full + * if no items are removed. + * + * @param xQueue A handle to the queue being queried. + * + * @return The number of spaces available in the queue. + * + * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting + * \ingroup QueueManagement + */ +UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * void vQueueDelete( QueueHandle_t xQueue ); + * @endcode + * + * Delete a queue - freeing all the memory allocated for storing of items + * placed on the queue. + * + * @param xQueue A handle to the queue to be deleted. + * + * \defgroup vQueueDelete vQueueDelete + * \ingroup QueueManagement + */ +void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * BaseType_t xQueueSendToFrontFromISR( + * QueueHandle_t xQueue, + * const void *pvItemToQueue, + * BaseType_t *pxHigherPriorityTaskWoken + * ); + * @endcode + * + * This is a macro that calls xQueueGenericSendFromISR(). + * + * Post an item to the front of a queue. It is safe to use this macro from + * within an interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueSendToFromFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): + * @code{c} + * void vBufferISR( void ) + * { + * char cIn; + * BaseType_t xHigherPrioritTaskWoken; + * + * // We have not woken a task at the start of the ISR. + * xHigherPriorityTaskWoken = pdFALSE; + * + * // Loop until the buffer is empty. + * do + * { + * // Obtain a byte from the buffer. + * cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + * + * // Post the byte. + * xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken ); + * + * } while( portINPUT_BYTE( BUFFER_COUNT ) ); + * + * // Now the buffer is empty we can switch context if necessary. + * if( xHigherPriorityTaskWoken ) + * { + * taskYIELD (); + * } + * } + * @endcode + * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \ + xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT ) + + +/** + * queue. h + * @code{c} + * BaseType_t xQueueSendToBackFromISR( + * QueueHandle_t xQueue, + * const void *pvItemToQueue, + * BaseType_t *pxHigherPriorityTaskWoken + * ); + * @endcode + * + * This is a macro that calls xQueueGenericSendFromISR(). + * + * Post an item to the back of a queue. It is safe to use this macro from + * within an interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): + * @code{c} + * void vBufferISR( void ) + * { + * char cIn; + * BaseType_t xHigherPriorityTaskWoken; + * + * // We have not woken a task at the start of the ISR. + * xHigherPriorityTaskWoken = pdFALSE; + * + * // Loop until the buffer is empty. + * do + * { + * // Obtain a byte from the buffer. + * cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + * + * // Post the byte. + * xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken ); + * + * } while( portINPUT_BYTE( BUFFER_COUNT ) ); + * + * // Now the buffer is empty we can switch context if necessary. + * if( xHigherPriorityTaskWoken ) + * { + * taskYIELD (); + * } + * } + * @endcode + * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \ + xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) + +/** + * queue. h + * @code{c} + * BaseType_t xQueueOverwriteFromISR( + * QueueHandle_t xQueue, + * const void * pvItemToQueue, + * BaseType_t *pxHigherPriorityTaskWoken + * ); + * @endcode + * + * A version of xQueueOverwrite() that can be used in an interrupt service + * routine (ISR). + * + * Only for use with queues that can hold a single item - so the queue is either + * empty or full. + * + * Post an item on a queue. If the queue is already full then overwrite the + * value held in the queue. The item is queued by copy, not by reference. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueOverwriteFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return xQueueOverwriteFromISR() is a macro that calls + * xQueueGenericSendFromISR(), and therefore has the same return values as + * xQueueSendToFrontFromISR(). However, pdPASS is the only value that can be + * returned because xQueueOverwriteFromISR() will write to the queue even when + * the queue is already full. + * + * Example usage: + * @code{c} + * + * QueueHandle_t xQueue; + * + * void vFunction( void *pvParameters ) + * { + * // Create a queue to hold one uint32_t value. It is strongly + * // recommended *not* to use xQueueOverwriteFromISR() on queues that can + * // contain more than one value, and doing so will trigger an assertion + * // if configASSERT() is defined. + * xQueue = xQueueCreate( 1, sizeof( uint32_t ) ); + * } + * + * void vAnInterruptHandler( void ) + * { + * // xHigherPriorityTaskWoken must be set to pdFALSE before it is used. + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * uint32_t ulVarToSend, ulValReceived; + * + * // Write the value 10 to the queue using xQueueOverwriteFromISR(). + * ulVarToSend = 10; + * xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken ); + * + * // The queue is full, but calling xQueueOverwriteFromISR() again will still + * // pass because the value held in the queue will be overwritten with the + * // new value. + * ulVarToSend = 100; + * xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken ); + * + * // Reading from the queue will now return 100. + * + * // ... + * + * if( xHigherPrioritytaskWoken == pdTRUE ) + * { + * // Writing to the queue caused a task to unblock and the unblocked task + * // has a priority higher than or equal to the priority of the currently + * // executing task (the task this interrupt interrupted). Perform a context + * // switch so this interrupt returns directly to the unblocked task. + * portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port. + * } + * } + * @endcode + * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR + * \ingroup QueueManagement + */ +#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \ + xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE ) + +/** + * queue. h + * @code{c} + * BaseType_t xQueueSendFromISR( + * QueueHandle_t xQueue, + * const void *pvItemToQueue, + * BaseType_t *pxHigherPriorityTaskWoken + * ); + * @endcode + * + * This is a macro that calls xQueueGenericSendFromISR(). It is included + * for backward compatibility with versions of FreeRTOS.org that did not + * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR() + * macros. + * + * Post an item to the back of a queue. It is safe to use this function from + * within an interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueSendFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): + * @code{c} + * void vBufferISR( void ) + * { + * char cIn; + * BaseType_t xHigherPriorityTaskWoken; + * + * // We have not woken a task at the start of the ISR. + * xHigherPriorityTaskWoken = pdFALSE; + * + * // Loop until the buffer is empty. + * do + * { + * // Obtain a byte from the buffer. + * cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + * + * // Post the byte. + * xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken ); + * + * } while( portINPUT_BYTE( BUFFER_COUNT ) ); + * + * // Now the buffer is empty we can switch context if necessary. + * if( xHigherPriorityTaskWoken ) + * { + * // Actual macro used here is port specific. + * portYIELD_FROM_ISR (); + * } + * } + * @endcode + * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \ + xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) + +/** + * queue. h + * @code{c} + * BaseType_t xQueueGenericSendFromISR( + * QueueHandle_t xQueue, + * const void *pvItemToQueue, + * BaseType_t *pxHigherPriorityTaskWoken, + * BaseType_t xCopyPosition + * ); + * @endcode + * + * It is preferred that the macros xQueueSendFromISR(), + * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place + * of calling this function directly. xQueueGiveFromISR() is an + * equivalent for use by semaphores that don't actually copy any data. + * + * Post an item on a queue. It is safe to use this function from within an + * interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueGenericSendFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the + * item at the back of the queue, or queueSEND_TO_FRONT to place the item + * at the front of the queue (for high priority messages). + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): + * @code{c} + * void vBufferISR( void ) + * { + * char cIn; + * BaseType_t xHigherPriorityTaskWokenByPost; + * + * // We have not woken a task at the start of the ISR. + * xHigherPriorityTaskWokenByPost = pdFALSE; + * + * // Loop until the buffer is empty. + * do + * { + * // Obtain a byte from the buffer. + * cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + * + * // Post each byte. + * xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK ); + * + * } while( portINPUT_BYTE( BUFFER_COUNT ) ); + * + * // Now the buffer is empty we can switch context if necessary. Note that the + * // name of the yield function required is port specific. + * if( xHigherPriorityTaskWokenByPost ) + * { + * portYIELD_FROM_ISR(); + * } + * } + * @endcode + * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, + const void * const pvItemToQueue, + BaseType_t * const pxHigherPriorityTaskWoken, + const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; +BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, + BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * queue. h + * @code{c} + * BaseType_t xQueueReceiveFromISR( + * QueueHandle_t xQueue, + * void *pvBuffer, + * BaseType_t *pxTaskWoken + * ); + * @endcode + * + * Receive an item from a queue. It is safe to use this function from within an + * interrupt service routine. + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @param pxTaskWoken A task may be blocked waiting for space to become + * available on the queue. If xQueueReceiveFromISR causes such a task to + * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will + * remain unchanged. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * Example usage: + * @code{c} + * + * QueueHandle_t xQueue; + * + * // Function to create a queue and post some values. + * void vAFunction( void *pvParameters ) + * { + * char cValueToPost; + * const TickType_t xTicksToWait = ( TickType_t )0xff; + * + * // Create a queue capable of containing 10 characters. + * xQueue = xQueueCreate( 10, sizeof( char ) ); + * if( xQueue == 0 ) + * { + * // Failed to create the queue. + * } + * + * // ... + * + * // Post some characters that will be used within an ISR. If the queue + * // is full then this task will block for xTicksToWait ticks. + * cValueToPost = 'a'; + * xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait ); + * cValueToPost = 'b'; + * xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait ); + * + * // ... keep posting characters ... this task may block when the queue + * // becomes full. + * + * cValueToPost = 'c'; + * xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait ); + * } + * + * // ISR that outputs all the characters received on the queue. + * void vISR_Routine( void ) + * { + * BaseType_t xTaskWokenByReceive = pdFALSE; + * char cRxedChar; + * + * while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) ) + * { + * // A character was received. Output the character now. + * vOutputCharacter( cRxedChar ); + * + * // If removing the character from the queue woke the task that was + * // posting onto the queue cTaskWokenByReceive will have been set to + * // pdTRUE. No matter how many times this loop iterates only one + * // task will be woken. + * } + * + * if( cTaskWokenByPost != ( char ) pdFALSE; + * { + * taskYIELD (); + * } + * } + * @endcode + * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR + * \ingroup QueueManagement + */ +BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, + void * const pvBuffer, + BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/* + * Utilities to query queues that are safe to use from an ISR. These utilities + * should be used only from witin an ISR, or within a critical section. + */ +BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/* + * The functions defined above are for passing data to and from tasks. The + * functions below are the equivalents for passing data to and from + * co-routines. + * + * These functions are called from the co-routine macro implementation and + * should not be called directly from application code. Instead use the macro + * wrappers defined within croutine.h. + */ +BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, + const void * pvItemToQueue, + BaseType_t xCoRoutinePreviouslyWoken ); +BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, + void * pvBuffer, + BaseType_t * pxTaskWoken ); +BaseType_t xQueueCRSend( QueueHandle_t xQueue, + const void * pvItemToQueue, + TickType_t xTicksToWait ); +BaseType_t xQueueCRReceive( QueueHandle_t xQueue, + void * pvBuffer, + TickType_t xTicksToWait ); + +/* + * For internal use only. Use xSemaphoreCreateMutex(), + * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling + * these functions directly. + */ +QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; +QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, + StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION; +QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, + const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION; +QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, + const UBaseType_t uxInitialCount, + StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION; +BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION; +TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION; + +/* + * For internal use only. Use xSemaphoreTakeMutexRecursive() or + * xSemaphoreGiveMutexRecursive() instead of calling these functions directly. + */ +BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION; + +/* + * Reset a queue back to its original empty state. The return value is now + * obsolete and is always set to pdPASS. + */ +#define xQueueReset( xQueue ) xQueueGenericReset( xQueue, pdFALSE ) + +/* + * The registry is provided as a means for kernel aware debuggers to + * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add + * a queue, semaphore or mutex handle to the registry if you want the handle + * to be available to a kernel aware debugger. If you are not using a kernel + * aware debugger then this function can be ignored. + * + * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the + * registry can hold. configQUEUE_REGISTRY_SIZE must be greater than 0 + * within FreeRTOSConfig.h for the registry to be available. Its value + * does not effect the number of queues, semaphores and mutexes that can be + * created - just the number that the registry can hold. + * + * If vQueueAddToRegistry is called more than once with the same xQueue + * parameter, the registry will store the pcQueueName parameter from the + * most recent call to vQueueAddToRegistry. + * + * @param xQueue The handle of the queue being added to the registry. This + * is the handle returned by a call to xQueueCreate(). Semaphore and mutex + * handles can also be passed in here. + * + * @param pcQueueName The name to be associated with the handle. This is the + * name that the kernel aware debugger will display. The queue registry only + * stores a pointer to the string - so the string must be persistent (global or + * preferably in ROM/Flash), not on the stack. + */ +#if ( configQUEUE_REGISTRY_SIZE > 0 ) + void vQueueAddToRegistry( QueueHandle_t xQueue, + const char * pcQueueName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ +#endif + +/* + * The registry is provided as a means for kernel aware debuggers to + * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add + * a queue, semaphore or mutex handle to the registry if you want the handle + * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to + * remove the queue, semaphore or mutex from the register. If you are not using + * a kernel aware debugger then this function can be ignored. + * + * @param xQueue The handle of the queue being removed from the registry. + */ +#if ( configQUEUE_REGISTRY_SIZE > 0 ) + void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +#endif + +/* + * The queue registry is provided as a means for kernel aware debuggers to + * locate queues, semaphores and mutexes. Call pcQueueGetName() to look + * up and return the name of a queue in the queue registry from the queue's + * handle. + * + * @param xQueue The handle of the queue the name of which will be returned. + * @return If the queue is in the registry then a pointer to the name of the + * queue is returned. If the queue is not in the registry then NULL is + * returned. + */ +#if ( configQUEUE_REGISTRY_SIZE > 0 ) + const char * pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ +#endif + +/* + * Generic version of the function used to create a queue using dynamic memory + * allocation. This is called by other functions and macros that create other + * RTOS objects that use the queue structure as their base. + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; +#endif + +/* + * Generic version of the function used to create a queue using dynamic memory + * allocation. This is called by other functions and macros that create other + * RTOS objects that use the queue structure as their base. + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, + const UBaseType_t uxItemSize, + uint8_t * pucQueueStorage, + StaticQueue_t * pxStaticQueue, + const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; +#endif + +/* + * Queue sets provide a mechanism to allow a task to block (pend) on a read + * operation from multiple queues or semaphores simultaneously. + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * A queue set must be explicitly created using a call to xQueueCreateSet() + * before it can be used. Once created, standard FreeRTOS queues and semaphores + * can be added to the set using calls to xQueueAddToSet(). + * xQueueSelectFromSet() is then used to determine which, if any, of the queues + * or semaphores contained in the set is in a state where a queue read or + * semaphore take operation would be successful. + * + * Note 1: See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html + * for reasons why queue sets are very rarely needed in practice as there are + * simpler methods of blocking on multiple objects. + * + * Note 2: Blocking on a queue set that contains a mutex will not cause the + * mutex holder to inherit the priority of the blocked task. + * + * Note 3: An additional 4 bytes of RAM is required for each space in a every + * queue added to a queue set. Therefore counting semaphores that have a high + * maximum count value should not be added to a queue set. + * + * Note 4: A receive (in the case of a queue) or take (in the case of a + * semaphore) operation must not be performed on a member of a queue set unless + * a call to xQueueSelectFromSet() has first returned a handle to that set member. + * + * @param uxEventQueueLength Queue sets store events that occur on + * the queues and semaphores contained in the set. uxEventQueueLength specifies + * the maximum number of events that can be queued at once. To be absolutely + * certain that events are not lost uxEventQueueLength should be set to the + * total sum of the length of the queues added to the set, where binary + * semaphores and mutexes have a length of 1, and counting semaphores have a + * length set by their maximum count value. Examples: + * + If a queue set is to hold a queue of length 5, another queue of length 12, + * and a binary semaphore, then uxEventQueueLength should be set to + * (5 + 12 + 1), or 18. + * + If a queue set is to hold three binary semaphores then uxEventQueueLength + * should be set to (1 + 1 + 1 ), or 3. + * + If a queue set is to hold a counting semaphore that has a maximum count of + * 5, and a counting semaphore that has a maximum count of 3, then + * uxEventQueueLength should be set to (5 + 3), or 8. + * + * @return If the queue set is created successfully then a handle to the created + * queue set is returned. Otherwise NULL is returned. + */ +QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION; + +/* + * Adds a queue or semaphore to a queue set that was previously created by a + * call to xQueueCreateSet(). + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * Note 1: A receive (in the case of a queue) or take (in the case of a + * semaphore) operation must not be performed on a member of a queue set unless + * a call to xQueueSelectFromSet() has first returned a handle to that set member. + * + * @param xQueueOrSemaphore The handle of the queue or semaphore being added to + * the queue set (cast to an QueueSetMemberHandle_t type). + * + * @param xQueueSet The handle of the queue set to which the queue or semaphore + * is being added. + * + * @return If the queue or semaphore was successfully added to the queue set + * then pdPASS is returned. If the queue could not be successfully added to the + * queue set because it is already a member of a different queue set then pdFAIL + * is returned. + */ +BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; + +/* + * Removes a queue or semaphore from a queue set. A queue or semaphore can only + * be removed from a set if the queue or semaphore is empty. + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * @param xQueueOrSemaphore The handle of the queue or semaphore being removed + * from the queue set (cast to an QueueSetMemberHandle_t type). + * + * @param xQueueSet The handle of the queue set in which the queue or semaphore + * is included. + * + * @return If the queue or semaphore was successfully removed from the queue set + * then pdPASS is returned. If the queue was not in the queue set, or the + * queue (or semaphore) was not empty, then pdFAIL is returned. + */ +BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, + QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; + +/* + * xQueueSelectFromSet() selects from the members of a queue set a queue or + * semaphore that either contains data (in the case of a queue) or is available + * to take (in the case of a semaphore). xQueueSelectFromSet() effectively + * allows a task to block (pend) on a read operation on all the queues and + * semaphores in a queue set simultaneously. + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * Note 1: See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html + * for reasons why queue sets are very rarely needed in practice as there are + * simpler methods of blocking on multiple objects. + * + * Note 2: Blocking on a queue set that contains a mutex will not cause the + * mutex holder to inherit the priority of the blocked task. + * + * Note 3: A receive (in the case of a queue) or take (in the case of a + * semaphore) operation must not be performed on a member of a queue set unless + * a call to xQueueSelectFromSet() has first returned a handle to that set member. + * + * @param xQueueSet The queue set on which the task will (potentially) block. + * + * @param xTicksToWait The maximum time, in ticks, that the calling task will + * remain in the Blocked state (with other tasks executing) to wait for a member + * of the queue set to be ready for a successful queue read or semaphore take + * operation. + * + * @return xQueueSelectFromSet() will return the handle of a queue (cast to + * a QueueSetMemberHandle_t type) contained in the queue set that contains data, + * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained + * in the queue set that is available, or NULL if no such queue or semaphore + * exists before before the specified block time expires. + */ +QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, + const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/* + * A version of xQueueSelectFromSet() that can be used from an ISR. + */ +QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; + +/* Not public API functions. */ +void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, + TickType_t xTicksToWait, + const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION; +BaseType_t xQueueGenericReset( QueueHandle_t xQueue, + BaseType_t xNewQueue ) PRIVILEGED_FUNCTION; +void vQueueSetQueueNumber( QueueHandle_t xQueue, + UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION; +UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* QUEUE_H */ diff --git a/freertos/cvitek/install/include/kernel/semphr.h b/freertos/cvitek/install/include/kernel/semphr.h new file mode 100644 index 000000000..d28d4a045 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/semphr.h @@ -0,0 +1,1189 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef SEMAPHORE_H +#define SEMAPHORE_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h" must appear in source files before "include semphr.h" +#endif + +#include "queue.h" + +typedef QueueHandle_t SemaphoreHandle_t; + +#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( uint8_t ) 1U ) +#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( uint8_t ) 0U ) +#define semGIVE_BLOCK_TIME ( ( TickType_t ) 0U ) + + +/** + * semphr. h + * @code{c} + * vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore ); + * @endcode + * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a binary semaphore! + * https://www.FreeRTOS.org/RTOS-task-notifications.html + * + * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the + * xSemaphoreCreateBinary() function. Note that binary semaphores created using + * the vSemaphoreCreateBinary() macro are created in a state such that the + * first call to 'take' the semaphore would pass, whereas binary semaphores + * created using xSemaphoreCreateBinary() are created in a state such that the + * the semaphore must first be 'given' before it can be 'taken'. + * + * Macro that implements a semaphore by using the existing queue mechanism. + * The queue length is 1 as this is a binary semaphore. The data size is 0 + * as we don't want to actually store any data - we just want to know if the + * queue is empty or full. + * + * This type of semaphore can be used for pure synchronisation between tasks or + * between an interrupt and a task. The semaphore need not be given back once + * obtained, so one task/interrupt can continuously 'give' the semaphore while + * another continuously 'takes' the semaphore. For this reason this type of + * semaphore does not use a priority inheritance mechanism. For an alternative + * that does use priority inheritance see xSemaphoreCreateMutex(). + * + * @param xSemaphore Handle to the created semaphore. Should be of type SemaphoreHandle_t. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore = NULL; + * + * void vATask( void * pvParameters ) + * { + * // Semaphore cannot be used before a call to vSemaphoreCreateBinary (). + * // This is a macro so pass the variable in directly. + * vSemaphoreCreateBinary( xSemaphore ); + * + * if( xSemaphore != NULL ) + * { + * // The semaphore was created successfully. + * // The semaphore can now be used. + * } + * } + * @endcode + * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary + * \ingroup Semaphores + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define vSemaphoreCreateBinary( xSemaphore ) \ + { \ + ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \ + if( ( xSemaphore ) != NULL ) \ + { \ + ( void ) xSemaphoreGive( ( xSemaphore ) ); \ + } \ + } +#endif + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateBinary( void ); + * @endcode + * + * Creates a new binary semaphore instance, and returns a handle by which the + * new semaphore can be referenced. + * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a binary semaphore! + * https://www.FreeRTOS.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, binary semaphores use a block + * of memory, in which the semaphore structure is stored. If a binary semaphore + * is created using xSemaphoreCreateBinary() then the required memory is + * automatically dynamically allocated inside the xSemaphoreCreateBinary() + * function. (see https://www.FreeRTOS.org/a00111.html). If a binary semaphore + * is created using xSemaphoreCreateBinaryStatic() then the application writer + * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a + * binary semaphore to be created without using any dynamic memory allocation. + * + * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this + * xSemaphoreCreateBinary() function. Note that binary semaphores created using + * the vSemaphoreCreateBinary() macro are created in a state such that the + * first call to 'take' the semaphore would pass, whereas binary semaphores + * created using xSemaphoreCreateBinary() are created in a state such that the + * the semaphore must first be 'given' before it can be 'taken'. + * + * This type of semaphore can be used for pure synchronisation between tasks or + * between an interrupt and a task. The semaphore need not be given back once + * obtained, so one task/interrupt can continuously 'give' the semaphore while + * another continuously 'takes' the semaphore. For this reason this type of + * semaphore does not use a priority inheritance mechanism. For an alternative + * that does use priority inheritance see xSemaphoreCreateMutex(). + * + * @return Handle to the created semaphore, or NULL if the memory required to + * hold the semaphore's data structures could not be allocated. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore = NULL; + * + * void vATask( void * pvParameters ) + * { + * // Semaphore cannot be used before a call to xSemaphoreCreateBinary(). + * // This is a macro so pass the variable in directly. + * xSemaphore = xSemaphoreCreateBinary(); + * + * if( xSemaphore != NULL ) + * { + * // The semaphore was created successfully. + * // The semaphore can now be used. + * } + * } + * @endcode + * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary + * \ingroup Semaphores + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ) +#endif + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer ); + * @endcode + * + * Creates a new binary semaphore instance, and returns a handle by which the + * new semaphore can be referenced. + * + * NOTE: In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a binary semaphore! + * https://www.FreeRTOS.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, binary semaphores use a block + * of memory, in which the semaphore structure is stored. If a binary semaphore + * is created using xSemaphoreCreateBinary() then the required memory is + * automatically dynamically allocated inside the xSemaphoreCreateBinary() + * function. (see https://www.FreeRTOS.org/a00111.html). If a binary semaphore + * is created using xSemaphoreCreateBinaryStatic() then the application writer + * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a + * binary semaphore to be created without using any dynamic memory allocation. + * + * This type of semaphore can be used for pure synchronisation between tasks or + * between an interrupt and a task. The semaphore need not be given back once + * obtained, so one task/interrupt can continuously 'give' the semaphore while + * another continuously 'takes' the semaphore. For this reason this type of + * semaphore does not use a priority inheritance mechanism. For an alternative + * that does use priority inheritance see xSemaphoreCreateMutex(). + * + * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, + * which will then be used to hold the semaphore's data structure, removing the + * need for the memory to be allocated dynamically. + * + * @return If the semaphore is created then a handle to the created semaphore is + * returned. If pxSemaphoreBuffer is NULL then NULL is returned. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore = NULL; + * StaticSemaphore_t xSemaphoreBuffer; + * + * void vATask( void * pvParameters ) + * { + * // Semaphore cannot be used before a call to xSemaphoreCreateBinary(). + * // The semaphore's data structures will be placed in the xSemaphoreBuffer + * // variable, the address of which is passed into the function. The + * // function's parameter is not NULL, so the function will not attempt any + * // dynamic memory allocation, and therefore the function will not return + * // return NULL. + * xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer ); + * + * // Rest of task code goes here. + * } + * @endcode + * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic + * \ingroup Semaphores + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * semphr. h + * @code{c} + * xSemaphoreTake( + * SemaphoreHandle_t xSemaphore, + * TickType_t xBlockTime + * ); + * @endcode + * + * Macro to obtain a semaphore. The semaphore must have previously been + * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or + * xSemaphoreCreateCounting(). + * + * @param xSemaphore A handle to the semaphore being taken - obtained when + * the semaphore was created. + * + * @param xBlockTime The time in ticks to wait for the semaphore to become + * available. The macro portTICK_PERIOD_MS can be used to convert this to a + * real time. A block time of zero can be used to poll the semaphore. A block + * time of portMAX_DELAY can be used to block indefinitely (provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h). + * + * @return pdTRUE if the semaphore was obtained. pdFALSE + * if xBlockTime expired without the semaphore becoming available. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore = NULL; + * + * // A task that creates a semaphore. + * void vATask( void * pvParameters ) + * { + * // Create the semaphore to guard a shared resource. + * xSemaphore = xSemaphoreCreateBinary(); + * } + * + * // A task that uses the semaphore. + * void vAnotherTask( void * pvParameters ) + * { + * // ... Do other things. + * + * if( xSemaphore != NULL ) + * { + * // See if we can obtain the semaphore. If the semaphore is not available + * // wait 10 ticks to see if it becomes free. + * if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE ) + * { + * // We were able to obtain the semaphore and can now access the + * // shared resource. + * + * // ... + * + * // We have finished accessing the shared resource. Release the + * // semaphore. + * xSemaphoreGive( xSemaphore ); + * } + * else + * { + * // We could not obtain the semaphore and can therefore not access + * // the shared resource safely. + * } + * } + * } + * @endcode + * \defgroup xSemaphoreTake xSemaphoreTake + * \ingroup Semaphores + */ +#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) ) + +/** + * semphr. h + * @code{c} + * xSemaphoreTakeRecursive( + * SemaphoreHandle_t xMutex, + * TickType_t xBlockTime + * ); + * @endcode + * + * Macro to recursively obtain, or 'take', a mutex type semaphore. + * The mutex must have previously been created using a call to + * xSemaphoreCreateRecursiveMutex(); + * + * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this + * macro to be available. + * + * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * @param xMutex A handle to the mutex being obtained. This is the + * handle returned by xSemaphoreCreateRecursiveMutex(); + * + * @param xBlockTime The time in ticks to wait for the semaphore to become + * available. The macro portTICK_PERIOD_MS can be used to convert this to a + * real time. A block time of zero can be used to poll the semaphore. If + * the task already owns the semaphore then xSemaphoreTakeRecursive() will + * return immediately no matter what the value of xBlockTime. + * + * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime + * expired without the semaphore becoming available. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xMutex = NULL; + * + * // A task that creates a mutex. + * void vATask( void * pvParameters ) + * { + * // Create the mutex to guard a shared resource. + * xMutex = xSemaphoreCreateRecursiveMutex(); + * } + * + * // A task that uses the mutex. + * void vAnotherTask( void * pvParameters ) + * { + * // ... Do other things. + * + * if( xMutex != NULL ) + * { + * // See if we can obtain the mutex. If the mutex is not available + * // wait 10 ticks to see if it becomes free. + * if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE ) + * { + * // We were able to obtain the mutex and can now access the + * // shared resource. + * + * // ... + * // For some reason due to the nature of the code further calls to + * // xSemaphoreTakeRecursive() are made on the same mutex. In real + * // code these would not be just sequential calls as this would make + * // no sense. Instead the calls are likely to be buried inside + * // a more complex call structure. + * xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + * xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + * + * // The mutex has now been 'taken' three times, so will not be + * // available to another task until it has also been given back + * // three times. Again it is unlikely that real code would have + * // these calls sequentially, but instead buried in a more complex + * // call structure. This is just for illustrative purposes. + * xSemaphoreGiveRecursive( xMutex ); + * xSemaphoreGiveRecursive( xMutex ); + * xSemaphoreGiveRecursive( xMutex ); + * + * // Now the mutex can be taken by other tasks. + * } + * else + * { + * // We could not obtain the mutex and can therefore not access + * // the shared resource safely. + * } + * } + * } + * @endcode + * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive + * \ingroup Semaphores + */ +#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #define xSemaphoreTakeRecursive( xMutex, xBlockTime ) xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) ) +#endif + +/** + * semphr. h + * @code{c} + * xSemaphoreGive( SemaphoreHandle_t xSemaphore ); + * @endcode + * + * Macro to release a semaphore. The semaphore must have previously been + * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or + * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake(). + * + * This macro must not be used from an ISR. See xSemaphoreGiveFromISR () for + * an alternative which can be used from an ISR. + * + * This macro must also not be used on semaphores created using + * xSemaphoreCreateRecursiveMutex(). + * + * @param xSemaphore A handle to the semaphore being released. This is the + * handle returned when the semaphore was created. + * + * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. + * Semaphores are implemented using queues. An error can occur if there is + * no space on the queue to post a message - indicating that the + * semaphore was not first obtained correctly. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore = NULL; + * + * void vATask( void * pvParameters ) + * { + * // Create the semaphore to guard a shared resource. + * xSemaphore = vSemaphoreCreateBinary(); + * + * if( xSemaphore != NULL ) + * { + * if( xSemaphoreGive( xSemaphore ) != pdTRUE ) + * { + * // We would expect this call to fail because we cannot give + * // a semaphore without first "taking" it! + * } + * + * // Obtain the semaphore - don't block if the semaphore is not + * // immediately available. + * if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) ) + * { + * // We now have the semaphore and can access the shared resource. + * + * // ... + * + * // We have finished accessing the shared resource so can free the + * // semaphore. + * if( xSemaphoreGive( xSemaphore ) != pdTRUE ) + * { + * // We would not expect this call to fail because we must have + * // obtained the semaphore to get here. + * } + * } + * } + * } + * @endcode + * \defgroup xSemaphoreGive xSemaphoreGive + * \ingroup Semaphores + */ +#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK ) + +/** + * semphr. h + * @code{c} + * xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex ); + * @endcode + * + * Macro to recursively release, or 'give', a mutex type semaphore. + * The mutex must have previously been created using a call to + * xSemaphoreCreateRecursiveMutex(); + * + * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this + * macro to be available. + * + * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * @param xMutex A handle to the mutex being released, or 'given'. This is the + * handle returned by xSemaphoreCreateMutex(); + * + * @return pdTRUE if the semaphore was given. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xMutex = NULL; + * + * // A task that creates a mutex. + * void vATask( void * pvParameters ) + * { + * // Create the mutex to guard a shared resource. + * xMutex = xSemaphoreCreateRecursiveMutex(); + * } + * + * // A task that uses the mutex. + * void vAnotherTask( void * pvParameters ) + * { + * // ... Do other things. + * + * if( xMutex != NULL ) + * { + * // See if we can obtain the mutex. If the mutex is not available + * // wait 10 ticks to see if it becomes free. + * if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE ) + * { + * // We were able to obtain the mutex and can now access the + * // shared resource. + * + * // ... + * // For some reason due to the nature of the code further calls to + * // xSemaphoreTakeRecursive() are made on the same mutex. In real + * // code these would not be just sequential calls as this would make + * // no sense. Instead the calls are likely to be buried inside + * // a more complex call structure. + * xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + * xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + * + * // The mutex has now been 'taken' three times, so will not be + * // available to another task until it has also been given back + * // three times. Again it is unlikely that real code would have + * // these calls sequentially, it would be more likely that the calls + * // to xSemaphoreGiveRecursive() would be called as a call stack + * // unwound. This is just for demonstrative purposes. + * xSemaphoreGiveRecursive( xMutex ); + * xSemaphoreGiveRecursive( xMutex ); + * xSemaphoreGiveRecursive( xMutex ); + * + * // Now the mutex can be taken by other tasks. + * } + * else + * { + * // We could not obtain the mutex and can therefore not access + * // the shared resource safely. + * } + * } + * } + * @endcode + * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive + * \ingroup Semaphores + */ +#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + #define xSemaphoreGiveRecursive( xMutex ) xQueueGiveMutexRecursive( ( xMutex ) ) +#endif + +/** + * semphr. h + * @code{c} + * xSemaphoreGiveFromISR( + * SemaphoreHandle_t xSemaphore, + * BaseType_t *pxHigherPriorityTaskWoken + * ); + * @endcode + * + * Macro to release a semaphore. The semaphore must have previously been + * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting(). + * + * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) + * must not be used with this macro. + * + * This macro can be used from an ISR. + * + * @param xSemaphore A handle to the semaphore being released. This is the + * handle returned when the semaphore was created. + * + * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xSemaphoreGiveFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL. + * + * Example usage: + * @code{c} + \#define LONG_TIME 0xffff + \#define TICKS_TO_WAIT 10 + * SemaphoreHandle_t xSemaphore = NULL; + * + * // Repetitive task. + * void vATask( void * pvParameters ) + * { + * for( ;; ) + * { + * // We want this task to run every 10 ticks of a timer. The semaphore + * // was created before this task was started. + * + * // Block waiting for the semaphore to become available. + * if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE ) + * { + * // It is time to execute. + * + * // ... + * + * // We have finished our task. Return to the top of the loop where + * // we will block on the semaphore until it is time to execute + * // again. Note when using the semaphore for synchronisation with an + * // ISR in this manner there is no need to 'give' the semaphore back. + * } + * } + * } + * + * // Timer ISR + * void vTimerISR( void * pvParameters ) + * { + * static uint8_t ucLocalTickCount = 0; + * static BaseType_t xHigherPriorityTaskWoken; + * + * // A timer tick has occurred. + * + * // ... Do other time functions. + * + * // Is it time for vATask () to run? + * xHigherPriorityTaskWoken = pdFALSE; + * ucLocalTickCount++; + * if( ucLocalTickCount >= TICKS_TO_WAIT ) + * { + * // Unblock the task by releasing the semaphore. + * xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken ); + * + * // Reset the count so we release the semaphore again in 10 ticks time. + * ucLocalTickCount = 0; + * } + * + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // We can force a context switch here. Context switching from an + * // ISR uses port specific syntax. Check the demo task for your port + * // to find the syntax required. + * } + * } + * @endcode + * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR + * \ingroup Semaphores + */ +#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) ) + +/** + * semphr. h + * @code{c} + * xSemaphoreTakeFromISR( + * SemaphoreHandle_t xSemaphore, + * BaseType_t *pxHigherPriorityTaskWoken + * ); + * @endcode + * + * Macro to take a semaphore from an ISR. The semaphore must have + * previously been created with a call to xSemaphoreCreateBinary() or + * xSemaphoreCreateCounting(). + * + * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) + * must not be used with this macro. + * + * This macro can be used from an ISR, however taking a semaphore from an ISR + * is not a common operation. It is likely to only be useful when taking a + * counting semaphore when an interrupt is obtaining an object from a resource + * pool (when the semaphore count indicates the number of resources available). + * + * @param xSemaphore A handle to the semaphore being taken. This is the + * handle returned when the semaphore was created. + * + * @param pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xSemaphoreTakeFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the semaphore was successfully taken, otherwise + * pdFALSE + */ +#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) ) + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateMutex( void ); + * @endcode + * + * Creates a new mutex type semaphore instance, and returns a handle by which + * the new mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, mutex semaphores use a block + * of memory, in which the mutex structure is stored. If a mutex is created + * using xSemaphoreCreateMutex() then the required memory is automatically + * dynamically allocated inside the xSemaphoreCreateMutex() function. (see + * https://www.FreeRTOS.org/a00111.html). If a mutex is created using + * xSemaphoreCreateMutexStatic() then the application writer must provided the + * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created + * without using any dynamic memory allocation. + * + * Mutexes created using this function can be accessed using the xSemaphoreTake() + * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and + * xSemaphoreGiveRecursive() macros must not be used. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @return If the mutex was successfully created then a handle to the created + * semaphore is returned. If there was not enough heap to allocate the mutex + * data structures then NULL is returned. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore; + * + * void vATask( void * pvParameters ) + * { + * // Semaphore cannot be used before a call to xSemaphoreCreateMutex(). + * // This is a macro so pass the variable in directly. + * xSemaphore = xSemaphoreCreateMutex(); + * + * if( xSemaphore != NULL ) + * { + * // The semaphore was created successfully. + * // The semaphore can now be used. + * } + * } + * @endcode + * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex + * \ingroup Semaphores + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX ) +#endif + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer ); + * @endcode + * + * Creates a new mutex type semaphore instance, and returns a handle by which + * the new mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, mutex semaphores use a block + * of memory, in which the mutex structure is stored. If a mutex is created + * using xSemaphoreCreateMutex() then the required memory is automatically + * dynamically allocated inside the xSemaphoreCreateMutex() function. (see + * https://www.FreeRTOS.org/a00111.html). If a mutex is created using + * xSemaphoreCreateMutexStatic() then the application writer must provided the + * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created + * without using any dynamic memory allocation. + * + * Mutexes created using this function can be accessed using the xSemaphoreTake() + * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and + * xSemaphoreGiveRecursive() macros must not be used. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, + * which will be used to hold the mutex's data structure, removing the need for + * the memory to be allocated dynamically. + * + * @return If the mutex was successfully created then a handle to the created + * mutex is returned. If pxMutexBuffer was NULL then NULL is returned. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore; + * StaticSemaphore_t xMutexBuffer; + * + * void vATask( void * pvParameters ) + * { + * // A mutex cannot be used before it has been created. xMutexBuffer is + * // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is + * // attempted. + * xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer ); + * + * // As no dynamic memory allocation was performed, xSemaphore cannot be NULL, + * // so there is no need to check it. + * } + * @endcode + * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic + * \ingroup Semaphores + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void ); + * @endcode + * + * Creates a new recursive mutex type semaphore instance, and returns a handle + * by which the new recursive mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, recursive mutexs use a block + * of memory, in which the mutex structure is stored. If a recursive mutex is + * created using xSemaphoreCreateRecursiveMutex() then the required memory is + * automatically dynamically allocated inside the + * xSemaphoreCreateRecursiveMutex() function. (see + * https://www.FreeRTOS.org/a00111.html). If a recursive mutex is created using + * xSemaphoreCreateRecursiveMutexStatic() then the application writer must + * provide the memory that will get used by the mutex. + * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to + * be created without using any dynamic memory allocation. + * + * Mutexes created using this macro can be accessed using the + * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The + * xSemaphoreTake() and xSemaphoreGive() macros must not be used. + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @return xSemaphore Handle to the created mutex semaphore. Should be of type + * SemaphoreHandle_t. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore; + * + * void vATask( void * pvParameters ) + * { + * // Semaphore cannot be used before a call to xSemaphoreCreateMutex(). + * // This is a macro so pass the variable in directly. + * xSemaphore = xSemaphoreCreateRecursiveMutex(); + * + * if( xSemaphore != NULL ) + * { + * // The semaphore was created successfully. + * // The semaphore can now be used. + * } + * } + * @endcode + * \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex + * \ingroup Semaphores + */ +#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) + #define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX ) +#endif + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer ); + * @endcode + * + * Creates a new recursive mutex type semaphore instance, and returns a handle + * by which the new recursive mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, recursive mutexs use a block + * of memory, in which the mutex structure is stored. If a recursive mutex is + * created using xSemaphoreCreateRecursiveMutex() then the required memory is + * automatically dynamically allocated inside the + * xSemaphoreCreateRecursiveMutex() function. (see + * https://www.FreeRTOS.org/a00111.html). If a recursive mutex is created using + * xSemaphoreCreateRecursiveMutexStatic() then the application writer must + * provide the memory that will get used by the mutex. + * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to + * be created without using any dynamic memory allocation. + * + * Mutexes created using this macro can be accessed using the + * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The + * xSemaphoreTake() and xSemaphoreGive() macros must not be used. + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, + * which will then be used to hold the recursive mutex's data structure, + * removing the need for the memory to be allocated dynamically. + * + * @return If the recursive mutex was successfully created then a handle to the + * created recursive mutex is returned. If pxMutexBuffer was NULL then NULL is + * returned. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore; + * StaticSemaphore_t xMutexBuffer; + * + * void vATask( void * pvParameters ) + * { + * // A recursive semaphore cannot be used before it is created. Here a + * // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic(). + * // The address of xMutexBuffer is passed into the function, and will hold + * // the mutexes data structures - so no dynamic memory allocation will be + * // attempted. + * xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer ); + * + * // As no dynamic memory allocation was performed, xSemaphore cannot be NULL, + * // so there is no need to check it. + * } + * @endcode + * \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic + * \ingroup Semaphores + */ +#if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) + #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount ); + * @endcode + * + * Creates a new counting semaphore instance, and returns a handle by which the + * new counting semaphore can be referenced. + * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a counting semaphore! + * https://www.FreeRTOS.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, counting semaphores use a + * block of memory, in which the counting semaphore structure is stored. If a + * counting semaphore is created using xSemaphoreCreateCounting() then the + * required memory is automatically dynamically allocated inside the + * xSemaphoreCreateCounting() function. (see + * https://www.FreeRTOS.org/a00111.html). If a counting semaphore is created + * using xSemaphoreCreateCountingStatic() then the application writer can + * instead optionally provide the memory that will get used by the counting + * semaphore. xSemaphoreCreateCountingStatic() therefore allows a counting + * semaphore to be created without using any dynamic memory allocation. + * + * Counting semaphores are typically used for two things: + * + * 1) Counting events. + * + * In this usage scenario an event handler will 'give' a semaphore each time + * an event occurs (incrementing the semaphore count value), and a handler + * task will 'take' a semaphore each time it processes an event + * (decrementing the semaphore count value). The count value is therefore + * the difference between the number of events that have occurred and the + * number that have been processed. In this case it is desirable for the + * initial count value to be zero. + * + * 2) Resource management. + * + * In this usage scenario the count value indicates the number of resources + * available. To obtain control of a resource a task must first obtain a + * semaphore - decrementing the semaphore count value. When the count value + * reaches zero there are no free resources. When a task finishes with the + * resource it 'gives' the semaphore back - incrementing the semaphore count + * value. In this case it is desirable for the initial count value to be + * equal to the maximum count value, indicating that all resources are free. + * + * @param uxMaxCount The maximum count value that can be reached. When the + * semaphore reaches this value it can no longer be 'given'. + * + * @param uxInitialCount The count value assigned to the semaphore when it is + * created. + * + * @return Handle to the created semaphore. Null if the semaphore could not be + * created. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore; + * + * void vATask( void * pvParameters ) + * { + * SemaphoreHandle_t xSemaphore = NULL; + * + * // Semaphore cannot be used before a call to xSemaphoreCreateCounting(). + * // The max value to which the semaphore can count should be 10, and the + * // initial value assigned to the count should be 0. + * xSemaphore = xSemaphoreCreateCounting( 10, 0 ); + * + * if( xSemaphore != NULL ) + * { + * // The semaphore was created successfully. + * // The semaphore can now be used. + * } + * } + * @endcode + * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting + * \ingroup Semaphores + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) ) +#endif + +/** + * semphr. h + * @code{c} + * SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer ); + * @endcode + * + * Creates a new counting semaphore instance, and returns a handle by which the + * new counting semaphore can be referenced. + * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a counting semaphore! + * https://www.FreeRTOS.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, counting semaphores use a + * block of memory, in which the counting semaphore structure is stored. If a + * counting semaphore is created using xSemaphoreCreateCounting() then the + * required memory is automatically dynamically allocated inside the + * xSemaphoreCreateCounting() function. (see + * https://www.FreeRTOS.org/a00111.html). If a counting semaphore is created + * using xSemaphoreCreateCountingStatic() then the application writer must + * provide the memory. xSemaphoreCreateCountingStatic() therefore allows a + * counting semaphore to be created without using any dynamic memory allocation. + * + * Counting semaphores are typically used for two things: + * + * 1) Counting events. + * + * In this usage scenario an event handler will 'give' a semaphore each time + * an event occurs (incrementing the semaphore count value), and a handler + * task will 'take' a semaphore each time it processes an event + * (decrementing the semaphore count value). The count value is therefore + * the difference between the number of events that have occurred and the + * number that have been processed. In this case it is desirable for the + * initial count value to be zero. + * + * 2) Resource management. + * + * In this usage scenario the count value indicates the number of resources + * available. To obtain control of a resource a task must first obtain a + * semaphore - decrementing the semaphore count value. When the count value + * reaches zero there are no free resources. When a task finishes with the + * resource it 'gives' the semaphore back - incrementing the semaphore count + * value. In this case it is desirable for the initial count value to be + * equal to the maximum count value, indicating that all resources are free. + * + * @param uxMaxCount The maximum count value that can be reached. When the + * semaphore reaches this value it can no longer be 'given'. + * + * @param uxInitialCount The count value assigned to the semaphore when it is + * created. + * + * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, + * which will then be used to hold the semaphore's data structure, removing the + * need for the memory to be allocated dynamically. + * + * @return If the counting semaphore was successfully created then a handle to + * the created counting semaphore is returned. If pxSemaphoreBuffer was NULL + * then NULL is returned. + * + * Example usage: + * @code{c} + * SemaphoreHandle_t xSemaphore; + * StaticSemaphore_t xSemaphoreBuffer; + * + * void vATask( void * pvParameters ) + * { + * SemaphoreHandle_t xSemaphore = NULL; + * + * // Counting semaphore cannot be used before they have been created. Create + * // a counting semaphore using xSemaphoreCreateCountingStatic(). The max + * // value to which the semaphore can count is 10, and the initial value + * // assigned to the count will be 0. The address of xSemaphoreBuffer is + * // passed in and will be used to hold the semaphore structure, so no dynamic + * // memory allocation will be used. + * xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer ); + * + * // No memory allocation was attempted so xSemaphore cannot be NULL, so there + * // is no need to check its value. + * } + * @endcode + * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic + * \ingroup Semaphores + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * semphr. h + * @code{c} + * void vSemaphoreDelete( SemaphoreHandle_t xSemaphore ); + * @endcode + * + * Delete a semaphore. This function must be used with care. For example, + * do not delete a mutex type semaphore if the mutex is held by a task. + * + * @param xSemaphore A handle to the semaphore to be deleted. + * + * \defgroup vSemaphoreDelete vSemaphoreDelete + * \ingroup Semaphores + */ +#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) ) + +/** + * semphr.h + * @code{c} + * TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex ); + * @endcode + * + * If xMutex is indeed a mutex type semaphore, return the current mutex holder. + * If xMutex is not a mutex type semaphore, or the mutex is available (not held + * by a task), return NULL. + * + * Note: This is a good way of determining if the calling task is the mutex + * holder, but not a good way of determining the identity of the mutex holder as + * the holder may change between the function exiting and the returned value + * being tested. + */ +#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) ) + +/** + * semphr.h + * @code{c} + * TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex ); + * @endcode + * + * If xMutex is indeed a mutex type semaphore, return the current mutex holder. + * If xMutex is not a mutex type semaphore, or the mutex is available (not held + * by a task), return NULL. + * + */ +#define xSemaphoreGetMutexHolderFromISR( xSemaphore ) xQueueGetMutexHolderFromISR( ( xSemaphore ) ) + +/** + * semphr.h + * @code{c} + * UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore ); + * @endcode + * + * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns + * its current count value. If the semaphore is a binary semaphore then + * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the + * semaphore is not available. + * + */ +#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) ) + +/** + * semphr.h + * @code{c} + * UBaseType_t uxSemaphoreGetCountFromISR( SemaphoreHandle_t xSemaphore ); + * @endcode + * + * If the semaphore is a counting semaphore then uxSemaphoreGetCountFromISR() returns + * its current count value. If the semaphore is a binary semaphore then + * uxSemaphoreGetCountFromISR() returns 1 if the semaphore is available, and 0 if the + * semaphore is not available. + * + */ +#define uxSemaphoreGetCountFromISR( xSemaphore ) uxQueueMessagesWaitingFromISR( ( QueueHandle_t ) ( xSemaphore ) ) + +#endif /* SEMAPHORE_H */ diff --git a/freertos/cvitek/install/include/kernel/stack_macros.h b/freertos/cvitek/install/include/kernel/stack_macros.h new file mode 100644 index 000000000..cfe5b9532 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/stack_macros.h @@ -0,0 +1,137 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef STACK_MACROS_H +#define STACK_MACROS_H + +/* + * Call the stack overflow hook function if the stack of the task being swapped + * out is currently overflowed, or looks like it might have overflowed in the + * past. + * + * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check + * the current stack state only - comparing the current top of stack value to + * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 + * will also cause the last few stack bytes to be checked to ensure the value + * to which the bytes were set when the task was created have not been + * overwritten. Note this second test does not guarantee that an overflowed + * stack will always be recognised. + */ + +/*-----------------------------------------------------------*/ + +/* + * portSTACK_LIMIT_PADDING is a number of extra words to consider to be in + * use on the stack. + */ +#ifndef portSTACK_LIMIT_PADDING + #define portSTACK_LIMIT_PADDING 0 +#endif + +#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) + +/* Only the current stack state is to be checked. */ + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + /* Is the currently saved stack pointer within the stack limit? */ \ + if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ +/*-----------------------------------------------------------*/ + +#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) + +/* Only the current stack state is to be checked. */ + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + \ + /* Is the currently saved stack pointer within the stack limit? */ \ + if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ +/*-----------------------------------------------------------*/ + +#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) + + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ + const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ + \ + if( ( pulStack[ 0 ] != ulCheckValue ) || \ + ( pulStack[ 1 ] != ulCheckValue ) || \ + ( pulStack[ 2 ] != ulCheckValue ) || \ + ( pulStack[ 3 ] != ulCheckValue ) ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ +/*-----------------------------------------------------------*/ + +#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) + + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ + static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ + \ + \ + pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ + \ + /* Has the extremity of the task stack ever been written over? */ \ + if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ +/*-----------------------------------------------------------*/ + +/* Remove stack overflow macro if not being used. */ +#ifndef taskCHECK_FOR_STACK_OVERFLOW + #define taskCHECK_FOR_STACK_OVERFLOW() +#endif + + + +#endif /* STACK_MACROS_H */ diff --git a/freertos/cvitek/install/include/kernel/stream_buffer.h b/freertos/cvitek/install/include/kernel/stream_buffer.h new file mode 100644 index 000000000..c2812d411 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/stream_buffer.h @@ -0,0 +1,869 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* + * Stream buffers are used to send a continuous stream of data from one task or + * interrupt to another. Their implementation is light weight, making them + * particularly suited for interrupt to task and core to core communication + * scenarios. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferReceive()) inside a critical section section and set the + * receive block time to 0. + * + */ + +#ifndef STREAM_BUFFER_H +#define STREAM_BUFFER_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include stream_buffer.h" +#endif + +/* *INDENT-OFF* */ +#if defined( __cplusplus ) + extern "C" { +#endif +/* *INDENT-ON* */ + +/** + * Type by which stream buffers are referenced. For example, a call to + * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can + * then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(), + * etc. + */ +struct StreamBufferDef_t; +typedef struct StreamBufferDef_t * StreamBufferHandle_t; + + +/** + * stream_buffer.h + * + * @code{c} + * StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes ); + * @endcode + * + * Creates a new stream buffer using dynamically allocated memory. See + * xStreamBufferCreateStatic() for a version that uses statically allocated + * memory (memory that is allocated at compile time). + * + * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in + * FreeRTOSConfig.h for xStreamBufferCreate() to be available. + * + * @param xBufferSizeBytes The total number of bytes the stream buffer will be + * able to hold at any one time. + * + * @param xTriggerLevelBytes The number of bytes that must be in the stream + * buffer before a task that is blocked on the stream buffer to wait for data is + * moved out of the blocked state. For example, if a task is blocked on a read + * of an empty stream buffer that has a trigger level of 1 then the task will be + * unblocked when a single byte is written to the buffer or the task's block + * time expires. As another example, if a task is blocked on a read of an empty + * stream buffer that has a trigger level of 10 then the task will not be + * unblocked until the stream buffer contains at least 10 bytes or the task's + * block time expires. If a reading task's block time expires before the + * trigger level is reached then the task will still receive however many bytes + * are actually available. Setting a trigger level of 0 will result in a + * trigger level of 1 being used. It is not valid to specify a trigger level + * that is greater than the buffer size. + * + * @return If NULL is returned, then the stream buffer cannot be created + * because there is insufficient heap memory available for FreeRTOS to allocate + * the stream buffer data structures and storage area. A non-NULL value being + * returned indicates that the stream buffer has been created successfully - + * the returned value should be stored as the handle to the created stream + * buffer. + * + * Example use: + * @code{c} + * + * void vAFunction( void ) + * { + * StreamBufferHandle_t xStreamBuffer; + * const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10; + * + * // Create a stream buffer that can hold 100 bytes. The memory used to hold + * // both the stream buffer structure and the data in the stream buffer is + * // allocated dynamically. + * xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel ); + * + * if( xStreamBuffer == NULL ) + * { + * // There was not enough heap memory space available to create the + * // stream buffer. + * } + * else + * { + * // The stream buffer was created successfully and can now be used. + * } + * } + * @endcode + * \defgroup xStreamBufferCreate xStreamBufferCreate + * \ingroup StreamBufferManagement + */ +#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE ) + +/** + * stream_buffer.h + * + * @code{c} + * StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes, + * size_t xTriggerLevelBytes, + * uint8_t *pucStreamBufferStorageArea, + * StaticStreamBuffer_t *pxStaticStreamBuffer ); + * @endcode + * Creates a new stream buffer using statically allocated memory. See + * xStreamBufferCreate() for a version that uses dynamically allocated memory. + * + * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for + * xStreamBufferCreateStatic() to be available. + * + * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the + * pucStreamBufferStorageArea parameter. + * + * @param xTriggerLevelBytes The number of bytes that must be in the stream + * buffer before a task that is blocked on the stream buffer to wait for data is + * moved out of the blocked state. For example, if a task is blocked on a read + * of an empty stream buffer that has a trigger level of 1 then the task will be + * unblocked when a single byte is written to the buffer or the task's block + * time expires. As another example, if a task is blocked on a read of an empty + * stream buffer that has a trigger level of 10 then the task will not be + * unblocked until the stream buffer contains at least 10 bytes or the task's + * block time expires. If a reading task's block time expires before the + * trigger level is reached then the task will still receive however many bytes + * are actually available. Setting a trigger level of 0 will result in a + * trigger level of 1 being used. It is not valid to specify a trigger level + * that is greater than the buffer size. + * + * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at + * least xBufferSizeBytes big. This is the array to which streams are + * copied when they are written to the stream buffer. + * + * @param pxStaticStreamBuffer Must point to a variable of type + * StaticStreamBuffer_t, which will be used to hold the stream buffer's data + * structure. + * + * @return If the stream buffer is created successfully then a handle to the + * created stream buffer is returned. If either pucStreamBufferStorageArea or + * pxStaticstreamBuffer are NULL then NULL is returned. + * + * Example use: + * @code{c} + * + * // Used to dimension the array used to hold the streams. The available space + * // will actually be one less than this, so 999. + #define STORAGE_SIZE_BYTES 1000 + * + * // Defines the memory that will actually hold the streams within the stream + * // buffer. + * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ]; + * + * // The variable used to hold the stream buffer structure. + * StaticStreamBuffer_t xStreamBufferStruct; + * + * void MyFunction( void ) + * { + * StreamBufferHandle_t xStreamBuffer; + * const size_t xTriggerLevel = 1; + * + * xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucStorageBuffer ), + * xTriggerLevel, + * ucStorageBuffer, + * &xStreamBufferStruct ); + * + * // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer + * // parameters were NULL, xStreamBuffer will not be NULL, and can be used to + * // reference the created stream buffer in other stream buffer API calls. + * + * // Other code that uses the stream buffer can go here. + * } + * + * @endcode + * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic + * \ingroup StreamBufferManagement + */ +#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \ + xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer ) + +/** + * stream_buffer.h + * + * @code{c} + * size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + * const void *pvTxData, + * size_t xDataLengthBytes, + * TickType_t xTicksToWait ); + * @endcode + * + * Sends bytes to a stream buffer. The bytes are copied into the stream buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferReceive()) inside a critical section and set the receive + * block time to 0. + * + * Use xStreamBufferSend() to write to a stream buffer from a task. Use + * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt + * service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer to which a stream is + * being sent. + * + * @param pvTxData A pointer to the buffer that holds the bytes to be copied + * into the stream buffer. + * + * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData + * into the stream buffer. + * + * @param xTicksToWait The maximum amount of time the task should remain in the + * Blocked state to wait for enough space to become available in the stream + * buffer, should the stream buffer contain too little space to hold the + * another xDataLengthBytes bytes. The block time is specified in tick periods, + * so the absolute time it represents is dependent on the tick frequency. The + * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds + * into a time specified in ticks. Setting xTicksToWait to portMAX_DELAY will + * cause the task to wait indefinitely (without timing out), provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h. If a task times out + * before it can write all xDataLengthBytes into the buffer it will still write + * as many bytes as possible. A task does not use any CPU time when it is in + * the blocked state. + * + * @return The number of bytes written to the stream buffer. If a task times + * out before it can write all xDataLengthBytes into the buffer it will still + * write as many bytes as possible. + * + * Example use: + * @code{c} + * void vAFunction( StreamBufferHandle_t xStreamBuffer ) + * { + * size_t xBytesSent; + * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 }; + * char *pcStringToSend = "String to send"; + * const TickType_t x100ms = pdMS_TO_TICKS( 100 ); + * + * // Send an array to the stream buffer, blocking for a maximum of 100ms to + * // wait for enough space to be available in the stream buffer. + * xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms ); + * + * if( xBytesSent != sizeof( ucArrayToSend ) ) + * { + * // The call to xStreamBufferSend() times out before there was enough + * // space in the buffer for the data to be written, but it did + * // successfully write xBytesSent bytes. + * } + * + * // Send the string to the stream buffer. Return immediately if there is not + * // enough space in the buffer. + * xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 ); + * + * if( xBytesSent != strlen( pcStringToSend ) ) + * { + * // The entire string could not be added to the stream buffer because + * // there was not enough free space in the buffer, but xBytesSent bytes + * // were sent. Could try again to send the remaining bytes. + * } + * } + * @endcode + * \defgroup xStreamBufferSend xStreamBufferSend + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, + * const void *pvTxData, + * size_t xDataLengthBytes, + * BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * Interrupt safe version of the API function that sends a stream of bytes to + * the stream buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferReceive()) inside a critical section and set the receive + * block time to 0. + * + * Use xStreamBufferSend() to write to a stream buffer from a task. Use + * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt + * service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer to which a stream is + * being sent. + * + * @param pvTxData A pointer to the data that is to be copied into the stream + * buffer. + * + * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData + * into the stream buffer. + * + * @param pxHigherPriorityTaskWoken It is possible that a stream buffer will + * have a task blocked on it waiting for data. Calling + * xStreamBufferSendFromISR() can make data available, and so cause a task that + * was waiting for data to leave the Blocked state. If calling + * xStreamBufferSendFromISR() causes a task to leave the Blocked state, and the + * unblocked task has a priority higher than the currently executing task (the + * task that was interrupted), then, internally, xStreamBufferSendFromISR() + * will set *pxHigherPriorityTaskWoken to pdTRUE. If + * xStreamBufferSendFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. This will + * ensure that the interrupt returns directly to the highest priority Ready + * state task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it + * is passed into the function. See the example code below for an example. + * + * @return The number of bytes actually written to the stream buffer, which will + * be less than xDataLengthBytes if the stream buffer didn't have enough free + * space for all the bytes to be written. + * + * Example use: + * @code{c} + * // A stream buffer that has already been created. + * StreamBufferHandle_t xStreamBuffer; + * + * void vAnInterruptServiceRoutine( void ) + * { + * size_t xBytesSent; + * char *pcStringToSend = "String to send"; + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + * + * // Attempt to send the string to the stream buffer. + * xBytesSent = xStreamBufferSendFromISR( xStreamBuffer, + * ( void * ) pcStringToSend, + * strlen( pcStringToSend ), + * &xHigherPriorityTaskWoken ); + * + * if( xBytesSent != strlen( pcStringToSend ) ) + * { + * // There was not enough free space in the stream buffer for the entire + * // string to be written, ut xBytesSent bytes were written. + * } + * + * // If xHigherPriorityTaskWoken was set to pdTRUE inside + * // xStreamBufferSendFromISR() then a task that has a priority above the + * // priority of the currently executing task was unblocked and a context + * // switch should be performed to ensure the ISR returns to the unblocked + * // task. In most FreeRTOS ports this is done by simply passing + * // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the + * // variables value, and perform the context switch if necessary. Check the + * // documentation for the port in use for port specific instructions. + * taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + * } + * @endcode + * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + * void *pvRxData, + * size_t xBufferLengthBytes, + * TickType_t xTicksToWait ); + * @endcode + * + * Receives bytes from a stream buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferReceive()) inside a critical section and set the receive + * block time to 0. + * + * Use xStreamBufferReceive() to read from a stream buffer from a task. Use + * xStreamBufferReceiveFromISR() to read from a stream buffer from an + * interrupt service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer from which bytes are to + * be received. + * + * @param pvRxData A pointer to the buffer into which the received bytes will be + * copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the + * pvRxData parameter. This sets the maximum number of bytes to receive in one + * call. xStreamBufferReceive will return as many bytes as possible up to a + * maximum set by xBufferLengthBytes. + * + * @param xTicksToWait The maximum amount of time the task should remain in the + * Blocked state to wait for data to become available if the stream buffer is + * empty. xStreamBufferReceive() will return immediately if xTicksToWait is + * zero. The block time is specified in tick periods, so the absolute time it + * represents is dependent on the tick frequency. The macro pdMS_TO_TICKS() can + * be used to convert a time specified in milliseconds into a time specified in + * ticks. Setting xTicksToWait to portMAX_DELAY will cause the task to wait + * indefinitely (without timing out), provided INCLUDE_vTaskSuspend is set to 1 + * in FreeRTOSConfig.h. A task does not use any CPU time when it is in the + * Blocked state. + * + * @return The number of bytes actually read from the stream buffer, which will + * be less than xBufferLengthBytes if the call to xStreamBufferReceive() timed + * out before xBufferLengthBytes were available. + * + * Example use: + * @code{c} + * void vAFunction( StreamBuffer_t xStreamBuffer ) + * { + * uint8_t ucRxData[ 20 ]; + * size_t xReceivedBytes; + * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 ); + * + * // Receive up to another sizeof( ucRxData ) bytes from the stream buffer. + * // Wait in the Blocked state (so not using any CPU processing time) for a + * // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be + * // available. + * xReceivedBytes = xStreamBufferReceive( xStreamBuffer, + * ( void * ) ucRxData, + * sizeof( ucRxData ), + * xBlockTime ); + * + * if( xReceivedBytes > 0 ) + * { + * // A ucRxData contains another xRecievedBytes bytes of data, which can + * // be processed here.... + * } + * } + * @endcode + * \defgroup xStreamBufferReceive xStreamBufferReceive + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, + * void *pvRxData, + * size_t xBufferLengthBytes, + * BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * An interrupt safe version of the API function that receives bytes from a + * stream buffer. + * + * Use xStreamBufferReceive() to read bytes from a stream buffer from a task. + * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an + * interrupt service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer from which a stream + * is being received. + * + * @param pvRxData A pointer to the buffer into which the received bytes are + * copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the + * pvRxData parameter. This sets the maximum number of bytes to receive in one + * call. xStreamBufferReceive will return as many bytes as possible up to a + * maximum set by xBufferLengthBytes. + * + * @param pxHigherPriorityTaskWoken It is possible that a stream buffer will + * have a task blocked on it waiting for space to become available. Calling + * xStreamBufferReceiveFromISR() can make space available, and so cause a task + * that is waiting for space to leave the Blocked state. If calling + * xStreamBufferReceiveFromISR() causes a task to leave the Blocked state, and + * the unblocked task has a priority higher than the currently executing task + * (the task that was interrupted), then, internally, + * xStreamBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE. + * If xStreamBufferReceiveFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. That will + * ensure the interrupt returns directly to the highest priority Ready state + * task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it is + * passed into the function. See the code example below for an example. + * + * @return The number of bytes read from the stream buffer, if any. + * + * Example use: + * @code{c} + * // A stream buffer that has already been created. + * StreamBuffer_t xStreamBuffer; + * + * void vAnInterruptServiceRoutine( void ) + * { + * uint8_t ucRxData[ 20 ]; + * size_t xReceivedBytes; + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + * + * // Receive the next stream from the stream buffer. + * xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer, + * ( void * ) ucRxData, + * sizeof( ucRxData ), + * &xHigherPriorityTaskWoken ); + * + * if( xReceivedBytes > 0 ) + * { + * // ucRxData contains xReceivedBytes read from the stream buffer. + * // Process the stream here.... + * } + * + * // If xHigherPriorityTaskWoken was set to pdTRUE inside + * // xStreamBufferReceiveFromISR() then a task that has a priority above the + * // priority of the currently executing task was unblocked and a context + * // switch should be performed to ensure the ISR returns to the unblocked + * // task. In most FreeRTOS ports this is done by simply passing + * // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the + * // variables value, and perform the context switch if necessary. Check the + * // documentation for the port in use for port specific instructions. + * taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + * } + * @endcode + * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, + void * pvRxData, + size_t xBufferLengthBytes, + BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ); + * @endcode + * + * Deletes a stream buffer that was previously created using a call to + * xStreamBufferCreate() or xStreamBufferCreateStatic(). If the stream + * buffer was created using dynamic memory (that is, by xStreamBufferCreate()), + * then the allocated memory is freed. + * + * A stream buffer handle must not be used after the stream buffer has been + * deleted. + * + * @param xStreamBuffer The handle of the stream buffer to be deleted. + * + * \defgroup vStreamBufferDelete vStreamBufferDelete + * \ingroup StreamBufferManagement + */ +void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ); + * @endcode + * + * Queries a stream buffer to see if it is full. A stream buffer is full if it + * does not have any free space, and therefore cannot accept any more data. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return If the stream buffer is full then pdTRUE is returned. Otherwise + * pdFALSE is returned. + * + * \defgroup xStreamBufferIsFull xStreamBufferIsFull + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ); + * @endcode + * + * Queries a stream buffer to see if it is empty. A stream buffer is empty if + * it does not contain any data. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return If the stream buffer is empty then pdTRUE is returned. Otherwise + * pdFALSE is returned. + * + * \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ); + * @endcode + * + * Resets a stream buffer to its initial, empty, state. Any data that was in + * the stream buffer is discarded. A stream buffer can only be reset if there + * are no tasks blocked waiting to either send to or receive from the stream + * buffer. + * + * @param xStreamBuffer The handle of the stream buffer being reset. + * + * @return If the stream buffer is reset then pdPASS is returned. If there was + * a task blocked waiting to send to or read from the stream buffer then the + * stream buffer is not reset and pdFAIL is returned. + * + * \defgroup xStreamBufferReset xStreamBufferReset + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ); + * @endcode + * + * Queries a stream buffer to see how much free space it contains, which is + * equal to the amount of data that can be sent to the stream buffer before it + * is full. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return The number of bytes that can be written to the stream buffer before + * the stream buffer would be full. + * + * \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ); + * @endcode + * + * Queries a stream buffer to see how much data it contains, which is equal to + * the number of bytes that can be read from the stream buffer before the stream + * buffer would be empty. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return The number of bytes that can be read from the stream buffer before + * the stream buffer would be empty. + * + * \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ); + * @endcode + * + * A stream buffer's trigger level is the number of bytes that must be in the + * stream buffer before a task that is blocked on the stream buffer to + * wait for data is moved out of the blocked state. For example, if a task is + * blocked on a read of an empty stream buffer that has a trigger level of 1 + * then the task will be unblocked when a single byte is written to the buffer + * or the task's block time expires. As another example, if a task is blocked + * on a read of an empty stream buffer that has a trigger level of 10 then the + * task will not be unblocked until the stream buffer contains at least 10 bytes + * or the task's block time expires. If a reading task's block time expires + * before the trigger level is reached then the task will still receive however + * many bytes are actually available. Setting a trigger level of 0 will result + * in a trigger level of 1 being used. It is not valid to specify a trigger + * level that is greater than the buffer size. + * + * A trigger level is set when the stream buffer is created, and can be modified + * using xStreamBufferSetTriggerLevel(). + * + * @param xStreamBuffer The handle of the stream buffer being updated. + * + * @param xTriggerLevel The new trigger level for the stream buffer. + * + * @return If xTriggerLevel was less than or equal to the stream buffer's length + * then the trigger level will be updated and pdTRUE is returned. Otherwise + * pdFALSE is returned. + * + * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, + size_t xTriggerLevel ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * For advanced users only. + * + * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is sent to a message buffer or stream buffer. If there was a task that + * was blocked on the message or stream buffer waiting for data to arrive then + * the sbSEND_COMPLETED() macro sends a notification to the task to remove it + * from the Blocked state. xStreamBufferSendCompletedFromISR() does the same + * thing. It is provided to enable application writers to implement their own + * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xStreamBuffer The handle of the stream buffer to which data was + * written. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xStreamBufferSendCompletedFromISR(). If calling + * xStreamBufferSendCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, + BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * + * @code{c} + * BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * For advanced users only. + * + * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is read out of a message buffer or stream buffer. If there was a task + * that was blocked on the message or stream buffer waiting for data to arrive + * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to + * remove it from the Blocked state. xStreamBufferReceiveCompletedFromISR() + * does the same thing. It is provided to enable application writers to + * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT + * ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xStreamBuffer The handle of the stream buffer from which data was + * read. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xStreamBufferReceiveCompletedFromISR(). If calling + * xStreamBufferReceiveCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, + BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/* Functions below here are not part of the public API. */ +StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION; + +StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer, + uint8_t * const pucStreamBufferStorageArea, + StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION; + +size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +#if ( configUSE_TRACE_FACILITY == 1 ) + void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, + UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION; + UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; +#endif + +/* *INDENT-OFF* */ +#if defined( __cplusplus ) + } +#endif +/* *INDENT-ON* */ + +#endif /* !defined( STREAM_BUFFER_H ) */ diff --git a/freertos/cvitek/install/include/kernel/task.h b/freertos/cvitek/install/include/kernel/task.h new file mode 100644 index 000000000..ec80cd9a9 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/task.h @@ -0,0 +1,3112 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +#ifndef INC_TASK_H +#define INC_TASK_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include task.h" +#endif + +#include "list.h" + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/*----------------------------------------------------------- +* MACROS AND DEFINITIONS +*----------------------------------------------------------*/ + +/* + * If tskKERNEL_VERSION_NUMBER ends with + it represents the version in development + * after the numbered release. + * + * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD + * values will reflect the last released version number. + */ +#define tskKERNEL_VERSION_NUMBER "V10.4.6" +#define tskKERNEL_VERSION_MAJOR 10 +#define tskKERNEL_VERSION_MINOR 4 +#define tskKERNEL_VERSION_BUILD 6 + +/* MPU region parameters passed in ulParameters + * of MemoryRegion_t struct. */ +#define tskMPU_REGION_READ_ONLY ( 1UL << 0UL ) +#define tskMPU_REGION_READ_WRITE ( 1UL << 1UL ) +#define tskMPU_REGION_EXECUTE_NEVER ( 1UL << 2UL ) +#define tskMPU_REGION_NORMAL_MEMORY ( 1UL << 3UL ) +#define tskMPU_REGION_DEVICE_MEMORY ( 1UL << 4UL ) + +/* The direct to task notification feature used to have only a single notification + * per task. Now there is an array of notifications per task that is dimensioned by + * configTASK_NOTIFICATION_ARRAY_ENTRIES. For backward compatibility, any use of the + * original direct to task notification defaults to using the first index in the + * array. */ +#define tskDEFAULT_INDEX_TO_NOTIFY ( 0 ) + +/** + * task. h + * + * Type by which tasks are referenced. For example, a call to xTaskCreate + * returns (via a pointer parameter) an TaskHandle_t variable that can then + * be used as a parameter to vTaskDelete to delete the task. + * + * \defgroup TaskHandle_t TaskHandle_t + * \ingroup Tasks + */ +struct tskTaskControlBlock; /* The old naming convention is used to prevent breaking kernel aware debuggers. */ +typedef struct tskTaskControlBlock * TaskHandle_t; + +/* + * Defines the prototype to which the application task hook function must + * conform. + */ +typedef BaseType_t (* TaskHookFunction_t)( void * ); + +/* Task states returned by eTaskGetState. */ +typedef enum +{ + eRunning = 0, /* A task is querying the state of itself, so must be running. */ + eReady, /* The task being queried is in a ready or pending ready list. */ + eBlocked, /* The task being queried is in the Blocked state. */ + eSuspended, /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */ + eDeleted, /* The task being queried has been deleted, but its TCB has not yet been freed. */ + eInvalid /* Used as an 'invalid state' value. */ +} eTaskState; + +/* Actions that can be performed when vTaskNotify() is called. */ +typedef enum +{ + eNoAction = 0, /* Notify the task without updating its notify value. */ + eSetBits, /* Set bits in the task's notification value. */ + eIncrement, /* Increment the task's notification value. */ + eSetValueWithOverwrite, /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */ + eSetValueWithoutOverwrite /* Set the task's notification value if the previous value has been read by the task. */ +} eNotifyAction; + +/* + * Used internally only. + */ +typedef struct xTIME_OUT +{ + BaseType_t xOverflowCount; + TickType_t xTimeOnEntering; +} TimeOut_t; + +/* + * Defines the memory ranges allocated to the task when an MPU is used. + */ +typedef struct xMEMORY_REGION +{ + void * pvBaseAddress; + uint32_t ulLengthInBytes; + uint32_t ulParameters; +} MemoryRegion_t; + +/* + * Parameters required to create an MPU protected task. + */ +typedef struct xTASK_PARAMETERS +{ + TaskFunction_t pvTaskCode; + const char * pcName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + configSTACK_DEPTH_TYPE usStackDepth; + void * pvParameters; + UBaseType_t uxPriority; + StackType_t * puxStackBuffer; + MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ]; + #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + StaticTask_t * const pxTaskBuffer; + #endif +} TaskParameters_t; + +/* Used with the uxTaskGetSystemState() function to return the state of each task + * in the system. */ +typedef struct xTASK_STATUS +{ + TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */ + const char * pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + UBaseType_t xTaskNumber; /* A number unique to the task. */ + eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */ + UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */ + UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */ + configRUN_TIME_COUNTER_TYPE ulRunTimeCounter; /* The total run time allocated to the task so far, as defined by the run time stats clock. See https://www.FreeRTOS.org/rtos-run-time-stats.html. Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */ + StackType_t * pxStackBase; /* Points to the lowest address of the task's stack area. */ + configSTACK_DEPTH_TYPE usStackHighWaterMark; /* The minimum amount of stack space that has remained for the task since the task was created. The closer this value is to zero the closer the task has come to overflowing its stack. */ +} TaskStatus_t; + +/* Possible return values for eTaskConfirmSleepModeStatus(). */ +typedef enum +{ + eAbortSleep = 0, /* A task has been made ready or a context switch pended since portSUPPRESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */ + eStandardSleep, /* Enter a sleep mode that will not last any longer than the expected idle time. */ + eNoTasksWaitingTimeout /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */ +} eSleepModeStatus; + +/** + * Defines the priority used by the idle task. This must not be modified. + * + * \ingroup TaskUtils + */ +#define tskIDLE_PRIORITY ( ( UBaseType_t ) 0U ) + +/** + * task. h + * + * Macro for forcing a context switch. + * + * \defgroup taskYIELD taskYIELD + * \ingroup SchedulerControl + */ +#define taskYIELD() portYIELD() + +/** + * task. h + * + * Macro to mark the start of a critical code region. Preemptive context + * switches cannot occur when in a critical region. + * + * NOTE: This may alter the stack (depending on the portable implementation) + * so must be used with care! + * + * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL + * \ingroup SchedulerControl + */ +#define taskENTER_CRITICAL() portENTER_CRITICAL() +#define taskENTER_CRITICAL_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() + +/** + * task. h + * + * Macro to mark the end of a critical code region. Preemptive context + * switches cannot occur when in a critical region. + * + * NOTE: This may alter the stack (depending on the portable implementation) + * so must be used with care! + * + * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL + * \ingroup SchedulerControl + */ +#define taskEXIT_CRITICAL() portEXIT_CRITICAL() +#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) + +/** + * task. h + * + * Macro to disable all maskable interrupts. + * + * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS + * \ingroup SchedulerControl + */ +#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() + +/** + * task. h + * + * Macro to enable microcontroller interrupts. + * + * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS + * \ingroup SchedulerControl + */ +#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() + +/* Definitions returned by xTaskGetSchedulerState(). taskSCHEDULER_SUSPENDED is + * 0 to generate more optimal code when configASSERT() is defined as the constant + * is used in assert() statements. */ +#define taskSCHEDULER_SUSPENDED ( ( BaseType_t ) 0 ) +#define taskSCHEDULER_NOT_STARTED ( ( BaseType_t ) 1 ) +#define taskSCHEDULER_RUNNING ( ( BaseType_t ) 2 ) + + +/*----------------------------------------------------------- +* TASK CREATION API +*----------------------------------------------------------*/ + +/** + * task. h + * @code{c} + * BaseType_t xTaskCreate( + * TaskFunction_t pxTaskCode, + * const char *pcName, + * configSTACK_DEPTH_TYPE usStackDepth, + * void *pvParameters, + * UBaseType_t uxPriority, + * TaskHandle_t *pxCreatedTask + * ); + * @endcode + * + * Create a new task and add it to the list of tasks that are ready to run. + * + * Internally, within the FreeRTOS implementation, tasks use two blocks of + * memory. The first block is used to hold the task's data structures. The + * second block is used by the task as its stack. If a task is created using + * xTaskCreate() then both blocks of memory are automatically dynamically + * allocated inside the xTaskCreate() function. (see + * https://www.FreeRTOS.org/a00111.html). If a task is created using + * xTaskCreateStatic() then the application writer must provide the required + * memory. xTaskCreateStatic() therefore allows a task to be created without + * using any dynamic memory allocation. + * + * See xTaskCreateStatic() for a version that does not use any dynamic memory + * allocation. + * + * xTaskCreate() can only be used to create a task that has unrestricted + * access to the entire microcontroller memory map. Systems that include MPU + * support can alternatively create an MPU constrained task using + * xTaskCreateRestricted(). + * + * @param pxTaskCode Pointer to the task entry function. Tasks + * must be implemented to never return (i.e. continuous loop). + * + * @param pcName A descriptive name for the task. This is mainly used to + * facilitate debugging. Max length defined by configMAX_TASK_NAME_LEN - default + * is 16. + * + * @param usStackDepth The size of the task stack specified as the number of + * variables the stack can hold - not the number of bytes. For example, if + * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes + * will be allocated for stack storage. + * + * @param pvParameters Pointer that will be used as the parameter for the task + * being created. + * + * @param uxPriority The priority at which the task should run. Systems that + * include MPU support can optionally create tasks in a privileged (system) + * mode by setting bit portPRIVILEGE_BIT of the priority parameter. For + * example, to create a privileged task at priority 2 the uxPriority parameter + * should be set to ( 2 | portPRIVILEGE_BIT ). + * + * @param pxCreatedTask Used to pass back a handle by which the created task + * can be referenced. + * + * @return pdPASS if the task was successfully created and added to a ready + * list, otherwise an error code defined in the file projdefs.h + * + * Example usage: + * @code{c} + * // Task to be created. + * void vTaskCode( void * pvParameters ) + * { + * for( ;; ) + * { + * // Task code goes here. + * } + * } + * + * // Function that creates a task. + * void vOtherFunction( void ) + * { + * static uint8_t ucParameterToPass; + * TaskHandle_t xHandle = NULL; + * + * // Create the task, storing the handle. Note that the passed parameter ucParameterToPass + * // must exist for the lifetime of the task, so in this case is declared static. If it was just an + * // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time + * // the new task attempts to access it. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle ); + * configASSERT( xHandle ); + * + * // Use the handle to delete the task. + * if( xHandle != NULL ) + * { + * vTaskDelete( xHandle ); + * } + * } + * @endcode + * \defgroup xTaskCreate xTaskCreate + * \ingroup Tasks + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + BaseType_t xTaskCreate( TaskFunction_t pxTaskCode, + const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const configSTACK_DEPTH_TYPE usStackDepth, + void * const pvParameters, + UBaseType_t uxPriority, + TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION; +#endif + +/** + * task. h + * @code{c} + * TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode, + * const char *pcName, + * uint32_t ulStackDepth, + * void *pvParameters, + * UBaseType_t uxPriority, + * StackType_t *puxStackBuffer, + * StaticTask_t *pxTaskBuffer ); + * @endcode + * + * Create a new task and add it to the list of tasks that are ready to run. + * + * Internally, within the FreeRTOS implementation, tasks use two blocks of + * memory. The first block is used to hold the task's data structures. The + * second block is used by the task as its stack. If a task is created using + * xTaskCreate() then both blocks of memory are automatically dynamically + * allocated inside the xTaskCreate() function. (see + * https://www.FreeRTOS.org/a00111.html). If a task is created using + * xTaskCreateStatic() then the application writer must provide the required + * memory. xTaskCreateStatic() therefore allows a task to be created without + * using any dynamic memory allocation. + * + * @param pxTaskCode Pointer to the task entry function. Tasks + * must be implemented to never return (i.e. continuous loop). + * + * @param pcName A descriptive name for the task. This is mainly used to + * facilitate debugging. The maximum length of the string is defined by + * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h. + * + * @param ulStackDepth The size of the task stack specified as the number of + * variables the stack can hold - not the number of bytes. For example, if + * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes + * will be allocated for stack storage. + * + * @param pvParameters Pointer that will be used as the parameter for the task + * being created. + * + * @param uxPriority The priority at which the task will run. + * + * @param puxStackBuffer Must point to a StackType_t array that has at least + * ulStackDepth indexes - the array will then be used as the task's stack, + * removing the need for the stack to be allocated dynamically. + * + * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will + * then be used to hold the task's data structures, removing the need for the + * memory to be allocated dynamically. + * + * @return If neither puxStackBuffer nor pxTaskBuffer are NULL, then the task + * will be created and a handle to the created task is returned. If either + * puxStackBuffer or pxTaskBuffer are NULL then the task will not be created and + * NULL is returned. + * + * Example usage: + * @code{c} + * + * // Dimensions of the buffer that the task being created will use as its stack. + * // NOTE: This is the number of words the stack will hold, not the number of + * // bytes. For example, if each stack item is 32-bits, and this is set to 100, + * // then 400 bytes (100 * 32-bits) will be allocated. + #define STACK_SIZE 200 + * + * // Structure that will hold the TCB of the task being created. + * StaticTask_t xTaskBuffer; + * + * // Buffer that the task being created will use as its stack. Note this is + * // an array of StackType_t variables. The size of StackType_t is dependent on + * // the RTOS port. + * StackType_t xStack[ STACK_SIZE ]; + * + * // Function that implements the task being created. + * void vTaskCode( void * pvParameters ) + * { + * // The parameter value is expected to be 1 as 1 is passed in the + * // pvParameters value in the call to xTaskCreateStatic(). + * configASSERT( ( uint32_t ) pvParameters == 1UL ); + * + * for( ;; ) + * { + * // Task code goes here. + * } + * } + * + * // Function that creates a task. + * void vOtherFunction( void ) + * { + * TaskHandle_t xHandle = NULL; + * + * // Create the task without using any dynamic memory allocation. + * xHandle = xTaskCreateStatic( + * vTaskCode, // Function that implements the task. + * "NAME", // Text name for the task. + * STACK_SIZE, // Stack size in words, not bytes. + * ( void * ) 1, // Parameter passed into the task. + * tskIDLE_PRIORITY,// Priority at which the task is created. + * xStack, // Array to use as the task's stack. + * &xTaskBuffer ); // Variable to hold the task's data structure. + * + * // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have + * // been created, and xHandle will be the task's handle. Use the handle + * // to suspend the task. + * vTaskSuspend( xHandle ); + * } + * @endcode + * \defgroup xTaskCreateStatic xTaskCreateStatic + * \ingroup Tasks + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode, + const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const uint32_t ulStackDepth, + void * const pvParameters, + UBaseType_t uxPriority, + StackType_t * const puxStackBuffer, + StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION; +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * task. h + * @code{c} + * BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask ); + * @endcode + * + * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1. + * + * xTaskCreateRestricted() should only be used in systems that include an MPU + * implementation. + * + * Create a new task and add it to the list of tasks that are ready to run. + * The function parameters define the memory regions and associated access + * permissions allocated to the task. + * + * See xTaskCreateRestrictedStatic() for a version that does not use any + * dynamic memory allocation. + * + * @param pxTaskDefinition Pointer to a structure that contains a member + * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API + * documentation) plus an optional stack buffer and the memory region + * definitions. + * + * @param pxCreatedTask Used to pass back a handle by which the created task + * can be referenced. + * + * @return pdPASS if the task was successfully created and added to a ready + * list, otherwise an error code defined in the file projdefs.h + * + * Example usage: + * @code{c} + * // Create an TaskParameters_t structure that defines the task to be created. + * static const TaskParameters_t xCheckTaskParameters = + * { + * vATask, // pvTaskCode - the function that implements the task. + * "ATask", // pcName - just a text name for the task to assist debugging. + * 100, // usStackDepth - the stack size DEFINED IN WORDS. + * NULL, // pvParameters - passed into the task function as the function parameters. + * ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state. + * cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack. + * + * // xRegions - Allocate up to three separate memory regions for access by + * // the task, with appropriate access permissions. Different processors have + * // different memory alignment requirements - refer to the FreeRTOS documentation + * // for full information. + * { + * // Base address Length Parameters + * { cReadWriteArray, 32, portMPU_REGION_READ_WRITE }, + * { cReadOnlyArray, 32, portMPU_REGION_READ_ONLY }, + * { cPrivilegedOnlyAccessArray, 128, portMPU_REGION_PRIVILEGED_READ_WRITE } + * } + * }; + * + * int main( void ) + * { + * TaskHandle_t xHandle; + * + * // Create a task from the const structure defined above. The task handle + * // is requested (the second parameter is not NULL) but in this case just for + * // demonstration purposes as its not actually used. + * xTaskCreateRestricted( &xRegTest1Parameters, &xHandle ); + * + * // Start the scheduler. + * vTaskStartScheduler(); + * + * // Will only get here if there was insufficient memory to create the idle + * // and/or timer task. + * for( ;; ); + * } + * @endcode + * \defgroup xTaskCreateRestricted xTaskCreateRestricted + * \ingroup Tasks + */ +#if ( portUSING_MPU_WRAPPERS == 1 ) + BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, + TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION; +#endif + +/** + * task. h + * @code{c} + * BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask ); + * @endcode + * + * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1. + * + * xTaskCreateRestrictedStatic() should only be used in systems that include an + * MPU implementation. + * + * Internally, within the FreeRTOS implementation, tasks use two blocks of + * memory. The first block is used to hold the task's data structures. The + * second block is used by the task as its stack. If a task is created using + * xTaskCreateRestricted() then the stack is provided by the application writer, + * and the memory used to hold the task's data structure is automatically + * dynamically allocated inside the xTaskCreateRestricted() function. If a task + * is created using xTaskCreateRestrictedStatic() then the application writer + * must provide the memory used to hold the task's data structures too. + * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be + * created without using any dynamic memory allocation. + * + * @param pxTaskDefinition Pointer to a structure that contains a member + * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API + * documentation) plus an optional stack buffer and the memory region + * definitions. If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure + * contains an additional member, which is used to point to a variable of type + * StaticTask_t - which is then used to hold the task's data structure. + * + * @param pxCreatedTask Used to pass back a handle by which the created task + * can be referenced. + * + * @return pdPASS if the task was successfully created and added to a ready + * list, otherwise an error code defined in the file projdefs.h + * + * Example usage: + * @code{c} + * // Create an TaskParameters_t structure that defines the task to be created. + * // The StaticTask_t variable is only included in the structure when + * // configSUPPORT_STATIC_ALLOCATION is set to 1. The PRIVILEGED_DATA macro can + * // be used to force the variable into the RTOS kernel's privileged data area. + * static PRIVILEGED_DATA StaticTask_t xTaskBuffer; + * static const TaskParameters_t xCheckTaskParameters = + * { + * vATask, // pvTaskCode - the function that implements the task. + * "ATask", // pcName - just a text name for the task to assist debugging. + * 100, // usStackDepth - the stack size DEFINED IN WORDS. + * NULL, // pvParameters - passed into the task function as the function parameters. + * ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state. + * cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack. + * + * // xRegions - Allocate up to three separate memory regions for access by + * // the task, with appropriate access permissions. Different processors have + * // different memory alignment requirements - refer to the FreeRTOS documentation + * // for full information. + * { + * // Base address Length Parameters + * { cReadWriteArray, 32, portMPU_REGION_READ_WRITE }, + * { cReadOnlyArray, 32, portMPU_REGION_READ_ONLY }, + * { cPrivilegedOnlyAccessArray, 128, portMPU_REGION_PRIVILEGED_READ_WRITE } + * } + * + * &xTaskBuffer; // Holds the task's data structure. + * }; + * + * int main( void ) + * { + * TaskHandle_t xHandle; + * + * // Create a task from the const structure defined above. The task handle + * // is requested (the second parameter is not NULL) but in this case just for + * // demonstration purposes as its not actually used. + * xTaskCreateRestricted( &xRegTest1Parameters, &xHandle ); + * + * // Start the scheduler. + * vTaskStartScheduler(); + * + * // Will only get here if there was insufficient memory to create the idle + * // and/or timer task. + * for( ;; ); + * } + * @endcode + * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic + * \ingroup Tasks + */ +#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, + TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION; +#endif + +/** + * task. h + * @code{c} + * void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ); + * @endcode + * + * Memory regions are assigned to a restricted task when the task is created by + * a call to xTaskCreateRestricted(). These regions can be redefined using + * vTaskAllocateMPURegions(). + * + * @param xTask The handle of the task being updated. + * + * @param xRegions A pointer to a MemoryRegion_t structure that contains the + * new memory region definitions. + * + * Example usage: + * @code{c} + * // Define an array of MemoryRegion_t structures that configures an MPU region + * // allowing read/write access for 1024 bytes starting at the beginning of the + * // ucOneKByte array. The other two of the maximum 3 definable regions are + * // unused so set to zero. + * static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] = + * { + * // Base address Length Parameters + * { ucOneKByte, 1024, portMPU_REGION_READ_WRITE }, + * { 0, 0, 0 }, + * { 0, 0, 0 } + * }; + * + * void vATask( void *pvParameters ) + * { + * // This task was created such that it has access to certain regions of + * // memory as defined by the MPU configuration. At some point it is + * // desired that these MPU regions are replaced with that defined in the + * // xAltRegions const struct above. Use a call to vTaskAllocateMPURegions() + * // for this purpose. NULL is used as the task handle to indicate that this + * // function should modify the MPU regions of the calling task. + * vTaskAllocateMPURegions( NULL, xAltRegions ); + * + * // Now the task can continue its function, but from this point on can only + * // access its stack and the ucOneKByte array (unless any other statically + * // defined or shared regions have been declared elsewhere). + * } + * @endcode + * \defgroup xTaskCreateRestricted xTaskCreateRestricted + * \ingroup Tasks + */ +void vTaskAllocateMPURegions( TaskHandle_t xTask, + const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskDelete( TaskHandle_t xTaskToDelete ); + * @endcode + * + * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Remove a task from the RTOS real time kernel's management. The task being + * deleted will be removed from all ready, blocked, suspended and event lists. + * + * NOTE: The idle task is responsible for freeing the kernel allocated + * memory from tasks that have been deleted. It is therefore important that + * the idle task is not starved of microcontroller processing time if your + * application makes any calls to vTaskDelete (). Memory allocated by the + * task code is not automatically freed, and should be freed before the task + * is deleted. + * + * See the demo application file death.c for sample code that utilises + * vTaskDelete (). + * + * @param xTaskToDelete The handle of the task to be deleted. Passing NULL will + * cause the calling task to be deleted. + * + * Example usage: + * @code{c} + * void vOtherFunction( void ) + * { + * TaskHandle_t xHandle; + * + * // Create the task, storing the handle. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + * + * // Use the handle to delete the task. + * vTaskDelete( xHandle ); + * } + * @endcode + * \defgroup vTaskDelete vTaskDelete + * \ingroup Tasks + */ +void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION; + +/*----------------------------------------------------------- +* TASK CONTROL API +*----------------------------------------------------------*/ + +/** + * task. h + * @code{c} + * void vTaskDelay( const TickType_t xTicksToDelay ); + * @endcode + * + * Delay a task for a given number of ticks. The actual time that the + * task remains blocked depends on the tick rate. The constant + * portTICK_PERIOD_MS can be used to calculate real time from the tick + * rate - with the resolution of one tick period. + * + * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * + * vTaskDelay() specifies a time at which the task wishes to unblock relative to + * the time at which vTaskDelay() is called. For example, specifying a block + * period of 100 ticks will cause the task to unblock 100 ticks after + * vTaskDelay() is called. vTaskDelay() does not therefore provide a good method + * of controlling the frequency of a periodic task as the path taken through the + * code, as well as other task and interrupt activity, will affect the frequency + * at which vTaskDelay() gets called and therefore the time at which the task + * next executes. See xTaskDelayUntil() for an alternative API function designed + * to facilitate fixed frequency execution. It does this by specifying an + * absolute time (rather than a relative time) at which the calling task should + * unblock. + * + * @param xTicksToDelay The amount of time, in tick periods, that + * the calling task should block. + * + * Example usage: + * + * void vTaskFunction( void * pvParameters ) + * { + * // Block for 500ms. + * const TickType_t xDelay = 500 / portTICK_PERIOD_MS; + * + * for( ;; ) + * { + * // Simply toggle the LED every 500ms, blocking between each toggle. + * vToggleLED(); + * vTaskDelay( xDelay ); + * } + * } + * + * \defgroup vTaskDelay vTaskDelay + * \ingroup TaskCtrl + */ +void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * BaseType_t xTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement ); + * @endcode + * + * INCLUDE_xTaskDelayUntil must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Delay a task until a specified time. This function can be used by periodic + * tasks to ensure a constant execution frequency. + * + * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will + * cause a task to block for the specified number of ticks from the time vTaskDelay () is + * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed + * execution frequency as the time between a task starting to execute and that task + * calling vTaskDelay () may not be fixed [the task may take a different path though the + * code between calls, or may get interrupted or preempted a different number of times + * each time it executes]. + * + * Whereas vTaskDelay () specifies a wake time relative to the time at which the function + * is called, xTaskDelayUntil () specifies the absolute (exact) time at which it wishes to + * unblock. + * + * The macro pdMS_TO_TICKS() can be used to calculate the number of ticks from a + * time specified in milliseconds with a resolution of one tick period. + * + * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the + * task was last unblocked. The variable must be initialised with the current time + * prior to its first use (see the example below). Following this the variable is + * automatically updated within xTaskDelayUntil (). + * + * @param xTimeIncrement The cycle time period. The task will be unblocked at + * time *pxPreviousWakeTime + xTimeIncrement. Calling xTaskDelayUntil with the + * same xTimeIncrement parameter value will cause the task to execute with + * a fixed interface period. + * + * @return Value which can be used to check whether the task was actually delayed. + * Will be pdTRUE if the task way delayed and pdFALSE otherwise. A task will not + * be delayed if the next expected wake time is in the past. + * + * Example usage: + * @code{c} + * // Perform an action every 10 ticks. + * void vTaskFunction( void * pvParameters ) + * { + * TickType_t xLastWakeTime; + * const TickType_t xFrequency = 10; + * BaseType_t xWasDelayed; + * + * // Initialise the xLastWakeTime variable with the current time. + * xLastWakeTime = xTaskGetTickCount (); + * for( ;; ) + * { + * // Wait for the next cycle. + * xWasDelayed = xTaskDelayUntil( &xLastWakeTime, xFrequency ); + * + * // Perform action here. xWasDelayed value can be used to determine + * // whether a deadline was missed if the code here took too long. + * } + * } + * @endcode + * \defgroup xTaskDelayUntil xTaskDelayUntil + * \ingroup TaskCtrl + */ +BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, + const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION; + +/* + * vTaskDelayUntil() is the older version of xTaskDelayUntil() and does not + * return a value. + */ +#define vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ) \ + { \ + ( void ) xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); \ + } + + +/** + * task. h + * @code{c} + * BaseType_t xTaskAbortDelay( TaskHandle_t xTask ); + * @endcode + * + * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this + * function to be available. + * + * A task will enter the Blocked state when it is waiting for an event. The + * event it is waiting for can be a temporal event (waiting for a time), such + * as when vTaskDelay() is called, or an event on an object, such as when + * xQueueReceive() or ulTaskNotifyTake() is called. If the handle of a task + * that is in the Blocked state is used in a call to xTaskAbortDelay() then the + * task will leave the Blocked state, and return from whichever function call + * placed the task into the Blocked state. + * + * There is no 'FromISR' version of this function as an interrupt would need to + * know which object a task was blocked on in order to know which actions to + * take. For example, if the task was blocked on a queue the interrupt handler + * would then need to know if the queue was locked. + * + * @param xTask The handle of the task to remove from the Blocked state. + * + * @return If the task referenced by xTask was not in the Blocked state then + * pdFAIL is returned. Otherwise pdPASS is returned. + * + * \defgroup xTaskAbortDelay xTaskAbortDelay + * \ingroup TaskCtrl + */ +BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ); + * @endcode + * + * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Obtain the priority of any task. + * + * @param xTask Handle of the task to be queried. Passing a NULL + * handle results in the priority of the calling task being returned. + * + * @return The priority of xTask. + * + * Example usage: + * @code{c} + * void vAFunction( void ) + * { + * TaskHandle_t xHandle; + * + * // Create a task, storing the handle. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + * + * // ... + * + * // Use the handle to obtain the priority of the created task. + * // It was created with tskIDLE_PRIORITY, but may have changed + * // it itself. + * if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY ) + * { + * // The task has changed it's priority. + * } + * + * // ... + * + * // Is our priority higher than the created task? + * if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) ) + * { + * // Our priority (obtained using NULL handle) is higher. + * } + * } + * @endcode + * \defgroup uxTaskPriorityGet uxTaskPriorityGet + * \ingroup TaskCtrl + */ +UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ); + * @endcode + * + * A version of uxTaskPriorityGet() that can be used from an ISR. + */ +UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * eTaskState eTaskGetState( TaskHandle_t xTask ); + * @endcode + * + * INCLUDE_eTaskGetState must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Obtain the state of any task. States are encoded by the eTaskState + * enumerated type. + * + * @param xTask Handle of the task to be queried. + * + * @return The state of xTask at the time the function was called. Note the + * state of the task might change between the function being called, and the + * functions return value being tested by the calling task. + */ +eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ); + * @endcode + * + * configUSE_TRACE_FACILITY must be defined as 1 for this function to be + * available. See the configuration section for more information. + * + * Populates a TaskStatus_t structure with information about a task. + * + * @param xTask Handle of the task being queried. If xTask is NULL then + * information will be returned about the calling task. + * + * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be + * filled with information about the task referenced by the handle passed using + * the xTask parameter. + * + * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report + * the stack high water mark of the task being queried. Calculating the stack + * high water mark takes a relatively long time, and can make the system + * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to + * allow the high water mark checking to be skipped. The high watermark value + * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is + * not set to pdFALSE; + * + * @param eState The TaskStatus_t structure contains a member to report the + * state of the task being queried. Obtaining the task state is not as fast as + * a simple assignment - so the eState parameter is provided to allow the state + * information to be omitted from the TaskStatus_t structure. To obtain state + * information then set eState to eInvalid - otherwise the value passed in + * eState will be reported as the task state in the TaskStatus_t structure. + * + * Example usage: + * @code{c} + * void vAFunction( void ) + * { + * TaskHandle_t xHandle; + * TaskStatus_t xTaskDetails; + * + * // Obtain the handle of a task from its name. + * xHandle = xTaskGetHandle( "Task_Name" ); + * + * // Check the handle is not NULL. + * configASSERT( xHandle ); + * + * // Use the handle to obtain further information about the task. + * vTaskGetInfo( xHandle, + * &xTaskDetails, + * pdTRUE, // Include the high water mark in xTaskDetails. + * eInvalid ); // Include the task state in xTaskDetails. + * } + * @endcode + * \defgroup vTaskGetInfo vTaskGetInfo + * \ingroup TaskCtrl + */ +void vTaskGetInfo( TaskHandle_t xTask, + TaskStatus_t * pxTaskStatus, + BaseType_t xGetFreeStackSpace, + eTaskState eState ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ); + * @endcode + * + * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Set the priority of any task. + * + * A context switch will occur before the function returns if the priority + * being set is higher than the currently executing task. + * + * @param xTask Handle to the task for which the priority is being set. + * Passing a NULL handle results in the priority of the calling task being set. + * + * @param uxNewPriority The priority to which the task will be set. + * + * Example usage: + * @code{c} + * void vAFunction( void ) + * { + * TaskHandle_t xHandle; + * + * // Create a task, storing the handle. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + * + * // ... + * + * // Use the handle to raise the priority of the created task. + * vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 ); + * + * // ... + * + * // Use a NULL handle to raise our priority to the same value. + * vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 ); + * } + * @endcode + * \defgroup vTaskPrioritySet vTaskPrioritySet + * \ingroup TaskCtrl + */ +void vTaskPrioritySet( TaskHandle_t xTask, + UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskSuspend( TaskHandle_t xTaskToSuspend ); + * @endcode + * + * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Suspend any task. When suspended a task will never get any microcontroller + * processing time, no matter what its priority. + * + * Calls to vTaskSuspend are not accumulative - + * i.e. calling vTaskSuspend () twice on the same task still only requires one + * call to vTaskResume () to ready the suspended task. + * + * @param xTaskToSuspend Handle to the task being suspended. Passing a NULL + * handle will cause the calling task to be suspended. + * + * Example usage: + * @code{c} + * void vAFunction( void ) + * { + * TaskHandle_t xHandle; + * + * // Create a task, storing the handle. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + * + * // ... + * + * // Use the handle to suspend the created task. + * vTaskSuspend( xHandle ); + * + * // ... + * + * // The created task will not run during this period, unless + * // another task calls vTaskResume( xHandle ). + * + * //... + * + * + * // Suspend ourselves. + * vTaskSuspend( NULL ); + * + * // We cannot get here unless another task calls vTaskResume + * // with our handle as the parameter. + * } + * @endcode + * \defgroup vTaskSuspend vTaskSuspend + * \ingroup TaskCtrl + */ +void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskResume( TaskHandle_t xTaskToResume ); + * @endcode + * + * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Resumes a suspended task. + * + * A task that has been suspended by one or more calls to vTaskSuspend () + * will be made available for running again by a single call to + * vTaskResume (). + * + * @param xTaskToResume Handle to the task being readied. + * + * Example usage: + * @code{c} + * void vAFunction( void ) + * { + * TaskHandle_t xHandle; + * + * // Create a task, storing the handle. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + * + * // ... + * + * // Use the handle to suspend the created task. + * vTaskSuspend( xHandle ); + * + * // ... + * + * // The created task will not run during this period, unless + * // another task calls vTaskResume( xHandle ). + * + * //... + * + * + * // Resume the suspended task ourselves. + * vTaskResume( xHandle ); + * + * // The created task will once again get microcontroller processing + * // time in accordance with its priority within the system. + * } + * @endcode + * \defgroup vTaskResume vTaskResume + * \ingroup TaskCtrl + */ +void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void xTaskResumeFromISR( TaskHandle_t xTaskToResume ); + * @endcode + * + * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be + * available. See the configuration section for more information. + * + * An implementation of vTaskResume() that can be called from within an ISR. + * + * A task that has been suspended by one or more calls to vTaskSuspend () + * will be made available for running again by a single call to + * xTaskResumeFromISR (). + * + * xTaskResumeFromISR() should not be used to synchronise a task with an + * interrupt if there is a chance that the interrupt could arrive prior to the + * task being suspended - as this can lead to interrupts being missed. Use of a + * semaphore as a synchronisation mechanism would avoid this eventuality. + * + * @param xTaskToResume Handle to the task being readied. + * + * @return pdTRUE if resuming the task should result in a context switch, + * otherwise pdFALSE. This is used by the ISR to determine if a context switch + * may be required following the ISR. + * + * \defgroup vTaskResumeFromISR vTaskResumeFromISR + * \ingroup TaskCtrl + */ +BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; + +/*----------------------------------------------------------- +* SCHEDULER CONTROL +*----------------------------------------------------------*/ + +/** + * task. h + * @code{c} + * void vTaskStartScheduler( void ); + * @endcode + * + * Starts the real time kernel tick processing. After calling the kernel + * has control over which tasks are executed and when. + * + * See the demo application file main.c for an example of creating + * tasks and starting the kernel. + * + * Example usage: + * @code{c} + * void vAFunction( void ) + * { + * // Create at least one task before starting the kernel. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + * + * // Start the real time kernel with preemption. + * vTaskStartScheduler (); + * + * // Will not get here unless a task calls vTaskEndScheduler () + * } + * @endcode + * + * \defgroup vTaskStartScheduler vTaskStartScheduler + * \ingroup SchedulerControl + */ +void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskEndScheduler( void ); + * @endcode + * + * NOTE: At the time of writing only the x86 real mode port, which runs on a PC + * in place of DOS, implements this function. + * + * Stops the real time kernel tick. All created tasks will be automatically + * deleted and multitasking (either preemptive or cooperative) will + * stop. Execution then resumes from the point where vTaskStartScheduler () + * was called, as if vTaskStartScheduler () had just returned. + * + * See the demo application file main. c in the demo/PC directory for an + * example that uses vTaskEndScheduler (). + * + * vTaskEndScheduler () requires an exit function to be defined within the + * portable layer (see vPortEndScheduler () in port. c for the PC port). This + * performs hardware specific operations such as stopping the kernel tick. + * + * vTaskEndScheduler () will cause all of the resources allocated by the + * kernel to be freed - but will not free resources allocated by application + * tasks. + * + * Example usage: + * @code{c} + * void vTaskCode( void * pvParameters ) + * { + * for( ;; ) + * { + * // Task code goes here. + * + * // At some point we want to end the real time kernel processing + * // so call ... + * vTaskEndScheduler (); + * } + * } + * + * void vAFunction( void ) + * { + * // Create at least one task before starting the kernel. + * xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + * + * // Start the real time kernel with preemption. + * vTaskStartScheduler (); + * + * // Will only get here when the vTaskCode () task has called + * // vTaskEndScheduler (). When we get here we are back to single task + * // execution. + * } + * @endcode + * + * \defgroup vTaskEndScheduler vTaskEndScheduler + * \ingroup SchedulerControl + */ +void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskSuspendAll( void ); + * @endcode + * + * Suspends the scheduler without disabling interrupts. Context switches will + * not occur while the scheduler is suspended. + * + * After calling vTaskSuspendAll () the calling task will continue to execute + * without risk of being swapped out until a call to xTaskResumeAll () has been + * made. + * + * API functions that have the potential to cause a context switch (for example, + * xTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler + * is suspended. + * + * Example usage: + * @code{c} + * void vTask1( void * pvParameters ) + * { + * for( ;; ) + * { + * // Task code goes here. + * + * // ... + * + * // At some point the task wants to perform a long operation during + * // which it does not want to get swapped out. It cannot use + * // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the + * // operation may cause interrupts to be missed - including the + * // ticks. + * + * // Prevent the real time kernel swapping out the task. + * vTaskSuspendAll (); + * + * // Perform the operation here. There is no need to use critical + * // sections as we have all the microcontroller processing time. + * // During this time interrupts will still operate and the kernel + * // tick count will be maintained. + * + * // ... + * + * // The operation is complete. Restart the kernel. + * xTaskResumeAll (); + * } + * } + * @endcode + * \defgroup vTaskSuspendAll vTaskSuspendAll + * \ingroup SchedulerControl + */ +void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * BaseType_t xTaskResumeAll( void ); + * @endcode + * + * Resumes scheduler activity after it was suspended by a call to + * vTaskSuspendAll(). + * + * xTaskResumeAll() only resumes the scheduler. It does not unsuspend tasks + * that were previously suspended by a call to vTaskSuspend(). + * + * @return If resuming the scheduler caused a context switch then pdTRUE is + * returned, otherwise pdFALSE is returned. + * + * Example usage: + * @code{c} + * void vTask1( void * pvParameters ) + * { + * for( ;; ) + * { + * // Task code goes here. + * + * // ... + * + * // At some point the task wants to perform a long operation during + * // which it does not want to get swapped out. It cannot use + * // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the + * // operation may cause interrupts to be missed - including the + * // ticks. + * + * // Prevent the real time kernel swapping out the task. + * vTaskSuspendAll (); + * + * // Perform the operation here. There is no need to use critical + * // sections as we have all the microcontroller processing time. + * // During this time interrupts will still operate and the real + * // time kernel tick count will be maintained. + * + * // ... + * + * // The operation is complete. Restart the kernel. We want to force + * // a context switch - but there is no point if resuming the scheduler + * // caused a context switch already. + * if( !xTaskResumeAll () ) + * { + * taskYIELD (); + * } + * } + * } + * @endcode + * \defgroup xTaskResumeAll xTaskResumeAll + * \ingroup SchedulerControl + */ +BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION; + +/*----------------------------------------------------------- +* TASK UTILITIES +*----------------------------------------------------------*/ + +/** + * task. h + * @code{c} + * TickType_t xTaskGetTickCount( void ); + * @endcode + * + * @return The count of ticks since vTaskStartScheduler was called. + * + * \defgroup xTaskGetTickCount xTaskGetTickCount + * \ingroup TaskUtils + */ +TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * TickType_t xTaskGetTickCountFromISR( void ); + * @endcode + * + * @return The count of ticks since vTaskStartScheduler was called. + * + * This is a version of xTaskGetTickCount() that is safe to be called from an + * ISR - provided that TickType_t is the natural word size of the + * microcontroller being used or interrupt nesting is either not supported or + * not being used. + * + * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR + * \ingroup TaskUtils + */ +TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * uint16_t uxTaskGetNumberOfTasks( void ); + * @endcode + * + * @return The number of tasks that the real time kernel is currently managing. + * This includes all ready, blocked and suspended tasks. A task that + * has been deleted but not yet freed by the idle task will also be + * included in the count. + * + * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks + * \ingroup TaskUtils + */ +UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * char *pcTaskGetName( TaskHandle_t xTaskToQuery ); + * @endcode + * + * @return The text (human readable) name of the task referenced by the handle + * xTaskToQuery. A task can query its own name by either passing in its own + * handle, or by setting xTaskToQuery to NULL. + * + * \defgroup pcTaskGetName pcTaskGetName + * \ingroup TaskUtils + */ +char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task. h + * @code{c} + * TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ); + * @endcode + * + * NOTE: This function takes a relatively long time to complete and should be + * used sparingly. + * + * @return The handle of the task that has the human readable name pcNameToQuery. + * NULL is returned if no matching name is found. INCLUDE_xTaskGetHandle + * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available. + * + * \defgroup pcTaskGetHandle pcTaskGetHandle + * \ingroup TaskUtils + */ +TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task.h + * @code{c} + * UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ); + * @endcode + * + * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for + * this function to be available. + * + * Returns the high water mark of the stack associated with xTask. That is, + * the minimum free stack space there has been (in words, so on a 32 bit machine + * a value of 1 means 4 bytes) since the task started. The smaller the returned + * number the closer the task has come to overflowing its stack. + * + * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the + * same except for their return type. Using configSTACK_DEPTH_TYPE allows the + * user to determine the return type. It gets around the problem of the value + * overflowing on 8-bit types without breaking backward compatibility for + * applications that expect an 8-bit return type. + * + * @param xTask Handle of the task associated with the stack to be checked. + * Set xTask to NULL to check the stack of the calling task. + * + * @return The smallest amount of free stack space there has been (in words, so + * actual spaces on the stack rather than bytes) since the task referenced by + * xTask was created. + */ +UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task.h + * @code{c} + * configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ); + * @endcode + * + * INCLUDE_uxTaskGetStackHighWaterMark2 must be set to 1 in FreeRTOSConfig.h for + * this function to be available. + * + * Returns the high water mark of the stack associated with xTask. That is, + * the minimum free stack space there has been (in words, so on a 32 bit machine + * a value of 1 means 4 bytes) since the task started. The smaller the returned + * number the closer the task has come to overflowing its stack. + * + * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the + * same except for their return type. Using configSTACK_DEPTH_TYPE allows the + * user to determine the return type. It gets around the problem of the value + * overflowing on 8-bit types without breaking backward compatibility for + * applications that expect an 8-bit return type. + * + * @param xTask Handle of the task associated with the stack to be checked. + * Set xTask to NULL to check the stack of the calling task. + * + * @return The smallest amount of free stack space there has been (in words, so + * actual spaces on the stack rather than bytes) since the task referenced by + * xTask was created. + */ +configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/* When using trace macros it is sometimes necessary to include task.h before + * FreeRTOS.h. When this is done TaskHookFunction_t will not yet have been defined, + * so the following two prototypes will cause a compilation error. This can be + * fixed by simply guarding against the inclusion of these two prototypes unless + * they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration + * constant. */ +#ifdef configUSE_APPLICATION_TASK_TAG + #if configUSE_APPLICATION_TASK_TAG == 1 + +/** + * task.h + * @code{c} + * void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ); + * @endcode + * + * Sets pxHookFunction to be the task hook function used by the task xTask. + * Passing xTask as NULL has the effect of setting the calling tasks hook + * function. + */ + void vTaskSetApplicationTaskTag( TaskHandle_t xTask, + TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION; + +/** + * task.h + * @code{c} + * void xTaskGetApplicationTaskTag( TaskHandle_t xTask ); + * @endcode + * + * Returns the pxHookFunction value assigned to the task xTask. Do not + * call from an interrupt service routine - call + * xTaskGetApplicationTaskTagFromISR() instead. + */ + TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task.h + * @code{c} + * void xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ); + * @endcode + * + * Returns the pxHookFunction value assigned to the task xTask. Can + * be called from an interrupt service routine. + */ + TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + #endif /* configUSE_APPLICATION_TASK_TAG ==1 */ +#endif /* ifdef configUSE_APPLICATION_TASK_TAG */ + +#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) + +/* Each task contains an array of pointers that is dimensioned by the + * configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h. The + * kernel does not use the pointers itself, so the application writer can use + * the pointers for any purpose they wish. The following two functions are + * used to set and query a pointer respectively. */ + void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, + BaseType_t xIndex, + void * pvValue ) PRIVILEGED_FUNCTION; + void * pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, + BaseType_t xIndex ) PRIVILEGED_FUNCTION; + +#endif + +#if ( configCHECK_FOR_STACK_OVERFLOW > 0 ) + +/** + * task.h + * @code{c} + * void vApplicationStackOverflowHook( TaskHandle_t xTask char *pcTaskName); + * @endcode + * + * The application stack overflow hook is called when a stack overflow is detected for a task. + * + * Details on stack overflow detection can be found here: https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html + * + * @param xTask the task that just exceeded its stack boundaries. + * @param pcTaskName A character string containing the name of the offending task. + */ + void vApplicationStackOverflowHook( TaskHandle_t xTask, + char * pcTaskName ); + +#endif + +#if ( configUSE_TICK_HOOK > 0 ) + +/** + * task.h + * @code{c} + * void vApplicationTickHook( void ); + * @endcode + * + * This hook function is called in the system tick handler after any OS work is completed. + */ + void vApplicationTickHook( void ); /*lint !e526 Symbol not defined as it is an application callback. */ + +#endif + +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + +/** + * task.h + * @code{c} + * void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) + * @endcode + * + * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Task TCB. This function is required when + * configSUPPORT_STATIC_ALLOCATION is set. For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION + * + * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer + * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for the idle task + * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer + */ + void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, + StackType_t ** ppxIdleTaskStackBuffer, + uint32_t * pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */ +#endif + +/** + * task.h + * @code{c} + * BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ); + * @endcode + * + * Calls the hook function associated with xTask. Passing xTask as NULL has + * the effect of calling the Running tasks (the calling task) hook function. + * + * pvParameter is passed to the hook function for the task to interpret as it + * wants. The return value is the value returned by the task hook function + * registered by the user. + */ +BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, + void * pvParameter ) PRIVILEGED_FUNCTION; + +/** + * xTaskGetIdleTaskHandle() is only available if + * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h. + * + * Simply returns the handle of the idle task. It is not valid to call + * xTaskGetIdleTaskHandle() before the scheduler has been started. + */ +TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION; + +/** + * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for + * uxTaskGetSystemState() to be available. + * + * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in + * the system. TaskStatus_t structures contain, among other things, members + * for the task handle, task name, task priority, task state, and total amount + * of run time consumed by the task. See the TaskStatus_t structure + * definition in this file for the full member list. + * + * NOTE: This function is intended for debugging use only as its use results in + * the scheduler remaining suspended for an extended period. + * + * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures. + * The array must contain at least one TaskStatus_t structure for each task + * that is under the control of the RTOS. The number of tasks under the control + * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function. + * + * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray + * parameter. The size is specified as the number of indexes in the array, or + * the number of TaskStatus_t structures contained in the array, not by the + * number of bytes in the array. + * + * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in + * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the + * total run time (as defined by the run time stats clock, see + * https://www.FreeRTOS.org/rtos-run-time-stats.html) since the target booted. + * pulTotalRunTime can be set to NULL to omit the total run time information. + * + * @return The number of TaskStatus_t structures that were populated by + * uxTaskGetSystemState(). This should equal the number returned by the + * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed + * in the uxArraySize parameter was too small. + * + * Example usage: + * @code{c} + * // This example demonstrates how a human readable table of run time stats + * // information is generated from raw data provided by uxTaskGetSystemState(). + * // The human readable table is written to pcWriteBuffer + * void vTaskGetRunTimeStats( char *pcWriteBuffer ) + * { + * TaskStatus_t *pxTaskStatusArray; + * volatile UBaseType_t uxArraySize, x; + * configRUN_TIME_COUNTER_TYPE ulTotalRunTime, ulStatsAsPercentage; + * + * // Make sure the write buffer does not contain a string. + * pcWriteBuffer = 0x00; + * + * // Take a snapshot of the number of tasks in case it changes while this + * // function is executing. + * uxArraySize = uxTaskGetNumberOfTasks(); + * + * // Allocate a TaskStatus_t structure for each task. An array could be + * // allocated statically at compile time. + * pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) ); + * + * if( pxTaskStatusArray != NULL ) + * { + * // Generate raw status information about each task. + * uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime ); + * + * // For percentage calculations. + * ulTotalRunTime /= 100UL; + * + * // Avoid divide by zero errors. + * if( ulTotalRunTime > 0 ) + * { + * // For each populated position in the pxTaskStatusArray array, + * // format the raw data as human readable ASCII data + * for( x = 0; x < uxArraySize; x++ ) + * { + * // What percentage of the total run time has the task used? + * // This will always be rounded down to the nearest integer. + * // ulTotalRunTimeDiv100 has already been divided by 100. + * ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime; + * + * if( ulStatsAsPercentage > 0UL ) + * { + * sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage ); + * } + * else + * { + * // If the percentage is zero here then the task has + * // consumed less than 1% of the total run time. + * sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter ); + * } + * + * pcWriteBuffer += strlen( ( char * ) pcWriteBuffer ); + * } + * } + * + * // The array is no longer needed, free the memory it consumes. + * vPortFree( pxTaskStatusArray ); + * } + * } + * @endcode + */ +UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, + const UBaseType_t uxArraySize, + configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * void vTaskList( char *pcWriteBuffer ); + * @endcode + * + * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must + * both be defined as 1 for this function to be available. See the + * configuration section of the FreeRTOS.org website for more information. + * + * NOTE 1: This function will disable interrupts for its duration. It is + * not intended for normal application runtime use but as a debug aid. + * + * Lists all the current tasks, along with their current state and stack + * usage high water mark. + * + * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or + * suspended ('S'). + * + * PLEASE NOTE: + * + * This function is provided for convenience only, and is used by many of the + * demo applications. Do not consider it to be part of the scheduler. + * + * vTaskList() calls uxTaskGetSystemState(), then formats part of the + * uxTaskGetSystemState() output into a human readable table that displays task: + * names, states, priority, stack usage and task number. + * Stack usage specified as the number of unused StackType_t words stack can hold + * on top of stack - not the number of bytes. + * + * vTaskList() has a dependency on the sprintf() C library function that might + * bloat the code size, use a lot of stack, and provide different results on + * different platforms. An alternative, tiny, third party, and limited + * functionality implementation of sprintf() is provided in many of the + * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note + * printf-stdarg.c does not provide a full snprintf() implementation!). + * + * It is recommended that production systems call uxTaskGetSystemState() + * directly to get access to raw stats data, rather than indirectly through a + * call to vTaskList(). + * + * @param pcWriteBuffer A buffer into which the above mentioned details + * will be written, in ASCII form. This buffer is assumed to be large + * enough to contain the generated report. Approximately 40 bytes per + * task should be sufficient. + * + * \defgroup vTaskList vTaskList + * \ingroup TaskUtils + */ +void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task. h + * @code{c} + * void vTaskGetRunTimeStats( char *pcWriteBuffer ); + * @endcode + * + * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS + * must both be defined as 1 for this function to be available. The application + * must also then provide definitions for + * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE() + * to configure a peripheral timer/counter and return the timers current count + * value respectively. The counter should be at least 10 times the frequency of + * the tick count. + * + * NOTE 1: This function will disable interrupts for its duration. It is + * not intended for normal application runtime use but as a debug aid. + * + * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total + * accumulated execution time being stored for each task. The resolution + * of the accumulated time value depends on the frequency of the timer + * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro. + * Calling vTaskGetRunTimeStats() writes the total execution time of each + * task into a buffer, both as an absolute count value and as a percentage + * of the total system execution time. + * + * NOTE 2: + * + * This function is provided for convenience only, and is used by many of the + * demo applications. Do not consider it to be part of the scheduler. + * + * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the + * uxTaskGetSystemState() output into a human readable table that displays the + * amount of time each task has spent in the Running state in both absolute and + * percentage terms. + * + * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function + * that might bloat the code size, use a lot of stack, and provide different + * results on different platforms. An alternative, tiny, third party, and + * limited functionality implementation of sprintf() is provided in many of the + * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note + * printf-stdarg.c does not provide a full snprintf() implementation!). + * + * It is recommended that production systems call uxTaskGetSystemState() directly + * to get access to raw stats data, rather than indirectly through a call to + * vTaskGetRunTimeStats(). + * + * @param pcWriteBuffer A buffer into which the execution times will be + * written, in ASCII form. This buffer is assumed to be large enough to + * contain the generated report. Approximately 40 bytes per task should + * be sufficient. + * + * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats + * \ingroup TaskUtils + */ +void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task. h + * @code{c} + * configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimeCounter( void ); + * configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimePercent( void ); + * @endcode + * + * configGENERATE_RUN_TIME_STATS, configUSE_STATS_FORMATTING_FUNCTIONS and + * INCLUDE_xTaskGetIdleTaskHandle must all be defined as 1 for these functions + * to be available. The application must also then provide definitions for + * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE() + * to configure a peripheral timer/counter and return the timers current count + * value respectively. The counter should be at least 10 times the frequency of + * the tick count. + * + * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total + * accumulated execution time being stored for each task. The resolution + * of the accumulated time value depends on the frequency of the timer + * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro. + * While uxTaskGetSystemState() and vTaskGetRunTimeStats() writes the total + * execution time of each task into a buffer, ulTaskGetIdleRunTimeCounter() + * returns the total execution time of just the idle task and + * ulTaskGetIdleRunTimePercent() returns the percentage of the CPU time used by + * just the idle task. + * + * Note the amount of idle time is only a good measure of the slack time in a + * system if there are no other tasks executing at the idle priority, tickless + * idle is not used, and configIDLE_SHOULD_YIELD is set to 0. + * + * @return The total run time of the idle task or the percentage of the total + * run time consumed by the idle task. This is the amount of time the + * idle task has actually been executing. The unit of time is dependent on the + * frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and + * portGET_RUN_TIME_COUNTER_VALUE() macros. + * + * \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter + * \ingroup TaskUtils + */ +configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION; +configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimePercent( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + * @code{c} + * BaseType_t xTaskNotifyIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction ); + * BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction ); + * @endcode + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these + * functions to be available. + * + * Sends a direct to task notification to a task, with an optional value and + * action. + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment one of the task's notification values. In + * that way task notifications can be used to send data to a task, or be used as + * light weight and fast binary or counting semaphores. + * + * A task can use xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() to + * [optionally] block to wait for a notification to be pending. The task does + * not consume any CPU time while it is in the Blocked state. + * + * A notification sent to a task will remain pending until it is cleared by the + * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their + * un-indexed equivalents). If the task was already in the Blocked state to + * wait for a notification when the notification arrives then the task will + * automatically be removed from the Blocked state (unblocked) and the + * notification cleared. + * + * **NOTE** Each notification within the array operates independently - a task + * can only block on one notification within the array at a time and will not be + * unblocked by a notification sent to any other array index. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. xTaskNotify() is the original API function, and remains backward + * compatible by always operating on the notification value at index 0 in the + * array. Calling xTaskNotify() is equivalent to calling xTaskNotifyIndexed() + * with the uxIndexToNotify parameter set to 0. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @param uxIndexToNotify The index within the target task's array of + * notification values to which the notification is to be sent. uxIndexToNotify + * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES. xTaskNotify() does + * not have this parameter and always sends notifications to index 0. + * + * @param ulValue Data that can be sent with the notification. How the data is + * used depends on the value of the eAction parameter. + * + * @param eAction Specifies how the notification updates the task's notification + * value, if at all. Valid values for eAction are as follows: + * + * eSetBits - + * The target notification value is bitwise ORed with ulValue. + * xTaskNotifyIndexed() always returns pdPASS in this case. + * + * eIncrement - + * The target notification value is incremented. ulValue is not used and + * xTaskNotifyIndexed() always returns pdPASS in this case. + * + * eSetValueWithOverwrite - + * The target notification value is set to the value of ulValue, even if the + * task being notified had not yet processed the previous notification at the + * same array index (the task already had a notification pending at that index). + * xTaskNotifyIndexed() always returns pdPASS in this case. + * + * eSetValueWithoutOverwrite - + * If the task being notified did not already have a notification pending at the + * same array index then the target notification value is set to ulValue and + * xTaskNotifyIndexed() will return pdPASS. If the task being notified already + * had a notification pending at the same array index then no action is + * performed and pdFAIL is returned. + * + * eNoAction - + * The task receives a notification at the specified array index without the + * notification value at that index being updated. ulValue is not used and + * xTaskNotifyIndexed() always returns pdPASS in this case. + * + * pulPreviousNotificationValue - + * Can be used to pass out the subject task's notification value before any + * bits are modified by the notify function. + * + * @return Dependent on the value of eAction. See the description of the + * eAction parameter. + * + * \defgroup xTaskNotifyIndexed xTaskNotifyIndexed + * \ingroup TaskNotifications + */ +BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, + UBaseType_t uxIndexToNotify, + uint32_t ulValue, + eNotifyAction eAction, + uint32_t * pulPreviousNotificationValue ) PRIVILEGED_FUNCTION; +#define xTaskNotify( xTaskToNotify, ulValue, eAction ) \ + xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL ) +#define xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction ) \ + xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL ) + +/** + * task. h + * @code{c} + * BaseType_t xTaskNotifyAndQueryIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue ); + * BaseType_t xTaskNotifyAndQuery( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue ); + * @endcode + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * xTaskNotifyAndQueryIndexed() performs the same operation as + * xTaskNotifyIndexed() with the addition that it also returns the subject + * task's prior notification value (the notification value at the time the + * function is called rather than when the function returns) in the additional + * pulPreviousNotifyValue parameter. + * + * xTaskNotifyAndQuery() performs the same operation as xTaskNotify() with the + * addition that it also returns the subject task's prior notification value + * (the notification value as it was at the time the function is called, rather + * than when the function returns) in the additional pulPreviousNotifyValue + * parameter. + * + * \defgroup xTaskNotifyAndQueryIndexed xTaskNotifyAndQueryIndexed + * \ingroup TaskNotifications + */ +#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) \ + xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) ) +#define xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotifyValue ) \ + xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) ) + +/** + * task. h + * @code{c} + * BaseType_t xTaskNotifyIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken ); + * BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these + * functions to be available. + * + * A version of xTaskNotifyIndexed() that can be used from an interrupt service + * routine (ISR). + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment one of the task's notification values. In + * that way task notifications can be used to send data to a task, or be used as + * light weight and fast binary or counting semaphores. + * + * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a + * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block + * to wait for a notification value to have a non-zero value. The task does + * not consume any CPU time while it is in the Blocked state. + * + * A notification sent to a task will remain pending until it is cleared by the + * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their + * un-indexed equivalents). If the task was already in the Blocked state to + * wait for a notification when the notification arrives then the task will + * automatically be removed from the Blocked state (unblocked) and the + * notification cleared. + * + * **NOTE** Each notification within the array operates independently - a task + * can only block on one notification within the array at a time and will not be + * unblocked by a notification sent to any other array index. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. xTaskNotifyFromISR() is the original API function, and remains + * backward compatible by always operating on the notification value at index 0 + * within the array. Calling xTaskNotifyFromISR() is equivalent to calling + * xTaskNotifyIndexedFromISR() with the uxIndexToNotify parameter set to 0. + * + * @param uxIndexToNotify The index within the target task's array of + * notification values to which the notification is to be sent. uxIndexToNotify + * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES. xTaskNotifyFromISR() + * does not have this parameter and always sends notifications to index 0. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @param ulValue Data that can be sent with the notification. How the data is + * used depends on the value of the eAction parameter. + * + * @param eAction Specifies how the notification updates the task's notification + * value, if at all. Valid values for eAction are as follows: + * + * eSetBits - + * The task's notification value is bitwise ORed with ulValue. xTaskNotify() + * always returns pdPASS in this case. + * + * eIncrement - + * The task's notification value is incremented. ulValue is not used and + * xTaskNotify() always returns pdPASS in this case. + * + * eSetValueWithOverwrite - + * The task's notification value is set to the value of ulValue, even if the + * task being notified had not yet processed the previous notification (the + * task already had a notification pending). xTaskNotify() always returns + * pdPASS in this case. + * + * eSetValueWithoutOverwrite - + * If the task being notified did not already have a notification pending then + * the task's notification value is set to ulValue and xTaskNotify() will + * return pdPASS. If the task being notified already had a notification + * pending then no action is performed and pdFAIL is returned. + * + * eNoAction - + * The task receives a notification without its notification value being + * updated. ulValue is not used and xTaskNotify() always returns pdPASS in + * this case. + * + * @param pxHigherPriorityTaskWoken xTaskNotifyFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the + * task to which the notification was sent to leave the Blocked state, and the + * unblocked task has a priority higher than the currently running task. If + * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should + * be requested before the interrupt is exited. How a context switch is + * requested from an ISR is dependent on the port - see the documentation page + * for the port in use. + * + * @return Dependent on the value of eAction. See the description of the + * eAction parameter. + * + * \defgroup xTaskNotifyIndexedFromISR xTaskNotifyIndexedFromISR + * \ingroup TaskNotifications + */ +BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, + UBaseType_t uxIndexToNotify, + uint32_t ulValue, + eNotifyAction eAction, + uint32_t * pulPreviousNotificationValue, + BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; +#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \ + xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) ) +#define xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) \ + xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) ) + +/** + * task. h + * @code{c} + * BaseType_t xTaskNotifyAndQueryIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ); + * BaseType_t xTaskNotifyAndQueryFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * xTaskNotifyAndQueryIndexedFromISR() performs the same operation as + * xTaskNotifyIndexedFromISR() with the addition that it also returns the + * subject task's prior notification value (the notification value at the time + * the function is called rather than at the time the function returns) in the + * additional pulPreviousNotifyValue parameter. + * + * xTaskNotifyAndQueryFromISR() performs the same operation as + * xTaskNotifyFromISR() with the addition that it also returns the subject + * task's prior notification value (the notification value at the time the + * function is called rather than at the time the function returns) in the + * additional pulPreviousNotifyValue parameter. + * + * \defgroup xTaskNotifyAndQueryIndexedFromISR xTaskNotifyAndQueryIndexedFromISR + * \ingroup TaskNotifications + */ +#define xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \ + xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) ) +#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \ + xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) ) + +/** + * task. h + * @code{c} + * BaseType_t xTaskNotifyWaitIndexed( UBaseType_t uxIndexToWaitOn, uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ); + * + * BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ); + * @endcode + * + * Waits for a direct to task notification to be pending at a given index within + * an array of direct to task notifications. + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this + * function to be available. + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment one of the task's notification values. In + * that way task notifications can be used to send data to a task, or be used as + * light weight and fast binary or counting semaphores. + * + * A notification sent to a task will remain pending until it is cleared by the + * task calling xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() (or their + * un-indexed equivalents). If the task was already in the Blocked state to + * wait for a notification when the notification arrives then the task will + * automatically be removed from the Blocked state (unblocked) and the + * notification cleared. + * + * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a + * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block + * to wait for a notification value to have a non-zero value. The task does + * not consume any CPU time while it is in the Blocked state. + * + * **NOTE** Each notification within the array operates independently - a task + * can only block on one notification within the array at a time and will not be + * unblocked by a notification sent to any other array index. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. xTaskNotifyWait() is the original API function, and remains backward + * compatible by always operating on the notification value at index 0 in the + * array. Calling xTaskNotifyWait() is equivalent to calling + * xTaskNotifyWaitIndexed() with the uxIndexToWaitOn parameter set to 0. + * + * @param uxIndexToWaitOn The index within the calling task's array of + * notification values on which the calling task will wait for a notification to + * be received. uxIndexToWaitOn must be less than + * configTASK_NOTIFICATION_ARRAY_ENTRIES. xTaskNotifyWait() does + * not have this parameter and always waits for notifications on index 0. + * + * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value + * will be cleared in the calling task's notification value before the task + * checks to see if any notifications are pending, and optionally blocks if no + * notifications are pending. Setting ulBitsToClearOnEntry to ULONG_MAX (if + * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have + * the effect of resetting the task's notification value to 0. Setting + * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged. + * + * @param ulBitsToClearOnExit If a notification is pending or received before + * the calling task exits the xTaskNotifyWait() function then the task's + * notification value (see the xTaskNotify() API function) is passed out using + * the pulNotificationValue parameter. Then any bits that are set in + * ulBitsToClearOnExit will be cleared in the task's notification value (note + * *pulNotificationValue is set before any bits are cleared). Setting + * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL + * (if limits.h is not included) will have the effect of resetting the task's + * notification value to 0 before the function exits. Setting + * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged + * when the function exits (in which case the value passed out in + * pulNotificationValue will match the task's notification value). + * + * @param pulNotificationValue Used to pass the task's notification value out + * of the function. Note the value passed out will not be effected by the + * clearing of any bits caused by ulBitsToClearOnExit being non-zero. + * + * @param xTicksToWait The maximum amount of time that the task should wait in + * the Blocked state for a notification to be received, should a notification + * not already be pending when xTaskNotifyWait() was called. The task + * will not consume any processing time while it is in the Blocked state. This + * is specified in kernel ticks, the macro pdMS_TO_TICKS( value_in_ms ) can be + * used to convert a time specified in milliseconds to a time specified in + * ticks. + * + * @return If a notification was received (including notifications that were + * already pending when xTaskNotifyWait was called) then pdPASS is + * returned. Otherwise pdFAIL is returned. + * + * \defgroup xTaskNotifyWaitIndexed xTaskNotifyWaitIndexed + * \ingroup TaskNotifications + */ +BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn, + uint32_t ulBitsToClearOnEntry, + uint32_t ulBitsToClearOnExit, + uint32_t * pulNotificationValue, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +#define xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \ + xTaskGenericNotifyWait( tskDEFAULT_INDEX_TO_NOTIFY, ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) ) +#define xTaskNotifyWaitIndexed( uxIndexToWaitOn, ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ) \ + xTaskGenericNotifyWait( ( uxIndexToWaitOn ), ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) ) + +/** + * task. h + * @code{c} + * BaseType_t xTaskNotifyGiveIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify ); + * BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify ); + * @endcode + * + * Sends a direct to task notification to a particular index in the target + * task's notification array in a manner similar to giving a counting semaphore. + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these + * macros to be available. + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment one of the task's notification values. In + * that way task notifications can be used to send data to a task, or be used as + * light weight and fast binary or counting semaphores. + * + * xTaskNotifyGiveIndexed() is a helper macro intended for use when task + * notifications are used as light weight and faster binary or counting + * semaphore equivalents. Actual FreeRTOS semaphores are given using the + * xSemaphoreGive() API function, the equivalent action that instead uses a task + * notification is xTaskNotifyGiveIndexed(). + * + * When task notifications are being used as a binary or counting semaphore + * equivalent then the task being notified should wait for the notification + * using the ulTaskNotificationTakeIndexed() API function rather than the + * xTaskNotifyWaitIndexed() API function. + * + * **NOTE** Each notification within the array operates independently - a task + * can only block on one notification within the array at a time and will not be + * unblocked by a notification sent to any other array index. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. xTaskNotifyGive() is the original API function, and remains backward + * compatible by always operating on the notification value at index 0 in the + * array. Calling xTaskNotifyGive() is equivalent to calling + * xTaskNotifyGiveIndexed() with the uxIndexToNotify parameter set to 0. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @param uxIndexToNotify The index within the target task's array of + * notification values to which the notification is to be sent. uxIndexToNotify + * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES. xTaskNotifyGive() + * does not have this parameter and always sends notifications to index 0. + * + * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the + * eAction parameter set to eIncrement - so pdPASS is always returned. + * + * \defgroup xTaskNotifyGiveIndexed xTaskNotifyGiveIndexed + * \ingroup TaskNotifications + */ +#define xTaskNotifyGive( xTaskToNotify ) \ + xTaskGenericNotify( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( 0 ), eIncrement, NULL ) +#define xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify ) \ + xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( 0 ), eIncrement, NULL ) + +/** + * task. h + * @code{c} + * void vTaskNotifyGiveIndexedFromISR( TaskHandle_t xTaskHandle, UBaseType_t uxIndexToNotify, BaseType_t *pxHigherPriorityTaskWoken ); + * void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken ); + * @endcode + * + * A version of xTaskNotifyGiveIndexed() that can be called from an interrupt + * service routine (ISR). + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for more details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro + * to be available. + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment one of the task's notification values. In + * that way task notifications can be used to send data to a task, or be used as + * light weight and fast binary or counting semaphores. + * + * vTaskNotifyGiveIndexedFromISR() is intended for use when task notifications + * are used as light weight and faster binary or counting semaphore equivalents. + * Actual FreeRTOS semaphores are given from an ISR using the + * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses + * a task notification is vTaskNotifyGiveIndexedFromISR(). + * + * When task notifications are being used as a binary or counting semaphore + * equivalent then the task being notified should wait for the notification + * using the ulTaskNotificationTakeIndexed() API function rather than the + * xTaskNotifyWaitIndexed() API function. + * + * **NOTE** Each notification within the array operates independently - a task + * can only block on one notification within the array at a time and will not be + * unblocked by a notification sent to any other array index. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. xTaskNotifyFromISR() is the original API function, and remains + * backward compatible by always operating on the notification value at index 0 + * within the array. Calling xTaskNotifyGiveFromISR() is equivalent to calling + * xTaskNotifyGiveIndexedFromISR() with the uxIndexToNotify parameter set to 0. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @param uxIndexToNotify The index within the target task's array of + * notification values to which the notification is to be sent. uxIndexToNotify + * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES. + * xTaskNotifyGiveFromISR() does not have this parameter and always sends + * notifications to index 0. + * + * @param pxHigherPriorityTaskWoken vTaskNotifyGiveFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the + * task to which the notification was sent to leave the Blocked state, and the + * unblocked task has a priority higher than the currently running task. If + * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch + * should be requested before the interrupt is exited. How a context switch is + * requested from an ISR is dependent on the port - see the documentation page + * for the port in use. + * + * \defgroup vTaskNotifyGiveIndexedFromISR vTaskNotifyGiveIndexedFromISR + * \ingroup TaskNotifications + */ +void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify, + UBaseType_t uxIndexToNotify, + BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; +#define vTaskNotifyGiveFromISR( xTaskToNotify, pxHigherPriorityTaskWoken ) \ + vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( pxHigherPriorityTaskWoken ) ); +#define vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, pxHigherPriorityTaskWoken ) \ + vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( pxHigherPriorityTaskWoken ) ); + +/** + * task. h + * @code{c} + * uint32_t ulTaskNotifyTakeIndexed( UBaseType_t uxIndexToWaitOn, BaseType_t xClearCountOnExit, TickType_t xTicksToWait ); + * + * uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ); + * @endcode + * + * Waits for a direct to task notification on a particular index in the calling + * task's notification array in a manner similar to taking a counting semaphore. + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this + * function to be available. + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment one of the task's notification values. In + * that way task notifications can be used to send data to a task, or be used as + * light weight and fast binary or counting semaphores. + * + * ulTaskNotifyTakeIndexed() is intended for use when a task notification is + * used as a faster and lighter weight binary or counting semaphore alternative. + * Actual FreeRTOS semaphores are taken using the xSemaphoreTake() API function, + * the equivalent action that instead uses a task notification is + * ulTaskNotifyTakeIndexed(). + * + * When a task is using its notification value as a binary or counting semaphore + * other tasks should send notifications to it using the xTaskNotifyGiveIndexed() + * macro, or xTaskNotifyIndex() function with the eAction parameter set to + * eIncrement. + * + * ulTaskNotifyTakeIndexed() can either clear the task's notification value at + * the array index specified by the uxIndexToWaitOn parameter to zero on exit, + * in which case the notification value acts like a binary semaphore, or + * decrement the notification value on exit, in which case the notification + * value acts like a counting semaphore. + * + * A task can use ulTaskNotifyTakeIndexed() to [optionally] block to wait for + * a notification. The task does not consume any CPU time while it is in the + * Blocked state. + * + * Where as xTaskNotifyWaitIndexed() will return when a notification is pending, + * ulTaskNotifyTakeIndexed() will return when the task's notification value is + * not zero. + * + * **NOTE** Each notification within the array operates independently - a task + * can only block on one notification within the array at a time and will not be + * unblocked by a notification sent to any other array index. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. ulTaskNotifyTake() is the original API function, and remains backward + * compatible by always operating on the notification value at index 0 in the + * array. Calling ulTaskNotifyTake() is equivalent to calling + * ulTaskNotifyTakeIndexed() with the uxIndexToWaitOn parameter set to 0. + * + * @param uxIndexToWaitOn The index within the calling task's array of + * notification values on which the calling task will wait for a notification to + * be non-zero. uxIndexToWaitOn must be less than + * configTASK_NOTIFICATION_ARRAY_ENTRIES. xTaskNotifyTake() does + * not have this parameter and always waits for notifications on index 0. + * + * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's + * notification value is decremented when the function exits. In this way the + * notification value acts like a counting semaphore. If xClearCountOnExit is + * not pdFALSE then the task's notification value is cleared to zero when the + * function exits. In this way the notification value acts like a binary + * semaphore. + * + * @param xTicksToWait The maximum amount of time that the task should wait in + * the Blocked state for the task's notification value to be greater than zero, + * should the count not already be greater than zero when + * ulTaskNotifyTake() was called. The task will not consume any processing + * time while it is in the Blocked state. This is specified in kernel ticks, + * the macro pdMS_TO_TICKS( value_in_ms ) can be used to convert a time + * specified in milliseconds to a time specified in ticks. + * + * @return The task's notification count before it is either cleared to zero or + * decremented (see the xClearCountOnExit parameter). + * + * \defgroup ulTaskNotifyTakeIndexed ulTaskNotifyTakeIndexed + * \ingroup TaskNotifications + */ +uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, + BaseType_t xClearCountOnExit, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +#define ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ) \ + ulTaskGenericNotifyTake( ( tskDEFAULT_INDEX_TO_NOTIFY ), ( xClearCountOnExit ), ( xTicksToWait ) ) +#define ulTaskNotifyTakeIndexed( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ) \ + ulTaskGenericNotifyTake( ( uxIndexToWaitOn ), ( xClearCountOnExit ), ( xTicksToWait ) ) + +/** + * task. h + * @code{c} + * BaseType_t xTaskNotifyStateClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToCLear ); + * + * BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask ); + * @endcode + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these + * functions to be available. + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * If a notification is sent to an index within the array of notifications then + * the notification at that index is said to be 'pending' until it is read or + * explicitly cleared by the receiving task. xTaskNotifyStateClearIndexed() + * is the function that clears a pending notification without reading the + * notification value. The notification value at the same array index is not + * altered. Set xTask to NULL to clear the notification state of the calling + * task. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. xTaskNotifyStateClear() is the original API function, and remains + * backward compatible by always operating on the notification value at index 0 + * within the array. Calling xTaskNotifyStateClear() is equivalent to calling + * xTaskNotifyStateClearIndexed() with the uxIndexToNotify parameter set to 0. + * + * @param xTask The handle of the RTOS task that will have a notification state + * cleared. Set xTask to NULL to clear a notification state in the calling + * task. To obtain a task's handle create the task using xTaskCreate() and + * make use of the pxCreatedTask parameter, or create the task using + * xTaskCreateStatic() and store the returned value, or use the task's name in + * a call to xTaskGetHandle(). + * + * @param uxIndexToClear The index within the target task's array of + * notification values to act upon. For example, setting uxIndexToClear to 1 + * will clear the state of the notification at index 1 within the array. + * uxIndexToClear must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES. + * ulTaskNotifyStateClear() does not have this parameter and always acts on the + * notification at index 0. + * + * @return pdTRUE if the task's notification state was set to + * eNotWaitingNotification, otherwise pdFALSE. + * + * \defgroup xTaskNotifyStateClearIndexed xTaskNotifyStateClearIndexed + * \ingroup TaskNotifications + */ +BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear ) PRIVILEGED_FUNCTION; +#define xTaskNotifyStateClear( xTask ) \ + xTaskGenericNotifyStateClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ) ) +#define xTaskNotifyStateClearIndexed( xTask, uxIndexToClear ) \ + xTaskGenericNotifyStateClear( ( xTask ), ( uxIndexToClear ) ) + +/** + * task. h + * @code{c} + * uint32_t ulTaskNotifyValueClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToClear, uint32_t ulBitsToClear ); + * + * uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear ); + * @endcode + * + * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for these + * functions to be available. + * + * Each task has a private array of "notification values" (or 'notifications'), + * each of which is a 32-bit unsigned integer (uint32_t). The constant + * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the + * array, and (for backward compatibility) defaults to 1 if left undefined. + * Prior to FreeRTOS V10.4.0 there was only one notification value per task. + * + * ulTaskNotifyValueClearIndexed() clears the bits specified by the + * ulBitsToClear bit mask in the notification value at array index uxIndexToClear + * of the task referenced by xTask. + * + * Backward compatibility information: + * Prior to FreeRTOS V10.4.0 each task had a single "notification value", and + * all task notification API functions operated on that value. Replacing the + * single notification value with an array of notification values necessitated a + * new set of API functions that could address specific notifications within the + * array. ulTaskNotifyValueClear() is the original API function, and remains + * backward compatible by always operating on the notification value at index 0 + * within the array. Calling ulTaskNotifyValueClear() is equivalent to calling + * ulTaskNotifyValueClearIndexed() with the uxIndexToClear parameter set to 0. + * + * @param xTask The handle of the RTOS task that will have bits in one of its + * notification values cleared. Set xTask to NULL to clear bits in a + * notification value of the calling task. To obtain a task's handle create the + * task using xTaskCreate() and make use of the pxCreatedTask parameter, or + * create the task using xTaskCreateStatic() and store the returned value, or + * use the task's name in a call to xTaskGetHandle(). + * + * @param uxIndexToClear The index within the target task's array of + * notification values in which to clear the bits. uxIndexToClear + * must be less than configTASK_NOTIFICATION_ARRAY_ENTRIES. + * ulTaskNotifyValueClear() does not have this parameter and always clears bits + * in the notification value at index 0. + * + * @param ulBitsToClear Bit mask of the bits to clear in the notification value of + * xTask. Set a bit to 1 to clear the corresponding bits in the task's notification + * value. Set ulBitsToClear to 0xffffffff (UINT_MAX on 32-bit architectures) to clear + * the notification value to 0. Set ulBitsToClear to 0 to query the task's + * notification value without clearing any bits. + * + * + * @return The value of the target task's notification value before the bits + * specified by ulBitsToClear were cleared. + * \defgroup ulTaskNotifyValueClear ulTaskNotifyValueClear + * \ingroup TaskNotifications + */ +uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask, + UBaseType_t uxIndexToClear, + uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; +#define ulTaskNotifyValueClear( xTask, ulBitsToClear ) \ + ulTaskGenericNotifyValueClear( ( xTask ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulBitsToClear ) ) +#define ulTaskNotifyValueClearIndexed( xTask, uxIndexToClear, ulBitsToClear ) \ + ulTaskGenericNotifyValueClear( ( xTask ), ( uxIndexToClear ), ( ulBitsToClear ) ) + +/** + * task.h + * @code{c} + * void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ); + * @endcode + * + * Capture the current time for future use with xTaskCheckForTimeOut(). + * + * @param pxTimeOut Pointer to a timeout object into which the current time + * is to be captured. The captured time includes the tick count and the number + * of times the tick count has overflowed since the system first booted. + * \defgroup vTaskSetTimeOutState vTaskSetTimeOutState + * \ingroup TaskCtrl + */ +void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION; + +/** + * task.h + * @code{c} + * BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ); + * @endcode + * + * Determines if pxTicksToWait ticks has passed since a time was captured + * using a call to vTaskSetTimeOutState(). The captured time includes the tick + * count and the number of times the tick count has overflowed. + * + * @param pxTimeOut The time status as captured previously using + * vTaskSetTimeOutState. If the timeout has not yet occurred, it is updated + * to reflect the current time status. + * @param pxTicksToWait The number of ticks to check for timeout i.e. if + * pxTicksToWait ticks have passed since pxTimeOut was last updated (either by + * vTaskSetTimeOutState() or xTaskCheckForTimeOut()), the timeout has occurred. + * If the timeout has not occurred, pxTicksToWait is updated to reflect the + * number of remaining ticks. + * + * @return If timeout has occurred, pdTRUE is returned. Otherwise pdFALSE is + * returned and pxTicksToWait is updated to reflect the number of remaining + * ticks. + * + * @see https://www.FreeRTOS.org/xTaskCheckForTimeOut.html + * + * Example Usage: + * @code{c} + * // Driver library function used to receive uxWantedBytes from an Rx buffer + * // that is filled by a UART interrupt. If there are not enough bytes in the + * // Rx buffer then the task enters the Blocked state until it is notified that + * // more data has been placed into the buffer. If there is still not enough + * // data then the task re-enters the Blocked state, and xTaskCheckForTimeOut() + * // is used to re-calculate the Block time to ensure the total amount of time + * // spent in the Blocked state does not exceed MAX_TIME_TO_WAIT. This + * // continues until either the buffer contains at least uxWantedBytes bytes, + * // or the total amount of time spent in the Blocked state reaches + * // MAX_TIME_TO_WAIT - at which point the task reads however many bytes are + * // available up to a maximum of uxWantedBytes. + * + * size_t xUART_Receive( uint8_t *pucBuffer, size_t uxWantedBytes ) + * { + * size_t uxReceived = 0; + * TickType_t xTicksToWait = MAX_TIME_TO_WAIT; + * TimeOut_t xTimeOut; + * + * // Initialize xTimeOut. This records the time at which this function + * // was entered. + * vTaskSetTimeOutState( &xTimeOut ); + * + * // Loop until the buffer contains the wanted number of bytes, or a + * // timeout occurs. + * while( UART_bytes_in_rx_buffer( pxUARTInstance ) < uxWantedBytes ) + * { + * // The buffer didn't contain enough data so this task is going to + * // enter the Blocked state. Adjusting xTicksToWait to account for + * // any time that has been spent in the Blocked state within this + * // function so far to ensure the total amount of time spent in the + * // Blocked state does not exceed MAX_TIME_TO_WAIT. + * if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) != pdFALSE ) + * { + * //Timed out before the wanted number of bytes were available, + * // exit the loop. + * break; + * } + * + * // Wait for a maximum of xTicksToWait ticks to be notified that the + * // receive interrupt has placed more data into the buffer. + * ulTaskNotifyTake( pdTRUE, xTicksToWait ); + * } + * + * // Attempt to read uxWantedBytes from the receive buffer into pucBuffer. + * // The actual number of bytes read (which might be less than + * // uxWantedBytes) is returned. + * uxReceived = UART_read_from_receive_buffer( pxUARTInstance, + * pucBuffer, + * uxWantedBytes ); + * + * return uxReceived; + * } + * @endcode + * \defgroup xTaskCheckForTimeOut xTaskCheckForTimeOut + * \ingroup TaskCtrl + */ +BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, + TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * task.h + * @code{c} + * BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ); + * @endcode + * + * This function corrects the tick count value after the application code has held + * interrupts disabled for an extended period resulting in tick interrupts having + * been missed. + * + * This function is similar to vTaskStepTick(), however, unlike + * vTaskStepTick(), xTaskCatchUpTicks() may move the tick count forward past a + * time at which a task should be removed from the blocked state. That means + * tasks may have to be removed from the blocked state as the tick count is + * moved. + * + * @param xTicksToCatchUp The number of tick interrupts that have been missed due to + * interrupts being disabled. Its value is not computed automatically, so must be + * computed by the application writer. + * + * @return pdTRUE if moving the tick count forward resulted in a task leaving the + * blocked state and a context switch being performed. Otherwise pdFALSE. + * + * \defgroup xTaskCatchUpTicks xTaskCatchUpTicks + * \ingroup TaskCtrl + */ +BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION; + + +/*----------------------------------------------------------- +* SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES +*----------------------------------------------------------*/ + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY + * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS + * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * Called from the real time kernel tick (either preemptive or cooperative), + * this increments the tick count and checks if any tasks that are blocked + * for a finite period required removing from a blocked list and placing on + * a ready list. If a non-zero value is returned then a context switch is + * required because either: + * + A task was removed from a blocked list because its timeout had expired, + * or + * + Time slicing is in use and there is a task of equal priority to the + * currently running task. + */ +BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN + * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. + * + * Removes the calling task from the ready list and places it both + * on the list of tasks waiting for a particular event, and the + * list of delayed tasks. The task will be removed from both lists + * and replaced on the ready list should either the event occur (and + * there be no higher priority tasks waiting on the same event) or + * the delay period expires. + * + * The 'unordered' version replaces the event list item value with the + * xItemValue value, and inserts the list item at the end of the list. + * + * The 'ordered' version uses the existing event list item value (which is the + * owning task's priority) to insert the list item into the event list in task + * priority order. + * + * @param pxEventList The list containing tasks that are blocked waiting + * for the event to occur. + * + * @param xItemValue The item value to use for the event list item when the + * event list is not ordered by task priority. + * + * @param xTicksToWait The maximum amount of time that the task should wait + * for the event to occur. This is specified in kernel ticks, the constant + * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time + * period. + */ +void vTaskPlaceOnEventList( List_t * const pxEventList, + const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, + const TickType_t xItemValue, + const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN + * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. + * + * This function performs nearly the same function as vTaskPlaceOnEventList(). + * The difference being that this function does not permit tasks to block + * indefinitely, whereas vTaskPlaceOnEventList() does. + * + */ +void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, + TickType_t xTicksToWait, + const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN + * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. + * + * Removes a task from both the specified event list and the list of blocked + * tasks, and places it on a ready queue. + * + * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called + * if either an event occurs to unblock a task, or the block timeout period + * expires. + * + * xTaskRemoveFromEventList() is used when the event list is in task priority + * order. It removes the list item from the head of the event list as that will + * have the highest priority owning task of all the tasks on the event list. + * vTaskRemoveFromUnorderedEventList() is used when the event list is not + * ordered and the event list items hold something other than the owning tasks + * priority. In this case the event list item value is updated to the value + * passed in the xItemValue parameter. + * + * @return pdTRUE if the task being removed has a higher priority than the task + * making the call, otherwise pdFALSE. + */ +BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION; +void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, + const TickType_t xItemValue ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY + * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS + * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * Sets the pointer to the current TCB to the TCB of the highest priority task + * that is ready to run. + */ +portDONT_DISCARD void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION; + +/* + * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE. THEY ARE USED BY + * THE EVENT BITS MODULE. + */ +TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION; + +/* + * Return the handle of the calling task. + */ +TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION; + +/* + * Shortcut used by the queue implementation to prevent unnecessary call to + * taskYIELD(); + */ +void vTaskMissedYield( void ) PRIVILEGED_FUNCTION; + +/* + * Returns the scheduler state as taskSCHEDULER_RUNNING, + * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED. + */ +BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION; + +/* + * Raises the priority of the mutex holder to that of the calling task should + * the mutex holder have a priority less than the calling task. + */ +BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION; + +/* + * Set the priority of a task back to its proper priority in the case that it + * inherited a higher priority while it was holding a semaphore. + */ +BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION; + +/* + * If a higher priority task attempting to obtain a mutex caused a lower + * priority task to inherit the higher priority task's priority - but the higher + * priority task then timed out without obtaining the mutex, then the lower + * priority task will disinherit the priority again - but only down as far as + * the highest priority task that is still waiting for the mutex (if there were + * more than one task waiting for the mutex). + */ +void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, + UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION; + +/* + * Get the uxTCBNumber assigned to the task referenced by the xTask parameter. + */ +UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/* + * Set the uxTaskNumber of the task referenced by the xTask parameter to + * uxHandle. + */ +void vTaskSetTaskNumber( TaskHandle_t xTask, + const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION; + +/* + * Only available when configUSE_TICKLESS_IDLE is set to 1. + * If tickless mode is being used, or a low power mode is implemented, then + * the tick interrupt will not execute during idle periods. When this is the + * case, the tick count value maintained by the scheduler needs to be kept up + * to date with the actual execution time by being skipped forward by a time + * equal to the idle period. + */ +void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION; + +/* + * Only available when configUSE_TICKLESS_IDLE is set to 1. + * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port + * specific sleep function to determine if it is ok to proceed with the sleep, + * and if it is ok to proceed, if it is ok to sleep indefinitely. + * + * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only + * called with the scheduler suspended, not from within a critical section. It + * is therefore possible for an interrupt to request a context switch between + * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being + * entered. eTaskConfirmSleepModeStatus() should be called from a short + * critical section between the timer being stopped and the sleep mode being + * entered to ensure it is ok to proceed into the sleep mode. + */ +eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION; + +/* + * For internal use only. Increment the mutex held count when a mutex is + * taken and return the handle of the task that has taken the mutex. + */ +TaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION; + +/* + * For internal use only. Same as vTaskSetTimeOutState(), but without a critical + * section. + */ +void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION; + + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ +#endif /* INC_TASK_H */ diff --git a/freertos/cvitek/install/include/kernel/timers.h b/freertos/cvitek/install/include/kernel/timers.h new file mode 100644 index 000000000..2be826c21 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/timers.h @@ -0,0 +1,1355 @@ +/* + * FreeRTOS Kernel V10.4.6 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +#ifndef TIMERS_H +#define TIMERS_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include timers.h" +#endif + +/*lint -save -e537 This headers are only multiply included if the application code + * happens to also be including task.h. */ +#include "task.h" +/*lint -restore */ + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + +/*----------------------------------------------------------- +* MACROS AND DEFINITIONS +*----------------------------------------------------------*/ + +/* IDs for commands that can be sent/received on the timer queue. These are to + * be used solely through the macros that make up the public software timer API, + * as defined below. The commands that are sent from interrupts must use the + * highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task + * or interrupt version of the queue send function should be used. */ +#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR ( ( BaseType_t ) -2 ) +#define tmrCOMMAND_EXECUTE_CALLBACK ( ( BaseType_t ) -1 ) +#define tmrCOMMAND_START_DONT_TRACE ( ( BaseType_t ) 0 ) +#define tmrCOMMAND_START ( ( BaseType_t ) 1 ) +#define tmrCOMMAND_RESET ( ( BaseType_t ) 2 ) +#define tmrCOMMAND_STOP ( ( BaseType_t ) 3 ) +#define tmrCOMMAND_CHANGE_PERIOD ( ( BaseType_t ) 4 ) +#define tmrCOMMAND_DELETE ( ( BaseType_t ) 5 ) + +#define tmrFIRST_FROM_ISR_COMMAND ( ( BaseType_t ) 6 ) +#define tmrCOMMAND_START_FROM_ISR ( ( BaseType_t ) 6 ) +#define tmrCOMMAND_RESET_FROM_ISR ( ( BaseType_t ) 7 ) +#define tmrCOMMAND_STOP_FROM_ISR ( ( BaseType_t ) 8 ) +#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR ( ( BaseType_t ) 9 ) + + +/** + * Type by which software timers are referenced. For example, a call to + * xTimerCreate() returns an TimerHandle_t variable that can then be used to + * reference the subject timer in calls to other software timer API functions + * (for example, xTimerStart(), xTimerReset(), etc.). + */ +struct tmrTimerControl; /* The old naming convention is used to prevent breaking kernel aware debuggers. */ +typedef struct tmrTimerControl * TimerHandle_t; + +/* + * Defines the prototype to which timer callback functions must conform. + */ +typedef void (* TimerCallbackFunction_t)( TimerHandle_t xTimer ); + +/* + * Defines the prototype to which functions used with the + * xTimerPendFunctionCallFromISR() function must conform. + */ +typedef void (* PendedFunction_t)( void *, + uint32_t ); + +/** + * TimerHandle_t xTimerCreate( const char * const pcTimerName, + * TickType_t xTimerPeriodInTicks, + * UBaseType_t uxAutoReload, + * void * pvTimerID, + * TimerCallbackFunction_t pxCallbackFunction ); + * + * Creates a new software timer instance, and returns a handle by which the + * created software timer can be referenced. + * + * Internally, within the FreeRTOS implementation, software timers use a block + * of memory, in which the timer data structure is stored. If a software timer + * is created using xTimerCreate() then the required memory is automatically + * dynamically allocated inside the xTimerCreate() function. (see + * https://www.FreeRTOS.org/a00111.html). If a software timer is created using + * xTimerCreateStatic() then the application writer must provide the memory that + * will get used by the software timer. xTimerCreateStatic() therefore allows a + * software timer to be created without using any dynamic memory allocation. + * + * Timers are created in the dormant state. The xTimerStart(), xTimerReset(), + * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and + * xTimerChangePeriodFromISR() API functions can all be used to transition a + * timer into the active state. + * + * @param pcTimerName A text name that is assigned to the timer. This is done + * purely to assist debugging. The kernel itself only ever references a timer + * by its handle, and never by its name. + * + * @param xTimerPeriodInTicks The timer period. The time is defined in tick + * periods so the constant portTICK_PERIOD_MS can be used to convert a time that + * has been specified in milliseconds. For example, if the timer must expire + * after 100 ticks, then xTimerPeriodInTicks should be set to 100. + * Alternatively, if the timer must expire after 500ms, then xPeriod can be set + * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or + * equal to 1000. Time timer period must be greater than 0. + * + * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will + * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter. + * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and + * enter the dormant state after it expires. + * + * @param pvTimerID An identifier that is assigned to the timer being created. + * Typically this would be used in the timer callback function to identify which + * timer expired when the same callback function is assigned to more than one + * timer. + * + * @param pxCallbackFunction The function to call when the timer expires. + * Callback functions must have the prototype defined by TimerCallbackFunction_t, + * which is "void vCallbackFunction( TimerHandle_t xTimer );". + * + * @return If the timer is successfully created then a handle to the newly + * created timer is returned. If the timer cannot be created because there is + * insufficient FreeRTOS heap remaining to allocate the timer + * structures then NULL is returned. + * + * Example usage: + * @verbatim + * #define NUM_TIMERS 5 + * + * // An array to hold handles to the created timers. + * TimerHandle_t xTimers[ NUM_TIMERS ]; + * + * // An array to hold a count of the number of times each timer expires. + * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 }; + * + * // Define a callback function that will be used by multiple timer instances. + * // The callback function does nothing but count the number of times the + * // associated timer expires, and stop the timer once the timer has expired + * // 10 times. + * void vTimerCallback( TimerHandle_t pxTimer ) + * { + * int32_t lArrayIndex; + * const int32_t xMaxExpiryCountBeforeStopping = 10; + * + * // Optionally do something if the pxTimer parameter is NULL. + * configASSERT( pxTimer ); + * + * // Which timer expired? + * lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer ); + * + * // Increment the number of times that pxTimer has expired. + * lExpireCounters[ lArrayIndex ] += 1; + * + * // If the timer has expired 10 times then stop it from running. + * if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping ) + * { + * // Do not use a block time if calling a timer API function from a + * // timer callback function, as doing so could cause a deadlock! + * xTimerStop( pxTimer, 0 ); + * } + * } + * + * void main( void ) + * { + * int32_t x; + * + * // Create then start some timers. Starting the timers before the scheduler + * // has been started means the timers will start running immediately that + * // the scheduler starts. + * for( x = 0; x < NUM_TIMERS; x++ ) + * { + * xTimers[ x ] = xTimerCreate( "Timer", // Just a text name, not used by the kernel. + * ( 100 * x ), // The timer period in ticks. + * pdTRUE, // The timers will auto-reload themselves when they expire. + * ( void * ) x, // Assign each timer a unique id equal to its array index. + * vTimerCallback // Each timer calls the same callback when it expires. + * ); + * + * if( xTimers[ x ] == NULL ) + * { + * // The timer was not created. + * } + * else + * { + * // Start the timer. No block time is specified, and even if one was + * // it would be ignored because the scheduler has not yet been + * // started. + * if( xTimerStart( xTimers[ x ], 0 ) != pdPASS ) + * { + * // The timer could not be set into the Active state. + * } + * } + * } + * + * // ... + * // Create tasks here. + * // ... + * + * // Starting the scheduler will start the timers running as they have already + * // been set into the active state. + * vTaskStartScheduler(); + * + * // Should not reach here. + * for( ;; ); + * } + * @endverbatim + */ +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const TickType_t xTimerPeriodInTicks, + const UBaseType_t uxAutoReload, + void * const pvTimerID, + TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION; +#endif + +/** + * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName, + * TickType_t xTimerPeriodInTicks, + * UBaseType_t uxAutoReload, + * void * pvTimerID, + * TimerCallbackFunction_t pxCallbackFunction, + * StaticTimer_t *pxTimerBuffer ); + * + * Creates a new software timer instance, and returns a handle by which the + * created software timer can be referenced. + * + * Internally, within the FreeRTOS implementation, software timers use a block + * of memory, in which the timer data structure is stored. If a software timer + * is created using xTimerCreate() then the required memory is automatically + * dynamically allocated inside the xTimerCreate() function. (see + * https://www.FreeRTOS.org/a00111.html). If a software timer is created using + * xTimerCreateStatic() then the application writer must provide the memory that + * will get used by the software timer. xTimerCreateStatic() therefore allows a + * software timer to be created without using any dynamic memory allocation. + * + * Timers are created in the dormant state. The xTimerStart(), xTimerReset(), + * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and + * xTimerChangePeriodFromISR() API functions can all be used to transition a + * timer into the active state. + * + * @param pcTimerName A text name that is assigned to the timer. This is done + * purely to assist debugging. The kernel itself only ever references a timer + * by its handle, and never by its name. + * + * @param xTimerPeriodInTicks The timer period. The time is defined in tick + * periods so the constant portTICK_PERIOD_MS can be used to convert a time that + * has been specified in milliseconds. For example, if the timer must expire + * after 100 ticks, then xTimerPeriodInTicks should be set to 100. + * Alternatively, if the timer must expire after 500ms, then xPeriod can be set + * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or + * equal to 1000. The timer period must be greater than 0. + * + * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will + * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter. + * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and + * enter the dormant state after it expires. + * + * @param pvTimerID An identifier that is assigned to the timer being created. + * Typically this would be used in the timer callback function to identify which + * timer expired when the same callback function is assigned to more than one + * timer. + * + * @param pxCallbackFunction The function to call when the timer expires. + * Callback functions must have the prototype defined by TimerCallbackFunction_t, + * which is "void vCallbackFunction( TimerHandle_t xTimer );". + * + * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which + * will be then be used to hold the software timer's data structures, removing + * the need for the memory to be allocated dynamically. + * + * @return If the timer is created then a handle to the created timer is + * returned. If pxTimerBuffer was NULL then NULL is returned. + * + * Example usage: + * @verbatim + * + * // The buffer used to hold the software timer's data structure. + * static StaticTimer_t xTimerBuffer; + * + * // A variable that will be incremented by the software timer's callback + * // function. + * UBaseType_t uxVariableToIncrement = 0; + * + * // A software timer callback function that increments a variable passed to + * // it when the software timer was created. After the 5th increment the + * // callback function stops the software timer. + * static void prvTimerCallback( TimerHandle_t xExpiredTimer ) + * { + * UBaseType_t *puxVariableToIncrement; + * BaseType_t xReturned; + * + * // Obtain the address of the variable to increment from the timer ID. + * puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer ); + * + * // Increment the variable to show the timer callback has executed. + * ( *puxVariableToIncrement )++; + * + * // If this callback has executed the required number of times, stop the + * // timer. + * if( *puxVariableToIncrement == 5 ) + * { + * // This is called from a timer callback so must not block. + * xTimerStop( xExpiredTimer, staticDONT_BLOCK ); + * } + * } + * + * + * void main( void ) + * { + * // Create the software time. xTimerCreateStatic() has an extra parameter + * // than the normal xTimerCreate() API function. The parameter is a pointer + * // to the StaticTimer_t structure that will hold the software timer + * // structure. If the parameter is passed as NULL then the structure will be + * // allocated dynamically, just as if xTimerCreate() had been called. + * xTimer = xTimerCreateStatic( "T1", // Text name for the task. Helps debugging only. Not used by FreeRTOS. + * xTimerPeriod, // The period of the timer in ticks. + * pdTRUE, // This is an auto-reload timer. + * ( void * ) &uxVariableToIncrement, // A variable incremented by the software timer's callback function + * prvTimerCallback, // The function to execute when the timer expires. + * &xTimerBuffer ); // The buffer that will hold the software timer structure. + * + * // The scheduler has not started yet so a block time is not used. + * xReturned = xTimerStart( xTimer, 0 ); + * + * // ... + * // Create tasks here. + * // ... + * + * // Starting the scheduler will start the timers running as they have already + * // been set into the active state. + * vTaskStartScheduler(); + * + * // Should not reach here. + * for( ;; ); + * } + * @endverbatim + */ +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const TickType_t xTimerPeriodInTicks, + const UBaseType_t uxAutoReload, + void * const pvTimerID, + TimerCallbackFunction_t pxCallbackFunction, + StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION; +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * void *pvTimerGetTimerID( TimerHandle_t xTimer ); + * + * Returns the ID assigned to the timer. + * + * IDs are assigned to timers using the pvTimerID parameter of the call to + * xTimerCreated() that was used to create the timer, and by calling the + * vTimerSetTimerID() API function. + * + * If the same callback function is assigned to multiple timers then the timer + * ID can be used as time specific (timer local) storage. + * + * @param xTimer The timer being queried. + * + * @return The ID assigned to the timer being queried. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + */ +void * pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/** + * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ); + * + * Sets the ID assigned to the timer. + * + * IDs are assigned to timers using the pvTimerID parameter of the call to + * xTimerCreated() that was used to create the timer. + * + * If the same callback function is assigned to multiple timers then the timer + * ID can be used as time specific (timer local) storage. + * + * @param xTimer The timer being updated. + * + * @param pvNewID The ID to assign to the timer. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + */ +void vTimerSetTimerID( TimerHandle_t xTimer, + void * pvNewID ) PRIVILEGED_FUNCTION; + +/** + * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ); + * + * Queries a timer to see if it is active or dormant. + * + * A timer will be dormant if: + * 1) It has been created but not started, or + * 2) It is an expired one-shot timer that has not been restarted. + * + * Timers are created in the dormant state. The xTimerStart(), xTimerReset(), + * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and + * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the + * active state. + * + * @param xTimer The timer being queried. + * + * @return pdFALSE will be returned if the timer is dormant. A value other than + * pdFALSE will be returned if the timer is active. + * + * Example usage: + * @verbatim + * // This function assumes xTimer has already been created. + * void vAFunction( TimerHandle_t xTimer ) + * { + * if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )" + * { + * // xTimer is active, do something. + * } + * else + * { + * // xTimer is not active, do something else. + * } + * } + * @endverbatim + */ +BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/** + * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ); + * + * Simply returns the handle of the timer service/daemon task. It it not valid + * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started. + */ +TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION; + +/** + * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerStart() starts a timer that was previously created using the + * xTimerCreate() API function. If the timer had already been started and was + * already in the active state, then xTimerStart() has equivalent functionality + * to the xTimerReset() API function. + * + * Starting a timer ensures the timer is in the active state. If the timer + * is not stopped, deleted, or reset in the mean time, the callback function + * associated with the timer will get called 'n' ticks after xTimerStart() was + * called, where 'n' is the timers defined period. + * + * It is valid to call xTimerStart() before the scheduler has been started, but + * when this is done the timer will not actually start until the scheduler is + * started, and the timers expiry time will be relative to when the scheduler is + * started, not relative to when xTimerStart() was called. + * + * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart() + * to be available. + * + * @param xTimer The handle of the timer being started/restarted. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the start command to be successfully + * sent to the timer command queue, should the queue already be full when + * xTimerStart() was called. xTicksToWait is ignored if xTimerStart() is called + * before the scheduler is started. + * + * @return pdFAIL will be returned if the start command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system, although the + * timers expiry time is relative to when xTimerStart() is actually called. The + * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + * + */ +#define xTimerStart( xTimer, xTicksToWait ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerStop() stops a timer that was previously started using either of the + * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(), + * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions. + * + * Stopping a timer ensures the timer is not in the active state. + * + * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop() + * to be available. + * + * @param xTimer The handle of the timer being stopped. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the stop command to be successfully + * sent to the timer command queue, should the queue already be full when + * xTimerStop() was called. xTicksToWait is ignored if xTimerStop() is called + * before the scheduler is started. + * + * @return pdFAIL will be returned if the stop command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system. The timer + * service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + * + */ +#define xTimerStop( xTimer, xTicksToWait ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerChangePeriod( TimerHandle_t xTimer, + * TickType_t xNewPeriod, + * TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerChangePeriod() changes the period of a timer that was previously + * created using the xTimerCreate() API function. + * + * xTimerChangePeriod() can be called to change the period of an active or + * dormant state timer. + * + * The configUSE_TIMERS configuration constant must be set to 1 for + * xTimerChangePeriod() to be available. + * + * @param xTimer The handle of the timer that is having its period changed. + * + * @param xNewPeriod The new period for xTimer. Timer periods are specified in + * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time + * that has been specified in milliseconds. For example, if the timer must + * expire after 100 ticks, then xNewPeriod should be set to 100. Alternatively, + * if the timer must expire after 500ms, then xNewPeriod can be set to + * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than + * or equal to 1000. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the change period command to be + * successfully sent to the timer command queue, should the queue already be + * full when xTimerChangePeriod() was called. xTicksToWait is ignored if + * xTimerChangePeriod() is called before the scheduler is started. + * + * @return pdFAIL will be returned if the change period command could not be + * sent to the timer command queue even after xTicksToWait ticks had passed. + * pdPASS will be returned if the command was successfully sent to the timer + * command queue. When the command is actually processed will depend on the + * priority of the timer service/daemon task relative to other tasks in the + * system. The timer service/daemon task priority is set by the + * configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This function assumes xTimer has already been created. If the timer + * // referenced by xTimer is already active when it is called, then the timer + * // is deleted. If the timer referenced by xTimer is not active when it is + * // called, then the period of the timer is set to 500ms and the timer is + * // started. + * void vAFunction( TimerHandle_t xTimer ) + * { + * if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )" + * { + * // xTimer is already active - delete it. + * xTimerDelete( xTimer ); + * } + * else + * { + * // xTimer is not active, change its period to 500ms. This will also + * // cause the timer to start. Block for a maximum of 100 ticks if the + * // change period command cannot immediately be sent to the timer + * // command queue. + * if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS ) + * { + * // The command was successfully sent. + * } + * else + * { + * // The command could not be sent, even after waiting for 100 ticks + * // to pass. Take appropriate action here. + * } + * } + * } + * @endverbatim + */ +#define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerDelete() deletes a timer that was previously created using the + * xTimerCreate() API function. + * + * The configUSE_TIMERS configuration constant must be set to 1 for + * xTimerDelete() to be available. + * + * @param xTimer The handle of the timer being deleted. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the delete command to be + * successfully sent to the timer command queue, should the queue already be + * full when xTimerDelete() was called. xTicksToWait is ignored if xTimerDelete() + * is called before the scheduler is started. + * + * @return pdFAIL will be returned if the delete command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system. The timer + * service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * + * See the xTimerChangePeriod() API function example usage scenario. + */ +#define xTimerDelete( xTimer, xTicksToWait ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerReset() re-starts a timer that was previously created using the + * xTimerCreate() API function. If the timer had already been started and was + * already in the active state, then xTimerReset() will cause the timer to + * re-evaluate its expiry time so that it is relative to when xTimerReset() was + * called. If the timer was in the dormant state then xTimerReset() has + * equivalent functionality to the xTimerStart() API function. + * + * Resetting a timer ensures the timer is in the active state. If the timer + * is not stopped, deleted, or reset in the mean time, the callback function + * associated with the timer will get called 'n' ticks after xTimerReset() was + * called, where 'n' is the timers defined period. + * + * It is valid to call xTimerReset() before the scheduler has been started, but + * when this is done the timer will not actually start until the scheduler is + * started, and the timers expiry time will be relative to when the scheduler is + * started, not relative to when xTimerReset() was called. + * + * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset() + * to be available. + * + * @param xTimer The handle of the timer being reset/started/restarted. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the reset command to be successfully + * sent to the timer command queue, should the queue already be full when + * xTimerReset() was called. xTicksToWait is ignored if xTimerReset() is called + * before the scheduler is started. + * + * @return pdFAIL will be returned if the reset command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system, although the + * timers expiry time is relative to when xTimerStart() is actually called. The + * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * @verbatim + * // When a key is pressed, an LCD back-light is switched on. If 5 seconds pass + * // without a key being pressed, then the LCD back-light is switched off. In + * // this case, the timer is a one-shot timer. + * + * TimerHandle_t xBacklightTimer = NULL; + * + * // The callback function assigned to the one-shot timer. In this case the + * // parameter is not used. + * void vBacklightTimerCallback( TimerHandle_t pxTimer ) + * { + * // The timer expired, therefore 5 seconds must have passed since a key + * // was pressed. Switch off the LCD back-light. + * vSetBacklightState( BACKLIGHT_OFF ); + * } + * + * // The key press event handler. + * void vKeyPressEventHandler( char cKey ) + * { + * // Ensure the LCD back-light is on, then reset the timer that is + * // responsible for turning the back-light off after 5 seconds of + * // key inactivity. Wait 10 ticks for the command to be successfully sent + * // if it cannot be sent immediately. + * vSetBacklightState( BACKLIGHT_ON ); + * if( xTimerReset( xBacklightTimer, 100 ) != pdPASS ) + * { + * // The reset command was not executed successfully. Take appropriate + * // action here. + * } + * + * // Perform the rest of the key processing here. + * } + * + * void main( void ) + * { + * int32_t x; + * + * // Create then start the one-shot timer that is responsible for turning + * // the back-light off if no keys are pressed within a 5 second period. + * xBacklightTimer = xTimerCreate( "BacklightTimer", // Just a text name, not used by the kernel. + * ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks. + * pdFALSE, // The timer is a one-shot timer. + * 0, // The id is not used by the callback so can take any value. + * vBacklightTimerCallback // The callback function that switches the LCD back-light off. + * ); + * + * if( xBacklightTimer == NULL ) + * { + * // The timer was not created. + * } + * else + * { + * // Start the timer. No block time is specified, and even if one was + * // it would be ignored because the scheduler has not yet been + * // started. + * if( xTimerStart( xBacklightTimer, 0 ) != pdPASS ) + * { + * // The timer could not be set into the Active state. + * } + * } + * + * // ... + * // Create tasks here. + * // ... + * + * // Starting the scheduler will start the timer running as it has already + * // been set into the active state. + * vTaskStartScheduler(); + * + * // Should not reach here. + * for( ;; ); + * } + * @endverbatim + */ +#define xTimerReset( xTimer, xTicksToWait ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerStartFromISR( TimerHandle_t xTimer, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerStart() that can be called from an interrupt service + * routine. + * + * @param xTimer The handle of the timer being started/restarted. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerStartFromISR() writes a message to the timer + * command queue, so has the potential to transition the timer service/daemon + * task out of the Blocked state. If calling xTimerStartFromISR() causes the + * timer service/daemon task to leave the Blocked state, and the timer service/ + * daemon task has a priority equal to or greater than the currently executing + * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will + * get set to pdTRUE internally within the xTimerStartFromISR() function. If + * xTimerStartFromISR() sets this value to pdTRUE then a context switch should + * be performed before the interrupt exits. + * + * @return pdFAIL will be returned if the start command could not be sent to + * the timer command queue. pdPASS will be returned if the command was + * successfully sent to the timer command queue. When the command is actually + * processed will depend on the priority of the timer service/daemon task + * relative to other tasks in the system, although the timers expiry time is + * relative to when xTimerStartFromISR() is actually called. The timer + * service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xBacklightTimer has already been created. When a + * // key is pressed, an LCD back-light is switched on. If 5 seconds pass + * // without a key being pressed, then the LCD back-light is switched off. In + * // this case, the timer is a one-shot timer, and unlike the example given for + * // the xTimerReset() function, the key press event handler is an interrupt + * // service routine. + * + * // The callback function assigned to the one-shot timer. In this case the + * // parameter is not used. + * void vBacklightTimerCallback( TimerHandle_t pxTimer ) + * { + * // The timer expired, therefore 5 seconds must have passed since a key + * // was pressed. Switch off the LCD back-light. + * vSetBacklightState( BACKLIGHT_OFF ); + * } + * + * // The key press interrupt service routine. + * void vKeyPressEventInterruptHandler( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // Ensure the LCD back-light is on, then restart the timer that is + * // responsible for turning the back-light off after 5 seconds of + * // key inactivity. This is an interrupt service routine so can only + * // call FreeRTOS API functions that end in "FromISR". + * vSetBacklightState( BACKLIGHT_ON ); + * + * // xTimerStartFromISR() or xTimerResetFromISR() could be called here + * // as both cause the timer to re-calculate its expiry time. + * // xHigherPriorityTaskWoken was initialised to pdFALSE when it was + * // declared (in this function). + * if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The start command was not executed successfully. Take appropriate + * // action here. + * } + * + * // Perform the rest of the key processing here. + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U ) + +/** + * BaseType_t xTimerStopFromISR( TimerHandle_t xTimer, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerStop() that can be called from an interrupt service + * routine. + * + * @param xTimer The handle of the timer being stopped. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerStopFromISR() writes a message to the timer + * command queue, so has the potential to transition the timer service/daemon + * task out of the Blocked state. If calling xTimerStopFromISR() causes the + * timer service/daemon task to leave the Blocked state, and the timer service/ + * daemon task has a priority equal to or greater than the currently executing + * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will + * get set to pdTRUE internally within the xTimerStopFromISR() function. If + * xTimerStopFromISR() sets this value to pdTRUE then a context switch should + * be performed before the interrupt exits. + * + * @return pdFAIL will be returned if the stop command could not be sent to + * the timer command queue. pdPASS will be returned if the command was + * successfully sent to the timer command queue. When the command is actually + * processed will depend on the priority of the timer service/daemon task + * relative to other tasks in the system. The timer service/daemon task + * priority is set by the configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xTimer has already been created and started. When + * // an interrupt occurs, the timer should be simply stopped. + * + * // The interrupt service routine that stops the timer. + * void vAnExampleInterruptServiceRoutine( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // The interrupt has occurred - simply stop the timer. + * // xHigherPriorityTaskWoken was set to pdFALSE where it was defined + * // (within this function). As this is an interrupt service routine, only + * // FreeRTOS API functions that end in "FromISR" can be used. + * if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The stop command was not executed successfully. Take appropriate + * // action here. + * } + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U ) + +/** + * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer, + * TickType_t xNewPeriod, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerChangePeriod() that can be called from an interrupt + * service routine. + * + * @param xTimer The handle of the timer that is having its period changed. + * + * @param xNewPeriod The new period for xTimer. Timer periods are specified in + * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time + * that has been specified in milliseconds. For example, if the timer must + * expire after 100 ticks, then xNewPeriod should be set to 100. Alternatively, + * if the timer must expire after 500ms, then xNewPeriod can be set to + * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than + * or equal to 1000. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerChangePeriodFromISR() writes a message to the + * timer command queue, so has the potential to transition the timer service/ + * daemon task out of the Blocked state. If calling xTimerChangePeriodFromISR() + * causes the timer service/daemon task to leave the Blocked state, and the + * timer service/daemon task has a priority equal to or greater than the + * currently executing task (the task that was interrupted), then + * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the + * xTimerChangePeriodFromISR() function. If xTimerChangePeriodFromISR() sets + * this value to pdTRUE then a context switch should be performed before the + * interrupt exits. + * + * @return pdFAIL will be returned if the command to change the timers period + * could not be sent to the timer command queue. pdPASS will be returned if the + * command was successfully sent to the timer command queue. When the command + * is actually processed will depend on the priority of the timer service/daemon + * task relative to other tasks in the system. The timer service/daemon task + * priority is set by the configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xTimer has already been created and started. When + * // an interrupt occurs, the period of xTimer should be changed to 500ms. + * + * // The interrupt service routine that changes the period of xTimer. + * void vAnExampleInterruptServiceRoutine( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // The interrupt has occurred - change the period of xTimer to 500ms. + * // xHigherPriorityTaskWoken was set to pdFALSE where it was defined + * // (within this function). As this is an interrupt service routine, only + * // FreeRTOS API functions that end in "FromISR" can be used. + * if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The command to change the timers period was not executed + * // successfully. Take appropriate action here. + * } + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U ) + +/** + * BaseType_t xTimerResetFromISR( TimerHandle_t xTimer, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerReset() that can be called from an interrupt service + * routine. + * + * @param xTimer The handle of the timer that is to be started, reset, or + * restarted. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerResetFromISR() writes a message to the timer + * command queue, so has the potential to transition the timer service/daemon + * task out of the Blocked state. If calling xTimerResetFromISR() causes the + * timer service/daemon task to leave the Blocked state, and the timer service/ + * daemon task has a priority equal to or greater than the currently executing + * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will + * get set to pdTRUE internally within the xTimerResetFromISR() function. If + * xTimerResetFromISR() sets this value to pdTRUE then a context switch should + * be performed before the interrupt exits. + * + * @return pdFAIL will be returned if the reset command could not be sent to + * the timer command queue. pdPASS will be returned if the command was + * successfully sent to the timer command queue. When the command is actually + * processed will depend on the priority of the timer service/daemon task + * relative to other tasks in the system, although the timers expiry time is + * relative to when xTimerResetFromISR() is actually called. The timer service/daemon + * task priority is set by the configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xBacklightTimer has already been created. When a + * // key is pressed, an LCD back-light is switched on. If 5 seconds pass + * // without a key being pressed, then the LCD back-light is switched off. In + * // this case, the timer is a one-shot timer, and unlike the example given for + * // the xTimerReset() function, the key press event handler is an interrupt + * // service routine. + * + * // The callback function assigned to the one-shot timer. In this case the + * // parameter is not used. + * void vBacklightTimerCallback( TimerHandle_t pxTimer ) + * { + * // The timer expired, therefore 5 seconds must have passed since a key + * // was pressed. Switch off the LCD back-light. + * vSetBacklightState( BACKLIGHT_OFF ); + * } + * + * // The key press interrupt service routine. + * void vKeyPressEventInterruptHandler( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // Ensure the LCD back-light is on, then reset the timer that is + * // responsible for turning the back-light off after 5 seconds of + * // key inactivity. This is an interrupt service routine so can only + * // call FreeRTOS API functions that end in "FromISR". + * vSetBacklightState( BACKLIGHT_ON ); + * + * // xTimerStartFromISR() or xTimerResetFromISR() could be called here + * // as both cause the timer to re-calculate its expiry time. + * // xHigherPriorityTaskWoken was initialised to pdFALSE when it was + * // declared (in this function). + * if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The reset command was not executed successfully. Take appropriate + * // action here. + * } + * + * // Perform the rest of the key processing here. + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) \ + xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U ) + + +/** + * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, + * void *pvParameter1, + * uint32_t ulParameter2, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * + * Used from application interrupt service routines to defer the execution of a + * function to the RTOS daemon task (the timer service task, hence this function + * is implemented in timers.c and is prefixed with 'Timer'). + * + * Ideally an interrupt service routine (ISR) is kept as short as possible, but + * sometimes an ISR either has a lot of processing to do, or needs to perform + * processing that is not deterministic. In these cases + * xTimerPendFunctionCallFromISR() can be used to defer processing of a function + * to the RTOS daemon task. + * + * A mechanism is provided that allows the interrupt to return directly to the + * task that will subsequently execute the pended callback function. This + * allows the callback function to execute contiguously in time with the + * interrupt - just as if the callback had executed in the interrupt itself. + * + * @param xFunctionToPend The function to execute from the timer service/ + * daemon task. The function must conform to the PendedFunction_t + * prototype. + * + * @param pvParameter1 The value of the callback function's first parameter. + * The parameter has a void * type to allow it to be used to pass any type. + * For example, unsigned longs can be cast to a void *, or the void * can be + * used to point to a structure. + * + * @param ulParameter2 The value of the callback function's second parameter. + * + * @param pxHigherPriorityTaskWoken As mentioned above, calling this function + * will result in a message being sent to the timer daemon task. If the + * priority of the timer daemon task (which is set using + * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of + * the currently running task (the task the interrupt interrupted) then + * *pxHigherPriorityTaskWoken will be set to pdTRUE within + * xTimerPendFunctionCallFromISR(), indicating that a context switch should be + * requested before the interrupt exits. For that reason + * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the + * example code below. + * + * @return pdPASS is returned if the message was successfully sent to the + * timer daemon task, otherwise pdFALSE is returned. + * + * Example usage: + * @verbatim + * + * // The callback function that will execute in the context of the daemon task. + * // Note callback functions must all use this same prototype. + * void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 ) + * { + * BaseType_t xInterfaceToService; + * + * // The interface that requires servicing is passed in the second + * // parameter. The first parameter is not used in this case. + * xInterfaceToService = ( BaseType_t ) ulParameter2; + * + * // ...Perform the processing here... + * } + * + * // An ISR that receives data packets from multiple interfaces + * void vAnISR( void ) + * { + * BaseType_t xInterfaceToService, xHigherPriorityTaskWoken; + * + * // Query the hardware to determine which interface needs processing. + * xInterfaceToService = prvCheckInterfaces(); + * + * // The actual processing is to be deferred to a task. Request the + * // vProcessInterface() callback function is executed, passing in the + * // number of the interface that needs processing. The interface to + * // service is passed in the second parameter. The first parameter is + * // not used in this case. + * xHigherPriorityTaskWoken = pdFALSE; + * xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken ); + * + * // If xHigherPriorityTaskWoken is now set to pdTRUE then a context + * // switch should be requested. The macro used is port specific and will + * // be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to + * // the documentation page for the port being used. + * portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + * + * } + * @endverbatim + */ +BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, + void * pvParameter1, + uint32_t ulParameter2, + BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, + * void *pvParameter1, + * uint32_t ulParameter2, + * TickType_t xTicksToWait ); + * + * + * Used to defer the execution of a function to the RTOS daemon task (the timer + * service task, hence this function is implemented in timers.c and is prefixed + * with 'Timer'). + * + * @param xFunctionToPend The function to execute from the timer service/ + * daemon task. The function must conform to the PendedFunction_t + * prototype. + * + * @param pvParameter1 The value of the callback function's first parameter. + * The parameter has a void * type to allow it to be used to pass any type. + * For example, unsigned longs can be cast to a void *, or the void * can be + * used to point to a structure. + * + * @param ulParameter2 The value of the callback function's second parameter. + * + * @param xTicksToWait Calling this function will result in a message being + * sent to the timer daemon task on a queue. xTicksToWait is the amount of + * time the calling task should remain in the Blocked state (so not using any + * processing time) for space to become available on the timer queue if the + * queue is found to be full. + * + * @return pdPASS is returned if the message was successfully sent to the + * timer daemon task, otherwise pdFALSE is returned. + * + */ +BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, + void * pvParameter1, + uint32_t ulParameter2, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * const char * const pcTimerGetName( TimerHandle_t xTimer ); + * + * Returns the name that was assigned to a timer when the timer was created. + * + * @param xTimer The handle of the timer being queried. + * + * @return The name assigned to the timer specified by the xTimer parameter. + */ +const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ); + * + * Updates a timer to be either an auto-reload timer, in which case the timer + * automatically resets itself each time it expires, or a one-shot timer, in + * which case the timer will only expire once unless it is manually restarted. + * + * @param xTimer The handle of the timer being updated. + * + * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will + * expire repeatedly with a frequency set by the timer's period (see the + * xTimerPeriodInTicks parameter of the xTimerCreate() API function). If + * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and + * enter the dormant state after it expires. + */ +void vTimerSetReloadMode( TimerHandle_t xTimer, + const UBaseType_t uxAutoReload ) PRIVILEGED_FUNCTION; + +/** + * UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer ); + * + * Queries a timer to determine if it is an auto-reload timer, in which case the timer + * automatically resets itself each time it expires, or a one-shot timer, in + * which case the timer will only expire once unless it is manually restarted. + * + * @param xTimer The handle of the timer being queried. + * + * @return If the timer is an auto-reload timer then pdTRUE is returned, otherwise + * pdFALSE is returned. + */ +UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/** + * TickType_t xTimerGetPeriod( TimerHandle_t xTimer ); + * + * Returns the period of a timer. + * + * @param xTimer The handle of the timer being queried. + * + * @return The period of the timer in ticks. + */ +TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/** + * TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ); + * + * Returns the time in ticks at which the timer will expire. If this is less + * than the current tick count then the expiry time has overflowed from the + * current time. + * + * @param xTimer The handle of the timer being queried. + * + * @return If the timer is running then the time in ticks at which the timer + * will next expire is returned. If the timer is not running then the return + * value is undefined. + */ +TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/* + * Functions beyond this part are not part of the public API and are intended + * for use by the kernel only. + */ +BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION; +BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, + const BaseType_t xCommandID, + const TickType_t xOptionalValue, + BaseType_t * const pxHigherPriorityTaskWoken, + const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +#if ( configUSE_TRACE_FACILITY == 1 ) + void vTimerSetTimerNumber( TimerHandle_t xTimer, + UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION; + UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; +#endif + +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + +/** + * task.h + * @code{c} + * void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) + * @endcode + * + * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB. This function is required when + * configSUPPORT_STATIC_ALLOCATION is set. For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION + * + * @param ppxTimerTaskTCBBuffer A handle to a statically allocated TCB buffer + * @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task + * @param pulTimerTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer + */ + void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, + StackType_t ** ppxTimerTaskStackBuffer, + uint32_t * pulTimerTaskStackSize ); + +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ +#endif /* TIMERS_H */ diff --git a/freertos/cvitek/install/include/kernel/trcAssert.h b/freertos/cvitek/install/include/kernel/trcAssert.h new file mode 100644 index 000000000..a1cc7b9ea --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcAssert.h @@ -0,0 +1,143 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace assert APIs. + */ + +#ifndef TRC_ASSERT_H +#define TRC_ASSERT_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_assert_apis Trace Asserts APIs + * @ingroup trace_recorder_apis + * @{ + */ + +#ifndef TRC_CFG_USE_TRACE_ASSERT +#error "TRC_CFG_USE_TRACE_ASSERT is not defined. Please define it in trcConfig.h" +#endif + +#if ((TRC_CFG_USE_TRACE_ASSERT) == 1) + +/* Standard assert */ +#define TRC_ASSERT(__condition) if (!(__condition)) { prvTraceAssertCreate(__FILE__, __LINE__); return TRC_FAIL; } + +#define TRC_ASSERT_ALWAYS_EVALUATE TRC_ASSERT + +/* Standard assert with custom on fail actions */ +#define TRC_ASSERT_CUSTOM_ON_FAIL(__condition, __custom_on_fail) if (!(__condition)) { prvTraceAssertCreate(__FILE__, __LINE__); __custom_on_fail; } + +#define TRC_ASSERT_CUSTOM_ON_FAIL_ALWAYS_EVALUATE TRC_ASSERT_CUSTOM_ON_FAIL + +#if (defined(TRC_CFG_TEST_MODE) && (TRC_CFG_TEST_MODE) == 1) + +/* Asserts that two types have an equal size. Condition passed to function to avoid compilers warning about unreachable code due to constant value. */ +#define TRC_ASSERT_EQUAL_SIZE(x, y) if (!prvTraceAssertCheckCondition((TraceBaseType_t)(sizeof(x) == sizeof(y)))) { prvTraceAssertCreate(__FILE__, __LINE__); return TRC_FAIL; } + +/** + * @brief Inlined condition check to get around some compiler warnings for unused variables. + * + * @param[in] condition The condition + */ +inline TraceBaseType_t prvTraceAssertCheckCondition(TraceBaseType_t condition) +{ + return condition; +} + +#else + +#define TRC_ASSERT_EQUAL_SIZE(x, y) + +#endif + +#define TRC_ASSERT_BUFFER_SIZE (sizeof(TraceEntryHandle_t)) + +typedef struct TraceAssertBuffer +{ + uint8_t buffer[TRC_ASSERT_BUFFER_SIZE]; +} TraceAssertBuffer_t; + +/** + * @internal Initializes assert system + * + * @param[in] pxBuffer The assert data buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceAssertInitialize(TraceAssertBuffer_t *pxBuffer); + +/** + * @internal Creates an assert + * + * @param[in] szFilePath File name + * @param[in] uxLineNumber Line number + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +void prvTraceAssertCreate(const char* szFilePath, TraceUnsignedBaseType_t uxLineNumber); + +/** + * @brief Retrieves the assert and line number + * + * @param[out] pxFileNameStringHandle File name string handle + * @param[out] puxLineNumber Line number + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceAssertGet(TraceStringHandle_t* pxFileNameStringHandle, TraceUnsignedBaseType_t* puxLineNumber); + +#else /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +#define TRC_ASSERT(__condition) + +#define TRC_ASSERT_ALWAYS_EVALUATE(__condition) (void)(__condition) + +#define TRC_ASSERT_CUSTOM_ON_FAIL(__condition, __custom_on_fail) + +#define TRC_ASSERT_CUSTOM_ON_FAIL_ALWAYS_EVALUATE(__condition, __custom_on_fail) (__condition) + +#define TRC_ASSERT_EQUAL_SIZE(x, y) + +typedef struct TraceAssertBuffer +{ + uint32_t buffer[1]; +} TraceAssertBuffer_t; + +#define xTraceAssertInitialize(pxBuffer) ((void)pxBuffer, TRC_SUCCESS) + +#define xTraceAssertGet(pxFileNameStringHandle, puxLineNumber) ((void)pxFileNameStringHandle, (void)puxLineNumber, TRC_FAIL) + +#endif /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_ASSERT_H */ diff --git a/freertos/cvitek/install/include/kernel/trcConfig.h b/freertos/cvitek/install/include/kernel/trcConfig.h new file mode 100644 index 000000000..3ed377351 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcConfig.h @@ -0,0 +1,320 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * Main configuration parameters for the trace recorder library. + * More settings can be found in trcStreamingConfig.h and trcSnapshotConfig.h. + */ + +#ifndef TRC_CONFIG_H +#define TRC_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/****************************************************************************** + * Include of processor header file + * + * Here you may need to include the header file for your processor. This is + * required at least for the ARM Cortex-M port, that uses the ARM CMSIS API. + * Try that in case of build problems. Otherwise, remove the #error line below. + *****************************************************************************/ +//#error "Trace Recorder: Please include your processor's header file here and remove this line." + +/** + * @def TRC_CFG_HARDWARE_PORT + * @brief Specify what hardware port to use (i.e., the "timestamping driver"). + * + * All ARM Cortex-M MCUs are supported by "TRC_HARDWARE_PORT_ARM_Cortex_M". + * This port uses the DWT cycle counter for Cortex-M3/M4/M7 devices, which is + * available on most such devices. In case your device don't have DWT support, + * you will get an error message opening the trace. In that case, you may + * force the recorder to use SysTick timestamping instead, using this define: + * + * #define TRC_CFG_ARM_CM_USE_SYSTICK + * + * For ARM Cortex-M0/M0+ devices, SysTick mode is used automatically. + * + * See trcHardwarePort.h for available ports and information on how to + * define your own port, if not already present. + */ +#define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_RISCV_RV32I + +/** + * @def TRC_CFG_SCHEDULING_ONLY + * @brief Macro which should be defined as an integer value. + * + * If this setting is enabled (= 1), only scheduling events are recorded. + * If disabled (= 0), all events are recorded (unless filtered in other ways). + * + * Default value is 0 (= include additional events). + */ +#define TRC_CFG_SCHEDULING_ONLY 0 + +/** + * @def TRC_CFG_INCLUDE_MEMMANG_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * This controls if malloc and free calls should be traced. Set this to zero (0) + * to exclude malloc/free calls, or one (1) to include such events in the trace. + * + * Default value is 1. + */ +#define TRC_CFG_INCLUDE_MEMMANG_EVENTS 1 + +/** + * @def TRC_CFG_INCLUDE_USER_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), all code related to User Events is excluded in order + * to reduce code size. Any attempts of storing User Events are then silently + * ignored. + * + * User Events are application-generated events, like "printf" but for the + * trace log, generated using vTracePrint and vTracePrintF. + * The formatting is done on host-side, by Tracealyzer. User Events are + * therefore much faster than a console printf and can often be used + * in timing critical code without problems. + * + * Note: In streaming mode, User Events are used to provide error messages + * and warnings from the recorder (in case of incorrect configuration) for + * display in Tracealyzer. Disabling user events will also disable these + * warnings. You can however still catch them by calling xTraceErrorGetLast + * or by putting breakpoints in xTraceError and xTraceWarning. + * + * Default value is 1. + */ +#define TRC_CFG_INCLUDE_USER_EVENTS 1 + +/** + * @def TRC_CFG_INCLUDE_ISR_TRACING + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the code for recording Interrupt Service Routines is + * excluded, in order to reduce code size. This means that any calls to + * vTraceStoreISRBegin/vTraceStoreISREnd will be ignored. + * This does not completely disable ISR tracing, in cases where an ISR is + * calling a traced kernel service. These events will still be recorded and + * show up in anonymous ISR instances in Tracealyzer, with names such as + * "ISR sending to ". + * To disable such tracing, please refer to vTraceSetFilterGroup and + * vTraceSetFilterMask. + * + * Default value is 1. + * + * Note: tracing ISRs requires that you insert calls to vTraceStoreISRBegin + * and vTraceStoreISREnd in your interrupt handlers. + */ +#define TRC_CFG_INCLUDE_ISR_TRACING 1 + +/** + * @def TRC_CFG_INCLUDE_READY_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If one (1), events are recorded when tasks enter scheduling state "ready". + * This allows Tracealyzer to show the initial pending time before tasks enter + * the execution state, and present accurate response times. + * If zero (0), "ready events" are not created, which allows for recording + * longer traces in the same amount of RAM. + * + * Default value is 1. + */ +#define TRC_CFG_INCLUDE_READY_EVENTS 1 + +/** + * @def TRC_CFG_INCLUDE_OSTICK_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is one (1), events will be generated whenever the OS clock is + * increased. If zero (0), OS tick events are not generated, which allows for + * recording longer traces in the same amount of RAM. + * + * Default value is 1. + */ +#define TRC_CFG_INCLUDE_OSTICK_EVENTS 1 + +/** + * @def TRC_CFG_ENABLE_STACK_MONITOR + * @brief If enabled (1), the recorder periodically reports the unused stack space of + * all active tasks. + * The stack monitoring runs in the Tracealyzer Control task, TzCtrl. This task + * is always created by the recorder when in streaming mode. + * In snapshot mode, the TzCtrl task is only used for stack monitoring and is + * not created unless this is enabled. + */ +#define TRC_CFG_ENABLE_STACK_MONITOR 1 + +/** + * @def TRC_CFG_STACK_MONITOR_MAX_TASKS + * @brief Macro which should be defined as a non-zero integer value. + * + * This controls how many tasks that can be monitored by the stack monitor. + * If this is too small, some tasks will be excluded and a warning is shown. + * + * Default value is 10. + */ +#define TRC_CFG_STACK_MONITOR_MAX_TASKS 10 + +/** + * @def TRC_CFG_STACK_MONITOR_MAX_REPORTS + * @brief Macro which should be defined as a non-zero integer value. + * + * This defines how many tasks that will be subject to stack usage analysis for + * each execution of the Tracealyzer Control task (TzCtrl). Note that the stack + * monitoring cycles between the tasks, so this does not affect WHICH tasks that + * are monitored, but HOW OFTEN each task stack is analyzed. + * + * This setting can be combined with TRC_CFG_CTRL_TASK_DELAY to tune the + * frequency of the stack monitoring. This is motivated since the stack analysis + * can take some time to execute. + * However, note that the stack analysis runs in a separate task (TzCtrl) that + * can be executed on low priority. This way, you can avoid that the stack + * analysis disturbs any time-sensitive tasks. + * + * Default value is 1. + */ +#define TRC_CFG_STACK_MONITOR_MAX_REPORTS 1 + +/** + * @def TRC_CFG_CTRL_TASK_PRIORITY + * @brief The scheduling priority of the Tracealyzer Control (TzCtrl) task. + * + * In streaming mode, TzCtrl is used to receive start/stop commands from + * Tracealyzer and in some cases also to transmit the trace data (for stream + * ports that uses the internal buffer, like TCP/IP). For such stream ports, + * make sure the TzCtrl priority is high enough to ensure reliable periodic + * execution and transfer of the data, but low enough to avoid disturbing any + * time-sensitive functions. + * + * In Snapshot mode, TzCtrl is only used for the stack usage monitoring and is + * not created if stack monitoring is disabled. TRC_CFG_CTRL_TASK_PRIORITY should + * be low, to avoid disturbing any time-sensitive tasks. + */ +#define TRC_CFG_CTRL_TASK_PRIORITY 1 + +/** + * @def TRC_CFG_CTRL_TASK_DELAY + * @brief The delay between loops of the TzCtrl task (see TRC_CFG_CTRL_TASK_PRIORITY), + * which affects the frequency of the stack monitoring. + * + * In streaming mode, this also affects the trace data transfer if you are using + * a stream port leveraging the internal buffer (like TCP/IP). A shorter delay + * increases the CPU load of TzCtrl somewhat, but may improve the performance of + * of the trace streaming, especially if the trace buffer is small. + */ +#define TRC_CFG_CTRL_TASK_DELAY 2 + +/** + * @def TRC_CFG_CTRL_TASK_STACK_SIZE + * @brief The stack size of the Tracealyzer Control (TzCtrl) task. + * See TRC_CFG_CTRL_TASK_PRIORITY for further information about TzCtrl. + */ +#define TRC_CFG_CTRL_TASK_STACK_SIZE 1024 + +/** + * @def TRC_CFG_RECORDER_BUFFER_ALLOCATION + * @brief Specifies how the recorder buffer is allocated (also in case of streaming, in + * port using the recorder's internal temporary buffer) + * + * Values: + * TRC_RECORDER_BUFFER_ALLOCATION_STATIC - Static allocation (internal) + * TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC - Malloc in vTraceEnable + * TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM - Use vTraceSetRecorderDataBuffer + * + * Static and dynamic mode does the allocation for you, either in compile time + * (static) or in runtime (malloc). + * The custom mode allows you to control how and where the allocation is made, + * for details see TRC_ALLOC_CUSTOM_BUFFER and vTraceSetRecorderDataBuffer(). + */ +#define TRC_CFG_RECORDER_BUFFER_ALLOCATION TRC_RECORDER_BUFFER_ALLOCATION_STATIC + +/** + * @def TRC_CFG_MAX_ISR_NESTING + * @brief Defines how many levels of interrupt nesting the recorder can handle, in + * case multiple ISRs are traced and ISR nesting is possible. If this + * is exceeded, the particular ISR will not be traced and the recorder then + * logs an error message. This setting is used to allocate an internal stack + * for keeping track of the previous execution context (4 byte per entry). + * + * This value must be a non-zero positive constant, at least 1. + * + * Default value: 8 + */ +#define TRC_CFG_MAX_ISR_NESTING 8 + +/** + * @def TRC_CFG_ISR_TAILCHAINING_THRESHOLD + * @brief Macro which should be defined as an integer value. + * + * If tracing multiple ISRs, this setting allows for accurate display of the + * context-switching also in cases when the ISRs execute in direct sequence. + * + * vTraceStoreISREnd normally assumes that the ISR returns to the previous + * context, i.e., a task or a preempted ISR. But if another traced ISR + * executes in direct sequence, Tracealyzer may incorrectly display a minimal + * fragment of the previous context in between the ISRs. + * + * By using TRC_CFG_ISR_TAILCHAINING_THRESHOLD you can avoid this. This is + * however a threshold value that must be measured for your specific setup. + * See http://percepio.com/2014/03/21/isr_tailchaining_threshold/ + * + * The default setting is 0, meaning "disabled" and that you may get an + * extra fragments of the previous context in between tail-chained ISRs. + * + * Note: This setting has separate definitions in trcSnapshotConfig.h and + * trcStreamingConfig.h, since it is affected by the recorder mode. + */ +#define TRC_CFG_ISR_TAILCHAINING_THRESHOLD 0 + +/** + * @def TRC_CFG_RECORDER_DATA_INIT + * @brief Macro which states wether the recorder data should have an initial value. + * + * In very specific cases where traced objects are created before main(), + * the recorder will need to be started even before that. In these cases, + * the recorder data would be initialized by vTraceEnable(TRC_INIT) but could + * then later be overwritten by the initialization value. + * If this is an issue for you, set TRC_CFG_RECORDER_DATA_INIT to 0. + * The following code can then be used before any traced objects are created: + * + * extern uint32_t RecorderEnabled; + * RecorderEnabled = 0; + * xTraceInitialize(); + * + * After the clocks are properly initialized, use vTraceEnable(...) to start + * the tracing. + * + * Default value is 1. + */ +#define TRC_CFG_RECORDER_DATA_INIT 1 + +/** + * @def TRC_CFG_RECORDER_DATA_ATTRIBUTE + * @brief When setting TRC_CFG_RECORDER_DATA_INIT to 0, you might also need to make + * sure certain recorder data is placed in a specific RAM section to avoid being + * zeroed out after initialization. Define TRC_CFG_RECORDER_DATA_ATTRIBUTE as + * that attribute. + * + * Example: + * #define TRC_CFG_RECORDER_DATA_ATTRIBUTE __attribute__((section(".bss.trace_recorder_data"))) + * + * Default value is empty. + */ +#define TRC_CFG_RECORDER_DATA_ATTRIBUTE + +/** + * @def TRC_CFG_USE_TRACE_ASSERT + * @brief Enable or disable debug asserts. Information regarding any assert that is + * triggered will be in trcAssert.c. + */ +#define TRC_CFG_USE_TRACE_ASSERT 0 + +#ifdef __cplusplus +} +#endif + +#endif /* _TRC_CONFIG_H */ diff --git a/freertos/cvitek/install/include/kernel/trcCounter.h b/freertos/cvitek/install/include/kernel/trcCounter.h new file mode 100644 index 000000000..71687550e --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcCounter.h @@ -0,0 +1,210 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace counter APIs. + */ + +#ifndef TRC_COUNTER_H +#define TRC_COUNTER_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#define TRC_COUNTER_VALUE_INDEX 0 +#define TRC_COUNTER_LOWER_LIMIT_INDEX 1 +#define TRC_COUNTER_UPPER_LIMIT_INDEX 2 + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_counter_apis Trace Counter APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Sets trace counter callback. + * + * @param[in] xCallback Callback + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceCounterSetCallback(TraceCounterCallback_t xCallback); + +/** + * @brief Creates trace counter. + * + * @param[in] szName Name. + * @param[in] xInitialValue Initial value. + * @param[in] xLowerLimit Lower limit. + * @param[in] xUpperLimit Upper limit. + * @param[out] pxCounterHandle Uninitialized trace counter handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceCounterCreate(const char* szName, TraceBaseType_t xInitialValue, TraceBaseType_t xLowerLimit, TraceBaseType_t xUpperLimit, TraceCounterHandle_t* pxCounterHandle); + +/** + * @brief Adds value to trace counter. + * + * @param[in] xCounterHandle Initialized trace counter handle. + * @param[in] xValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceCounterAdd(xCounterHandle, xValue) xTraceCounterSet(xCounterHandle, (TraceBaseType_t)(xTraceEntryGetStateReturn((TraceEntryHandle_t)(xCounterHandle), TRC_COUNTER_VALUE_INDEX)) + (xValue)) + +/** + * @brief Sets trace counter value. + * + * @param[in] xCounterHandle Initialized trace counter handle. + * @param[in] xValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceCounterSet(TraceCounterHandle_t xCounterHandle, TraceBaseType_t xValue); + +/** + * @brief Gets trace counter value. + * + * @param[in] xCounterHandle Initialized trace counter handle. + * @param[out] pxValue Returned value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceCounterGet(xCounterHandle, pxValue) xTraceEntryGetState((TraceEntryHandle_t)(xCounterHandle), TRC_COUNTER_VALUE_INDEX, (TraceUnsignedBaseType_t*)(pxValue)) + +/** + * @brief Increases trace counter value. + * + * @param[in] xCounterHandle Initialized trace counter handle + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceCounterIncrease(xCounterHandle) xTraceCounterAdd(xCounterHandle, 1) + +/** + * @brief Decreases trace counter value. + * + * @param[in] xCounterHandle Initialized trace counter handle + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceCounterDecrease(xCounterHandle) xTraceCounterAdd(xCounterHandle, -1) + +/** + * @brief Gets trace counter upper limit. + * + * @param[in] xCounterHandle Initialized trace counter handle + * @param[out] pxValue Returned value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceCounterGetUpperLimit(xCounterHandle, pxValue) xTraceEntryGetState((TraceEntryHandle_t)(xCounterHandle), TRC_COUNTER_UPPER_LIMIT_INDEX, (TraceUnsignedBaseType_t*)(pxValue)) + +/** + * @brief Gets trace counter lower limit. + * + * @param[in] xCounterHandle Initialized trace counter handle + * @param[out] pxValue Returned value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceCounterGetLowerLimit(xCounterHandle, pxValue) xTraceEntryGetState((TraceEntryHandle_t)(xCounterHandle), TRC_COUNTER_LOWER_LIMIT_INDEX, (TraceUnsignedBaseType_t*)(pxValue)) + +/** + * @brief Gets trace counter name. + * + * @param[in] xCounterHandle Initialized trace counter handle. + * @param[out] pszName Returned name. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceCounterGetName(xCounterHandle, pszName) xTraceEntryGetSymbol((TraceEntryHandle_t)(xCounterHandle), pszName) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#else + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterSetCallback(__xCallback) ((void)(__xCallback), TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterCreate(__szName, __xInitialValue, __xLowerLimit, __xUpperLimit, __pxCounterHandle) ((void)(__szName), (void)(__xInitialValue), (void)(__xLowerLimit), (void)(__xUpperLimit), *(__pxCounterHandle) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterAdd(__xCounterHandle, __xValue) ((void)(__xCounterHandle), (void)(__xValue), TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterSet(__xCounterHandle, __xValue) ((void)(__xCounterHandle), (void)(__xValue), TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterGet(__xCounterHandle, __pxValue) ((void)(__xCounterHandle), *(__pxValue) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterIncrease(__xCounterHandle) ((void)(__xCounterHandle), TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterDecrease(__xCounterHandle) ((void)(__xCounterHandle), TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterGetUpperLimit(__xCounterHandle, __pxValue) ((void)(__xCounterHandle), *(__pxValue) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterGetLowerLimit(__xCounterHandle, __pxValue) ((void)(__xCounterHandle), *(__pxValue) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceCounterGetName(__xCounterHandle, __pszName) ((void)(__xCounterHandle), *(__pszName) = "N/A", TRC_SUCCESS) + +#endif + +#endif + +#endif diff --git a/freertos/cvitek/install/include/kernel/trcDefines.h b/freertos/cvitek/install/include/kernel/trcDefines.h new file mode 100644 index 000000000..d013b24e2 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcDefines.h @@ -0,0 +1,183 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * Some common defines for the trace recorder. + */ + +#ifndef TRC_DEFINES_H +#define TRC_DEFINES_H + +#define TRC_SUCCESS (0) +#define TRC_FAIL (1) + +#define TRC_FREE_RUNNING_32BIT_INCR 1 +#define TRC_FREE_RUNNING_32BIT_DECR 2 +#define TRC_OS_TIMER_INCR 3 +#define TRC_OS_TIMER_DECR 4 +#define TRC_CUSTOM_TIMER_INCR 5 +#define TRC_CUSTOM_TIMER_DECR 6 + +#define TRC_STATE_IN_STARTUP 0 +#define TRC_STATE_IN_TASKSWITCH 1 +#define TRC_STATE_IN_APPLICATION 2 + +/* Start options for vTraceEnable. */ +#define TRC_START_FROM_HOST 0 +#define TRC_START 1 +#define TRC_START_AWAIT_HOST 2 + +#define TRC_ACKNOWLEDGED (0xABC99123) + +/* Command codes for TzCtrl task */ +#define CMD_SET_ACTIVE 1 /* Start (param1 = 1) or Stop (param1 = 0) */ + +/* The final command code, used to validate commands. */ +#define CMD_LAST_COMMAND 1 + +#define TRC_RECORDER_MODE_SNAPSHOT 0 +#define TRC_RECORDER_MODE_STREAMING 1 + +#define TRC_SNAPSHOT_MODE_RING_BUFFER (0x01) +#define TRC_SNAPSHOT_MODE_STOP_WHEN_FULL (0x02) + +#define TRC_RECORDER_BUFFER_ALLOCATION_STATIC (0x00) +#define TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC (0x01) +#define TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM (0x02) + +#define TRC_OPTION_BIT_SHIFT_IRQ_ORDER 0 +#define TRC_OPTION_BIT_SHIFT_BASE_SIZE 8 + +/******************************************************************************/ +/*** ERROR AND WARNING CODES (check using xTraceErrorGetLast) *****************/ +/******************************************************************************/ + +#define TRC_ERROR_NONE 0x00 + +#define TRC_ERROR_ASSERT 0x01 +#define TRC_ERROR_EVENT_CODE_TOO_LARGE 0x02 +#define TRC_ERROR_ISR_NESTING_OVERFLOW 0x03 +#define TRC_ERROR_DWT_NOT_SUPPORTED 0x04 +#define TRC_ERROR_DWT_CYCCNT_NOT_SUPPORTED 0x05 +#define TRC_ERROR_TZCTRLTASK_NOT_CREATED 0x06 +#define TRC_ERROR_STREAM_PORT_WRITE 0x07 + +#define TRC_WARNING_ENTRY_TABLE_SLOTS 0x08 +#define TRC_WARNING_ENTRY_SYMBOL_MAX_LENGTH 0x09 +#define TRC_WARNING_EVENT_SIZE_TRUNCATED 0x0A +#define TRC_WARNING_STREAM_PORT_READ 0x0B +#define TRC_WARNING_STREAM_PORT_WRITE 0x0C +#define TRC_WARNING_STREAM_PORT_INITIAL_BLOCKING 0x0D +#define TRC_WARNING_STACKMON_NO_SLOTS 0x0E + +/* Entry Option definitions */ +#define TRC_ENTRY_OPTION_EXCLUDED 0x00000001 +#define TRC_ENTRY_OPTION_HEAP 0x80000000 +#define TRC_ENTRY_OPTION_EXTENSION 0x40000000 +#define TRC_ENTRY_OPTION_STATE_MACHINE 0x20000000 +#define TRC_ENTRY_OPTION_STATE_MACHINE_STATE 0x10000000 +#define TRC_ENTRY_OPTION_INTERVAL_CHANNEL 0x08000000 +#define TRC_ENTRY_OPTION_COUNTER 0x04000000 +#define TRC_ENTRY_OPTION_INTERVAL_CHANNEL_SET 0x02000000 + +#define TRC_RECORDER_COMPONENT_CORE 0x00000001 +#define TRC_RECORDER_COMPONENT_ASSERT 0x00000002 +#define TRC_RECORDER_COMPONENT_BLOB 0x00000004 +#define TRC_RECORDER_COMPONENT_DIAGNOSTICS 0x00000008 +#define TRC_RECORDER_COMPONENT_ENTRY 0x00000010 +#define TRC_RECORDER_COMPONENT_ERROR 0x00000020 +#define TRC_RECORDER_COMPONENT_EVENT 0x00000040 +#define TRC_RECORDER_COMPONENT_EVENT_BUFFER 0x00000080 +#define TRC_RECORDER_COMPONENT_EXTENSION 0x00000100 +#define TRC_RECORDER_COMPONENT_HEAP 0x00000200 +#define TRC_RECORDER_COMPONENT_INTERNAL_EVENT_BUFFER 0x00000400 +#define TRC_RECORDER_COMPONENT_INTERVAL 0x00000800 +#define TRC_RECORDER_COMPONENT_ISR 0x00001000 +#define TRC_RECORDER_COMPONENT_MULTI_CORE_EVENT_BUFFER 0x00002000 +#define TRC_RECORDER_COMPONENT_OBJECT 0x00004000 +#define TRC_RECORDER_COMPONENT_PRINT 0x00008000 +#define TRC_RECORDER_COMPONENT_STACK_MONITOR 0x00010000 +#define TRC_RECORDER_COMPONENT_STATE_MACHINE 0x00020000 +#define TRC_RECORDER_COMPONENT_STATIC_BUFFER 0x00040000 +#define TRC_RECORDER_COMPONENT_STRING 0x00080000 +#define TRC_RECORDER_COMPONENT_TASK 0x00100000 +#define TRC_RECORDER_COMPONENT_TIMESTAMP 0x00200000 +#define TRC_RECORDER_COMPONENT_COUNTER 0x00400000 + +/* Filter Groups */ +#define FilterGroup0 (uint16_t)0x0001 +#define FilterGroup1 (uint16_t)0x0002 +#define FilterGroup2 (uint16_t)0x0004 +#define FilterGroup3 (uint16_t)0x0008 +#define FilterGroup4 (uint16_t)0x0010 +#define FilterGroup5 (uint16_t)0x0020 +#define FilterGroup6 (uint16_t)0x0040 +#define FilterGroup7 (uint16_t)0x0080 +#define FilterGroup8 (uint16_t)0x0100 +#define FilterGroup9 (uint16_t)0x0200 +#define FilterGroup10 (uint16_t)0x0400 +#define FilterGroup11 (uint16_t)0x0800 +#define FilterGroup12 (uint16_t)0x1000 +#define FilterGroup13 (uint16_t)0x2000 +#define FilterGroup14 (uint16_t)0x4000 +#define FilterGroup15 (uint16_t)0x8000 + +/****************************************************************************** + * Supported ports + * + * TRC_HARDWARE_PORT_HWIndependent + * A hardware independent fallback option for event timestamping. Provides low + * resolution timestamps based on the OS tick. + * This may be used on the Win32 port, but may also be used on embedded hardware + * platforms. All time durations will be truncated to the OS tick frequency, + * typically 1 KHz. This means that a task or ISR that executes in less than + * 1 ms get an execution time of zero. + * + * TRC_HARDWARE_PORT_APPLICATION_DEFINED + * Allows for defining the port macros in other source code files. + * + * TRC_HARDWARE_PORT_Win32 + * "Accurate" timestamping based on the Windows performance counter for Win32 + * builds. Note that this gives the host machine time, not the kernel time. + * + * Hardware specific ports + * To get accurate timestamping, a hardware timer is necessary. Below are the + * available ports. Some of these are "unofficial", meaning that + * they have not yet been verified by Percepio but have been contributed by + * external developers. They should work, otherwise let us know by emailing + * support@percepio.com. Some work on any OS platform, while other are specific + * to a certain operating system. + *****************************************************************************/ + +/****** Port Name ************************************* Code ** Official ** OS Platform *********/ +#define TRC_HARDWARE_PORT_APPLICATION_DEFINED 98 /* - - */ +#define TRC_HARDWARE_PORT_NOT_SET 99 /* - - */ +#define TRC_HARDWARE_PORT_HWIndependent 0 /* Yes Any */ +#define TRC_HARDWARE_PORT_Win32 1 /* Yes FreeRTOS on Win32 */ +#define TRC_HARDWARE_PORT_Atmel_AT91SAM7 2 /* No Any */ +#define TRC_HARDWARE_PORT_Atmel_UC3A0 3 /* No Any */ +#define TRC_HARDWARE_PORT_ARM_Cortex_M 4 /* Yes Any */ +#define TRC_HARDWARE_PORT_Renesas_RX600 6 /* Yes Any */ +#define TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32 7 /* Yes Any */ +#define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_TMS570_RM48 8 /* Yes Any */ +#define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_MSP430 9 /* No Any */ +#define TRC_HARDWARE_PORT_XILINX_PPC405 11 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_XILINX_PPC440 12 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_XILINX_MICROBLAZE 13 /* No Any */ +#define TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5 14 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_NXP_LPC210X 15 /* No Any */ +#define TRC_HARDWARE_PORT_ARM_CORTEX_A9 16 /* Yes Any */ +#define TRC_HARDWARE_PORT_POWERPC_Z4 17 /* No FreeRTOS */ +#define TRC_HARDWARE_PORT_Altera_NiosII 18 /* Yes Any (Tested with FreeRTOS) */ +#define TRC_HARDWARE_PORT_ZEPHYR 19 /* Yes Zephyr */ +#define TRC_HARDWARE_PORT_XTensa_LX6 20 /* Yes ESP-IDF FreeRTOS */ +#define TRC_HARDWARE_PORT_XTensa_LX7 21 /* Yes ESP-IDF FreeRTOS */ +#define TRC_HARDWARE_PORT_Win64 22 /* Yes FreeRTOS on Win64 */ +#define TRC_HARDWARE_PORT_XMOS_XCOREAI 23 /* Yes FreeRTOS SMP */ +#define TRC_HARDWARE_PORT_RISCV_RV32I 24 /* Yes FreeRTOS */ +#define TRC_HARDWARE_PORT_CYCLONE_V_HPS 25 /* Yes FreeRTOS */ + +#endif /* TRC_PORTDEFINES_H */ diff --git a/freertos/cvitek/install/include/kernel/trcDiagnostics.h b/freertos/cvitek/install/include/kernel/trcDiagnostics.h new file mode 100644 index 000000000..796a940fd --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcDiagnostics.h @@ -0,0 +1,145 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace diagnostic APIs. + */ + +#ifndef TRC_DIAGNOSTICS_H +#define TRC_DIAGNOSTICS_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRC_DIAGNOSTICS_COUNT 5 + +typedef enum TraceDiagnosticsType +{ + TRC_DIAGNOSTICS_ENTRY_SYMBOL_LONGEST_LENGTH = 0x00, + TRC_DIAGNOSTICS_ENTRY_SLOTS_NO_ROOM = 0x01, + TRC_DIAGNOSTICS_BLOB_MAX_BYTES_TRUNCATED = 0x02, + TRC_DIAGNOSTICS_STACK_MONITOR_NO_SLOTS = 0x03, + TRC_DIAGNOSTICS_ASSERTS_TRIGGERED = 0x04, +} TraceDiagnosticsType_t; + +typedef struct TraceDiagnosticsBuffer +{ + uint8_t buffer[sizeof(TraceBaseType_t) * (TRC_DIAGNOSTICS_COUNT)]; +} TraceDiagnosticsBuffer_t; + +/** + * @internal Initialize diagnostics + * + * @param[in] pxBuffer Diagnostics buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsInitialize(TraceDiagnosticsBuffer_t* pxBuffer); + +/** + * @brief Retrieve diagnostics value + * + * @param[in] xType Diagnostics type + * @param[out] pxValue Pointer to value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsGet(TraceDiagnosticsType_t xType, TraceBaseType_t* pxValue); + +/** + * @brief Set diagnostics value + * + * @param[in] xType Diagnostics type + * @param[in] xValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsSet(TraceDiagnosticsType_t xType, TraceBaseType_t xValue); + +/** + * @brief Add to diagnostics value + * + * @param[in] xType Diagnostics type + * @param[in] xValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsAdd(TraceDiagnosticsType_t xType, TraceBaseType_t xValue); + +/** + * @brief Increase diagnostics value + * + * @param[in] xType Diagnostics type + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsIncrease(TraceDiagnosticsType_t xType); + +/** + * @brief Decrease diagnostics value + * + * @param[in] xType Diagnostics type + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsDecrease(TraceDiagnosticsType_t xType); + +/** + * @brief Set a new diagnostics value if higher than previous value + * + * @param[in] xType Dagnostics type + * @param[in] xValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsSetIfHigher(TraceDiagnosticsType_t xType, TraceBaseType_t xValue); + +/** + * @brief Set a new diagnostics value if lower than previous value + * + * @param[in] xType Dagnostics type + * @param[in] xValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsSetIfLower(TraceDiagnosticsType_t xType, TraceBaseType_t xValue); + +/** + * @brief Check the diagnostics status + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDiagnosticsCheckStatus(void); + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_DIAGNOSTICS_H */ diff --git a/freertos/cvitek/install/include/kernel/trcEntryTable.h b/freertos/cvitek/install/include/kernel/trcEntryTable.h new file mode 100644 index 000000000..520bb9a45 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcEntryTable.h @@ -0,0 +1,270 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace entry table APIs. + */ + +#ifndef TRC_ENTRY_TABLE_H +#define TRC_ENTRY_TABLE_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_entry_table_apis Trace Entry Table APIs + * @ingroup trace_recorder_apis + * @{ + */ + +#define TRC_ENTRY_CREATE_WITH_ADDRESS(_pvAddress, _pxEntryHandle) (xTraceEntryCreate(_pxEntryHandle) == TRC_SUCCESS ? (((TraceEntry_t*)*(_pxEntryHandle))->pvAddress = (_pvAddress), TRC_SUCCESS) : TRC_FAIL) +#define TRC_ENTRY_SET_STATE(xEntryHandle, uiStateIndex, uxState) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(((TraceEntry_t*)(xEntryHandle))->xStates[uiStateIndex] = (uxState), TRC_SUCCESS) +#define TRC_ENTRY_SET_OPTIONS(xEntryHandle, uiMask) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(((TraceEntry_t*)(xEntryHandle))->uiOptions |= (uiMask), TRC_SUCCESS) +#define TRC_ENTRY_CLEAR_OPTIONS(xEntryHandle, uiMask) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(((TraceEntry_t*)(xEntryHandle))->uiOptions &= ~(uiMask), TRC_SUCCESS) +#define TRC_ENTRY_GET_ADDRESS(xEntryHandle, ppvAddress) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(ppvAddress) = ((TraceEntry_t*)(xEntryHandle))->pvAddress, TRC_SUCCESS) +#define TRC_ENTRY_GET_SYMBOL(xEntryHandle, pszSymbol) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(pszSymbol) = ((TraceEntry_t*)(xEntryHandle))->szSymbol, TRC_SUCCESS) +#define TRC_ENTRY_GET_STATE(xEntryHandle, uiStateIndex, puxState) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puxState) = ((TraceEntry_t*)(xEntryHandle))->xStates[uiStateIndex], TRC_SUCCESS) +#define TRC_ENTRY_GET_STATE_RETURN(xEntryHandle, uiStateIndex) (((TraceEntry_t*)(xEntryHandle))->xStates[uiStateIndex]) +#define TRC_ENTRY_GET_OPTIONS(xEntryHandle, puiOptions) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puiOptions) = ((TraceEntry_t*)(xEntryHandle))->uiOptions, TRC_SUCCESS) + +#define TRC_ENTRY_TABLE_SLOTS (TRC_CFG_ENTRY_SLOTS) +#define TRC_ENTRY_TABLE_STATE_COUNT (3) +#define TRC_ENTRY_TABLE_SYMBOL_LENGTH (TRC_CFG_ENTRY_SYMBOL_MAX_LENGTH) +#define TRC_ENTRY_TABLE_SLOT_SYMBOL_SIZE ((((sizeof(char) * TRC_ENTRY_TABLE_SYMBOL_LENGTH) + (sizeof(uint32_t) - 1)) / sizeof(uint32_t)) * sizeof(uint32_t)) + +/** Trace Entry Structure */ +typedef struct TraceEntry +{ + void* pvAddress; /**< */ + TraceUnsignedBaseType_t xStates[TRC_ENTRY_TABLE_STATE_COUNT]; /**< */ + uint32_t uiOptions; /**< */ + char szSymbol[TRC_ENTRY_TABLE_SLOT_SYMBOL_SIZE]; /**< */ +} TraceEntry_t; + +#define TRC_ENTRY_TABLE_SIZE (sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t) + (sizeof(TraceEntry_t) * (TRC_ENTRY_TABLE_SLOTS))) + +/** Trace Entry Table Buffer Structure */ +typedef struct TraceEntryTableBuffer +{ + uint8_t buffer[(TRC_ENTRY_TABLE_SIZE)]; /**< */ +} TraceEntryTableBuffer_t; + +/** + * @internal Initialize trace entry table. + * + * This routine initializes the trace entry table which maps objects to + * symbolic identifiers, state information, and options. + * + * @param[in] pxBuffer Pointer to uninitialized trace entry table buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryTableInitialize(TraceEntryTableBuffer_t* pxBuffer); + +/** + * @brief Creates trace entry. + * + * @param[out] pxEntryHandle Pointer to uninitialized trace entry handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryCreate(TraceEntryHandle_t *pxEntryHandle); + +/** + * @brief Deletes trace entry. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryDelete(TraceEntryHandle_t xEntryHandle); + +/** + * @brief Finds trace entry mapped to object address. + * + * @param[in] pvAddress Address of object. + * @param[out] pxEntryHandle Pointer to uninitialized trace entry handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryFind(void* pvAddress, TraceEntryHandle_t* pxEntryHandle); + +/** + * @brief Gets the number of entries in the trace entry table. + * + * @param[out] puiCount Count. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryGetCount(uint32_t* puiCount); + +/** + * @brief Gets trace table entry at index. + * + * @param[in] index Entry index. + * @param[out] pxEntryHandle Pointer to uninitialized trace entry handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryGetAtIndex(uint32_t index, TraceEntryHandle_t* pxEntryHandle); + +/** + * @brief Sets symbol for entry. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[out] szSymbol Pointer to symbol string, set by function + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntrySetSymbol(TraceEntryHandle_t xEntryHandle, const char* szSymbol); + +#if ((TRC_CFG_USE_TRACE_ASSERT) == 1) + +/** + * @brief Creates trace entry mapped to memory address. + * + * @param[in] pvAddress Address. + * @param[out] pxEntryHandle Pointer to uninitialized trace entry handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryCreateWithAddress(void* pvAddress, TraceEntryHandle_t* pxEntryHandle); + +/** + * @brief Sets trace entry state. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[in] uiStateIndex Index of state (< TRC_ENTRY_TABLE_STATE_COUNT). + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntrySetState(TraceEntryHandle_t xEntryHandle, uint32_t uiStateIndex, TraceUnsignedBaseType_t uxState); + +/** + * @brief Sets trace entry option(s). + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[in] uiMask Option(s) set mask. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntrySetOptions(TraceEntryHandle_t xEntryHandle, uint32_t uiMask); + +/** + * @brief Clears trace entry option(s). + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[in] uiMask Options(s) clear mask. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryClearOptions(TraceEntryHandle_t xEntryHandle, uint32_t uiMask); + +/** + * @brief Gets linked address for trace entry. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[out] ppvAddress Address. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryGetAddress(TraceEntryHandle_t xEntryHandle, void **ppvAddress); + +/** + * @brief Gets symbol for trace entry. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[out] pszSymbol Symbol. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryGetSymbol(TraceEntryHandle_t xEntryHandle, const char** pszSymbol); + +/** + * @brief Gets state for trace entry. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[in] uiStateIndex State index (< TRC_ENTRY_TABLE_STATE_COUNT). + * @param[out] puxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryGetState(TraceEntryHandle_t xEntryHandle, uint32_t uiStateIndex, TraceUnsignedBaseType_t *puxState); + +/** + * @internal Returns state for trace entry. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[in] uiStateIndex State index (< TRC_ENTRY_TABLE_STATE_COUNT). + * + * @returns State + */ +TraceUnsignedBaseType_t xTraceEntryGetStateReturn(TraceEntryHandle_t xEntryHandle, uint32_t uiStateIndex); + +/** + * @brief Gets options for trace entry. + * + * @param[in] xEntryHandle Pointer to initialized trace entry handle. + * @param[out] puiOptions Options. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEntryGetOptions(TraceEntryHandle_t xEntryHandle, uint32_t *puiOptions); + +#else + +#define xTraceEntryCreateWithAddress TRC_ENTRY_CREATE_WITH_ADDRESS + +#define xTraceEntrySetState TRC_ENTRY_SET_STATE +#define xTraceEntrySetOptions TRC_ENTRY_SET_OPTIONS +#define xTraceEntryClearOptions TRC_ENTRY_CLEAR_OPTIONS + +#define xTraceEntryGetAddress TRC_ENTRY_GET_ADDRESS +#define xTraceEntryGetSymbol TRC_ENTRY_GET_SYMBOL +#define xTraceEntryGetState TRC_ENTRY_GET_STATE +#define xTraceEntryGetStateReturn TRC_ENTRY_GET_STATE_RETURN +#define xTraceEntryGetOptions TRC_ENTRY_GET_OPTIONS + +#endif /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_ENTRY_TABLE_H */ diff --git a/freertos/cvitek/install/include/kernel/trcError.h b/freertos/cvitek/install/include/kernel/trcError.h new file mode 100644 index 000000000..aa9d12d80 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcError.h @@ -0,0 +1,99 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace error APIs. + */ + +#ifndef TRC_ERROR_H +#define TRC_ERROR_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_assert_apis Trace Asserts APIs + * @ingroup trace_recorder_apis + * @{ + */ + +#define TRC_ERROR_BUFFER_SIZE (sizeof(uint32_t) + sizeof(uint32_t) + sizeof(TraceStringHandle_t)) + +typedef struct TraceErrorBuffer +{ + uint32_t buffer[(TRC_ERROR_BUFFER_SIZE) / sizeof(uint32_t)]; +} TraceErrorBuffer_t; + +/** + * @internal Initializes the error system + * + * @param[in] pxBuffer Pointer to buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceErrorInitialize(TraceErrorBuffer_t* pxBuffer); + +/** + * @brief Register a warning + * + * @param[in] uiErrorCode Label + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceWarning(uint32_t uiErrorCode); + +/** + * @brief Register an error + * + * @param[in] uiErrorCode Error code + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceError(uint32_t uiErrorCode); + +/** + * @brief Retrieve the string for the last error + * + * @param[out] pszError Error string pointer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceErrorGetLast(const char** pszError); + +/** + * @brief Clears any errors + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceErrorClear(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_ERROR_H*/ diff --git a/freertos/cvitek/install/include/kernel/trcEvent.h b/freertos/cvitek/install/include/kernel/trcEvent.h new file mode 100644 index 000000000..a54c364f7 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcEvent.h @@ -0,0 +1,615 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace event APIs. + */ + +#ifndef TRC_EVENT_H +#define TRC_EVENT_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_event_apis Trace Event APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @internal Macro helper for setting trace event parameter count. + */ +#define TRC_EVENT_SET_PARAM_COUNT(id, n) (((uint16_t)(id)) | ((((uint16_t)(n)) & 0xF) << 12)) + +/** + * @internal Macro helper for getting trace event parameter count. + */ +#define TRC_EVENT_GET_PARAM_COUNT(id) (((id) >> 12) & 0xF) + +#if (TRC_CFG_CORE_COUNT > 1) +#define TRC_EVENT_SET_EVENT_COUNT(c) (((TRC_CFG_GET_CURRENT_CORE() & 0xF) << 12) | ((uint16_t)(c) & 0xFFF)) +#else +#define TRC_EVENT_SET_EVENT_COUNT(c) (uint16_t)(c) +#endif + +/** + * @internal Macro helpder for setting base event data. + */ +#define SET_BASE_EVENT_DATA(pxEvent, eventId, paramCount, eventCount) \ + ( \ + (pxEvent)->EventID = TRC_EVENT_SET_PARAM_COUNT(eventId, paramCount), \ + (pxEvent)->EventCount = TRC_EVENT_SET_EVENT_COUNT(eventCount), \ + xTraceTimestampGet(&(pxEvent)->TS) \ + ) + +/** + * @internal Macro helper for resetting trace event data. + */ +#define RESET_EVENT_DATA(p) \ + ( \ + (p)->pvBlob = 0, \ + (p)->size = 0, \ + (p)->offset = 0 \ + ) + +/** + * @internal Macro optimization for getting trace event size. + */ +#define TRC_EVENT_GET_SIZE(pvAddress, puiSize) (*(uint32_t*)(puiSize) = sizeof(TraceBaseEvent_t) + (TRC_EVENT_GET_PARAM_COUNT(((TraceBaseEvent_t*)(pvAddress))->EventID)) * sizeof(uint32_t), TRC_SUCCESS) + +/** + * @internal Macro optimization for getting trace event data pointer with an offset. + */ +#define TRC_EVENT_GET_RAW_DATA(xEventHandle, uiOffset, uiSize, ppvData) ((void)(uiSize), *(void**)(ppvData) = (void*)&((uint8_t*)((TraceEventData_t*)(xEventHandle))->pvBlob)[uiOffset], TRC_SUCCESS) + +/** + * @internal Macro optimization for getting trace event payload pointer with an offset. + */ +#define TRC_EVENT_GET_PAYLOAD(xEventHandle, uiOffset, uiSize, ppvData) ((void)(uiSize), *(void**)(ppvData) = (void*)&((uint8_t*)((TraceEventData_t*)(xEventHandle))->pvBlob)[sizeof(TraceBaseEvent_t) + (uiOffset)], TRC_SUCCESS) + +/** + * @internal Macro optimization for getting trace event remaining payload size. + */ +#define TRC_EVENT_PAYLOAD_REMAINING(xEventHandle, puiValue) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(uint32_t*)(puiValue) = ((TraceEventData_t*)(xEventHandle))->size - ((TraceEventData_t*)(xEventHandle))->offset, TRC_SUCCESS) + +/** + * @internal Macro optimization for getting trace event used payload size. + */ +#define TRC_EVENT_PAYLOAD_USED(xEventHandle, puiValue) (*(uint32_t*)(puiValue) = ((TraceEventData_t*)(xEventHandle))->offset - sizeof(TraceBaseEvent_t), TRC_SUCCESS) + +/** + * @internal Macro optimization getting trace event payload size. + */ +#define TRC_EVENT_PAYLOAD_SIZE(xEventHandle, puiValue) (*(uint32_t*)(puiValue) = ((TraceEventData_t*)(xEventHandle))->size - sizeof(TraceBaseEvent_t), TRC_SUCCESS) + +/** + * @internal Macro optimization for adding a pointer address to trace event. + */ +#define TRC_EVENT_ADD_POINTER(xEventHandle, value) \ + TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3( \ + ((void**)((TraceEventData_t*)(xEventHandle))->pvBlob)[((TraceEventData_t*)(xEventHandle))->offset / sizeof(void*)] = (value), \ + ((TraceEventData_t*)(xEventHandle))->offset += sizeof(void*), \ + TRC_SUCCESS \ + ) + +/** + * @internal Macro optimization for adding a unsigned base type to trace event. + */ +#define TRC_EVENT_ADD_UNSIGNED_BASE_TYPE(xEventHandle, value) \ + TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3( \ + ((TraceUnsignedBaseType_t*)((TraceEventData_t*)(xEventHandle))->pvBlob)[((TraceEventData_t*)(xEventHandle))->offset / sizeof(TraceUnsignedBaseType_t)] = (value), \ + ((TraceEventData_t*)(xEventHandle))->offset += sizeof(TraceUnsignedBaseType_t), \ + TRC_SUCCESS \ + ) + +/** + * @internal Macro optimization for adding a 32-bit value to trace event. + */ +#define TRC_EVENT_ADD_32(xEventHandle, value) \ + TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3( \ + ((uint32_t*)((TraceEventData_t*)(xEventHandle))->pvBlob)[((TraceEventData_t*)(xEventHandle))->offset / sizeof(uint32_t)] = (value), \ + ((TraceEventData_t*)(xEventHandle))->offset += sizeof(uint32_t), \ + TRC_SUCCESS \ + ) + +/** + * @internal Macro optimization for adding a 16-bit value to trace event. + */ +#define TRC_EVENT_ADD_16(xEventHandle, value) \ + TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3( \ + ((uint16_t*)((TraceEventData_t*)(xEventHandle))->pvBlob)[((TraceEventData_t*)(xEventHandle))->offset / sizeof(uint16_t)] = (value), \ + ((TraceEventData_t*)(xEventHandle))->offset += sizeof(uint16_t), \ + TRC_SUCCESS \ + ) + +/** + * @internal Macro optimization for adding a 8-bit value to trace event. + */ +#define TRC_EVENT_ADD_8(xEventHandle, value) \ + TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3( \ + ((uint8_t*)((TraceEventData_t*)(xEventHandle))->pvBlob)[((TraceEventData_t*)(xEventHandle))->offset / sizeof(uint8_t)] = (value), \ + ((TraceEventData_t*)(xEventHandle))->offset += sizeof(uint8_t), \ + TRC_SUCCESS \ + ) + +/** + * @internal Macro optimization for beginning an offline trace event. + */ +#define TRC_EVENT_BEGIN_OFFLINE(uiEventCode, uiPayloadSize, pxEventHandle) \ + ( \ + (xTraceEventBeginRawOffline(sizeof(TraceBaseEvent_t) + (uiPayloadSize), pxEventHandle)) == TRC_SUCCESS ? \ + ( \ + pxTraceEventDataTable->coreEventData[TRC_CFG_GET_CURRENT_CORE()].eventCounter++, \ + SET_BASE_EVENT_DATA((TraceBaseEvent_t*)(((TraceEventData_t*)*(pxEventHandle))->pvBlob), \ + uiEventCode, \ + (((TraceEventData_t*)*(pxEventHandle))->size - sizeof(TraceBaseEvent_t)) / sizeof(uint32_t), \ + pxTraceEventDataTable->coreEventData[TRC_CFG_GET_CURRENT_CORE()].eventCounter), \ + ((TraceEventData_t*)*(pxEventHandle))->offset += sizeof(TraceBaseEvent_t), \ + TRC_SUCCESS \ + ) : TRC_FAIL \ + ) + +/** + * @internal Macro optimization for ending an offline trace event. + */ +#define TRC_EVENT_END_OFFLINE(xEventHandle) \ + TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4( \ + xTraceStreamPortCommit(((TraceEventData_t*)(xEventHandle))->pvBlob, \ + ((TraceEventData_t*)(xEventHandle))->size, &DUMMY_iTraceBytesCommitted), \ + RESET_EVENT_DATA((TraceEventData_t*)(xEventHandle)), \ + TRC_SUCCESS \ + ) + +/** + * @internal Trace Base Event Structure + */ +typedef struct { + uint16_t EventID; /**< */ + uint16_t EventCount; /**< */ + uint32_t TS; /**< */ +} TraceBaseEvent_t; + +/** + * @internal Trace Event Data Structure + */ +typedef struct TraceEventData +{ + void* pvBlob; /**< */ + uint32_t size; /**< */ + uint32_t offset; /**< */ +} TraceEventData_t; + +/** + * @internal Trace Core Event Data Structure + */ +typedef struct TraceCoreEventData +{ + TraceEventData_t eventData[(TRC_CFG_MAX_ISR_NESTING)+1]; /**< */ + uint32_t eventCounter; /**< */ +} TraceCoreEventData_t; + +/** + * @internal Trace Event Data Table Structure. + */ +typedef struct TraceEventDataTable +{ + TraceCoreEventData_t coreEventData[TRC_CFG_CORE_COUNT]; /**< Holds data about current event for each core/isr depth */ +} TraceEventDataTable_t; + +#define TRC_EVENT_DATA_BUFFER_SIZE (sizeof(TraceEventDataTable_t)) + +/** + * @internal Trace Event Data Buffer Structure. + */ +typedef struct TraceEventDataBuffer +{ + uint8_t buffer[TRC_EVENT_DATA_BUFFER_SIZE]; /**< */ +} TraceEventDataBuffer_t; + +extern TraceEventDataTable_t* pxTraceEventDataTable; + +/** + * @internal Initialize event trace system. + * + * @param[in] pxBuffer Pointer to memory that will be used by the event + * trace system. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventInitialize(TraceEventDataBuffer_t* pxBuffer); + +/** + * @brief Gets trace event size. + * + * @param[in] pvAddress Pointer to initialized trace event. + * @param[out] puiSize Size. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventGetSize(void* pvAddress, uint32_t* puiSize); + +/** + * @internal Begins a raw trace event offline. + * + * This routine begins a trace event with specified size. Must call xTraceEventEnd() + * to finalize event creation. Does not care about RecorderEnabled. + * + * @param[in] uiSize Size. + * @param[in] pxEventHandle Pointer to initialized trace event. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventBeginRawOffline(uint32_t uiSize, TraceEventHandle_t* pxEventHandle); + +/** + * @internal Begins a blocking trace event offline. + * + * This routine begins a trace event with specified size. Must call xTraceEventEnd() + * to finalize event creation. Does not care about RecorderEnabled. + * + * @param[in] uiSize Size. + * @param[in] pxEventHandle Pointer to initialized trace event. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventBeginRawOfflineBlocking(uint32_t uiSize, TraceEventHandle_t* pxEventHandle); + +/** + * @internal Begins a trace event offline. + * + * This routine begins a trace event with specified size. Must call xTraceEventEnd() + * to finalize event creation. Does not care about RecorderEnabled. + * + * @param[in] uiSize Size. + * @param[in] pxEventHandle Pointer to initialized trace event. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventBeginOffline TRC_EVENT_BEGIN_OFFLINE + +/** + * @brief Begins a trace event. + * + * This routine begins a trace event with specified size. Must call xTraceEventEnd() + * to finalize event creation. Does not care about RecorderEnabled. + * + * @param[in] uiSize Size. + * @param[in] pxEventHandle Pointer to initialized trace event. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventBegin(uiEventCode, uiTotalPayloadSize, pxEventHandle) \ + (xTraceIsRecorderEnabled() ? xTraceEventBeginOffline(uiEventCode, uiTotalPayloadSize, pxEventHandle) : TRC_FAIL) + +/** + * @internal Ends a trace event offline. + * + * This routine ends the event that was begun by calling on xTraceEventBegin(). + * Does not care about uiRecorderEnabled. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventEndOffline(TraceEventHandle_t xEventHandle); + +/** + * @internal Ends a blocking event offline. + * + * Ends the event that was begun by calling on xTraceEventBegin() + * + * @param[in] xEventHandle Pointer to initialized trace event. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventEndOfflineBlocking(TraceEventHandle_t xEventHandle); + +/** + * @brief Ends a trace event. + * + * This routine ends the event that was begun by calling on xTraceEventBegin(). + * Does not care about uiRecorderEnabled. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventEnd(xEventHandle) \ + (xTraceIsRecorderEnabled() == 0 ? TRC_FAIL : xTraceEventEndOffline(xEventHandle)) + +/** + * @brief Adds data to event payload. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] pvData Pointer to data. + * @param[in] uiSize Size. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventAddData(TraceEventHandle_t xEventHandle, void* pvData, uint32_t uiSize); + +#if ((TRC_CFG_USE_TRACE_ASSERT) == 1) + +/** + * @brief Gets trace event data pointer with an offset. + * + * This routine gets a trace event data pointer with an offset. It also verfies + * that the size so it won't go outside its buffer. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] uiOffset Offset. + * @param[in] uiSize Size. + * @param[out] ppvData Data. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventGetRawData(TraceEventHandle_t xEventHandle, uint32_t uiOffset, uint32_t uiSize, void** ppvData); + +/** + * @brief Gets trace event payload pointer with an offset. + * + * This routine gets a trace event payload pointer with an offset. It also verifies + * that the size so it won't go outside its payload buffer. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] uiOffset Offset. + * @param[in] uiSize Size. + * @param[out] ppvData Data. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventGetPayload(TraceEventHandle_t xEventHandle, uint32_t uiOffset, uint32_t uiSize, void** ppvData); + +/** + * @brief Gets the amount of remaining trace event payload. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[out] puiValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventPayloadRemaining(TraceEventHandle_t xEventHandle, uint32_t* puiValue); + +/** + * @brief Gets the amount of used trace event payload. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[out] puiValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventPayloadUsed(TraceEventHandle_t xEventHandle, uint32_t* puiValue); + +/** + * @brief Gets trace event payload size. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[out] puiValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventPayloadSize(TraceEventHandle_t xEventHandle, uint32_t* puiValue); + +/** + * @brief Adds an unsigned base type value as trace event payload + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] uxValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventAddUnsignedBaseType(TraceEventHandle_t xEventHandle, TraceUnsignedBaseType_t uxValue); + +/** + * @brief Adds a pointer address as trace event payload + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] pvAddress Address. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventAddPointer(TraceEventHandle_t xEventHandle, void *pvAddress); + +/** + * @brief Adds an uint32_t as trace event payload + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] value Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventAdd32(TraceEventHandle_t xEventHandle, uint32_t value); + +/** + * @brief Adds an uint16_t as trace event payload + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] value Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventAdd16(TraceEventHandle_t xEventHandle, uint16_t value); + +/** + * @brief Adds an uint8_t as trace event payload. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] value Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventAdd8(TraceEventHandle_t xEventHandle, uint8_t value); + +#else /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** + * @brief Gets trace event size. + * + * @param[in] pvAddress Pointer to initialized trace event. + * @param[out] puiSize Size. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventGetSize(pvAddress, puiSize) (*(uint32_t*)(puiSize) = sizeof(TraceBaseEvent_t) + (TRC_EVENT_GET_PARAM_COUNT(((TraceBaseEvent_t*)(pvAddress))->EventID)) * sizeof(uint32_t), TRC_SUCCESS) + +/** + * @brief Gets trace event data pointer with an offset. + * + * This routine gets a trace event data pointer with an offset. It also verfies + * that the size so it won't go outside its buffer. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] uiOffset Offset. + * @param[in] uiSize Size. + * @param[out] ppvData Data. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventGetRawData TRC_EVENT_GET_RAW_DATA + +/** + * @brief Gets trace event payload pointer with an offset. + * + * This routine gets a trace event payload pointer with an offset. It also verifies + * that the size so it won't go outside its payload buffer. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] uiOffset Offset. + * @param[in] uiSize Size. + * @param[out] ppvData Data. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventGetPayload TRC_EVENT_GET_PAYLOAD + +/** + * @brief Gets the amount of remaining trace event payload. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[out] puiValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventPayloadRemaining TRC_EVENT_PAYLOAD_REMAINING + +/** + * @brief Gets the amount of used trace event payload. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[out] puiValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventPayloadUsed TRC_EVENT_PAYLOAD_USED + +/** + * @brief Gets trace event payload size. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[out] puiValue Value + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventPayloadSize TRC_EVENT_PAYLOAD_SIZE + +/* Adds a pointer as event payload with no errors checks */ +#define xTraceEventAddPointer TRC_EVENT_ADD_POINTER + +/** + * @brief Adds an unsigned base type value as trace event payload + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] uxValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventAddUnsignedBaseType TRC_EVENT_ADD_UNSIGNED_BASE_TYPE + +/** + * @brief Adds an uint32_t as trace event payload + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] value Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventAdd32 TRC_EVENT_ADD_32 + +/** + * @brief Adds an uint16_t as trace event payload + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] value Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventAdd16 TRC_EVENT_ADD_16 + +/** + * @brief Adds an uint8_t as trace event payload. + * + * @param[in] xEventHandle Pointer to initialized trace event. + * @param[in] value Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceEventAdd8 TRC_EVENT_ADD_8 + +#endif /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_EVENT_H */ diff --git a/freertos/cvitek/install/include/kernel/trcEventBuffer.h b/freertos/cvitek/install/include/kernel/trcEventBuffer.h new file mode 100644 index 000000000..81c060822 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcEventBuffer.h @@ -0,0 +1,132 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace event buffer APIs. + */ + +#ifndef TRC_EVENT_BUFFER_H +#define TRC_EVENT_BUFFER_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_event_buffer_apis Trace Event Buffer APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @def TRC_EVENT_BUFFER_OPTION_SKIP + * @brief Buffer should skip new events when full + */ +#define TRC_EVENT_BUFFER_OPTION_SKIP (0U) + +/** + * @def TRC_EVENT_BUFFER_OPTION_OVERWRITE + * @brief Buffer should overwrite old events when full + */ +#define TRC_EVENT_BUFFER_OPTION_OVERWRITE (1U) + +/** + * @brief Trace Event Buffer Structure + */ +typedef struct TraceEventBuffer +{ + uint32_t uiHead; /**< Head index of buffer */ + uint32_t uiTail; /**< Tail index of buffer */ + uint32_t uiSize; /**< Buffer size */ + uint32_t uiOptions; /**< Options (skip/overwrite when full) */ + uint32_t uiDroppedEvents; /**< Nr of dropped events */ + uint32_t uiFree; /**< Nr of free bytes */ + uint32_t uiTimerWraparounds; /**< Nr of timer wraparounds */ + uint8_t* puiBuffer; /**< Trace Event Buffer: may be NULL */ +} TraceEventBuffer_t; + +/** + * @internal Initialize trace event buffer. + * + * This routine initializes a trace event buffer and assigns it a + * memory area based on the supplied buffer. + * + * Trace event buffer options specifies the buffer behavior regarding + * old data, the alternatives are TRC_EVENT_BUFFER_OPTION_SKIP and + * TRC_EVENT_BUFFER_OPTION_OVERWRITE (mutal exclusive). + * + * @param[out] pxTraceEventBuffer Pointer to uninitialized trace event buffer. + * @param[in] uiOptions Trace event buffer options. + * @param[in] puiBuffer Pointer to buffer that will be used by the trace event buffer. + * @param[in] uiSize Size of buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventBufferInitialize(TraceEventBuffer_t * pxTraceEventBuffer, uint32_t uiOptions, + uint8_t *puiBuffer, uint32_t uiSize); + +/** + * @brief Pushes data into trace event buffer. + * + * This routine attempts to push data into the trace event buffer. + * + * @param[in] pxTraceEventBuffer Pointer to initialized trace event buffer. + * @param[in] pxData Pointer to data that should be pushed into trace event buffer. + * @param[in] uiSize Size of data. + * @param[out] piBytesWritten Bytes written. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventBufferPush(TraceEventBuffer_t *pxTraceEventBuffer, void *pxData, uint32_t uiSize, int32_t *piBytesWritten); + +/** + * @brief Transfer trace event buffer data through streamport. + * + * This routine will attempt to transfer all existing data in the trace event + * buffer through the streamport. New data pushed to the trace event buffer + * during the execution of this routine will not be transfered to + * + * @param[in] pxTraceEventBuffer Pointer to initialized trace event buffer. + * @param[out] piBytesWritten Bytes written. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventBufferTransfer(TraceEventBuffer_t* pxTraceEventBuffer, int32_t* piBytesWritten); + +/** + * @brief Clears all data from event buffer. + * + * @param[in] pxTraceEventBuffer Pointer to initialized trace event buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEventBufferClear(TraceEventBuffer_t* pxTraceEventBuffer); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_EVENT_BUFFER_H */ diff --git a/freertos/cvitek/install/include/kernel/trcExtension.h b/freertos/cvitek/install/include/kernel/trcExtension.h new file mode 100644 index 000000000..94d2d89ee --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcExtension.h @@ -0,0 +1,95 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace extension APIs. + */ + +#ifndef TRC_EXTENSION_H +#define TRC_EXTENSION_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRC_EXTENSION_STATE_INDEX_VERSION 0 +#define TRC_EXTENSION_STATE_INDEX_BASE_EVENT_ID 1 +#define TRC_EXTENSION_STATE_INDEX_EVENT_COUNT 2 + +/** + * @defgroup trace_extension_apis Trace Extension APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Creates trace extension. + * + * @param[in] szName Name. + * @param[in] uiMajor Major version. + * @param[in] uiMinor Minor version. + * @param[in] uiPatch Patch version. + * @param[in] uiEventCount Event count. + * @param[out] pxExtensionHandle Pointer to uninitialized extension handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceExtensionCreate(const char *szName, uint8_t uiMajor, uint8_t uiMinor, uint16_t uiPatch, uint32_t uiEventCount, TraceExtensionHandle_t *pxExtensionHandle); + +/** + * @brief Gets extension base event id. + * + * @param[in] xExtensionHandle Pointer to initialized extension handle. + * @param[out] puiBaseEventId Base event id. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceExtensionGetBaseEventId(TraceExtensionHandle_t xExtensionHandle, uint32_t *puiBaseEventId); + +/** + * @brief Gets extension configuration name. + * + * @param[in] xExtensionHandle Pointer to initialized extension handle. + * @param[out] pszName Name. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceExtensionGetConfigName(TraceExtensionHandle_t xExtensionHandle, const char** pszName); + +/** + * @brief Returns extension event id. + * + * @param[in] xExtensionHandle Pointer to initialized extension handle. + * @param[in] uiLocalEventId Local event id. + * + * @returns Extension event id + */ +#define xTraceExtensionGetEventId(xExtensionHandle, uiLocalEventId) ((uint32_t)xTraceEntryGetStateReturn((TraceEntryHandle_t)(xExtensionHandle), TRC_EXTENSION_STATE_INDEX_BASE_EVENT_ID) + (uiLocalEventId)) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_EXTENSION_H */ diff --git a/freertos/cvitek/install/include/kernel/trcHardwarePort.h b/freertos/cvitek/install/include/kernel/trcHardwarePort.h new file mode 100644 index 000000000..9505c93f7 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcHardwarePort.h @@ -0,0 +1,715 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * The hardware abstraction layer for the trace recorder. + */ + +#ifndef TRC_HARDWARE_PORT_H +#define TRC_HARDWARE_PORT_H + +#include + + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NOT_SET) + #error "TRC_CFG_HARDWARE_PORT not selected - see trcConfig.h" +#endif + +/******************************************************************************* + * TRC_IRQ_PRIORITY_ORDER + * + * Macro which should be defined as an integer of 0 or 1. + * + * This should be 0 if lower IRQ priority values implies higher priority + * levels, such as on ARM Cortex M. If the opposite scheme is used, i.e., + * if higher IRQ priority values means higher priority, this should be 1. + * + * This setting is not critical. It is used only to sort and colorize the + * interrupts in priority order, in case you record interrupts using + * the vTraceStoreISRBegin and vTraceStoreISREnd routines. + * + ****************************************************************************** + * + * HWTC Macros + * + * These macros provides a hardware isolation layer representing the + * hardware timer/counter used for the event timestamping. + * + * TRC_HWTC_COUNT: How to read the current value of the timer/counter. + * + * TRC_HWTC_TYPE: Tells the type of timer/counter used for TRC_HWTC_COUNT: + * + * - TRC_FREE_RUNNING_32BIT_INCR: + * Free-running 32-bit timer/counter, counting upwards from 0. + * + * - TRC_FREE_RUNNING_32BIT_DECR + * Free-running 32-bit timer/counter, counting downwards from 0xFFFFFFFF. + * + * - TRC_OS_TIMER_INCR + * Periodic timer that drives the OS tick interrupt, counting upwards + * from 0 until (TRC_HWTC_PERIOD-1). + * + * - TRC_OS_TIMER_DECR + * Periodic timer that drives the OS tick interrupt, counting downwards + * from TRC_HWTC_PERIOD-1 until 0. + * + * - TRC_CUSTOM_TIMER_INCR + * A custom timer or counter independent of the OS tick, counting + * downwards from TRC_HWTC_PERIOD-1 until 0. (Currently only supported + * in streaming mode). + * + * - TRC_CUSTOM_TIMER_DECR + * A custom timer independent of the OS tick, counting downwards + * from TRC_HWTC_PERIOD-1 until 0. (Currently only supported + * in streaming mode). + * + * TRC_HWTC_PERIOD: The number of HWTC_COUNT ticks until the timer wraps + * around. If using TRC_FREE_RUNNING_32BIT_INCR/DECR, this should be 0. + * + * TRC_HWTC_FREQ_HZ: The clock rate of the TRC_HWTC_COUNT counter in Hz. If using + * TRC_OS_TIMER_INCR/DECR, this is should be TRC_HWTC_PERIOD * TRC_TICK_RATE_HZ. + * If using a free-running timer, this is often TRACE_CPU_CLOCK_HZ (if running at + * the core clock rate). If using TRC_CUSTOM_TIMER_INCR/DECR, this should match + * the clock rate of your custom timer (i.e., TRC_HWTC_COUNT). If the default value + * of TRC_HWTC_FREQ_HZ is incorrect for your setup, you can override it by calling + * vTraceSetFrequency before calling vTraceEnable. + * + * TRC_HWTC_DIVISOR (used in snapshot mode only): + * In snapshot mode, the timestamp resolution is TRC_HWTC_FREQ_HZ/TRC_HWTC_DIVISOR. + * If the timer frequency is very high (hundreds of MHz), we recommend increasing + * the TRC_HWTC_DIVISOR prescaler, to reduce the bandwidth needed to store + * timestamps. This since extra "XTS" events are inserted if the time since the + * previous event exceeds a certain limit (255 or 65535 depending on event type). + * It is advised to keep the time between most events below 65535 native ticks + * (after division by TRC_HWTC_DIVISOR) to avoid frequent XTS events. + ******************************************************************************/ + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NOT_SET) + #error "TRC_CFG_HARDWARE_PORT not selected - see trcConfig.h" +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Win32) +/* This can be used as a template for any free-running 32-bit counter */ +void vTraceTimerReset(void); +uint32_t uiTraceTimerGetFrequency(void); +uint32_t uiTraceTimerGetValue(void); + +#define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR +#define TRC_HWTC_COUNT ((TraceUnsignedBaseType_t)uiTraceTimerGetValue()) +#define TRC_HWTC_PERIOD 0 +#define TRC_HWTC_DIVISOR 1 +#define TRC_HWTC_FREQ_HZ ((TraceUnsignedBaseType_t)uiTraceTimerGetFrequency()) + +#define TRC_IRQ_PRIORITY_ORDER 1 + +#define TRC_PORT_SPECIFIC_INIT() vTraceTimerReset() + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Win64) +/* This can be used as a template for any free-running 32-bit counter */ +void vTraceTimerReset(void); +uint32_t uiTraceTimerGetFrequency(void); +uint32_t uiTraceTimerGetValue(void); + +#define TRC_BASE_TYPE int64_t + +#define TRC_UNSIGNED_BASE_TYPE uint64_t + +#define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR +#define TRC_HWTC_COUNT ((TraceUnsignedBaseType_t)uiTraceTimerGetValue()) +#define TRC_HWTC_PERIOD 0 +#define TRC_HWTC_DIVISOR 1 +#define TRC_HWTC_FREQ_HZ ((TraceUnsignedBaseType_t)uiTraceTimerGetFrequency()) + +#define TRC_IRQ_PRIORITY_ORDER 1 + +#define TRC_PORT_SPECIFIC_INIT() vTraceTimerReset() + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_HWIndependent) + /* Timestamping by OS tick only (typically 1 ms resolution) */ + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT 0 + #define TRC_HWTC_PERIOD 1 + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ TRC_TICK_RATE_HZ + + /* Set the meaning of IRQ priorities in ISR tracing - see above */ + #define TRC_IRQ_PRIORITY_ORDER NOT_SET + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M) + + #ifndef __CORTEX_M + #error "Can't find the CMSIS API. Please include your processor's header file in trcConfig.h" + #endif + + #define TRACE_ALLOC_CRITICAL_SECTION() uint32_t __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() {__irq_status = __get_PRIMASK(); __set_PRIMASK(1);} /* PRIMASK disables ALL interrupts - allows for tracing in any ISR */ + #define TRACE_EXIT_CRITICAL_SECTION() {__set_PRIMASK(__irq_status);} + + /************************************************************************** + * For Cortex-M3, M4 and M7, the DWT cycle counter is used for timestamping. + * For Cortex-M0 and M0+, the SysTick timer is used since DWT is not + * available. Systick timestamping can also be forced on Cortex-M3, M4 and + * M7 by defining the preprocessor directive TRC_CFG_ARM_CM_USE_SYSTICK, + * either directly below or in trcConfig.h. + * + * #define TRC_CFG_ARM_CM_USE_SYSTICK + **************************************************************************/ + + #if ((__CORTEX_M >= 0x03) && (! defined TRC_CFG_ARM_CM_USE_SYSTICK)) + + void xTraceHardwarePortInitCortexM(void); + + #define TRC_REG_DEMCR (*(volatile uint32_t*)0xE000EDFC) + #define TRC_REG_DWT_CTRL (*(volatile uint32_t*)0xE0001000) + #define TRC_REG_DWT_CYCCNT (*(volatile uint32_t*)0xE0001004) + #define TRC_REG_DWT_EXCCNT (*(volatile uint32_t*)0xE000100C) + + #define TRC_REG_ITM_LOCKACCESS (*(volatile uint32_t*)0xE0001FB0) + #define TRC_ITM_LOCKACCESS_UNLOCK (0xC5ACCE55) + + /* Bit mask for TRCENA bit in DEMCR - Global enable for DWT and ITM */ + #define TRC_DEMCR_TRCENA (1 << 24) + + /* Bit mask for NOPRFCNT bit in DWT_CTRL. If 1, DWT_EXCCNT is not supported */ + #define TRC_DWT_CTRL_NOPRFCNT (1 << 24) + + /* Bit mask for NOCYCCNT bit in DWT_CTRL. If 1, DWT_CYCCNT is not supported */ + #define TRC_DWT_CTRL_NOCYCCNT (1 << 25) + + /* Bit mask for EXCEVTENA_ bit in DWT_CTRL. Set to 1 to enable DWT_EXCCNT */ + #define TRC_DWT_CTRL_EXCEVTENA (1 << 18) + + /* Bit mask for EXCEVTENA_ bit in DWT_CTRL. Set to 1 to enable DWT_CYCCNT */ + #define TRC_DWT_CTRL_CYCCNTENA (1) + + #define TRC_PORT_SPECIFIC_INIT() xTraceHardwarePortInitCortexM() + + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT TRC_REG_DWT_CYCCNT + #define TRC_HWTC_PERIOD 0 + #define TRC_HWTC_DIVISOR 4 + #define TRC_HWTC_FREQ_HZ TRACE_CPU_CLOCK_HZ + #define TRC_IRQ_PRIORITY_ORDER 0 + + #else + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT (*((volatile uint32_t*)0xE000E018)) + #define TRC_HWTC_PERIOD ((*((volatile uint32_t*)0xE000E014)) + 1) + #define TRC_HWTC_DIVISOR 4 + #define TRC_HWTC_FREQ_HZ TRACE_CPU_CLOCK_HZ + #define TRC_IRQ_PRIORITY_ORDER 0 + + #endif + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Renesas_RX600) + #define TRACE_ALLOC_CRITICAL_SECTION() TraceBaseType_t __x_irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() { __x_irq_status = TRC_KERNEL_PORT_SET_INTERRUPT_MASK(); } + #define TRACE_EXIT_CRITICAL_SECTION() { TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(__x_irq_status); } + + #include + + #if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (CMT0.CMCNT) + + #elif (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + + /* Decreasing counters better for Tickless Idle? */ + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT (CMT0.CMCOR - CMT0.CMCNT) + + #endif + + #define TRC_HWTC_PERIOD (CMT0.CMCOR + 1) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32) + + #define TRACE_ALLOC_CRITICAL_SECTION() TraceBaseType_t __x_irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() { __x_irq_status = TRC_KERNEL_PORT_SET_INTERRUPT_MASK(); } + #define TRACE_EXIT_CRITICAL_SECTION() { TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(__x_irq_status); } + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (TMR1) + #define TRC_HWTC_PERIOD (PR1 + 1) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_TMS570_RM48) + + #define TRC_RTIFRC0 *((uint32_t *)0xFFFFFC10) + #define TRC_RTICOMP0 *((uint32_t *)0xFFFFFC50) + #define TRC_RTIUDCP0 *((uint32_t *)0xFFFFFC54) + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (TRC_RTIFRC0 - (TRC_RTICOMP0 - TRC_RTIUDCP0)) + #define TRC_HWTC_PERIOD (TRC_RTIUDCP0) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Atmel_AT91SAM7) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT ((uint32_t)(AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)) + #define TRC_HWTC_PERIOD ((uint32_t)(AT91C_BASE_PITC->PITC_PIMR + 1)) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Atmel_UC3A0) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO*/ + + /* For Atmel AVR32 (AT32UC3A) */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT ((uint32_t)sysreg_read(AVR32_COUNT)) + #define TRC_HWTC_PERIOD ((uint32_t)(sysreg_read(AVR32_COMPARE) + 1)) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NXP_LPC210X) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + /* Tested with LPC2106, but should work with most LPC21XX chips. */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT *((uint32_t *)0xE0004008 ) + #define TRC_HWTC_PERIOD *((uint32_t *)0xE0004018 ) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_MSP430) + + /* UNOFFICIAL PORT - NOT YET VERIFIED */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (TA0R) + #define TRC_HWTC_PERIOD (((uint16_t)TACCR0)+1) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 1 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_PPC405) + + /* UNOFFICIAL PORT - NOT YET VERIFIED */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT mfspr(0x3db) + #define TRC_HWTC_PERIOD (TRACE_CPU_CLOCK_HZ / TRC_TICK_RATE_HZ) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_PPC440) + + /* UNOFFICIAL PORT */ + + /* This should work with most PowerPC chips */ + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT mfspr(0x016) + #define TRC_HWTC_PERIOD (TRACE_CPU_CLOCK_HZ / TRC_TICK_RATE_HZ) + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_MICROBLAZE) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + /* This should work with most Microblaze configurations. + * It uses the AXI Timer 0 - the tick interrupt source. + * If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required. + */ + #include + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 ) + #define TRC_HWTC_PERIOD (XTmrCtr_GetLoadReg( XPAR_TMRCTR_0_BASEADDR, 0) + 1) + #define TRC_HWTC_DIVISOR 16 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5) + + extern int cortex_a9_r5_enter_critical(void); + extern void cortex_a9_r5_exit_critical(int irq_already_masked_at_enter); + + #define TRACE_ALLOC_CRITICAL_SECTION() uint32_t __irq_mask_status; + + #define TRACE_ENTER_CRITICAL_SECTION() { __irq_mask_status = cortex_a9_r5_enter_critical(); } + + #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical(__irq_mask_status); } + + #include + + #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR + #define TRC_HWTC_COUNT (*(volatile uint32_t *)(configTIMER_BASEADDR + XTTCPS_COUNT_VALUE_OFFSET)) + #define TRC_HWTC_PERIOD (*(volatile uint32_t *)(configTIMER_BASEADDR + XTTCPS_INTERVAL_VAL_OFFSET)) + #define TRC_HWTC_DIVISOR 16 + #define TRC_HWTC_FREQ_HZ (TRC_HWTC_PERIOD * TRC_TICK_RATE_HZ) + #define TRC_IRQ_PRIORITY_ORDER 0 + + #ifdef __GNUC__ + /* For Arm Cortex-A and Cortex-R in general. */ + static inline uint32_t prvGetCPSR(void) + { + unsigned long ret; + /* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */ + asm volatile (" mrs %0, cpsr" : "=r" (ret) : /* no inputs */ ); + return ret; + } + #else + #error "Only GCC Supported!" + #endif + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Altera_NiosII) + + /* OFFICIAL PORT */ + + #include + #include + #include + + #define TRACE_ALLOC_CRITICAL_SECTION() alt_irq_context __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION(){__irq_status = alt_irq_disable_all();} + #define TRACE_EXIT_CRITICAL_SECTION() {alt_irq_enable_all(__irq_status);} + + #define NOT_SET 1 + + /* The base address for the sustem timer set. + * The name user for the system timer can be found in the BSP editor. + * If the name of the timer is sys_tmr SYSTEM_TIMER_BASE should be set to SYS_TMR_BASE. + */ + #define SYSTEM_TIMER_BASE NOT_SET + + #if (SYSTEM_TIMER == NOT_SET) + #error "Set SYSTEM_TIMER_BASE to the timer base used for system ticks." + #endif + + static inline uint32_t altera_nios2_GetTimerSnapReg(void) + { + /* A processor can read the current counter value by first writing to either snapl or snaph to request a coherent snapshot of the counter, + * and then reading snapl and snaph for the full 32-bit value. + */ + IOWR_ALTERA_AVALON_TIMER_SNAPL(SYSTEM_TIMER_BASE, 0); + return (IORD_ALTERA_AVALON_TIMER_SNAPH(SYSTEM_TIMER_BASE) << 16) | IORD_ALTERA_AVALON_TIMER_SNAPL(SYSTEM_TIMER_BASE); + } + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT altera_nios2_GetTimerSnapReg() + #define TRC_HWTC_PERIOD (configCPU_CLOCK_HZ / configTICK_RATE_HZ ) + #define TRC_HWTC_DIVISOR 16 + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_CORTEX_A9) + + /************************************************************************** + * This hardware port only supports FreeRTOS and the GCC compiler at the + * moment, due to the implementation of critical sections (trcKernelPort.h). + * + * Assuming FreeRTOS is used: + * + * For critical sections, this uses vTaskEnterCritical is when called from + * task context and ulPortSetInterruptMask when called from ISR context. + * Thus, it does not disable all ISRs. This means that the trace recorder + * can only be called from ISRs with priority less or equal to + * configMAX_API_CALL_INTERRUPT_PRIORITY (like FreeRTOS fromISR functions). + * + * This hardware port has been tested on it a Xilinx Zync 7000 (Cortex-A9), + * but should work with all Cortex-A and R processors assuming that + * TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS is set accordingly. + **************************************************************************/ + + extern int cortex_a9_r5_enter_critical(void); + extern void cortex_a9_r5_exit_critical(int irq_already_masked_at_enter); + + #define TRACE_ALLOC_CRITICAL_SECTION() uint32_t __irq_mask_status; + + #define TRACE_ENTER_CRITICAL_SECTION() { __irq_mask_status = cortex_a9_r5_enter_critical(); } + + #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical(__irq_mask_status); } + + /* INPUT YOUR PERIPHERAL BASE ADDRESS HERE (0xF8F00000 for Xilinx Zynq 7000)*/ + #define TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS 0 + + #if (TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS == 0) + #error "Please specify TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS." + #endif + + #define TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET 0x0600 + #define TRC_CA9_MPCORE_PRIVCTR_PERIOD_REG (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x00)) + #define TRC_CA9_MPCORE_PRIVCTR_COUNTER_REG (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x04)) + #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_REG (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x08)) + + #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK 0x0000FF00 + #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT 8 + #define TRC_CA9_MPCORE_PRIVCTR_PRESCALER (((TRC_CA9_MPCORE_PRIVCTR_CONTROL_REG & TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK) >> TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT) + 1) + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + #define TRC_HWTC_COUNT TRC_CA9_MPCORE_PRIVCTR_COUNTER_REG + #define TRC_HWTC_PERIOD (TRC_CA9_MPCORE_PRIVCTR_PERIOD_REG + 1) + + /**************************************************************************************** + NOTE: The private timer ticks with a very high frequency (half the core-clock usually), + depending on the prescaler used. If a low prescaler is used, the number of HW ticks between + the trace events gets large, and thereby inefficient to store (sometimes extra events are + needed). To improve efficiency, you may use the TRC_HWTC_DIVISOR as an additional prescaler. + *****************************************************************************************/ + #define TRC_HWTC_DIVISOR 1 + + #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD) + #define TRC_IRQ_PRIORITY_ORDER 0 + + #ifdef __GNUC__ + /* For Arm Cortex-A and Cortex-R in general. */ + static inline uint32_t prvGetCPSR(void) + { + unsigned long ret; + /* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */ + asm volatile (" mrs %0, cpsr" : "=r" (ret) : /* no inputs */ ); + return ret; + } + #else + #error "Only GCC Supported!" + #endif + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_CYCLONE_V_HPS) + #include "alt_clock_manager.h" + + extern int cortex_a9_r5_enter_critical(void); + extern void cortex_a9_r5_exit_critical(int irq_already_masked_at_enter); + + #define TRACE_ALLOC_CRITICAL_SECTION() uint32_t __irq_mask_status; + #define TRACE_ENTER_CRITICAL_SECTION() { __irq_mask_status = cortex_a9_r5_enter_critical(); } + #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical(__irq_mask_status); } + + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT *((uint32_t *)0xFFFEC200) + #define TRC_HWTC_PERIOD 0 + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ (({ \ + uint32_t __freq; \ + alt_clk_freq_get( ALT_CLK_MPU_PERIPH, &__freq ); \ + __freq; \ + })) + #define TRC_IRQ_PRIORITY_ORDER 0 + + #ifdef __GNUC__ + /* For Arm Cortex-A and Cortex-R in general. */ + static inline uint32_t prvGetCPSR(void) + { + unsigned long ret; + /* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */ + __asm__ __volatile__(" mrs %0, cpsr" : "=r" (ret) : /* no inputs */ ); + return ret; + } + #else + #error "Only GCC Supported!" + #endif + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ZEPHYR) + #define TRACE_ALLOC_CRITICAL_SECTION() int key; + #define TRACE_ENTER_CRITICAL_SECTION() { key = irq_lock(); } + #define TRACE_EXIT_CRITICAL_SECTION() { irq_unlock(key); } + + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT k_cycle_get_32() + #define TRC_HWTC_PERIOD (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC) + #define TRC_HWTC_DIVISOR 4 + #define TRC_HWTC_FREQ_HZ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC + #define TRC_IRQ_PRIORITY_ORDER 0 // Lower IRQ priority values are more significant + + #define TRC_PORT_SPECIFIC_INIT() + +#elif ((TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XTensa_LX6) || (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XTensa_LX7)) + /** + * @note When running with SMP FreeRTOS we cannot use the CCOUNT register for timestamping, + * instead we use the external 40MHz timer for synchronized timestamping between the cores. + */ + #if CONFIG_FREERTOS_UNICORE == 1 + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT ({ unsigned int __ccount; \ + __asm__ __volatile__("rsr.ccount %0" : "=a"(__ccount)); \ + __ccount; }) +#ifdef CONFIG_IDF_TARGET_ESP32 + #define TRC_HWTC_FREQ_HZ (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000) +#elif defined(CONFIG_IDF_TARGET_ESP32S2) + #define TRC_HWTC_FREQ_HZ (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000) +#else + #error "Invalid IDF target, check your sdkconfig." +#endif + #define TRC_HWTC_PERIOD 0 + #define TRC_HWTC_DIVISOR 4 + #define TRC_IRQ_PRIORITY_ORDER 0 + #else + /** + * @brief Fetch core agnostic timestamp using the external 40MHz timer. This is used by tracerecorder + * when running with both cores. + * + * @return Ticks since the timer started + */ + uint32_t prvGetSMPTimestamp(); + + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT prvGetSMPTimestamp() + #define TRC_HWTC_FREQ_HZ 40000000 + #define TRC_HWTC_PERIOD 0 + #define TRC_HWTC_DIVISOR 4 + #define TRC_IRQ_PRIORITY_ORDER 0 + #endif + + #if !defined(TRC_HWTC_FREQ_HZ) + #error "The XTensa LX6/LX7 trace hardware clock frequency is not defined." + #endif + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_RISCV_RV32I) + + #define TRACE_ALLOC_CRITICAL_SECTION() unsigned long __irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() __asm__ __volatile__("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r"(__irq_status)) + #define TRACE_EXIT_CRITICAL_SECTION() __asm__ __volatile__("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (__irq_status) \ + : "a1") + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT ({ uint64_t __count; \ + __asm__ __volatile__("rdtime %0" : "=r"(__count)); \ + (__count & 0xFFFFFFFF); }) + #define TRC_HWTC_PERIOD 0 + #define TRC_HWTC_DIVISOR 1 + #define TRC_HWTC_FREQ_HZ 25000000 + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XMOS_XCOREAI) + #define TRC_PORT_SPECIFIC_INIT() + #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR + #define TRC_HWTC_COUNT xscope_gettime() + #define TRC_HWTC_PERIOD (configCPU_CLOCK_HZ / configTICK_RATE_HZ ) + #define TRC_HWTC_DIVISOR 4 + #define TRC_HWTC_FREQ_HZ 100000000 + #define TRC_IRQ_PRIORITY_ORDER 0 + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_POWERPC_Z4) + + /* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */ + + #define TRACE_ALLOC_CRITICAL_SECTION() TraceBaseType_t __x_irq_status; + #define TRACE_ENTER_CRITICAL_SECTION() { __x_irq_status = TRC_KERNEL_PORT_SET_INTERRUPT_MASK(); } + #define TRACE_EXIT_CRITICAL_SECTION() { TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(__x_irq_status); } + + #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR + //#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING + #define TRC_HWTC_COUNT PIT.TIMER[configTICK_PIT_CHANNEL].CVAL.R // must be the PIT channel used for the systick + #define TRC_HWTC_PERIOD ((configPIT_CLOCK_HZ / configTICK_RATE_HZ) - 1U) // TODO FIXME or maybe not -1? what's the right "period" value? + #define TRC_HWTC_FREQ_HZ configPIT_CLOCK_HZ + #define TRC_HWTC_DIVISOR 1 + #define TRC_IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant + +#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_APPLICATION_DEFINED) + + #if !( defined (TRC_HWTC_TYPE) && defined (TRC_HWTC_COUNT) && defined (TRC_HWTC_PERIOD) && defined (TRC_HWTC_FREQ_HZ) && defined (TRC_IRQ_PRIORITY_ORDER) ) + #error "The hardware port is not completely defined!" + #endif + +#elif (TRC_CFG_HARDWARE_PORT != TRC_HARDWARE_PORT_NOT_SET) + + #error "TRC_CFG_HARDWARE_PORT had unsupported value!" + #define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_NOT_SET + +#endif + +#ifndef TRC_HWTC_DIVISOR + #define TRC_HWTC_DIVISOR 1 +#endif + +#ifndef TRC_PORT_SPECIFIC_INIT + #define TRC_PORT_SPECIFIC_INIT() +#endif + +/* If Win32 port */ +#ifdef WIN32 + + #undef _WIN32_WINNT + #define _WIN32_WINNT 0x0600 + + /* Standard includes. */ + #include + #include + #include + + /*************************************************************************** + * The Win32 port by default saves the trace to file and then kills the + * program when the recorder is stopped, to facilitate quick, simple tests + * of the recorder. + ***************************************************************************/ + #define WIN32_PORT_SAVE_WHEN_STOPPED 1 + #define WIN32_PORT_EXIT_WHEN_STOPPED 1 + +#endif + +#if (TRC_CFG_HARDWARE_PORT != TRC_HARDWARE_PORT_NOT_SET) + + #ifndef TRC_HWTC_TYPE + #error "TRC_HWTC_TYPE is not set!" + #endif + + #ifndef TRC_HWTC_COUNT + #error "TRC_HWTC_COUNT is not set!" + #endif + + #ifndef TRC_HWTC_PERIOD + #error "TRC_HWTC_PERIOD is not set!" + #endif + + #ifndef TRC_HWTC_DIVISOR + #error "TRC_HWTC_DIVISOR is not set!" + #endif + + #ifndef TRC_IRQ_PRIORITY_ORDER + #error "TRC_IRQ_PRIORITY_ORDER is not set!" + #elif (TRC_IRQ_PRIORITY_ORDER != 0) && (TRC_IRQ_PRIORITY_ORDER != 1) + #error "TRC_IRQ_PRIORITY_ORDER has bad value!" + #endif + + #if (TRC_HWTC_DIVISOR < 1) + #error "TRC_HWTC_DIVISOR must be a non-zero positive value!" + #endif + + #ifndef TRC_HWTC_FREQ_HZ + #error "TRC_HWTC_FREQ_HZ not defined!" + #endif + +#endif + +#ifndef TRACE_ALLOC_CRITICAL_SECTION +#define TRACE_ALLOC_CRITICAL_SECTION() TRC_KERNEL_PORT_ALLOC_CRITICAL_SECTION() +#endif +#ifndef TRACE_ENTER_CRITICAL_SECTION + #define TRACE_ENTER_CRITICAL_SECTION() TRC_KERNEL_PORT_ENTER_CRITICAL_SECTION() +#endif +#ifndef TRACE_EXIT_CRITICAL_SECTION +#define TRACE_EXIT_CRITICAL_SECTION() TRC_KERNEL_PORT_EXIT_CRITICAL_SECTION() +#endif + +#endif /*TRC_SNAPSHOT_HARDWARE_PORT_H*/ diff --git a/freertos/cvitek/install/include/kernel/trcHeap.h b/freertos/cvitek/install/include/kernel/trcHeap.h new file mode 100644 index 000000000..09fad9554 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcHeap.h @@ -0,0 +1,172 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace heap APIs. + */ + +#ifndef TRC_HEAP_H +#define TRC_HEAP_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#ifndef TRC_USE_HEAPS +#define TRC_USE_HEAPS 1 +#endif + +#if (TRC_USE_HEAPS == 1) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRC_HEAP_STATE_INDEX_CURRENT 0 +#define TRC_HEAP_STATE_INDEX_HIGHWATERMARK 1 +#define TRC_HEAP_STATE_INDEX_MAX 2 + +/** + * @defgroup trace_heap_apis Trace Heap APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Creates trace heap. + * + * @param[in] szName Name. + * @param[in] uxCurrent Current level. + * @param[in] uxHighWaterMark High water mark + * @param[in] uxMax Maximum level. + * @param[out] pxHeapHandle Pointer to uninitialized trace heap handle. + * @return traceResult + */ +traceResult xTraceHeapCreate(const char *szName, TraceUnsignedBaseType_t uxCurrent, TraceUnsignedBaseType_t uxHighWaterMark, TraceUnsignedBaseType_t uxMax, TraceHeapHandle_t *pxHeapHandle); + +/** + * @brief Signals trace heap alloc. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[in] pvAddress Address. + * @param[in] uxSize Size. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceHeapAlloc(TraceHeapHandle_t xHeapHandle, void *pvAddress, TraceUnsignedBaseType_t uxSize); + +/** + * @brief Signals trace heap free. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[in] pvAddress Address. + * @param[in] uxSize Size. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceHeapFree(TraceHeapHandle_t xHeapHandle, void* pvAddress, TraceUnsignedBaseType_t uxSize); + +/** + * @brief Gets trace heap current allocation size. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[out] puxCurrent Current. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceHeapGetCurrent(xHeapHandle, puxCurrent) xTraceEntryGetState(xHeapHandle, TRC_HEAP_STATE_INDEX_CURRENT, puxCurrent) + +/** + * @brief Sets trace heap current allocation size. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[in] uxCurrent Current. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceHeapSetCurrent(xHeapHandle, uxCurrent) xTraceEntrySetState(xHeapHandle, TRC_HEAP_STATE_INDEX_CURRENT, uxCurrent) + +/** + * @brief Gets trace heap high water mark. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[out] puxHighWaterMark High water mark. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceHeapGetHighWaterMark(xHeapHandle, puxHighWaterMark) xTraceEntryGetState(xHeapHandle, TRC_HEAP_STATE_INDEX_HIGHWATERMARK, puxHighWaterMark) + +/** + * @brief Sets trace heap high water mark. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[in] uxHighWaterMark High water mark. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceHeapSetHighWaterMark(xHeapHandle, uxHighWaterMark) xTraceEntrySetState(xHeapHandle, TRC_HEAP_STATE_INDEX_HIGHWATERMARK, uxHighWaterMark) + +/** + * @brief Gets trace heap max size. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[out] puxMax Max. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceHeapGetMax(xHeapHandle, puxMax) xTraceEntryGetState(xHeapHandle, TRC_HEAP_STATE_INDEX_MAX, puxMax) + +/** + * @brief Sets trace heap max size. + * + * @param[in] xHeapHandle Trace heap handle. + * @param[in] uxMax Max heap size. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceHeapSetMax(xHeapHandle, uxMax) xTraceEntrySetState(xHeapHandle, TRC_HEAP_STATE_INDEX_MAX, uxMax) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#else + +#define xTraceHeapCreate(szName, uxCurrent, uxHighWaterMark, uxMax, pxHeapHandle) ((void)szName, (void)uxCurrent, (void)uxHighWaterMark, (void)uxMax, pxHeapHandle != 0 ? TRC_SUCCESS : TRC_FAIL) + +#define xTraceHeapAlloc(xHeapHandle, pvAddress, uxSize) ((void)xHeapHandle, (void)pvAddress, (void)uxSize, TRC_SUCCESS) + +#define xTraceHeapFree(xHeapHandle, pvAddress, uxSize) ((void)xHeapHandle, (void)pvAddress, (void)uxSize, TRC_SUCCESS) + +#define xTraceHeapGetCurrent(xHeapHandle, puxCurrent) ((void)xHeapHandle, puxCurrent != 0 ? *puxCurrent = 0 : 0, puxCurrent != 0 ? TRC_SUCCESS : TRC_FAIL) + +#define xTraceHeapGetHighWaterMark(xHeapHandle, puxHighWaterMark) ((void)xHeapHandle, puxHighWaterMark != 0 ? *puxHighWaterMark = 0 : 0, puxHighWaterMark != 0 ? TRC_SUCCESS : TRC_FAIL) + +#define xTraceHeapGetMax(xHeapHandle, puxMax) ((void)xHeapHandle, puxMax != 0 ? *puxMax = 0 : 0, puxMax != 0 ? TRC_SUCCESS : TRC_FAIL) + +#endif /* (TRC_USE_HEAPS == 1) */ + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_HEAP_H */ diff --git a/freertos/cvitek/install/include/kernel/trcISR.h b/freertos/cvitek/install/include/kernel/trcISR.h new file mode 100644 index 000000000..8eab33419 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcISR.h @@ -0,0 +1,226 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace ISR APIs. + */ + +#ifndef TRC_ISR_H +#define TRC_ISR_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_isr_apis Trace ISR APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @internal Trace ISR Core Info Structure + */ +typedef struct TraceISRCoreInfo +{ + TraceISRHandle_t handleStack[TRC_CFG_MAX_ISR_NESTING]; /**< */ + int32_t stackIndex; /**< */ + int32_t isPendingContextSwitch; /**< */ +} TraceISRCoreInfo_t; + +/** + * @internal Trace ISR Info Structure + */ +typedef struct TraceISRInfo +{ + TraceISRCoreInfo_t coreInfos[TRC_CFG_CORE_COUNT]; /* ISR handles */ +} TraceISRInfo_t; + +/* We expose this to enable faster access */ +extern TraceISRInfo_t* pxTraceISRInfo; + +#define TRACE_ISR_INFO_BUFFER_SIZE (sizeof(TraceISRInfo_t)) + +/** + * @internal Trace ISR Info Buffer + */ +typedef struct TraceISRInfoBuffer +{ + uint8_t buffer[(TRACE_ISR_INFO_BUFFER_SIZE)]; /**< */ +} TraceISRInfoBuffer_t; + +/** + * @internal Initialize ISR trace system. + * + * @param[in] pxBuffer Pointer to memory that will be used by the ISR + * trace system. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISRInitialize(TraceISRInfoBuffer_t *pxBuffer); + +/** + * @brief Registers trace ISR. + * + * This routine stores a name and priority level for an Interrupt Service Routine, + * to allow for better visualization. Returns a TraceISRHandle_t used by + * xTraceISRBegin/xTraceISREnd. + * + * Example: + * #define PRIO_OF_ISR_TIMER1 3 // the hardware priority of the interrupt + * TraceISRHandle_t xISRTimer1Handle = 0; // The ID set by the recorder + * ... + * xTraceISRRegister("ISRTimer1", PRIO_OF_ISR_TIMER1, &xISRTimer1Handle); + * ... + * void ISR_handler() + * { + * xTraceISRBegin(xISRTimer1Handle); + * ... + * xTraceISREnd(0); + * } + * + * @param[in] szName Name. + * @param[in] uiPriority Priority. + * @param[out] pxISRHandle Pointer to uninitialized ISR trace handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISRRegister(const char* szName, uint32_t uiPriority, TraceISRHandle_t* pxISRHandle); + +/** + * @brief Registers the beginning of an Interrupt Service Routine. + * + * This routine register the beginning of an ISR using a TraceISRHandle_t. + * See xTraceISRRegister for and example of using ISR tracing. + * + * @param[in] xISRHandle Pointer to initialized ISR trace handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISRBegin(TraceISRHandle_t xISRHandle); + +/** + * @brief Registers the end of an Interrupt Service Routine. + * + * This routine register the end of an ISR using a TraceISRHandle_t. + * See xTraceISRRegister for and example of using ISR tracing. + * + * The parameter uxIsTaskSwitchRequired indicates if the interrupt has requested + * a task-switch (= 1), e.g., by signaling a semaphore. Otherwise (= 0) the + * interrupt is assumed to return to the previous context. + * + * @param[in] xIsTaskSwitchRequired Task switch required. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISREnd(TraceBaseType_t xIsTaskSwitchRequired); + +#if ((TRC_CFG_USE_TRACE_ASSERT) == 1) + +/** + * @brief Gets current trace ISR nesting level. + * + * This routine gets the current trace ISR nesting level for the + * CPU on which it is called. + * + * @param[out] puiValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISRGetCurrentNesting(int32_t* puiValue); + +/** + * @brief + * + * @return int32_t + */ +int32_t xTraceISRGetCurrentNestingReturned(void); + +/** + * @brief Gets current ISR trace handle. + * + * @param[out] pxISRHandle ISR Handle. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISRGetCurrent(TraceISRHandle_t* pxISRHandle); + +#else /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** + * @brief Gets current trace ISR nesting level. + * + * This routine gets the current trace ISR nesting level for the + * CPU on which it is called. + * + * @param[out] puiValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceISRGetCurrentNesting(puiValue) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puiValue) = pxTraceISRInfo->coreInfos[TRC_CFG_GET_CURRENT_CORE()].stackIndex, TRC_SUCCESS) + +/** + * @brief + * + * @return int32_t + */ +#define xTraceISRGetCurrentNestingReturned() (pxTraceISRInfo->coreInfos[TRC_CFG_GET_CURRENT_CORE()].stackIndex) + +/** + * @brief Gets current trace ISR nesting level. + * + * This routine gets the current trace ISR nesting level for the + * CPU on which it is called. + * + * @param[out] puiValue Value. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceISRGetCurrent(pxISRHandle) (xTraceISRGetCurrentNestingReturned() >= 0 ? (*(pxISRHandle) = pxTraceISRInfo->coreInfos[TRC_CFG_GET_CURRENT_CORE()].handleStack[xTraceISRGetCurrentNestingReturned()], TRC_SUCCESS) : TRC_FAIL) + +#endif /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** @internal Deprecated - Provides backwards-compability with older recorders for now, will be removed in the future */ +TraceISRHandle_t xTraceSetISRProperties(const char* szName, uint32_t uiPriority); + +/** @internal Deprecated - Provides backwards-compability with older recorders for now, will be removed in the future */ +#define xTraceGetCurrentISRNesting(puiValue) xTraceISRGetCurrentNesting(puiValue) + +/** @internal Deprecated - Provides backwards-compability with older recorders for now, will be removed in the future */ +#define vTraceStoreISRBegin(xISRHandle) xTraceISRBegin(xISRHandle) + +/** @internal Deprecated - Provides backwards-compability with older recorders for now, will be removed in the future */ +#define vTraceStoreISREnd(xIsTaskSwitchRequired) xTraceISREnd(xIsTaskSwitchRequired) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif + +#endif + +#endif diff --git a/freertos/cvitek/install/include/kernel/trcInternalEventBuffer.h b/freertos/cvitek/install/include/kernel/trcInternalEventBuffer.h new file mode 100644 index 000000000..1a93cb1da --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcInternalEventBuffer.h @@ -0,0 +1,107 @@ +/* + * Percepio Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * + * @brief Public internal event buffer APIs. + */ + +#ifndef TRC_INTERNAL_BUFFER_H +#define TRC_INTERNAL_BUFFER_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#ifndef TRC_USE_INTERNAL_BUFFER +#define TRC_USE_INTERNAL_BUFFER 1 +#endif + +#if (TRC_USE_INTERNAL_BUFFER == 1) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_internal_event_buffer_apis Trace Internal Event Buffer APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @internal Initializes the internal trace event buffer used by certain stream ports. + * + * @param[in] puiBuffer Pointer to previously allocated memory buffer + * @param[in] uiSize Size of buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceInternalEventBufferInitialize(uint8_t* puiBuffer, uint32_t uiSize); + +/** + * @brief Pushes data to the internal trace event buffer. + * + * @param[in] pvData Pointer to data + * @param[in] uiSize Size of data + * @param[out] piBytesWritten Bytes written. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceInternalEventBufferPush(void *pvData, uint32_t uiSize, int32_t *piBytesWritten); + +/** + * @brief Transfers all internal trace event buffer data using the function + * xTraceStreamPortWriteData(...) as defined in trcStreamPort.h. + * + * This function is intended to be called by the periodic TzCtrl task with a + * suitable delay (e.g. 10-100 ms). + * + * In case of errors from the streaming interface, it registers a warning + * (TRC_WARNING_STREAM_PORT_WRITE) provided by xTraceErrorGetLast(). + * + * @param[out] piBytesWritten Bytes written. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceInternalEventBufferTransfer(int32_t *piBytesWritten); + +/** + * @brief Clears all trace events in the internal trace event buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceInternalEventBufferClear(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#else /* (TRC_USE_INTERNAL_BUFFER == 1)*/ + +#define xTraceInternalEventBufferInitialize(puiBuffer, uiSize) ((void)uiSize, puiBuffer != 0 ? TRC_SUCCESS : TRC_FAIL) +#define xTraceInternalEventBufferPush(pvData, uiSize, piBytesWritten) ((void)uiSize, (void)piBytesWritten, pvData != 0 ? TRC_SUCCESS : TRC_FAIL) +#define xTraceInternalEventBufferTransfer(piBytesWritten) ((void)piBytesWritten, TRC_SUCCESS) +#define xTraceInternalEventBufferClear() (void)(TRC_SUCCESS) + +#endif /* (TRC_USE_INTERNAL_BUFFER == 1)*/ + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_INTERNAL_BUFFER_H */ diff --git a/freertos/cvitek/install/include/kernel/trcInterval.h b/freertos/cvitek/install/include/kernel/trcInterval.h new file mode 100644 index 000000000..e16c570e4 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcInterval.h @@ -0,0 +1,130 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace interval APIs. + */ + +#ifndef TRC_INTERVAL_H +#define TRC_INTERVAL_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#ifdef __cplusplus +extern "C" { +#endif + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#define TRC_INTERVAL_CHANNEL_SET_INDEX 0 + +/** + * @defgroup trace_interval_apis Trace Interval APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Creates trace interval channel set. + * + * @param[in] szName Name. + * @param[out] pxIntervalChannelSetHandle Pointer to uninitialized trace interval channel set. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ + traceResult xTraceIntervalChannelSetCreate(const char* szName, TraceIntervalChannelSetHandle_t* pxIntervalChannelSetHandle); + +/** + * @brief Creates trace interval channel. + * + * @param[in] szName Name. + * @param[in] xIntervalChannelSetHandle Interval set that this channel belongs to. + * @param[out] pxIntervalChannelHandle Pointer to uninitialized trace interval channel. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceIntervalChannelCreate(const char *szName, TraceIntervalChannelSetHandle_t xIntervalChannelSetHandle, TraceIntervalChannelHandle_t *pxIntervalChannelHandle); + +/** + * @brief Starts trace interval instance. + * + * @param[in] xIntervalChannelHandle Interval handle. + * @param[in] uxValue Value that can be used to tell instances apart. + * @param[out] pxIntervalInstanceHandle Pointer to interval instance variable. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceIntervalStart(TraceIntervalChannelHandle_t xIntervalChannelHandle, TraceUnsignedBaseType_t uxValue, TraceIntervalInstanceHandle_t* pxIntervalInstanceHandle); + +/** + * @brief Stops trace interval instance. + * + * @param[in] xIntervalChannelHandle Interval handle. + * @param[in] xIntervalInstanceHandle Interval instance. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceIntervalStop(TraceIntervalChannelHandle_t xIntervalChannelHandle, TraceIntervalInstanceHandle_t xIntervalInstanceHandle); + +/** + * @brief Gets trace interval channel state. + * + * @param[in] xIntervalChannelHandle Pointer to initialized trace interval. + * @param[out] puxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceIntervalGetState(xIntervalChannelHandle, puxState) xTraceEntryGetState((TraceEntryHandle_t)(xIntervalChannelHandle), TRC_INTERVAL_CHANNEL_SET_INDEX, puxState) + +/** @} */ + +#else + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceIntervalChannelSetCreate(__szName, __pxIntervalChannelSetHandle) ((void)(__szName), *(__pxIntervalChannelSetHandle) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceIntervalChannelCreate(__szName, __xIntervalChannelSetHandle, __pxIntervalChannelHandle) ((void)(__szName), (void)(__xIntervalChannelSetHandle), *(__pxIntervalChannelHandle) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceIntervalStart(__xIntervalHandle, __uxValue, __pxIntervalInstanceHandle) ((void)(__xIntervalHandle), (void)(__uxValue), *(__pxIntervalInstanceHandle) = 0, TRC_SUCCESS) + + /** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceIntervalStop(__xIntervalHandle, __xIntervalInstanceHandle) ((void)(__xIntervalHandle), (void)(__xIntervalInstanceHandle), TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceIntervalGetState(__xIntervalHandle, __puxState) ((void)(__xIntervalHandle), *(__puxState) = 0, TRC_SUCCESS) + +#endif + +#ifdef __cplusplus +} +#endif + +#endif + +#endif diff --git a/freertos/cvitek/install/include/kernel/trcKernelPort.h b/freertos/cvitek/install/include/kernel/trcKernelPort.h new file mode 100644 index 000000000..155018325 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcKernelPort.h @@ -0,0 +1,2985 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * FreeRTOS specific definitions needed by the trace recorder + */ + +#ifndef TRC_KERNEL_PORT_H +#define TRC_KERNEL_PORT_H + +#include +#include /* Defines configUSE_TRACE_FACILITY */ + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRC_USE_TRACEALYZER_RECORDER configUSE_TRACE_FACILITY + +/* FreeRTOS version codes */ +#define FREERTOS_VERSION_NOT_SET 0 +#define TRC_FREERTOS_VERSION_7_3_X 1 /* v7.3 is earliest supported.*/ +#define TRC_FREERTOS_VERSION_7_4_X 2 +#define TRC_FREERTOS_VERSION_7_5_X 3 +#define TRC_FREERTOS_VERSION_7_6_X TRC_FREERTOS_VERSION_7_5_X +#define TRC_FREERTOS_VERSION_8_X_X 4 +#define TRC_FREERTOS_VERSION_9_0_0 5 +#define TRC_FREERTOS_VERSION_9_0_1 6 +#define TRC_FREERTOS_VERSION_9_0_2 7 +#define TRC_FREERTOS_VERSION_10_0_0 8 +#define TRC_FREERTOS_VERSION_10_0_1 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_1_0 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_1_1 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_2_0 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_2_1 TRC_FREERTOS_VERSION_10_0_0 +#define TRC_FREERTOS_VERSION_10_3_0 9 +#define TRC_FREERTOS_VERSION_10_3_1 TRC_FREERTOS_VERSION_10_3_0 +#define TRC_FREERTOS_VERSION_10_4_0 10 +#define TRC_FREERTOS_VERSION_10_4_1 TRC_FREERTOS_VERSION_10_4_0 + +/* Legacy FreeRTOS version codes for backwards compatibility with old trace configurations */ +#define TRC_FREERTOS_VERSION_7_3 TRC_FREERTOS_VERSION_7_3_X +#define TRC_FREERTOS_VERSION_7_4 TRC_FREERTOS_VERSION_7_4_X +#define TRC_FREERTOS_VERSION_7_5_OR_7_6 TRC_FREERTOS_VERSION_7_5_X +#define TRC_FREERTOS_VERSION_8_X TRC_FREERTOS_VERSION_8_X_X + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define prvGetStreamBufferType(x) ((( StreamBuffer_t * )(x) )->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER) +#else +#define prvGetStreamBufferType(x) 0 +#endif + +/* Added mainly for our internal testing. This makes it easier to create test applications that + runs on multiple FreeRTOS versions. */ +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_8_X_X) + /* FreeRTOS v7.x */ + #define STRING_CAST(x) ( (signed char*) x ) + #define TickType portTickType + #define TaskType xTaskHandle +#else + /* FreeRTOS v8.0 and later */ + #define STRING_CAST(x) x + #define TraceKernelPortTickType_t TickType_t + #define TraceKernelPortTaskHandle_t TaskHandle_t +#endif + +#if (defined(TRC_USE_TRACEALYZER_RECORDER)) && (TRC_USE_TRACEALYZER_RECORDER == 1) + +#define TRC_PLATFORM_CFG "FreeRTOS" +#define TRC_PLATFORM_CFG_MAJOR 1 +#define TRC_PLATFORM_CFG_MINOR 0 +#define TRC_PLATFORM_CFG_PATCH 0 + +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) + +/* Required for stack monitoring */ +#undef INCLUDE_uxTaskGetStackHighWaterMark +#define INCLUDE_uxTaskGetStackHighWaterMark 1 + +#endif + +/* INCLUDE_xTaskGetCurrentTaskHandle must be set to 1 for tracing to work properly */ +#undef INCLUDE_xTaskGetCurrentTaskHandle +#define INCLUDE_xTaskGetCurrentTaskHandle 1 + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) +#include + +#define TRC_KERNEL_PORT_BUFFER_SIZE (sizeof(TraceHeapHandle_t) + sizeof(void*)) +#elif (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) +#define TRC_KERNEL_PORT_BUFFER_SIZE (sizeof(TraceUnsignedBaseType_t)) +#endif + +#if (TRC_CFG_FREERTOS_VERSION == FREERTOS_VERSION_NOT_SET) +#error "Please set TRC_CFG_FREERTOS_VERSION in trcKernelPortConfig.h to the FreeRTOS version used." +#endif + +/** + * @internal The kernel port data buffer + */ +typedef struct TraceKernelPortDataBuffer +{ + uint8_t buffer[TRC_KERNEL_PORT_BUFFER_SIZE]; +} TraceKernelPortDataBuffer_t; + +/** + * @internal Initializes the kernel port + * + * @param[in] pxBuffer Kernel port data buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceKernelPortInitialize(TraceKernelPortDataBuffer_t* pxBuffer); + +/** + * @internal Enables the kernel port + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceKernelPortEnable(void); + +/** + * @internal Calls on FreeRTOS vTaskDelay(...) + * + * @param[in] uiTicks Tick count to delay + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceKernelPortDelay(uint32_t uiTicks); + +/** + * @internal Query if FreeRTOS scheduler is suspended + * + * @retval 1 Scheduler suspended + * @retval 0 Scheduler not suspended + */ +unsigned char xTraceKernelPortIsSchedulerSuspended(void); + +/** + * @brief Kernel specific way to properly allocate critical sections + */ +#define TRC_KERNEL_PORT_ALLOC_CRITICAL_SECTION() + +/** + * @brief Kernel specific way to properly allocate critical sections + */ +#define TRC_KERNEL_PORT_ENTER_CRITICAL_SECTION() portENTER_CRITICAL() + +/** + * @brief Kernel specific way to properly allocate critical sections + */ +#define TRC_KERNEL_PORT_EXIT_CRITICAL_SECTION() portEXIT_CRITICAL() + +/** +* @brief Kernel specific way to set interrupt mask +*/ +#define TRC_KERNEL_PORT_SET_INTERRUPT_MASK() ((TraceBaseType_t)portSET_INTERRUPT_MASK_FROM_ISR()) + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + +/** + * @brief Kernel specific way to clear interrupt mask + */ +#define TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(xMask) portCLEAR_INTERRUPT_MASK_FROM_ISR((UBaseType_t)(xMask)) + +#else + +/** + * @brief Kernel specific way to clear interrupt mask + */ +#define TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(xMask) portCLEAR_INTERRUPT_MASK_FROM_ISR((unsigned portBASE_TYPE)xMask) +#endif + +#if (TRC_CFG_SCHEDULING_ONLY == 0) + +/** + * @brief Set the queue name + * + * @param[in] pvQueue Queue pointer + * @param[in] szName Queue name + */ +void vTraceSetQueueName(void* pvQueue, const char* szName); + +/** + * @brief Set the semaphore name + * + * @param[in] pvSemaphore Semaphore pointer + * @param[in] szName Semaphore name + */ +void vTraceSetSemaphoreName(void* pvSemaphore, const char* szName); + +/** + * @brief Set the mutex name + * + * @param[in] pvMutex Mutex pointer + * @param[in] szName Mutex name + */ +void vTraceSetMutexName(void* pvMutex, const char* szName); + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) + +/** + * @brief Set the event group name + * + * @param[in] pvEventGroup Event group pointer + * @param[in] szName Event group name + */ +void vTraceSetEventGroupName(void* pvEventGroup, const char* szName); + +#else + +/** + * @brief Disabled by TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS + */ +#define vTraceSetEventGroupName(__pvEventGroup, __szName) ((void)(__pvEventGroup), (void)(__szName)) + +#endif + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) + +/** + * @brief Set the stream buffer name + * + * @param[in] pvStreamBuffer Stream buffer pointer + * @param[in] szName Stream buffer name + */ +void vTraceSetStreamBufferName(void* pvStreamBuffer, const char* szName); + +/** + * @brief Set the message buffer name + * + * @param[in] pvMessageBuffer Message buffer pointer + * @param[in] szName Message buffer name + */ +void vTraceSetMessageBufferName(void* pvMessageBuffer, const char* szName); + +#else + +/** + * @brief Disabled by TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS + */ +#define vTraceSetStreamBufferName(__pvStreamBuffer, __szName) ((void)(__pvStreamBuffer), (void)(__szName)) + +/** + * @brief Disabled by TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS + */ +#define vTraceSetMessageBufferName(__pvMessageBuffer, __szName) ((void)(__pvMessageBuffer), (void)(__szName)) + +#endif + +#if defined(TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) + + /** + * @internal Retrieves the unused stack for a task + * + * @param[in] pvTask Task pointer + * @param[out] puxUnusedStack The unused stack + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceKernelPortGetUnusedStack(void* pvTask, TraceUnsignedBaseType_t *puxUnusedStack); + +#endif + +#else + +/** + * @brief Disabled by TRC_CFG_SCHEDULING_ONLY + */ +#define vTraceSetQueueName(__pvQueue, __szName) ((void)(__pvQueue), (void)(__szName)) + +/** + * @brief Disabled by TRC_CFG_SCHEDULING_ONLY + */ +#define vTraceSetSemaphoreName(__pvSemaphore, __szName) ((void)(__pvSemaphore), (void)(__szName)) + +/** + * @brief Disabled by TRC_CFG_SCHEDULING_ONLY + */ +#define vTraceSetMutexName(__pvMutex, __szName) ((void)(__pvMutex), (void)(__szName)) + +/** + * @brief Disabled by TRC_CFG_SCHEDULING_ONLY + */ +#define vTraceSetEventGroupName(__pvEventGroup, __szName) ((void)(__pvEventGroup), (void)(__szName)) + +/** + * @brief Disabled by TRC_CFG_SCHEDULING_ONLY + */ +#define vTraceSetStreamBufferName(__pvStreamBuffer, __szName) ((void)(__pvStreamBuffer), (void)(__szName)) + +/** + * @brief Disabled by TRC_CFG_SCHEDULING_ONLY + */ +#define vTraceSetMessageBufferName(__pvMessageBuffer, __szName) ((void)(__pvMessageBuffer), (void)(__szName)) + +/** + * @brief Disabled by TRC_CFG_SCHEDULING_ONLY + */ +#define xTraceKernelPortGetUnusedStack(pvTask, puxUnusedStack) ((void)(pvTask), (void)(puxUnusedStack)) + +#endif + +#if (((TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) && (TRC_CFG_INCLUDE_ISR_TRACING == 1)) || (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)) + +/* Required for ISR tracing and Streaming */ +#undef INCLUDE_xTaskGetSchedulerState +#define INCLUDE_xTaskGetSchedulerState 1 + +#endif + +/** + * @internal Legacy ID used by Tracealyzer to identify FreeRTOS traces + */ +#define TRACE_KERNEL_VERSION 0x1AA1 + +/** + * @internal Kernel specific tick rate frequency definition + */ +#define TRC_TICK_RATE_HZ configTICK_RATE_HZ /* Defined in "FreeRTOS.h" */ + +/** + * @internal Kernel specific CPU clock frequency definition + */ +#define TRACE_CPU_CLOCK_HZ configCPU_CLOCK_HZ /* Defined in "FreeRTOSConfig.h" */ + +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC) +/** + * @internal Kernel port specific heap initialization + */ +#define TRC_KERNEL_PORT_HEAP_INIT(size) + +/** + * @internal Kernel port specific heap malloc definition + */ +#define TRC_KERNEL_PORT_HEAP_MALLOC(size) pvPortMalloc(size) +#endif /* (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC) */ + +#if (defined(configUSE_TIMERS) && (configUSE_TIMERS == 1)) + +#undef INCLUDE_xTimerGetTimerDaemonTaskHandle +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 1 + +#endif + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XMOS_XCOREAI) + +#undef TRC_CFG_CORE_COUNT +#define TRC_CFG_CORE_COUNT configNUM_CORES + +#undef TRC_CFG_GET_CURRENT_CORE +#define TRC_CFG_GET_CURRENT_CORE() rtos_core_id_get() + +#endif + +#if (TRC_CFG_FREERTOS_VERSION == TRC_FREERTOS_VERSION_9_0_1) + +/** + * @brief Fix for FreeRTOS v9.0.1 to correctly identify xQueuePeek events. + * + * In FreeRTOS v9.0.1, the below trace hooks are incorrectly used from three + * different functions. This as the earlier function xQueueGenericReceive + * has been replaced by xQueuePeek, xQueueSemaphoreTake and xQueueReceive. + * + * xQueueGenericReceive had a parameter "xJustPeeking", used by the trace hooks + * to tell between xQueuePeek events and others. This is no longer present, so + * we need another way to correctly identify peek events. Since all three + * functions call the same trace macros, the context of these macro is unknown. + * + * We therefore check the __LINE__ macro inside of the trace macros. This gives + * the line number of queue.c, where the macros are used. This can be used to + * tell if the context is xQueuePeek or another function. + * __LINE__ is a standard compiler feature since ancient times, so it should + * work on all common compilers. + * + * This might seem as a quite brittle and unusual solution, but works in this + * particular case and is only for FreeRTOS v9.0.1. + * Future versions of FreeRTOS should not need this fix, as we have submitted + * a correction of queue.c with individual trace macros for each function. + */ +#define isQueueReceiveHookActuallyPeek (__LINE__ > 1674) /* Half way between the closes trace points */ + +#elif (TRC_CFG_FREERTOS_VERSION <= TRC_FREERTOS_VERSION_9_0_0) + +/** + * @brief Is receive actually a peek + */ +#define isQueueReceiveHookActuallyPeek xJustPeeking + +#elif (TRC_CFG_FREERTOS_VERSION > TRC_FREERTOS_VERSION_9_0_1) + +/** + * @brief Is never a peek for this FreeRTOS version + */ +#define isQueueReceiveHookActuallyPeek (__LINE__ < 0) /* instead of pdFALSE to fix a warning of "constant condition" */ + +#endif + +/* Helpers needed to correctly expand names */ +#define TZ__CAT2(a,b) a ## b +#define TZ__CAT(a,b) TZ__CAT2(a, b) + +/* + * The following xQueueGiveFromISR macro hacks make sure xQueueGiveFromISR also has a xCopyPosition parameter + */ + +/* Expands name if this header is included... uxQueueType must be a macro that only exists in queue.c or whatever, and it must expand to nothing or to something that's valid in identifiers */ +#define xQueueGiveFromISR(a,b) TZ__CAT(xQueueGiveFromISR__, uxQueueType) (a,b) + +/* If in queue.c, the "uxQueueType" macro expands to "pcHead". queueSEND_TO_BACK is the value we need to send in */ +#define xQueueGiveFromISR__pcHead(__a, __b) MyWrapper_xQueueGiveFromISR(__a, __b, const BaseType_t xCopyPosition); \ +BaseType_t xQueueGiveFromISR(__a, __b) { return MyWrapper_xQueueGiveFromISR(xQueue, pxHigherPriorityTaskWoken, queueSEND_TO_BACK); } \ +BaseType_t MyWrapper_xQueueGiveFromISR(__a, __b, const BaseType_t xCopyPosition) + +/* If not in queue.c, "uxQueueType" isn't expanded */ +#define xQueueGiveFromISR__uxQueueType(__a, __b) xQueueGiveFromISR(__a,__b) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + +/** + * @internal Kernel specific way to get current task handle + */ +#define TRACE_GET_CURRENT_TASK() prvTraceGetCurrentTaskHandle() + +extern uint16_t CurrentFilterMask; +extern uint16_t CurrentFilterGroup; + +/** + * @internal Get specific queue type + * + * @param[in] pvQueue Queue handle + * + * @returns uint8_t Queue type + */ +uint8_t prvTraceGetQueueType(void* pvQueue); + +/** + * @internal Retrieve lower 16-bit of task number + * + * @param[in] pvTask Task handle + * + * @returns uint16_t Lower 16-bit of task number + */ +uint16_t prvTraceGetTaskNumberLow16(void* pvTask); + +/** + * @internal Retrieve upper 16-bit of task number + * + * @param[in] pvTask Task handle + * + * @returns uint16_t Upper 16-bit of task number + */ +uint16_t prvTraceGetTaskNumberHigh16(void* pvTask); + +/** + * @internal Set lower 16-bit of task number + * + * @param[in] pvTask Task handle + * @param[in] uiValue Value + */ +void prvTraceSetTaskNumberLow16(void* pvTask, uint16_t uiValue); + +/** + * @internal Set upper 16-bit of task number + * + * @param[in] pvTask Task handle + * @param[in] uiValue Value + */ +void prvTraceSetTaskNumberHigh16(void* pvTask, uint16_t uiValue); + +/** + * @internal Retrieve lower 16-bit of queue number + * + * @param[in] pvQueue Queue handle + * + * @returns uint16_t Lower 16-bit of queue number + */ +uint16_t prvTraceGetQueueNumberLow16(void* pvQueue); + +/** + * @internal Retrieve upper 16-bit of queue number + * + * @param[in] pvQueuevQueue handle + * + * @returns uint16_t Upper 16-bit of queue number + */ +uint16_t prvTraceGetQueueNumberHigh16(void* pvQueue); + + +/** + * @internal Set lower 16-bit of queue number + * + * @param[in] pvQueue Queue handle + * @param[in] uiValue Value + */ +void prvTraceSetQueueNumberLow16(void* pvQueue, uint16_t uiValue); + + +/** + * @internal Set upper 16-bit of queue number + * + * @param[in] pvQueue Queue handle + * @param[in] uiValue Value + */ +void prvTraceSetQueueNumberHigh16(void* pvQueue, uint16_t uiValue); + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +/** + * @internal Retrieve lower 16-bit of timer number + * + * @param[in] pvTimer Timer handle + * + * @returns uint16_t Lower 16-bit of timer number + */ +uint16_t prvTraceGetTimerNumberLow16(void* pvTimer); + +/** + * @internal Retrieve upper 16-bit of timer number + * + * @param[in] pvTimer Timer handle + * + * @returns uint16_t Upper 16-bit of timer number + */ +uint16_t prvTraceGetTimerNumberHigh16(void* pvTimer); + +/** + * @internal Set lower 16-bit of timer number + * + * @param[in] pvTimer Timer handle + * @param[in] uiValue Value + */ +void prvTraceSetTimerNumberLow16(void* pvTimer, uint16_t uiValue); + +/** + * @internal Set upper 16-bit of timer number + * + * @param[in] pvTimer Timer handle + * @param[in] uiValue Value + */ +void prvTraceSetTimerNumberHigh16(void* pvTimer, uint16_t uiValue); + +#endif + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +/** + * @internal Retrieve lower 16-bit of event group number + * + * @param[in] pvEventGroup Event group handle + * + * @returns uint16_t Lower 16-bit of event group number + */ +uint16_t prvTraceGetEventGroupNumberLow16(void* pvEventGroup); + +/** + * @internal Retrieve upper 16-bit of event group number + * + * @param[in] pvEventGroup Event group handle + * + * @returns uint16_t Upper 16-bit of event group number + */ +uint16_t prvTraceGetEventGroupNumberHigh16(void* pvEventGroup); + +/** + * @internal Set lower 16-bit of event group number + * + * @param[in] pvEventGroup Event group handle + * @param[in] uiValue Value + */ +void prvTraceSetEventGroupNumberLow16(void* pvEventGroup, uint16_t uiValue); + +/** + * @internal Set upper 16-bit of event group number + * + * @param[in] pvEventGroup Event group handle + * @param[in] uiValue Value + */ +void prvTraceSetEventGroupNumberHigh16(void* handle, uint16_t value); + +#endif + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1 && TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +/** + * @internal Retrieve lower 16-bit of stream buffer number + * + * @param[in] pvStreamBuffer Stream buffer handle + * + * @returns uint16_t Lower 16-bit of stream buffer number + */ +uint16_t prvTraceGetStreamBufferNumberLow16(void* pvStreamBuffer); + +/** + * @internal Retrieve upper 16-bit of stream buffer number + * + * @param[in] pvStreamBuffer Stream buffer handle + * + * @returns uint16_t Upper 16-bit of stream buffer number + */ +uint16_t prvTraceGetStreamBufferNumberHigh16(void* pvStreamBuffer); + +/** + * @internal Set lower 16-bit of stream buffer number + * + * @param[in] pvStreamBuffer Stream buffer handle + * @param[in] uiValue Value + */ +void prvTraceSetStreamBufferNumberLow16(void* pvStreamBuffer, uint16_t uiValue); + +/** + * @internal Set upper 16-bit of stream buffer number + * + * @param[in] pvStreamBuffer Stream buffer handle + * @param[in] uiValue Value + */ +void prvTraceSetStreamBufferNumberHigh16(void* pvStreamBuffer, uint16_t uiValue); + +#endif + +/** + * @brief Retrieve filter of task + * + * @param[in] pxTask Task handle + * + * @returns uint16_t Task filter + */ +#define TRACE_GET_TASK_FILTER(pxTask) prvTraceGetTaskNumberHigh16((void*)pxTask) + +/** + * @brief Set filter of task + * + * @param[in] pxTask Task handle + * @param[in] group Group + */ +#define TRACE_SET_TASK_FILTER(pxTask, group) prvTraceSetTaskNumberHigh16((void*)pxTask, group) + +/** + * @brief Retrieve filter of queue + * + * @param[in] pxQueue Queue handle + * + * @returns uint16_t Queue filter + */ +#define TRACE_GET_QUEUE_FILTER(pxQueue) prvTraceGetQueueNumberHigh16((void*)pxQueue) + +/** + * @brief Set filter of queue + * + * @param[in] pxQueue Queue handle + * @param[in] group Group + */ +#define TRACE_SET_QUEUE_FILTER(pxQueue, group) prvTraceSetQueueNumberHigh16((void*)pxQueue, group) + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +/** + * @brief Retrieve filter of event group + * + * @param[in] pxEventGroup Queue handle + * + * @returns uint16_t Queue filter + */ +#define TRACE_GET_EVENTGROUP_FILTER(pxEventGroup) prvTraceGetEventGroupNumberHigh16((void*)pxEventGroup) + +/** + * @brief Set filter of event group + * + * @param[in] pxEventGroup Queue handle + * @param[in] group Group + */ +#define TRACE_SET_EVENTGROUP_FILTER(pxEventGroup, group) prvTraceSetEventGroupNumberHigh16((void*)pxEventGroup, group) + +#else + +/** + * @brief Disabled by TRC_CFG_FREERTOS_VERSION + */ +#define TRACE_GET_EVENTGROUP_FILTER(pxEventGroup) ((void)(pxEventGroup), 1) + +/** + * @brief Disabled by TRC_CFG_FREERTOS_VERSION + */ +#define TRACE_SET_EVENTGROUP_FILTER(pxEventGroup, group) ((void)(pxEventGroup), (void)(group)) + +#endif + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) + +/** + * @brief Retrieve filter of timer + * + * @param[in] pxEventGroup Timer handle + * + * @returns uint16_t Timer filter + */ +#define TRACE_GET_TIMER_FILTER(pxTimer) prvTraceGetTimerNumberHigh16((void*)pxTimer) + +/** + * @brief Set filter of timer + * + * @param[in] pxTimer Timer handle + * @param[in] group Group + */ +#define TRACE_SET_TIMER_FILTER(pxTimer, group) prvTraceSetTimerNumberHigh16((void*)pxTimer, group) + +#else + +/** + * @brief Disabled by TRC_CFG_FREERTOS_VERSION + */ +#define TRACE_GET_TIMER_FILTER(pxTimer) ((void)(pxTimer), 1) + +/** + * @brief Disabled by TRC_CFG_FREERTOS_VERSION + */ +#define TRACE_SET_TIMER_FILTER(pxTimer, group) ((void)(pxTimer), (void)(group)) + +#endif + +/** + * @brief Retrieve filter of stream buffer + * + * @param[in] pxStreamBuffer Stream buffer handle + * + * @returns uint16_t Timer filter + */ +#define TRACE_GET_STREAMBUFFER_FILTER(pxStreamBuffer) prvTraceGetStreamBufferNumberHigh16((void*)pxStreamBuffer) + +/** + * @brief Set filter of stream buffer + * + * @param[in] pxStreamBuffer Stream buffer handle + * @param[in] group Group + */ +#define TRACE_SET_STREAMBUFFER_FILTER(pxStreamBuffer, group) prvTraceSetStreamBufferNumberHigh16((void*)pxStreamBuffer, group) + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + +/** + * @internal Get object filter + */ +#define TRACE_GET_OBJECT_FILTER(CLASS, pxObject) TRACE_GET_##CLASS##_FILTER(pxObject) + +/** + * @internal Set object filter + */ +#define TRACE_SET_OBJECT_FILTER(CLASS, pxObject, group) TRACE_SET_##CLASS##_FILTER(pxObject, group) + +#else + +/** + * @internal Disabled by TRC_CFG_FREERTOS_VERSION + */ +#define TRACE_GET_OBJECT_FILTER(CLASS, pxObject) 0xFFFF + +/** + * @internal Disabled by TRC_CFG_FREERTOS_VERSION + */ +#define TRACE_SET_OBJECT_FILTER(CLASS, pxObject, group) + +#endif + +/* The object classes */ +#define TRACE_NCLASSES 9 +#define TRACE_CLASS_QUEUE ((traceObjectClass)0) +#define TRACE_CLASS_SEMAPHORE ((traceObjectClass)1) +#define TRACE_CLASS_MUTEX ((traceObjectClass)2) +#define TRACE_CLASS_TASK ((traceObjectClass)3) +#define TRACE_CLASS_ISR ((traceObjectClass)4) +#define TRACE_CLASS_TIMER ((traceObjectClass)5) +#define TRACE_CLASS_EVENTGROUP ((traceObjectClass)6) +#define TRACE_CLASS_STREAMBUFFER ((traceObjectClass)7) +#define TRACE_CLASS_MESSAGEBUFFER ((traceObjectClass)8) + +/* Definitions for Object Table */ +#define TRACE_KERNEL_OBJECT_COUNT ((TRC_CFG_NQUEUE) + (TRC_CFG_NSEMAPHORE) + (TRC_CFG_NMUTEX) + (TRC_CFG_NTASK) + (TRC_CFG_NISR) + (TRC_CFG_NTIMER) + (TRC_CFG_NEVENTGROUP) + (TRC_CFG_NSTREAMBUFFER) + (TRC_CFG_NMESSAGEBUFFER)) + +/* Queue properties (except name): current number of message in queue */ +#define PropertyTableSizeQueue ((TRC_CFG_NAME_LEN_QUEUE) + 1) + +/* Semaphore properties (except name): state (signaled = 1, cleared = 0) */ +#define PropertyTableSizeSemaphore ((TRC_CFG_NAME_LEN_SEMAPHORE) + 1) + +/* Mutex properties (except name): owner (task handle, 0 = free) */ +#define PropertyTableSizeMutex ((TRC_CFG_NAME_LEN_MUTEX) + 1) + +/* Task properties (except name): Byte 0: Current priority + Byte 1: state (if already active) + Byte 2: legacy, not used + Byte 3: legacy, not used */ +#define PropertyTableSizeTask ((TRC_CFG_NAME_LEN_TASK) + 4) + +/* ISR properties: Byte 0: priority + Byte 1: state (if already active) */ +#define PropertyTableSizeISR ((TRC_CFG_NAME_LEN_ISR) + 2) + +/* TRC_CFG_NTIMER properties: Byte 0: state (unused for now) */ +#define PropertyTableSizeTimer ((TRC_CFG_NAME_LEN_TIMER) + 1) + +/* TRC_CFG_NEVENTGROUP properties: Byte 0-3: state (unused for now)*/ +#define PropertyTableSizeEventGroup ((TRC_CFG_NAME_LEN_EVENTGROUP) + 4) + +/* TRC_CFG_NSTREAMBUFFER properties: Byte 0-3: state (unused for now)*/ +#define PropertyTableSizeStreamBuffer ((TRC_CFG_NAME_LEN_STREAMBUFFER) + 4) + +/* TRC_CFG_NMESSAGEBUFFER properties: Byte 0-3: state (unused for now)*/ +#define PropertyTableSizeMessageBuffer ((TRC_CFG_NAME_LEN_MESSAGEBUFFER) + 4) + + +/* The layout of the byte array representing the Object Property Table */ +#define StartIndexQueue (0) +#define StartIndexSemaphore (StartIndexQueue + (TRC_CFG_NQUEUE) * PropertyTableSizeQueue) +#define StartIndexMutex (StartIndexSemaphore + (TRC_CFG_NSEMAPHORE) * PropertyTableSizeSemaphore) +#define StartIndexTask (StartIndexMutex + (TRC_CFG_NMUTEX) * PropertyTableSizeMutex) +#define StartIndexISR (StartIndexTask + (TRC_CFG_NTASK) * PropertyTableSizeTask) +#define StartIndexTimer (StartIndexISR + (TRC_CFG_NISR) * PropertyTableSizeISR) +#define StartIndexEventGroup (StartIndexTimer + (TRC_CFG_NTIMER) * PropertyTableSizeTimer) +#define StartIndexStreamBuffer (StartIndexEventGroup + (TRC_CFG_NEVENTGROUP) * PropertyTableSizeEventGroup) +#define StartIndexMessageBuffer (StartIndexStreamBuffer + (TRC_CFG_NSTREAMBUFFER) * PropertyTableSizeStreamBuffer) + +/* Number of bytes used by the object table */ +#define TRACE_OBJECT_TABLE_SIZE (StartIndexMessageBuffer + (TRC_CFG_NMESSAGEBUFFER) * PropertyTableSizeMessageBuffer) + +/* Flag to tell the context of tracePEND_FUNC_CALL_FROM_ISR */ +extern int uiInEventGroupSetBitsFromISR; + +/** + * @internal Initialized the object property table + */ +traceResult xTraceKernelPortInitObjectPropertyTable(void); + +/** + * @internal Initialized the object handle stack + */ +traceResult xTraceKernelPortInitObjectHandleStack(void); + +/** + * @internal Retrieve error string + */ +const char* pszTraceGetErrorNotEnoughHandles(traceObjectClass objectclass); + +/** + * @internal Retrieve current task handle + */ +void* prvTraceGetCurrentTaskHandle(void); + +extern traceObjectClass TraceQueueClassTable[5]; + + +/*** Event codes for snapshot mode - must match Tracealyzer config files ******/ + +#define NULL_EVENT (0x00UL) + +/******************************************************************************* + * EVENTGROUP_DIV + * + * Miscellaneous events. + ******************************************************************************/ +#define EVENTGROUP_DIV (NULL_EVENT + 1UL) /*0x01*/ +#define DIV_XPS (EVENTGROUP_DIV + 0UL) /*0x01*/ +#define DIV_TASK_READY (EVENTGROUP_DIV + 1UL) /*0x02*/ +#define DIV_NEW_TIME (EVENTGROUP_DIV + 2UL) /*0x03*/ + +/******************************************************************************* + * EVENTGROUP_TS + * + * Events for storing task-switches and interrupts. The RESUME events are + * generated if the task/interrupt is already marked active. + ******************************************************************************/ +#define EVENTGROUP_TS (EVENTGROUP_DIV + 3UL) /*0x04*/ +#define TS_ISR_BEGIN (EVENTGROUP_TS + 0UL) /*0x04*/ +#define TS_ISR_RESUME (EVENTGROUP_TS + 1UL) /*0x05*/ +#define TS_TASK_BEGIN (EVENTGROUP_TS + 2UL) /*0x06*/ +#define TS_TASK_RESUME (EVENTGROUP_TS + 3UL) /*0x07*/ + +/******************************************************************************* + * EVENTGROUP_OBJCLOSE_NAME + * + * About Close Events + * When an object is evicted from the object property table (object close), two + * internal events are stored (EVENTGROUP_OBJCLOSE_NAME and + * EVENTGROUP_OBJCLOSE_PROP), containing the handle-name mapping and object + * properties valid up to this point. + ******************************************************************************/ +#define EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS (EVENTGROUP_TS + 4UL) /*0x08*/ + +/******************************************************************************* + * EVENTGROUP_OBJCLOSE_PROP + * + * The internal event carrying properties of deleted objects + * The handle and object class of the closed object is not stored in this event, + * but is assumed to be the same as in the preceding CLOSE event. Thus, these + * two events must be generated from within a critical section. + * When queues are closed, arg1 is the "state" property (i.e., number of + * buffered messages/signals). + * When actors are closed, arg1 is priority, arg2 is handle of the "instance + * finish" event, and arg3 is event code of the "instance finish" event. + * In this case, the lower three bits is the object class of the instance finish + * handle. The lower three bits are not used (always zero) when queues are + * closed since the queue type is given in the previous OBJCLOSE_NAME event. + ******************************************************************************/ +#define EVENTGROUP_OBJCLOSE_PROP_TRCSUCCESS (EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + 8UL) /*0x10*/ + +/******************************************************************************* + * EVENTGROUP_CREATE + * + * The events in this group are used to log Kernel object creations. + * The lower three bits in the event code gives the object class, i.e., type of + * create operation (task, queue, semaphore, etc). + ******************************************************************************/ +#define EVENTGROUP_CREATE_OBJ_TRCSUCCESS (EVENTGROUP_OBJCLOSE_PROP_TRCSUCCESS + 8UL) /*0x18*/ + +/******************************************************************************* + * EVENTGROUP_SEND + * + * The events in this group are used to log Send/Give events on queues, + * semaphores and mutexes The lower three bits in the event code gives the + * object class, i.e., what type of object that is operated on (queue, semaphore + * or mutex). + ******************************************************************************/ +#define EVENTGROUP_SEND_TRCSUCCESS (EVENTGROUP_CREATE_OBJ_TRCSUCCESS + 8UL) /*0x20*/ + +/******************************************************************************* + * EVENTGROUP_RECEIVE + * + * The events in this group are used to log Receive/Take events on queues, + * semaphores and mutexes. The lower three bits in the event code gives the + * object class, i.e., what type of object that is operated on (queue, semaphore + * or mutex). + ******************************************************************************/ +#define EVENTGROUP_RECEIVE_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 8UL) /*0x28*/ + +/* Send/Give operations, from ISR */ +#define EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS \ + (EVENTGROUP_RECEIVE_TRCSUCCESS + 8UL) /*0x30*/ + +/* Receive/Take operations, from ISR */ +#define EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS \ + (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 8UL) /*0x38*/ + +/* "Failed" event type versions of above (timeout, failed allocation, etc) */ +#define EVENTGROUP_KSE_TRCFAILED \ + (EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS + 8UL) /*0x40*/ + +/* Failed create calls - memory allocation failed */ +#define EVENTGROUP_CREATE_OBJ_TRCFAILED (EVENTGROUP_KSE_TRCFAILED) /*0x40*/ + +/* Failed send/give - timeout! */ +#define EVENTGROUP_SEND_TRCFAILED (EVENTGROUP_CREATE_OBJ_TRCFAILED + 8UL) /*0x48*/ + +/* Failed receive/take - timeout! */ +#define EVENTGROUP_RECEIVE_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 8UL) /*0x50*/ + +/* Failed non-blocking send/give - queue full */ +#define EVENTGROUP_SEND_FROM_ISR_TRCFAILED (EVENTGROUP_RECEIVE_TRCFAILED + 8UL) /*0x58*/ + +/* Failed non-blocking receive/take - queue empty */ +#define EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED \ + (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 8UL) /*0x60*/ + +/* Events when blocking on receive/take */ +#define EVENTGROUP_RECEIVE_TRCBLOCK \ + (EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED + 8UL) /*0x68*/ + +/* Events when blocking on send/give */ +#define EVENTGROUP_SEND_TRCBLOCK (EVENTGROUP_RECEIVE_TRCBLOCK + 8UL) /*0x70*/ + +/* Events on queue peek (receive) */ +#define EVENTGROUP_PEEK_TRCSUCCESS (EVENTGROUP_SEND_TRCBLOCK + 8UL) /*0x78*/ + +/* Events on object delete (vTaskDelete or vQueueDelete) */ +#define EVENTGROUP_DELETE_OBJ_TRCSUCCESS (EVENTGROUP_PEEK_TRCSUCCESS + 8UL) /*0x80*/ + +/* Other events - object class is implied: TASK */ +#define EVENTGROUP_OTHERS (EVENTGROUP_DELETE_OBJ_TRCSUCCESS + 8UL) /*0x88*/ +#define TASK_DELAY_UNTIL (EVENTGROUP_OTHERS + 0UL) /*0x88*/ +#define TASK_DELAY (EVENTGROUP_OTHERS + 1UL) /*0x89*/ +#define TASK_SUSPEND (EVENTGROUP_OTHERS + 2UL) /*0x8A*/ +#define TASK_RESUME (EVENTGROUP_OTHERS + 3UL) /*0x8B*/ +#define TASK_RESUME_FROM_ISR (EVENTGROUP_OTHERS + 4UL) /*0x8C*/ +#define TASK_PRIORITY_SET (EVENTGROUP_OTHERS + 5UL) /*0x8D*/ +#define TASK_PRIORITY_INHERIT (EVENTGROUP_OTHERS + 6UL) /*0x8E*/ +#define TASK_PRIORITY_DISINHERIT (EVENTGROUP_OTHERS + 7UL) /*0x8F*/ + +#define EVENTGROUP_MISC_PLACEHOLDER (EVENTGROUP_OTHERS + 8UL) /*0x90*/ +#define PEND_FUNC_CALL (EVENTGROUP_MISC_PLACEHOLDER+0UL) /*0x90*/ +#define PEND_FUNC_CALL_FROM_ISR (EVENTGROUP_MISC_PLACEHOLDER+1UL) /*0x91*/ +#define PEND_FUNC_CALL_TRCFAILED (EVENTGROUP_MISC_PLACEHOLDER+2UL) /*0x92*/ +#define PEND_FUNC_CALL_FROM_ISR_TRCFAILED (EVENTGROUP_MISC_PLACEHOLDER+3UL) /*0x93*/ +#define MEM_MALLOC_SIZE (EVENTGROUP_MISC_PLACEHOLDER+4UL) /*0x94*/ +#define MEM_MALLOC_ADDR (EVENTGROUP_MISC_PLACEHOLDER+5UL) /*0x95*/ +#define MEM_FREE_SIZE (EVENTGROUP_MISC_PLACEHOLDER+6UL) /*0x96*/ +#define MEM_FREE_ADDR (EVENTGROUP_MISC_PLACEHOLDER+7UL) /*0x97*/ + +/* User events */ +#define EVENTGROUP_USEREVENT (EVENTGROUP_MISC_PLACEHOLDER + 8UL) /*0x98*/ +#define USER_EVENT (EVENTGROUP_USEREVENT + 0UL) + +/* Allow for 0-15 arguments (the number of args is added to event code) */ +#define USER_EVENT_LAST (EVENTGROUP_USEREVENT + 15UL) /*0xA7*/ + +/******************************************************************************* + * XTS Event - eXtended TimeStamp events + * The timestamps used in the recorder are "differential timestamps" (DTS), i.e. + * the time since the last stored event. The DTS fields are either 1 or 2 bytes + * in the other events, depending on the bytes available in the event struct. + * If the time since the last event (the DTS) is larger than allowed for by + * the DTS field of the current event, an XTS event is inserted immediately + * before the original event. The XTS event contains up to 3 additional bytes + * of the DTS value - the higher bytes of the true DTS value. The lower 1-2 + * bytes are stored in the normal DTS field. + * There are two types of XTS events, XTS8 and XTS16. An XTS8 event is stored + * when there is only room for 1 byte (8 bit) DTS data in the original event, + * which means a limit of 0xFF (255UL). The XTS16 is used when the original event + * has a 16 bit DTS field and thereby can handle values up to 0xFFFF (65535UL). + * + * Using a very high frequency time base can result in many XTS events. + * Preferably, the time between two OS ticks should fit in 16 bits, i.e., + * at most 65535. If your time base has a higher frequency, you can define + * the TRACE + ******************************************************************************/ + +#define EVENTGROUP_SYS (EVENTGROUP_USEREVENT + 16UL) /*0xA8*/ +#define XTS8 (EVENTGROUP_SYS + 0UL) /*0xA8*/ +#define XTS16 (EVENTGROUP_SYS + 1UL) /*0xA9*/ +#define EVENT_BEING_WRITTEN (EVENTGROUP_SYS + 2UL) /*0xAA*/ +#define RESERVED_DUMMY_CODE (EVENTGROUP_SYS + 3UL) /*0xAB*/ +#define LOW_POWER_BEGIN (EVENTGROUP_SYS + 4UL) /*0xAC*/ +#define LOW_POWER_END (EVENTGROUP_SYS + 5UL) /*0xAD*/ +#define XID (EVENTGROUP_SYS + 6UL) /*0xAE*/ +#define XTS16L (EVENTGROUP_SYS + 7UL) /*0xAF*/ + +#define EVENTGROUP_TIMER (EVENTGROUP_SYS + 8UL) /*0xB0*/ +#define TIMER_CREATE (EVENTGROUP_TIMER + 0UL) /*0xB0*/ +#define TIMER_START (EVENTGROUP_TIMER + 1UL) /*0xB1*/ +#define TIMER_RST (EVENTGROUP_TIMER + 2UL) /*0xB2*/ +#define TIMER_STOP (EVENTGROUP_TIMER + 3UL) /*0xB3*/ +#define TIMER_CHANGE_PERIOD (EVENTGROUP_TIMER + 4UL) /*0xB4*/ +#define TIMER_DELETE_OBJ (EVENTGROUP_TIMER + 5UL) /*0xB5*/ +#define TIMER_START_FROM_ISR (EVENTGROUP_TIMER + 6UL) /*0xB6*/ +#define TIMER_RESET_FROM_ISR (EVENTGROUP_TIMER + 7UL) /*0xB7*/ +#define TIMER_STOP_FROM_ISR (EVENTGROUP_TIMER + 8UL) /*0xB8*/ + +#define TIMER_CREATE_TRCFAILED (EVENTGROUP_TIMER + 9UL) /*0xB9*/ +#define TIMER_START_TRCFAILED (EVENTGROUP_TIMER + 10UL) /*0xBA*/ +#define TIMER_RESET_TRCFAILED (EVENTGROUP_TIMER + 11UL) /*0xBB*/ +#define TIMER_STOP_TRCFAILED (EVENTGROUP_TIMER + 12UL) /*0xBC*/ +#define TIMER_CHANGE_PERIOD_TRCFAILED (EVENTGROUP_TIMER + 13UL) /*0xBD*/ +#define TIMER_DELETE_TRCFAILED (EVENTGROUP_TIMER + 14UL) /*0xBE*/ +#define TIMER_START_FROM_ISR_TRCFAILED (EVENTGROUP_TIMER + 15UL) /*0xBF*/ +#define TIMER_RESET_FROM_ISR_TRCFAILED (EVENTGROUP_TIMER + 16UL) /*0xC0*/ +#define TIMER_STOP_FROM_ISR_TRCFAILED (EVENTGROUP_TIMER + 17UL) /*0xC1*/ + +#define EVENTGROUP_EG (EVENTGROUP_TIMER + 18UL) /*0xC2*/ +#define EVENT_GROUP_CREATE (EVENTGROUP_EG + 0UL) /*0xC2*/ +#define EVENT_GROUP_CREATE_TRCFAILED (EVENTGROUP_EG + 1UL) /*0xC3*/ +#define EVENT_GROUP_SYNC_TRCBLOCK (EVENTGROUP_EG + 2UL) /*0xC4*/ +#define EVENT_GROUP_SYNC_END (EVENTGROUP_EG + 3UL) /*0xC5*/ +#define EVENT_GROUP_WAIT_BITS_TRCBLOCK (EVENTGROUP_EG + 4UL) /*0xC6*/ +#define EVENT_GROUP_WAIT_BITS_END (EVENTGROUP_EG + 5UL) /*0xC7*/ +#define EVENT_GROUP_CLEAR_BITS (EVENTGROUP_EG + 6UL) /*0xC8*/ +#define EVENT_GROUP_CLEAR_BITS_FROM_ISR (EVENTGROUP_EG + 7UL) /*0xC9*/ +#define EVENT_GROUP_SET_BITS (EVENTGROUP_EG + 8UL) /*0xCA*/ +#define EVENT_GROUP_DELETE_OBJ (EVENTGROUP_EG + 9UL) /*0xCB*/ +#define EVENT_GROUP_SYNC_END_TRCFAILED (EVENTGROUP_EG + 10UL) /*0xCC*/ +#define EVENT_GROUP_WAIT_BITS_END_TRCFAILED (EVENTGROUP_EG + 11UL) /*0xCD*/ +#define EVENT_GROUP_SET_BITS_FROM_ISR (EVENTGROUP_EG + 12UL) /*0xCE*/ +#define EVENT_GROUP_SET_BITS_FROM_ISR_TRCFAILED (EVENTGROUP_EG + 13UL) /*0xCF*/ + +#define TASK_INSTANCE_FINISHED_NEXT_KSE (EVENTGROUP_EG + 14UL) /*0xD0*/ +#define TASK_INSTANCE_FINISHED_DIRECT (EVENTGROUP_EG + 15UL) /*0xD1*/ + +#define TRACE_TASK_NOTIFY_GROUP (EVENTGROUP_EG + 16UL) /*0xD2*/ +#define TRACE_TASK_NOTIFY (TRACE_TASK_NOTIFY_GROUP + 0UL) /*0xD2*/ +#define TRACE_TASK_NOTIFY_TAKE (TRACE_TASK_NOTIFY_GROUP + 1UL) /*0xD3*/ +#define TRACE_TASK_NOTIFY_TAKE_TRCBLOCK (TRACE_TASK_NOTIFY_GROUP + 2UL) /*0xD4*/ +#define TRACE_TASK_NOTIFY_TAKE_TRCFAILED (TRACE_TASK_NOTIFY_GROUP + 3UL) /*0xD5*/ +#define TRACE_TASK_NOTIFY_WAIT (TRACE_TASK_NOTIFY_GROUP + 4UL) /*0xD6*/ +#define TRACE_TASK_NOTIFY_WAIT_TRCBLOCK (TRACE_TASK_NOTIFY_GROUP + 5UL) /*0xD7*/ +#define TRACE_TASK_NOTIFY_WAIT_TRCFAILED (TRACE_TASK_NOTIFY_GROUP + 6UL) /*0xD8*/ +#define TRACE_TASK_NOTIFY_FROM_ISR (TRACE_TASK_NOTIFY_GROUP + 7UL) /*0xD9*/ +#define TRACE_TASK_NOTIFY_GIVE_FROM_ISR (TRACE_TASK_NOTIFY_GROUP + 8UL) /*0xDA*/ + +#define TIMER_EXPIRED (TRACE_TASK_NOTIFY_GROUP + 9UL) /*0xDB*/ + + /* Events on queue peek (receive) */ +#define EVENTGROUP_PEEK_TRCBLOCK (TRACE_TASK_NOTIFY_GROUP + 10UL) /*0xDC*/ +/* peek block on queue: 0xDC */ +/* peek block on semaphore: 0xDD */ +/* peek block on mutex: 0xDE */ + +/* Events on queue peek (receive) */ +#define EVENTGROUP_PEEK_TRCFAILED (EVENTGROUP_PEEK_TRCBLOCK + 3UL) /*0xDF*/ +/* peek failed on queue: 0xDF */ +/* peek failed on semaphore: 0xE0 */ +/* peek failed on mutex: 0xE1 */ + +#define EVENTGROUP_STREAMBUFFER_DIV (EVENTGROUP_PEEK_TRCFAILED + 3UL) /*0xE2*/ +#define TRACE_STREAMBUFFER_RESET (EVENTGROUP_STREAMBUFFER_DIV + 0) /*0xE2*/ +#define TRACE_MESSAGEBUFFER_RESET (EVENTGROUP_STREAMBUFFER_DIV + 1UL) /*0xE3*/ +#define TRACE_STREAMBUFFER_OBJCLOSE_NAME_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 2UL) /*0xE4*/ +#define TRACE_MESSAGEBUFFER_OBJCLOSE_NAME_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 3UL) /*0xE5*/ +#define TRACE_STREAMBUFFER_OBJCLOSE_PROP_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 4UL) /*0xE6*/ +#define TRACE_MESSAGEBUFFER_OBJCLOSE_PROP_TRCSUCCESS (EVENTGROUP_STREAMBUFFER_DIV + 5UL) /*0xE7*/ + +#define EVENTGROUP_MALLOC_FAILED (EVENTGROUP_STREAMBUFFER_DIV + 6UL) /*0xE8*/ +#define MEM_MALLOC_SIZE_TRCFAILED (EVENTGROUP_MALLOC_FAILED + 0UL) /*0xE8*/ +#define MEM_MALLOC_ADDR_TRCFAILED (EVENTGROUP_MALLOC_FAILED + 1UL) /*0xE9*/ + +/* The following are using previously "lost" event codes */ +#define TRACE_STREAMBUFFER_CREATE_OBJ_TRCSUCCESS (EVENTGROUP_CREATE_OBJ_TRCSUCCESS + 4UL) /*0x1C*/ +#define TRACE_STREAMBUFFER_CREATE_OBJ_TRCFAILED (EVENTGROUP_CREATE_OBJ_TRCFAILED + 4UL) /*0x44*/ +#define TRACE_STREAMBUFFER_DELETE_OBJ_TRCSUCCESS (EVENTGROUP_DELETE_OBJ_TRCSUCCESS + 4UL) /*0x84*/ +#define TRACE_STREAMBUFFER_SEND_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 3UL) /*0x23*/ +#define TRACE_STREAMBUFFER_SEND_TRCBLOCK (EVENTGROUP_SEND_TRCBLOCK + 3UL) /*0x73*/ +#define TRACE_STREAMBUFFER_SEND_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 3UL) /*0x4B*/ +#define TRACE_STREAMBUFFER_RECEIVE_TRCSUCCESS (EVENTGROUP_RECEIVE_TRCSUCCESS + 3UL) /*0x2B*/ +#define TRACE_STREAMBUFFER_RECEIVE_TRCBLOCK (EVENTGROUP_RECEIVE_TRCBLOCK + 3UL) /*0x6B*/ +#define TRACE_STREAMBUFFER_RECEIVE_TRCFAILED (EVENTGROUP_RECEIVE_TRCFAILED + 3UL) /*0x53*/ +#define TRACE_STREAMBUFFER_SEND_FROM_ISR_TRCSUCCESS (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 3UL) /*0x33*/ +#define TRACE_STREAMBUFFER_SEND_FROM_ISR_TRCFAILED (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 3UL) /*0x5B*/ +#define TRACE_STREAMBUFFER_RECEIVE_FROM_ISR_TRCSUCCESS (EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS + 3UL) /*0x3B*/ +#define TRACE_STREAMBUFFER_RECEIVE_FROM_ISR_TRCFAILED (EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED + 3UL) /*0x63*/ + +/* The following are using previously "lost" event codes. These macros aren't even directly referenced, instead we do (equivalent STREAMBUFFER code) + 1. */ +#define TRACE_MESSAGEBUFFER_CREATE_OBJ_TRCSUCCESS (EVENTGROUP_CREATE_OBJ_TRCSUCCESS + 5UL) /*0x1D*/ +#define TRACE_MESSAGEBUFFER_CREATE_OBJ_TRCFAILED (EVENTGROUP_CREATE_OBJ_TRCFAILED + 5UL) /*0x45*/ +#define TRACE_MESSAGEBUFFER_DELETE_OBJ_TRCSUCCESS (EVENTGROUP_DELETE_OBJ_TRCSUCCESS + 5UL) /*0x85*/ +#define TRACE_MESSAGEBUFFER_SEND_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 4UL) /*0x24*/ +#define TRACE_MESSAGEBUFFER_SEND_TRCBLOCK (EVENTGROUP_SEND_TRCBLOCK + 4UL) /*0x74*/ +#define TRACE_MESSAGEBUFFER_SEND_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 4UL) /*0x4C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_TRCSUCCESS (EVENTGROUP_RECEIVE_TRCSUCCESS + 4UL) /*0x2C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_TRCBLOCK (EVENTGROUP_RECEIVE_TRCBLOCK + 4UL) /*0x6C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_TRCFAILED (EVENTGROUP_RECEIVE_TRCFAILED + 4UL) /*0x54*/ +#define TRACE_MESSAGEBUFFER_SEND_FROM_ISR_TRCSUCCESS (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 4UL) /*0x34*/ +#define TRACE_MESSAGEBUFFER_SEND_FROM_ISR_TRCFAILED (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 4UL) /*0x5C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_FROM_ISR_TRCSUCCESS (EVENTGROUP_RECEIVE_FROM_ISR_TRCSUCCESS + 4UL) /*0x3C*/ +#define TRACE_MESSAGEBUFFER_RECEIVE_FROM_ISR_TRCFAILED (EVENTGROUP_RECEIVE_FROM_ISR_TRCFAILED + 4UL) /*0x64*/ + +#define TRACE_QUEUE_SEND_TO_FRONT_TRCSUCCESS (EVENTGROUP_SEND_TRCSUCCESS + 5UL) /*0x25*/ +#define TRACE_QUEUE_SEND_TO_FRONT_TRCBLOCK (EVENTGROUP_SEND_TRCBLOCK + 5UL) /*0x75*/ +#define TRACE_QUEUE_SEND_TO_FRONT_TRCFAILED (EVENTGROUP_SEND_TRCFAILED + 5UL) /*0x4D*/ +#define TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCSUCCESS (EVENTGROUP_SEND_FROM_ISR_TRCSUCCESS + 5UL) /*0x35*/ +#define TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCFAILED (EVENTGROUP_SEND_FROM_ISR_TRCFAILED + 5UL) /*0x5D*/ + +#define TRACE_UNUSED_STACK (EVENTGROUP_MALLOC_FAILED + 2UL) /*0xEA*/ + +/* LAST EVENT (0xEA) */ + +/**************************** +* MACROS TO GET TRACE CLASS * +****************************/ +#define TRACE_GET_TRACE_CLASS_FROM_TASK_CLASS(kernelClass) (TRACE_CLASS_TASK) +#define TRACE_GET_TRACE_CLASS_FROM_TASK_OBJECT(pxObject) (TRACE_CLASS_TASK) + +#define TRACE_GET_TRACE_CLASS_FROM_QUEUE_CLASS(kernelClass) TraceQueueClassTable[kernelClass] +#define TRACE_GET_TRACE_CLASS_FROM_QUEUE_OBJECT(pxObject) TRACE_GET_TRACE_CLASS_FROM_QUEUE_CLASS(prvTraceGetQueueType(pxObject)) + +#define TRACE_GET_TRACE_CLASS_FROM_TIMER_CLASS(kernelClass) (TRACE_CLASS_TIMER) +#define TRACE_GET_TRACE_CLASS_FROM_TIMER_OBJECT(pxObject) (TRACE_CLASS_TIMER) + +#define TRACE_GET_TRACE_CLASS_FROM_EVENTGROUP_CLASS(kernelClass) (TRACE_CLASS_EVENTGROUP) +#define TRACE_GET_TRACE_CLASS_FROM_EVENTGROUP_OBJECT(pxObject) (TRACE_CLASS_EVENTGROUP) + +/* TRACE_GET_TRACE_CLASS_FROM_STREAMBUFFER_CLASS can only be accessed with a parameter indicating if it is a MessageBuffer */ +#define TRACE_GET_TRACE_CLASS_FROM_STREAMBUFFER_CLASS(xIsMessageBuffer) (xIsMessageBuffer == 1 ? TRACE_CLASS_MESSAGEBUFFER : TRACE_CLASS_STREAMBUFFER) +#define TRACE_GET_TRACE_CLASS_FROM_STREAMBUFFER_OBJECT(pxObject) (prvGetStreamBufferType(pxObject) == 1 ? TRACE_CLASS_MESSAGEBUFFER : TRACE_CLASS_STREAMBUFFER) + +/* Generic versions */ +#define TRACE_GET_CLASS_TRACE_CLASS(CLASS, kernelClass) TRACE_GET_TRACE_CLASS_FROM_##CLASS##_CLASS(kernelClass) +#define TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject) TRACE_GET_TRACE_CLASS_FROM_##CLASS##_OBJECT(pxObject) + +/****************************** +* MACROS TO GET OBJECT NUMBER * +******************************/ +#define TRACE_GET_TASK_NUMBER(pxTCB) (traceHandle)(prvTraceGetTaskNumberLow16(pxTCB)) +#define TRACE_SET_TASK_NUMBER(pxTCB) prvTraceSetTaskNumberLow16(pxTCB, prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(TASK, pxTCB))); + +#define TRACE_GET_QUEUE_NUMBER(queue) ( ( traceHandle ) prvTraceGetQueueNumberLow16(queue) ) +#define TRACE_SET_QUEUE_NUMBER(queue) prvTraceSetQueueNumberLow16(queue, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, queue))); + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define TRACE_GET_TIMER_NUMBER(tmr) ( ( traceHandle ) prvTraceGetTimerNumberLow16(tmr) ) +#define TRACE_SET_TIMER_NUMBER(tmr) prvTraceSetTimerNumberLow16(tmr, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr))); +#else /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ +#define TRACE_GET_TIMER_NUMBER(tmr) ( ( traceHandle ) ((Timer_t*)tmr)->uxTimerNumber ) +#define TRACE_SET_TIMER_NUMBER(tmr) ((Timer_t*)tmr)->uxTimerNumber = prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr)); +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) +#define TRACE_GET_EVENTGROUP_NUMBER(eg) ( ( traceHandle ) prvTraceGetEventGroupNumberLow16(eg) ) +#define TRACE_SET_EVENTGROUP_NUMBER(eg) prvTraceSetEventGroupNumberLow16(eg, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg))); +#else /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ +#define TRACE_GET_EVENTGROUP_NUMBER(eg) ( ( traceHandle ) uxEventGroupGetNumber(eg) ) +#define TRACE_SET_EVENTGROUP_NUMBER(eg) ((EventGroup_t*)eg)->uxEventGroupNumber = prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg)); +#endif /* (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_0_0) */ + + +#define TRACE_GET_STREAMBUFFER_NUMBER(sb) ( ( traceHandle ) prvTraceGetStreamBufferNumberLow16(sb) ) +#define TRACE_SET_STREAMBUFFER_NUMBER(sb) prvTraceSetStreamBufferNumberLow16(sb, (uint16_t)prvTraceGetObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(STREAMBUFFER, sb))); + +/* Generic versions */ +#define TRACE_GET_OBJECT_NUMBER(CLASS, pxObject) TRACE_GET_##CLASS##_NUMBER(pxObject) +#define TRACE_SET_OBJECT_NUMBER(CLASS, pxObject) TRACE_SET_##CLASS##_NUMBER(pxObject) + +/****************************** +* MACROS TO GET EVENT CODES * +******************************/ +#define TRACE_GET_TASK_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_GET_CLASS_TRACE_CLASS(TASK, kernelClass)) +#define TRACE_GET_QUEUE_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_GET_CLASS_TRACE_CLASS(QUEUE, kernelClass)) +#define TRACE_GET_TIMER_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) -- THIS IS NOT USED -- +#define TRACE_GET_EVENTGROUP_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) -- THIS IS NOT USED -- +#define TRACE_GET_STREAMBUFFER_CLASS_EVENT_CODE(SERVICE, RESULT, isMessageBuffer) (uint8_t)(TRACE_STREAMBUFFER_##SERVICE##_##RESULT + (uint8_t)isMessageBuffer) + +#define TRACE_GET_TASK_OBJECT_EVENT_CODE(SERVICE, RESULT, pxTCB) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_CLASS_TASK) +#define TRACE_GET_QUEUE_OBJECT_EVENT_CODE(SERVICE, RESULT, pxObject) (uint8_t)(EVENTGROUP_##SERVICE##_##RESULT + TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxObject)) +#define TRACE_GET_TIMER_OBJECT_EVENT_CODE(SERVICE, RESULT, UNUSED) -- THIS IS NOT USED -- +#define TRACE_GET_EVENTGROUP_OBJECT_EVENT_CODE(SERVICE, RESULT, UNUSED) -- THIS IS NOT USED -- +#define TRACE_GET_STREAMBUFFER_OBJECT_EVENT_CODE(SERVICE, RESULT, pxObject) (uint8_t)(TRACE_STREAMBUFFER_##SERVICE##_##RESULT + prvGetStreamBufferType(pxObject)) + +/* Generic versions */ +#define TRACE_GET_CLASS_EVENT_CODE(SERVICE, RESULT, CLASS, kernelClass) TRACE_GET_##CLASS##_CLASS_EVENT_CODE(SERVICE, RESULT, kernelClass) +#define TRACE_GET_OBJECT_EVENT_CODE(SERVICE, RESULT, CLASS, pxObject) TRACE_GET_##CLASS##_OBJECT_EVENT_CODE(SERVICE, RESULT, pxObject) + +/****************************** +* SPECIAL MACROS FOR TASKS * +******************************/ +#define TRACE_GET_TASK_PRIORITY(pxTCB) ((uint8_t)pxTCB->uxPriority) +#define TRACE_GET_TASK_NAME(pxTCB) ((char*)pxTCB->pcTaskName) + +/*** The trace macros for snapshot mode **************************************/ + +/* A macro that will update the tick count when returning from tickless idle */ +#undef traceINCREASE_TICK_COUNT +#define traceINCREASE_TICK_COUNT( xCount ) + +/* Called for each task that becomes ready */ +#undef traceMOVED_TASK_TO_READY_STATE +#define traceMOVED_TASK_TO_READY_STATE( pxTCB ) \ + trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE(pxTCB); + +/* Called on each OS tick. Will call uiPortGetTimestamp to make sure it is called at least once every OS tick. */ +#undef traceTASK_INCREMENT_TICK + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_3_0) + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || xPendedTicks == 0) { trcKERNEL_HOOKS_INCREMENT_TICK(); } \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE) { trcKERNEL_HOOKS_NEW_TIME(DIV_NEW_TIME, xTickCount + 1); } + +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X) + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxPendedTicks == 0) { trcKERNEL_HOOKS_INCREMENT_TICK(); } \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE) { trcKERNEL_HOOKS_NEW_TIME(DIV_NEW_TIME, xTickCount + 1); } + +#else + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxMissedTicks == 0) { trcKERNEL_HOOKS_INCREMENT_TICK(); } \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE) { trcKERNEL_HOOKS_NEW_TIME(DIV_NEW_TIME, xTickCount + 1); } + +#endif + +extern volatile uint32_t uiTraceSystemState; + +/* Called on each task-switch */ +#undef traceTASK_SWITCHED_IN +#define traceTASK_SWITCHED_IN() \ + uiTraceSystemState = TRC_STATE_IN_TASKSWITCH; \ + trcKERNEL_HOOKS_TASK_SWITCH(TRACE_GET_CURRENT_TASK()); \ + uiTraceSystemState = TRC_STATE_IN_APPLICATION; + +/* Called on vTaskCreate */ +#undef traceTASK_CREATE +#define traceTASK_CREATE(pxNewTCB) \ + if (pxNewTCB != 0) \ + { \ + trcKERNEL_HOOKS_TASK_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, TASK, pxNewTCB), TASK, pxNewTCB); \ + prvAddTaskToStackMonitor(pxNewTCB); \ + } + +/* Called in vTaskCreate, if it fails (typically if the stack can not be allocated) */ +#undef traceTASK_CREATE_FAILED +#define traceTASK_CREATE_FAILED() \ + trcKERNEL_HOOKS_OBJECT_CREATE_FAILED(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, TASK, NOT_USED), TRACE_GET_CLASS_TRACE_CLASS(TASK, NOT_USED)) + +/* Called on vTaskDelete */ +#undef traceTASK_DELETE +#define traceTASK_DELETE( pxTaskToDelete ) \ + { TRACE_ALLOC_CRITICAL_SECTION(); \ + TRACE_ENTER_CRITICAL_SECTION(); \ + trcKERNEL_HOOKS_TASK_DELETE(TRACE_GET_OBJECT_EVENT_CODE(DELETE_OBJ, TRCSUCCESS, TASK, pxTaskToDelete), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_NAME, TRCSUCCESS, TASK, pxTaskToDelete), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_PROP, TRCSUCCESS, TASK, pxTaskToDelete), pxTaskToDelete); \ + prvRemoveTaskFromStackMonitor(pxTaskToDelete); \ + TRACE_EXIT_CRITICAL_SECTION(); } + +#if (TRC_CFG_SCHEDULING_ONLY == 0) + +#if defined(configUSE_TICKLESS_IDLE) && (configUSE_TICKLESS_IDLE != 0) + +#undef traceLOW_POWER_IDLE_BEGIN +#define traceLOW_POWER_IDLE_BEGIN() \ + { \ + extern uint32_t trace_disable_timestamp; \ + prvTraceStoreLowPower(0); \ + trace_disable_timestamp = 1; \ + } + +#undef traceLOW_POWER_IDLE_END +#define traceLOW_POWER_IDLE_END() \ + { \ + extern uint32_t trace_disable_timestamp; \ + trace_disable_timestamp = 0; \ + prvTraceStoreLowPower(1); \ + } + +#endif + +/* Called on vTaskSuspend */ +#undef traceTASK_SUSPEND +#define traceTASK_SUSPEND( pxTaskToSuspend ) \ + trcKERNEL_HOOKS_TASK_SUSPEND(TASK_SUSPEND, pxTaskToSuspend); + +/* Called from special case with timer only */ +#undef traceTASK_DELAY_SUSPEND +#define traceTASK_DELAY_SUSPEND( pxTaskToSuspend ) \ + trcKERNEL_HOOKS_TASK_SUSPEND(TASK_SUSPEND, pxTaskToSuspend); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +/* Called on vTaskDelay - note the use of FreeRTOS variable xTicksToDelay */ +#undef traceTASK_DELAY +#define traceTASK_DELAY() \ + trcKERNEL_HOOKS_TASK_DELAY(TASK_DELAY, pxCurrentTCB, xTicksToDelay); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +/* Called on vTaskDelayUntil - note the use of FreeRTOS variable xTimeToWake */ +#undef traceTASK_DELAY_UNTIL +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) + +#define traceTASK_DELAY_UNTIL(xTimeToWake) \ + trcKERNEL_HOOKS_TASK_DELAY(TASK_DELAY_UNTIL, pxCurrentTCB, xTimeToWake); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); +#else + +#define traceTASK_DELAY_UNTIL() \ + trcKERNEL_HOOKS_TASK_DELAY(TASK_DELAY_UNTIL, pxCurrentTCB, xTimeToWake); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +#endif + +/* Called in xQueueCreate, and thereby for all other object based on queues, such as semaphores. */ +#undef traceQUEUE_CREATE +#define traceQUEUE_CREATE( pxNewQueue ) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, QUEUE, pxNewQueue), QUEUE, pxNewQueue); + +/* Called in xQueueCreate, if the queue creation fails */ +#undef traceQUEUE_CREATE_FAILED +#define traceQUEUE_CREATE_FAILED( queueType ) \ + trcKERNEL_HOOKS_OBJECT_CREATE_FAILED(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, QUEUE, queueType), TRACE_GET_CLASS_TRACE_CLASS(QUEUE, queueType)) + +/* Called on vQueueDelete */ +#undef traceQUEUE_DELETE +#define traceQUEUE_DELETE( pxQueue ) \ + { TRACE_ALLOC_CRITICAL_SECTION(); \ + TRACE_ENTER_CRITICAL_SECTION(); \ + trcKERNEL_HOOKS_OBJECT_DELETE(TRACE_GET_OBJECT_EVENT_CODE(DELETE_OBJ, TRCSUCCESS, QUEUE, pxQueue), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_NAME, TRCSUCCESS, QUEUE, pxQueue), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_PROP, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + TRACE_EXIT_CRITICAL_SECTION(); } + +/* This macro is not necessary as of FreeRTOS v9.0.0 */ +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) + +/* Called in xQueueCreateMutex, and thereby also from xSemaphoreCreateMutex and xSemaphoreCreateRecursiveMutex */ +#undef traceCREATE_MUTEX +#define traceCREATE_MUTEX( pxNewQueue ) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, QUEUE, pxNewQueue), QUEUE, pxNewQueue); + +/* Called in xQueueCreateMutex when the operation fails (when memory allocation fails) */ +#undef traceCREATE_MUTEX_FAILED +#define traceCREATE_MUTEX_FAILED() \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, QUEUE, queueQUEUE_TYPE_MUTEX), 0); + +#endif + +/* Called when the Mutex can not be given, since not holder */ +#undef traceGIVE_MUTEX_RECURSIVE_FAILED +#define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCFAILED, QUEUE, pxMutex), QUEUE, pxMutex); + +/* Called when a message is sent to a queue */ /* CS IS NEW ! */ +#undef traceQUEUE_SEND +#define traceQUEUE_SEND( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCSUCCESS, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_TRCSUCCESS, QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) == TRACE_CLASS_MUTEX ? (uint8_t)0 : (uint8_t)(pxQueue->uxMessagesWaiting + 1)); + +/* Called when a message is sent to a queue set */ +#undef traceQUEUE_SET_SEND +#define traceQUEUE_SET_SEND( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, (uint8_t)(pxQueue->uxMessagesWaiting + 1)); + +/* Called when a message failed to be sent to a queue (timeout) */ +#undef traceQUEUE_SEND_FAILED +#define traceQUEUE_SEND_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCFAILED, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_TRCFAILED, QUEUE, pxQueue); + +/* Called when the task is blocked due to a send operation on a full queue */ +#undef traceBLOCKING_ON_QUEUE_SEND +#define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCBLOCK, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_TRCBLOCK, QUEUE, pxQueue); + +/* Called when a message is received from a queue */ +#undef traceQUEUE_RECEIVE +#define traceQUEUE_RECEIVE( pxQueue ) \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) == TRACE_CLASS_MUTEX ? (uint8_t)TRACE_GET_TASK_NUMBER(TRACE_GET_CURRENT_TASK()) : (uint8_t)(pxQueue->uxMessagesWaiting - 1)); + +/* Called when a receive operation on a queue fails (timeout) */ +#undef traceQUEUE_RECEIVE_FAILED +#define traceQUEUE_RECEIVE_FAILED( pxQueue ) \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); \ + } + +/* Called when the task is blocked due to a receive operation on an empty queue */ +#undef traceBLOCKING_ON_QUEUE_RECEIVE +#define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCBLOCK, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCBLOCK, QUEUE, pxQueue), QUEUE, pxQueue); \ + } \ + if (TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) != TRACE_CLASS_MUTEX) \ + { \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); \ + } + +/* Called on xQueuePeek */ +#undef traceQUEUE_PEEK +#define traceQUEUE_PEEK( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); + +/* Called on xQueuePeek fail/timeout (added in FreeRTOS v9.0.2) */ +#undef traceQUEUE_PEEK_FAILED +#define traceQUEUE_PEEK_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); + +/* Called on xQueuePeek blocking (added in FreeRTOS v9.0.2) */ +#undef traceBLOCKING_ON_QUEUE_PEEK +#define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(PEEK, TRCBLOCK, QUEUE, pxQueue), QUEUE, pxQueue); \ + if (TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, pxQueue) != TRACE_CLASS_MUTEX) \ + { \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); \ + } + +/* Called when a message is sent from interrupt context, e.g., using xQueueSendFromISR */ +#undef traceQUEUE_SEND_FROM_ISR +#define traceQUEUE_SEND_FROM_ISR( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCSUCCESS, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCSUCCESS, QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, (uint8_t)(pxQueue->uxMessagesWaiting + 1)); + +/* Called when a message send from interrupt context fails (since the queue was full) */ +#undef traceQUEUE_SEND_FROM_ISR_FAILED +#define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(xCopyPosition == queueSEND_TO_BACK ? (TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCFAILED, QUEUE, pxQueue)) : TRACE_QUEUE_SEND_TO_FRONT_FROM_ISR_TRCFAILED, QUEUE, pxQueue); + +/* Called when a message is received in interrupt context, e.g., using xQueueReceiveFromISR */ +#undef traceQUEUE_RECEIVE_FROM_ISR +#define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCSUCCESS, QUEUE, pxQueue), QUEUE, pxQueue); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(QUEUE, pxQueue, (uint8_t)(pxQueue->uxMessagesWaiting - 1)); + +/* Called when a message receive from interrupt context fails (since the queue was empty) */ +#undef traceQUEUE_RECEIVE_FROM_ISR_FAILED +#define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCFAILED, QUEUE, pxQueue), QUEUE, pxQueue); + +#undef traceQUEUE_REGISTRY_ADD +#define traceQUEUE_REGISTRY_ADD(object, name) prvTraceSetObjectName(TRACE_GET_OBJECT_TRACE_CLASS(QUEUE, object), TRACE_GET_OBJECT_NUMBER(QUEUE, object), name); + +/* Called in vTaskPrioritySet */ +#undef traceTASK_PRIORITY_SET +#define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) \ + trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(TASK_PRIORITY_SET, pxTask, uxNewPriority); + +/* Called in vTaskPriorityInherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_INHERIT +#define traceTASK_PRIORITY_INHERIT( pxTask, uxNewPriority ) \ + trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(TASK_PRIORITY_INHERIT, pxTask, uxNewPriority); + +/* Called in vTaskPriorityDisinherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_DISINHERIT +#define traceTASK_PRIORITY_DISINHERIT( pxTask, uxNewPriority ) \ + trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(TASK_PRIORITY_DISINHERIT, pxTask, uxNewPriority); + +/* Called in vTaskResume */ +#undef traceTASK_RESUME +#define traceTASK_RESUME( pxTaskToResume ) \ + trcKERNEL_HOOKS_TASK_RESUME(TASK_RESUME, pxTaskToResume); + +/* Called in vTaskResumeFromISR */ +#undef traceTASK_RESUME_FROM_ISR +#define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) \ + trcKERNEL_HOOKS_TASK_RESUME_FROM_ISR(TASK_RESUME_FROM_ISR, pxTaskToResume); + + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + +#if (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) + +extern void vTraceStoreMemMangEvent(uint32_t ecode, uint32_t address, int32_t size); + +/* MALLOC and FREE are always stored, no matter if they happen inside filtered task */ +#undef traceMALLOC +#define traceMALLOC( pvAddress, uiSize ) \ + if (pvAddress != 0) \ + { \ + vTraceStoreMemMangEvent(MEM_MALLOC_SIZE, ( uint32_t ) pvAddress, (int32_t)uiSize); \ + } \ + else \ + { \ + vTraceStoreMemMangEvent(MEM_MALLOC_SIZE_TRCFAILED, ( uint32_t ) pvAddress, (int32_t)uiSize); \ + } + +#undef traceFREE +#define traceFREE( pvAddress, uiSize ) \ + vTraceStoreMemMangEvent(MEM_FREE_SIZE, ( uint32_t ) pvAddress, -((int32_t)uiSize)); + +#endif + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1) + +/* Called in timer.c - xTimerCreate */ +#undef traceTIMER_CREATE +#define traceTIMER_CREATE(tmr) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TIMER_CREATE, TIMER, tmr); + +#undef traceTIMER_CREATE_FAILED +#define traceTIMER_CREATE_FAILED() \ + trcKERNEL_HOOKS_OBJECT_CREATE_FAILED(TIMER_CREATE_TRCFAILED, TRACE_GET_CLASS_TRACE_CLASS(TIMER, NOT_USED)) + +/* Note that xCommandID can never be tmrCOMMAND_EXECUTE_CALLBACK (-1) since the trace macro is not called in that case */ +#undef traceTIMER_COMMAND_SEND +#define traceTIMER_COMMAND_SEND(tmr, xCommandID, xOptionalValue, xReturn) \ + if (xCommandID > tmrCOMMAND_START_DONT_TRACE) \ + { \ + if (xCommandID == tmrCOMMAND_CHANGE_PERIOD) \ + { \ + if (xReturn == pdPASS) { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TIMER_CHANGE_PERIOD, TIMER, tmr, xOptionalValue); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TIMER_CHANGE_PERIOD_TRCFAILED, TIMER, tmr, xOptionalValue); \ + } \ + } \ + else if ((xCommandID == tmrCOMMAND_DELETE) && (xReturn == pdPASS)) \ + { \ + trcKERNEL_HOOKS_OBJECT_DELETE(TIMER_DELETE_OBJ, EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr), EVENTGROUP_OBJCLOSE_PROP_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(TIMER, tmr), TIMER, tmr); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENTGROUP_TIMER + (uint32_t)xCommandID + ((xReturn == pdPASS) ? 0 : (TIMER_CREATE_TRCFAILED - TIMER_CREATE)), TIMER, tmr, xOptionalValue); \ + }\ + } + +#undef traceTIMER_EXPIRED +#define traceTIMER_EXPIRED(tmr) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TIMER_EXPIRED, TIMER, tmr); + +#endif + +#if (TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS == 1) + +#undef tracePEND_FUNC_CALL +#define tracePEND_FUNC_CALL(func, arg1, arg2, ret) \ + if (ret == pdPASS){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE(PEND_FUNC_CALL, TASK, xTimerGetTimerDaemonTaskHandle() ); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE(PEND_FUNC_CALL_TRCFAILED, TASK, xTimerGetTimerDaemonTaskHandle() ); \ + } + +#undef tracePEND_FUNC_CALL_FROM_ISR +#define tracePEND_FUNC_CALL_FROM_ISR(func, arg1, arg2, ret) \ + if (! uiInEventGroupSetBitsFromISR) \ + prvTraceStoreKernelCall(PEND_FUNC_CALL_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTimerGetTimerDaemonTaskHandle()) ); \ + uiInEventGroupSetBitsFromISR = 0; + +#endif + +#endif + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) + +#undef traceEVENT_GROUP_CREATE +#define traceEVENT_GROUP_CREATE(eg) \ + trcKERNEL_HOOKS_OBJECT_CREATE(EVENT_GROUP_CREATE, EVENTGROUP, eg) + +#undef traceEVENT_GROUP_CREATE_FAILED +#define traceEVENT_GROUP_CREATE_FAILED() \ + trcKERNEL_HOOKS_OBJECT_CREATE_FAILED(EVENT_GROUP_CREATE_TRCFAILED, TRACE_GET_CLASS_TRACE_CLASS(EVENTGROUP, NOT_USED)) + +#undef traceEVENT_GROUP_DELETE +#define traceEVENT_GROUP_DELETE(eg) \ + { TRACE_ALLOC_CRITICAL_SECTION(); \ + TRACE_ENTER_CRITICAL_SECTION(); \ + trcKERNEL_HOOKS_OBJECT_DELETE(EVENT_GROUP_DELETE_OBJ, EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg), EVENTGROUP_OBJCLOSE_NAME_TRCSUCCESS + TRACE_GET_OBJECT_TRACE_CLASS(EVENTGROUP, eg), EVENTGROUP, eg); \ + TRACE_EXIT_CRITICAL_SECTION(); } + +#undef traceEVENT_GROUP_SYNC_BLOCK +#define traceEVENT_GROUP_SYNC_BLOCK(eg, bitsToSet, bitsToWaitFor) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SYNC_TRCBLOCK, EVENTGROUP, eg, bitsToWaitFor); + +#undef traceEVENT_GROUP_SYNC_END +#define traceEVENT_GROUP_SYNC_END(eg, bitsToSet, bitsToWaitFor, wasTimeout) \ + if (wasTimeout) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SYNC_END_TRCFAILED, EVENTGROUP, eg, bitsToWaitFor); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SYNC_END, EVENTGROUP, eg, bitsToWaitFor); \ + } + +#undef traceEVENT_GROUP_WAIT_BITS_BLOCK +#define traceEVENT_GROUP_WAIT_BITS_BLOCK(eg, bitsToWaitFor) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_WAIT_BITS_TRCBLOCK, EVENTGROUP, eg, bitsToWaitFor); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +#undef traceEVENT_GROUP_WAIT_BITS_END +#define traceEVENT_GROUP_WAIT_BITS_END(eg, bitsToWaitFor, wasTimeout) \ + if (wasTimeout) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_WAIT_BITS_END_TRCFAILED, EVENTGROUP, eg, bitsToWaitFor); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_WAIT_BITS_END, EVENTGROUP, eg, bitsToWaitFor); \ + } + +#undef traceEVENT_GROUP_CLEAR_BITS +#define traceEVENT_GROUP_CLEAR_BITS(eg, bitsToClear) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_CLEAR_BITS, EVENTGROUP, eg, bitsToClear); + +#undef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR +#define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR(eg, bitsToClear) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR(EVENT_GROUP_CLEAR_BITS_FROM_ISR, EVENTGROUP, eg, bitsToClear); + +#undef traceEVENT_GROUP_SET_BITS +#define traceEVENT_GROUP_SET_BITS(eg, bitsToSet) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(EVENT_GROUP_SET_BITS, EVENTGROUP, eg, bitsToSet); + +#undef traceEVENT_GROUP_SET_BITS_FROM_ISR +#define traceEVENT_GROUP_SET_BITS_FROM_ISR(eg, bitsToSet) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR(EVENT_GROUP_SET_BITS_FROM_ISR, EVENTGROUP, eg, bitsToSet); \ + uiInEventGroupSetBitsFromISR = 1; + +#endif + +#undef traceTASK_NOTIFY_TAKE +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) + +#define traceTASK_NOTIFY_TAKE() \ + if (pxCurrentTCB->eNotifyState == eNotified){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE, TASK, pxCurrentTCB, xTicksToWait); \ + } \ + else{ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCFAILED, TASK, pxCurrentTCB, xTicksToWait); \ + } + +#elif (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_TAKE() \ + if (pxCurrentTCB->ucNotifyState == taskNOTIFICATION_RECEIVED){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE, TASK, pxCurrentTCB, xTicksToWait); \ + }else{ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCFAILED, TASK, pxCurrentTCB, xTicksToWait);} + +#else + +#define traceTASK_NOTIFY_TAKE(index) \ + if (pxCurrentTCB->ucNotifyState[index] == taskNOTIFICATION_RECEIVED){ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE, TASK, pxCurrentTCB, xTicksToWait); \ + }else{ \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCFAILED, TASK, pxCurrentTCB, xTicksToWait);} + +#endif + +#undef traceTASK_NOTIFY_TAKE_BLOCK +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_TAKE_BLOCK() \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCBLOCK, TASK, pxCurrentTCB, xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +#else + +#define traceTASK_NOTIFY_TAKE_BLOCK(index) \ + trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(TRACE_TASK_NOTIFY_TAKE_TRCBLOCK, TASK, pxCurrentTCB, xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +#endif + +#undef traceTASK_NOTIFY_WAIT +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) + +#define traceTASK_NOTIFY_WAIT() \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + { \ + if (pxCurrentTCB->eNotifyState == eNotified) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + else \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCFAILED, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + } + +#elif (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_WAIT() \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + { \ + if (pxCurrentTCB->ucNotifyState == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + else \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCFAILED, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + } + +#else + +#define traceTASK_NOTIFY_WAIT(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + { \ + if (pxCurrentTCB->ucNotifyState[index] == taskNOTIFICATION_RECEIVED) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + else \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCFAILED, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + } + +#endif + +#undef traceTASK_NOTIFY_WAIT_BLOCK +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_WAIT_BLOCK() \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCBLOCK, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +#else + +#define traceTASK_NOTIFY_WAIT_BLOCK(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxCurrentTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(TRACE_TASK_NOTIFY_WAIT_TRCBLOCK, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxCurrentTCB), xTicksToWait); \ + trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED(); + +#endif + +#undef traceTASK_NOTIFY +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); + +#else + +#define traceTASK_NOTIFY(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); + +#endif + +#undef traceTASK_NOTIFY_FROM_ISR +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_FROM_ISR() \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); + +#else + +#define traceTASK_NOTIFY_FROM_ISR(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); + +#endif + +#undef traceTASK_NOTIFY_GIVE_FROM_ISR +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_GIVE_FROM_ISR() \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_GIVE_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); + +#else + +#define traceTASK_NOTIFY_GIVE_FROM_ISR(index) \ + if (TRACE_GET_OBJECT_FILTER(TASK, xTaskToNotify) & CurrentFilterMask) \ + prvTraceStoreKernelCall(TRACE_TASK_NOTIFY_GIVE_FROM_ISR, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(xTaskToNotify)); + +#endif + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) + +#undef traceSTREAM_BUFFER_CREATE +#define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) \ + trcKERNEL_HOOKS_OBJECT_CREATE(TRACE_GET_OBJECT_EVENT_CODE(CREATE_OBJ, TRCSUCCESS, STREAMBUFFER, pxStreamBuffer), STREAMBUFFER, pxStreamBuffer); + +#undef traceSTREAM_BUFFER_CREATE_FAILED +#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) \ + trcKERNEL_HOOKS_OBJECT_CREATE_FAILED(TRACE_GET_CLASS_EVENT_CODE(CREATE_OBJ, TRCFAILED, STREAMBUFFER, xIsMessageBuffer), TRACE_GET_CLASS_TRACE_CLASS(STREAMBUFFER, xIsMessageBuffer)) + +#undef traceSTREAM_BUFFER_CREATE_STATIC_FAILED +#define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) \ + traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) + +#undef traceSTREAM_BUFFER_DELETE +#define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) \ + trcKERNEL_HOOKS_OBJECT_DELETE(TRACE_GET_OBJECT_EVENT_CODE(DELETE_OBJ, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_NAME, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), TRACE_GET_OBJECT_EVENT_CODE(OBJCLOSE_PROP, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_RESET +#define traceSTREAM_BUFFER_RESET( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(prvGetStreamBufferType(xStreamBuffer) > 0 ? TRACE_MESSAGEBUFFER_RESET : TRACE_STREAMBUFFER_RESET, STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, 0); + +#undef traceSTREAM_BUFFER_SEND +#define traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); + +#undef traceBLOCKING_ON_STREAM_BUFFER_SEND +#define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCBLOCK, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_SEND_FAILED +#define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(SEND, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_RECEIVE +#define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); + + +#undef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE +#define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCBLOCK, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_RECEIVE_FAILED +#define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) \ + trcKERNEL_HOOKS_KERNEL_SERVICE(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); + +#undef traceSTREAM_BUFFER_SEND_FROM_ISR +#define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn ) \ + if( xReturn > ( size_t ) 0 ) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(SEND_FROM_ISR, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + } + +#undef traceSTREAM_BUFFER_RECEIVE_FROM_ISR +#define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) \ + if( xReceivedLength > ( size_t ) 0 ) \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCSUCCESS, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + trcKERNEL_HOOKS_SET_OBJECT_STATE(STREAMBUFFER, xStreamBuffer, prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(TRACE_GET_OBJECT_EVENT_CODE(RECEIVE_FROM_ISR, TRCFAILED, STREAMBUFFER, xStreamBuffer), STREAMBUFFER, xStreamBuffer); \ + } + +#endif + +#endif + +#endif + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +TraceHeapHandle_t xTraceKernelPortGetSystemHeapHandle(void); + +/*************************************************************************/ +/* KERNEL SPECIFIC OBJECT CONFIGURATION */ +/*************************************************************************/ + +/******************************************************************************* + * The event codes - should match the offline config file. + ******************************************************************************/ + +/*** Event codes for streaming - should match the Tracealyzer config file *****/ +#define PSF_EVENT_NULL_EVENT 0x00 + +#define PSF_EVENT_TRACE_START 0x01 +#define PSF_EVENT_TS_CONFIG 0x02 +#define PSF_EVENT_OBJ_NAME 0x03 +#define PSF_EVENT_TASK_PRIORITY 0x04 +#define PSF_EVENT_TASK_PRIO_INHERIT 0x05 +#define PSF_EVENT_TASK_PRIO_DISINHERIT 0x06 +#define PSF_EVENT_DEFINE_ISR 0x07 + +#define PSF_EVENT_TASK_CREATE 0x10 +#define PSF_EVENT_QUEUE_CREATE 0x11 +#define PSF_EVENT_SEMAPHORE_BINARY_CREATE 0x12 +#define PSF_EVENT_MUTEX_CREATE 0x13 +#define PSF_EVENT_TIMER_CREATE 0x14 +#define PSF_EVENT_EVENTGROUP_CREATE 0x15 +#define PSF_EVENT_SEMAPHORE_COUNTING_CREATE 0x16 +#define PSF_EVENT_MUTEX_RECURSIVE_CREATE 0x17 +#define PSF_EVENT_STREAMBUFFER_CREATE 0x18 +#define PSF_EVENT_MESSAGEBUFFER_CREATE 0x19 + +#define PSF_EVENT_TASK_DELETE 0x20 +#define PSF_EVENT_QUEUE_DELETE 0x21 +#define PSF_EVENT_SEMAPHORE_DELETE 0x22 +#define PSF_EVENT_MUTEX_DELETE 0x23 +#define PSF_EVENT_TIMER_DELETE 0x24 +#define PSF_EVENT_EVENTGROUP_DELETE 0x25 +#define PSF_EVENT_STREAMBUFFER_DELETE 0x28 +#define PSF_EVENT_MESSAGEBUFFER_DELETE 0x29 + +#define PSF_EVENT_TASK_READY 0x30 +#define PSF_EVENT_NEW_TIME 0x31 +#define PSF_EVENT_NEW_TIME_SCHEDULER_SUSPENDED 0x32 +#define PSF_EVENT_ISR_BEGIN 0x33 +#define PSF_EVENT_ISR_RESUME 0x34 +#define PSF_EVENT_TS_BEGIN 0x35 +#define PSF_EVENT_TS_RESUME 0x36 +#define PSF_EVENT_TASK_ACTIVATE 0x37 + +#define PSF_EVENT_MALLOC 0x38 +#define PSF_EVENT_FREE 0x39 + +#define PSF_EVENT_LOWPOWER_BEGIN 0x3A +#define PSF_EVENT_LOWPOWER_END 0x3B + +#define PSF_EVENT_IFE_NEXT 0x3C +#define PSF_EVENT_IFE_DIRECT 0x3D + +#define PSF_EVENT_TASK_CREATE_FAILED 0x40 +#define PSF_EVENT_QUEUE_CREATE_FAILED 0x41 +#define PSF_EVENT_SEMAPHORE_BINARY_CREATE_FAILED 0x42 +#define PSF_EVENT_MUTEX_CREATE_FAILED 0x43 +#define PSF_EVENT_TIMER_CREATE_FAILED 0x44 +#define PSF_EVENT_EVENTGROUP_CREATE_FAILED 0x45 +#define PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED 0x46 +#define PSF_EVENT_MUTEX_RECURSIVE_CREATE_FAILED 0x47 +#define PSF_EVENT_STREAMBUFFER_CREATE_FAILED 0x49 +#define PSF_EVENT_MESSAGEBUFFER_CREATE_FAILED 0x4A + +#define PSF_EVENT_TIMER_DELETE_FAILED 0x48 + +#define PSF_EVENT_QUEUE_SEND 0x50 +#define PSF_EVENT_SEMAPHORE_GIVE 0x51 +#define PSF_EVENT_MUTEX_GIVE 0x52 + +#define PSF_EVENT_QUEUE_SEND_FAILED 0x53 +#define PSF_EVENT_SEMAPHORE_GIVE_FAILED 0x54 +#define PSF_EVENT_MUTEX_GIVE_FAILED 0x55 + +#define PSF_EVENT_QUEUE_SEND_BLOCK 0x56 +#define PSF_EVENT_SEMAPHORE_GIVE_BLOCK 0x57 +#define PSF_EVENT_MUTEX_GIVE_BLOCK 0x58 + +#define PSF_EVENT_QUEUE_SEND_FROMISR 0x59 +#define PSF_EVENT_SEMAPHORE_GIVE_FROMISR 0x5A + +#define PSF_EVENT_QUEUE_SEND_FROMISR_FAILED 0x5C +#define PSF_EVENT_SEMAPHORE_GIVE_FROMISR_FAILED 0x5D + +#define PSF_EVENT_QUEUE_RECEIVE 0x60 +#define PSF_EVENT_SEMAPHORE_TAKE 0x61 +#define PSF_EVENT_MUTEX_TAKE 0x62 + +#define PSF_EVENT_QUEUE_RECEIVE_FAILED 0x63 +#define PSF_EVENT_SEMAPHORE_TAKE_FAILED 0x64 +#define PSF_EVENT_MUTEX_TAKE_FAILED 0x65 + +#define PSF_EVENT_QUEUE_RECEIVE_BLOCK 0x66 +#define PSF_EVENT_SEMAPHORE_TAKE_BLOCK 0x67 +#define PSF_EVENT_MUTEX_TAKE_BLOCK 0x68 + +#define PSF_EVENT_QUEUE_RECEIVE_FROMISR 0x69 +#define PSF_EVENT_SEMAPHORE_TAKE_FROMISR 0x6A + +#define PSF_EVENT_QUEUE_RECEIVE_FROMISR_FAILED 0x6C +#define PSF_EVENT_SEMAPHORE_TAKE_FROMISR_FAILED 0x6D + +#define PSF_EVENT_QUEUE_PEEK 0x70 +#define PSF_EVENT_SEMAPHORE_PEEK 0x71 +#define PSF_EVENT_MUTEX_PEEK 0x72 + +#define PSF_EVENT_QUEUE_PEEK_FAILED 0x73 +#define PSF_EVENT_SEMAPHORE_PEEK_FAILED 0x74 +#define PSF_EVENT_MUTEX_PEEK_FAILED 0x75 + +#define PSF_EVENT_QUEUE_PEEK_BLOCK 0x76 +#define PSF_EVENT_SEMAPHORE_PEEK_BLOCK 0x77 +#define PSF_EVENT_MUTEX_PEEK_BLOCK 0x78 + +#define PSF_EVENT_TASK_DELAY_UNTIL 0x79 +#define PSF_EVENT_TASK_DELAY 0x7A +#define PSF_EVENT_TASK_SUSPEND 0x7B +#define PSF_EVENT_TASK_RESUME 0x7C +#define PSF_EVENT_TASK_RESUME_FROMISR 0x7D + +#define PSF_EVENT_TIMER_PENDFUNCCALL 0x80 +#define PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR 0x81 +#define PSF_EVENT_TIMER_PENDFUNCCALL_FAILED 0x82 +#define PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR_FAILED 0x83 + +#define PSF_EVENT_USER_EVENT 0x90 + +#define PSF_EVENT_TIMER_START 0xA0 +#define PSF_EVENT_TIMER_RESET 0xA1 +#define PSF_EVENT_TIMER_STOP 0xA2 +#define PSF_EVENT_TIMER_CHANGEPERIOD 0xA3 +#define PSF_EVENT_TIMER_START_FROMISR 0xA4 +#define PSF_EVENT_TIMER_RESET_FROMISR 0xA5 +#define PSF_EVENT_TIMER_STOP_FROMISR 0xA6 +#define PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR 0xA7 +#define PSF_EVENT_TIMER_START_FAILED 0xA8 +#define PSF_EVENT_TIMER_RESET_FAILED 0xA9 +#define PSF_EVENT_TIMER_STOP_FAILED 0xAA +#define PSF_EVENT_TIMER_CHANGEPERIOD_FAILED 0xAB +#define PSF_EVENT_TIMER_START_FROMISR_FAILED 0xAC +#define PSF_EVENT_TIMER_RESET_FROMISR_FAILED 0xAD +#define PSF_EVENT_TIMER_STOP_FROMISR_FAILED 0xAE +#define PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR_FAILED 0xAF + +#define PSF_EVENT_EVENTGROUP_SYNC 0xB0 +#define PSF_EVENT_EVENTGROUP_WAITBITS 0xB1 +#define PSF_EVENT_EVENTGROUP_CLEARBITS 0xB2 +#define PSF_EVENT_EVENTGROUP_CLEARBITS_FROMISR 0xB3 +#define PSF_EVENT_EVENTGROUP_SETBITS 0xB4 +#define PSF_EVENT_EVENTGROUP_SETBITS_FROMISR 0xB5 +#define PSF_EVENT_EVENTGROUP_SYNC_BLOCK 0xB6 +#define PSF_EVENT_EVENTGROUP_WAITBITS_BLOCK 0xB7 +#define PSF_EVENT_EVENTGROUP_SYNC_FAILED 0xB8 +#define PSF_EVENT_EVENTGROUP_WAITBITS_FAILED 0xB9 + +#define PSF_EVENT_QUEUE_SEND_FRONT 0xC0 +#define PSF_EVENT_QUEUE_SEND_FRONT_FAILED 0xC1 +#define PSF_EVENT_QUEUE_SEND_FRONT_BLOCK 0xC2 +#define PSF_EVENT_QUEUE_SEND_FRONT_FROMISR 0xC3 +#define PSF_EVENT_QUEUE_SEND_FRONT_FROMISR_FAILED 0xC4 +#define PSF_EVENT_MUTEX_GIVE_RECURSIVE 0xC5 +#define PSF_EVENT_MUTEX_GIVE_RECURSIVE_FAILED 0xC6 +#define PSF_EVENT_MUTEX_TAKE_RECURSIVE 0xC7 +#define PSF_EVENT_MUTEX_TAKE_RECURSIVE_FAILED 0xC8 + +#define PSF_EVENT_TASK_NOTIFY 0xC9 +#define PSF_EVENT_TASK_NOTIFY_WAIT 0xCA +#define PSF_EVENT_TASK_NOTIFY_WAIT_BLOCK 0xCB +#define PSF_EVENT_TASK_NOTIFY_WAIT_FAILED 0xCC +#define PSF_EVENT_TASK_NOTIFY_FROM_ISR 0xCD + +#define PSF_EVENT_TIMER_EXPIRED 0xD2 + +#define PSF_EVENT_STREAMBUFFER_SEND 0xD3 +#define PSF_EVENT_STREAMBUFFER_SEND_BLOCK 0xD4 +#define PSF_EVENT_STREAMBUFFER_SEND_FAILED 0xD5 +#define PSF_EVENT_STREAMBUFFER_RECEIVE 0xD6 +#define PSF_EVENT_STREAMBUFFER_RECEIVE_BLOCK 0xD7 +#define PSF_EVENT_STREAMBUFFER_RECEIVE_FAILED 0xD8 +#define PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR 0xD9 +#define PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR_FAILED 0xDA +#define PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR 0xDB +#define PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR_FAILED 0xDC +#define PSF_EVENT_STREAMBUFFER_RESET 0xDD + +#define PSF_EVENT_MESSAGEBUFFER_SEND 0xDE +#define PSF_EVENT_MESSAGEBUFFER_SEND_BLOCK 0xDF +#define PSF_EVENT_MESSAGEBUFFER_SEND_FAILED 0xE0 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE 0xE1 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_BLOCK 0xE2 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_FAILED 0xE3 +#define PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR 0xE4 +#define PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR_FAILED 0xE5 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR 0xE6 +#define PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR_FAILED 0xE7 +#define PSF_EVENT_MESSAGEBUFFER_RESET 0xE8 + +#define PSF_EVENT_MALLOC_FAILED 0xE9 +#define PSF_EVENT_FREE_FAILED 0xEA + +#define PSF_EVENT_UNUSED_STACK 0xEB + +#define PSF_EVENT_STATEMACHINE_STATE_CREATE 0xEC +#define PSF_EVENT_STATEMACHINE_CREATE 0xED +#define PSF_EVENT_STATEMACHINE_STATECHANGE 0xEE + +#define PSF_EVENT_INTERVAL_CHANNEL_CREATE 0xEF +#define PSF_EVENT_INTERVAL_START 0xF0 + +#define PSF_EVENT_EXTENSION_CREATE 0xF1 + +#define PSF_EVENT_HEAP_CREATE 0xF2 + +#define PSF_EVENT_COUNTER_CREATE 0xF3 +#define PSF_EVENT_COUNTER_CHANGE 0xF4 +#define PSF_EVENT_COUNTER_LIMIT_EXCEEDED 0xF5 + +#define PSF_EVENT_MUTEX_TAKE_RECURSIVE_BLOCK 0xF6 + +#define PSF_EVENT_INTERVAL_STOP 0xF7 +#define PSF_EVENT_INTERVAL_CHANNEL_SET_CREATE 0xF8 + +#define TRC_EVENT_LAST_ID PSF_EVENT_INTERVAL_CHANNEL_SET_CREATE + +/*** The trace macros for streaming ******************************************/ + +/* A macro that will update the tick count when returning from tickless idle */ +#undef traceINCREASE_TICK_COUNT +/* Note: This can handle time adjustments of max 2^32 ticks, i.e., 35 seconds at 120 MHz. Thus, tick-less idle periods longer than 2^32 ticks will appear "compressed" on the time line.*/ +#define traceINCREASE_TICK_COUNT( xCount ) { uint32_t uiTraceTickCount; xTraceTimestampGetOsTickCount(&uiTraceTickCount); xTraceTimestampSetOsTickCount(uiTraceTickCount + (xCount)); } + +#if (TRC_CFG_INCLUDE_OSTICK_EVENTS == 1) + +#define OS_TICK_EVENT(uxSchedulerSuspended, xTickCount) if ((uxSchedulerSuspended) == (unsigned portBASE_TYPE) pdFALSE) { prvTraceStoreEvent_Param(PSF_EVENT_NEW_TIME, (uint32_t)(xTickCount)); } + +#else + +#define OS_TICK_EVENT(uxSchedulerSuspended, xTickCount) + +#endif + +/* Called on each OS tick. Will call uiPortGetTimestamp to make sure it is called at least once every OS tick. */ +#undef traceTASK_INCREMENT_TICK +#if TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_3_0 + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || xPendedTicks == 0) { xTraceTimestampSetOsTickCount((xTickCount) + 1); } \ + OS_TICK_EVENT(uxSchedulerSuspended, (xTickCount) + 1) + +#elif TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxPendedTicks == 0) { xTraceTimestampSetOsTickCount(xTickCount + 1); } \ + OS_TICK_EVENT(uxSchedulerSuspended, xTickCount + 1) + +#else + +#define traceTASK_INCREMENT_TICK( xTickCount ) \ + if (uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdTRUE || uxMissedTicks == 0) { xTraceTimestampSetOsTickCount(xTickCount + 1); } \ + OS_TICK_EVENT(uxSchedulerSuspended, xTickCount + 1) + +#endif + +/* Called on each task-switch */ +#undef traceTASK_SWITCHED_IN +#define traceTASK_SWITCHED_IN() \ + xTraceTaskSwitch(pxCurrentTCB, pxCurrentTCB->uxPriority) + +/* Called for each task that becomes ready */ +#undef traceMOVED_TASK_TO_READY_STATE +#define traceMOVED_TASK_TO_READY_STATE( pxTCB ) \ + xTraceTaskReady(pxTCB) + +#undef traceTASK_CREATE +#if TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 + +#define traceTASK_CREATE(pxNewTCB) \ + if ((pxNewTCB) != 0) \ + { \ + xTraceTaskRegisterWithoutHandle((void*)(pxNewTCB), (pxNewTCB)->pcTaskName, (pxNewTCB)->uxPriority); \ + } + +#else + +#define traceTASK_CREATE(pxNewTCB) \ + if (pxNewTCB != 0) \ + { \ + xTraceTaskRegisterWithoutHandle((void*)pxNewTCB, (const char*)pcName, (uint32_t)uxPriority); \ + } + +#endif + +/* Called in vTaskCreate, if it fails (typically if the stack can not be allocated) */ +#undef traceTASK_CREATE_FAILED +#define traceTASK_CREATE_FAILED() \ + prvTraceStoreEvent_None(PSF_EVENT_TASK_CREATE_FAILED) + +/* Called on vTaskDelete */ +#undef traceTASK_DELETE // We don't allow for filtering out "delete" events. They are important and not very frequent. Moreover, we can't exclude create events, so this should be symmetrical. +#define traceTASK_DELETE( pxTaskToDelete ) \ + xTraceTaskUnregisterWithoutHandle(pxTaskToDelete, (pxTaskToDelete)->uxPriority) + +#if (TRC_CFG_SCHEDULING_ONLY == 0) + +#if (defined(configUSE_TICKLESS_IDLE) && configUSE_TICKLESS_IDLE != 0) + +#undef traceLOW_POWER_IDLE_BEGIN +#define traceLOW_POWER_IDLE_BEGIN() \ + prvTraceStoreEvent_Param(PSF_EVENT_LOWPOWER_BEGIN, xExpectedIdleTime) + +#undef traceLOW_POWER_IDLE_END +#define traceLOW_POWER_IDLE_END() \ + prvTraceStoreEvent_None(PSF_EVENT_LOWPOWER_END) + +#endif + +/* Called on vTaskSuspend */ +#undef traceTASK_SUSPEND +#define traceTASK_SUSPEND( pxTaskToSuspend ) \ + prvTraceStoreEvent_Handle(PSF_EVENT_TASK_SUSPEND, pxTaskToSuspend) + +/* Called on vTaskDelay - note the use of FreeRTOS variable xTicksToDelay */ +#undef traceTASK_DELAY +#define traceTASK_DELAY() \ + prvTraceStoreEvent_Param(PSF_EVENT_TASK_DELAY, xTicksToDelay) + +/* Called on vTaskDelayUntil - note the use of FreeRTOS variable xTimeToWake */ +#undef traceTASK_DELAY_UNTIL +#if TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0 + +#define traceTASK_DELAY_UNTIL(xTimeToWake) \ + prvTraceStoreEvent_Param(PSF_EVENT_TASK_DELAY_UNTIL, (xTimeToWake)) + +#else + +#define traceTASK_DELAY_UNTIL() \ + prvTraceStoreEvent_Param(PSF_EVENT_TASK_DELAY_UNTIL, xTimeToWake) + +#endif + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) + +#define traceQUEUE_CREATE_HELPER() \ + case queueQUEUE_TYPE_MUTEX: \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_MUTEX_CREATE, (void*)pxNewQueue, "", 0); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_MUTEX_RECURSIVE_CREATE, (void*)pxNewQueue, "", 0); \ + break; + +#else + +#define traceQUEUE_CREATE_HELPER() + +#endif + +/* Called in xQueueCreate, and thereby for all other object based on queues, such as semaphores. */ +#undef traceQUEUE_CREATE +#define traceQUEUE_CREATE( pxNewQueue )\ + switch ((pxNewQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_QUEUE_CREATE, (void*)(pxNewQueue), "", (uint32_t)uxQueueLength); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_SEMAPHORE_BINARY_CREATE, (void*)(pxNewQueue), "", 0); \ + break; \ + traceQUEUE_CREATE_HELPER() \ + } + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) + +#define traceQUEUE_CREATE_FAILED_HELPER() \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_MUTEX_CREATE_FAILED, 0, 0); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_MUTEX_RECURSIVE_CREATE_FAILED, 0, 0); \ + break; + +#else + +#define traceQUEUE_CREATE_FAILED_HELPER() + +#endif + +/* Called in xQueueCreate, if the queue creation fails */ +#undef traceQUEUE_CREATE_FAILED +#define traceQUEUE_CREATE_FAILED( queueType ) \ + switch (queueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_QUEUE_CREATE_FAILED, 0, uxQueueLength); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_BINARY_CREATE_FAILED, 0, 0); \ + break; \ + traceQUEUE_CREATE_FAILED_HELPER() \ + } + +#undef traceQUEUE_DELETE // We don't allow for filtering out "delete" events. They are important and not very frequent. Moreover, we can't exclude create events, so this should be symmetrical. +#define traceQUEUE_DELETE( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + xTraceObjectUnregisterWithoutHandle(PSF_EVENT_QUEUE_DELETE, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + xTraceObjectUnregisterWithoutHandle(PSF_EVENT_MUTEX_DELETE, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + xTraceObjectUnregisterWithoutHandle(PSF_EVENT_SEMAPHORE_DELETE, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + } + +/* Called in xQueueCreateCountingSemaphore, if the queue creation fails */ +#undef traceCREATE_COUNTING_SEMAPHORE +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + +#define traceCREATE_COUNTING_SEMAPHORE() \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (void*)xHandle, "", (uint32_t)uxMaxCount) + +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X) + +#define traceCREATE_COUNTING_SEMAPHORE() \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (void*)xHandle, "", uxInitialCount) + +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_4_X) + +#define traceCREATE_COUNTING_SEMAPHORE() \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (void*)xHandle, "", uxCountValue) + +#else + +#define traceCREATE_COUNTING_SEMAPHORE() \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_SEMAPHORE_COUNTING_CREATE, (void*)pxHandle, "", uxCountValue) + +#endif + +#undef traceCREATE_COUNTING_SEMAPHORE_FAILED +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxMaxCount) + +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_5_X) + +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxInitialCount) + +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_7_4_X) + +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxCountValue) + +#else + +#define traceCREATE_COUNTING_SEMAPHORE_FAILED() \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_COUNTING_CREATE_FAILED, 0, uxCountValue) + +#endif + + +/* This macro is not necessary as of FreeRTOS v9.0.0 */ +#if (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) + +/* Called in xQueueCreateMutex, and thereby also from xSemaphoreCreateMutex and xSemaphoreCreateRecursiveMutex */ +#undef traceCREATE_MUTEX +#define traceCREATE_MUTEX( pxNewQueue ) \ + switch (pxNewQueue->ucQueueType) \ + { \ + case queueQUEUE_TYPE_MUTEX: \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_MUTEX_CREATE, (void*)(pxNewQueue), "", 0); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_MUTEX_RECURSIVE_CREATE, (void*)(pxNewQueue), "", 0); \ + break; \ + } + +/* Called in xQueueCreateMutex when the operation fails (when memory allocation fails) */ +#undef traceCREATE_MUTEX_FAILED +#define traceCREATE_MUTEX_FAILED() \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_MUTEX_CREATE_FAILED, 0, 0) +#endif /* (TRC_CFG_FREERTOS_VERSION < TRC_FREERTOS_VERSION_9_0_0) */ + +/* Called when the Mutex can not be given, since not holder */ +#undef traceGIVE_MUTEX_RECURSIVE_FAILED +#define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) \ + prvTraceStoreEvent_Handle(PSF_EVENT_MUTEX_GIVE_RECURSIVE_FAILED, (void*)(pxMutex)) + +/* Called when a message is sent to a queue */ /* CS IS NEW ! */ +#undef traceQUEUE_SEND +#define traceQUEUE_SEND( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND : PSF_EVENT_QUEUE_SEND_FRONT, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting + 1); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_GIVE, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting + 1); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent_Handle(PSF_EVENT_MUTEX_GIVE, (void*)(pxQueue)); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_Handle(PSF_EVENT_MUTEX_GIVE_RECURSIVE, (void*)(pxQueue)); \ + break; \ + } + +#undef traceQUEUE_SET_SEND +#define traceQUEUE_SET_SEND( pxQueue ) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_QUEUE_SEND, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting + 1) + +/* Called when a message failed to be sent to a queue (timeout) */ +#undef traceQUEUE_SEND_FAILED +#define traceQUEUE_SEND_FAILED( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_FAILED : PSF_EVENT_QUEUE_SEND_FRONT_FAILED, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_GIVE_FAILED, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_Handle(PSF_EVENT_MUTEX_GIVE_FAILED, (void*)(pxQueue)); \ + break; \ + } + +/* Called when the task is blocked due to a send operation on a full queue */ +#undef traceBLOCKING_ON_QUEUE_SEND +#define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_BLOCK : PSF_EVENT_QUEUE_SEND_FRONT_BLOCK, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_GIVE_BLOCK, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_Handle(PSF_EVENT_MUTEX_GIVE_BLOCK, (void*)(pxQueue)); \ + break; \ + } + +/* Called when a message is sent from interrupt context, e.g., using xQueueSendFromISR */ +#undef traceQUEUE_SEND_FROM_ISR +#define traceQUEUE_SEND_FROM_ISR( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_FROMISR : PSF_EVENT_QUEUE_SEND_FRONT_FROMISR, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting + 1); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_GIVE_FROMISR, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting + 1); \ + break; \ + } + +/* Called when a message send from interrupt context fails (since the queue was full) */ +#undef traceQUEUE_SEND_FROM_ISR_FAILED +#define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(xCopyPosition == queueSEND_TO_BACK ? PSF_EVENT_QUEUE_SEND_FROMISR_FAILED : PSF_EVENT_QUEUE_SEND_FRONT_FROMISR_FAILED, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_GIVE_FROMISR_FAILED, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + } + +/* Called when a message is received from a queue */ +#undef traceQUEUE_RECEIVE +#define traceQUEUE_RECEIVE( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_QUEUE_PEEK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting - 1); \ + } \ + else\ + { \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_QUEUE_RECEIVE, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting - 1); \ + } \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + if (isQueueReceiveHookActuallyPeek) \ + { \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_SEMAPHORE_PEEK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting - 1); \ + } \ + else \ + { \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_SEMAPHORE_TAKE, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting - 1); \ + } \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent_HandleParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK : PSF_EVENT_MUTEX_TAKE, (void*)(pxQueue), xTicksToWait); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_HandleParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK : PSF_EVENT_MUTEX_TAKE_RECURSIVE, (void*)(pxQueue), xTicksToWait); \ + break; \ + } + +/* Called when a receive operation on a queue fails (timeout) */ +#undef traceQUEUE_RECEIVE_FAILED +#define traceQUEUE_RECEIVE_FAILED( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParamParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_QUEUE_PEEK_FAILED : PSF_EVENT_QUEUE_RECEIVE_FAILED, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParamParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_SEMAPHORE_PEEK_FAILED : PSF_EVENT_SEMAPHORE_TAKE_FAILED, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent_HandleParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK_FAILED : PSF_EVENT_MUTEX_TAKE_FAILED, (void*)(pxQueue), xTicksToWait); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_HandleParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK_FAILED : PSF_EVENT_MUTEX_TAKE_RECURSIVE_FAILED, (void*)(pxQueue), xTicksToWait); \ + break; \ + } + +/* Called when the task is blocked due to a receive operation on an empty queue */ +#undef traceBLOCKING_ON_QUEUE_RECEIVE +#define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParamParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_QUEUE_PEEK_BLOCK : PSF_EVENT_QUEUE_RECEIVE_BLOCK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParamParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_SEMAPHORE_PEEK_BLOCK : PSF_EVENT_SEMAPHORE_TAKE_BLOCK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + prvTraceStoreEvent_HandleParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK_BLOCK : PSF_EVENT_MUTEX_TAKE_BLOCK, (void*)(pxQueue), xTicksToWait); \ + break; \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_HandleParam(isQueueReceiveHookActuallyPeek ? PSF_EVENT_MUTEX_PEEK_BLOCK : PSF_EVENT_MUTEX_TAKE_RECURSIVE_BLOCK, (void*)(pxQueue), xTicksToWait); \ + break; \ + } + +#if (TRC_CFG_FREERTOS_VERSION > TRC_FREERTOS_VERSION_9_0_1) + +/* Called when a peek operation on a queue fails (timeout) */ +#undef traceQUEUE_PEEK_FAILED +#define traceQUEUE_PEEK_FAILED( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_QUEUE_PEEK_FAILED, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_SEMAPHORE_PEEK_FAILED, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_MUTEX_PEEK_FAILED, (void*)(pxQueue), xTicksToWait); \ + break; \ + } + +/* Called when the task is blocked due to a peek operation on an empty queue */ +#undef traceBLOCKING_ON_QUEUE_PEEK +#define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_QUEUE_PEEK_BLOCK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_SEMAPHORE_PEEK_BLOCK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_MUTEX_PEEK_BLOCK, (void*)(pxQueue), xTicksToWait); \ + break; \ + } + +#endif + +/* Called when a message is received in interrupt context, e.g., using xQueueReceiveFromISR */ +#undef traceQUEUE_RECEIVE_FROM_ISR +#define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_QUEUE_RECEIVE_FROMISR, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting - 1); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_TAKE_FROMISR, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting - 1); \ + break; \ + } + +/* Called when a message receive from interrupt context fails (since the queue was empty) */ +#undef traceQUEUE_RECEIVE_FROM_ISR_FAILED +#define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_QUEUE_RECEIVE_FROMISR_FAILED, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_SEMAPHORE_TAKE_FROMISR_FAILED, (void*)(pxQueue), (pxQueue)->uxMessagesWaiting); \ + break; \ + } + +/* Called on xQueuePeek */ +#undef traceQUEUE_PEEK +#define traceQUEUE_PEEK( pxQueue ) \ + switch ((pxQueue)->ucQueueType) \ + { \ + case queueQUEUE_TYPE_BASE: \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_QUEUE_PEEK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_BINARY_SEMAPHORE: \ + case queueQUEUE_TYPE_COUNTING_SEMAPHORE: \ + prvTraceStoreEvent_HandleParamParam(PSF_EVENT_SEMAPHORE_PEEK, (void*)(pxQueue), xTicksToWait, (pxQueue)->uxMessagesWaiting); \ + break; \ + case queueQUEUE_TYPE_MUTEX: \ + case queueQUEUE_TYPE_RECURSIVE_MUTEX: \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_MUTEX_PEEK, (void*)(pxQueue), xTicksToWait); \ + break; \ + } + +/* Called in vTaskPrioritySet */ +#undef traceTASK_PRIORITY_SET +#define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) \ + xTraceTaskSetPriorityWithoutHandle(pxTask, uxNewPriority) + +/* Called in vTaskPriorityInherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_INHERIT +#define traceTASK_PRIORITY_INHERIT( pxTask, uxNewPriority ) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_TASK_PRIO_INHERIT, (void*)(pxTask), uxNewPriority) + +/* Called in vTaskPriorityDisinherit, which is called by Mutex operations */ +#undef traceTASK_PRIORITY_DISINHERIT +#define traceTASK_PRIORITY_DISINHERIT( pxTask, uxNewPriority ) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_TASK_PRIO_DISINHERIT, (void*)(pxTask), uxNewPriority) + +/* Called in vTaskResume */ +#undef traceTASK_RESUME +#define traceTASK_RESUME( pxTaskToResume ) \ + prvTraceStoreEvent_Handle(PSF_EVENT_TASK_RESUME, (void*)(pxTaskToResume)) + +/* Called in vTaskResumeFromISR */ +#undef traceTASK_RESUME_FROM_ISR +#define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) \ + prvTraceStoreEvent_Handle(PSF_EVENT_TASK_RESUME_FROMISR, (void*)(pxTaskToResume)) + +#if (TRC_CFG_INCLUDE_MEMMANG_EVENTS == 1) + +#undef traceMALLOC +#define traceMALLOC( pvAddress, uiSize ) \ + if (xTraceIsRecorderEnabled()) \ + { \ + xTraceHeapAlloc(xTraceKernelPortGetSystemHeapHandle(), pvAddress, uiSize); \ + } + +#undef traceFREE +#define traceFREE( pvAddress, uiSize ) \ + if (xTraceIsRecorderEnabled()) \ + { \ + xTraceHeapFree(xTraceKernelPortGetSystemHeapHandle(), pvAddress, uiSize); \ + } + +#endif + +#if (TRC_CFG_INCLUDE_TIMER_EVENTS == 1) + +/* Called in timer.c - xTimerCreate */ +#undef traceTIMER_CREATE +#define traceTIMER_CREATE(tmr) \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_TIMER_CREATE, (void*)(tmr), (const char*)(tmr)->pcTimerName, (uint32_t)(tmr)->xTimerPeriodInTicks) + +#undef traceTIMER_CREATE_FAILED +#define traceTIMER_CREATE_FAILED() \ + prvTraceStoreEvent_None(PSF_EVENT_TIMER_CREATE_FAILED); + +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_8_X_X) + +#define traceTIMER_COMMAND_SEND_8_0_CASES(tmr) \ + case tmrCOMMAND_RESET: \ + prvTraceStoreEvent_HandleParam((xReturn == pdPASS) ? PSF_EVENT_TIMER_RESET : PSF_EVENT_TIMER_RESET_FAILED, (void*)(tmr), xOptionalValue); \ + break; \ + case tmrCOMMAND_START_FROM_ISR: \ + prvTraceStoreEvent_HandleParam((xReturn == pdPASS) ? PSF_EVENT_TIMER_START_FROMISR : PSF_EVENT_TIMER_START_FROMISR_FAILED, (void*)(tmr), xOptionalValue); \ + break; \ + case tmrCOMMAND_RESET_FROM_ISR: \ + prvTraceStoreEvent_HandleParam((xReturn == pdPASS) ? PSF_EVENT_TIMER_RESET_FROMISR : PSF_EVENT_TIMER_RESET_FROMISR_FAILED, (void*)(tmr), xOptionalValue); \ + break; \ + case tmrCOMMAND_STOP_FROM_ISR: \ + prvTraceStoreEvent_HandleParam((xReturn == pdPASS) ? PSF_EVENT_TIMER_STOP_FROMISR : PSF_EVENT_TIMER_STOP_FROMISR_FAILED, (void*)(tmr), xOptionalValue); \ + break; \ + case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR: \ + prvTraceStoreEvent_HandleParam((xReturn == pdPASS) ? PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR : PSF_EVENT_TIMER_CHANGEPERIOD_FROMISR_FAILED, (void*)(tmr), xOptionalValue); \ + break; +#else + +#define traceTIMER_COMMAND_SEND_8_0_CASES(tmr) + +#endif + +/* Note that xCommandID can never be tmrCOMMAND_EXECUTE_CALLBACK (-1) since the trace macro is not called in that case */ +#undef traceTIMER_COMMAND_SEND +#define traceTIMER_COMMAND_SEND(tmr, xCommandID, xOptionalValue, xReturn) \ + switch(xCommandID) \ + { \ + case tmrCOMMAND_START: \ + prvTraceStoreEvent_Handle(((xReturn) == pdPASS) ? PSF_EVENT_TIMER_START : PSF_EVENT_TIMER_START_FAILED, (void*)(tmr)); \ + break; \ + case tmrCOMMAND_STOP: \ + prvTraceStoreEvent_Handle(((xReturn) == pdPASS) ? PSF_EVENT_TIMER_STOP : PSF_EVENT_TIMER_STOP_FAILED, (void*)(tmr)); \ + break; \ + case tmrCOMMAND_CHANGE_PERIOD: \ + prvTraceStoreEvent_HandleParam(((xReturn) == pdPASS) ? PSF_EVENT_TIMER_CHANGEPERIOD : PSF_EVENT_TIMER_CHANGEPERIOD_FAILED, (void*)(tmr), xOptionalValue); \ + break; \ + case tmrCOMMAND_DELETE: \ + xTraceObjectUnregisterWithoutHandle(((xReturn) == pdPASS) ? PSF_EVENT_TIMER_DELETE : PSF_EVENT_TIMER_DELETE_FAILED, (void*)(tmr), 0); \ + break; \ + traceTIMER_COMMAND_SEND_8_0_CASES(tmr) \ + } + +#undef traceTIMER_EXPIRED +#define traceTIMER_EXPIRED(tmr) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_TIMER_EXPIRED, (void*)(tmr), (uint32_t)((tmr)->pxCallbackFunction)) + +#endif + + +#if (TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS == 1) + +#undef tracePEND_FUNC_CALL +#define tracePEND_FUNC_CALL(func, arg1, arg2, ret) \ + prvTraceStoreEvent_Param(((ret) == pdPASS) ? PSF_EVENT_TIMER_PENDFUNCCALL : PSF_EVENT_TIMER_PENDFUNCCALL_FAILED, (uint32_t)(func)) + +#undef tracePEND_FUNC_CALL_FROM_ISR +#define tracePEND_FUNC_CALL_FROM_ISR(func, arg1, arg2, ret) \ + prvTraceStoreEvent_Param(((ret) == pdPASS) ? PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR : PSF_EVENT_TIMER_PENDFUNCCALL_FROMISR_FAILED, (uint32_t)(func)) + +#endif + +#if (TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS == 1) + +#undef traceEVENT_GROUP_CREATE +#define traceEVENT_GROUP_CREATE(eg) \ + xTraceObjectRegisterWithoutHandle(PSF_EVENT_EVENTGROUP_CREATE, (void*)(eg), 0, (uint32_t)(eg)->uxEventBits) + +#undef traceEVENT_GROUP_DELETE +#define traceEVENT_GROUP_DELETE(eg) \ + xTraceObjectUnregisterWithoutHandle(PSF_EVENT_EVENTGROUP_DELETE, (void*)(eg), (uint32_t)(eg)->uxEventBits) + +#undef traceEVENT_GROUP_CREATE_FAILED +#define traceEVENT_GROUP_CREATE_FAILED() \ + prvTraceStoreEvent_None(PSF_EVENT_EVENTGROUP_CREATE_FAILED) + +#undef traceEVENT_GROUP_SYNC_BLOCK +#define traceEVENT_GROUP_SYNC_BLOCK(eg, bitsToSet, bitsToWaitFor) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_EVENTGROUP_SYNC_BLOCK, (void*)(eg), bitsToWaitFor) + +#undef traceEVENT_GROUP_SYNC_END +#define traceEVENT_GROUP_SYNC_END(eg, bitsToSet, bitsToWaitFor, wasTimeout) \ + prvTraceStoreEvent_HandleParam(((wasTimeout) != pdTRUE) ? PSF_EVENT_EVENTGROUP_SYNC : PSF_EVENT_EVENTGROUP_SYNC_FAILED, (void*)(eg), bitsToWaitFor) + +#undef traceEVENT_GROUP_WAIT_BITS_BLOCK +#define traceEVENT_GROUP_WAIT_BITS_BLOCK(eg, bitsToWaitFor) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_EVENTGROUP_WAITBITS_BLOCK, (void*)(eg), bitsToWaitFor) + +#undef traceEVENT_GROUP_WAIT_BITS_END +#define traceEVENT_GROUP_WAIT_BITS_END(eg, bitsToWaitFor, wasTimeout) \ + prvTraceStoreEvent_HandleParam(((wasTimeout) != pdTRUE) ? PSF_EVENT_EVENTGROUP_WAITBITS : PSF_EVENT_EVENTGROUP_WAITBITS_FAILED, (void*)(eg), bitsToWaitFor) + +#undef traceEVENT_GROUP_CLEAR_BITS +#define traceEVENT_GROUP_CLEAR_BITS(eg, bitsToClear) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_EVENTGROUP_CLEARBITS, (void*)(eg), bitsToClear) + +#undef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR +#define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR(eg, bitsToClear) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_EVENTGROUP_CLEARBITS_FROMISR, (void*)(eg), bitsToClear) + +#undef traceEVENT_GROUP_SET_BITS +#define traceEVENT_GROUP_SET_BITS(eg, bitsToSet) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_EVENTGROUP_SETBITS, (void*)(eg), bitsToSet) + +#undef traceEVENT_GROUP_SET_BITS_FROM_ISR +#define traceEVENT_GROUP_SET_BITS_FROM_ISR(eg, bitsToSet) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_EVENTGROUP_SETBITS_FROMISR, (void*)(eg), bitsToSet) + +#endif + +#undef traceTASK_NOTIFY +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY(index) \ + prvTraceStoreEvent_Handle(PSF_EVENT_TASK_NOTIFY, (void*)xTaskToNotify) + +#else + +#define traceTASK_NOTIFY() \ + prvTraceStoreEvent_Handle(PSF_EVENT_TASK_NOTIFY, (void*)xTaskToNotify) + +#endif + +#undef traceTASK_NOTIFY_FROM_ISR +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_FROM_ISR(index) \ + prvTraceStoreEvent_Handle(PSF_EVENT_TASK_NOTIFY_FROM_ISR, (void*)xTaskToNotify) + +#else + +#define traceTASK_NOTIFY_FROM_ISR() \ + prvTraceStoreEvent_Handle(PSF_EVENT_TASK_NOTIFY_FROM_ISR, (void*)xTaskToNotify) + +#endif + +/* NOTIFY and NOTIFY_GIVE will be handled identically */ +#undef traceTASK_NOTIFY_GIVE_FROM_ISR +#define traceTASK_NOTIFY_GIVE_FROM_ISR traceTASK_NOTIFY_FROM_ISR + +#undef traceTASK_NOTIFY_WAIT +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_WAIT(index) \ + prvTraceStoreEvent_HandleParam(pxCurrentTCB->ucNotifyState[index] == taskNOTIFICATION_RECEIVED ? PSF_EVENT_TASK_NOTIFY_WAIT : PSF_EVENT_TASK_NOTIFY_WAIT_FAILED, (void*)pxCurrentTCB, xTicksToWait) + +#elif (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_9_0_0) + +#define traceTASK_NOTIFY_WAIT() \ + prvTraceStoreEvent_HandleParam(pxCurrentTCB->ucNotifyState == taskNOTIFICATION_RECEIVED ? PSF_EVENT_TASK_NOTIFY_WAIT : PSF_EVENT_TASK_NOTIFY_WAIT_FAILED, (void*)pxCurrentTCB, xTicksToWait) + +#else + +#define traceTASK_NOTIFY_WAIT() \ + prvTraceStoreEvent_HandleParam(pxCurrentTCB->eNotifyState == eNotified ? PSF_EVENT_TASK_NOTIFY_WAIT : PSF_EVENT_TASK_NOTIFY_WAIT_FAILED, (void*)pxCurrentTCB, xTicksToWait) + +#endif + +/* WAIT and TAKE will be handled identically */ +#undef traceTASK_NOTIFY_TAKE +#define traceTASK_NOTIFY_TAKE traceTASK_NOTIFY_WAIT + +#undef traceTASK_NOTIFY_WAIT_BLOCK +#if (TRC_CFG_FREERTOS_VERSION >= TRC_FREERTOS_VERSION_10_4_0) + +#define traceTASK_NOTIFY_WAIT_BLOCK(index) \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_TASK_NOTIFY_WAIT_BLOCK, (void*)pxCurrentTCB, xTicksToWait) + +#else + +#define traceTASK_NOTIFY_WAIT_BLOCK() \ + prvTraceStoreEvent_HandleParam(PSF_EVENT_TASK_NOTIFY_WAIT_BLOCK, (void*)pxCurrentTCB, xTicksToWait) + +#endif + +/* WAIT_BLOCK and TAKE_BLOCK will be handled identically */ +#undef traceTASK_NOTIFY_TAKE_BLOCK +#define traceTASK_NOTIFY_TAKE_BLOCK traceTASK_NOTIFY_WAIT_BLOCK + +#undef traceQUEUE_REGISTRY_ADD +#define traceQUEUE_REGISTRY_ADD(object, name) \ + xTraceObjectSetNameWithoutHandle(object, (const char*)(name)); + +#if (TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS == 1) + +#undef traceSTREAM_BUFFER_CREATE +#define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) \ + xTraceObjectRegisterWithoutHandle((xIsMessageBuffer) == 1 ? PSF_EVENT_MESSAGEBUFFER_CREATE : PSF_EVENT_STREAMBUFFER_CREATE, (void*)(pxStreamBuffer), "", (uint32_t)xBufferSizeBytes) + +#undef traceSTREAM_BUFFER_CREATE_FAILED +#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) \ + prvTraceStoreEvent_HandleParam((xIsMessageBuffer) == 1 ? PSF_EVENT_MESSAGEBUFFER_CREATE_FAILED : PSF_EVENT_STREAMBUFFER_CREATE_FAILED, 0 , xBufferSizeBytes) + +#undef traceSTREAM_BUFFER_CREATE_STATIC_FAILED +#define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) \ + traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) + +#undef traceSTREAM_BUFFER_DELETE +#define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) \ + xTraceObjectUnregisterWithoutHandle(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_DELETE : PSF_EVENT_STREAMBUFFER_DELETE, (void*)(xStreamBuffer), prvBytesInBuffer(xStreamBuffer)); + +#undef traceSTREAM_BUFFER_RESET +#define traceSTREAM_BUFFER_RESET( xStreamBuffer ) \ + prvTraceStoreEvent_HandleParam(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RESET : PSF_EVENT_STREAMBUFFER_RESET, (void*)(xStreamBuffer), 0) + +#undef traceSTREAM_BUFFER_SEND +#define traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn ) \ + prvTraceStoreEvent_HandleParam(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND : PSF_EVENT_STREAMBUFFER_SEND, (void*)(xStreamBuffer), prvBytesInBuffer(xStreamBuffer)) + +#undef traceBLOCKING_ON_STREAM_BUFFER_SEND +#define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) \ + prvTraceStoreEvent_Handle(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_BLOCK : PSF_EVENT_STREAMBUFFER_SEND_BLOCK, (void*)(xStreamBuffer)) + +#undef traceSTREAM_BUFFER_SEND_FAILED +#define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) \ + prvTraceStoreEvent_Handle(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_FAILED : PSF_EVENT_STREAMBUFFER_SEND_FAILED, (void*)(xStreamBuffer)) + +#undef traceSTREAM_BUFFER_RECEIVE +#define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) \ + prvTraceStoreEvent_HandleParam(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE: PSF_EVENT_STREAMBUFFER_RECEIVE, (void*)(xStreamBuffer), prvBytesInBuffer(xStreamBuffer)) + +#undef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE +#define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) \ + prvTraceStoreEvent_Handle(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_BLOCK: PSF_EVENT_STREAMBUFFER_RECEIVE_BLOCK, (void*)(xStreamBuffer)) + +#undef traceSTREAM_BUFFER_RECEIVE_FAILED +#define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) \ + prvTraceStoreEvent_Handle(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_FAILED: PSF_EVENT_STREAMBUFFER_RECEIVE_FAILED, (void*)(xStreamBuffer)) + +#undef traceSTREAM_BUFFER_SEND_FROM_ISR +#define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn ) \ + if ( (xReturn) > ( size_t ) 0 ) \ + { \ + prvTraceStoreEvent_HandleParam(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR : PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR, (void*)(xStreamBuffer), prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + prvTraceStoreEvent_Handle(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_SEND_FROM_ISR_FAILED : PSF_EVENT_STREAMBUFFER_SEND_FROM_ISR_FAILED, (void*)(xStreamBuffer)); \ + } + +#undef traceSTREAM_BUFFER_RECEIVE_FROM_ISR +#define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) \ + if ( (xReceivedLength) > ( size_t ) 0 ) \ + { \ + prvTraceStoreEvent_HandleParam(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR : PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR, (void*)(xStreamBuffer), prvBytesInBuffer(xStreamBuffer)); \ + } \ + else \ + { \ + prvTraceStoreEvent_Handle(prvGetStreamBufferType(xStreamBuffer) > 0 ? PSF_EVENT_MESSAGEBUFFER_RECEIVE_FROM_ISR_FAILED : PSF_EVENT_STREAMBUFFER_RECEIVE_FROM_ISR_FAILED, (void*)(xStreamBuffer)); \ + } + +#endif + +#endif + +#endif + +#else + +/* When recorder is disabled */ +#define vTraceSetQueueName(object, name) +#define vTraceSetSemaphoreName(object, name) +#define vTraceSetMutexName(object, name) +#define vTraceSetEventGroupName(object, name) +#define vTraceSetStreamBufferName(object, name) +#define vTraceSetMessageBufferName(object, name) + +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_KERNEL_PORT_H */ diff --git a/freertos/cvitek/install/include/kernel/trcKernelPortConfig.h b/freertos/cvitek/install/include/kernel/trcKernelPortConfig.h new file mode 100644 index 000000000..f90e45a09 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcKernelPortConfig.h @@ -0,0 +1,116 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * Configuration parameters for the kernel port. + * More settings can be found in trcKernelPortStreamingConfig.h and + * trcKernelPortSnapshotConfig.h. + */ + +#ifndef TRC_KERNEL_PORT_CONFIG_H +#define TRC_KERNEL_PORT_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @def TRC_CFG_RECORDER_MODE + * @brief Specify what recording mode to use. Snapshot means that the data is saved in + * an internal RAM buffer, for later upload. Streaming means that the data is + * transferred continuously to the host PC. + * + * For more information, see http://percepio.com/2016/10/05/rtos-tracing/ + * and the Tracealyzer User Manual. + * + * Values: + * TRC_RECORDER_MODE_SNAPSHOT + * TRC_RECORDER_MODE_STREAMING + */ +#define TRC_CFG_RECORDER_MODE TRC_RECORDER_MODE_SNAPSHOT + +/** + * @def TRC_CFG_FREERTOS_VERSION + * @brief Specify what version of FreeRTOS that is used (don't change unless using the + * trace recorder library with an older version of FreeRTOS). + * + * TRC_FREERTOS_VERSION_7_3_X If using FreeRTOS v7.3.X + * TRC_FREERTOS_VERSION_7_4_X If using FreeRTOS v7.4.X + * TRC_FREERTOS_VERSION_7_5_X If using FreeRTOS v7.5.X + * TRC_FREERTOS_VERSION_7_6_X If using FreeRTOS v7.6.X + * TRC_FREERTOS_VERSION_8_X_X If using FreeRTOS v8.X.X + * TRC_FREERTOS_VERSION_9_0_0 If using FreeRTOS v9.0.0 + * TRC_FREERTOS_VERSION_9_0_1 If using FreeRTOS v9.0.1 + * TRC_FREERTOS_VERSION_9_0_2 If using FreeRTOS v9.0.2 + * TRC_FREERTOS_VERSION_10_0_0 If using FreeRTOS v10.0.0 + * TRC_FREERTOS_VERSION_10_0_1 If using FreeRTOS v10.0.1 + * TRC_FREERTOS_VERSION_10_1_0 If using FreeRTOS v10.1.0 + * TRC_FREERTOS_VERSION_10_1_1 If using FreeRTOS v10.1.1 + * TRC_FREERTOS_VERSION_10_2_0 If using FreeRTOS v10.2.0 + * TRC_FREERTOS_VERSION_10_2_1 If using FreeRTOS v10.2.1 + * TRC_FREERTOS_VERSION_10_3_0 If using FreeRTOS v10.3.0 + * TRC_FREERTOS_VERSION_10_3_1 If using FreeRTOS v10.3.1 + * TRC_FREERTOS_VERSION_10_4_0 If using FreeRTOS v10.4.0 + * TRC_FREERTOS_VERSION_10_4_1 If using FreeRTOS v10.4.1 or later + */ +#define TRC_CFG_FREERTOS_VERSION TRC_FREERTOS_VERSION_10_4_1 + +/** + * @def TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any "event group" events. + * + * Default value is 0 (excluded) since dependent on event_groups.c + */ +#define TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS 1 + +/** + * @def TRC_CFG_INCLUDE_TIMER_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any Timer events. + * + * Default value is 0 since dependent on timers.c + */ +#define TRC_CFG_INCLUDE_TIMER_EVENTS 1 + +/** + * @def TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any "pending function call" + * events, such as xTimerPendFunctionCall(). + * + * Default value is 0 since dependent on timers.c + */ +#define TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS 1 + +/** + * @def TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the trace will exclude any stream buffer or message + * buffer events. + * + * Default value is 0 since dependent on stream_buffer.c (new in FreeRTOS v10) + */ +#define TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS 1 + +/** + * @def TRC_CFG_ACKNOWLEDGE_QUEUE_SET_SEND + * @brief When using FreeRTOS v10.3.0 or v10.3.1, please make sure that the trace + * point in prvNotifyQueueSetContainer() in queue.c is renamed from + * traceQUEUE_SEND to traceQUEUE_SET_SEND in order to tell them apart from + * other traceQUEUE_SEND trace points. Then set this to TRC_ACKNOWLEDGED. + */ +#define TRC_CFG_ACKNOWLEDGE_QUEUE_SET_SEND 0 /* TRC_ACKNOWLEDGED */ + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_KERNEL_PORT_CONFIG_H */ diff --git a/freertos/cvitek/install/include/kernel/trcKernelPortSnapshotConfig.h b/freertos/cvitek/install/include/kernel/trcKernelPortSnapshotConfig.h new file mode 100644 index 000000000..16c6e4d81 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcKernelPortSnapshotConfig.h @@ -0,0 +1,69 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * Kernel port configuration parameters for snapshot mode. + */ + +#ifndef TRC_KERNEL_PORT_SNAPSHOT_CONFIG_H +#define TRC_KERNEL_PORT_SNAPSHOT_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @def TRC_CFG_NTASK, TRC_CFG_NISR, TRC_CFG_NQUEUE, TRC_CFG_NSEMAPHORE... + * @brief A group of macros which should be defined as integer values, zero or larger. + * + * These define the capacity of the Object Property Table, i.e., the maximum + * number of objects active at any given point, within each object class (e.g., + * task, queue, semaphore, ...). + * + * If tasks or other objects are deleted in your system, this + * setting does not limit the total amount of objects created, only the number + * of objects that have been successfully created but not yet deleted. + * + * Using too small values will cause vTraceError to be called, which stores an + * error message in the trace that is shown when opening the trace file. The + * error message can also be retrieved using xTraceGetLastError. + * + * It can be wise to start with large values for these constants, + * unless you are very confident on these numbers. Then do a recording and + * check the actual usage by selecting View menu -> Trace Details -> + * Resource Usage -> Object Table. + */ +#define TRC_CFG_NTASK 15 +#define TRC_CFG_NISR 5 +#define TRC_CFG_NQUEUE 40 +#define TRC_CFG_NSEMAPHORE 40 +#define TRC_CFG_NMUTEX 40 +#define TRC_CFG_NTIMER 5 +#define TRC_CFG_NEVENTGROUP 5 +#define TRC_CFG_NSTREAMBUFFER 5 +#define TRC_CFG_NMESSAGEBUFFER 5 + +/** + * @def TRC_CFG_NAME_LEN_TASK, TRC_CFG_NAME_LEN_QUEUE, ... + * @brief Macros that specify the maximum lengths (number of characters) for names of + * kernel objects, such as tasks and queues. If longer names are used, they will + * be truncated when stored in the recorder. + */ +#define TRC_CFG_NAME_LEN_TASK 15 +#define TRC_CFG_NAME_LEN_ISR 15 +#define TRC_CFG_NAME_LEN_QUEUE 15 +#define TRC_CFG_NAME_LEN_SEMAPHORE 15 +#define TRC_CFG_NAME_LEN_MUTEX 15 +#define TRC_CFG_NAME_LEN_TIMER 15 +#define TRC_CFG_NAME_LEN_EVENTGROUP 15 +#define TRC_CFG_NAME_LEN_STREAMBUFFER 15 +#define TRC_CFG_NAME_LEN_MESSAGEBUFFER 15 + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_KERNEL_PORT_SNAPSHOT_CONFIG_H */ diff --git a/freertos/cvitek/install/include/kernel/trcKernelPortStreamingConfig.h b/freertos/cvitek/install/include/kernel/trcKernelPortStreamingConfig.h new file mode 100644 index 000000000..3abd6606a --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcKernelPortStreamingConfig.h @@ -0,0 +1,24 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * Kernel port configuration parameters for streaming mode. + */ + +#ifndef TRC_KERNEL_PORT_STREAMING_CONFIG_H +#define TRC_KERNEL_PORT_STREAMING_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Nothing yet */ + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_KERNEL_PORT_STREAMING_CONFIG_H */ diff --git a/freertos/cvitek/install/include/kernel/trcMultiCoreEventBuffer.h b/freertos/cvitek/install/include/kernel/trcMultiCoreEventBuffer.h new file mode 100644 index 000000000..ac07a48dd --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcMultiCoreEventBuffer.h @@ -0,0 +1,143 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @internal Public trace multicore event buffer APIs. + */ + +#ifndef TRC_MULTI_CORE_EVENT_BUFFER_H +#define TRC_MULTI_CORE_EVENT_BUFFER_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_multi_core_event_buffer_apis Trace Multi-Core Event Buffer APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Trace Multi-Core Event Buffer Structure + */ +typedef struct TraceMultiCoreEventBuffer +{ + TraceEventBuffer_t *xEventBuffer[TRC_CFG_CORE_COUNT]; /**< */ +} TraceMultiCoreEventBuffer_t; + +/** + * @internal Initialize multi-core event buffer. + * + * This routine initializes a multi-core trace event buffer and assignts it + * a memory area based on the supplied buffer. + * + * Trace event buffer options specifies the buffer behavior regarding + * old data, the alternatives are TRC_EVENT_BUFFER_OPTION_SKIP and + * TRC_EVENT_BUFFER_OPTION_OVERWRITE (mutal exclusive). + * + * @param[out] pxTraceMultiCoreEventBuffer Pointer to unitialized multi-core trace event buffer. + * @param[in] uiOptions Trace event buffer options. + * @param[in] puiBuffer Pointer to buffer that will be used by the multi-core trace event buffer. + * @param[in] uiSize Size of buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceMultiCoreEventBufferInitialize(TraceMultiCoreEventBuffer_t* pxTraceMultiCoreEventBuffer, uint32_t uiOptions, + uint8_t* puiBuffer, uint32_t uiSize); + + + +#if ((TRC_CFG_USE_TRACE_ASSERT) == 1) + +/** + * @brief Pushes data into multi-core trace event buffer. + * + * This routine attempts to push data into the multi-core trace event buffer. Selection + * of which core the data is pushed for is managed automatically through the + * TRC_CFG_GET_CURRENT_CORE macro which is defined on an RTOS basis. + * + * @param[in] pxTraceMultiCoreEventBuffer Pointer to initialized multi-core event buffer. + * @param[in] pvData Pointer to data should be pushed into multi-core event buffer. + * @param[in] uiSize Size of data that should be pushed into multi-core trace event buffer. + * @param[out] piBytesWritten Pointer to variable which the routine will write the number + * of bytes that was pushed into the multi-core trace event buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceMultiCoreEventBufferPush(TraceMultiCoreEventBuffer_t* pxTraceMultiCoreEventBuffer, void* pvData, uint32_t uiSize, int32_t* piBytesWritten); + +#else + +/** + * @brief Pushes data into multi-core trace event buffer. + * + * This routine attempts to push data into the multi-core trace event buffer. Selection + * of which core the data is pushed for is managed automatically through the + * TRC_CFG_GET_CURRENT_CORE macro which is defined on an RTOS basis. + * + * @param[in] pxTraceMultiCoreEventBuffer Pointer to initialized multi-core event buffer. + * @param[in] pvData Pointer to data should be pushed into multi-core event buffer. + * @param[in] uiSize Size of data that should be pushed into multi-core trace event buffer. + * @param[out] piBytesWritten Pointer to variable which the routine will write the number + * of bytes that was pushed into the multi-core trace event buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceMultiCoreEventBufferPush(pxTraceMultiCoreEventBuffer, pvData, uiSize, piBytesWritten) xTraceEventBufferPush((pxTraceMultiCoreEventBuffer)->xEventBuffer[TRC_CFG_GET_CURRENT_CORE()], pvData, uiSize, piBytesWritten) + +#endif + +/** + * @brief Transfer multi-core trace event buffer data through streamport. + * + * This routine will attempt to transfer all existing data in the multi-core trace event + * buffer through the streamport. New data pushed to the trace event buffer + * during the execution of this routine will not be transfered to + * + * @param[in] pxTraceMultiCoreEventBuffer Pointer to initialized multi-core event buffer. + * @param[out] piBytesWritten Pointer to variable which the routine will write the number + * of bytes that was pushed into the multi-core trace event buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceMultiCoreEventBufferTransfer(TraceMultiCoreEventBuffer_t* pxTraceMultiCoreEventBuffer, int32_t* piBytesWritten); + +/** + * @brief Clears all data from event buffer. + * + * @param[in] pxTraceMultiCoreEventBuffer Pointer to initialized multi-core trace event buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceMultiCoreEventBufferClear(TraceMultiCoreEventBuffer_t* pxTraceMultiCoreEventBuffer); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_MULTI_CORE_EVENT_BUFFER_H */ diff --git a/freertos/cvitek/install/include/kernel/trcObject.h b/freertos/cvitek/install/include/kernel/trcObject.h new file mode 100644 index 000000000..5df857487 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcObject.h @@ -0,0 +1,202 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace object APIs. + */ + +#ifndef TRC_OBJECT_H +#define TRC_OBJECT_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_object_apis Trace Object APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Registers trace object. + * + * @param[in] uiEventCode Event code. + * @param[in] pvObject Object. + * @param[in] szName Name. + * @param[in] uxStateCount State count. + * @param[in] uxStates States. + * @param[in] uxOptions Options. + * @param[out] pxObjectHandle Pointer to uninitialized trace object. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectRegisterInternal(uint32_t uiEventCode, void* pvObject, const char* szName, TraceUnsignedBaseType_t uxStateCount, TraceUnsignedBaseType_t uxStates[], TraceUnsignedBaseType_t uxOptions, TraceObjectHandle_t* pxObjectHandle); + +/** + * @brief Registers trace object. + * + * @param[in] uiEventCode Event code. + * @param[in] pvObject Object. + * @param[in] szName Name. + * @param[in] uxState State. + * @param[out] pxObjectHandle Pointer to uninitialized trace object. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectRegister(uint32_t uiEventCode, void *pvObject, const char* szName, TraceUnsignedBaseType_t uxState, TraceObjectHandle_t *pxObjectHandle); + +/** + * @brief Unregisters trace object. + * + * @param[in] xObjectHandle Pointer to initialized trace object. + * @param[in] uiEventCode Event code. + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectUnregister(TraceObjectHandle_t xObjectHandle, uint32_t uiEventCode, TraceUnsignedBaseType_t uxState); + +/** + * @brief Sets trace object name. + * + * @param[in] xObjectHandle Pointer to initialized trace object. + * @param[in] szName Name. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectSetName(TraceObjectHandle_t xObjectHandle, const char *szName); + +/** + * @brief Sets trace object state. + * + * @param[in] xObjectHandle Pointer to initialized trace object. + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceObjectSetState(xObjectHandle, uxState) xTraceObjectSetSpecificState(xObjectHandle, 0, uxState) + +/** + * @brief Sets trace object specific state state. + * + * @param[in] xObjectHandle Pointer to initialized trace object. + * @param[in] uiIndex State Index. + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceObjectSetSpecificState(xObjectHandle, uiIndex, uxState) xTraceEntrySetState((TraceEntryHandle_t)(xObjectHandle), uiIndex, uxState) + +/** + * @brief Sets trace object options. + * + * @param[in] xObjectHandle Pointer to initialized trace object. + * @param[in] uiOptions Options. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceObjectSetOptions(xObjectHandle, uiOptions) xTraceEntrySetOptions((TraceEntryHandle_t)(xObjectHandle), uiOptions) + +/** + * @brief Registers trace object without trace object handle. + * + * @param[in] uiEventCode Event code. + * @param[in] pvObject Object. + * @param[in] szName Name. + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectRegisterWithoutHandle(uint32_t uiEventCode, void* pvObject, const char* szName, TraceUnsignedBaseType_t uxState); + +/** + * @brief Unregisters trace object without trace object handle. + * + * @param[in] uiEventCode Event code. + * @param[in] pvObject Object. + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectUnregisterWithoutHandle(uint32_t uiEventCode, void* pvObject, TraceUnsignedBaseType_t uxState); + +/** + * @brief Set trace object name without trace object handle. + * + * @param[in] pvObject Object. + * @param[in] szName Name. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectSetNameWithoutHandle(void* pvObject, const char* szName); + +/** + * @brief Set trace object state without trace object handle. + * + * @param[in] pvObject Object. + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceObjectSetStateWithoutHandle(pvObject, uxState) xTraceObjectSetSpecificStateWithoutHandle(pvObject, 0, uxState) + +/** + * @brief Sets trace object specific state without trace object + * handle. + * + * @param[in] pvObject Object. + * @param[in] uiIndex State index. + * @param[in] uxState State. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectSetSpecificStateWithoutHandle(void* pvObject, uint32_t uiIndex, TraceUnsignedBaseType_t uxState); + +/** + * @brief Sets trace object options without trace object handle. + * + * @param[in] pvObject Object. + * @param[in] uiOptions Options. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceObjectSetOptionsWithoutHandle(void* pvObject, uint32_t uiOptions); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_OBJECT_H */ diff --git a/freertos/cvitek/install/include/kernel/trcPrint.h b/freertos/cvitek/install/include/kernel/trcPrint.h new file mode 100644 index 000000000..d1ecfe723 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcPrint.h @@ -0,0 +1,207 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace print APIs. + */ + +#ifndef TRC_PRINT_H +#define TRC_PRINT_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_print_apis Trace Print APIs + * @ingroup trace_recorder_apis + * @{ + */ + +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) + +/** @internal */ +#define TRC_PRINT_BUFFER_SIZE (sizeof(TraceStringHandle_t) + sizeof(TraceStringHandle_t)) + +/** + * @internal Trace Print Buffer Structure + */ +typedef struct TracePrintBuffer +{ + uint32_t buffer[(TRC_PRINT_BUFFER_SIZE) / sizeof(uint32_t)]; +} TracePrintBuffer_t; + +/** + * @internal Initialize print trace system. + * + * @param[in] pxBuffer Pointer to memory that will be used by the print + * trace system. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTracePrintInitialize(TracePrintBuffer_t* pxBuffer); + +/** + * @brief Generate "User Events" with unformatted text. + * + * User Events can be used for very efficient application logging, and are shown + * as yellow labels in the main trace view. + * + * You may group User Events into User Event Channels. The yellow User Event + * labels shows the logged string, preceded by the channel name within + * brackets. For example: + * + * "[MyChannel] Hello World!" + * + * The User Event Channels are shown in the View Filter, which makes it easy to + * select what User Events you wish to display. User Event Channels are created + * using xTraceStringRegister(). + * + * Example: + * + * TraceStringHandle_t xChannel = xTraceStringRegister("MyChannel"); + * ... + * xTracePrint(xChannel, "Hello World!"); + * + * @param[in] xChannel Channel. + * @param[in] szString String. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTracePrint(TraceStringHandle_t xChannel, const char* szString); + +/** + * @brief Wrapper for vTracePrintF for printing to default channel. + * + * Wrapper for vTracePrintF, using the default channel. Can be used as a drop-in + * replacement for printf and similar functions, e.g. in a debug logging macro. + * + * Example: + * // Old: #define LogString debug_console_printf + * + * // New, log to Tracealyzer instead: + * #define LogString xTraceConsoleChannelPrintF + * ... + * LogString("My value is: %d", myValue); + * + * @param[in] szFormat Format + * @param[in] ... + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceConsoleChannelPrintF(const char* szFormat, ...); + +/** + * @brief Generates "User Events" with formatted text and data. + * + * Generates "User Events", with formatted text and data, similar to a "printf". + * It is very fast since the actual formatting is done on the host side when the + * trace is displayed. + * + * User Events can be used for very efficient application logging, and are shown + * as yellow labels in the main trace view. + * An advantage of User Events is that data can be plotted in the "User Event + * Signal Plot" view, visualizing any data you log as User Events, discrete + * states or control system signals (e.g. system inputs or outputs). + * + * You may group User Events into User Event Channels. The yellow User Event + * labels show the logged string, preceded by the channel name within brackets. + * + * Example: + * + * "[MyChannel] Hello World!" + * + * The User Event Channels are shown in the View Filter, which makes it easy to + * select what User Events you wish to display. User Event Channels are created + * using xTraceStringRegister(). + * + * Example: + * + * TraceStringHandle_t adc_uechannel = xTraceStringRegister("ADC User Events"); + * ... + * xTracePrintF(adc_uechannel, + * "ADC channel %d: %d volts", + * ch, adc_reading); + * + * All data arguments are assumed to be 32 bit wide. The following formats are + * supported: + * %d - signed integer. The following width and padding format is supported: "%05d" -> "-0042" and "%5d" -> " -42" + * %u - unsigned integer. The following width and padding format is supported: "%05u" -> "00042" and "%5u" -> " 42" + * %X - hexadecimal (uppercase). The following width and padding format is supported: "%04X" -> "002A" and "%4X" -> " 2A" + * %x - hexadecimal (lowercase). The following width and padding format is supported: "%04x" -> "002a" and "%4x" -> " 2a" + * %s - string (currently, this must be an earlier stored symbol name) + * + * Up to 15 data arguments are allowed, with a total size of maximum 60 byte + * including 8 byte for the base event fields and the format string. So with + * one data argument, the maximum string length is 48 chars. If this is exceeded + * the string is truncated (4 bytes at a time). + * + * @param[in] xChannel Channel. + * @param[in] szFormat Format. + * @param[in] ... + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTracePrintF(TraceStringHandle_t xChannel, const char* szFormat, ...); + +/** + * @brief Generates "User Events" with formatted text and data. + * + * @param[in] xChannel Channel. + * @param[in] szFormat Format. + * @param[in] xVL Variable list arguments. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceVPrintF(TraceStringHandle_t xChannel, const char* szFormat, va_list xVL); + +#else /* (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) */ + +typedef struct TracePrintBuffer +{ + uint32_t buffer[1]; +} TracePrintBuffer_t; + +#define xTracePrintInitialize(p) ((void)p, p != 0 ? TRC_SUCCESS : TRC_FAIL) + +#define xTracePrint(c, s) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3((void)c, (void)s, TRC_SUCCESS) + +#define xTracePrintF(c, s, ...) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3((void)c, (void)s, TRC_SUCCESS) + +#define xTraceConsoleChannelPrintF(s, ...) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2((void)s, TRC_SUCCESS) + +#define xTraceVPrintF(c, s, v) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4((void)c, (void)s, (void)v, TRC_SUCCESS) + +#endif /* (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + + +#endif /* TRC_PRINT_H */ diff --git a/freertos/cvitek/install/include/kernel/trcRecorder.h b/freertos/cvitek/install/include/kernel/trcRecorder.h new file mode 100644 index 000000000..9802062b6 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcRecorder.h @@ -0,0 +1,1970 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef TRC_RECORDER_H +#define TRC_RECORDER_H + +/** + * @file + * + * @brief The public API of the Percepio trace recorder. + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Trace Recorder APIs + * @defgroup trace_recorder_apis Trace Recorder APIs + * @{ + * @} + */ + +#define TRC_ACKNOWLEDGED (0xABC99123) + +#include +#include +#include +#include + +#ifndef TRC_CFG_TEST_MODE +#define TRC_CFG_TEST_MODE 0 +#endif + +/* Unless defined by the kernel port, we assume there is no support for + * the classic snapshot mode and default to streaming mode where + * the new RingBuffer snapshot mode provides snapshot functionality. + */ +#ifndef TRC_CFG_RECORDER_MODE +#define TRC_CFG_RECORDER_MODE TRC_RECORDER_MODE_STREAMING +#endif + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) +#include +#include + +/* Calls xTraceError if the _assert condition is false. For void functions, +where no return value is to be provided. */ +#define TRC_ASSERT_VOID(_assert, _err) if (! (_assert)){ prvTraceError(_err); return; } + +/* Calls xTraceError if the _assert condition is false. For non-void functions, +where a return value is to be provided. */ +#define TRC_ASSERT_RET(_assert, _err, _return) if (! (_assert)){ prvTraceError(_err); return _return; } + +typedef uint8_t traceUBChannel; +typedef uint8_t traceObjectClass; + +#undef traceHandle +#if (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) +typedef uint16_t traceHandle; +#else /* (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) */ +typedef uint8_t traceHandle; +#endif /* (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) */ + +#undef TraceISRHandle_t +#define TraceISRHandle_t traceHandle + +#include +#include + +/* Not yet available in snapshot mode */ +#define vTraceConsoleChannelPrintF(fmt, ...) (void) +#define xTraceConsoleChannelPrintF(fmt, ...) (void) +#define prvTraceStoreEvent_None(...) +#define prvTraceStoreEvent_Handle(...) +#define prvTraceStoreEvent_Param(...) +#define prvTraceStoreEvent_HandleParam(...) +#define prvTraceStoreEvent_ParamParam(...) +#define prvTraceStoreEvent_HandleParamParam(...) +#define prvTraceStoreEvent_ParamParamParam(...) + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) */ + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) +#include +#include + +/* Unless specified in trcConfig.h we assume this is a single core target */ +#ifndef TRC_CFG_CORE_COUNT +#define TRC_CFG_CORE_COUNT 1 +#endif + +/* Unless specified in trcConfig.h we assume this is a single core target */ +#ifndef TRC_CFG_GET_CURRENT_CORE +#define TRC_CFG_GET_CURRENT_CORE() 0 +#endif + +/* Unless specified in trcConfig.h or trcKernelPortConfig.h we assume + * GCC statement expressions aren't supported. */ +#ifndef TRC_CFG_USE_GCC_STATEMENT_EXPR +#define TRC_CFG_USE_GCC_STATEMENT_EXPR 0 +#endif + +/* Backwards compatibility */ +#undef traceHandle +#define traceHandle TraceISRHandle_t + +/* Maximum event size */ +#define TRC_MAX_BLOB_SIZE (16 * sizeof(uint32_t)) + +/* Platform name length */ +#define TRC_PLATFORM_CFG_LENGTH 8 + +/* Header size */ +#define TRC_HEADER_BUFFER_SIZE (sizeof(uint32_t) + sizeof(uint16_t) + sizeof(uint16_t) + sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t) + (sizeof(char) * (TRC_PLATFORM_CFG_LENGTH)) + sizeof(uint16_t) + sizeof(uint8_t) + sizeof(uint8_t)) + +typedef struct TraceHeaderBuffer +{ + uint8_t buffer[TRC_HEADER_BUFFER_SIZE]; +} TraceHeaderBuffer_t; + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +/* These includes offer functionality for Streaming mode only, but they are included here in order to avoid compilation errors */ +#include +#include +#include + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +/******************************************************************************/ +/*** Common API - both Snapshot and Streaming mode ****************************/ +/******************************************************************************/ + +/** + * @brief + * + * Initializes the recorder data. xTraceInitialize() or xTraceEnable(...) + * must be called before any attempts at adding trace data/information. + * See xTraceEnable(...) for more information. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceInitialize(void); + +/** + * @brief + * + * This function enables tracing. + * To use the trace recorder, the startup must call xTraceInitialize() or + * xTraceEnable(...) before any RTOS calls are made (including "create" calls). + * Three start options are provided: + * + * TRC_START: Starts the tracing directly. In snapshot mode this allows for + * starting the trace at any point in your code, assuming xTraceInitialize() + * has been called in the startup. Can also be used for streaming without + * Tracealyzer control, e.g. to a local flash file system (assuming such a + * "stream port", see trcStreamPort.h). + * + * TRC_START_AWAIT_HOST: For streaming mode only. Initializes the trace recorder + * if necessary and waits for a Start command from Tracealyzer ("Start Recording" + * button). This call is intentionally blocking! By calling xTraceEnable with + * this option from the startup code, you start tracing at this point and capture + * the early events. + * + * TRC_START_FROM_HOST: For streaming mode only. Initializes the trace recorder + * if necessary and creates a task that waits for a Start command from + * Tracealyzer ("Start Recording" button). This call is not blocking. + * + * @example Usage examples + * + * Snapshot trace, from startup: + * + * xTraceEnable(TRC_START); // Will call xTraceInitialize() + * + * + * Snapshot trace, from a later point: + * + * xTraceInitialize(); + * + * ... + * xTraceEnable(TRC_START); // e.g., in task context, at some relevant event + * + * Streaming trace, from startup (can only be used with certain stream ports): + * + * xTraceInitialize(); + * + * xTraceEnable(TRC_START); + * + * Streaming trace, from startup: + * + * xTraceEnable(TRC_START_AWAIT_HOST); // Blocks! + * + * + * Streaming trace, from a later point: + * + * xTraceInitialize(); + * + * xTraceEnable(TRC_START); + * + * Streaming trace, system executes normally until host starts tracing: + * + * xTraceInitialize(); + * + * xTraceEnable(TRC_START_FROM_HOST) + * + * @param[in] uiStartOption Start option. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceEnable(uint32_t uiStartOption); + +/** + * @brief Disables tracing. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceDisable(void); + +/** + * @brief + * + * For snapshot mode only: Sets the "filter group" to assign when creating + * RTOS objects, such as tasks, queues, semaphores and mutexes. This together + * with vTraceSetFilterMask allows you to control what events that are recorded, + * based on the objects they refer to. + * + * There are 16 filter groups named FilterGroup0 .. FilterGroup15. + * + * Note: We don't recommend filtering out the Idle task, so make sure to call + * vTraceSetFilterGroup just before initializing the RTOS, in order to assign + * such "default" objects to the right Filter Group (typically group 0). + * + * Example: + * + * // Assign tasks T1 to FilterGroup0 (default) + * + * + * // Assign Q1 and Q2 to FilterGroup1 + * vTraceSetFilterGroup(FilterGroup1); + * + * + * + * // Assigns Q3 to FilterGroup2 + * vTraceSetFilterGroup(FilterGroup2); + * + * + * // Only include FilterGroup0 and FilterGroup2, exclude FilterGroup1 (Q1 and Q2) from the trace + * vTraceSetFilterMask( FilterGroup0 | FilterGroup2 ); + * + * // Assign the default RTOS objects (e.g. Idle task) to FilterGroup0 + * vTraceSetFilterGroup(FilterGroup0); + * + * + * Note that you may define your own names for the filter groups using + * preprocessor definitions, to make the code easier to understand. + * + * Example: + * + * #define BASE FilterGroup0 + * #define USB_EVENTS FilterGroup1 + * #define CAN_EVENTS FilterGroup2 + * + * Note that filtering per event type (regardless of object) is also available + * in trcKernelPortConfig.h for certain kernels. + * + * @param[in] filterGroup Filter group + */ +void vTraceSetFilterGroup(uint16_t filterGroup); + +/** + * @brief + * + * For snapshot mode only: Sets the "filter mask" that is used to filter + * the events by object. This can be used to reduce the trace data rate, i.e., + * if your streaming interface is a bottleneck or if you want longer snapshot + * traces without increasing the buffer size. + * + * Note: There are two kinds of filters in the recorder. The other filter type + * excludes all events of certain kinds (e.g., OS ticks). See trcConfig.h. + * + * The filtering is based on bitwise AND with the Filter Group ID, assigned + * to RTOS objects such as tasks, queues, semaphores and mutexes. + * This together with vTraceSetFilterGroup allows you to control what + * events that are recorded, based on the objects they refer to. + * + * See example for vTraceSetFilterGroup. + * + * @param[in] filterMask Filter mask + */ +void vTraceSetFilterMask(uint16_t filterMask); + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) + +#include + +/** + * @brief Returns lower 16 bits of a value + * + * @param[in] value The starting value + */ +#define TRACE_GET_LOW16(value) ((uint16_t)((value) & 0x0000FFFF)) + +/** + * @brief Returns upper 16 bits + * + * @param[in] value The starting value + */ +#define TRACE_GET_HIGH16(value) ((uint16_t)(((value) >> 16) & 0x0000FFFF)) + +/** + * @brief Sets lower 16 bits + * + * @param[in] current The starting value + * @param[in] value The value to set + */ +#define TRACE_SET_LOW16(current, value) (((current) & 0xFFFF0000) | (value)) + +/** + * @brief Sets upper 16 bits + * + * @param[in] current The starting value + * @param[in] value The value to set + */ +#define TRACE_SET_HIGH16(current, value) (((current) & 0x0000FFFF) | (((uint32_t)(value)) << 16)) + +#if defined (TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) +/** + * @brief Adds a task to the stack monitor + * + * @param[in] task The task + */ +void prvAddTaskToStackMonitor(void* task); + +/** + * @brief Remove a task from the stack monitor + * + * @param[in] task The task + */ +void prvRemoveTaskFromStackMonitor(void* task); + +/** + * @brief Reports on the current stack usage + */ +void prvReportStackUsage(void); + +#else /* defined (TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ + +#define prvAddTaskToStackMonitor(task) +#define prvRemoveTaskFromStackMonitor(task) +#define prvReportStackUsage() + +#endif /* defined (TRC_CFG_ENABLE_STACK_MONITOR) && (TRC_CFG_ENABLE_STACK_MONITOR == 1) && (TRC_CFG_SCHEDULING_ONLY == 0) */ + +/** + * @internal Deprecated - Registers an ISR + */ +traceHandle xTraceSetISRProperties(const char* szName, uint8_t uiPriority); + +/** + * @brief + * + * Registers an ISR. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * TraceISRHandle_t Timer1Handle; + * xTraceISRRegister("ISRTimer1", PRIO_ISR_TIMER1, &Timer1Handle); + * + * @param[in] szName ISR name + * @param[in] uiPriority ISR priority + * @param[in] pxISRHandle + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISRRegister(const char* szName, uint32_t uiPriority, TraceISRHandle_t* pxISRHandle); + +/** + * @brief + * + * Registers the beginning of an Interrupt Service Routine, using a TraceISRHandle_t + * provided by xTraceISRRegister. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * TraceISRHandle_t Timer1Handle; + * xTraceISRRegister("ISRTimer1", PRIO_ISR_TIMER1, &Timer1Handle); + * ... + * void ISR_handler() + * { + * xTraceISRBegin(Timer1Handle); + * ... + * xTraceISREnd(0); + * } + * + * @param[in] xHandle Handle for the previously registered ISR + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISRBegin(TraceISRHandle_t xHandle); + +#define vTraceStoreISRBegin(__handle) (void)xTraceISRBegin((TraceISRHandle_t)(__handle)) + +/** + * @brief + * + * Registers the end of an Interrupt Service Routine. + * + * The parameter pendingISR indicates if the interrupt has requested a + * task-switch (= 1), e.g., by signaling a semaphore. Otherwise (= 0) the + * interrupt is assumed to return to the previous context. + * + * Example: + * #define PRIO_ISR_TIMER1 3 // the hardware priority of the interrupt + * ... + * TraceISRHandle_t Timer1Handle; + * xTraceISRRegister("ISRTimer1", PRIO_ISR_TIMER1, &Timer1Handle); + * ... + * void ISR_handler() + * { + * xTraceISRBegin(Timer1Handle); + * ... + * xTraceISREnd(0); + * } + * + * @param[in] pendingISR Flag that indicates whether an ISR is pending + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceISREnd(int pendingISR); + +#define vTraceStoreISREnd(__pendingISR) (void)xTraceISREnd(__pendingISR) + +/** + * @brief Query if recorder is enabled + * + * @retval 1 if recorder is enabled + * @retval 0 if recorder is disabled + */ +uint32_t xTraceIsRecorderEnabled(void); + +/** + * @brief + * + * @retval 1 if recorder is initialized + * @retval 0 if recorder isn't initialized + */ +uint32_t xTraceIsRecorderInitialized(void); + +/** + * @brief + * + * Creates an event that ends the current task instance at this very instant. + * This makes the viewer to splits the current fragment at this point and begin + * a new actor instance, even if no task-switch has occurred. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskInstanceFinishedNow(void); + +/** + * @brief + * + * Marks the current "task instance" as finished on the next kernel call. + * + * If that kernel call is blocking, the instance ends after the blocking event + * and the corresponding return event is then the start of the next instance. + * If the kernel call is not blocking, the viewer instead splits the current + * fragment right before the kernel call, which makes this call the first event + * of the next instance. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskInstanceFinishedNext(void); + +/** + * @brief Registers a string and returns a handle that can be used when tracing + * + * @param[in] label Label + * @param[out] pxString String handle + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStringRegister(const char* label, TraceStringHandle_t* pxString); + +/** + * @brief Registers a string and returns a handle that can be used when tracing + * + * @deprecated Backwards compatibility + * + * @param[in] name Name. + * + * @return TraceStringHandle_t String handle + */ +TraceStringHandle_t xTraceRegisterString(const char* name); + +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) +/** + * @brief + * + * Generates "User Events", with formatted text and data, similar to a "printf". + * User Events can be used for very efficient logging from your application code. + * It is very fast since the actual string formatting is done on the host side, + * when the trace is displayed. The execution time is just some microseconds on + * a 32-bit MCU. + * + * User Events are shown as yellow labels in the main trace view of $PNAME. + * + * An advantage of User Events is that data can be plotted in the "User Event + * Signal Plot" view, visualizing any data you log as User Events, discrete + * states or control system signals (e.g. system inputs or outputs). + * + * You may group User Events into User Event Channels. The yellow User Event + * labels show the logged string, preceded by the channel name within brackets. + * + * Example: + * + * "[MyChannel] Hello World!" + * + * The User Event Channels are shown in the View Filter, which makes it easy to + * select what User Events you wish to display. User Event Channels are created + * using xTraceStringRegister(). + * + * Example: + * + * TraceStringHandle_t adc_uechannel; + * xTraceStringRegister("ADC User Events", &adc_uechannel); + * ... + * xTracePrintF(adc_uechannel, + * "ADC channel %d: %d volts", + * ch, adc_reading); + * + * The following format specifiers are supported in both modes: + * %d - signed integer. + * %u - unsigned integer. + * %X - hexadecimal, uppercase. + * %x - hexadecimal, lowercase. + * %s - string (see comment below) + * + * For integer formats (%d, %u, %x, %X) you may also use width and padding. + * If using -42 as data argument, two examples are: + * "%05d" -> "-0042" + * "%5d" -> " -42". + * + * String arguments are supported in both snapshot and streaming, but in streaming + * mode you need to use xTraceStringRegister and use the returned TraceStringHandle_t as + * the argument. In snapshot you simply provide a char* as argument. + * + * Snapshot: xTracePrintF(myChn, "my string: %s", str); + * Streaming: xTracePrintF(myChn, "my string: %s", strTraceString); + * + * In snapshot mode you can specify 8-bit or 16-bit arguments to reduce RAM usage: + * %hd -> 16 bit (h) signed integer (d). + * %bu -> 8 bit (b) unsigned integer (u). + * + * However, in streaming mode all data arguments are assumed to be 32 bit wide. + * Width specifiers (e.g. %hd) are accepted but ignored (%hd treated like %d). + * + * The maximum event size also differs between the modes. In streaming this is + * limited by a maximum payload size of 52 bytes, including format string and + * data arguments. So if using one data argument, the format string is limited + * to 48 byte, etc. If this is exceeded, the format string is truncated and you + * get a warning in Tracealyzer. + * + * In snapshot mode you are limited to maximum 15 arguments, that must not exceed + * 32 bytes in total (not counting the format string). If exceeded, the recorder + * logs an internal error (displayed when opening the trace) and stops recording. + * + * @param[in] chn Channel. + * @param[in] fmt Formatting. + * @param[in] ... + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTracePrintF(TraceStringHandle_t chn, const char* fmt, ...); +#else +#define xTracePrintF(chn, fmt, ...) ((void)(chn), (void)(fmt), TRC_SUCCESS) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#endif + +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) +/** + * @brief + * + * xTracePrintF variant that accepts a va_list. + * See xTracePrintF documentation for further details. + * + * @param[in] eventLabel + * @param[in] formatStr + * @param[in] vl + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceVPrintF(TraceStringHandle_t eventLabel, const char* formatStr, va_list vl); +#else +#define xTraceVPrintF(chn, formatStr, vl) ((void)(chn), (void)(formatStr), (void)(vl), TRC_SUCCESS) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#endif + +#if (TRC_CFG_SCHEDULING_ONLY == 0) && (TRC_CFG_INCLUDE_USER_EVENTS == 1) +/** + * @brief A faster version of xTracePrintF, that only allows for logging a string. + * + * Example: + * + * TraceStringHandle_t chn; + * xTraceStringRegister("MyChannel", &chn); + * ... + * xTracePrint(chn, "Hello World!"); + * + * @param[in] chn Channel. + * @param[in] str String. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTracePrint(TraceStringHandle_t chn, const char* str); +#else +#define xTracePrint(chn, str) ((void)(chn), (void)(str), TRC_SUCCESS) +#endif + +/******************************************************************************/ +/*** Extended API for Snapshot mode *******************************************/ +/******************************************************************************/ + +/** + * @brief Trace stop callback type. + */ +typedef void(*TRACE_STOP_HOOK)(void); + +/** + * @brief Sets a function to be called when the recorder is stopped. + * + * @note Snapshot mode only! + * + * @param[in] stopHookFunction + */ +void vTraceSetStopHook(TRACE_STOP_HOOK stopHookFunction); + +/** + * @brief + * + * Resets the recorder. + * + * Only necessary if a restart is desired - this is not + * needed in the startup initialization. + * + * @note Snapshot mode only! + */ +void vTraceClear(void); + +/*****************************************************************************/ +/*** INTERNAL SNAPSHOT FUNCTIONS *********************************************/ +/*****************************************************************************/ + +#define TRC_UNUSED + +#ifndef TRC_CFG_INCLUDE_OBJECT_DELETE +#define TRC_CFG_INCLUDE_OBJECT_DELETE 0 +#endif + +#ifndef TRC_CFG_INCLUDE_READY_EVENTS +#define TRC_CFG_INCLUDE_READY_EVENTS 1 +#endif + +#ifndef TRC_CFG_INCLUDE_OSTICK_EVENTS +#define TRC_CFG_INCLUDE_OSTICK_EVENTS 0 +#endif + +/* This macro will create a task in the object table */ +#undef trcKERNEL_HOOKS_TASK_CREATE +#define trcKERNEL_HOOKS_TASK_CREATE(SERVICE, CLASS, pxTCB) \ + if ((pxTCB) != 0) \ + { \ + TRACE_SET_OBJECT_NUMBER(TASK, pxTCB); \ + TRACE_SET_OBJECT_FILTER(TASK, pxTCB, CurrentFilterGroup); \ + prvTraceSetObjectName(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_GET_TASK_NAME(pxTCB)); \ + prvTraceSetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_GET_TASK_PRIORITY(pxTCB)); \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); \ + } \ + else \ + { \ + /* pxTCB is null */ \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, 0); \ + } \ + } + +/* This macro will remove the task and store it in the event buffer */ +#undef trcKERNEL_HOOKS_TASK_DELETE +#define trcKERNEL_HOOKS_TASK_DELETE(SERVICE, SERVICE_NAME, SERVICE_PROP, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); \ + prvTraceStoreObjectNameOnCloseEvent(SERVICE_NAME, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_CLASS_TASK); \ + prvTraceStoreObjectPropertiesOnCloseEvent(SERVICE_PROP, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_CLASS_TASK); \ + prvTraceSetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TRACE_GET_TASK_PRIORITY(pxTCB)); \ + prvTraceSetObjectState(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), TASK_STATE_INSTANCE_NOT_ACTIVE); \ + prvTraceFreeObjectHandle(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); + + +/* This macro will setup a task in the object table */ +#undef trcKERNEL_HOOKS_OBJECT_CREATE +#define trcKERNEL_HOOKS_OBJECT_CREATE(SERVICE, CLASS, pxObject) \ + TRACE_SET_OBJECT_NUMBER(CLASS, pxObject); \ + TRACE_SET_OBJECT_FILTER(CLASS, pxObject, CurrentFilterGroup); \ + prvMarkObjectAsUsed(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject));\ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); \ + prvTraceSetObjectState(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), 0); + +/* This macro will setup a task in the object table */ +#undef trcKERNEL_HOOKS_OBJECT_CREATE_FAILED +#define trcKERNEL_HOOKS_OBJECT_CREATE_FAILED(SERVICE, TRACE_CLASS)\ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + { \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS, 0); \ + } + +/* This macro will remove the object and store it in the event buffer */ +#undef trcKERNEL_HOOKS_OBJECT_DELETE +#define trcKERNEL_HOOKS_OBJECT_DELETE(SERVICE, SERVICE_NAME, SERVICE_PROP, CLASS, pxObject) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); \ + prvTraceStoreObjectNameOnCloseEvent(SERVICE_NAME, TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject)); \ + prvTraceStoreObjectPropertiesOnCloseEvent(SERVICE_PROP, TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject)); \ + prvTraceFreeObjectHandle(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE +#define trcKERNEL_HOOKS_KERNEL_SERVICE(SERVICE, CLASS, pxObject) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); + +/* This macro will create a call to a kernel service with a certain result, with a null object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT(SERVICE, TRACECLASS) \ + if (TRACE_GET_TASK_FILTER(TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACECLASS, 0); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM(SERVICE, CLASS, pxObject, param) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), (uint32_t)param); + +/* This macro will create a call to a kernel service with a certain result, with a null object and other value as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM(SERVICE, TRACECLASS, param) \ + if (TRACE_GET_TASK_FILTER(TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACECLASS, 0, param); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY(SERVICE, param) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, (uint32_t)param); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_FROM_ISR(SERVICE, CLASS, pxObject) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject)); + +/* This macro will create a call to a kernel service with a certain result, with a null object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_FROM_ISR(SERVICE, TRACECLASS) \ + prvTraceStoreKernelCall(SERVICE, TRACECLASS, 0); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_PARAM_FROM_ISR(SERVICE, CLASS, pxObject, param) \ + if (TRACE_GET_OBJECT_FILTER(CLASS, pxObject) & CurrentFilterMask) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), (uint32_t)param); + +/* This macro will create a call to a kernel service with a certain result, with a null object and other value as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_NULL_OBJECT_WITH_PARAM_FROM_ISR(SERVICE, TRACECLASS, param) \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACECLASS, 0, param); + +/* This macro will create a call to a kernel service with a certain result, with an object as parameter */ +#undef trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY_FROM_ISR +#define trcKERNEL_HOOKS_KERNEL_SERVICE_WITH_NUMERIC_PARAM_ONLY_FROM_ISR(SERVICE, param) \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, (uint32_t)param); + +/* This macro will set the state for an object */ +#undef trcKERNEL_HOOKS_SET_OBJECT_STATE +#define trcKERNEL_HOOKS_SET_OBJECT_STATE(CLASS, pxObject, STATE) \ + prvTraceSetObjectState(TRACE_GET_OBJECT_TRACE_CLASS(CLASS, pxObject), TRACE_GET_OBJECT_NUMBER(CLASS, pxObject), (uint8_t)STATE); + +/* This macro will flag a certain task as a finished instance */ +#undef trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED +#define trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED() \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + prvTraceSetTaskInstanceFinished(TRACE_GET_TASK_NUMBER(TRACE_GET_CURRENT_TASK())); + +#if (TRC_CFG_INCLUDE_READY_EVENTS == 1) +/* This macro will create an event to indicate that a task became Ready */ +#undef trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE +#define trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE(pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreTaskReady(TRACE_GET_TASK_NUMBER(pxTCB)); +#else /*(TRC_CFG_INCLUDE_READY_EVENTS == 1)*/ +#undef trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE +#define trcKERNEL_HOOKS_MOVED_TASK_TO_READY_STATE(pxTCB) +#endif /*(TRC_CFG_INCLUDE_READY_EVENTS == 1)*/ + +/* This macro will update the internal tick counter and call prvTracePortGetTimeStamp(0) to update the internal counters */ +#undef trcKERNEL_HOOKS_INCREMENT_TICK +#define trcKERNEL_HOOKS_INCREMENT_TICK() \ + { \ + extern uint32_t uiTraceTickCount; \ + uiTraceTickCount++; \ + prvTracePortGetTimeStamp(0); \ + } + +#if (TRC_CFG_INCLUDE_OSTICK_EVENTS == 1) +/* This macro will create an event indicating that the OS tick count has increased */ +#undef trcKERNEL_HOOKS_NEW_TIME +#define trcKERNEL_HOOKS_NEW_TIME(SERVICE, xValue) \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, xValue); +#else /*(TRC_CFG_INCLUDE_OSTICK_EVENTS == 1)*/ +#undef trcKERNEL_HOOKS_NEW_TIME +#define trcKERNEL_HOOKS_NEW_TIME(SERVICE, xValue) +#endif /*(TRC_CFG_INCLUDE_OSTICK_EVENTS == 1)*/ + +/* This macro will create a task switch event to the currently executing task */ +#undef trcKERNEL_HOOKS_TASK_SWITCH +#define trcKERNEL_HOOKS_TASK_SWITCH( pxTCB ) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreTaskswitch(TRACE_GET_TASK_NUMBER(pxTCB)); + +/* This macro will create an event to indicate that the task has been suspended */ +#undef trcKERNEL_HOOKS_TASK_SUSPEND +#define trcKERNEL_HOOKS_TASK_SUSPEND(SERVICE, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); \ + prvTraceSetTaskInstanceFinished((uint8_t)TRACE_GET_TASK_NUMBER(pxTCB)); + +/* This macro will create an event to indicate that a task has called a wait/delay function */ +#undef trcKERNEL_HOOKS_TASK_DELAY +#define trcKERNEL_HOOKS_TASK_DELAY(SERVICE, pxTCB, xValue) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + { \ + prvTraceStoreKernelCallWithNumericParamOnly(SERVICE, xValue); \ + prvTraceSetTaskInstanceFinished((uint8_t)TRACE_GET_TASK_NUMBER(pxTCB)); \ + } + +/* This macro will create an event to indicate that a task has gotten its priority changed */ +#undef trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE +#define trcKERNEL_HOOKS_TASK_PRIORITY_CHANGE(SERVICE, pxTCB, uxNewPriority) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + { \ + prvTraceStoreKernelCallWithParam(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), prvTraceGetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)));\ + prvTraceSetPriorityProperty(TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB), (uint8_t)uxNewPriority); \ + } + +/* This macro will create an event to indicate that the task has been resumed */ +#undef trcKERNEL_HOOKS_TASK_RESUME +#define trcKERNEL_HOOKS_TASK_RESUME(SERVICE, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, TRACE_GET_CURRENT_TASK()) & CurrentFilterMask) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); + +/* This macro will create an event to indicate that the task has been resumed from ISR */ +#undef trcKERNEL_HOOKS_TASK_RESUME_FROM_ISR +#define trcKERNEL_HOOKS_TASK_RESUME_FROM_ISR(SERVICE, pxTCB) \ + if (TRACE_GET_OBJECT_FILTER(TASK, pxTCB) & CurrentFilterMask) \ + prvTraceStoreKernelCall(SERVICE, TRACE_CLASS_TASK, TRACE_GET_TASK_NUMBER(pxTCB)); + +#if !defined TRC_CFG_INCLUDE_READY_EVENTS || TRC_CFG_INCLUDE_READY_EVENTS == 1 +/** + * @brief Dynamically enables ready events + * + * @param[in] flag Flag + */ +void prvTraceSetReadyEventsEnabled(uint32_t flag); + +/** + * @brief Stores a Task Ready event + * + * @param[in] handle Task handle + */ +void prvTraceStoreTaskReady(traceHandle handle); +#else +#define prvTraceSetReadyEventsEnabled(status) (void)status; +#endif + +/** + * @brief Stores a Low Power mode event + * + * @param[in] flag Flag + */ +void prvTraceStoreLowPower(uint32_t flag); + +/** + * @brief Stores a Task Switch event + * + * @param[in] task_handle Task + */ +void prvTraceStoreTaskswitch(traceHandle task_handle); + +#if (TRC_CFG_SCHEDULING_ONLY == 0) + +/** + * @brief Stores a Kernel Service call event with an Object handle parameter + * + * @param[in] eventcode Event code + * @param[in] objectClass Object class + * @param[in] objectNumber Object handle + */ +void prvTraceStoreKernelCall(uint32_t eventcode, traceObjectClass objectClass, uint32_t objectNumber); + +/** + * @brief Stores a Kernel Service call event with only a numeric parameter + * + * @param[in] evtcode Event code + * @param[in] param Parameter + */ +void prvTraceStoreKernelCallWithNumericParamOnly(uint32_t evtcode, uint32_t param); + +/** + * @brief Stores a Kernel Service call event with an Object handle and a numeric parameter + * + * @param[in] evtcode Event code + * @param[in] objectClass Object class + * @param[in] objectNumber Object handle + * @param[in] param Parameter + */ +void prvTraceStoreKernelCallWithParam(uint32_t evtcode, traceObjectClass objectClass, + uint32_t objectNumber, uint32_t param); +#else + +#define prvTraceStoreKernelCall(eventcode, objectClass, byteParam) {} +#define prvTraceStoreKernelCallWithNumericParamOnly(evtcode, param) {} +#define prvTraceStoreKernelCallWithParam(evtcode, objectClass, objectNumber, param) {} + +#endif + +/** + * @brief Flags a task instance as finished + * + * @param[in] handle Task handle + */ +void prvTraceSetTaskInstanceFinished(traceHandle handle); + +/** + * @brief Set priority + * + * @param[in] objectclass Object class + * @param[in] id Object handle + * @param[in] value Value + */ +void prvTraceSetPriorityProperty(uint8_t objectclass, traceHandle id, uint8_t value); + +/** + * @brief Get priority + * + * @param[in] objectclass Object class + * @param[in] id Object handle + * + * @return uint8_t Value + */ +uint8_t prvTraceGetPriorityProperty(uint8_t objectclass, traceHandle id); + +/** + * @brief Set object state + * + * @param[in] objectclass Object class + * @param[in] id Object handle + * @param[in] value Value + */ +void prvTraceSetObjectState(uint8_t objectclass, traceHandle id, uint8_t value); + +/** + * @brief Mark object as used + * + * @param[in] objectclass Object class + * @param[in] handle Object handle + */ +void prvMarkObjectAsUsed(traceObjectClass objectclass, traceHandle handle); + +/** + * @brief Stores the name of an object because it is being deleted + * + * @param[in] evtcode Event code + * @param[in] handle Object handle + * @param[in] objectclass Object class + */ +void prvTraceStoreObjectNameOnCloseEvent(uint8_t evtcode, traceHandle handle, + traceObjectClass objectclass); + +/** + * @brief Stores the property of an object because it is being deleted + * + * @param[in] evtcode Event code + * @param[in] handle Object handle + * @param[in] objectclass Object class + */ +void prvTraceStoreObjectPropertiesOnCloseEvent(uint8_t evtcode, traceHandle handle, + traceObjectClass objectclass); + +/* Internal constants for task state */ +#define TASK_STATE_INSTANCE_NOT_ACTIVE 0 +#define TASK_STATE_INSTANCE_ACTIVE 1 + + +#if (TRC_CFG_INCLUDE_ISR_TRACING == 0) + +#undef vTraceSetISRProperties +#define vTraceSetISRProperties(handle, name, priority) (void)(handle), (void)(name), (void)(priority) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ + +#undef vTraceStoreISRBegin +#define vTraceStoreISRBegin(x) (void)(x) + +#undef vTraceStoreISREnd +#define vTraceStoreISREnd(x) (void)(x) + +#undef xTraceSetISRProperties +#define xTraceSetISRProperties(name, priority) ((void)(name), (void)(priority), (traceHandle)0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ + +#endif /*(TRC_CFG_INCLUDE_ISR_TRACING == 0)*/ + +/** + * @brief + * + * Returns a pointer to the recorder data structure. Use this together with + * uiTraceGetTraceBufferSize if you wish to implement an own store/upload + * solution, e.g., in case a debugger connection is not available for uploading + * the data. + * + * @return void* Buffer pointer + */ +void* xTraceGetTraceBuffer(void); + +/** + * @brief + * + * Gets the size of the recorder data structure. For use together with + * xTraceGetTraceBuffer if you wish to implement an own store/upload solution, + * e.g., in case a debugger connection is not available for uploading the data. + * + * @return uint32_t Buffer size + */ +uint32_t uiTraceGetTraceBufferSize(void); + +#if (TRC_CFG_SCHEDULING_ONLY == 1) +#undef TRC_CFG_INCLUDE_USER_EVENTS +#define TRC_CFG_INCLUDE_USER_EVENTS 0 +#endif /*(TRC_CFG_SCHEDULING_ONLY == 1)*/ + +#if ((TRC_CFG_INCLUDE_USER_EVENTS == 1) && (TRC_CFG_SCHEDULING_ONLY == 0)) && (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) + +/** + * @brief Register a channel and fixed format string for use with the separate User Event Buffer functions + * + * @param[in] channel Channel name handle + * @param[in] formatStr Format string that will be used for all events on this channel + * + * @return traceUBChannel Channel handle + */ +traceUBChannel xTraceRegisterUBChannel(TraceStringHandle_t channel, TraceStringHandle_t formatStr); + +/** + * @brief Creates a User Event using the channel, previously set format string and data parameters + * + * @param[in] channel Channel + * @param[in] ... + */ +void vTraceUBData(traceUBChannel channel, ...); + +/** + * @brief Creates a User Event using the channel and previously set string + * + * @param[in] channel Channel + */ +void vTraceUBEvent(traceUBChannel channel); +#else +#define xTraceRegisterChannelFormat(eventLabel, formatStr) ((void)(eventLabel), (void)(formatStr), 0) +#define vTraceUBData(label, ...) (void)(label) +#endif /*(TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1)*/ + +#define NEventCodes 0x100 + +/* Our local critical sections for the recorder */ +#define trcCRITICAL_SECTION_BEGIN() {TRACE_ENTER_CRITICAL_SECTION(); recorder_busy++;} +#define trcCRITICAL_SECTION_END() {recorder_busy--; TRACE_EXIT_CRITICAL_SECTION();} + +#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M) + #define trcSR_ALLOC_CRITICAL_SECTION_ON_CORTEX_M_ONLY TRACE_ALLOC_CRITICAL_SECTION + #define trcCRITICAL_SECTION_BEGIN_ON_CORTEX_M_ONLY trcCRITICAL_SECTION_BEGIN + #define trcCRITICAL_SECTION_END_ON_CORTEX_M_ONLY trcCRITICAL_SECTION_END +#else + #define trcSR_ALLOC_CRITICAL_SECTION_ON_CORTEX_M_ONLY() {} + #define trcCRITICAL_SECTION_BEGIN_ON_CORTEX_M_ONLY() recorder_busy++; + #define trcCRITICAL_SECTION_END_ON_CORTEX_M_ONLY() recorder_busy--; +#endif + +/** + * @brief Object handle stack struct. + * + * This data-structure is used to provide a mechanism for 1-byte trace object + * handles. This way, only 1 byte is necessary instead of 4 bytes (a pointer) + * when storing a reference to an object. This allows for up to 255 objects of + * each object class active at any given moment. There can be more "historic" + * objects, that have been deleted - that number is only limited by the size of + * the symbol table. + * + * Note that handle zero (0) is not used, it is a code for an invalid handle. + * + * This data structure keeps track of the FREE handles, not the handles in use. + * This data structure contains one stack per object class. When a handle is + * allocated to an object, the next free handle is popped from the stack. When + * a handle is released (on object delete), it is pushed back on the stack. + * Note that there is no initialization code that pushed the free handles + * initially, that is not necessary due to the following optimization: + * + * The stack of handles (objectHandles) is initially all zeros. Since zero + * is not a valid handle, that is a signal of additional handles needed. + * If a zero is received when popping a new handle, it is replaced by the + * index of the popped handle instead. + */ +typedef struct +{ + uint16_t indexOfNextAvailableHandle[ TRACE_NCLASSES ]; /**< For each object class, the index of the next handle to allocate */ + uint16_t lowestIndexOfClass[ TRACE_NCLASSES ]; /**< The lowest index of this class (constant) */ + uint16_t highestIndexOfClass[ TRACE_NCLASSES ]; /**< The highest index of this class (constant) */ + uint16_t handleCountWaterMarksOfClass[ TRACE_NCLASSES ]; /**< The highest use count for this class (for statistics) */ + traceHandle objectHandles[ TRACE_KERNEL_OBJECT_COUNT ]; /**< The free object handles - a set of stacks within this array */ +} objectHandleStackType; + +extern objectHandleStackType objectHandleStacks; + +/** + * @brief Object property table struct + * + * The Object Table contains name and other properties of the objects (tasks, + * queues, mutexes, etc). The below data structures defines the properties of + * each object class and are used to cast the byte buffer into a cleaner format. + * + * The values in the object table are continuously overwritten and always + * represent the current state. If a property is changed during runtime, the OLD + * value should be stored in the trace buffer, not the new value (since the new + * value is found in the Object Property Table). + * + * For close events this mechanism is the old names are stored in the symbol + * table), for "priority set" (the old priority is stored in the event data) + * and for "isActive", where the value decides if the task switch event type + * should be "new" or "resume". + */ +typedef struct +{ + /* = NCLASSES */ + uint32_t NumberOfObjectClasses; /**< */ + uint32_t ObjectPropertyTableSizeInBytes; /**< */ + + /* This is used to calculate the index in the dynamic object table + (handle - 1 - nofStaticObjects = index)*/ +#if (TRC_CFG_USE_16BIT_OBJECT_HANDLES == 1) + traceHandle NumberOfObjectsPerClass[2*((TRACE_NCLASSES+1)/2)]; /** */ +#else + traceHandle NumberOfObjectsPerClass[4*((TRACE_NCLASSES+3)/4)]; /** */ +#endif + /* Allocation size rounded up to the closest multiple of 4 */ + uint8_t NameLengthPerClass[ 4*((TRACE_NCLASSES+3)/4) ]; /**< */ + + /* Allocation size rounded up to the closest multiple of 2 */ + uint8_t TotalPropertyBytesPerClass[ 4*((TRACE_NCLASSES+3)/4) ]; /**< */ + + /* */ + uint16_t StartIndexOfClass[ 2*((TRACE_NCLASSES+1)/2) ]; /**< */ + + /* The actual handles issued, should be Initiated to all zeros */ + uint8_t objbytes[ 4*((TRACE_OBJECT_TABLE_SIZE+3)/4) ]; /**< */ +} ObjectPropertyTableType; + +/** + * @brief Symbol table structure + */ +typedef struct +{ + /* = SYMBOL_HISTORY_TABLE_SIZE_IN_BYTES */ + uint32_t symTableSize; /**< */ + + /* Entry 0 is reserved. Any reference to entry 0 implies NULL*/ + uint32_t nextFreeSymbolIndex; /**< */ + + /* Size rounded up to closest multiple of 4, to avoid alignment issues*/ + uint8_t symbytes[4*(((TRC_CFG_SYMBOL_TABLE_SIZE)+3)/4)]; /**< */ + + /* Used for lookups - Up to 64 linked lists within the symbol table + connecting all entries with the same 6 bit checksum. + This field holds the current list heads. Should be initiated to zeros */ + uint16_t latestEntryOfChecksum[64]; /**< */ +} symbolTableType; + + +/******************************************************************************* + * The data structures of the different events, all 4 bytes long + ******************************************************************************/ + +typedef struct +{ + uint8_t type; + uint8_t objHandle; + uint16_t dts; /* differential timestamp - time since last event */ +} TSEvent, TREvent; + +typedef struct +{ + uint8_t type; + uint8_t dummy; + uint16_t dts; /* differential timestamp - time since last event */ +} LPEvent; + +typedef struct +{ + uint8_t type; + uint8_t objHandle; + uint16_t dts; /* differential timestamp - time since last event */ +} KernelCall; + +typedef struct +{ + uint8_t type; + uint8_t objHandle; + uint8_t param; + uint8_t dts; /* differential timestamp - time since last event */ +} KernelCallWithParamAndHandle; + +typedef struct +{ + uint8_t type; + uint8_t dts; /* differential timestamp - time since last event */ + uint16_t param; +} KernelCallWithParam16; + +typedef struct +{ + uint8_t type; + uint8_t objHandle; /* the handle of the closed object */ + uint16_t symbolIndex; /* the name of the closed object */ +} ObjCloseNameEvent; + +typedef struct +{ + uint8_t type; + uint8_t arg1; + uint8_t arg2; + uint8_t arg3; +} ObjClosePropEvent; + +typedef struct +{ + uint8_t type; + uint8_t unused1; + uint8_t unused2; + uint8_t dts; +} TaskInstanceStatusEvent; + +typedef struct +{ + uint8_t type; + uint8_t dts; + uint16_t payload; /* the name of the user event */ +} UserEvent; + +typedef struct +{ + uint8_t type; + + /* 8 bits extra for storing DTS, if it does not fit in ordinary event + (this one is always MSB if used) */ + uint8_t xts_8; + + /* 16 bits extra for storing DTS, if it does not fit in ordinary event. */ + uint16_t xts_16; +} XTSEvent; + +typedef struct +{ + uint8_t type; + + uint8_t xps_8; + uint16_t xps_16; +} XPSEvent; + +typedef struct{ + uint8_t type; + uint8_t dts; + uint16_t size; +} MemEventSize; + +typedef struct{ + uint8_t type; + uint8_t addr_high; + uint16_t addr_low; +} MemEventAddr; + +/******************************************************************************* + * The separate user event buffer structure. Can be enabled in trcConfig.h. + ******************************************************************************/ + +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) +typedef struct +{ + TraceStringHandle_t name; + TraceStringHandle_t defaultFormat; +} ChannelFormatPair; + +typedef struct +{ + uint16_t bufferID; + uint16_t version; + uint32_t wraparoundCounter; + uint32_t numberOfSlots; + uint32_t nextSlotToWrite; + uint8_t numberOfChannels; + uint8_t padding1; + uint8_t padding2; + uint8_t padding3; + ChannelFormatPair channels[(TRC_CFG_UB_CHANNELS)+1]; + uint8_t channelBuffer[((TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) + 3) & 0xFFFFFFFC]; /* 1 byte per slot, with padding for 4 byte alignment */ + uint8_t dataBuffer[(TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE) * 4]; /* 4 bytes per slot */ + +} UserEventBuffer; +#endif /* (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) */ + +/******************************************************************************* + * The main data structure, read by Tracealyzer from the RAM dump + ******************************************************************************/ + +typedef struct +{ + volatile uint8_t startmarker0; /* Volatile is important, see init code. */ + volatile uint8_t startmarker1; + volatile uint8_t startmarker2; + volatile uint8_t startmarker3; + volatile uint8_t startmarker4; + volatile uint8_t startmarker5; + volatile uint8_t startmarker6; + volatile uint8_t startmarker7; + volatile uint8_t startmarker8; + volatile uint8_t startmarker9; + volatile uint8_t startmarker10; + volatile uint8_t startmarker11; + + /* Used to determine Kernel and Endianess */ + uint16_t version; + + /* Currently 7 */ + uint8_t minor_version; + + /* This should be 0 if lower IRQ priority values implies higher priority + levels, such as on ARM Cortex M. If the opposite scheme is used, i.e., + if higher IRQ priority values means higher priority, this should be 1. */ + uint8_t irq_priority_order; + + /* sizeof(RecorderDataType) - just for control */ + uint32_t filesize; + + /* Current number of events recorded */ + uint32_t numEvents; + + /* The buffer size, in number of event records */ + uint32_t maxEvents; + + /* The event buffer index, where to write the next event */ + uint32_t nextFreeIndex; + + /* 1 if the buffer is full, 0 otherwise */ + uint32_t bufferIsFull; + + /* The frequency of the clock/timer/counter used as time base */ + uint32_t frequency; + + /* The absolute timestamp of the last stored event, in the native + timebase, modulo frequency! */ + uint32_t absTimeLastEvent; + + /* The number of seconds in total - lasts for 136 years */ + uint32_t absTimeLastEventSecond; + + /* 1 if the recorder has been started, 0 if not yet started or stopped. + This is a 32 bit variable due to alignment issues. */ + uint32_t recorderActive; + + /* If > 0, tells the maximum time between two traced ISRs that execute + back-to-back. If the time between vTraceStoreISREnd and a directly + following vTraceISRBegin is above isrTailchainingThreshold, we assume a + return to the previous context in between the ISRs, otherwise we assume + the have executed back-to-back and don't show any fragment of the previous + context in between. */ + uint32_t isrTailchainingThreshold; + + /* The maximum amount of heap memory that was allocated */ + uint32_t heapMemMaxUsage; + + /* The amount of heap memory used */ + uint32_t heapMemUsage; + + /* 0xF0F0F0F0 - for control only */ + int32_t debugMarker0; + + /* Set to value of TRC_CFG_USE_16BIT_OBJECT_HANDLES */ + uint32_t isUsing16bitHandles; + + /* The Object Property Table holds information about currently active + tasks, queues, and other recorded objects. This is updated on each + create call and includes object name and other properties. */ + ObjectPropertyTableType ObjectPropertyTable; + + /* 0xF1F1F1F1 - for control only */ + int32_t debugMarker1; + + /* The Symbol Table stores strings for User Events and is also used to + store names of deleted objects, which still may be in the trace but no + longer are available. */ + symbolTableType SymbolTable; + + /* For inclusion of float support, and for endian detection of floats. + The value should be (float)1 or (uint32_t)0 */ +#if (TRC_CFG_INCLUDE_FLOAT_SUPPORT == 1) + float exampleFloatEncoding; +#else + uint32_t exampleFloatEncoding; +#endif + /* This is non-zero if an internal error occurred in the recorder, e.g., if + one of the Nxxx constants was too small. The systemInfo string will then + contain an error message that is displayed when attempting to view the + trace file. */ + uint32_t internalErrorOccured; + + /* 0xF2F2F2F2 - for control only */ + int32_t debugMarker2; + + /* Error messages from the recorder. */ + char systemInfo[80]; + + /* 0xF3F3F3F3 - for control only */ + int32_t debugMarker3; + + /* The event data, in 4-byte records */ + uint8_t eventData[ (TRC_CFG_EVENT_BUFFER_SIZE) * 4 ]; + +#if (TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER == 1) + UserEventBuffer userEventBuffer; +#endif + + /* This should always be 0 */ + uint32_t endOfSecondaryBlocks; + + uint8_t endmarker0; + uint8_t endmarker1; + uint8_t endmarker2; + uint8_t endmarker3; + uint8_t endmarker4; + uint8_t endmarker5; + uint8_t endmarker6; + uint8_t endmarker7; + uint8_t endmarker8; + uint8_t endmarker9; + uint8_t endmarker10; + uint8_t endmarker11; +} RecorderDataType; + +extern RecorderDataType* RecorderDataPtr; + +/* Internal functions */ + +/** + * @brief Signals a trace error + * + * @param[in] msg Message + */ +void prvTraceError(const char* msg); + +/** + * @brief + * + * Returns the current time based on the HWTC macros which provide a hardware + * isolation layer towards the hardware timer/counter. + * + * The HWTC macros and prvTracePortGetTimeStamp is the main porting issue + * or the trace recorder library. Typically you should not need to change + * the code of prvTracePortGetTimeStamp if using the HWTC macros. + * + * @param[out] puiTimestamp Timestamp + */ +void prvTracePortGetTimeStamp(uint32_t *puiTimestamp); + +/** + * @brief Reserve an object handle + * + * @param[in] objectclass Object class + * + * @return traceHandle + */ +traceHandle prvTraceGetObjectHandle(traceObjectClass objectclass); + +/** + * @brief Free an object handle + * + * @param[in] objectclass Object class + * @param[in] handle Handle + */ +void prvTraceFreeObjectHandle(traceObjectClass objectclass, + traceHandle handle); + +/* Private function. Use the public functions in trcKernelPort.h */ + +/** + * @brief Set the object name + * + * @param[in] objectclass Object class + * @param[in] handle Handle + * @param[in] name Name + */ +void prvTraceSetObjectName(traceObjectClass objectclass, + traceHandle handle, + const char* name); + +/* Internal macros */ + +#define TRACE_PROPERTY_NAME_GET(objectclass, objecthandle) \ + (const char*)(& RecorderDataPtr->ObjectPropertyTable.objbytes \ + [uiIndexOfObject(objecthandle, objectclass)]) + +#define TRACE_PROPERTY_OBJECT_STATE(objectclass, handle) \ + RecorderDataPtr->ObjectPropertyTable.objbytes[uiIndexOfObject(handle, objectclass) \ + + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[objectclass]] + +#define TRACE_PROPERTY_ACTOR_PRIORITY(objectclass, handle) \ + RecorderDataPtr->ObjectPropertyTable.objbytes[uiIndexOfObject(handle, objectclass) \ + + RecorderDataPtr->ObjectPropertyTable.NameLengthPerClass[objectclass] + 1] + +/* DEBUG ASSERTS */ +#if defined TRC_CFG_USE_TRACE_ASSERT && TRC_CFG_USE_TRACE_ASSERT != 0 +#define TRACE_ASSERT(eval, msg, defRetVal) \ + if (!(eval)) \ + { \ + prvTraceError("TRACE_ASSERT: " msg); \ + return defRetVal; \ + } +#else +#define TRACE_ASSERT(eval, msg, defRetVal) +#endif + +typedef RecorderDataType TraceRecorderDataBuffer_t; + +#endif /*(TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT)*/ + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#ifndef TRC_EXTERNAL_BUFFERS +#define TRC_EXTERNAL_BUFFERS 0 +#endif + +typedef struct TraceRecorderData +{ + uint32_t uiSessionCounter; + uint32_t uiRecorderEnabled; + uint32_t uiTraceSystemState; + + TraceAssertBuffer_t xAssertBuffer; +#if (TRC_EXTERNAL_BUFFERS == 0) + TraceHeaderBuffer_t xHeaderBuffer; + TraceEntryTableBuffer_t xEntryTableBuffer; + TraceTimestampBuffer_t xTimestampBuffer; +#endif + TraceStreamPortBuffer_t xStreamPortBuffer; + TraceStaticBufferBuffer_t xStaticBufferBuffer; + TraceEventDataBuffer_t xEventDataBuffer; + TracePrintBuffer_t xPrintBuffer; + TraceErrorBuffer_t xErrorBuffer; + TraceISRInfoBuffer_t xISRInfoBuffer; + TraceKernelPortDataBuffer_t xKernelPortBuffer; + TraceTaskInfoBuffer_t xTaskInfoBuffer; + TraceStackMonitorBuffer_t xStackMonitorBuffer; + TraceDiagnosticsBuffer_t xDiagnosticsBuffer; +} TraceRecorderData_t; + +extern TraceRecorderData_t* pxTraceRecorderData; +extern uint32_t RecorderInitialized; + +#define TRC_RECORDER_DATA_BUFFER_SIZE (sizeof(TraceRecorderData_t)) + +typedef struct TraceRecorderDataBuffer +{ + uint8_t buffer[(TRC_RECORDER_DATA_BUFFER_SIZE)]; +} TraceRecorderDataBuffer_t; + +/** + * @brief Initializes the header data + * + * @param[in] pxBuffer Pointer to header buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceHeaderInitialize(TraceHeaderBuffer_t* pxBuffer); + +/** + * @brief Query if recorder is enabled + * + * @retval 1 Recorder enabled + * @retval 0 Recorder not enabled + */ +#define xTraceIsRecorderEnabled() (xTraceIsRecorderInitialized() & pxTraceRecorderData->uiRecorderEnabled) + +/** + * @brief Query if recorder initialized + * + * @retval 1 Recorder initialized + * @retval 0 Recorder not initialized + */ +#define xTraceIsRecorderInitialized() xTraceIsComponentInitialized(TRC_RECORDER_COMPONENT_CORE) + +/** + * @brief Flag component as initialized + * + * @param[in] uiComponentBit Component bit + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceSetComponentInitialized(uiComponentBit) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(RecorderInitialized |= (uiComponentBit), TRC_SUCCESS) + +/** + * @brief Query if component is initialized + * + * @param[in] uiComponentBit Component bit + * + * @retval 1 Component initialized + * @retval 0 Component not initialized + */ +#define xTraceIsComponentInitialized(uiComponentBit) ((RecorderInitialized & (uiComponentBit)) ? 1 : 0) + +/** + * @brief Set the trace state + * + * @param[in] uiState State + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceStateSet(uiState) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(pxTraceRecorderData->uiTraceSystemState = (uiState), TRC_SUCCESS) + +/** + * @brief Query the trace state + * + * @param[out] puiState State + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceStateGet(puiState) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puiState) = pxTraceRecorderData->uiTraceSystemState, TRC_SUCCESS) + +/** + * @brief Call this function periodically + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTzCtrl(void); + +/******************************************************************************/ +/*** INTERNAL STREAMING FUNCTIONS *********************************************/ +/******************************************************************************/ + +/** + * @brief Stores an event without parameters + * + * @param[in] _eventID Event id + */ +#define prvTraceStoreEvent_None(_eventID) \ + { \ + TraceEventHandle_t _xEventHandle = 0; \ + if (xTraceEventBegin(_eventID, 0, &_xEventHandle) == TRC_SUCCESS) \ + { \ + xTraceEventEnd(_xEventHandle); \ + } \ + } + +/** + * @brief Stores an event with a handle parameter + * + * @param[in] _eventID Event id + * @param[in] _handle Handle + */ +#define prvTraceStoreEvent_Handle(_eventID, _handle) \ + { \ + TraceEventHandle_t _xEventHandle = 0; \ + if (xTraceEventBegin(_eventID, sizeof(void*), &_xEventHandle) == TRC_SUCCESS) \ + { \ + xTraceEventAddPointer(_xEventHandle, (void*)(_handle)); \ + xTraceEventEnd(_xEventHandle); \ + } \ + } + +/** + * @brief Stores an event with one 32-bit parameter + * + * @param[in] _eventID Event id + * @param[in] _param1 Param + */ +#define prvTraceStoreEvent_Param(_eventID, _param1) \ + { \ + TraceEventHandle_t _xEventHandle = 0; \ + if (xTraceEventBegin(_eventID, sizeof(uint32_t), &_xEventHandle) == TRC_SUCCESS) \ + { \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param1)); \ + xTraceEventEnd(_xEventHandle); \ + } \ + } + +/** + * @brief Stores an event with a handle and one 32-bit parameter + * + * @param[in] _eventID Event id + * @param[in] _handle Handle + * @param[in] _param1 Param + */ +#define prvTraceStoreEvent_HandleParam(_eventID, _handle, _param1) \ + { \ + TraceEventHandle_t _xEventHandle = 0; \ + if (xTraceEventBegin(_eventID, sizeof(void*) + sizeof(uint32_t), &_xEventHandle) == TRC_SUCCESS) \ + { \ + xTraceEventAddPointer(_xEventHandle, (void*)(_handle)); \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param1)); \ + xTraceEventEnd(_xEventHandle); \ + } \ + } + +/** + * @brief Stores an event with two 32-bit parameters + * + * @param[in] _eventID Event id + * @param[in] _param1 Param 1 + * @param[in] _param2 Param 2 + */ +#define prvTraceStoreEvent_ParamParam(_eventID, _param1, _param2) \ + { \ + TraceEventHandle_t _xEventHandle = 0; \ + if (xTraceEventBegin(_eventID, sizeof(uint32_t) + sizeof(uint32_t), &_xEventHandle) == TRC_SUCCESS) \ + { \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param1)); \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param2)); \ + xTraceEventEnd(_xEventHandle); \ + } \ + } + +/** + * @brief Stores an event with a handle and two 32-bit parameters + * + * @param[in] _eventID Event id + * @param[in] _handle Handle + * @param[in] _param1 Param 1 + * @param[in] _param2 Param 2 + */ +#define prvTraceStoreEvent_HandleParamParam(_eventID, _handle, _param1, _param2) \ + { \ + TraceEventHandle_t _xEventHandle = 0; \ + if (xTraceEventBegin(_eventID, sizeof(void*) + sizeof(uint32_t) + sizeof(uint32_t), &_xEventHandle) == TRC_SUCCESS) \ + { \ + xTraceEventAddPointer(_xEventHandle, (void*)(_handle)); \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param1)); \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param2)); \ + xTraceEventEnd(_xEventHandle); \ + } \ + } + +/** + * @brief Stores an event with three 32-bit parameters + * + * @param[in] _eventID Event id + * @param[in] _param1 Param 1 + * @param[in] _param2 Param 2 + * @param[in] _param3 Param 3 + */ +#define prvTraceStoreEvent_ParamParamParam(_eventID, _param1, _param2, _param3) \ + { \ + TraceEventHandle_t _xEventHandle = 0; \ + if (xTraceEventBegin(_eventID, sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t), &_xEventHandle) == TRC_SUCCESS) \ + { \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param1)); \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param2)); \ + xTraceEventAdd32(_xEventHandle, (uint32_t)(_param3)); \ + xTraceEventEnd(_xEventHandle); \ + } \ + } + +/** + * @brief Snapshot mode only. Trace stop hook. + * + * @param[in] x + */ +#define vTraceSetStopHook(x) (void)(x) + +/** + * @brief Snapshot mode only. Initialize timestamps. + */ +#define vTraceInitTimestamps() + +#endif /*(TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)*/ + +#if (TRC_CFG_RECORDER_BUFFER_ALLOCATION == TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM) +/** + * @brief Set the recorder data buffer + * + * @param[in] pxBuffer Pointer to the recorder data buffer + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceSetBuffer(TraceRecorderDataBuffer_t *pxBuffer); +#else +#define xTraceSetBuffer(p) (TRC_SUCCESS) +#endif + +/** + * @brief Retrieve the event buffer and event buffer size + * + * @param[out] ppvBuffer Pointer where event buffer pointer will be written + * @param[out] puiSize Event buffer size + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceGetEventBuffer(void** ppvBuffer, TraceUnsignedBaseType_t * puiSize); + +#else /* when TRC_USE_TRACEALYZER_RECORDER == 0 */ + +#define xTraceInitialize() (TRC_SUCCESS) +#define xTraceEnable(x) ((void)(x), TRC_SUCCESS) +#define xTraceDisable() (TRC_SUCCESS) +#define xTraceStringRegister(x, y) ((void)(x), (void)y, TRC_SUCCESS) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#define xTracePrint(chn, ...) ((void)(chn), TRC_SUCCESS) +#define xTracePrintF(chn, fmt, ...) ((void)(chn), (void)(fmt), TRC_SUCCESS) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#define xTraceVPrintF(chn, formatStr, vl) ((void)(chn), (void)(formatStr), (void)(vl), TRC_SUCCESS) /* Comma operator is used to avoid "unused variable" compiler warnings in a single statement */ +#define xTraceTaskInstanceFinishedNow() +#define xTraceTaskInstanceFinishedNext() +#define vTraceStoreISRBegin(x) (void)(x) +#define vTraceStoreISREnd(x) (void)(x) +#define xTraceSetISRProperties(a, b) ((void)(a), (void)(b), (traceHandle)0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#define xTraceRegisterChannelFormat(eventLabel, formatStr) ((void)(eventLabel), (void)(formatStr), 0) /* Comma operator in parenthesis is used to avoid "unused variable" compiler warnings and return 0 in a single statement */ +#define vTraceUBData(label, ...) (void)(label) + +#define vTraceSetFilterGroup(x) (void)(x) +#define vTraceSetFilterMask(x) (void)(x) + +#define prvTraceSetReadyEventsEnabled(status) (void)(status) + +#define vTraceExcludeTask(handle) (void)(handle) + +#define vTraceConsoleChannelPrintF(fmt, ...) (void)(fmt) + +#ifndef TRC_ALLOC_CUSTOM_BUFFER +#define TRC_ALLOC_CUSTOM_BUFFER(bufname) +#endif + +#define xTraceIsRecorderEnabled() (0) +#define xTraceIsRecorderInitialized() (0) + +#define xTraceSetBuffer(p) (TRC_SUCCESS) +#define xTraceGetEventBuffer(p) (TRC_FAIL) + +#define vTraceSetStopHook(x) (void)(x) + +#define TraceRecorderDataBuffer_t uint32_t + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +/** + * @deprecated Backwards compatibility. Use xTraceInitialize instead. + */ +#define vTraceInitialize (void)xTraceInitialize + +/** + * @deprecated Backwards compatibility. Use xTraceEnable instead. + */ +#define vTraceEnable (void)xTraceEnable + +/** + * @deprecated Backwards compatibility. Use xTraceDisable instead. + */ +#define vTraceStop (void)xTraceDisable + +/** + * @deprecated Backwards compatibility. Use xTraceTaskInstanceFinishedNow instead. + */ +#define vTraceInstanceFinishedNow (void)xTraceTaskInstanceFinishedNow + +/** + * @deprecated Backwards compatibility. Use xTraceTaskInstanceFinishedNext instead. + */ +#define vTraceInstanceFinishedNext (void)xTraceTaskInstanceFinishedNext + +/** + * @deprecated Backwards compatibility. Use xTracePrintF instead. + */ +#define vTracePrintF (void)xTracePrintF + +/** + * @deprecated Backwards compatibility. Use xTraceVPrintF instead. + */ +#define vTraceVPrintF (void)xTraceVPrintF + +/** + * @deprecated Backwards compatibility. Use xTracePrint instead. + */ +#define vTracePrint (void)xTracePrint + +/** + * @deprecated Backwards compatibility. Use xTraceSetBuffer instead. + */ +#define vTraceSetRecorderDataBuffer(pxBuffer) xTraceSetBuffer((TraceRecorderDataBuffer_t*)(pxBuffer)) + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_RECORDER_H */ diff --git a/freertos/cvitek/install/include/kernel/trcSnapshotConfig.h b/freertos/cvitek/install/include/kernel/trcSnapshotConfig.h new file mode 100644 index 000000000..485ac97ab --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcSnapshotConfig.h @@ -0,0 +1,245 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * Configuration parameters for trace recorder library in snapshot mode. + * Read more at http://percepio.com/2016/10/05/rtos-tracing/ + */ + +#ifndef TRC_SNAPSHOT_CONFIG_H +#define TRC_SNAPSHOT_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @def TRC_CFG_SNAPSHOT_MODE + * @brief Macro which should be defined as one of: + * - TRC_SNAPSHOT_MODE_RING_BUFFER + * - TRC_SNAPSHOT_MODE_STOP_WHEN_FULL + * Default is TRC_SNAPSHOT_MODE_RING_BUFFER. + * + * With TRC_CFG_SNAPSHOT_MODE set to TRC_SNAPSHOT_MODE_RING_BUFFER, the + * events are stored in a ring buffer, i.e., where the oldest events are + * overwritten when the buffer becomes full. This allows you to get the last + * events leading up to an interesting state, e.g., an error, without having + * to store the whole run since startup. + * + * When TRC_CFG_SNAPSHOT_MODE is TRC_SNAPSHOT_MODE_STOP_WHEN_FULL, the + * recording is stopped when the buffer becomes full. This is useful for + * recording events following a specific state, e.g., the startup sequence. + */ +#define TRC_CFG_SNAPSHOT_MODE TRC_SNAPSHOT_MODE_RING_BUFFER + +/** + * @def TRC_CFG_EVENT_BUFFER_SIZE + * @brief Macro which should be defined as an integer value. + * + * This defines the capacity of the event buffer, i.e., the number of records + * it may store. Most events use one record (4 byte), although some events + * require multiple 4-byte records. You should adjust this to the amount of RAM + * available in the target system. + * + * Default value is 1000, which means that 4000 bytes is allocated for the + * event buffer. + */ +#define TRC_CFG_EVENT_BUFFER_SIZE 8192 + +/** + * @def TRC_CFG_INCLUDE_FLOAT_SUPPORT + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If this is zero (0), the support for logging floating point values in + * vTracePrintF is stripped out, in case floating point values are not used or + * supported by the platform used. + * + * Floating point values are only used in vTracePrintF and its subroutines, to + * allow for storing float (%f) or double (%lf) arguments. + * + * vTracePrintF can be used with integer and string arguments in either case. + * + * Default value is 0. + */ +#define TRC_CFG_INCLUDE_FLOAT_SUPPORT 0 + +/** + * @def TRC_CFG_SYMBOL_TABLE_SIZE + * @brief Macro which should be defined as an integer value. + * + * This defines the capacity of the symbol table, in bytes. This symbol table + * stores User Events labels and names of deleted tasks, queues, or other kernel + * objects. If you don't use User Events or delete any kernel + * objects you set this to a very low value. The minimum recommended value is 4. + * A size of zero (0) is not allowed since a zero-sized array may result in a + * 32-bit pointer, i.e., using 4 bytes rather than 0. + * + * Default value is 800. + */ +#define TRC_CFG_SYMBOL_TABLE_SIZE 800 + +#if (TRC_CFG_SYMBOL_TABLE_SIZE == 0) +#error "TRC_CFG_SYMBOL_TABLE_SIZE may not be zero!" +#endif + +/****************************************************************************** + *** ADVANCED SETTINGS ******************************************************** + ****************************************************************************** + * The remaining settings are not necessary to modify but allows for optimizing + * the recorder setup for your specific needs, e.g., to exclude events that you + * are not interested in, in order to get longer traces. + *****************************************************************************/ + +/** + * @def TRC_CFG_HEAP_SIZE_BELOW_16M + * @brief An integer constant that can be used to reduce the buffer usage of memory + * allocation events (malloc/free). This value should be 1 if the heap size is + * below 16 MB (2^24 byte), and you can live with reported addresses showing the + * lower 24 bits only. If 0, you get the full 32-bit addresses. + * + * Default value is 0. + */ +#define TRC_CFG_HEAP_SIZE_BELOW_16M 0 + +/** + * @def TRC_CFG_USE_IMPLICIT_IFE_RULES + * @brief Macro which should be defined as either zero (0) or one (1). + * Default is 1. + * + * Tracealyzer groups the events into "instances" based on Instance Finish + * Events (IFEs), produced either by default rules or calls to the recorder + * functions xTraceTaskInstanceFinishedNow and xTraceTaskInstanceFinishedNext. + * + * If TRC_CFG_USE_IMPLICIT_IFE_RULES is one (1), the default IFE rules is + * used, resulting in a "typical" grouping of events into instances. + * If these rules don't give appropriate instances in your case, you can + * override the default rules using xTraceTaskInstanceFinishedNow/Next for one + * or several tasks. The default IFE rules are then disabled for those tasks. + * + * If TRC_CFG_USE_IMPLICIT_IFE_RULES is zero (0), the implicit IFE rules are + * disabled globally. You must then call xTraceTaskInstanceFinishedNow or + * xTraceTaskInstanceFinishedNext to manually group the events into instances, + * otherwise the tasks will appear a single long instance. + * + * The default IFE rules count the following events as "instance finished": + * - Task delay, delay until + * - Task suspend + * - Blocking on "input" operations, i.e., when the task is waiting for the + * next a message/signal/event. But only if this event is blocking. + */ +#define TRC_CFG_USE_IMPLICIT_IFE_RULES 1 + +/** + * @def TRC_CFG_USE_16BIT_OBJECT_HANDLES + * @brief Macro which should be defined as either zero (0) or one (1). + * + * If set to 0 (zero), the recorder uses 8-bit handles to identify kernel + * objects such as tasks and queues. This limits the supported number of + * concurrently active objects to 255 of each type (tasks, queues, mutexes, + * etc.) Note: 255, not 256, since handle 0 is reserved. + * + * If set to 1 (one), the recorder uses 16-bit handles to identify kernel + * objects such as tasks and queues. This limits the supported number of + * concurrent objects to 65535 of each type (object class). However, since the + * object property table is limited to 64 KB, the practical limit is about + * 3000 objects in total. + * + * Default is 0 (8-bit handles) + * + * NOTE: An object with handle above 255 will use an extra 4-byte record in + * the event buffer whenever the object is referenced. Moreover, some internal + * tables in the recorder gets slightly larger when using 16-bit handles. + */ +#define TRC_CFG_USE_16BIT_OBJECT_HANDLES 0 + +/** + * @def TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER + * @brief Macro which should be defined as an integer value. + * + * Set TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER to 1 to enable the + * separate user event buffer (UB). + * In this mode, user events are stored separately from other events, + * e.g., RTOS events. Thereby you can get a much longer history of + * user events as they don't need to share the buffer space with more + * frequent events. + * + * The UB is typically used with the snapshot ring-buffer mode, so the + * recording can continue when the main buffer gets full. And since the + * main buffer then overwrites the earliest events, Tracealyzer displays + * "Unknown Actor" instead of task scheduling for periods with UB data only. + * + * In UB mode, user events are structured as UB channels, which contains + * a channel name and a default format string. Register a UB channel using + * xTraceRegisterUBChannel. + * + * Events and data arguments are written using vTraceUBEvent and + * vTraceUBData. They are designed to provide efficient logging of + * repeating events, using the same format string within each channel. + * + * Examples: + * TraceStringHandle_t chn1; + * TraceStringHandle_t fmt1; + * xTraceStringRegister("Channel 1", &chn1); + * xTraceStringRegister("Event!", &fmt1); + * traceUBChannel UBCh1 = xTraceRegisterUBChannel(chn1, fmt1); + * + * TraceStringHandle_t chn2; + * TraceStringHandle_t fmt2; + * xTraceStringRegister("Channel 2", &chn2); + * xTraceStringRegister("X: %d, Y: %d", &fmt2); + * traceUBChannel UBCh2 = xTraceRegisterUBChannel(chn2, fmt2); + * + * // Result in "[Channel 1] Event!" + * vTraceUBEvent(UBCh1); + * + * // Result in "[Channel 2] X: 23, Y: 19" + * vTraceUBData(UBCh2, 23, 19); + * + * You can also use the other user event functions, like xTracePrintF. + * as they are then rerouted to the UB instead of the main event buffer. + * vTracePrintF then looks up the correct UB channel based on the + * provided channel name and format string, or creates a new UB channel + * if no match is found. The format string should therefore not contain + * "random" messages but mainly format specifiers. Random strings should + * be stored using %s and with the string as an argument. + * + * // Creates a new UB channel ("Channel 2", "%Z: %d") + * xTracePrintF(chn2, "%Z: %d", value1); + * + * // Finds the existing UB channel + * xTracePrintF(chn2, "%Z: %d", value2); + */ +#define TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER 0 + +/** + * @def TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE + * @brief Macro which should be defined as an integer value. + * + * This defines the capacity of the user event buffer (UB), in number of slots. + * A single user event can use multiple slots, depending on the arguments. + * + * Only applicable if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is 1. + */ +#define TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE 200 + +/** + * @def TRC_CFG_UB_CHANNELS + * @brief Macro which should be defined as an integer value. + * + * This defines the number of User Event Buffer Channels (UB channels). + * These are used to structure the events when using the separate user + * event buffer, and contains both a User Event Channel (the name) and + * a default format string for the channel. + * + * Only applicable if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is 1. + */ +#define TRC_CFG_UB_CHANNELS 32 + +#ifdef __cplusplus +} +#endif + +#endif /*TRC_SNAPSHOT_CONFIG_H*/ diff --git a/freertos/cvitek/install/include/kernel/trcStackMonitor.h b/freertos/cvitek/install/include/kernel/trcStackMonitor.h new file mode 100644 index 000000000..348d64d93 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcStackMonitor.h @@ -0,0 +1,135 @@ +/* +* Percepio Trace Recorder SDK for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace stack monitor APIs. + */ + +#ifndef TRC_STACK_MONITOR_H +#define TRC_STACK_MONITOR_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_stack_monitor_apis Trace Stack Monitor APIs + * @ingroup trace_recorder_apis + * @{ + */ + +#if (((TRC_CFG_ENABLE_STACK_MONITOR) == 1) && ((TRC_CFG_SCHEDULING_ONLY) == 0)) + +#define TRACE_STACK_MONITOR_BUFFER_SIZE ((sizeof(void*) + sizeof(TraceUnsignedBaseType_t)) * (TRC_CFG_STACK_MONITOR_MAX_TASKS) + sizeof(uint32_t)) + +/** + * @internal Trace Stack Monitor Buffer Structure + */ +typedef struct TraceStackMonitorBuffer +{ + uint32_t buffer[(TRACE_STACK_MONITOR_BUFFER_SIZE) / sizeof(uint32_t)]; +} TraceStackMonitorBuffer_t; + +/** + * @internal Initialize trace stack monitor system. + * + * @param[in] pxBuffer Pointer to memory that will be used by the trace + * stack monitor system. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStackMonitorInitialize(TraceStackMonitorBuffer_t* pxBuffer); + +/** + * @brief Adds task/thread to trace stack monitor. + * + * @param[in] pvTask Task/Thread. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStackMonitorAdd(void* pvTask); + +/** + * @brief Removes task/thread from trace stack monitor. + * + * @param[in] pvTask Task/Thread. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStackMonitorRemove(void* pvTask); + +/** + * @brief Gets trace stack monitor tread/task at index. + * + * @param[in] uiIndex Index. + * @param[in] ppvTask Task/Thread. + * @param[out] puxLowWaterMark Low water mark. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStackMonitorGetAtIndex(uint32_t uiIndex, void** ppvTask, TraceUnsignedBaseType_t* puxLowWaterMark); + +/** + * @brief Performs trace stack monitor reporting. + * + * This routine performs a trace stack monitor check and report + * for TRC_CFG_STACK_MONITOR_MAX_REPORTS number of registered + * tasks/threads. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStackMonitorReport(void); + +#else /* (((TRC_CFG_ENABLE_STACK_MONITOR) == 1) && ((TRC_CFG_SCHEDULING_ONLY) == 0)) */ + +typedef struct TraceStackMonitorBuffer +{ + uint32_t buffer[1]; +} TraceStackMonitorBuffer_t; + +#define xTraceStackMonitorInitialize(pxBuffer) ((void)pxBuffer, TRC_SUCCESS) + +#define xTraceStackMonitorDiagnosticsGet(xType, puiValue) ((void)xType, puiValue != 0 ? *puiValue = 0 : 0, puiValue != 0 ? TRC_SUCCESS : TRC_FAIL) + +#define xTraceStackMonitorDiagnosticsSet(xType, uiValue) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3((void)xType, (void)uiValue, TRC_SUCCESS) + +#define xTraceStackMonitorAdd(pvTask) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2((void)pvTask, TRC_SUCCESS) + +#define xTraceStackMonitorRemove(pvTask) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2((void)pvTask, TRC_SUCCESS) + +#define xTraceStackMonitorGetAtIndex(uiIndex, ppvTask, puxLowWaterMark) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4((void)uiIndex, (void)ppvTask, (void)puxLowWaterMark, TRC_SUCCESS) + +#define xTraceStackMonitorReport() TRC_COMMA_EXPR_TO_STATEMENT_EXPR_1(TRC_SUCCESS) + +#endif /* (((TRC_CFG_ENABLE_STACK_MONITOR) == 1) && ((TRC_CFG_SCHEDULING_ONLY) == 0)) */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_STACK_MONITOR_H */ diff --git a/freertos/cvitek/install/include/kernel/trcStateMachine.h b/freertos/cvitek/install/include/kernel/trcStateMachine.h new file mode 100644 index 000000000..b9d362ac5 --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcStateMachine.h @@ -0,0 +1,95 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace state machine APIs. + */ + +#ifndef TRC_STATE_MACHINE_H +#define TRC_STATE_MACHINE_H + +#include + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_state_machine_apis Trace State Machine APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Creates trace state machine. + * + * @param[in] szName Name. + * @param[out] pxStateMachineHandle Pointer to uninitialized trace state machine. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStateMachineCreate(const char *szName, TraceStateMachineHandle_t *pxStateMachineHandle); + +/** + * @brief Creates trace state machine state. + * + * @param[in] xStateMachineHandle Pointer to initialized trace state machine. + * @param[in] szName Name. + * @param[out] pxStateHandle Pointer to uninitialized trace state machine state. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStateMachineStateCreate(TraceStateMachineHandle_t xStateMachineHandle, const char *szName, TraceStateMachineStateHandle_t *pxStateHandle); + +/** + * @brief Sets trace state machine state. + * + * @param[in] xStateMachineHandle Pointer to initialized trace state machine. + * @param[in] xStateHandle Pointer to initialized trace state machine state. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStateMachineSetState(TraceStateMachineHandle_t xStateMachineHandle, TraceStateMachineStateHandle_t xStateHandle); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#else + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceStateMachineCreate(__szName, __pxStateMachineHandle) ((void)(__szName), *(__pxStateMachineHandle) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceStateMachineStateCreate(__xStateMachineHandle, __szName, __pxStateHandle) ((void)(__xStateMachineHandle), (void)(__szName), *(__pxStateHandle) = 0, TRC_SUCCESS) + +/** + * @brief Disabled by TRC_CFG_RECORDER_MODE + */ +#define xTraceStateMachineSetState(__xStateMachineHandle, __xStateHandle) ((void)(__xStateMachineHandle), (void)(__xStateHandle), TRC_SUCCESS) + +#endif + +#endif + +#endif diff --git a/freertos/cvitek/install/include/kernel/trcStaticBuffer.h b/freertos/cvitek/install/include/kernel/trcStaticBuffer.h new file mode 100644 index 000000000..c7a5531ab --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcStaticBuffer.h @@ -0,0 +1,112 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace static buffer APIs. + */ + +#ifndef TRC_STATIC_BUFFER_H +#define TRC_STATIC_BUFFER_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_static_buffer_apis Trace Static Buffer APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/* A buffer type that is maximum size */ +typedef uint8_t TraceStaticBuffer_t[TRC_MAX_BLOB_SIZE]; + +/** + * @internal Trace Core Static Buffer Core Structure + */ +typedef struct TraceCoreStaticBufferCore +{ + TraceStaticBuffer_t dummyEvents[(TRC_CFG_MAX_ISR_NESTING)+1]; /**< */ +} TraceCoreStaticBuffer_t; + +/** + * @internal Trace Static Buffer Table Structure + */ +typedef struct TraceStaticBufferTable +{ + TraceCoreStaticBuffer_t coreDummyEvents[TRC_CFG_CORE_COUNT]; /**< Temporary buffers used for event or blob creation. */ +} TraceStaticBufferTable_t; + +#define TRC_STATIC_BUFFER_BUFFER_SIZE (sizeof(TraceStaticBufferTable_t)) + +/** + * @internal Trace Static Buffer Buffer Structure + */ +typedef struct TraceStaticBufferBuffer +{ + uint8_t buffer[TRC_STATIC_BUFFER_BUFFER_SIZE]; /**< */ +} TraceStaticBufferBuffer_t; + +extern TraceStaticBufferTable_t* pxTraceStaticBufferTable; + +/** + * @internal Initialize trace static buffer. + * + * @param[in] pxBuffer Pointer to memory that will be used by the + * trace static buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStaticBufferInitialize(TraceStaticBufferBuffer_t* pxBuffer); + +#if ((TRC_CFG_USE_TRACE_ASSERT) == 1) + +/** + * @brief Gets trace static buffer. + * + * @param[out] ppvBuffer Buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStaticBufferGet(void **ppvBuffer); + +#else /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** + * @brief Gets trace static buffer. + * + * @param[out] ppvBuffer Buffer. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceStaticBufferGet(ppvBuffer) (*ppvBuffer = (void*)&pxTraceStaticBufferTable->coreDummyEvents[TRC_CFG_GET_CURRENT_CORE()].dummyEvents[xTraceISRGetCurrentNestingReturned() + 1], TRC_SUCCESS) + +#endif /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_STATIC_BUFFER_H */ diff --git a/freertos/cvitek/install/include/kernel/trcStreamingConfig.h b/freertos/cvitek/install/include/kernel/trcStreamingConfig.h new file mode 100644 index 000000000..bec4a8c6a --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcStreamingConfig.h @@ -0,0 +1,51 @@ +/* + * Trace Recorder for Tracealyzer v4.6.4 + * Copyright 2021 Percepio AB + * www.percepio.com + * + * SPDX-License-Identifier: Apache-2.0 + * + * Configuration parameters for the trace recorder library in streaming mode. + * Read more at http://percepio.com/2016/10/05/rtos-tracing/ + */ + +#ifndef TRC_STREAMING_CONFIG_H +#define TRC_STREAMING_CONFIG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @def TRC_CFG_ENTRY_SLOTS + * @brief The maximum number of objects and symbols that can be stored. This includes: + * - Task names + * - Named ISRs (vTraceSetISRProperties) + * - Named kernel objects (vTraceStoreKernelObjectName) + * - User event channels (xTraceStringRegister) + * + * If this value is too small, not all symbol names will be stored and the + * trace display will be affected. In that case, there will be warnings + * (as User Events) from TzCtrl task, that monitors this. + */ +#define TRC_CFG_ENTRY_SLOTS 50 + +/** + * @def TRC_CFG_ENTRY_SYMBOL_MAX_LENGTH + * @brief The maximum length of symbol names, including: + * - Task names + * - Named ISRs (vTraceSetISRProperties) + * - Named kernel objects (vTraceStoreKernelObjectName) + * - User event channel names (xTraceStringRegister) + * + * If longer symbol names are used, they will be truncated by the recorder, + * which will affect the trace display. In that case, there will be warnings + * (as User Events) from TzCtrl task, that monitors this. + */ +#define TRC_CFG_ENTRY_SYMBOL_MAX_LENGTH 32 + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_STREAMING_CONFIG_H */ diff --git a/freertos/cvitek/install/include/kernel/trcString.h b/freertos/cvitek/install/include/kernel/trcString.h new file mode 100644 index 000000000..330c9382f --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcString.h @@ -0,0 +1,76 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace string APIs. + */ + +#ifndef TRC_STRING_H +#define TRC_STRING_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_string_apis Trace String APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Registers a trace string. + * + * This routine registers a strings in the recorder, e.g. for names of user + * event channels. + * + * Example: + * TraceStringHandle_t myEventHandle; + * xTraceStringRegister("MyUserEvent", &myEventHandle); + * ... + * xTracePrintF(myEventHandle, "My value is: %d", myValue); + * + * @param[in] szString String. + * @param[out] pString Pointer to uninitialized trace string. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceStringRegister(const char *szString, TraceStringHandle_t* pString); + +/** + * @brief Registers a trace string. + * + * @deprecated Remains for backward compability with pre v4.6 versions + * of the recorder. + * + * @param[in] name Name. + * + * @return TraceStringHandle_t + */ +TraceStringHandle_t xTraceRegisterString(const char *name); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_STRING_H */ diff --git a/freertos/cvitek/install/include/kernel/trcTask.h b/freertos/cvitek/install/include/kernel/trcTask.h new file mode 100644 index 000000000..ab3757a9c --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcTask.h @@ -0,0 +1,243 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace task APIs. + */ + +#ifndef TRC_TASK_H +#define TRC_TASK_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_task_apis Trace Task APIs + * @ingroup trace_recorder_apis + * @{ + */ + +#ifndef TRC_CFG_ENABLE_STACK_MONITOR +#define TRC_CFG_ENABLE_STACK_MONITOR 0 +#endif + +/** + * @internal Trace Task Info Structure + */ +typedef struct TraceTaskInfo +{ + void* coreTasks[TRC_CFG_CORE_COUNT]; +} TraceTaskInfo_t; + +extern TraceTaskInfo_t* pxTraceTaskInfo; + +#define TRACE_TASK_INFO_BUFFER_SIZE (sizeof(TraceTaskInfo_t)) + +/** + * @internal Trace Task Info Buffer Structure + */ +typedef struct TraceTaskInfoBuffer +{ + uint8_t buffer[TRACE_TASK_INFO_BUFFER_SIZE]; +} TraceTaskInfoBuffer_t; + +/** + * @internal Initialize trace task system. + * + * @param[in] pxBuffer Pointer to memory that will be used by the + * trace task system. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskInitialize(TraceTaskInfoBuffer_t* pxBuffer); + +/** + * @brief Register trace task in the trace. + * + * @param[in] pvTask Task. + * @param[in] szName Name. + * @param[in] uxPriority Priority. + * @param[out] pxTaskHandle Pointer to uninitialized trace task. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTaskRegister(pvTask, szName, uxPriority, pxTaskHandle) ((((pvTask) != 0) && (xTraceObjectRegister(PSF_EVENT_TASK_CREATE, pvTask, szName, uxPriority, (TraceObjectHandle_t*)(pxTaskHandle)) == TRC_SUCCESS)) ? (xTraceStackMonitorAdd(pvTask), TRC_SUCCESS) : TRC_FAIL) + +/** + * @brief Unregister trace task from trace. + * + * @param[in] xTaskHandle Pointer to initialized trace task. + * @param[in] uxPriority Priority. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskUnregister(TraceTaskHandle_t xTaskHandle, TraceUnsignedBaseType_t uxPriority); + +/** + * @brief Sets trace task name. + * + * @param[in] pvTask Task. + * @param[in] szName Name. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTaskSetName xTraceObjectSetName + +/** + * @brief Sets trace task priority. + * + * @param[in] xTaskHandle Pointer to initialized trace task. + * @param[in] uxPriority Priority. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskSetPriority(TraceTaskHandle_t xTaskHandle, TraceUnsignedBaseType_t uxPriority); + +/** + * @brief Registers trace task without trace task handle. + * + * @param[in] pvTask Task. + * @param[in] szName Name. + * @param[in] uxPriority Priority. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTaskRegisterWithoutHandle(pvTask, szName, uxPriority) ((((pvTask) != 0) && (xTraceObjectRegisterWithoutHandle(PSF_EVENT_TASK_CREATE, pvTask, szName, uxPriority) == TRC_SUCCESS)) ? (xTraceStackMonitorAdd(pvTask), TRC_SUCCESS) : TRC_FAIL) + +/** + * @brief Unregisters trace task without trace task handle. + * + * @param[in] pvTask Task. + * @param[in] uxPriority Priority. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTaskUnregisterWithoutHandle(pvTask, uxPriority) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(xTraceStackMonitorRemove(pvTask), xTraceObjectUnregisterWithoutHandle(PSF_EVENT_TASK_DELETE, pvTask, uxPriority)) + +/** + * @brief Sets trace task name without trace task handle. + * + * @param[in] pvTask Task. + * @param[in] szName Name. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTaskSetNameWithoutHandle xTraceObjectSetNameWithoutHandle + +/** + * @brief Sets trace task priority without trace task handle. + * + * @param[in] pvTask Task. + * @param[in] uxPriority Priority. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskSetPriorityWithoutHandle(void* pvTask, TraceUnsignedBaseType_t uxPriority); + +/** + * @brief Registers trace task switch event. + * + * @param[in] pvTask Task. + * @param[in] uxPriority Priority. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskSwitch(void* pvTask, TraceUnsignedBaseType_t uxPriority); + +#if (TRC_CFG_INCLUDE_READY_EVENTS == 1) +/** + * @brief Registers trace task ready event. + * + * @param[in] pvTask Task. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskReady(void* pvTask); +#else +#define xTraceTaskReady(p) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2((void)p, TRC_SUCCESS) +#endif + +/** + * @brief Sets current trace task. + * + * @param[in] pvTask Task. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTaskSetCurrent(pvTask) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(pxTraceTaskInfo->coreTasks[TRC_CFG_GET_CURRENT_CORE()] = (pvTask), TRC_SUCCESS) + +/** + * @brief Gets current trace task. + * + * @param[out] ppvTask Task. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTaskGetCurrent(ppvTask) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(ppvTask) = pxTraceTaskInfo->coreTasks[TRC_CFG_GET_CURRENT_CORE()], TRC_SUCCESS) + +/** + * @brief Registers trace task instance finished event. + * + * This routine creates a trace event that ends the current task instance at + * this very instant. This makes the viewer split the current fragment at + * this point and begin a new actor instance, even if no task-switch has + * occurred + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskInstanceFinishedNow(void); + +/** + * @brief Marks the current trace task instance as finished on the next + * kernel call. + * + * If that kernel call is blocking, the instance ends after the blocking event + * and the corresponding return event is then the start of the next instance. + * If the kernel call is not blocking, the viewer instead splits the current + * fragment right before the kernel call, which makes this call the first event + * of the next instance. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTaskInstanceFinishedNext(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_TASK_H */ diff --git a/freertos/cvitek/install/include/kernel/trcTimestamp.h b/freertos/cvitek/install/include/kernel/trcTimestamp.h new file mode 100644 index 000000000..771314f4c --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcTimestamp.h @@ -0,0 +1,253 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +*/ + +/** + * @file + * + * @brief Public trace timestamp APIs. + */ + +#ifndef TRC_TIMESTAMP_H +#define TRC_TIMESTAMP_H + +#if (TRC_USE_TRACEALYZER_RECORDER == 1) + +#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup trace_timestamp_apis Trace Timestamp APIs + * @ingroup trace_recorder_apis + * @{ + */ + +/** + * @brief Trace Timestamp Structure + */ +typedef struct TraceTimestamp +{ + uint32_t type; /**< Timer type (direction) */ + TraceUnsignedBaseType_t frequency; /**< Timer Frequency */ + uint32_t period; /**< Timer Period */ + uint32_t wraparounds; /**< Nr of timer wraparounds */ + uint32_t osTickHz; /**< RTOS tick frequency */ + uint32_t latestTimestamp; /**< Latest timestamp */ + uint32_t osTickCount; /**< RTOS tick count */ +} TraceTimestamp_t; + +extern TraceTimestamp_t* pxTraceTimestamp; + +#define TRC_TIMESTAMP_RECORD_SIZE (sizeof(TraceTimestamp_t)) + +/** + * @internal Trace Timestamp Buffer Structure + */ +typedef struct TraceTimestampBuffer +{ + uint32_t buffer[(TRC_TIMESTAMP_RECORD_SIZE) / sizeof(uint32_t)]; +} TraceTimestampBuffer_t; + +/** + * @internal Initialize trace timestamp system. + * + * @param[in] pxBuffer Pointer to memory that will be used by the + * trace timestamp system. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampInitialize(TraceTimestampBuffer_t *pxBuffer); + +#if ((TRC_CFG_USE_TRACE_ASSERT) == 1) + +/** + * @brief Gets current trace timestamp. + * + * @param[out] puiTimestamp Timestamp. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampGet(uint32_t* puiTimestamp); + +/** + * @brief Gets trace timestamp wraparounds. + * + * @param[out] puiTimerWraparounds Timer wraparounds. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampGetWraparounds(uint32_t* puiTimerWraparounds); + +/** + * @brief Sets trace timestamp frequency. + * + * @param[in] uxFrequency Frequency. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampSetFrequency(TraceUnsignedBaseType_t uxFrequency); + +/** + * @brief Gets trace timestamp frequency. + * + * @param[out] puxFrequency Frequency. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampGetFrequency(TraceUnsignedBaseType_t* puxFrequency); + +/** + * @brief Sets trace timestamp period. + * + * @param[in] uiPeriod Period. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampSetPeriod(uint32_t uiPeriod); + +/** + * @brief Gets trace timestamp period. + * + * @param[out] puiPeriod Period. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampGetPeriod(uint32_t* puiPeriod); + +/** + * @brief Sets trace timestamp OS tick count. + * + * @param[in] uiOsTickCount OS tick count. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampSetOsTickCount(uint32_t uiOsTickCount); + +/** + * @brief Gets trace timestamp OS tick count. + * + * @param[in] puiOsTickCount + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +traceResult xTraceTimestampGetOsTickCount(uint32_t *puiOsTickCount); + +#else /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** + * @brief Gets current trace timestamp. + * + * @param[out] puiTimestamp Timestamp. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#if ((TRC_HWTC_TYPE == TRC_FREE_RUNNING_32BIT_INCR) || (TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_INCR)) +#define xTraceTimestampGet(puiTimestamp) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4(*(puiTimestamp) = TRC_HWTC_COUNT, (*(puiTimestamp) < pxTraceTimestamp->latestTimestamp) ? pxTraceTimestamp->wraparounds++ : 0, pxTraceTimestamp->latestTimestamp = *(puiTimestamp), TRC_SUCCESS) +#elif ((TRC_HWTC_TYPE == TRC_FREE_RUNNING_32BIT_DECR) || (TRC_HWTC_TYPE == TRC_CUSTOM_TIMER_DECR)) +#define xTraceTimestampGet(puiTimestamp) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4(*(puiTimestamp) = TRC_HWTC_COUNT, (*(puiTimestamp) > pxTraceTimestamp->latestTimestamp) ? pxTraceTimestamp->wraparounds++ : 0, pxTraceTimestamp->latestTimestamp = *(puiTimestamp), TRC_SUCCESS) +#elif ((TRC_HWTC_TYPE == TRC_OS_TIMER_INCR) || (TRC_HWTC_TYPE == TRC_OS_TIMER_DECR)) +#define xTraceTimestampGet(puiTimestamp) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4(*(puiTimestamp) = ((TRC_HWTC_COUNT) & 0x00FFFFFFU) + ((pxTraceTimestamp->osTickCount & 0x000000FFU) << 24), pxTraceTimestamp->wraparounds = pxTraceTimestamp->osTickCount, pxTraceTimestamp->latestTimestamp = *(puiTimestamp), TRC_SUCCESS) +#endif + +/** + * @brief Gets trace timestamp wraparounds. + * + * @param[out] puiTimerWraparounds Timer wraparounds. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTimestampGetWraparounds(puiTimerWraparounds) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puiTimerWraparounds) = pxTraceTimestamp->wraparounds, TRC_SUCCESS) + +/** + * @brief Sets trace timestamp frequency. + * + * @param[in] uxFrequency Frequency. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTimestampSetFrequency(uxFrequency) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(pxTraceTimestamp->frequency = uxFrequency, TRC_SUCCESS) + +/** + * @brief Sets trace timestamp period. + * + * @param[in] uiPeriod Period. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTimestampSetPeriod(uiPeriod) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(pxTraceTimestamp->period = uiPeriod, TRC_SUCCESS) + +/** + * @brief Sets trace timestamp OS tick count. + * + * @param[in] uiOsTickCount OS tick count. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTimestampSetOsTickCount(uiOsTickCount) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(pxTraceTimestamp->osTickCount = uiOsTickCount, TRC_SUCCESS) + +/** + * @brief Gets trace timestamp frequency. + * + * @param[out] puxFrequency Frequency. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTimestampGetFrequency(puxFrequency) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puxFrequency) = pxTraceTimestamp->frequency, TRC_SUCCESS) + +/** + * @brief Gets trace timestamp period. + * + * @param[out] puiPeriod Period. + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTimestampGetPeriod(puiPeriod) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puiPeriod) = pxTraceTimestamp->period, TRC_SUCCESS) + +/** + * @brief Gets trace timestamp OS tick count. + * + * @param[in] puiOsTickCount + * + * @retval TRC_FAIL Failure + * @retval TRC_SUCCESS Success + */ +#define xTraceTimestampGetOsTickCount(puiOsTickCount) TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(*(puiOsTickCount) = pxTraceTimestamp->osTickCount, TRC_SUCCESS) + +#endif /* ((TRC_CFG_USE_TRACE_ASSERT) == 1) */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) */ + +#endif /* (TRC_USE_TRACEALYZER_RECORDER == 1) */ + +#endif /* TRC_TIMESTAMP_H */ diff --git a/freertos/cvitek/install/include/kernel/trcTypes.h b/freertos/cvitek/install/include/kernel/trcTypes.h new file mode 100644 index 000000000..b58eba62e --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcTypes.h @@ -0,0 +1,73 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +* +* The common types. +*/ + +#ifndef TRC_TYPES_H +#define TRC_TYPES_H + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef TRC_BASE_TYPE +#define TRC_BASE_TYPE int32_t +#endif + +#ifndef TRC_UNSIGNED_BASE_TYPE +#define TRC_UNSIGNED_BASE_TYPE uint32_t +#endif + +typedef TRC_UNSIGNED_BASE_TYPE TraceUnsignedBaseType_t; + +typedef TRC_BASE_TYPE TraceBaseType_t; + +typedef TraceUnsignedBaseType_t traceResult; + +typedef TraceUnsignedBaseType_t TraceEventHandle_t; + +typedef TraceUnsignedBaseType_t TraceISRHandle_t; + +typedef TraceUnsignedBaseType_t TraceEntryHandle_t; + +typedef TraceUnsignedBaseType_t TraceTaskHandle_t; + +typedef TraceUnsignedBaseType_t TraceObjectHandle_t; + +typedef TraceUnsignedBaseType_t TraceExtensionHandle_t; + +typedef TraceUnsignedBaseType_t TraceHeapHandle_t; + +typedef TraceUnsignedBaseType_t TraceIntervalChannelSetHandle_t; + +typedef TraceUnsignedBaseType_t TraceIntervalChannelHandle_t; + +typedef TraceUnsignedBaseType_t TraceIntervalInstanceHandle_t; + +typedef TraceUnsignedBaseType_t TraceStateMachineHandle_t; + +typedef TraceUnsignedBaseType_t TraceStateMachineStateHandle_t; + +typedef TraceUnsignedBaseType_t TraceStringHandle_t; + +typedef TraceUnsignedBaseType_t TraceCounterHandle_t; + +typedef void (*TraceCounterCallback_t)(TraceCounterHandle_t xCounterHandle); + +/* DEPRECATED. Backwards compatibility */ +typedef TraceStringHandle_t traceString; + +#ifdef __cplusplus +} +#endif + +#endif /* TRC_TYPES_H */ diff --git a/freertos/cvitek/install/include/kernel/trcUtility.h b/freertos/cvitek/install/include/kernel/trcUtility.h new file mode 100644 index 000000000..ae4d880ef --- /dev/null +++ b/freertos/cvitek/install/include/kernel/trcUtility.h @@ -0,0 +1,51 @@ +/* +* Percepio Trace Recorder for Tracealyzer v4.6.4 +* Copyright 2021 Percepio AB +* www.percepio.com +* +* SPDX-License-Identifier: Apache-2.0 +* +* The interface for trace utility functions. +*/ + +#ifndef TRC_UTILITY_H +#define TRC_UTILITY_H + +#ifndef TRC_MEMCPY +#define TRC_MEMCPY(dst, src, size) \ + { \ + uint32_t __i; \ + for (__i = 0; __i < size; __i++) { \ + ((uint8_t*)(dst))[__i] = ((uint8_t*)(src))[__i]; \ + } \ + } +#endif + +#define TRC_STRCAT(dst, dst_size, pDstLength, src) \ + { \ + TraceUnsignedBaseType_t uxTRC_STRCAT_INDEX = 0; \ + while (*(pDstLength) < (dst_size)) \ + { \ + dst[*(pDstLength)] = src[uxTRC_STRCAT_INDEX]; \ + if (dst[*(pDstLength)] == 0) \ + break; \ + (*(pDstLength))++; \ + uxTRC_STRCAT_INDEX++; \ + } \ + } + +#if (defined(TRC_CFG_USE_GCC_STATEMENT_EXPR) && TRC_CFG_USE_GCC_STATEMENT_EXPR == 1) || __GNUC__ || __IAR_SYSTEMS_ICC__ || __TI_ARM__ + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_1(e1) __extension__({e1;}) + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(e1, e2) __extension__({e1; e2;}) + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3(e1, e2, e3) __extension__({e1; e2; e3;}) + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4(e1, e2, e3, e4) __extension__({e1; e2; e3; e4;}) + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_5(e1, e2, e3, e4, e5) __extension__({e1; e2; e3; e4; e5;}) +#else + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_1(e1) (e1) + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_2(e1, e2) (e1, e2) + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_3(e1, e2, e3) (e1, e2, e3) + #define TRC_COMMA_EXPR_TO_STATEMENT_EXPR_4(e1, e2, e3, e4) (e1, e2, e3, e4) + #define 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b/freertos/cvitek/scripts/ParseConfiguration.cmake new file mode 100644 index 000000000..c6b0426e1 --- /dev/null +++ b/freertos/cvitek/scripts/ParseConfiguration.cmake @@ -0,0 +1,29 @@ + +function(ParseConfiguration DotConfigFile) + if (NOT EXISTS ${DotConfigFile}) + message(FATAL_ERROR + "${DotConfigFile} not exist, + please source build/envsetup_soc.sh and defconfig relative board_defconfig") + endif() + file(READ "${DotConfigFile}" DotConfig) + string(REPLACE "\\\n" "" DotConfig ${DotConfig}) + string(REPLACE "\n" ";" DotConfLines ${DotConfig}) + list(REMOVE_ITEM DotConfLines "") + foreach(configline ${DotConfLines}) + string(REPLACE "=" ";" line_split ${configline}) + list(LENGTH line_split count) + if (count LESS 2) + continue() + endif() + list(GET line_split -1 value) + string(STRIP ${value} value) + separate_arguments(value) + list(REMOVE_AT line_split -1) + foreach(conf_name ${line_split}) + set(${conf_name} ${value} PARENT_SCOPE) + message("${conf_name}=${value}") +# add_definitions(-D${conf_name}=${value} ) + endforeach() + endforeach() +endfunction() + diff --git a/freertos/cvitek/scripts/checkpatch.pl b/freertos/cvitek/scripts/checkpatch.pl new file mode 100755 index 000000000..a8368d1c4 --- /dev/null +++ b/freertos/cvitek/scripts/checkpatch.pl @@ -0,0 +1,6285 @@ +#!/usr/bin/perl -w +# (c) 2001, Dave Jones. (the file handling bit) +# (c) 2005, Joel Schopp (the ugly bit) +# (c) 2007,2008, Andy Whitcroft (new conditions, test suite) +# (c) 2008-2010 Andy Whitcroft +# Licensed under the terms of the GNU GPL License version 2 + +use strict; +use POSIX; +use File::Basename; +use Cwd 'abs_path'; +use Term::ANSIColor qw(:constants); + +my $P = $0; +my $D = dirname(abs_path($P)); + +my $V = '0.32'; + +use Getopt::Long qw(:config no_auto_abbrev); + +my $quiet = 0; +my $tree = 1; +my $chk_signoff = 1; +my $chk_patch = 1; +my $tst_only; +my $emacs = 0; +my $terse = 0; +my $showfile = 0; +my $file = 0; +my $git = 0; +my %git_commits = (); +my $check = 0; +my $check_orig = 0; +my $summary = 1; +my $mailback = 0; +my $summary_file = 0; +my $show_types = 0; +my $list_types = 0; +my $fix = 0; +my $fix_inplace = 0; +my $root; +my %debug; +my %camelcase = (); +my %use_type = (); +my @use = (); +my %ignore_type = (); +my @ignore = (); +my $help = 0; +my $configuration_file = ".checkpatch.conf"; +my $max_line_length = 80; +my $ignore_perl_version = 0; +my $minimum_perl_version = 5.10.0; +my $min_conf_desc_length = 4; +my $spelling_file = "$D/spelling.txt"; +my $codespell = 0; +my $codespellfile = "/usr/share/codespell/dictionary.txt"; +my $conststructsfile = "$D/const_structs.checkpatch"; +my $color = 1; +my $allow_c99_comments = 1; + +sub help { + my ($exitcode) = @_; + + print << "EOM"; +Usage: $P [OPTION]... [FILE]... +Version: $V + +Options: + -q, --quiet quiet + --no-tree run without a kernel tree + --no-signoff do not check for 'Signed-off-by' line + --patch treat FILE as patchfile (default) + --emacs emacs compile window format + --terse one line per report + --showfile emit diffed file position, not input file position + -g, --git treat FILE as a single commit or git revision range + single git commit with: + + ^ + ~n + multiple git commits with: + .. + ... + - + git merges are ignored + -f, --file treat FILE as regular source file + --subjective, --strict enable more subjective tests + --list-types list the possible message types + --types TYPE(,TYPE2...) show only these comma separated message types + --ignore TYPE(,TYPE2...) ignore various comma separated message types + --show-types show the specific message type in the output + --max-line-length=n set the maximum line length, if exceeded, warn + --min-conf-desc-length=n set the min description length, if shorter, warn + --root=PATH PATH to the kernel tree root + --no-summary suppress the per-file summary + --mailback only produce a report in case of warnings/errors + --summary-file include the filename in summary + --debug KEY=[0|1] turn on/off debugging of KEY, where KEY is one of + 'values', 'possible', 'type', and 'attr' (default + is all off) + --test-only=WORD report only warnings/errors containing WORD + literally + --fix EXPERIMENTAL - may create horrible results + If correctable single-line errors exist, create + ".EXPERIMENTAL-checkpatch-fixes" + with potential errors corrected to the preferred + checkpatch style + --fix-inplace EXPERIMENTAL - may create horrible results + Is the same as --fix, but overwrites the input + file. It's your fault if there's no backup or git + --ignore-perl-version override checking of perl version. expect + runtime errors. + --codespell Use the codespell dictionary for spelling/typos + (default:/usr/share/codespell/dictionary.txt) + --codespellfile Use this codespell dictionary + --color Use colors when output is STDOUT (default: on) + -h, --help, --version display this help and exit + +When FILE is - read standard input. +EOM + + exit($exitcode); +} + +sub uniq { + my %seen; + return grep { !$seen{$_}++ } @_; +} + +sub list_types { + my ($exitcode) = @_; + + my $count = 0; + + local $/ = undef; + + open(my $script, '<', abs_path($P)) or + die "$P: Can't read '$P' $!\n"; + + my $text = <$script>; + close($script); + + my @types = (); + for ($text =~ /\b(?:(?:CHK|WARN|ERROR)\s*\(\s*"([^"]+)")/g) { + push (@types, $_); + } + @types = sort(uniq(@types)); + print("#\tMessage type\n\n"); + foreach my $type (@types) { + print(++$count . "\t" . $type . "\n"); + } + + exit($exitcode); +} + +my $conf = which_conf($configuration_file); +if (-f $conf) { + my @conf_args; + open(my $conffile, '<', "$conf") + or warn "$P: Can't find a readable $configuration_file file $!\n"; + + while (<$conffile>) { + my $line = $_; + + $line =~ s/\s*\n?$//g; + $line =~ s/^\s*//g; + $line =~ s/\s+/ /g; + + next if ($line =~ m/^\s*#/); + next if ($line =~ m/^\s*$/); + + my @words = split(" ", $line); + foreach my $word (@words) { + last if ($word =~ m/^#/); + push (@conf_args, $word); + } + } + close($conffile); + unshift(@ARGV, @conf_args) if @conf_args; +} + +GetOptions( + 'q|quiet+' => \$quiet, + 'tree!' => \$tree, + 'signoff!' => \$chk_signoff, + 'patch!' => \$chk_patch, + 'emacs!' => \$emacs, + 'terse!' => \$terse, + 'showfile!' => \$showfile, + 'f|file!' => \$file, + 'g|git!' => \$git, + 'subjective!' => \$check, + 'strict!' => \$check, + 'ignore=s' => \@ignore, + 'types=s' => \@use, + 'show-types!' => \$show_types, + 'list-types!' => \$list_types, + 'max-line-length=i' => \$max_line_length, + 'min-conf-desc-length=i' => \$min_conf_desc_length, + 'root=s' => \$root, + 'summary!' => \$summary, + 'mailback!' => \$mailback, + 'summary-file!' => \$summary_file, + 'fix!' => \$fix, + 'fix-inplace!' => \$fix_inplace, + 'ignore-perl-version!' => \$ignore_perl_version, + 'debug=s' => \%debug, + 'test-only=s' => \$tst_only, + 'codespell!' => \$codespell, + 'codespellfile=s' => \$codespellfile, + 'color!' => \$color, + 'h|help' => \$help, + 'version' => \$help +) or help(1); + +help(0) if ($help); + +list_types(0) if ($list_types); + +$fix = 1 if ($fix_inplace); +$check_orig = $check; + +my $exit = 0; + +if ($^V && $^V lt $minimum_perl_version) { + printf "$P: requires at least perl version %vd\n", $minimum_perl_version; + if (!$ignore_perl_version) { + exit(1); + } +} + +#if no filenames are given, push '-' to read patch from stdin +if ($#ARGV < 0) { + push(@ARGV, '-'); +} + +sub hash_save_array_words { + my ($hashRef, $arrayRef) = @_; + + my @array = split(/,/, join(',', @$arrayRef)); + foreach my $word (@array) { + $word =~ s/\s*\n?$//g; + $word =~ s/^\s*//g; + $word =~ s/\s+/ /g; + $word =~ tr/[a-z]/[A-Z]/; + + next if ($word =~ m/^\s*#/); + next if ($word =~ m/^\s*$/); + + $hashRef->{$word}++; + } +} + +sub hash_show_words { + my ($hashRef, $prefix) = @_; + + if (keys %$hashRef) { + print "\nNOTE: $prefix message types:"; + foreach my $word (sort keys %$hashRef) { + print " $word"; + } + print "\n"; + } +} + +hash_save_array_words(\%ignore_type, \@ignore); +hash_save_array_words(\%use_type, \@use); + +my $dbg_values = 0; +my $dbg_possible = 0; +my $dbg_type = 0; +my $dbg_attr = 0; +for my $key (keys %debug) { + ## no critic + eval "\${dbg_$key} = '$debug{$key}';"; + die "$@" if ($@); +} + +my $rpt_cleaners = 0; + +if ($terse) { + $emacs = 1; + $quiet++; +} + +if ($tree) { + if (defined $root) { + if (!top_of_kernel_tree($root)) { + die "$P: $root: --root does not point at a valid tree\n"; + } + } else { + if (top_of_kernel_tree('.')) { + $root = '.'; + } elsif ($0 =~ m@(.*)/scripts/[^/]*$@ && + top_of_kernel_tree($1)) { + $root = $1; + } + } + + if (!defined $root) { + print "Must be run from the top-level dir. of a kernel tree\n"; + exit(2); + } +} + +my $emitted_corrupt = 0; + +our $Ident = qr{ + [A-Za-z_][A-Za-z\d_]* + (?:\s*\#\#\s*[A-Za-z_][A-Za-z\d_]*)* + }x; +our $Storage = qr{extern|static|asmlinkage}; +our $Sparse = qr{ + __user| + __kernel| + __force| + __iomem| + __must_check| + __init_refok| + __kprobes| + __ref| + __rcu| + __private + }x; +our $InitAttributePrefix = qr{__(?:mem|cpu|dev|net_|)}; +our $InitAttributeData = qr{$InitAttributePrefix(?:initdata\b)}; +our $InitAttributeConst = qr{$InitAttributePrefix(?:initconst\b)}; +our $InitAttributeInit = qr{$InitAttributePrefix(?:init\b)}; +our $InitAttribute = qr{$InitAttributeData|$InitAttributeConst|$InitAttributeInit}; + +# Notes to $Attribute: +# We need \b after 'init' otherwise 'initconst' will cause a false positive in a check +our $Attribute = qr{ + const| + __percpu| + __nocast| + __safe| + __bitwise__| + __packed__| + __packed2__| + __naked| + __maybe_unused| + __always_unused| + __noreturn| + __used| + __cold| + __pure| + __noclone| + __deprecated| + __read_mostly| + __kprobes| + $InitAttribute| + ____cacheline_aligned| + ____cacheline_aligned_in_smp| + ____cacheline_internodealigned_in_smp| + __weak + }x; +our $Modifier; +our $Inline = qr{inline|__always_inline|noinline|__inline|__inline__}; +our $Member = qr{->$Ident|\.$Ident|\[[^]]*\]}; +our $Lval = qr{$Ident(?:$Member)*}; + +our $Int_type = qr{(?i)llu|ull|ll|lu|ul|l|u}; +our $Binary = qr{(?i)0b[01]+$Int_type?}; +our $Hex = qr{(?i)0x[0-9a-f]+$Int_type?}; +our $Int = qr{[0-9]+$Int_type?}; +our $Octal = qr{0[0-7]+$Int_type?}; +our $String = qr{"[X\t]*"}; +our $Float_hex = qr{(?i)0x[0-9a-f]+p-?[0-9]+[fl]?}; +our $Float_dec = qr{(?i)(?:[0-9]+\.[0-9]*|[0-9]*\.[0-9]+)(?:e-?[0-9]+)?[fl]?}; +our $Float_int = qr{(?i)[0-9]+e-?[0-9]+[fl]?}; +our $Float = qr{$Float_hex|$Float_dec|$Float_int}; +our $Constant = qr{$Float|$Binary|$Octal|$Hex|$Int}; +our $Assignment = qr{\*\=|/=|%=|\+=|-=|<<=|>>=|&=|\^=|\|=|=}; +our $Compare = qr{<=|>=|==|!=|<|(?}; +our $Arithmetic = qr{\+|-|\*|\/|%}; +our $Operators = qr{ + <=|>=|==|!=| + =>|->|<<|>>|<|>|!|~| + &&|\|\||,|\^|\+\+|--|&|\||$Arithmetic + }x; + +our $c90_Keywords = qr{do|for|while|if|else|return|goto|continue|switch|default|case|break}x; + +our $BasicType; +our $NonptrType; +our $NonptrTypeMisordered; +our $NonptrTypeWithAttr; +our $Type; +our $TypeMisordered; +our $Declare; +our $DeclareMisordered; + +our $NON_ASCII_UTF8 = qr{ + [\xC2-\xDF][\x80-\xBF] # non-overlong 2-byte + | \xE0[\xA0-\xBF][\x80-\xBF] # excluding overlongs + | [\xE1-\xEC\xEE\xEF][\x80-\xBF]{2} # straight 3-byte + | \xED[\x80-\x9F][\x80-\xBF] # excluding surrogates + | \xF0[\x90-\xBF][\x80-\xBF]{2} # planes 1-3 + | [\xF1-\xF3][\x80-\xBF]{3} # planes 4-15 + | \xF4[\x80-\x8F][\x80-\xBF]{2} # plane 16 +}x; + +our $UTF8 = qr{ + [\x09\x0A\x0D\x20-\x7E] # ASCII + | $NON_ASCII_UTF8 +}x; + +our $typeC99Typedefs = qr{(?:__)?(?:[us]_?)?int_?(?:8|16|32|64)_t}; +our $typeOtherOSTypedefs = qr{(?x: + u_(?:char|short|int|long) | # bsd + u(?:nchar|short|int|long) # sysv +)}; +our $typeKernelTypedefs = qr{(?x: + (?:__)?(?:u|s|be|le)(?:8|16|32|64)| + atomic_t +)}; +our $typeTypedefs = qr{(?x: + $typeC99Typedefs\b| + $typeOtherOSTypedefs\b| + $typeKernelTypedefs\b +)}; + +our $zero_initializer = qr{(?:(?:0[xX])?0+$Int_type?|NULL|false)\b}; + +our $logFunctions = qr{(?x: + printk(?:_ratelimited|_once|)| + (?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)| + WARN(?:_RATELIMIT|_ONCE|)| + panic| + MODULE_[A-Z_]+| + seq_vprintf|seq_printf|seq_puts +)}; + +our $signature_tags = qr{(?xi: + Signed-off-by:| + Acked-by:| + Tested-by:| + Reviewed-by:| + Reported-by:| + Suggested-by:| + To:| + Cc: +)}; + +our @typeListMisordered = ( + qr{char\s+(?:un)?signed}, + qr{int\s+(?:(?:un)?signed\s+)?short\s}, + qr{int\s+short(?:\s+(?:un)?signed)}, + qr{short\s+int(?:\s+(?:un)?signed)}, + qr{(?:un)?signed\s+int\s+short}, + qr{short\s+(?:un)?signed}, + qr{long\s+int\s+(?:un)?signed}, + qr{int\s+long\s+(?:un)?signed}, + qr{long\s+(?:un)?signed\s+int}, + qr{int\s+(?:un)?signed\s+long}, + qr{int\s+(?:un)?signed}, + qr{int\s+long\s+long\s+(?:un)?signed}, + qr{long\s+long\s+int\s+(?:un)?signed}, + qr{long\s+long\s+(?:un)?signed\s+int}, + qr{long\s+long\s+(?:un)?signed}, + qr{long\s+(?:un)?signed}, +); + +our @typeList = ( + qr{void}, + qr{(?:(?:un)?signed\s+)?char}, + qr{(?:(?:un)?signed\s+)?short\s+int}, + qr{(?:(?:un)?signed\s+)?short}, + qr{(?:(?:un)?signed\s+)?int}, + qr{(?:(?:un)?signed\s+)?long\s+int}, + qr{(?:(?:un)?signed\s+)?long\s+long\s+int}, + qr{(?:(?:un)?signed\s+)?long\s+long}, + qr{(?:(?:un)?signed\s+)?long}, + qr{(?:un)?signed}, + qr{float}, + qr{double}, + qr{bool}, + qr{struct\s+$Ident}, + qr{union\s+$Ident}, + qr{enum\s+$Ident}, + qr{${Ident}_t}, + qr{${Ident}_handler}, + qr{${Ident}_handler_fn}, + @typeListMisordered, +); + +our $C90_int_types = qr{(?x: + long\s+long\s+int\s+(?:un)?signed| + long\s+long\s+(?:un)?signed\s+int| + long\s+long\s+(?:un)?signed| + (?:(?:un)?signed\s+)?long\s+long\s+int| + (?:(?:un)?signed\s+)?long\s+long| + int\s+long\s+long\s+(?:un)?signed| + int\s+(?:(?:un)?signed\s+)?long\s+long| + + long\s+int\s+(?:un)?signed| + long\s+(?:un)?signed\s+int| + long\s+(?:un)?signed| + (?:(?:un)?signed\s+)?long\s+int| + (?:(?:un)?signed\s+)?long| + int\s+long\s+(?:un)?signed| + int\s+(?:(?:un)?signed\s+)?long| + + int\s+(?:un)?signed| + (?:(?:un)?signed\s+)?int +)}; + +our @typeListFile = (); +our @typeListWithAttr = ( + @typeList, + qr{struct\s+$InitAttribute\s+$Ident}, + qr{union\s+$InitAttribute\s+$Ident}, +); + +our @modifierList = ( + qr{fastcall}, +); +our @modifierListFile = (); + +our @mode_permission_funcs = ( + ["module_param", 3], + ["module_param_(?:array|named|string)", 4], + ["module_param_array_named", 5], + ["debugfs_create_(?:file|u8|u16|u32|u64|x8|x16|x32|x64|size_t|atomic_t|bool|blob|regset32|u32_array)", 2], + ["proc_create(?:_data|)", 2], + ["(?:CLASS|DEVICE|SENSOR|SENSOR_DEVICE|IIO_DEVICE)_ATTR", 2], + ["IIO_DEV_ATTR_[A-Z_]+", 1], + ["SENSOR_(?:DEVICE_|)ATTR_2", 2], + ["SENSOR_TEMPLATE(?:_2|)", 3], + ["__ATTR", 2], +); + +#Create a search pattern for all these functions to speed up a loop below +our $mode_perms_search = ""; +foreach my $entry (@mode_permission_funcs) { + $mode_perms_search .= '|' if ($mode_perms_search ne ""); + $mode_perms_search .= $entry->[0]; +} + +our $mode_perms_world_writable = qr{ + S_IWUGO | + S_IWOTH | + S_IRWXUGO | + S_IALLUGO | + 0[0-7][0-7][2367] +}x; + +our %mode_permission_string_types = ( + "S_IRWXU" => 0700, + "S_IRUSR" => 0400, + "S_IWUSR" => 0200, + "S_IXUSR" => 0100, + "S_IRWXG" => 0070, + "S_IRGRP" => 0040, + "S_IWGRP" => 0020, + "S_IXGRP" => 0010, + "S_IRWXO" => 0007, + "S_IROTH" => 0004, + "S_IWOTH" => 0002, + "S_IXOTH" => 0001, + "S_IRWXUGO" => 0777, + "S_IRUGO" => 0444, + "S_IWUGO" => 0222, + "S_IXUGO" => 0111, +); + +#Create a search pattern for all these strings to speed up a loop below +our $mode_perms_string_search = ""; +foreach my $entry (keys %mode_permission_string_types) { + $mode_perms_string_search .= '|' if ($mode_perms_string_search ne ""); + $mode_perms_string_search .= $entry; +} + +our $allowed_asm_includes = qr{(?x: + irq| + memory| + time| + reboot +)}; +# memory.h: ARM has a custom one + +# Load common spelling mistakes and build regular expression list. +my $misspellings; +my %spelling_fix; + +if (open(my $spelling, '<', $spelling_file)) { + while (<$spelling>) { + my $line = $_; + + $line =~ s/\s*\n?$//g; + $line =~ s/^\s*//g; + + next if ($line =~ m/^\s*#/); + next if ($line =~ m/^\s*$/); + + my ($suspect, $fix) = split(/\|\|/, $line); + + $spelling_fix{$suspect} = $fix; + } + close($spelling); +} else { + warn "No typos will be found - file '$spelling_file': $!\n"; +} + +if ($codespell) { + if (open(my $spelling, '<', $codespellfile)) { + while (<$spelling>) { + my $line = $_; + + $line =~ s/\s*\n?$//g; + $line =~ s/^\s*//g; + + next if ($line =~ m/^\s*#/); + next if ($line =~ m/^\s*$/); + next if ($line =~ m/, disabled/i); + + $line =~ s/,.*$//; + + my ($suspect, $fix) = split(/->/, $line); + + $spelling_fix{$suspect} = $fix; + } + close($spelling); + } else { + warn "No codespell typos will be found - file '$codespellfile': $!\n"; + } +} + +$misspellings = join("|", sort keys %spelling_fix) if keys %spelling_fix; + +my $const_structs = ""; +if (open(my $conststructs, '<', $conststructsfile)) { + while (<$conststructs>) { + my $line = $_; + + $line =~ s/\s*\n?$//g; + $line =~ s/^\s*//g; + + next if ($line =~ m/^\s*#/); + next if ($line =~ m/^\s*$/); + if ($line =~ /\s/) { + print("$conststructsfile: '$line' invalid - ignored\n"); + next; + } + + $const_structs .= '|' if ($const_structs ne ""); + $const_structs .= $line; + } + close($conststructsfile); +} else { + warn "No structs that should be const will be found - file '$conststructsfile': $!\n"; +} + +sub build_types { + my $mods = "(?x: \n" . join("|\n ", (@modifierList, @modifierListFile)) . "\n)"; + my $all = "(?x: \n" . join("|\n ", (@typeList, @typeListFile)) . "\n)"; + my $Misordered = "(?x: \n" . join("|\n ", @typeListMisordered) . "\n)"; + my $allWithAttr = "(?x: \n" . join("|\n ", @typeListWithAttr) . "\n)"; + $Modifier = qr{(?:$Attribute|$Sparse|$mods)}; + $BasicType = qr{ + (?:$typeTypedefs\b)| + (?:${all}\b) + }x; + $NonptrType = qr{ + (?:$Modifier\s+|const\s+)* + (?: + (?:typeof|__typeof__)\s*\([^\)]*\)| + (?:$typeTypedefs\b)| + (?:${all}\b) + ) + (?:\s+$Modifier|\s+const)* + }x; + $NonptrTypeMisordered = qr{ + (?:$Modifier\s+|const\s+)* + (?: + (?:${Misordered}\b) + ) + (?:\s+$Modifier|\s+const)* + }x; + $NonptrTypeWithAttr = qr{ + (?:$Modifier\s+|const\s+)* + (?: + (?:typeof|__typeof__)\s*\([^\)]*\)| + (?:$typeTypedefs\b)| + (?:${allWithAttr}\b) + ) + (?:\s+$Modifier|\s+const)* + }x; + $Type = qr{ + $NonptrType + (?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+)? + (?:\s+$Inline|\s+$Modifier)* + }x; + $TypeMisordered = qr{ + $NonptrTypeMisordered + (?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+)? + (?:\s+$Inline|\s+$Modifier)* + }x; + $Declare = qr{(?:$Storage\s+(?:$Inline\s+)?)?$Type}; + $DeclareMisordered = qr{(?:$Storage\s+(?:$Inline\s+)?)?$TypeMisordered}; +} +build_types(); + +our $Typecast = qr{\s*(\(\s*$NonptrType\s*\)){0,1}\s*}; + +# Using $balanced_parens, $LvalOrFunc, or $FuncArg +# requires at least perl version v5.10.0 +# Any use must be runtime checked with $^V + +our $balanced_parens = qr/(\((?:[^\(\)]++|(?-1))*\))/; +our $LvalOrFunc = qr{((?:[\&\*]\s*)?$Lval)\s*($balanced_parens{0,1})\s*}; +our $FuncArg = qr{$Typecast{0,1}($LvalOrFunc|$Constant|$String)}; + +our $declaration_macros = qr{(?x: + (?:$Storage\s+)?(?:[A-Z_][A-Z0-9]*_){0,2}(?:DEFINE|DECLARE)(?:_[A-Z0-9]+){1,6}\s*\(| + (?:$Storage\s+)?LIST_HEAD\s*\(| + (?:$Storage\s+)?${Type}\s+uninitialized_var\s*\( +)}; + +sub deparenthesize { + my ($string) = @_; + return "" if (!defined($string)); + + while ($string =~ /^\s*\(.*\)\s*$/) { + $string =~ s@^\s*\(\s*@@; + $string =~ s@\s*\)\s*$@@; + } + + $string =~ s@\s+@ @g; + + return $string; +} + +sub seed_camelcase_file { + my ($file) = @_; + + return if (!(-f $file)); + + local $/; + + open(my $include_file, '<', "$file") + or warn "$P: Can't read '$file' $!\n"; + my $text = <$include_file>; + close($include_file); + + my @lines = split('\n', $text); + + foreach my $line (@lines) { + next if ($line !~ /(?:[A-Z][a-z]|[a-z][A-Z])/); + if ($line =~ /^[ \t]*(?:#[ \t]*define|typedef\s+$Type)\s+(\w*(?:[A-Z][a-z]|[a-z][A-Z])\w*)/) { + $camelcase{$1} = 1; + } elsif ($line =~ /^\s*$Declare\s+(\w*(?:[A-Z][a-z]|[a-z][A-Z])\w*)\s*[\(\[,;]/) { + $camelcase{$1} = 1; + } elsif ($line =~ /^\s*(?:union|struct|enum)\s+(\w*(?:[A-Z][a-z]|[a-z][A-Z])\w*)\s*[;\{]/) { + $camelcase{$1} = 1; + } + } +} + +sub is_maintained_obsolete { + my ($filename) = @_; + + return 0 if (!(-e "$root/scripts/get_maintainer.pl")); + + my $status = `perl $root/scripts/get_maintainer.pl --status --nom --nol --nogit --nogit-fallback -f $filename 2>&1`; + + return $status =~ /obsolete/i; +} + +my $camelcase_seeded = 0; +sub seed_camelcase_includes { + return if ($camelcase_seeded); + + my $files; + my $camelcase_cache = ""; + my @include_files = (); + + $camelcase_seeded = 1; + + if (-e ".git") { + my $git_last_include_commit = `git log --no-merges --pretty=format:"%h%n" -1 -- include`; + chomp $git_last_include_commit; + $camelcase_cache = ".checkpatch-camelcase.git.$git_last_include_commit"; + } else { + my $last_mod_date = 0; + $files = `find $root/include -name "*.h"`; + @include_files = split('\n', $files); + foreach my $file (@include_files) { + my $date = POSIX::strftime("%Y%m%d%H%M", + localtime((stat $file)[9])); + $last_mod_date = $date if ($last_mod_date < $date); + } + $camelcase_cache = ".checkpatch-camelcase.date.$last_mod_date"; + } + + if ($camelcase_cache ne "" && -f $camelcase_cache) { + open(my $camelcase_file, '<', "$camelcase_cache") + or warn "$P: Can't read '$camelcase_cache' $!\n"; + while (<$camelcase_file>) { + chomp; + $camelcase{$_} = 1; + } + close($camelcase_file); + + return; + } + + if (-e ".git") { + $files = `git ls-files "include/*.h"`; + @include_files = split('\n', $files); + } + + foreach my $file (@include_files) { + seed_camelcase_file($file); + } + + if ($camelcase_cache ne "") { + unlink glob ".checkpatch-camelcase.*"; + open(my $camelcase_file, '>', "$camelcase_cache") + or warn "$P: Can't write '$camelcase_cache' $!\n"; + foreach (sort { lc($a) cmp lc($b) } keys(%camelcase)) { + print $camelcase_file ("$_\n"); + } + close($camelcase_file); + } +} + +sub git_commit_info { + my ($commit, $id, $desc) = @_; + + return ($id, $desc) if ((which("git") eq "") || !(-e ".git")); + + my $output = `git log --no-color --format='%H %s' -1 $commit 2>&1`; + $output =~ s/^\s*//gm; + my @lines = split("\n", $output); + + return ($id, $desc) if ($#lines < 0); + + if ($lines[0] =~ /^error: short SHA1 $commit is ambiguous\./) { +# Maybe one day convert this block of bash into something that returns +# all matching commit ids, but it's very slow... +# +# echo "checking commits $1..." +# git rev-list --remotes | grep -i "^$1" | +# while read line ; do +# git log --format='%H %s' -1 $line | +# echo "commit $(cut -c 1-12,41-)" +# done + } elsif ($lines[0] =~ /^fatal: ambiguous argument '$commit': unknown revision or path not in the working tree\./) { + } else { + $id = substr($lines[0], 0, 12); + $desc = substr($lines[0], 41); + } + + return ($id, $desc); +} + +$chk_signoff = 0 if ($file); + +my @rawlines = (); +my @lines = (); +my @fixed = (); +my @fixed_inserted = (); +my @fixed_deleted = (); +my $fixlinenr = -1; + +# If input is git commits, extract all commits from the commit expressions. +# For example, HEAD-3 means we need check 'HEAD, HEAD~1, HEAD~2'. +die "$P: No git repository found\n" if ($git && !-e ".git"); + +if ($git) { + my @commits = (); + foreach my $commit_expr (@ARGV) { + my $git_range; + if ($commit_expr =~ m/^(.*)-(\d+)$/) { + $git_range = "-$2 $1"; + } elsif ($commit_expr =~ m/\.\./) { + $git_range = "$commit_expr"; + } else { + $git_range = "-1 $commit_expr"; + } + my $lines = `git log --no-color --no-merges --pretty=format:'%H %s' $git_range`; + foreach my $line (split(/\n/, $lines)) { + $line =~ /^([0-9a-fA-F]{40,40}) (.*)$/; + next if (!defined($1) || !defined($2)); + my $sha1 = $1; + my $subject = $2; + unshift(@commits, $sha1); + $git_commits{$sha1} = $subject; + } + } + die "$P: no git commits after extraction!\n" if (@commits == 0); + @ARGV = @commits; +} + +my $vname; +for my $filename (@ARGV) { + my $FILE; + if ($git) { + open($FILE, '-|', "git format-patch -M --stdout -1 $filename") || + die "$P: $filename: git format-patch failed - $!\n"; + } elsif ($file) { + open($FILE, '-|', "diff -u /dev/null $filename") || + die "$P: $filename: diff failed - $!\n"; + } elsif ($filename eq '-') { + open($FILE, '<&STDIN'); + } else { + open($FILE, '<', "$filename") || + die "$P: $filename: open failed - $!\n"; + } + if ($filename eq '-') { + $vname = 'Your patch'; + } elsif ($git) { + $vname = "Commit " . substr($filename, 0, 12) . ' ("' . $git_commits{$filename} . '")'; + } else { + $vname = $filename; + } + while (<$FILE>) { + chomp; + push(@rawlines, $_); + } + close($FILE); + + if ($#ARGV > 0 && $quiet == 0) { + print '-' x length($vname) . "\n"; + print "$vname\n"; + print '-' x length($vname) . "\n"; + } + + if (!process($filename)) { + $exit = 1; + } + @rawlines = (); + @lines = (); + @fixed = (); + @fixed_inserted = (); + @fixed_deleted = (); + $fixlinenr = -1; + @modifierListFile = (); + @typeListFile = (); + build_types(); +} + +if (!$quiet) { + hash_show_words(\%use_type, "Used"); + hash_show_words(\%ignore_type, "Ignored"); + + if ($^V lt 5.10.0) { + print << "EOM" + +NOTE: perl $^V is not modern enough to detect all possible issues. + An upgrade to at least perl v5.10.0 is suggested. +EOM + } + if ($exit) { + print << "EOM" + +NOTE: If any of the errors are false positives, please report + them to the maintainer, see CHECKPATCH in MAINTAINERS. +EOM + } +} + +exit($exit); + +sub top_of_kernel_tree { + my ($root) = @_; + + my @tree_check = ( + "COPYING", "CREDITS", "Kbuild", "MAINTAINERS", "Makefile", + "README", "Documentation", "arch", "include", "drivers", + "fs", "init", "ipc", "kernel", "lib", "scripts", + ); + + foreach my $check (@tree_check) { + if (! -e $root . '/' . $check) { + return 0; + } + } + return 1; +} + +sub parse_email { + my ($formatted_email) = @_; + + my $name = ""; + my $address = ""; + my $comment = ""; + + if ($formatted_email =~ /^(.*)<(\S+\@\S+)>(.*)$/) { + $name = $1; + $address = $2; + $comment = $3 if defined $3; + } elsif ($formatted_email =~ /^\s*<(\S+\@\S+)>(.*)$/) { + $address = $1; + $comment = $2 if defined $2; + } elsif ($formatted_email =~ /(\S+\@\S+)(.*)$/) { + $address = $1; + $comment = $2 if defined $2; + $formatted_email =~ s/$address.*$//; + $name = $formatted_email; + $name = trim($name); + $name =~ s/^\"|\"$//g; + # If there's a name left after stripping spaces and + # leading quotes, and the address doesn't have both + # leading and trailing angle brackets, the address + # is invalid. ie: + # "joe smith joe@smith.com" bad + # "joe smith ]+>$/) { + $name = ""; + $address = ""; + $comment = ""; + } + } + + $name = trim($name); + $name =~ s/^\"|\"$//g; + $address = trim($address); + $address =~ s/^\<|\>$//g; + + if ($name =~ /[^\w \-]/i) { ##has "must quote" chars + $name =~ s/(?"; + } + + return $formatted_email; +} + +sub which { + my ($bin) = @_; + + foreach my $path (split(/:/, $ENV{PATH})) { + if (-e "$path/$bin") { + return "$path/$bin"; + } + } + + return ""; +} + +sub which_conf { + my ($conf) = @_; + + foreach my $path (split(/:/, ".:$ENV{HOME}:.scripts")) { + if (-e "$path/$conf") { + return "$path/$conf"; + } + } + + return ""; +} + +sub expand_tabs { + my ($str) = @_; + + my $res = ''; + my $n = 0; + for my $c (split(//, $str)) { + if ($c eq "\t") { + $res .= ' '; + $n++; + for (; ($n % 8) != 0; $n++) { + $res .= ' '; + } + next; + } + $res .= $c; + $n++; + } + + return $res; +} +sub copy_spacing { + (my $res = shift) =~ tr/\t/ /c; + return $res; +} + +sub line_stats { + my ($line) = @_; + + # Drop the diff line leader and expand tabs + $line =~ s/^.//; + $line = expand_tabs($line); + + # Pick the indent from the front of the line. + my ($white) = ($line =~ /^(\s*)/); + + return (length($line), length($white)); +} + +my $sanitise_quote = ''; + +sub sanitise_line_reset { + my ($in_comment) = @_; + + if ($in_comment) { + $sanitise_quote = '*/'; + } else { + $sanitise_quote = ''; + } +} +sub sanitise_line { + my ($line) = @_; + + my $res = ''; + my $l = ''; + + my $qlen = 0; + my $off = 0; + my $c; + + # Always copy over the diff marker. + $res = substr($line, 0, 1); + + for ($off = 1; $off < length($line); $off++) { + $c = substr($line, $off, 1); + + # Comments we are wacking completly including the begin + # and end, all to $;. + if ($sanitise_quote eq '' && substr($line, $off, 2) eq '/*') { + $sanitise_quote = '*/'; + + substr($res, $off, 2, "$;$;"); + $off++; + next; + } + if ($sanitise_quote eq '*/' && substr($line, $off, 2) eq '*/') { + $sanitise_quote = ''; + substr($res, $off, 2, "$;$;"); + $off++; + next; + } + if ($sanitise_quote eq '' && substr($line, $off, 2) eq '//') { + $sanitise_quote = '//'; + + substr($res, $off, 2, $sanitise_quote); + $off++; + next; + } + + # A \ in a string means ignore the next character. + if (($sanitise_quote eq "'" || $sanitise_quote eq '"') && + $c eq "\\") { + substr($res, $off, 2, 'XX'); + $off++; + next; + } + # Regular quotes. + if ($c eq "'" || $c eq '"') { + if ($sanitise_quote eq '') { + $sanitise_quote = $c; + + substr($res, $off, 1, $c); + next; + } elsif ($sanitise_quote eq $c) { + $sanitise_quote = ''; + } + } + + #print "c<$c> SQ<$sanitise_quote>\n"; + if ($off != 0 && $sanitise_quote eq '*/' && $c ne "\t") { + substr($res, $off, 1, $;); + } elsif ($off != 0 && $sanitise_quote eq '//' && $c ne "\t") { + substr($res, $off, 1, $;); + } elsif ($off != 0 && $sanitise_quote && $c ne "\t") { + substr($res, $off, 1, 'X'); + } else { + substr($res, $off, 1, $c); + } + } + + if ($sanitise_quote eq '//') { + $sanitise_quote = ''; + } + + # The pathname on a #include may be surrounded by '<' and '>'. + if ($res =~ /^.\s*\#\s*include\s+\<(.*)\>/) { + my $clean = 'X' x length($1); + $res =~ s@\<.*\>@<$clean>@; + + # The whole of a #error is a string. + } elsif ($res =~ /^.\s*\#\s*(?:error|warning)\s+(.*)\b/) { + my $clean = 'X' x length($1); + $res =~ s@(\#\s*(?:error|warning)\s+).*@$1$clean@; + } + + if ($allow_c99_comments && $res =~ m@(//.*$)@) { + my $match = $1; + $res =~ s/\Q$match\E/"$;" x length($match)/e; + } + + return $res; +} + +sub get_quoted_string { + my ($line, $rawline) = @_; + + return "" if ($line !~ m/($String)/g); + return substr($rawline, $-[0], $+[0] - $-[0]); +} + +sub ctx_statement_block { + my ($linenr, $remain, $off) = @_; + my $line = $linenr - 1; + my $blk = ''; + my $soff = $off; + my $coff = $off - 1; + my $coff_set = 0; + + my $loff = 0; + + my $type = ''; + my $level = 0; + my @stack = (); + my $p; + my $c; + my $len = 0; + + my $remainder; + while (1) { + @stack = (['', 0]) if ($#stack == -1); + + #warn "CSB: blk<$blk> remain<$remain>\n"; + # If we are about to drop off the end, pull in more + # context. + if ($off >= $len) { + for (; $remain > 0; $line++) { + last if (!defined $lines[$line]); + next if ($lines[$line] =~ /^-/); + $remain--; + $loff = $len; + $blk .= $lines[$line] . "\n"; + $len = length($blk); + $line++; + last; + } + # Bail if there is no further context. + #warn "CSB: blk<$blk> off<$off> len<$len>\n"; + if ($off >= $len) { + last; + } + if ($level == 0 && substr($blk, $off) =~ /^.\s*#\s*define/) { + $level++; + $type = '#'; + } + } + $p = $c; + $c = substr($blk, $off, 1); + $remainder = substr($blk, $off); + + #warn "CSB: c<$c> type<$type> level<$level> remainder<$remainder> coff_set<$coff_set>\n"; + + # Handle nested #if/#else. + if ($remainder =~ /^#\s*(?:ifndef|ifdef|if)\s/) { + push(@stack, [ $type, $level ]); + } elsif ($remainder =~ /^#\s*(?:else|elif)\b/) { + ($type, $level) = @{$stack[$#stack - 1]}; + } elsif ($remainder =~ /^#\s*endif\b/) { + ($type, $level) = @{pop(@stack)}; + } + + # Statement ends at the ';' or a close '}' at the + # outermost level. + if ($level == 0 && $c eq ';') { + last; + } + + # An else is really a conditional as long as its not else if + if ($level == 0 && $coff_set == 0 && + (!defined($p) || $p =~ /(?:\s|\}|\+)/) && + $remainder =~ /^(else)(?:\s|{)/ && + $remainder !~ /^else\s+if\b/) { + $coff = $off + length($1) - 1; + $coff_set = 1; + #warn "CSB: mark coff<$coff> soff<$soff> 1<$1>\n"; + #warn "[" . substr($blk, $soff, $coff - $soff + 1) . "]\n"; + } + + if (($type eq '' || $type eq '(') && $c eq '(') { + $level++; + $type = '('; + } + if ($type eq '(' && $c eq ')') { + $level--; + $type = ($level != 0)? '(' : ''; + + if ($level == 0 && $coff < $soff) { + $coff = $off; + $coff_set = 1; + #warn "CSB: mark coff<$coff>\n"; + } + } + if (($type eq '' || $type eq '{') && $c eq '{') { + $level++; + $type = '{'; + } + if ($type eq '{' && $c eq '}') { + $level--; + $type = ($level != 0)? '{' : ''; + + if ($level == 0) { + if (substr($blk, $off + 1, 1) eq ';') { + $off++; + } + last; + } + } + # Preprocessor commands end at the newline unless escaped. + if ($type eq '#' && $c eq "\n" && $p ne "\\") { + $level--; + $type = ''; + $off++; + last; + } + $off++; + } + # We are truly at the end, so shuffle to the next line. + if ($off == $len) { + $loff = $len + 1; + $line++; + $remain--; + } + + my $statement = substr($blk, $soff, $off - $soff + 1); + my $condition = substr($blk, $soff, $coff - $soff + 1); + + #warn "STATEMENT<$statement>\n"; + #warn "CONDITION<$condition>\n"; + + #print "coff<$coff> soff<$off> loff<$loff>\n"; + + return ($statement, $condition, + $line, $remain + 1, $off - $loff + 1, $level); +} + +sub statement_lines { + my ($stmt) = @_; + + # Strip the diff line prefixes and rip blank lines at start and end. + $stmt =~ s/(^|\n)./$1/g; + $stmt =~ s/^\s*//; + $stmt =~ s/\s*$//; + + my @stmt_lines = ($stmt =~ /\n/g); + + return $#stmt_lines + 2; +} + +sub statement_rawlines { + my ($stmt) = @_; + + my @stmt_lines = ($stmt =~ /\n/g); + + return $#stmt_lines + 2; +} + +sub statement_block_size { + my ($stmt) = @_; + + $stmt =~ s/(^|\n)./$1/g; + $stmt =~ s/^\s*{//; + $stmt =~ s/}\s*$//; + $stmt =~ s/^\s*//; + $stmt =~ s/\s*$//; + + my @stmt_lines = ($stmt =~ /\n/g); + my @stmt_statements = ($stmt =~ /;/g); + + my $stmt_lines = $#stmt_lines + 2; + my $stmt_statements = $#stmt_statements + 1; + + if ($stmt_lines > $stmt_statements) { + return $stmt_lines; + } else { + return $stmt_statements; + } +} + +sub ctx_statement_full { + my ($linenr, $remain, $off) = @_; + my ($statement, $condition, $level); + + my (@chunks); + + # Grab the first conditional/block pair. + ($statement, $condition, $linenr, $remain, $off, $level) = + ctx_statement_block($linenr, $remain, $off); + #print "F: c<$condition> s<$statement> remain<$remain>\n"; + push(@chunks, [ $condition, $statement ]); + if (!($remain > 0 && $condition =~ /^\s*(?:\n[+-])?\s*(?:if|else|do)\b/s)) { + return ($level, $linenr, @chunks); + } + + # Pull in the following conditional/block pairs and see if they + # could continue the statement. + for (;;) { + ($statement, $condition, $linenr, $remain, $off, $level) = + ctx_statement_block($linenr, $remain, $off); + #print "C: c<$condition> s<$statement> remain<$remain>\n"; + last if (!($remain > 0 && $condition =~ /^(?:\s*\n[+-])*\s*(?:else|do)\b/s)); + #print "C: push\n"; + push(@chunks, [ $condition, $statement ]); + } + + return ($level, $linenr, @chunks); +} + +sub ctx_block_get { + my ($linenr, $remain, $outer, $open, $close, $off) = @_; + my $line; + my $start = $linenr - 1; + my $blk = ''; + my @o; + my @c; + my @res = (); + + my $level = 0; + my @stack = ($level); + for ($line = $start; $remain > 0; $line++) { + next if ($rawlines[$line] =~ /^-/); + $remain--; + + $blk .= $rawlines[$line]; + + # Handle nested #if/#else. + if ($lines[$line] =~ /^.\s*#\s*(?:ifndef|ifdef|if)\s/) { + push(@stack, $level); + } elsif ($lines[$line] =~ /^.\s*#\s*(?:else|elif)\b/) { + $level = $stack[$#stack - 1]; + } elsif ($lines[$line] =~ /^.\s*#\s*endif\b/) { + $level = pop(@stack); + } + + foreach my $c (split(//, $lines[$line])) { + ##print "C<$c>L<$level><$open$close>O<$off>\n"; + if ($off > 0) { + $off--; + next; + } + + if ($c eq $close && $level > 0) { + $level--; + last if ($level == 0); + } elsif ($c eq $open) { + $level++; + } + } + + if (!$outer || $level <= 1) { + push(@res, $rawlines[$line]); + } + + last if ($level == 0); + } + + return ($level, @res); +} +sub ctx_block_outer { + my ($linenr, $remain) = @_; + + my ($level, @r) = ctx_block_get($linenr, $remain, 1, '{', '}', 0); + return @r; +} +sub ctx_block { + my ($linenr, $remain) = @_; + + my ($level, @r) = ctx_block_get($linenr, $remain, 0, '{', '}', 0); + return @r; +} +sub ctx_statement { + my ($linenr, $remain, $off) = @_; + + my ($level, @r) = ctx_block_get($linenr, $remain, 0, '(', ')', $off); + return @r; +} +sub ctx_block_level { + my ($linenr, $remain) = @_; + + return ctx_block_get($linenr, $remain, 0, '{', '}', 0); +} +sub ctx_statement_level { + my ($linenr, $remain, $off) = @_; + + return ctx_block_get($linenr, $remain, 0, '(', ')', $off); +} + +sub ctx_locate_comment { + my ($first_line, $end_line) = @_; + + # Catch a comment on the end of the line itself. + my ($current_comment) = ($rawlines[$end_line - 1] =~ m@.*(/\*.*\*/)\s*(?:\\\s*)?$@); + return $current_comment if (defined $current_comment); + + # Look through the context and try and figure out if there is a + # comment. + my $in_comment = 0; + $current_comment = ''; + for (my $linenr = $first_line; $linenr < $end_line; $linenr++) { + my $line = $rawlines[$linenr - 1]; + #warn " $line\n"; + if ($linenr == $first_line and $line =~ m@^.\s*\*@) { + $in_comment = 1; + } + if ($line =~ m@/\*@) { + $in_comment = 1; + } + if (!$in_comment && $current_comment ne '') { + $current_comment = ''; + } + $current_comment .= $line . "\n" if ($in_comment); + if ($line =~ m@\*/@) { + $in_comment = 0; + } + } + + chomp($current_comment); + return($current_comment); +} +sub ctx_has_comment { + my ($first_line, $end_line) = @_; + my $cmt = ctx_locate_comment($first_line, $end_line); + + ##print "LINE: $rawlines[$end_line - 1 ]\n"; + ##print "CMMT: $cmt\n"; + + return ($cmt ne ''); +} + +sub raw_line { + my ($linenr, $cnt) = @_; + + my $offset = $linenr - 1; + $cnt++; + + my $line; + while ($cnt) { + $line = $rawlines[$offset++]; + next if (defined($line) && $line =~ /^-/); + $cnt--; + } + + return $line; +} + +sub cat_vet { + my ($vet) = @_; + my ($res, $coded); + + $res = ''; + while ($vet =~ /([^[:cntrl:]]*)([[:cntrl:]]|$)/g) { + $res .= $1; + if ($2 ne '') { + $coded = sprintf("^%c", unpack('C', $2) + 64); + $res .= $coded; + } + } + $res =~ s/$/\$/; + + return $res; +} + +my $av_preprocessor = 0; +my $av_pending; +my @av_paren_type; +my $av_pend_colon; + +sub annotate_reset { + $av_preprocessor = 0; + $av_pending = '_'; + @av_paren_type = ('E'); + $av_pend_colon = 'O'; +} + +sub annotate_values { + my ($stream, $type) = @_; + + my $res; + my $var = '_' x length($stream); + my $cur = $stream; + + print "$stream\n" if ($dbg_values > 1); + + while (length($cur)) { + @av_paren_type = ('E') if ($#av_paren_type < 0); + print " <" . join('', @av_paren_type) . + "> <$type> <$av_pending>" if ($dbg_values > 1); + if ($cur =~ /^(\s+)/o) { + print "WS($1)\n" if ($dbg_values > 1); + if ($1 =~ /\n/ && $av_preprocessor) { + $type = pop(@av_paren_type); + $av_preprocessor = 0; + } + + } elsif ($cur =~ /^(\(\s*$Type\s*)\)/ && $av_pending eq '_') { + print "CAST($1)\n" if ($dbg_values > 1); + push(@av_paren_type, $type); + $type = 'c'; + + } elsif ($cur =~ /^($Type)\s*(?:$Ident|,|\)|\(|\s*$)/) { + print "DECLARE($1)\n" if ($dbg_values > 1); + $type = 'T'; + + } elsif ($cur =~ /^($Modifier)\s*/) { + print "MODIFIER($1)\n" if ($dbg_values > 1); + $type = 'T'; + + } elsif ($cur =~ /^(\#\s*define\s*$Ident)(\(?)/o) { + print "DEFINE($1,$2)\n" if ($dbg_values > 1); + $av_preprocessor = 1; + push(@av_paren_type, $type); + if ($2 ne '') { + $av_pending = 'N'; + } + $type = 'E'; + + } elsif ($cur =~ /^(\#\s*(?:undef\s*$Ident|include\b))/o) { + print "UNDEF($1)\n" if ($dbg_values > 1); + $av_preprocessor = 1; + push(@av_paren_type, $type); + + } elsif ($cur =~ /^(\#\s*(?:ifdef|ifndef|if))/o) { + print "PRE_START($1)\n" if ($dbg_values > 1); + $av_preprocessor = 1; + + push(@av_paren_type, $type); + push(@av_paren_type, $type); + $type = 'E'; + + } elsif ($cur =~ /^(\#\s*(?:else|elif))/o) { + print "PRE_RESTART($1)\n" if ($dbg_values > 1); + $av_preprocessor = 1; + + push(@av_paren_type, $av_paren_type[$#av_paren_type]); + + $type = 'E'; + + } elsif ($cur =~ /^(\#\s*(?:endif))/o) { + print "PRE_END($1)\n" if ($dbg_values > 1); + + $av_preprocessor = 1; + + # Assume all arms of the conditional end as this + # one does, and continue as if the #endif was not here. + pop(@av_paren_type); + push(@av_paren_type, $type); + $type = 'E'; + + } elsif ($cur =~ /^(\\\n)/o) { + print "PRECONT($1)\n" if ($dbg_values > 1); + + } elsif ($cur =~ /^(__attribute__)\s*\(?/o) { + print "ATTR($1)\n" if ($dbg_values > 1); + $av_pending = $type; + $type = 'N'; + + } elsif ($cur =~ /^(sizeof)\s*(\()?/o) { + print "SIZEOF($1)\n" if ($dbg_values > 1); + if (defined $2) { + $av_pending = 'V'; + } + $type = 'N'; + + } elsif ($cur =~ /^(if|while|for)\b/o) { + print "COND($1)\n" if ($dbg_values > 1); + $av_pending = 'E'; + $type = 'N'; + + } elsif ($cur =~/^(case)/o) { + print "CASE($1)\n" if ($dbg_values > 1); + $av_pend_colon = 'C'; + $type = 'N'; + + } elsif ($cur =~/^(return|else|goto|typeof|__typeof__)\b/o) { + print "KEYWORD($1)\n" if ($dbg_values > 1); + $type = 'N'; + + } elsif ($cur =~ /^(\()/o) { + print "PAREN('$1')\n" if ($dbg_values > 1); + push(@av_paren_type, $av_pending); + $av_pending = '_'; + $type = 'N'; + + } elsif ($cur =~ /^(\))/o) { + my $new_type = pop(@av_paren_type); + if ($new_type ne '_') { + $type = $new_type; + print "PAREN('$1') -> $type\n" + if ($dbg_values > 1); + } else { + print "PAREN('$1')\n" if ($dbg_values > 1); + } + + } elsif ($cur =~ /^($Ident)\s*\(/o) { + print "FUNC($1)\n" if ($dbg_values > 1); + $type = 'V'; + $av_pending = 'V'; + + } elsif ($cur =~ /^($Ident\s*):(?:\s*\d+\s*(,|=|;))?/) { + if (defined $2 && $type eq 'C' || $type eq 'T') { + $av_pend_colon = 'B'; + } elsif ($type eq 'E') { + $av_pend_colon = 'L'; + } + print "IDENT_COLON($1,$type>$av_pend_colon)\n" if ($dbg_values > 1); + $type = 'V'; + + } elsif ($cur =~ /^($Ident|$Constant)/o) { + print "IDENT($1)\n" if ($dbg_values > 1); + $type = 'V'; + + } elsif ($cur =~ /^($Assignment)/o) { + print "ASSIGN($1)\n" if ($dbg_values > 1); + $type = 'N'; + + } elsif ($cur =~/^(;|{|})/) { + print "END($1)\n" if ($dbg_values > 1); + $type = 'E'; + $av_pend_colon = 'O'; + + } elsif ($cur =~/^(,)/) { + print "COMMA($1)\n" if ($dbg_values > 1); + $type = 'C'; + + } elsif ($cur =~ /^(\?)/o) { + print "QUESTION($1)\n" if ($dbg_values > 1); + $type = 'N'; + + } elsif ($cur =~ /^(:)/o) { + print "COLON($1,$av_pend_colon)\n" if ($dbg_values > 1); + + substr($var, length($res), 1, $av_pend_colon); + if ($av_pend_colon eq 'C' || $av_pend_colon eq 'L') { + $type = 'E'; + } else { + $type = 'N'; + } + $av_pend_colon = 'O'; + + } elsif ($cur =~ /^(\[)/o) { + print "CLOSE($1)\n" if ($dbg_values > 1); + $type = 'N'; + + } elsif ($cur =~ /^(-(?![->])|\+(?!\+)|\*|\&\&|\&)/o) { + my $variant; + + print "OPV($1)\n" if ($dbg_values > 1); + if ($type eq 'V') { + $variant = 'B'; + } else { + $variant = 'U'; + } + + substr($var, length($res), 1, $variant); + $type = 'N'; + + } elsif ($cur =~ /^($Operators)/o) { + print "OP($1)\n" if ($dbg_values > 1); + if ($1 ne '++' && $1 ne '--') { + $type = 'N'; + } + + } elsif ($cur =~ /(^.)/o) { + print "C($1)\n" if ($dbg_values > 1); + } + if (defined $1) { + $cur = substr($cur, length($1)); + $res .= $type x length($1); + } + } + + return ($res, $var); +} + +sub possible { + my ($possible, $line) = @_; + my $notPermitted = qr{(?: + ^(?: + $Modifier| + $Storage| + $Type| + DEFINE_\S+ + )$| + ^(?: + goto| + return| + case| + else| + asm|__asm__| + do| + \#| + \#\#| + )(?:\s|$)| + ^(?:typedef|struct|enum)\b + )}x; + warn "CHECK<$possible> ($line)\n" if ($dbg_possible > 2); + if ($possible !~ $notPermitted) { + # Check for modifiers. + $possible =~ s/\s*$Storage\s*//g; + $possible =~ s/\s*$Sparse\s*//g; + if ($possible =~ /^\s*$/) { + + } elsif ($possible =~ /\s/) { + $possible =~ s/\s*$Type\s*//g; + for my $modifier (split(' ', $possible)) { + if ($modifier !~ $notPermitted) { + warn "MODIFIER: $modifier ($possible) ($line)\n" if ($dbg_possible); + push(@modifierListFile, $modifier); + } + } + + } else { + warn "POSSIBLE: $possible ($line)\n" if ($dbg_possible); + push(@typeListFile, $possible); + } + build_types(); + } else { + warn "NOTPOSS: $possible ($line)\n" if ($dbg_possible > 1); + } +} + +my $prefix = ''; + +sub show_type { + my ($type) = @_; + + return defined $use_type{$type} if (scalar keys %use_type > 0); + + return !defined $ignore_type{$type}; +} + +sub report { + my ($level, $type, $msg) = @_; + + if (!show_type($type) || + (defined $tst_only && $msg !~ /\Q$tst_only\E/)) { + return 0; + } + my $output = ''; + if (-t STDOUT && $color) { + if ($level eq 'ERROR') { + $output .= RED; + } elsif ($level eq 'WARNING') { + $output .= YELLOW; + } else { + $output .= GREEN; + } + } + $output .= $prefix . $level . ':'; + if ($show_types) { + $output .= BLUE if (-t STDOUT && $color); + $output .= "$type:"; + } + $output .= RESET if (-t STDOUT && $color); + $output .= ' ' . $msg . "\n"; + + if ($showfile) { + my @lines = split("\n", $output, -1); + splice(@lines, 1, 1); + $output = join("\n", @lines); + } + $output = (split('\n', $output))[0] . "\n" if ($terse); + + push(our @report, $output); + + return 1; +} + +sub report_dump { + our @report; +} + +sub fixup_current_range { + my ($lineRef, $offset, $length) = @_; + + if ($$lineRef =~ /^\@\@ -\d+,\d+ \+(\d+),(\d+) \@\@/) { + my $o = $1; + my $l = $2; + my $no = $o + $offset; + my $nl = $l + $length; + $$lineRef =~ s/\+$o,$l \@\@/\+$no,$nl \@\@/; + } +} + +sub fix_inserted_deleted_lines { + my ($linesRef, $insertedRef, $deletedRef) = @_; + + my $range_last_linenr = 0; + my $delta_offset = 0; + + my $old_linenr = 0; + my $new_linenr = 0; + + my $next_insert = 0; + my $next_delete = 0; + + my @lines = (); + + my $inserted = @{$insertedRef}[$next_insert++]; + my $deleted = @{$deletedRef}[$next_delete++]; + + foreach my $old_line (@{$linesRef}) { + my $save_line = 1; + my $line = $old_line; #don't modify the array + if ($line =~ /^(?:\+\+\+|\-\-\-)\s+\S+/) { #new filename + $delta_offset = 0; + } elsif ($line =~ /^\@\@ -\d+,\d+ \+\d+,\d+ \@\@/) { #new hunk + $range_last_linenr = $new_linenr; + fixup_current_range(\$line, $delta_offset, 0); + } + + while (defined($deleted) && ${$deleted}{'LINENR'} == $old_linenr) { + $deleted = @{$deletedRef}[$next_delete++]; + $save_line = 0; + fixup_current_range(\$lines[$range_last_linenr], $delta_offset--, -1); + } + + while (defined($inserted) && ${$inserted}{'LINENR'} == $old_linenr) { + push(@lines, ${$inserted}{'LINE'}); + $inserted = @{$insertedRef}[$next_insert++]; + $new_linenr++; + fixup_current_range(\$lines[$range_last_linenr], $delta_offset++, 1); + } + + if ($save_line) { + push(@lines, $line); + $new_linenr++; + } + + $old_linenr++; + } + + return @lines; +} + +sub fix_insert_line { + my ($linenr, $line) = @_; + + my $inserted = { + LINENR => $linenr, + LINE => $line, + }; + push(@fixed_inserted, $inserted); +} + +sub fix_delete_line { + my ($linenr, $line) = @_; + + my $deleted = { + LINENR => $linenr, + LINE => $line, + }; + + push(@fixed_deleted, $deleted); +} + +sub ERROR { + my ($type, $msg) = @_; + + if (report("ERROR", $type, $msg)) { + our $clean = 0; + our $cnt_error++; + return 1; + } + return 0; +} +sub WARN { + my ($type, $msg) = @_; + + if (report("WARNING", $type, $msg)) { + our $clean = 0; + our $cnt_warn++; + return 1; + } + return 0; +} +sub CHK { + my ($type, $msg) = @_; + + if ($check && report("CHECK", $type, $msg)) { + our $clean = 0; + our $cnt_chk++; + return 1; + } + return 0; +} + +sub check_absolute_file { + my ($absolute, $herecurr) = @_; + my $file = $absolute; + + ##print "absolute<$absolute>\n"; + + # See if any suffix of this path is a path within the tree. + while ($file =~ s@^[^/]*/@@) { + if (-f "$root/$file") { + ##print "file<$file>\n"; + last; + } + } + if (! -f _) { + return 0; + } + + # It is, so see if the prefix is acceptable. + my $prefix = $absolute; + substr($prefix, -length($file)) = ''; + + ##print "prefix<$prefix>\n"; + if ($prefix ne ".../") { + WARN("USE_RELATIVE_PATH", + "use relative pathname instead of absolute in changelog text\n" . $herecurr); + } +} + +sub trim { + my ($string) = @_; + + $string =~ s/^\s+|\s+$//g; + + return $string; +} + +sub ltrim { + my ($string) = @_; + + $string =~ s/^\s+//; + + return $string; +} + +sub rtrim { + my ($string) = @_; + + $string =~ s/\s+$//; + + return $string; +} + +sub string_find_replace { + my ($string, $find, $replace) = @_; + + $string =~ s/$find/$replace/g; + + return $string; +} + +sub tabify { + my ($leading) = @_; + + my $source_indent = 8; + my $max_spaces_before_tab = $source_indent - 1; + my $spaces_to_tab = " " x $source_indent; + + #convert leading spaces to tabs + 1 while $leading =~ s@^([\t]*)$spaces_to_tab@$1\t@g; + #Remove spaces before a tab + 1 while $leading =~ s@^([\t]*)( {1,$max_spaces_before_tab})\t@$1\t@g; + + return "$leading"; +} + +sub pos_last_openparen { + my ($line) = @_; + + my $pos = 0; + + my $opens = $line =~ tr/\(/\(/; + my $closes = $line =~ tr/\)/\)/; + + my $last_openparen = 0; + + if (($opens == 0) || ($closes >= $opens)) { + return -1; + } + + my $len = length($line); + + for ($pos = 0; $pos < $len; $pos++) { + my $string = substr($line, $pos); + if ($string =~ /^($FuncArg|$balanced_parens)/) { + $pos += length($1) - 1; + } elsif (substr($line, $pos, 1) eq '(') { + $last_openparen = $pos; + } elsif (index($string, '(') == -1) { + last; + } + } + + return length(expand_tabs(substr($line, 0, $last_openparen))) + 1; +} + +sub process { + my $filename = shift; + + my $linenr=0; + my $prevline=""; + my $prevrawline=""; + my $stashline=""; + my $stashrawline=""; + + my $length; + my $indent; + my $previndent=0; + my $stashindent=0; + + our $clean = 1; + my $signoff = 0; + my $is_patch = 0; + my $in_header_lines = $file ? 0 : 1; + my $in_commit_log = 0; #Scanning lines before patch + my $has_commit_log = 0; #Encountered lines before patch + my $commit_log_possible_stack_dump = 0; + my $commit_log_long_line = 0; + my $commit_log_has_diff = 0; + my $reported_maintainer_file = 0; + my $non_utf8_charset = 0; + + my $last_blank_line = 0; + my $last_coalesced_string_linenr = -1; + + our @report = (); + our $cnt_lines = 0; + our $cnt_error = 0; + our $cnt_warn = 0; + our $cnt_chk = 0; + + # Trace the real file/line as we go. + my $realfile = ''; + my $realline = 0; + my $realcnt = 0; + my $here = ''; + my $in_comment = 0; + my $comment_edge = 0; + my $first_line = 0; + my $p1_prefix = ''; + + my $prev_values = 'E'; + + # suppression flags + my %suppress_ifbraces; + my %suppress_whiletrailers; + my %suppress_export; + my $suppress_statement = 0; + + my %signatures = (); + + # Pre-scan the patch sanitizing the lines. + # Pre-scan the patch looking for any __setup documentation. + # + my @setup_docs = (); + my $setup_docs = 0; + + my $camelcase_file_seeded = 0; + + sanitise_line_reset(); + my $line; + foreach my $rawline (@rawlines) { + $linenr++; + $line = $rawline; + + push(@fixed, $rawline) if ($fix); + + if ($rawline=~/^\+\+\+\s+(\S+)/) { + $setup_docs = 0; + if ($1 =~ m@Documentation/kernel-parameters.txt$@) { + $setup_docs = 1; + } + #next; + } + if ($rawline=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) { + $realline=$1-1; + if (defined $2) { + $realcnt=$3+1; + } else { + $realcnt=1+1; + } + $in_comment = 0; + + # Guestimate if this is a continuing comment. Run + # the context looking for a comment "edge". If this + # edge is a close comment then we must be in a comment + # at context start. + my $edge; + my $cnt = $realcnt; + for (my $ln = $linenr + 1; $cnt > 0; $ln++) { + next if (defined $rawlines[$ln - 1] && + $rawlines[$ln - 1] =~ /^-/); + $cnt--; + #print "RAW<$rawlines[$ln - 1]>\n"; + last if (!defined $rawlines[$ln - 1]); + if ($rawlines[$ln - 1] =~ m@(/\*|\*/)@ && + $rawlines[$ln - 1] !~ m@"[^"]*(?:/\*|\*/)[^"]*"@) { + ($edge) = $1; + last; + } + } + if (defined $edge && $edge eq '*/') { + $in_comment = 1; + } + + # Guestimate if this is a continuing comment. If this + # is the start of a diff block and this line starts + # ' *' then it is very likely a comment. + if (!defined $edge && + $rawlines[$linenr] =~ m@^.\s*(?:\*\*+| \*)(?:\s|$)@) + { + $in_comment = 1; + } + + ##print "COMMENT:$in_comment edge<$edge> $rawline\n"; + sanitise_line_reset($in_comment); + + } elsif ($realcnt && $rawline =~ /^(?:\+| |$)/) { + # Standardise the strings and chars within the input to + # simplify matching -- only bother with positive lines. + $line = sanitise_line($rawline); + } + push(@lines, $line); + + if ($realcnt > 1) { + $realcnt-- if ($line =~ /^(?:\+| |$)/); + } else { + $realcnt = 0; + } + + #print "==>$rawline\n"; + #print "-->$line\n"; + + if ($setup_docs && $line =~ /^\+/) { + push(@setup_docs, $line); + } + } + + $prefix = ''; + + $realcnt = 0; + $linenr = 0; + $fixlinenr = -1; + foreach my $line (@lines) { + $linenr++; + $fixlinenr++; + my $sline = $line; #copy of $line + $sline =~ s/$;/ /g; #with comments as spaces + + my $rawline = $rawlines[$linenr - 1]; + +#extract the line range in the file after the patch is applied + if (!$in_commit_log && + $line =~ /^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) { + $is_patch = 1; + $first_line = $linenr + 1; + $realline=$1-1; + if (defined $2) { + $realcnt=$3+1; + } else { + $realcnt=1+1; + } + annotate_reset(); + $prev_values = 'E'; + + %suppress_ifbraces = (); + %suppress_whiletrailers = (); + %suppress_export = (); + $suppress_statement = 0; + next; + +# track the line number as we move through the hunk, note that +# new versions of GNU diff omit the leading space on completely +# blank context lines so we need to count that too. + } elsif ($line =~ /^( |\+|$)/) { + $realline++; + $realcnt-- if ($realcnt != 0); + + # Measure the line length and indent. + ($length, $indent) = line_stats($rawline); + + # Track the previous line. + ($prevline, $stashline) = ($stashline, $line); + ($previndent, $stashindent) = ($stashindent, $indent); + ($prevrawline, $stashrawline) = ($stashrawline, $rawline); + + #warn "line<$line>\n"; + + } elsif ($realcnt == 1) { + $realcnt--; + } + + my $hunk_line = ($realcnt != 0); + + $here = "#$linenr: " if (!$file); + $here = "#$realline: " if ($file); + + my $found_file = 0; + # extract the filename as it passes + if ($line =~ /^diff --git.*?(\S+)$/) { + $realfile = $1; + $realfile =~ s@^([^/]*)/@@ if (!$file); + $in_commit_log = 0; + $found_file = 1; + } elsif ($line =~ /^\+\+\+\s+(\S+)/) { + $realfile = $1; + $realfile =~ s@^([^/]*)/@@ if (!$file); + $in_commit_log = 0; + + $p1_prefix = $1; + if (!$file && $tree && $p1_prefix ne '' && + -e "$root/$p1_prefix") { + WARN("PATCH_PREFIX", + "patch prefix '$p1_prefix' exists, appears to be a -p0 patch\n"); + } + + if ($realfile =~ m@^include/asm/@) { + ERROR("MODIFIED_INCLUDE_ASM", + "do not modify files in include/asm, change architecture specific files in include/asm-\n" . "$here$rawline\n"); + } + $found_file = 1; + } + +#make up the handle for any error we report on this line + if ($showfile) { + $prefix = "$realfile:$realline: " + } elsif ($emacs) { + if ($file) { + $prefix = "$filename:$realline: "; + } else { + $prefix = "$filename:$linenr: "; + } + } + + if ($found_file) { + if (is_maintained_obsolete($realfile)) { + WARN("OBSOLETE", + "$realfile is marked as 'obsolete' in the MAINTAINERS hierarchy. No unnecessary modifications please.\n"); + } + if ($realfile =~ m@^(?:drivers/net/|net/|drivers/staging/)@) { + $check = 1; + } else { + $check = $check_orig; + } + next; + } + + $here .= "FILE: $realfile:$realline:" if ($realcnt != 0); + + my $hereline = "$here\n$rawline\n"; + my $herecurr = "$here\n$rawline\n"; + my $hereprev = "$here\n$prevrawline\n$rawline\n"; + + $cnt_lines++ if ($realcnt != 0); + +# Check if the commit log has what seems like a diff which can confuse patch + if ($in_commit_log && !$commit_log_has_diff && + (($line =~ m@^\s+diff\b.*a/[\w/]+@ && + $line =~ m@^\s+diff\b.*a/([\w/]+)\s+b/$1\b@) || + $line =~ m@^\s*(?:\-\-\-\s+a/|\+\+\+\s+b/)@ || + $line =~ m/^\s*\@\@ \-\d+,\d+ \+\d+,\d+ \@\@/)) { + ERROR("DIFF_IN_COMMIT_MSG", + "Avoid using diff content in the commit message - patch(1) might not work\n" . $herecurr); + $commit_log_has_diff = 1; + } + +# Check for incorrect file permissions + if ($line =~ /^new (file )?mode.*[7531]\d{0,2}$/) { + my $permhere = $here . "FILE: $realfile\n"; + if ($realfile !~ m@scripts/@ && + $realfile !~ /\.(py|pl|awk|sh)$/) { + ERROR("EXECUTE_PERMISSIONS", + "do not set execute permissions for source files\n" . $permhere); + } + } + +# Check the patch for a signoff: + if ($line =~ /^\s*signed-off-by:/i) { + $signoff++; + $in_commit_log = 0; + } + +# Check if MAINTAINERS is being updated. If so, there's probably no need to +# emit the "does MAINTAINERS need updating?" message on file add/move/delete + if ($line =~ /^\s*MAINTAINERS\s*\|/) { + $reported_maintainer_file = 1; + } + +# Check signature styles + if (!$in_header_lines && + $line =~ /^(\s*)([a-z0-9_-]+by:|$signature_tags)(\s*)(.*)/i) { + my $space_before = $1; + my $sign_off = $2; + my $space_after = $3; + my $email = $4; + my $ucfirst_sign_off = ucfirst(lc($sign_off)); + + if ($sign_off !~ /$signature_tags/) { + WARN("BAD_SIGN_OFF", + "Non-standard signature: $sign_off\n" . $herecurr); + } + if (defined $space_before && $space_before ne "") { + if (WARN("BAD_SIGN_OFF", + "Do not use whitespace before $ucfirst_sign_off\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] = + "$ucfirst_sign_off $email"; + } + } + if ($sign_off =~ /-by:$/i && $sign_off ne $ucfirst_sign_off) { + if (WARN("BAD_SIGN_OFF", + "'$ucfirst_sign_off' is the preferred signature form\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] = + "$ucfirst_sign_off $email"; + } + + } + if (!defined $space_after || $space_after ne " ") { + if (WARN("BAD_SIGN_OFF", + "Use a single space after $ucfirst_sign_off\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] = + "$ucfirst_sign_off $email"; + } + } + + my ($email_name, $email_address, $comment) = parse_email($email); + my $suggested_email = format_email(($email_name, $email_address)); + if ($suggested_email eq "") { + ERROR("BAD_SIGN_OFF", + "Unrecognized email address: '$email'\n" . $herecurr); + } else { + my $dequoted = $suggested_email; + $dequoted =~ s/^"//; + $dequoted =~ s/" $comment" ne $email && + "$suggested_email$comment" ne $email) { + WARN("BAD_SIGN_OFF", + "email address '$email' might be better as '$suggested_email$comment'\n" . $herecurr); + } + } + +# Check for duplicate signatures + my $sig_nospace = $line; + $sig_nospace =~ s/\s//g; + $sig_nospace = lc($sig_nospace); + if (defined $signatures{$sig_nospace}) { + WARN("BAD_SIGN_OFF", + "Duplicate signature\n" . $herecurr); + } else { + $signatures{$sig_nospace} = 1; + } + } + +# Check email subject for common tools that don't need to be mentioned + if ($in_header_lines && + $line =~ /^Subject:.*\b(?:checkpatch|sparse|smatch)\b[^:]/i) { + WARN("EMAIL_SUBJECT", + "A patch subject line should describe the change not the tool that found it\n" . $herecurr); + } + +# Check for old stable address + if ($line =~ /^\s*cc:\s*.*?.*$/i) { + ERROR("STABLE_ADDRESS", + "The 'stable' address should be 'stable\@vger.kernel.org'\n" . $herecurr); + } + +# Check for unwanted Gerrit info + if ($in_commit_log && $line =~ /^\s*change-id:/i) { + ERROR("GERRIT_CHANGE_ID", + "Remove Gerrit Change-Id's before submitting upstream.\n" . $herecurr); + } + +# Check if the commit log is in a possible stack dump + if ($in_commit_log && !$commit_log_possible_stack_dump && + ($line =~ /^\s*(?:WARNING:|BUG:)/ || + $line =~ /^\s*\[\s*\d+\.\d{6,6}\s*\]/ || + # timestamp + $line =~ /^\s*\[\<[0-9a-fA-F]{8,}\>\]/)) { + # stack dump address + $commit_log_possible_stack_dump = 1; + } + +# Check for line lengths > 75 in commit log, warn once + if ($in_commit_log && !$commit_log_long_line && + length($line) > 75 && + !($line =~ /^\s*[a-zA-Z0-9_\/\.]+\s+\|\s+\d+/ || + # file delta changes + $line =~ /^\s*(?:[\w\.\-]+\/)++[\w\.\-]+:/ || + # filename then : + $line =~ /^\s*(?:Fixes:|Link:)/i || + # A Fixes: or Link: line + $commit_log_possible_stack_dump)) { + WARN("COMMIT_LOG_LONG_LINE", + "Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr); + $commit_log_long_line = 1; + } + +# Reset possible stack dump if a blank line is found + if ($in_commit_log && $commit_log_possible_stack_dump && + $line =~ /^\s*$/) { + $commit_log_possible_stack_dump = 0; + } + +# Check for git id commit length and improperly formed commit descriptions + if ($in_commit_log && !$commit_log_possible_stack_dump && + $line !~ /^\s*(?:Link|Patchwork|http|https|BugLink):/i && + ($line =~ /\bcommit\s+[0-9a-f]{5,}\b/i || + ($line =~ /(?:\s|^)[0-9a-f]{12,40}(?:[\s"'\(\[]|$)/i && + $line !~ /[\<\[][0-9a-f]{12,40}[\>\]]/i && + $line !~ /\bfixes:\s*[0-9a-f]{12,40}/i))) { + my $init_char = "c"; + my $orig_commit = ""; + my $short = 1; + my $long = 0; + my $case = 1; + my $space = 1; + my $hasdesc = 0; + my $hasparens = 0; + my $id = '0123456789ab'; + my $orig_desc = "commit description"; + my $description = ""; + + if ($line =~ /\b(c)ommit\s+([0-9a-f]{5,})\b/i) { + $init_char = $1; + $orig_commit = lc($2); + } elsif ($line =~ /\b([0-9a-f]{12,40})\b/i) { + $orig_commit = lc($1); + } + + $short = 0 if ($line =~ /\bcommit\s+[0-9a-f]{12,40}/i); + $long = 1 if ($line =~ /\bcommit\s+[0-9a-f]{41,}/i); + $space = 0 if ($line =~ /\bcommit [0-9a-f]/i); + $case = 0 if ($line =~ /\b[Cc]ommit\s+[0-9a-f]{5,40}[^A-F]/); + if ($line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("([^"]+)"\)/i) { + $orig_desc = $1; + $hasparens = 1; + } elsif ($line =~ /\bcommit\s+[0-9a-f]{5,}\s*$/i && + defined $rawlines[$linenr] && + $rawlines[$linenr] =~ /^\s*\("([^"]+)"\)/) { + $orig_desc = $1; + $hasparens = 1; + } elsif ($line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("[^"]+$/i && + defined $rawlines[$linenr] && + $rawlines[$linenr] =~ /^\s*[^"]+"\)/) { + $line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("([^"]+)$/i; + $orig_desc = $1; + $rawlines[$linenr] =~ /^\s*([^"]+)"\)/; + $orig_desc .= " " . $1; + $hasparens = 1; + } + + ($id, $description) = git_commit_info($orig_commit, + $id, $orig_desc); + + if ($short || $long || $space || $case || ($orig_desc ne $description) || !$hasparens) { + ERROR("GIT_COMMIT_ID", + "Please use git commit description style 'commit <12+ chars of sha1> (\"\")' - ie: '${init_char}ommit $id (\"$description\")'\n" . $herecurr); + } + } + +# Check for added, moved or deleted files + if (!$reported_maintainer_file && !$in_commit_log && + ($line =~ /^(?:new|deleted) file mode\s*\d+\s*$/ || + $line =~ /^rename (?:from|to) [\w\/\.\-]+\s*$/ || + ($line =~ /\{\s*([\w\/\.\-]*)\s*\=\>\s*([\w\/\.\-]*)\s*\}/ && + (defined($1) || defined($2))))) { + $reported_maintainer_file = 1; + WARN("FILE_PATH_CHANGES", + "added, moved or deleted file(s), does MAINTAINERS need updating?\n" . $herecurr); + } + +# Check for wrappage within a valid hunk of the file + if ($realcnt != 0 && $line !~ m{^(?:\+|-| |\\ No newline|$)}) { + ERROR("CORRUPTED_PATCH", + "patch seems to be corrupt (line wrapped?)\n" . + $herecurr) if (!$emitted_corrupt++); + } + +# Check for absolute kernel paths. + if ($tree) { + while ($line =~ m{(?:^|\s)(/\S*)}g) { + my $file = $1; + + if ($file =~ m{^(.*?)(?::\d+)+:?$} && + check_absolute_file($1, $herecurr)) { + # + } else { + check_absolute_file($file, $herecurr); + } + } + } + +# UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php + if (($realfile =~ /^$/ || $line =~ /^\+/) && + $rawline !~ m/^$UTF8*$/) { + my ($utf8_prefix) = ($rawline =~ /^($UTF8*)/); + + my $blank = copy_spacing($rawline); + my $ptr = substr($blank, 0, length($utf8_prefix)) . "^"; + my $hereptr = "$hereline$ptr\n"; + + CHK("INVALID_UTF8", + "Invalid UTF-8, patch and commit message should be encoded in UTF-8\n" . $hereptr); + } + +# Check if it's the start of a commit log +# (not a header line and we haven't seen the patch filename) + if ($in_header_lines && $realfile =~ /^$/ && + !($rawline =~ /^\s+\S/ || + $rawline =~ /^(commit\b|from\b|[\w-]+:).*$/i)) { + $in_header_lines = 0; + $in_commit_log = 1; + $has_commit_log = 1; + } + +# Check if there is UTF-8 in a commit log when a mail header has explicitly +# declined it, i.e defined some charset where it is missing. + if ($in_header_lines && + $rawline =~ /^Content-Type:.+charset="(.+)".*$/ && + $1 !~ /utf-8/i) { + $non_utf8_charset = 1; + } + + if ($in_commit_log && $non_utf8_charset && $realfile =~ /^$/ && + $rawline =~ /$NON_ASCII_UTF8/) { + WARN("UTF8_BEFORE_PATCH", + "8-bit UTF-8 used in possible commit log\n" . $herecurr); + } + +# Check for various typo / spelling mistakes + if (defined($misspellings) && + ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) { + while ($rawline =~ /(?:^|[^a-z@])($misspellings)(?:\b|$|[^a-z@])/gi) { + my $typo = $1; + my $typo_fix = $spelling_fix{lc($typo)}; + $typo_fix = ucfirst($typo_fix) if ($typo =~ /^[A-Z]/); + $typo_fix = uc($typo_fix) if ($typo =~ /^[A-Z]+$/); + my $msg_type = \&WARN; + $msg_type = \&CHK if ($file); + if (&{$msg_type}("TYPO_SPELLING", + "'$typo' may be misspelled - perhaps '$typo_fix'?\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/(^|[^A-Za-z@])($typo)($|[^A-Za-z@])/$1$typo_fix$3/; + } + } + } + +# ignore non-hunk lines and lines being removed + next if (!$hunk_line || $line =~ /^-/); + +#trailing whitespace + if ($line =~ /^\+.*\015/) { + my $herevet = "$here\n" . cat_vet($rawline) . "\n"; + if (ERROR("DOS_LINE_ENDINGS", + "DOS line endings\n" . $herevet) && + $fix) { + $fixed[$fixlinenr] =~ s/[\s\015]+$//; + } + } elsif ($rawline =~ /^\+.*\S\s+$/ || $rawline =~ /^\+\s+$/) { + my $herevet = "$here\n" . cat_vet($rawline) . "\n"; + if (ERROR("TRAILING_WHITESPACE", + "trailing whitespace\n" . $herevet) && + $fix) { + $fixed[$fixlinenr] =~ s/\s+$//; + } + + $rpt_cleaners = 1; + } + +# Check for FSF mailing addresses. + if ($rawline =~ /\bwrite to the Free/i || + $rawline =~ /\b59\s+Temple\s+Pl/i || + $rawline =~ /\b51\s+Franklin\s+St/i) { + my $herevet = "$here\n" . cat_vet($rawline) . "\n"; + my $msg_type = \&ERROR; + $msg_type = \&CHK if ($file); + &{$msg_type}("FSF_MAILING_ADDRESS", + "Do not include the paragraph about writing to the Free Software Foundation's mailing address from the sample GPL notice. The FSF has changed addresses in the past, and may do so again. Linux already includes a copy of the GPL.\n" . $herevet) + } + +# check for Kconfig help text having a real description +# Only applies when adding the entry originally, after that we do not have +# sufficient context to determine whether it is indeed long enough. + if ($realfile =~ /Kconfig/ && + $line =~ /^\+\s*config\s+/) { + my $length = 0; + my $cnt = $realcnt; + my $ln = $linenr + 1; + my $f; + my $is_start = 0; + my $is_end = 0; + for (; $cnt > 0 && defined $lines[$ln - 1]; $ln++) { + $f = $lines[$ln - 1]; + $cnt-- if ($lines[$ln - 1] !~ /^-/); + $is_end = $lines[$ln - 1] =~ /^\+/; + + next if ($f =~ /^-/); + last if (!$file && $f =~ /^\@\@/); + + if ($lines[$ln - 1] =~ /^\+\s*(?:bool|tristate)\s*\"/) { + $is_start = 1; + } elsif ($lines[$ln - 1] =~ /^\+\s*(?:---)?help(?:---)?$/) { + $length = -1; + } + + $f =~ s/^.//; + $f =~ s/#.*//; + $f =~ s/^\s+//; + next if ($f =~ /^$/); + if ($f =~ /^\s*config\s/) { + $is_end = 1; + last; + } + $length++; + } + if ($is_start && $is_end && $length < $min_conf_desc_length) { + WARN("CONFIG_DESCRIPTION", + "please write a paragraph that describes the config symbol fully\n" . $herecurr); + } + #print "is_start<$is_start> is_end<$is_end> length<$length>\n"; + } + +# discourage the addition of CONFIG_EXPERIMENTAL in Kconfig. + if ($realfile =~ /Kconfig/ && + $line =~ /.\s*depends on\s+.*\bEXPERIMENTAL\b/) { + WARN("CONFIG_EXPERIMENTAL", + "Use of CONFIG_EXPERIMENTAL is deprecated. For alternatives, see https://lkml.org/lkml/2012/10/23/580\n"); + } + +# discourage the use of boolean for type definition attributes of Kconfig options + if ($realfile =~ /Kconfig/ && + $line =~ /^\+\s*\bboolean\b/) { + WARN("CONFIG_TYPE_BOOLEAN", + "Use of boolean is deprecated, please use bool instead.\n" . $herecurr); + } + + if (($realfile =~ /Makefile.*/ || $realfile =~ /Kbuild.*/) && + ($line =~ /\+(EXTRA_[A-Z]+FLAGS).*/)) { + my $flag = $1; + my $replacement = { + 'EXTRA_AFLAGS' => 'asflags-y', + 'EXTRA_CFLAGS' => 'ccflags-y', + 'EXTRA_CPPFLAGS' => 'cppflags-y', + 'EXTRA_LDFLAGS' => 'ldflags-y', + }; + + WARN("DEPRECATED_VARIABLE", + "Use of $flag is deprecated, please use \`$replacement->{$flag} instead.\n" . $herecurr) if ($replacement->{$flag}); + } + +# check for DT compatible documentation + if (defined $root && + (($realfile =~ /\.dtsi?$/ && $line =~ /^\+\s*compatible\s*=\s*\"/) || + ($realfile =~ /\.[ch]$/ && $line =~ /^\+.*\.compatible\s*=\s*\"/))) { + + my @compats = $rawline =~ /\"([a-zA-Z0-9\-\,\.\+_]+)\"/g; + + my $dt_path = $root . "/Documentation/devicetree/bindings/"; + my $vp_file = $dt_path . "vendor-prefixes.txt"; + + foreach my $compat (@compats) { + my $compat2 = $compat; + $compat2 =~ s/\,[a-zA-Z0-9]*\-/\,<\.\*>\-/; + my $compat3 = $compat; + $compat3 =~ s/\,([a-z]*)[0-9]*\-/\,$1<\.\*>\-/; + `grep -Erq "$compat|$compat2|$compat3" $dt_path`; + if ( $? >> 8 ) { + WARN("UNDOCUMENTED_DT_STRING", + "DT compatible string \"$compat\" appears un-documented -- check $dt_path\n" . $herecurr); + } + + next if $compat !~ /^([a-zA-Z0-9\-]+)\,/; + my $vendor = $1; + `grep -Eq "^$vendor\\b" $vp_file`; + if ( $? >> 8 ) { + WARN("UNDOCUMENTED_DT_STRING", + "DT compatible string vendor \"$vendor\" appears un-documented -- check $vp_file\n" . $herecurr); + } + } + } + +# check we are in a valid source file if not then ignore this hunk + next if ($realfile !~ /\.(h|c|s|S|pl|sh|dtsi|dts)$/); + +# line length limit (with some exclusions) +# +# There are a few types of lines that may extend beyond $max_line_length: +# logging functions like pr_info that end in a string +# lines with a single string +# #defines that are a single string +# +# There are 3 different line length message types: +# LONG_LINE_COMMENT a comment starts before but extends beyond $max_linelength +# LONG_LINE_STRING a string starts before but extends beyond $max_line_length +# LONG_LINE all other lines longer than $max_line_length +# +# if LONG_LINE is ignored, the other 2 types are also ignored +# + + if ($line =~ /^\+/ && $length > $max_line_length) { + my $msg_type = "LONG_LINE"; + + # Check the allowed long line types first + + # logging functions that end in a string that starts + # before $max_line_length + if ($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(?:KERN_\S+\s*|[^"]*))?($String\s*(?:|,|\)\s*;)\s*)$/ && + length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) { + $msg_type = ""; + + # lines with only strings (w/ possible termination) + # #defines with only strings + } elsif ($line =~ /^\+\s*$String\s*(?:\s*|,|\)\s*;)\s*$/ || + $line =~ /^\+\s*#\s*define\s+\w+\s+$String$/) { + $msg_type = ""; + + # EFI_GUID is another special case + } elsif ($line =~ /^\+.*\bEFI_GUID\s*\(/) { + $msg_type = ""; + + # Otherwise set the alternate message types + + # a comment starts before $max_line_length + } elsif ($line =~ /($;[\s$;]*)$/ && + length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) { + $msg_type = "LONG_LINE_COMMENT" + + # a quoted string starts before $max_line_length + } elsif ($sline =~ /\s*($String(?:\s*(?:\\|,\s*|\)\s*;\s*))?)$/ && + length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) { + $msg_type = "LONG_LINE_STRING" + } + + if ($msg_type ne "" && + (show_type("LONG_LINE") || show_type($msg_type))) { + WARN($msg_type, + "line over $max_line_length characters\n" . $herecurr); + } + } + +# check for adding lines without a newline. + if ($line =~ /^\+/ && defined $lines[$linenr] && $lines[$linenr] =~ /^\\ No newline at end of file/) { + WARN("MISSING_EOF_NEWLINE", + "adding a line without newline at end of file\n" . $herecurr); + } + +# Blackfin: use hi/lo macros + if ($realfile =~ m@arch/blackfin/.*\.S$@) { + if ($line =~ /\.[lL][[:space:]]*=.*&[[:space:]]*0x[fF][fF][fF][fF]/) { + my $herevet = "$here\n" . cat_vet($line) . "\n"; + ERROR("LO_MACRO", + "use the LO() macro, not (... & 0xFFFF)\n" . $herevet); + } + if ($line =~ /\.[hH][[:space:]]*=.*>>[[:space:]]*16/) { + my $herevet = "$here\n" . cat_vet($line) . "\n"; + ERROR("HI_MACRO", + "use the HI() macro, not (... >> 16)\n" . $herevet); + } + } + +# check we are in a valid source file C or perl if not then ignore this hunk + next if ($realfile !~ /\.(h|c|pl|dtsi|dts)$/); + +# at the beginning of a line any tabs must come first and anything +# more than 8 must use tabs. + if ($rawline =~ /^\+\s* \t\s*\S/ || + $rawline =~ /^\+\s* \s*/) { + my $herevet = "$here\n" . cat_vet($rawline) . "\n"; + $rpt_cleaners = 1; + if (ERROR("CODE_INDENT", + "code indent should use tabs where possible\n" . $herevet) && + $fix) { + $fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e; + } + } + +# check for space before tabs. + if ($rawline =~ /^\+/ && $rawline =~ / \t/) { + my $herevet = "$here\n" . cat_vet($rawline) . "\n"; + if (WARN("SPACE_BEFORE_TAB", + "please, no space before tabs\n" . $herevet) && + $fix) { + while ($fixed[$fixlinenr] =~ + s/(^\+.*) {8,8}\t/$1\t\t/) {} + while ($fixed[$fixlinenr] =~ + s/(^\+.*) +\t/$1\t/) {} + } + } + +# check for && or || at the start of a line + if ($rawline =~ /^\+\s*(&&|\|\|)/) { + CHK("LOGICAL_CONTINUATIONS", + "Logical continuations should be on the previous line\n" . $hereprev); + } + +# check indentation starts on a tab stop + if ($^V && $^V ge 5.10.0 && + $sline =~ /^\+\t+( +)(?:$c90_Keywords\b|\{\s*$|\}\s*(?:else\b|while\b|\s*$))/) { + my $indent = length($1); + if ($indent % 8) { + if (WARN("TABSTOP", + "Statements should start on a tabstop\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s@(^\+\t+) +@$1 . "\t" x ($indent/8)@e; + } + } + } + +# check multi-line statement indentation matches previous line + if ($^V && $^V ge 5.10.0 && + $prevline =~ /^\+([ \t]*)((?:$c90_Keywords(?:\s+if)\s*)|(?:$Declare\s*)?(?:$Ident|\(\s*\*\s*$Ident\s*\))\s*|$Ident\s*=\s*$Ident\s*)\(.*(\&\&|\|\||,)\s*$/) { + $prevline =~ /^\+(\t*)(.*)$/; + my $oldindent = $1; + my $rest = $2; + + my $pos = pos_last_openparen($rest); + if ($pos >= 0) { + $line =~ /^(\+| )([ \t]*)/; + my $newindent = $2; + + my $goodtabindent = $oldindent . + "\t" x ($pos / 8) . + " " x ($pos % 8); + my $goodspaceindent = $oldindent . " " x $pos; + + if ($newindent ne $goodtabindent && + $newindent ne $goodspaceindent) { + + if (CHK("PARENTHESIS_ALIGNMENT", + "Alignment should match open parenthesis\n" . $hereprev) && + $fix && $line =~ /^\+/) { + $fixed[$fixlinenr] =~ + s/^\+[ \t]*/\+$goodtabindent/; + } + } + } + } + +# check for space after cast like "(int) foo" or "(struct foo) bar" +# avoid checking a few false positives: +# "sizeof(<type>)" or "__alignof__(<type>)" +# function pointer declarations like "(*foo)(int) = bar;" +# structure definitions like "(struct foo) { 0 };" +# multiline macros that define functions +# known attributes or the __attribute__ keyword + if ($line =~ /^\+(.*)\(\s*$Type\s*\)([ \t]++)((?![={]|\\$|$Attribute|__attribute__))/ && + (!defined($1) || $1 !~ /\b(?:sizeof|__alignof__)\s*$/)) { + if (CHK("SPACING", + "No space is necessary after a cast\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/(\(\s*$Type\s*\))[ \t]+/$1/; + } + } + +# Block comment styles +# Networking with an initial /* + if ($realfile =~ m@^(drivers/net/|net/)@ && + $prevrawline =~ /^\+[ \t]*\/\*[ \t]*$/ && + $rawline =~ /^\+[ \t]*\*/ && + $realline > 2) { + WARN("NETWORKING_BLOCK_COMMENT_STYLE", + "networking block comments don't use an empty /* line, use /* Comment...\n" . $hereprev); + } + +# Block comments use * on subsequent lines + if ($prevline =~ /$;[ \t]*$/ && #ends in comment + $prevrawline =~ /^\+.*?\/\*/ && #starting /* + $prevrawline !~ /\*\/[ \t]*$/ && #no trailing */ + $rawline =~ /^\+/ && #line is new + $rawline !~ /^\+[ \t]*\*/) { #no leading * + WARN("BLOCK_COMMENT_STYLE", + "Block comments use * on subsequent lines\n" . $hereprev); + } + +# Block comments use */ on trailing lines + if ($rawline !~ m@^\+[ \t]*\*/[ \t]*$@ && #trailing */ + $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ && #inline /*...*/ + $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ && #trailing **/ + $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) { #non blank */ + WARN("BLOCK_COMMENT_STYLE", + "Block comments use a trailing */ on a separate line\n" . $herecurr); + } + +# Block comment * alignment + if ($prevline =~ /$;[ \t]*$/ && #ends in comment + $line =~ /^\+[ \t]*$;/ && #leading comment + $rawline =~ /^\+[ \t]*\*/ && #leading * + (($prevrawline =~ /^\+.*?\/\*/ && #leading /* + $prevrawline !~ /\*\/[ \t]*$/) || #no trailing */ + $prevrawline =~ /^\+[ \t]*\*/)) { #leading * + my $oldindent; + $prevrawline =~ m@^\+([ \t]*/?)\*@; + if (defined($1)) { + $oldindent = expand_tabs($1); + } else { + $prevrawline =~ m@^\+(.*/?)\*@; + $oldindent = expand_tabs($1); + } + $rawline =~ m@^\+([ \t]*)\*@; + my $newindent = $1; + $newindent = expand_tabs($newindent); + if (length($oldindent) ne length($newindent)) { + WARN("BLOCK_COMMENT_STYLE", + "Block comments should align the * on each line\n" . $hereprev); + } + } + +# check for missing blank lines after struct/union declarations +# with exceptions for various attributes and macros + if ($prevline =~ /^[\+ ]};?\s*$/ && + $line =~ /^\+/ && + !($line =~ /^\+\s*$/ || + $line =~ /^\+\s*EXPORT_SYMBOL/ || + $line =~ /^\+\s*MODULE_/i || + $line =~ /^\+\s*\#\s*(?:end|elif|else)/ || + $line =~ /^\+[a-z_]*init/ || + $line =~ /^\+\s*(?:static\s+)?[A-Z_]*ATTR/ || + $line =~ /^\+\s*DECLARE/ || + $line =~ /^\+\s*__setup/)) { + if (CHK("LINE_SPACING", + "Please use a blank line after function/struct/union/enum declarations\n" . $hereprev) && + $fix) { + fix_insert_line($fixlinenr, "\+"); + } + } + +# check for multiple consecutive blank lines + if ($prevline =~ /^[\+ ]\s*$/ && + $line =~ /^\+\s*$/ && + $last_blank_line != ($linenr - 1)) { + if (CHK("LINE_SPACING", + "Please don't use multiple blank lines\n" . $hereprev) && + $fix) { + fix_delete_line($fixlinenr, $rawline); + } + + $last_blank_line = $linenr; + } + +# check for missing blank lines after declarations + if ($sline =~ /^\+\s+\S/ && #Not at char 1 + # actual declarations + ($prevline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ || + # function pointer declarations + $prevline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ || + # foo bar; where foo is some local typedef or #define + $prevline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ || + # known declaration macros + $prevline =~ /^\+\s+$declaration_macros/) && + # for "else if" which can look like "$Ident $Ident" + !($prevline =~ /^\+\s+$c90_Keywords\b/ || + # other possible extensions of declaration lines + $prevline =~ /(?:$Compare|$Assignment|$Operators)\s*$/ || + # not starting a section or a macro "\" extended line + $prevline =~ /(?:\{\s*|\\)$/) && + # looks like a declaration + !($sline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ || + # function pointer declarations + $sline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ || + # foo bar; where foo is some local typedef or #define + $sline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ || + # known declaration macros + $sline =~ /^\+\s+$declaration_macros/ || + # start of struct or union or enum + $sline =~ /^\+\s+(?:union|struct|enum|typedef)\b/ || + # start or end of block or continuation of declaration + $sline =~ /^\+\s+(?:$|[\{\}\.\#\"\?\:\(\[])/ || + # bitfield continuation + $sline =~ /^\+\s+$Ident\s*:\s*\d+\s*[,;]/ || + # other possible extensions of declaration lines + $sline =~ /^\+\s+\(?\s*(?:$Compare|$Assignment|$Operators)/) && + # indentation of previous and current line are the same + (($prevline =~ /\+(\s+)\S/) && $sline =~ /^\+$1\S/)) { + if (WARN("LINE_SPACING", + "Missing a blank line after declarations\n" . $hereprev) && + $fix) { + fix_insert_line($fixlinenr, "\+"); + } + } + +# check for spaces at the beginning of a line. +# Exceptions: +# 1) within comments +# 2) indented preprocessor commands +# 3) hanging labels + if ($rawline =~ /^\+ / && $line !~ /^\+ *(?:$;|#|$Ident:)/) { + my $herevet = "$here\n" . cat_vet($rawline) . "\n"; + if (WARN("LEADING_SPACE", + "please, no spaces at the start of a line\n" . $herevet) && + $fix) { + $fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e; + } + } + +# check we are in a valid C source file if not then ignore this hunk + next if ($realfile !~ /\.(h|c)$/); + +# check indentation of any line with a bare else +# (but not if it is a multiple line "if (foo) return bar; else return baz;") +# if the previous line is a break or return and is indented 1 tab more... + if ($sline =~ /^\+([\t]+)(?:}[ \t]*)?else(?:[ \t]*{)?\s*$/) { + my $tabs = length($1) + 1; + if ($prevline =~ /^\+\t{$tabs,$tabs}break\b/ || + ($prevline =~ /^\+\t{$tabs,$tabs}return\b/ && + defined $lines[$linenr] && + $lines[$linenr] !~ /^[ \+]\t{$tabs,$tabs}return/)) { + WARN("UNNECESSARY_ELSE", + "else is not generally useful after a break or return\n" . $hereprev); + } + } + +# check indentation of a line with a break; +# if the previous line is a goto or return and is indented the same # of tabs + if ($sline =~ /^\+([\t]+)break\s*;\s*$/) { + my $tabs = $1; + if ($prevline =~ /^\+$tabs(?:goto|return)\b/) { + WARN("UNNECESSARY_BREAK", + "break is not useful after a goto or return\n" . $hereprev); + } + } + +# discourage the addition of CONFIG_EXPERIMENTAL in #if(def). + if ($line =~ /^\+\s*\#\s*if.*\bCONFIG_EXPERIMENTAL\b/) { + WARN("CONFIG_EXPERIMENTAL", + "Use of CONFIG_EXPERIMENTAL is deprecated. For alternatives, see https://lkml.org/lkml/2012/10/23/580\n"); + } + +# check for RCS/CVS revision markers + if ($rawline =~ /^\+.*\$(Revision|Log|Id)(?:\$|)/) { + WARN("CVS_KEYWORD", + "CVS style keyword markers, these will _not_ be updated\n". $herecurr); + } + +# Blackfin: don't use __builtin_bfin_[cs]sync + if ($line =~ /__builtin_bfin_csync/) { + my $herevet = "$here\n" . cat_vet($line) . "\n"; + ERROR("CSYNC", + "use the CSYNC() macro in asm/blackfin.h\n" . $herevet); + } + if ($line =~ /__builtin_bfin_ssync/) { + my $herevet = "$here\n" . cat_vet($line) . "\n"; + ERROR("SSYNC", + "use the SSYNC() macro in asm/blackfin.h\n" . $herevet); + } + +# check for old HOTPLUG __dev<foo> section markings + if ($line =~ /\b(__dev(init|exit)(data|const|))\b/) { + WARN("HOTPLUG_SECTION", + "Using $1 is unnecessary\n" . $herecurr); + } + +# Check for potential 'bare' types + my ($stat, $cond, $line_nr_next, $remain_next, $off_next, + $realline_next); +#print "LINE<$line>\n"; + if ($linenr >= $suppress_statement && + $realcnt && $sline =~ /.\s*\S/) { + ($stat, $cond, $line_nr_next, $remain_next, $off_next) = + ctx_statement_block($linenr, $realcnt, 0); + $stat =~ s/\n./\n /g; + $cond =~ s/\n./\n /g; + +#print "linenr<$linenr> <$stat>\n"; + # If this statement has no statement boundaries within + # it there is no point in retrying a statement scan + # until we hit end of it. + my $frag = $stat; $frag =~ s/;+\s*$//; + if ($frag !~ /(?:{|;)/) { +#print "skip<$line_nr_next>\n"; + $suppress_statement = $line_nr_next; + } + + # Find the real next line. + $realline_next = $line_nr_next; + if (defined $realline_next && + (!defined $lines[$realline_next - 1] || + substr($lines[$realline_next - 1], $off_next) =~ /^\s*$/)) { + $realline_next++; + } + + my $s = $stat; + $s =~ s/{.*$//s; + + # Ignore goto labels. + if ($s =~ /$Ident:\*$/s) { + + # Ignore functions being called + } elsif ($s =~ /^.\s*$Ident\s*\(/s) { + + } elsif ($s =~ /^.\s*else\b/s) { + + # declarations always start with types + } elsif ($prev_values eq 'E' && $s =~ /^.\s*(?:$Storage\s+)?(?:$Inline\s+)?(?:const\s+)?((?:\s*$Ident)+?)\b(?:\s+$Sparse)?\s*\**\s*(?:$Ident|\(\*[^\)]*\))(?:\s*$Modifier)?\s*(?:;|=|,|\()/s) { + my $type = $1; + $type =~ s/\s+/ /g; + possible($type, "A:" . $s); + + # definitions in global scope can only start with types + } elsif ($s =~ /^.(?:$Storage\s+)?(?:$Inline\s+)?(?:const\s+)?($Ident)\b\s*(?!:)/s) { + possible($1, "B:" . $s); + } + + # any (foo ... *) is a pointer cast, and foo is a type + while ($s =~ /\(($Ident)(?:\s+$Sparse)*[\s\*]+\s*\)/sg) { + possible($1, "C:" . $s); + } + + # Check for any sort of function declaration. + # int foo(something bar, other baz); + # void (*store_gdt)(x86_descr_ptr *); + if ($prev_values eq 'E' && $s =~ /^(.(?:typedef\s*)?(?:(?:$Storage|$Inline)\s*)*\s*$Type\s*(?:\b$Ident|\(\*\s*$Ident\))\s*)\(/s) { + my ($name_len) = length($1); + + my $ctx = $s; + substr($ctx, 0, $name_len + 1, ''); + $ctx =~ s/\)[^\)]*$//; + + for my $arg (split(/\s*,\s*/, $ctx)) { + if ($arg =~ /^(?:const\s+)?($Ident)(?:\s+$Sparse)*\s*\**\s*(:?\b$Ident)?$/s || $arg =~ /^($Ident)$/s) { + + possible($1, "D:" . $s); + } + } + } + + } + +# +# Checks which may be anchored in the context. +# + +# Check for switch () and associated case and default +# statements should be at the same indent. + if ($line=~/\bswitch\s*\(.*\)/) { + my $err = ''; + my $sep = ''; + my @ctx = ctx_block_outer($linenr, $realcnt); + shift(@ctx); + for my $ctx (@ctx) { + my ($clen, $cindent) = line_stats($ctx); + if ($ctx =~ /^\+\s*(case\s+|default:)/ && + $indent != $cindent) { + $err .= "$sep$ctx\n"; + $sep = ''; + } else { + $sep = "[...]\n"; + } + } + if ($err ne '') { + ERROR("SWITCH_CASE_INDENT_LEVEL", + "switch and case should be at the same indent\n$hereline$err"); + } + } + +# if/while/etc brace do not go on next line, unless defining a do while loop, +# or if that brace on the next line is for something else + if ($line =~ /(.*)\b((?:if|while|for|switch|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|do\b|else\b)/ && $line !~ /^.\s*\#/) { + my $pre_ctx = "$1$2"; + + my ($level, @ctx) = ctx_statement_level($linenr, $realcnt, 0); + + if ($line =~ /^\+\t{6,}/) { + WARN("DEEP_INDENTATION", + "Too many leading tabs - consider code refactoring\n" . $herecurr); + } + + my $ctx_cnt = $realcnt - $#ctx - 1; + my $ctx = join("\n", @ctx); + + my $ctx_ln = $linenr; + my $ctx_skip = $realcnt; + + while ($ctx_skip > $ctx_cnt || ($ctx_skip == $ctx_cnt && + defined $lines[$ctx_ln - 1] && + $lines[$ctx_ln - 1] =~ /^-/)) { + ##print "SKIP<$ctx_skip> CNT<$ctx_cnt>\n"; + $ctx_skip-- if (!defined $lines[$ctx_ln - 1] || $lines[$ctx_ln - 1] !~ /^-/); + $ctx_ln++; + } + + #print "realcnt<$realcnt> ctx_cnt<$ctx_cnt>\n"; + #print "pre<$pre_ctx>\nline<$line>\nctx<$ctx>\nnext<$lines[$ctx_ln - 1]>\n"; + + if ($ctx !~ /{\s*/ && defined($lines[$ctx_ln - 1]) && $lines[$ctx_ln - 1] =~ /^\+\s*{/) { + ERROR("OPEN_BRACE", + "that open brace { should be on the previous line\n" . + "$here\n$ctx\n$rawlines[$ctx_ln - 1]\n"); + } + if ($level == 0 && $pre_ctx !~ /}\s*while\s*\($/ && + $ctx =~ /\)\s*\;\s*$/ && + defined $lines[$ctx_ln - 1]) + { + my ($nlength, $nindent) = line_stats($lines[$ctx_ln - 1]); + if ($nindent > $indent) { + WARN("TRAILING_SEMICOLON", + "trailing semicolon indicates no statements, indent implies otherwise\n" . + "$here\n$ctx\n$rawlines[$ctx_ln - 1]\n"); + } + } + } + +# Check relative indent for conditionals and blocks. + if ($line =~ /\b(?:(?:if|while|for|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|do\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) { + ($stat, $cond, $line_nr_next, $remain_next, $off_next) = + ctx_statement_block($linenr, $realcnt, 0) + if (!defined $stat); + my ($s, $c) = ($stat, $cond); + + substr($s, 0, length($c), ''); + + # remove inline comments + $s =~ s/$;/ /g; + $c =~ s/$;/ /g; + + # Find out how long the conditional actually is. + my @newlines = ($c =~ /\n/gs); + my $cond_lines = 1 + $#newlines; + + # Make sure we remove the line prefixes as we have + # none on the first line, and are going to readd them + # where necessary. + $s =~ s/\n./\n/gs; + while ($s =~ /\n\s+\\\n/) { + $cond_lines += $s =~ s/\n\s+\\\n/\n/g; + } + + # We want to check the first line inside the block + # starting at the end of the conditional, so remove: + # 1) any blank line termination + # 2) any opening brace { on end of the line + # 3) any do (...) { + my $continuation = 0; + my $check = 0; + $s =~ s/^.*\bdo\b//; + $s =~ s/^\s*{//; + if ($s =~ s/^\s*\\//) { + $continuation = 1; + } + if ($s =~ s/^\s*?\n//) { + $check = 1; + $cond_lines++; + } + + # Also ignore a loop construct at the end of a + # preprocessor statement. + if (($prevline =~ /^.\s*#\s*define\s/ || + $prevline =~ /\\\s*$/) && $continuation == 0) { + $check = 0; + } + + my $cond_ptr = -1; + $continuation = 0; + while ($cond_ptr != $cond_lines) { + $cond_ptr = $cond_lines; + + # If we see an #else/#elif then the code + # is not linear. + if ($s =~ /^\s*\#\s*(?:else|elif)/) { + $check = 0; + } + + # Ignore: + # 1) blank lines, they should be at 0, + # 2) preprocessor lines, and + # 3) labels. + if ($continuation || + $s =~ /^\s*?\n/ || + $s =~ /^\s*#\s*?/ || + $s =~ /^\s*$Ident\s*:/) { + $continuation = ($s =~ /^.*?\\\n/) ? 1 : 0; + if ($s =~ s/^.*?\n//) { + $cond_lines++; + } + } + } + + my (undef, $sindent) = line_stats("+" . $s); + my $stat_real = raw_line($linenr, $cond_lines); + + # Check if either of these lines are modified, else + # this is not this patch's fault. + if (!defined($stat_real) || + $stat !~ /^\+/ && $stat_real !~ /^\+/) { + $check = 0; + } + if (defined($stat_real) && $cond_lines > 1) { + $stat_real = "[...]\n$stat_real"; + } + + #print "line<$line> prevline<$prevline> indent<$indent> sindent<$sindent> check<$check> continuation<$continuation> s<$s> cond_lines<$cond_lines> stat_real<$stat_real> stat<$stat>\n"; + + if ($check && $s ne '' && + (($sindent % 8) != 0 || + ($sindent < $indent) || + ($sindent > $indent + 8))) { + WARN("SUSPECT_CODE_INDENT", + "suspect code indent for conditional statements ($indent, $sindent)\n" . $herecurr . "$stat_real\n"); + } + } + + # Track the 'values' across context and added lines. + my $opline = $line; $opline =~ s/^./ /; + my ($curr_values, $curr_vars) = + annotate_values($opline . "\n", $prev_values); + $curr_values = $prev_values . $curr_values; + if ($dbg_values) { + my $outline = $opline; $outline =~ s/\t/ /g; + print "$linenr > .$outline\n"; + print "$linenr > $curr_values\n"; + print "$linenr > $curr_vars\n"; + } + $prev_values = substr($curr_values, -1); + +#ignore lines not being added + next if ($line =~ /^[^\+]/); + +# check for declarations of signed or unsigned without int + while ($line =~ m{\b($Declare)\s*(?!char\b|short\b|int\b|long\b)\s*($Ident)?\s*[=,;\[\)\(]}g) { + my $type = $1; + my $var = $2; + $var = "" if (!defined $var); + if ($type =~ /^(?:(?:$Storage|$Inline|$Attribute)\s+)*((?:un)?signed)((?:\s*\*)*)\s*$/) { + my $sign = $1; + my $pointer = $2; + + $pointer = "" if (!defined $pointer); + + if (WARN("UNSPECIFIED_INT", + "Prefer '" . trim($sign) . " int" . rtrim($pointer) . "' to bare use of '$sign" . rtrim($pointer) . "'\n" . $herecurr) && + $fix) { + my $decl = trim($sign) . " int "; + my $comp_pointer = $pointer; + $comp_pointer =~ s/\s//g; + $decl .= $comp_pointer; + $decl = rtrim($decl) if ($var eq ""); + $fixed[$fixlinenr] =~ s@\b$sign\s*\Q$pointer\E\s*$var\b@$decl$var@; + } + } + } + +# TEST: allow direct testing of the type matcher. + if ($dbg_type) { + if ($line =~ /^.\s*$Declare\s*$/) { + ERROR("TEST_TYPE", + "TEST: is type\n" . $herecurr); + } elsif ($dbg_type > 1 && $line =~ /^.+($Declare)/) { + ERROR("TEST_NOT_TYPE", + "TEST: is not type ($1 is)\n". $herecurr); + } + next; + } +# TEST: allow direct testing of the attribute matcher. + if ($dbg_attr) { + if ($line =~ /^.\s*$Modifier\s*$/) { + ERROR("TEST_ATTR", + "TEST: is attr\n" . $herecurr); + } elsif ($dbg_attr > 1 && $line =~ /^.+($Modifier)/) { + ERROR("TEST_NOT_ATTR", + "TEST: is not attr ($1 is)\n". $herecurr); + } + next; + } + +# check for initialisation to aggregates open brace on the next line + if ($line =~ /^.\s*{/ && + $prevline =~ /(?:^|[^=])=\s*$/) { + if (ERROR("OPEN_BRACE", + "that open brace { should be on the previous line\n" . $hereprev) && + $fix && $prevline =~ /^\+/ && $line =~ /^\+/) { + fix_delete_line($fixlinenr - 1, $prevrawline); + fix_delete_line($fixlinenr, $rawline); + my $fixedline = $prevrawline; + $fixedline =~ s/\s*=\s*$/ = {/; + fix_insert_line($fixlinenr, $fixedline); + $fixedline = $line; + $fixedline =~ s/^(.\s*){\s*/$1/; + fix_insert_line($fixlinenr, $fixedline); + } + } + +# +# Checks which are anchored on the added line. +# + +# check for malformed paths in #include statements (uses RAW line) + if ($rawline =~ m{^.\s*\#\s*include\s+[<"](.*)[">]}) { + my $path = $1; + if ($path =~ m{//}) { + ERROR("MALFORMED_INCLUDE", + "malformed #include filename\n" . $herecurr); + } + if ($path =~ "^uapi/" && $realfile =~ m@\binclude/uapi/@) { + ERROR("UAPI_INCLUDE", + "No #include in ...include/uapi/... should use a uapi/ path prefix\n" . $herecurr); + } + } + +# no C99 // comments + if ($line =~ m{//}) { + if (ERROR("C99_COMMENTS", + "do not use C99 // comments\n" . $herecurr) && + $fix) { + my $line = $fixed[$fixlinenr]; + if ($line =~ /\/\/(.*)$/) { + my $comment = trim($1); + $fixed[$fixlinenr] =~ s@\/\/(.*)$@/\* $comment \*/@; + } + } + } + # Remove C99 comments. + $line =~ s@//.*@@; + $opline =~ s@//.*@@; + +# EXPORT_SYMBOL should immediately follow the thing it is exporting, consider +# the whole statement. +#print "APW <$lines[$realline_next - 1]>\n"; + if (defined $realline_next && + exists $lines[$realline_next - 1] && + !defined $suppress_export{$realline_next} && + ($lines[$realline_next - 1] =~ /EXPORT_SYMBOL.*\((.*)\)/ || + $lines[$realline_next - 1] =~ /EXPORT_UNUSED_SYMBOL.*\((.*)\)/)) { + # Handle definitions which produce identifiers with + # a prefix: + # XXX(foo); + # EXPORT_SYMBOL(something_foo); + my $name = $1; + if ($stat =~ /^(?:.\s*}\s*\n)?.([A-Z_]+)\s*\(\s*($Ident)/ && + $name =~ /^${Ident}_$2/) { +#print "FOO C name<$name>\n"; + $suppress_export{$realline_next} = 1; + + } elsif ($stat !~ /(?: + \n.}\s*$| + ^.DEFINE_$Ident\(\Q$name\E\)| + ^.DECLARE_$Ident\(\Q$name\E\)| + ^.LIST_HEAD\(\Q$name\E\)| + ^.(?:$Storage\s+)?$Type\s*\(\s*\*\s*\Q$name\E\s*\)\s*\(| + \b\Q$name\E(?:\s+$Attribute)*\s*(?:;|=|\[|\() + )/x) { +#print "FOO A<$lines[$realline_next - 1]> stat<$stat> name<$name>\n"; + $suppress_export{$realline_next} = 2; + } else { + $suppress_export{$realline_next} = 1; + } + } + if (!defined $suppress_export{$linenr} && + $prevline =~ /^.\s*$/ && + ($line =~ /EXPORT_SYMBOL.*\((.*)\)/ || + $line =~ /EXPORT_UNUSED_SYMBOL.*\((.*)\)/)) { +#print "FOO B <$lines[$linenr - 1]>\n"; + $suppress_export{$linenr} = 2; + } + if (defined $suppress_export{$linenr} && + $suppress_export{$linenr} == 2) { + WARN("EXPORT_SYMBOL", + "EXPORT_SYMBOL(foo); should immediately follow its function/variable\n" . $herecurr); + } + +# check for global initialisers. + if ($line =~ /^\+$Type\s*$Ident(?:\s+$Modifier)*\s*=\s*($zero_initializer)\s*;/) { + if (ERROR("GLOBAL_INITIALISERS", + "do not initialise globals to $1\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/(^.$Type\s*$Ident(?:\s+$Modifier)*)\s*=\s*$zero_initializer\s*;/$1;/; + } + } +# check for static initialisers. + if ($line =~ /^\+.*\bstatic\s.*=\s*($zero_initializer)\s*;/) { + if (ERROR("INITIALISED_STATIC", + "do not initialise statics to $1\n" . + $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/(\bstatic\s.*?)\s*=\s*$zero_initializer\s*;/$1;/; + } + } + +# check for misordered declarations of char/short/int/long with signed/unsigned + while ($sline =~ m{(\b$TypeMisordered\b)}g) { + my $tmp = trim($1); + WARN("MISORDERED_TYPE", + "type '$tmp' should be specified in [[un]signed] [short|int|long|long long] order\n" . $herecurr); + } + +# check for static const char * arrays. + if ($line =~ /\bstatic\s+const\s+char\s*\*\s*(\w+)\s*\[\s*\]\s*=\s*/) { + WARN("STATIC_CONST_CHAR_ARRAY", + "static const char * array should probably be static const char * const\n" . + $herecurr); + } + +# check for static char foo[] = "bar" declarations. + if ($line =~ /\bstatic\s+char\s+(\w+)\s*\[\s*\]\s*=\s*"/) { + WARN("STATIC_CONST_CHAR_ARRAY", + "static char array declaration should probably be static const char\n" . + $herecurr); + } + +# check for const <foo> const where <foo> is not a pointer or array type + if ($sline =~ /\bconst\s+($BasicType)\s+const\b/) { + my $found = $1; + if ($sline =~ /\bconst\s+\Q$found\E\s+const\b\s*\*/) { + WARN("CONST_CONST", + "'const $found const *' should probably be 'const $found * const'\n" . $herecurr); + } elsif ($sline !~ /\bconst\s+\Q$found\E\s+const\s+\w+\s*\[/) { + WARN("CONST_CONST", + "'const $found const' should probably be 'const $found'\n" . $herecurr); + } + } + +# check for non-global char *foo[] = {"bar", ...} declarations. + if ($line =~ /^.\s+(?:static\s+|const\s+)?char\s+\*\s*\w+\s*\[\s*\]\s*=\s*\{/) { + WARN("STATIC_CONST_CHAR_ARRAY", + "char * array declaration might be better as static const\n" . + $herecurr); + } + +# check for sizeof(foo)/sizeof(foo[0]) that could be ARRAY_SIZE(foo) + if ($line =~ m@\bsizeof\s*\(\s*($Lval)\s*\)@) { + my $array = $1; + if ($line =~ m@\b(sizeof\s*\(\s*\Q$array\E\s*\)\s*/\s*sizeof\s*\(\s*\Q$array\E\s*\[\s*0\s*\]\s*\))@) { + my $array_div = $1; + if (WARN("ARRAY_SIZE", + "Prefer ARRAY_SIZE($array)\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\Q$array_div\E/ARRAY_SIZE($array)/; + } + } + } + +# check for function declarations without arguments like "int foo()" + if ($line =~ /(\b$Type\s+$Ident)\s*\(\s*\)/) { + if (ERROR("FUNCTION_WITHOUT_ARGS", + "Bad function definition - $1() should probably be $1(void)\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/(\b($Type)\s+($Ident))\s*\(\s*\)/$2 $3(void)/; + } + } + +# check for new typedefs, only function parameters and sparse annotations +# make sense. + if ($line =~ /\btypedef\s/ && + $line !~ /\btypedef\s+$Type\s*\(\s*\*?$Ident\s*\)\s*\(/ && + $line !~ /\btypedef\s+$Type\s+$Ident\s*\(/ && + $line !~ /\b$typeTypedefs\b/ && + $line !~ /\b__bitwise(?:__|)\b/) { + WARN("NEW_TYPEDEFS", + "do not add new typedefs\n" . $herecurr); + } + +# * goes on variable not on type + # (char*[ const]) + while ($line =~ m{(\($NonptrType(\s*(?:$Modifier\b\s*|\*\s*)+)\))}g) { + #print "AA<$1>\n"; + my ($ident, $from, $to) = ($1, $2, $2); + + # Should start with a space. + $to =~ s/^(\S)/ $1/; + # Should not end with a space. + $to =~ s/\s+$//; + # '*'s should not have spaces between. + while ($to =~ s/\*\s+\*/\*\*/) { + } + +## print "1: from<$from> to<$to> ident<$ident>\n"; + if ($from ne $to) { + if (ERROR("POINTER_LOCATION", + "\"(foo$from)\" should be \"(foo$to)\"\n" . $herecurr) && + $fix) { + my $sub_from = $ident; + my $sub_to = $ident; + $sub_to =~ s/\Q$from\E/$to/; + $fixed[$fixlinenr] =~ + s@\Q$sub_from\E@$sub_to@; + } + } + } + while ($line =~ m{(\b$NonptrType(\s*(?:$Modifier\b\s*|\*\s*)+)($Ident))}g) { + #print "BB<$1>\n"; + my ($match, $from, $to, $ident) = ($1, $2, $2, $3); + + # Should start with a space. + $to =~ s/^(\S)/ $1/; + # Should not end with a space. + $to =~ s/\s+$//; + # '*'s should not have spaces between. + while ($to =~ s/\*\s+\*/\*\*/) { + } + # Modifiers should have spaces. + $to =~ s/(\b$Modifier$)/$1 /; + +## print "2: from<$from> to<$to> ident<$ident>\n"; + if ($from ne $to && $ident !~ /^$Modifier$/) { + if (ERROR("POINTER_LOCATION", + "\"foo${from}bar\" should be \"foo${to}bar\"\n" . $herecurr) && + $fix) { + + my $sub_from = $match; + my $sub_to = $match; + $sub_to =~ s/\Q$from\E/$to/; + $fixed[$fixlinenr] =~ + s@\Q$sub_from\E@$sub_to@; + } + } + } + +# avoid BUG() or BUG_ON() + if ($line =~ /\b(?:BUG|BUG_ON)\b/) { + my $msg_type = \&WARN; + $msg_type = \&CHK if ($file); + &{$msg_type}("AVOID_BUG", + "Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()\n" . $herecurr); + } + +# avoid LINUX_VERSION_CODE + if ($line =~ /\bLINUX_VERSION_CODE\b/) { + WARN("LINUX_VERSION_CODE", + "LINUX_VERSION_CODE should be avoided, code should be for the version to which it is merged\n" . $herecurr); + } + +# check for uses of printk_ratelimit + if ($line =~ /\bprintk_ratelimit\s*\(/) { + WARN("PRINTK_RATELIMITED", + "Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit\n" . $herecurr); + } + +# printk should use KERN_* levels. Note that follow on printk's on the +# same line do not need a level, so we use the current block context +# to try and find and validate the current printk. In summary the current +# printk includes all preceding printk's which have no newline on the end. +# we assume the first bad printk is the one to report. + if ($line =~ /\bprintk\((?!KERN_)\s*"/) { + my $ok = 0; + for (my $ln = $linenr - 1; $ln >= $first_line; $ln--) { + #print "CHECK<$lines[$ln - 1]\n"; + # we have a preceding printk if it ends + # with "\n" ignore it, else it is to blame + if ($lines[$ln - 1] =~ m{\bprintk\(}) { + if ($rawlines[$ln - 1] !~ m{\\n"}) { + $ok = 1; + } + last; + } + } + if ($ok == 0) { + WARN("PRINTK_WITHOUT_KERN_LEVEL", + "printk() should include KERN_ facility level\n" . $herecurr); + } + } + + if ($line =~ /\bprintk\s*\(\s*KERN_([A-Z]+)/) { + my $orig = $1; + my $level = lc($orig); + $level = "warn" if ($level eq "warning"); + my $level2 = $level; + $level2 = "dbg" if ($level eq "debug"); + WARN("PREFER_PR_LEVEL", + "Prefer [subsystem eg: netdev]_$level2([subsystem]dev, ... then dev_$level2(dev, ... then pr_$level(... to printk(KERN_$orig ...\n" . $herecurr); + } + + if ($line =~ /\bpr_warning\s*\(/) { + if (WARN("PREFER_PR_LEVEL", + "Prefer pr_warn(... to pr_warning(...\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/\bpr_warning\b/pr_warn/; + } + } + + if ($line =~ /\bdev_printk\s*\(\s*KERN_([A-Z]+)/) { + my $orig = $1; + my $level = lc($orig); + $level = "warn" if ($level eq "warning"); + $level = "dbg" if ($level eq "debug"); + WARN("PREFER_DEV_LEVEL", + "Prefer dev_$level(... to dev_printk(KERN_$orig, ...\n" . $herecurr); + } + +# ENOSYS means "bad syscall nr" and nothing else. This will have a small +# number of false positives, but assembly files are not checked, so at +# least the arch entry code will not trigger this warning. + if ($line =~ /\bENOSYS\b/) { + WARN("ENOSYS", + "ENOSYS means 'invalid syscall nr' and nothing else\n" . $herecurr); + } + +# function brace can't be on same line, except for #defines of do while, +# or if closed on same line + if (($line=~/$Type\s*$Ident\(.*\).*\s*{/) and + !($line=~/\#\s*define.*do\s\{/) and !($line=~/}/)) { + if (ERROR("OPEN_BRACE", + "open brace '{' following function declarations go on the next line\n" . $herecurr) && + $fix) { + fix_delete_line($fixlinenr, $rawline); + my $fixed_line = $rawline; + $fixed_line =~ /(^..*$Type\s*$Ident\(.*\)\s*){(.*)$/; + my $line1 = $1; + my $line2 = $2; + fix_insert_line($fixlinenr, ltrim($line1)); + fix_insert_line($fixlinenr, "\+{"); + if ($line2 !~ /^\s*$/) { + fix_insert_line($fixlinenr, "\+\t" . trim($line2)); + } + } + } + +# open braces for enum, union and struct go on the same line. + if ($line =~ /^.\s*{/ && + $prevline =~ /^.\s*(?:typedef\s+)?(enum|union|struct)(?:\s+$Ident)?\s*$/) { + if (ERROR("OPEN_BRACE", + "open brace '{' following $1 go on the same line\n" . $hereprev) && + $fix && $prevline =~ /^\+/ && $line =~ /^\+/) { + fix_delete_line($fixlinenr - 1, $prevrawline); + fix_delete_line($fixlinenr, $rawline); + my $fixedline = rtrim($prevrawline) . " {"; + fix_insert_line($fixlinenr, $fixedline); + $fixedline = $rawline; + $fixedline =~ s/^(.\s*){\s*/$1\t/; + if ($fixedline !~ /^\+\s*$/) { + fix_insert_line($fixlinenr, $fixedline); + } + } + } + +# missing space after union, struct or enum definition + if ($line =~ /^.\s*(?:typedef\s+)?(enum|union|struct)(?:\s+$Ident){1,2}[=\{]/) { + if (WARN("SPACING", + "missing space after $1 definition\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/^(.\s*(?:typedef\s+)?(?:enum|union|struct)(?:\s+$Ident){1,2})([=\{])/$1 $2/; + } + } + +# Function pointer declarations +# check spacing between type, funcptr, and args +# canonical declaration is "type (*funcptr)(args...)" + if ($line =~ /^.\s*($Declare)\((\s*)\*(\s*)($Ident)(\s*)\)(\s*)\(/) { + my $declare = $1; + my $pre_pointer_space = $2; + my $post_pointer_space = $3; + my $funcname = $4; + my $post_funcname_space = $5; + my $pre_args_space = $6; + +# the $Declare variable will capture all spaces after the type +# so check it for a missing trailing missing space but pointer return types +# don't need a space so don't warn for those. + my $post_declare_space = ""; + if ($declare =~ /(\s+)$/) { + $post_declare_space = $1; + $declare = rtrim($declare); + } + if ($declare !~ /\*$/ && $post_declare_space =~ /^$/) { + WARN("SPACING", + "missing space after return type\n" . $herecurr); + $post_declare_space = " "; + } + +# unnecessary space "type (*funcptr)(args...)" +# This test is not currently implemented because these declarations are +# equivalent to +# int foo(int bar, ...) +# and this is form shouldn't/doesn't generate a checkpatch warning. +# +# elsif ($declare =~ /\s{2,}$/) { +# WARN("SPACING", +# "Multiple spaces after return type\n" . $herecurr); +# } + +# unnecessary space "type ( *funcptr)(args...)" + if (defined $pre_pointer_space && + $pre_pointer_space =~ /^\s/) { + WARN("SPACING", + "Unnecessary space after function pointer open parenthesis\n" . $herecurr); + } + +# unnecessary space "type (* funcptr)(args...)" + if (defined $post_pointer_space && + $post_pointer_space =~ /^\s/) { + WARN("SPACING", + "Unnecessary space before function pointer name\n" . $herecurr); + } + +# unnecessary space "type (*funcptr )(args...)" + if (defined $post_funcname_space && + $post_funcname_space =~ /^\s/) { + WARN("SPACING", + "Unnecessary space after function pointer name\n" . $herecurr); + } + +# unnecessary space "type (*funcptr) (args...)" + if (defined $pre_args_space && + $pre_args_space =~ /^\s/) { + WARN("SPACING", + "Unnecessary space before function pointer arguments\n" . $herecurr); + } + + if (show_type("SPACING") && $fix) { + $fixed[$fixlinenr] =~ + s/^(.\s*)$Declare\s*\(\s*\*\s*$Ident\s*\)\s*\(/$1 . $declare . $post_declare_space . '(*' . $funcname . ')('/ex; + } + } + +# check for spacing round square brackets; allowed: +# 1. with a type on the left -- int [] a; +# 2. at the beginning of a line for slice initialisers -- [0...10] = 5, +# 3. inside a curly brace -- = { [0...10] = 5 } + while ($line =~ /(.*?\s)\[/g) { + my ($where, $prefix) = ($-[1], $1); + if ($prefix !~ /$Type\s+$/ && + ($where != 0 || $prefix !~ /^.\s+$/) && + $prefix !~ /[{,]\s+$/) { + if (ERROR("BRACKET_SPACE", + "space prohibited before open square bracket '['\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/^(\+.*?)\s+\[/$1\[/; + } + } + } + +# check for spaces between functions and their parentheses. + while ($line =~ /($Ident)\s+\(/g) { + my $name = $1; + my $ctx_before = substr($line, 0, $-[1]); + my $ctx = "$ctx_before$name"; + + # Ignore those directives where spaces _are_ permitted. + if ($name =~ /^(?: + if|for|while|switch|return|case| + volatile|__volatile__| + __attribute__|format|__extension__| + asm|__asm__)$/x) + { + # cpp #define statements have non-optional spaces, ie + # if there is a space between the name and the open + # parenthesis it is simply not a parameter group. + } elsif ($ctx_before =~ /^.\s*\#\s*define\s*$/) { + + # cpp #elif statement condition may start with a ( + } elsif ($ctx =~ /^.\s*\#\s*elif\s*$/) { + + # If this whole things ends with a type its most + # likely a typedef for a function. + } elsif ($ctx =~ /$Type$/) { + + } else { + if (WARN("SPACING", + "space prohibited between function name and open parenthesis '('\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/\b$name\s+\(/$name\(/; + } + } + } + +# Check operator spacing. + if (!($line=~/\#\s*include/)) { + my $fixed_line = ""; + my $line_fixed = 0; + + my $ops = qr{ + <<=|>>=|<=|>=|==|!=| + \+=|-=|\*=|\/=|%=|\^=|\|=|&=| + =>|->|<<|>>|<|>|=|!|~| + &&|\|\||,|\^|\+\+|--|&|\||\+|-|\*|\/|%| + \?:|\?|: + }x; + my @elements = split(/($ops|;)/, $opline); + +## print("element count: <" . $#elements . ">\n"); +## foreach my $el (@elements) { +## print("el: <$el>\n"); +## } + + my @fix_elements = (); + my $off = 0; + + foreach my $el (@elements) { + push(@fix_elements, substr($rawline, $off, length($el))); + $off += length($el); + } + + $off = 0; + + my $blank = copy_spacing($opline); + my $last_after = -1; + + for (my $n = 0; $n < $#elements; $n += 2) { + + my $good = $fix_elements[$n] . $fix_elements[$n + 1]; + +## print("n: <$n> good: <$good>\n"); + + $off += length($elements[$n]); + + # Pick up the preceding and succeeding characters. + my $ca = substr($opline, 0, $off); + my $cc = ''; + if (length($opline) >= ($off + length($elements[$n + 1]))) { + $cc = substr($opline, $off + length($elements[$n + 1])); + } + my $cb = "$ca$;$cc"; + + my $a = ''; + $a = 'V' if ($elements[$n] ne ''); + $a = 'W' if ($elements[$n] =~ /\s$/); + $a = 'C' if ($elements[$n] =~ /$;$/); + $a = 'B' if ($elements[$n] =~ /(\[|\()$/); + $a = 'O' if ($elements[$n] eq ''); + $a = 'E' if ($ca =~ /^\s*$/); + + my $op = $elements[$n + 1]; + + my $c = ''; + if (defined $elements[$n + 2]) { + $c = 'V' if ($elements[$n + 2] ne ''); + $c = 'W' if ($elements[$n + 2] =~ /^\s/); + $c = 'C' if ($elements[$n + 2] =~ /^$;/); + $c = 'B' if ($elements[$n + 2] =~ /^(\)|\]|;)/); + $c = 'O' if ($elements[$n + 2] eq ''); + $c = 'E' if ($elements[$n + 2] =~ /^\s*\\$/); + } else { + $c = 'E'; + } + + my $ctx = "${a}x${c}"; + + my $at = "(ctx:$ctx)"; + + my $ptr = substr($blank, 0, $off) . "^"; + my $hereptr = "$hereline$ptr\n"; + + # Pull out the value of this operator. + my $op_type = substr($curr_values, $off + 1, 1); + + # Get the full operator variant. + my $opv = $op . substr($curr_vars, $off, 1); + + # Ignore operators passed as parameters. + if ($op_type ne 'V' && + $ca =~ /\s$/ && $cc =~ /^\s*[,\)]/) { + +# # Ignore comments +# } elsif ($op =~ /^$;+$/) { + + # ; should have either the end of line or a space or \ after it + } elsif ($op eq ';') { + if ($ctx !~ /.x[WEBC]/ && + $cc !~ /^\\/ && $cc !~ /^;/) { + if (ERROR("SPACING", + "space required after that '$op' $at\n" . $hereptr)) { + $good = $fix_elements[$n] . trim($fix_elements[$n + 1]) . " "; + $line_fixed = 1; + } + } + + # // is a comment + } elsif ($op eq '//') { + + # : when part of a bitfield + } elsif ($opv eq ':B') { + # skip the bitfield test for now + + # No spaces for: + # -> + } elsif ($op eq '->') { + if ($ctx =~ /Wx.|.xW/) { + if (ERROR("SPACING", + "spaces prohibited around that '$op' $at\n" . $hereptr)) { + $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]); + if (defined $fix_elements[$n + 2]) { + $fix_elements[$n + 2] =~ s/^\s+//; + } + $line_fixed = 1; + } + } + + # , must not have a space before and must have a space on the right. + } elsif ($op eq ',') { + my $rtrim_before = 0; + my $space_after = 0; + if ($ctx =~ /Wx./) { + if (ERROR("SPACING", + "space prohibited before that '$op' $at\n" . $hereptr)) { + $line_fixed = 1; + $rtrim_before = 1; + } + } + if ($ctx !~ /.x[WEC]/ && $cc !~ /^}/) { + if (ERROR("SPACING", + "space required after that '$op' $at\n" . $hereptr)) { + $line_fixed = 1; + $last_after = $n; + $space_after = 1; + } + } + if ($rtrim_before || $space_after) { + if ($rtrim_before) { + $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]); + } else { + $good = $fix_elements[$n] . trim($fix_elements[$n + 1]); + } + if ($space_after) { + $good .= " "; + } + } + + # '*' as part of a type definition -- reported already. + } elsif ($opv eq '*_') { + #warn "'*' is part of type\n"; + + # unary operators should have a space before and + # none after. May be left adjacent to another + # unary operator, or a cast + } elsif ($op eq '!' || $op eq '~' || + $opv eq '*U' || $opv eq '-U' || + $opv eq '&U' || $opv eq '&&U') { + if ($ctx !~ /[WEBC]x./ && $ca !~ /(?:\)|!|~|\*|-|\&|\||\+\+|\-\-|\{)$/) { + if (ERROR("SPACING", + "space required before that '$op' $at\n" . $hereptr)) { + if ($n != $last_after + 2) { + $good = $fix_elements[$n] . " " . ltrim($fix_elements[$n + 1]); + $line_fixed = 1; + } + } + } + if ($op eq '*' && $cc =~/\s*$Modifier\b/) { + # A unary '*' may be const + + } elsif ($ctx =~ /.xW/) { + if (ERROR("SPACING", + "space prohibited after that '$op' $at\n" . $hereptr)) { + $good = $fix_elements[$n] . rtrim($fix_elements[$n + 1]); + if (defined $fix_elements[$n + 2]) { + $fix_elements[$n + 2] =~ s/^\s+//; + } + $line_fixed = 1; + } + } + + # unary ++ and unary -- are allowed no space on one side. + } elsif ($op eq '++' or $op eq '--') { + if ($ctx !~ /[WEOBC]x[^W]/ && $ctx !~ /[^W]x[WOBEC]/) { + if (ERROR("SPACING", + "space required one side of that '$op' $at\n" . $hereptr)) { + $good = $fix_elements[$n] . trim($fix_elements[$n + 1]) . " "; + $line_fixed = 1; + } + } + if ($ctx =~ /Wx[BE]/ || + ($ctx =~ /Wx./ && $cc =~ /^;/)) { + if (ERROR("SPACING", + "space prohibited before that '$op' $at\n" . $hereptr)) { + $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]); + $line_fixed = 1; + } + } + if ($ctx =~ /ExW/) { + if (ERROR("SPACING", + "space prohibited after that '$op' $at\n" . $hereptr)) { + $good = $fix_elements[$n] . trim($fix_elements[$n + 1]); + if (defined $fix_elements[$n + 2]) { + $fix_elements[$n + 2] =~ s/^\s+//; + } + $line_fixed = 1; + } + } + + # << and >> may either have or not have spaces both sides + } elsif ($op eq '<<' or $op eq '>>' or + $op eq '&' or $op eq '^' or $op eq '|' or + $op eq '+' or $op eq '-' or + $op eq '*' or $op eq '/' or + $op eq '%') + { + if ($check) { + if (defined $fix_elements[$n + 2] && $ctx !~ /[EW]x[EW]/) { + if (CHK("SPACING", + "spaces preferred around that '$op' $at\n" . $hereptr)) { + $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " "; + $fix_elements[$n + 2] =~ s/^\s+//; + $line_fixed = 1; + } + } elsif (!defined $fix_elements[$n + 2] && $ctx !~ /Wx[OE]/) { + if (CHK("SPACING", + "space preferred before that '$op' $at\n" . $hereptr)) { + $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]); + $line_fixed = 1; + } + } + } elsif ($ctx =~ /Wx[^WCE]|[^WCE]xW/) { + if (ERROR("SPACING", + "need consistent spacing around '$op' $at\n" . $hereptr)) { + $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " "; + if (defined $fix_elements[$n + 2]) { + $fix_elements[$n + 2] =~ s/^\s+//; + } + $line_fixed = 1; + } + } + + # A colon needs no spaces before when it is + # terminating a case value or a label. + } elsif ($opv eq ':C' || $opv eq ':L') { + if ($ctx =~ /Wx./) { + if (ERROR("SPACING", + "space prohibited before that '$op' $at\n" . $hereptr)) { + $good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]); + $line_fixed = 1; + } + } + + # All the others need spaces both sides. + } elsif ($ctx !~ /[EWC]x[CWE]/) { + my $ok = 0; + + # Ignore email addresses <foo@bar> + if (($op eq '<' && + $cc =~ /^\S+\@\S+>/) || + ($op eq '>' && + $ca =~ /<\S+\@\S+$/)) + { + $ok = 1; + } + + # for asm volatile statements + # ignore a colon with another + # colon immediately before or after + if (($op eq ':') && + ($ca =~ /:$/ || $cc =~ /^:/)) { + $ok = 1; + } + + # messages are ERROR, but ?: are CHK + if ($ok == 0) { + my $msg_type = \&ERROR; + $msg_type = \&CHK if (($op eq '?:' || $op eq '?' || $op eq ':') && $ctx =~ /VxV/); + + if (&{$msg_type}("SPACING", + "spaces required around that '$op' $at\n" . $hereptr)) { + $good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " "; + if (defined $fix_elements[$n + 2]) { + $fix_elements[$n + 2] =~ s/^\s+//; + } + $line_fixed = 1; + } + } + } + $off += length($elements[$n + 1]); + +## print("n: <$n> GOOD: <$good>\n"); + + $fixed_line = $fixed_line . $good; + } + + if (($#elements % 2) == 0) { + $fixed_line = $fixed_line . $fix_elements[$#elements]; + } + + if ($fix && $line_fixed && $fixed_line ne $fixed[$fixlinenr]) { + $fixed[$fixlinenr] = $fixed_line; + } + + + } + +# check for whitespace before a non-naked semicolon + if ($line =~ /^\+.*\S\s+;\s*$/) { + if (WARN("SPACING", + "space prohibited before semicolon\n" . $herecurr) && + $fix) { + 1 while $fixed[$fixlinenr] =~ + s/^(\+.*\S)\s+;/$1;/; + } + } + +# check for multiple assignments + if ($line =~ /^.\s*$Lval\s*=\s*$Lval\s*=(?!=)/) { + CHK("MULTIPLE_ASSIGNMENTS", + "multiple assignments should be avoided\n" . $herecurr); + } + +## # check for multiple declarations, allowing for a function declaration +## # continuation. +## if ($line =~ /^.\s*$Type\s+$Ident(?:\s*=[^,{]*)?\s*,\s*$Ident.*/ && +## $line !~ /^.\s*$Type\s+$Ident(?:\s*=[^,{]*)?\s*,\s*$Type\s*$Ident.*/) { +## +## # Remove any bracketed sections to ensure we do not +## # falsly report the parameters of functions. +## my $ln = $line; +## while ($ln =~ s/\([^\(\)]*\)//g) { +## } +## if ($ln =~ /,/) { +## WARN("MULTIPLE_DECLARATION", +## "declaring multiple variables together should be avoided\n" . $herecurr); +## } +## } + +#need space before brace following if, while, etc + if (($line =~ /\(.*\)\{/ && $line !~ /\($Type\)\{/) || + $line =~ /do\{/) { + if (ERROR("SPACING", + "space required before the open brace '{'\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/^(\+.*(?:do|\))){/$1 {/; + } + } + +## # check for blank lines before declarations +## if ($line =~ /^.\t+$Type\s+$Ident(?:\s*=.*)?;/ && +## $prevrawline =~ /^.\s*$/) { +## WARN("SPACING", +## "No blank lines before declarations\n" . $hereprev); +## } +## + +# closing brace should have a space following it when it has anything +# on the line + if ($line =~ /}(?!(?:,|;|\)))\S/) { + if (ERROR("SPACING", + "space required after that close brace '}'\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/}((?!(?:,|;|\)))\S)/} $1/; + } + } + +# check spacing on square brackets + if ($line =~ /\[\s/ && $line !~ /\[\s*$/) { + if (ERROR("SPACING", + "space prohibited after that open square bracket '['\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/\[\s+/\[/; + } + } + if ($line =~ /\s\]/) { + if (ERROR("SPACING", + "space prohibited before that close square bracket ']'\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/\s+\]/\]/; + } + } + +# check spacing on parentheses + if ($line =~ /\(\s/ && $line !~ /\(\s*(?:\\)?$/ && + $line !~ /for\s*\(\s+;/) { + if (ERROR("SPACING", + "space prohibited after that open parenthesis '('\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/\(\s+/\(/; + } + } + if ($line =~ /(\s+)\)/ && $line !~ /^.\s*\)/ && + $line !~ /for\s*\(.*;\s+\)/ && + $line !~ /:\s+\)/) { + if (ERROR("SPACING", + "space prohibited before that close parenthesis ')'\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/\s+\)/\)/; + } + } + +# check unnecessary parentheses around addressof/dereference single $Lvals +# ie: &(foo->bar) should be &foo->bar and *(foo->bar) should be *foo->bar + + while ($line =~ /(?:[^&]&\s*|\*)\(\s*($Ident\s*(?:$Member\s*)+)\s*\)/g) { + my $var = $1; + if (CHK("UNNECESSARY_PARENTHESES", + "Unnecessary parentheses around $var\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\(\s*\Q$var\E\s*\)/$var/; + } + } + +# check for unnecessary parentheses around function pointer uses +# ie: (foo->bar)(); should be foo->bar(); +# but not "if (foo->bar) (" to avoid some false positives + if ($line =~ /(\bif\s*|)(\(\s*$Ident\s*(?:$Member\s*)+\))[ \t]*\(/ && $1 !~ /^if/) { + my $var = $2; + if (CHK("UNNECESSARY_PARENTHESES", + "Unnecessary parentheses around function pointer $var\n" . $herecurr) && + $fix) { + my $var2 = deparenthesize($var); + $var2 =~ s/\s//g; + $fixed[$fixlinenr] =~ s/\Q$var\E/$var2/; + } + } + +#goto labels aren't indented, allow a single space however + if ($line=~/^.\s+[A-Za-z\d_]+:(?![0-9]+)/ and + !($line=~/^. [A-Za-z\d_]+:/) and !($line=~/^.\s+default:/)) { + if (WARN("INDENTED_LABEL", + "labels should not be indented\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/^(.)\s+/$1/; + } + } + +# return is not a function + if (defined($stat) && $stat =~ /^.\s*return(\s*)\(/s) { + my $spacing = $1; + if ($^V && $^V ge 5.10.0 && + $stat =~ /^.\s*return\s*($balanced_parens)\s*;\s*$/) { + my $value = $1; + $value = deparenthesize($value); + if ($value =~ m/^\s*$FuncArg\s*(?:\?|$)/) { + ERROR("RETURN_PARENTHESES", + "return is not a function, parentheses are not required\n" . $herecurr); + } + } elsif ($spacing !~ /\s+/) { + ERROR("SPACING", + "space required before the open parenthesis '('\n" . $herecurr); + } + } + +# unnecessary return in a void function +# at end-of-function, with the previous line a single leading tab, then return; +# and the line before that not a goto label target like "out:" + if ($sline =~ /^[ \+]}\s*$/ && + $prevline =~ /^\+\treturn\s*;\s*$/ && + $linenr >= 3 && + $lines[$linenr - 3] =~ /^[ +]/ && + $lines[$linenr - 3] !~ /^[ +]\s*$Ident\s*:/) { + WARN("RETURN_VOID", + "void function return statements are not generally useful\n" . $hereprev); + } + +# if statements using unnecessary parentheses - ie: if ((foo == bar)) + if ($^V && $^V ge 5.10.0 && + $line =~ /\bif\s*((?:\(\s*){2,})/) { + my $openparens = $1; + my $count = $openparens =~ tr@\(@\(@; + my $msg = ""; + if ($line =~ /\bif\s*(?:\(\s*){$count,$count}$LvalOrFunc\s*($Compare)\s*$LvalOrFunc(?:\s*\)){$count,$count}/) { + my $comp = $4; #Not $1 because of $LvalOrFunc + $msg = " - maybe == should be = ?" if ($comp eq "=="); + WARN("UNNECESSARY_PARENTHESES", + "Unnecessary parentheses$msg\n" . $herecurr); + } + } + +# comparisons with a constant or upper case identifier on the left +# avoid cases like "foo + BAR < baz" +# only fix matches surrounded by parentheses to avoid incorrect +# conversions like "FOO < baz() + 5" being "misfixed" to "baz() > FOO + 5" + if ($^V && $^V ge 5.10.0 && + $line =~ /^\+(.*)\b($Constant|[A-Z_][A-Z0-9_]*)\s*($Compare)\s*($LvalOrFunc)/) { + my $lead = $1; + my $const = $2; + my $comp = $3; + my $to = $4; + my $newcomp = $comp; + if ($lead !~ /(?:$Operators|\.)\s*$/ && + $to !~ /^(?:Constant|[A-Z_][A-Z0-9_]*)$/ && + WARN("CONSTANT_COMPARISON", + "Comparisons should place the constant on the right side of the test\n" . $herecurr) && + $fix) { + if ($comp eq "<") { + $newcomp = ">"; + } elsif ($comp eq "<=") { + $newcomp = ">="; + } elsif ($comp eq ">") { + $newcomp = "<"; + } elsif ($comp eq ">=") { + $newcomp = "<="; + } + $fixed[$fixlinenr] =~ s/\(\s*\Q$const\E\s*$Compare\s*\Q$to\E\s*\)/($to $newcomp $const)/; + } + } + +# Return of what appears to be an errno should normally be negative + if ($sline =~ /\breturn(?:\s*\(+\s*|\s+)(E[A-Z]+)(?:\s*\)+\s*|\s*)[;:,]/) { + my $name = $1; + if ($name ne 'EOF' && $name ne 'ERROR') { + WARN("USE_NEGATIVE_ERRNO", + "return of an errno should typically be negative (ie: return -$1)\n" . $herecurr); + } + } + +# Need a space before open parenthesis after if, while etc + if ($line =~ /\b(if|while|for|switch)\(/) { + if (ERROR("SPACING", + "space required before the open parenthesis '('\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/\b(if|while|for|switch)\(/$1 \(/; + } + } + +# Check for illegal assignment in if conditional -- and check for trailing +# statements after the conditional. + if ($line =~ /do\s*(?!{)/) { + ($stat, $cond, $line_nr_next, $remain_next, $off_next) = + ctx_statement_block($linenr, $realcnt, 0) + if (!defined $stat); + my ($stat_next) = ctx_statement_block($line_nr_next, + $remain_next, $off_next); + $stat_next =~ s/\n./\n /g; + ##print "stat<$stat> stat_next<$stat_next>\n"; + + if ($stat_next =~ /^\s*while\b/) { + # If the statement carries leading newlines, + # then count those as offsets. + my ($whitespace) = + ($stat_next =~ /^((?:\s*\n[+-])*\s*)/s); + my $offset = + statement_rawlines($whitespace) - 1; + + $suppress_whiletrailers{$line_nr_next + + $offset} = 1; + } + } + if (!defined $suppress_whiletrailers{$linenr} && + defined($stat) && defined($cond) && + $line =~ /\b(?:if|while|for)\s*\(/ && $line !~ /^.\s*#/) { + my ($s, $c) = ($stat, $cond); + + if ($c =~ /\bif\s*\(.*[^<>!=]=[^=].*/s) { + ERROR("ASSIGN_IN_IF", + "do not use assignment in if condition\n" . $herecurr); + } + + # Find out what is on the end of the line after the + # conditional. + substr($s, 0, length($c), ''); + $s =~ s/\n.*//g; + $s =~ s/$;//g; # Remove any comments + if (length($c) && $s !~ /^\s*{?\s*\\*\s*$/ && + $c !~ /}\s*while\s*/) + { + # Find out how long the conditional actually is. + my @newlines = ($c =~ /\n/gs); + my $cond_lines = 1 + $#newlines; + my $stat_real = ''; + + $stat_real = raw_line($linenr, $cond_lines) + . "\n" if ($cond_lines); + if (defined($stat_real) && $cond_lines > 1) { + $stat_real = "[...]\n$stat_real"; + } + + ERROR("TRAILING_STATEMENTS", + "trailing statements should be on next line\n" . $herecurr . $stat_real); + } + } + +# Check for bitwise tests written as boolean + if ($line =~ / + (?: + (?:\[|\(|\&\&|\|\|) + \s*0[xX][0-9]+\s* + (?:\&\&|\|\|) + | + (?:\&\&|\|\|) + \s*0[xX][0-9]+\s* + (?:\&\&|\|\||\)|\]) + )/x) + { + WARN("HEXADECIMAL_BOOLEAN_TEST", + "boolean test with hexadecimal, perhaps just 1 \& or \|?\n" . $herecurr); + } + +# if and else should not have general statements after it + if ($line =~ /^.\s*(?:}\s*)?else\b(.*)/) { + my $s = $1; + $s =~ s/$;//g; # Remove any comments + if ($s !~ /^\s*(?:\sif|(?:{|)\s*\\?\s*$)/) { + ERROR("TRAILING_STATEMENTS", + "trailing statements should be on next line\n" . $herecurr); + } + } +# if should not continue a brace + if ($line =~ /}\s*if\b/) { + ERROR("TRAILING_STATEMENTS", + "trailing statements should be on next line (or did you mean 'else if'?)\n" . + $herecurr); + } +# case and default should not have general statements after them + if ($line =~ /^.\s*(?:case\s*.*|default\s*):/g && + $line !~ /\G(?: + (?:\s*$;*)(?:\s*{)?(?:\s*$;*)(?:\s*\\)?\s*$| + \s*return\s+ + )/xg) + { + ERROR("TRAILING_STATEMENTS", + "trailing statements should be on next line\n" . $herecurr); + } + + # Check for }<nl>else {, these must be at the same + # indent level to be relevant to each other. + if ($prevline=~/}\s*$/ and $line=~/^.\s*else\s*/ && + $previndent == $indent) { + if (ERROR("ELSE_AFTER_BRACE", + "else should follow close brace '}'\n" . $hereprev) && + $fix && $prevline =~ /^\+/ && $line =~ /^\+/) { + fix_delete_line($fixlinenr - 1, $prevrawline); + fix_delete_line($fixlinenr, $rawline); + my $fixedline = $prevrawline; + $fixedline =~ s/}\s*$//; + if ($fixedline !~ /^\+\s*$/) { + fix_insert_line($fixlinenr, $fixedline); + } + $fixedline = $rawline; + $fixedline =~ s/^(.\s*)else/$1} else/; + fix_insert_line($fixlinenr, $fixedline); + } + } + + if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ && + $previndent == $indent) { + my ($s, $c) = ctx_statement_block($linenr, $realcnt, 0); + + # Find out what is on the end of the line after the + # conditional. + substr($s, 0, length($c), ''); + $s =~ s/\n.*//g; + + if ($s =~ /^\s*;/) { + if (ERROR("WHILE_AFTER_BRACE", + "while should follow close brace '}'\n" . $hereprev) && + $fix && $prevline =~ /^\+/ && $line =~ /^\+/) { + fix_delete_line($fixlinenr - 1, $prevrawline); + fix_delete_line($fixlinenr, $rawline); + my $fixedline = $prevrawline; + my $trailing = $rawline; + $trailing =~ s/^\+//; + $trailing = trim($trailing); + $fixedline =~ s/}\s*$/} $trailing/; + fix_insert_line($fixlinenr, $fixedline); + } + } + } + +#Specific variable tests + while ($line =~ m{($Constant|$Lval)}g) { + my $var = $1; + +#gcc binary extension + if ($var =~ /^$Binary$/) { + if (WARN("GCC_BINARY_CONSTANT", + "Avoid gcc v4.3+ binary constant extension: <$var>\n" . $herecurr) && + $fix) { + my $hexval = sprintf("0x%x", oct($var)); + $fixed[$fixlinenr] =~ + s/\b$var\b/$hexval/; + } + } + +#CamelCase + if ($var !~ /^$Constant$/ && + $var =~ /[A-Z][a-z]|[a-z][A-Z]/ && +#Ignore Page<foo> variants + $var !~ /^(?:Clear|Set|TestClear|TestSet|)Page[A-Z]/ && +#Ignore SI style variants like nS, mV and dB (ie: max_uV, regulator_min_uA_show) + $var !~ /^(?:[a-z_]*?)_?[a-z][A-Z](?:_[a-z_]+)?$/ && +#Ignore some three character SI units explicitly, like MiB and KHz + $var !~ /^(?:[a-z_]*?)_?(?:[KMGT]iB|[KMGT]?Hz)(?:_[a-z_]+)?$/) { + while ($var =~ m{($Ident)}g) { + my $word = $1; + next if ($word !~ /[A-Z][a-z]|[a-z][A-Z]/); + if ($check) { + seed_camelcase_includes(); + if (!$file && !$camelcase_file_seeded) { + seed_camelcase_file($realfile); + $camelcase_file_seeded = 1; + } + } + if (!defined $camelcase{$word}) { + $camelcase{$word} = 1; + CHK("CAMELCASE", + "Avoid CamelCase: <$word>\n" . $herecurr); + } + } + } + } + +#no spaces allowed after \ in define + if ($line =~ /\#\s*define.*\\\s+$/) { + if (WARN("WHITESPACE_AFTER_LINE_CONTINUATION", + "Whitespace after \\ makes next lines useless\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\s+$//; + } + } + +# warn if <asm/foo.h> is #included and <linux/foo.h> is available and includes +# itself <asm/foo.h> (uses RAW line) + if ($tree && $rawline =~ m{^.\s*\#\s*include\s*\<asm\/(.*)\.h\>}) { + my $file = "$1.h"; + my $checkfile = "include/linux/$file"; + if (-f "$root/$checkfile" && + $realfile ne $checkfile && + $1 !~ /$allowed_asm_includes/) + { + my $asminclude = `grep -Ec "#include\\s+<asm/$file>" $root/$checkfile`; + if ($asminclude > 0) { + if ($realfile =~ m{^arch/}) { + CHK("ARCH_INCLUDE_LINUX", + "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr); + } else { + WARN("INCLUDE_LINUX", + "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr); + } + } + } + } + +# multi-statement macros should be enclosed in a do while loop, grab the +# first statement and ensure its the whole macro if its not enclosed +# in a known good container + if ($realfile !~ m@/vmlinux.lds.h$@ && + $line =~ /^.\s*\#\s*define\s*$Ident(\()?/) { + my $ln = $linenr; + my $cnt = $realcnt; + my ($off, $dstat, $dcond, $rest); + my $ctx = ''; + my $has_flow_statement = 0; + my $has_arg_concat = 0; + ($dstat, $dcond, $ln, $cnt, $off) = + ctx_statement_block($linenr, $realcnt, 0); + $ctx = $dstat; + #print "dstat<$dstat> dcond<$dcond> cnt<$cnt> off<$off>\n"; + #print "LINE<$lines[$ln-1]> len<" . length($lines[$ln-1]) . "\n"; + + $has_flow_statement = 1 if ($ctx =~ /\b(goto|return)\b/); + $has_arg_concat = 1 if ($ctx =~ /\#\#/ && $ctx !~ /\#\#\s*(?:__VA_ARGS__|args)\b/); + + $dstat =~ s/^.\s*\#\s*define\s+$Ident(\([^\)]*\))?\s*//; + my $define_args = $1; + my $define_stmt = $dstat; + my @def_args = (); + + if (defined $define_args && $define_args ne "") { + $define_args = substr($define_args, 1, length($define_args) - 2); + $define_args =~ s/\s*//g; + @def_args = split(",", $define_args); + } + + $dstat =~ s/$;//g; + $dstat =~ s/\\\n.//g; + $dstat =~ s/^\s*//s; + $dstat =~ s/\s*$//s; + + # Flatten any parentheses and braces + while ($dstat =~ s/\([^\(\)]*\)/1/ || + $dstat =~ s/\{[^\{\}]*\}/1/ || + $dstat =~ s/.\[[^\[\]]*\]/1/) + { + } + + # Flatten any obvious string concatentation. + while ($dstat =~ s/($String)\s*$Ident/$1/ || + $dstat =~ s/$Ident\s*($String)/$1/) + { + } + + # Make asm volatile uses seem like a generic function + $dstat =~ s/\b_*asm_*\s+_*volatile_*\b/asm_volatile/g; + + my $exceptions = qr{ + $Declare| + module_param_named| + MODULE_PARM_DESC| + DECLARE_PER_CPU| + DEFINE_PER_CPU| + __typeof__\(| + union| + struct| + \.$Ident\s*=\s*| + ^\"|\"$| + ^\[ + }x; + #print "REST<$rest> dstat<$dstat> ctx<$ctx>\n"; + + $ctx =~ s/\n*$//; + my $herectx = $here . "\n"; + my $stmt_cnt = statement_rawlines($ctx); + + for (my $n = 0; $n < $stmt_cnt; $n++) { + $herectx .= raw_line($linenr, $n) . "\n"; + } + + if ($dstat ne '' && + $dstat !~ /^(?:$Ident|-?$Constant),$/ && # 10, // foo(), + $dstat !~ /^(?:$Ident|-?$Constant);$/ && # foo(); + $dstat !~ /^[!~-]?(?:$Lval|$Constant)$/ && # 10 // foo() // !foo // ~foo // -foo // foo->bar // foo.bar->baz + $dstat !~ /^'X'$/ && $dstat !~ /^'XX'$/ && # character constants + $dstat !~ /$exceptions/ && + $dstat !~ /^\.$Ident\s*=/ && # .foo = + $dstat !~ /^(?:\#\s*$Ident|\#\s*$Constant)\s*$/ && # stringification #foo + $dstat !~ /^do\s*$Constant\s*while\s*$Constant;?$/ && # do {...} while (...); // do {...} while (...) + $dstat !~ /^for\s*$Constant$/ && # for (...) + $dstat !~ /^for\s*$Constant\s+(?:$Ident|-?$Constant)$/ && # for (...) bar() + $dstat !~ /^do\s*{/ && # do {... + $dstat !~ /^\(\{/ && # ({... + $ctx !~ /^.\s*#\s*define\s+TRACE_(?:SYSTEM|INCLUDE_FILE|INCLUDE_PATH)\b/) + { + + if ($dstat =~ /;/) { + ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE", + "Macros with multiple statements should be enclosed in a do - while loop\n" . "$herectx"); + } else { + ERROR("COMPLEX_MACRO", + "Macros with complex values should be enclosed in parentheses\n" . "$herectx"); + } + + } + + # Make $define_stmt single line, comment-free, etc + my @stmt_array = split('\n', $define_stmt); + my $first = 1; + $define_stmt = ""; + foreach my $l (@stmt_array) { + $l =~ s/\\$//; + if ($first) { + $define_stmt = $l; + $first = 0; + } elsif ($l =~ /^[\+ ]/) { + $define_stmt .= substr($l, 1); + } + } + $define_stmt =~ s/$;//g; + $define_stmt =~ s/\s+/ /g; + $define_stmt = trim($define_stmt); + +# check if any macro arguments are reused (ignore '...' and 'type') + foreach my $arg (@def_args) { + next if ($arg =~ /\.\.\./); + next if ($arg =~ /^type$/i); + my $tmp = $define_stmt; + $tmp =~ s/\b(typeof|__typeof__|__builtin\w+|typecheck\s*\(\s*$Type\s*,|\#+)\s*\(*\s*$arg\s*\)*\b//g; + $tmp =~ s/\#+\s*$arg\b//g; + $tmp =~ s/\b$arg\s*\#\#//g; + my $use_cnt = $tmp =~ s/\b$arg\b//g; + if ($use_cnt > 1) { + CHK("MACRO_ARG_REUSE", + "Macro argument reuse '$arg' - possible side-effects?\n" . "$herectx"); + } +# check if any macro arguments may have other precedence issues + if ($define_stmt =~ m/($Operators)?\s*\b$arg\b\s*($Operators)?/m && + ((defined($1) && $1 ne ',') || + (defined($2) && $2 ne ','))) { + CHK("MACRO_ARG_PRECEDENCE", + "Macro argument '$arg' may be better as '($arg)' to avoid precedence issues\n" . "$herectx"); + } + } + +# check for macros with flow control, but without ## concatenation +# ## concatenation is commonly a macro that defines a function so ignore those + if ($has_flow_statement && !$has_arg_concat) { + my $herectx = $here . "\n"; + my $cnt = statement_rawlines($ctx); + + for (my $n = 0; $n < $cnt; $n++) { + $herectx .= raw_line($linenr, $n) . "\n"; + } + WARN("MACRO_WITH_FLOW_CONTROL", + "Macros with flow control statements should be avoided\n" . "$herectx"); + } + +# check for line continuations outside of #defines, preprocessor #, and asm + + } else { + if ($prevline !~ /^..*\\$/ && + $line !~ /^\+\s*\#.*\\$/ && # preprocessor + $line !~ /^\+.*\b(__asm__|asm)\b.*\\$/ && # asm + $line =~ /^\+.*\\$/) { + WARN("LINE_CONTINUATIONS", + "Avoid unnecessary line continuations\n" . $herecurr); + } + } + +# do {} while (0) macro tests: +# single-statement macros do not need to be enclosed in do while (0) loop, +# macro should not end with a semicolon + if ($^V && $^V ge 5.10.0 && + $realfile !~ m@/vmlinux.lds.h$@ && + $line =~ /^.\s*\#\s*define\s+$Ident(\()?/) { + my $ln = $linenr; + my $cnt = $realcnt; + my ($off, $dstat, $dcond, $rest); + my $ctx = ''; + ($dstat, $dcond, $ln, $cnt, $off) = + ctx_statement_block($linenr, $realcnt, 0); + $ctx = $dstat; + + $dstat =~ s/\\\n.//g; + $dstat =~ s/$;/ /g; + + if ($dstat =~ /^\+\s*#\s*define\s+$Ident\s*${balanced_parens}\s*do\s*{(.*)\s*}\s*while\s*\(\s*0\s*\)\s*([;\s]*)\s*$/) { + my $stmts = $2; + my $semis = $3; + + $ctx =~ s/\n*$//; + my $cnt = statement_rawlines($ctx); + my $herectx = $here . "\n"; + + for (my $n = 0; $n < $cnt; $n++) { + $herectx .= raw_line($linenr, $n) . "\n"; + } + + if (($stmts =~ tr/;/;/) == 1 && + $stmts !~ /^\s*(if|while|for|switch)\b/) { + WARN("SINGLE_STATEMENT_DO_WHILE_MACRO", + "Single statement macros should not use a do {} while (0) loop\n" . "$herectx"); + } + if (defined $semis && $semis ne "") { + WARN("DO_WHILE_MACRO_WITH_TRAILING_SEMICOLON", + "do {} while (0) macros should not be semicolon terminated\n" . "$herectx"); + } + } elsif ($dstat =~ /^\+\s*#\s*define\s+$Ident.*;\s*$/) { + $ctx =~ s/\n*$//; + my $cnt = statement_rawlines($ctx); + my $herectx = $here . "\n"; + + for (my $n = 0; $n < $cnt; $n++) { + $herectx .= raw_line($linenr, $n) . "\n"; + } + + WARN("TRAILING_SEMICOLON", + "macros should not use a trailing semicolon\n" . "$herectx"); + } + } + +# make sure symbols are always wrapped with VMLINUX_SYMBOL() ... +# all assignments may have only one of the following with an assignment: +# . +# ALIGN(...) +# VMLINUX_SYMBOL(...) + if ($realfile eq 'vmlinux.lds.h' && $line =~ /(?:(?:^|\s)$Ident\s*=|=\s*$Ident(?:\s|$))/) { + WARN("MISSING_VMLINUX_SYMBOL", + "vmlinux.lds.h needs VMLINUX_SYMBOL() around C-visible symbols\n" . $herecurr); + } + +# check for redundant bracing round if etc + if ($line =~ /(^.*)\bif\b/ && $1 !~ /else\s*$/) { + my ($level, $endln, @chunks) = + ctx_statement_full($linenr, $realcnt, 1); + #print "chunks<$#chunks> linenr<$linenr> endln<$endln> level<$level>\n"; + #print "APW: <<$chunks[1][0]>><<$chunks[1][1]>>\n"; + if ($#chunks > 0 && $level == 0) { + my @allowed = (); + my $allow = 0; + my $seen = 0; + my $herectx = $here . "\n"; + my $ln = $linenr - 1; + for my $chunk (@chunks) { + my ($cond, $block) = @{$chunk}; + + # If the condition carries leading newlines, then count those as offsets. + my ($whitespace) = ($cond =~ /^((?:\s*\n[+-])*\s*)/s); + my $offset = statement_rawlines($whitespace) - 1; + + $allowed[$allow] = 0; + #print "COND<$cond> whitespace<$whitespace> offset<$offset>\n"; + + # We have looked at and allowed this specific line. + $suppress_ifbraces{$ln + $offset} = 1; + + $herectx .= "$rawlines[$ln + $offset]\n[...]\n"; + $ln += statement_rawlines($block) - 1; + + substr($block, 0, length($cond), ''); + + $seen++ if ($block =~ /^\s*{/); + + #print "cond<$cond> block<$block> allowed<$allowed[$allow]>\n"; + if (statement_lines($cond) > 1) { + #print "APW: ALLOWED: cond<$cond>\n"; + $allowed[$allow] = 1; + } + if ($block =~/\b(?:if|for|while)\b/) { + #print "APW: ALLOWED: block<$block>\n"; + $allowed[$allow] = 1; + } + if (statement_block_size($block) > 1) { + #print "APW: ALLOWED: lines block<$block>\n"; + $allowed[$allow] = 1; + } + $allow++; + } + if ($seen) { + my $sum_allowed = 0; + foreach (@allowed) { + $sum_allowed += $_; + } + if ($sum_allowed == 0) { + WARN("BRACES", + "braces {} are not necessary for any arm of this statement\n" . $herectx); + } elsif ($sum_allowed != $allow && + $seen != $allow) { + CHK("BRACES", + "braces {} should be used on all arms of this statement\n" . $herectx); + } + } + } + } + if (!defined $suppress_ifbraces{$linenr - 1} && + $line =~ /\b(if|while|for|else)\b/) { + my $allowed = 0; + + # Check the pre-context. + if (substr($line, 0, $-[0]) =~ /(\}\s*)$/) { + #print "APW: ALLOWED: pre<$1>\n"; + $allowed = 1; + } + + my ($level, $endln, @chunks) = + ctx_statement_full($linenr, $realcnt, $-[0]); + + # Check the condition. + my ($cond, $block) = @{$chunks[0]}; + #print "CHECKING<$linenr> cond<$cond> block<$block>\n"; + if (defined $cond) { + substr($block, 0, length($cond), ''); + } + if (statement_lines($cond) > 1) { + #print "APW: ALLOWED: cond<$cond>\n"; + $allowed = 1; + } + if ($block =~/\b(?:if|for|while)\b/) { + #print "APW: ALLOWED: block<$block>\n"; + $allowed = 1; + } + if (statement_block_size($block) > 1) { + #print "APW: ALLOWED: lines block<$block>\n"; + $allowed = 1; + } + # Check the post-context. + if (defined $chunks[1]) { + my ($cond, $block) = @{$chunks[1]}; + if (defined $cond) { + substr($block, 0, length($cond), ''); + } + if ($block =~ /^\s*\{/) { + #print "APW: ALLOWED: chunk-1 block<$block>\n"; + $allowed = 1; + } + } + if ($level == 0 && $block =~ /^\s*\{/ && !$allowed) { + my $herectx = $here . "\n"; + my $cnt = statement_rawlines($block); + + for (my $n = 0; $n < $cnt; $n++) { + $herectx .= raw_line($linenr, $n) . "\n"; + } + + WARN("BRACES", + "braces {} are not necessary for single statement blocks\n" . $herectx); + } + } + +# check for unnecessary blank lines around braces + if (($line =~ /^.\s*}\s*$/ && $prevrawline =~ /^.\s*$/)) { + if (CHK("BRACES", + "Blank lines aren't necessary before a close brace '}'\n" . $hereprev) && + $fix && $prevrawline =~ /^\+/) { + fix_delete_line($fixlinenr - 1, $prevrawline); + } + } + if (($rawline =~ /^.\s*$/ && $prevline =~ /^..*{\s*$/)) { + if (CHK("BRACES", + "Blank lines aren't necessary after an open brace '{'\n" . $hereprev) && + $fix) { + fix_delete_line($fixlinenr, $rawline); + } + } + +# no volatiles please + my $asm_volatile = qr{\b(__asm__|asm)\s+(__volatile__|volatile)\b}; + if ($line =~ /\bvolatile\b/ && $line !~ /$asm_volatile/) { + WARN("VOLATILE", + "Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt\n" . $herecurr); + } + +# Check for user-visible strings broken across lines, which breaks the ability +# to grep for the string. Make exceptions when the previous string ends in a +# newline (multiple lines in one string constant) or '\t', '\r', ';', or '{' +# (common in inline assembly) or is a octal \123 or hexadecimal \xaf value + if ($line =~ /^\+\s*$String/ && + $prevline =~ /"\s*$/ && + $prevrawline !~ /(?:\\(?:[ntr]|[0-7]{1,3}|x[0-9a-fA-F]{1,2})|;\s*|\{\s*)"\s*$/) { + if (WARN("SPLIT_STRING", + "quoted string split across lines\n" . $hereprev) && + $fix && + $prevrawline =~ /^\+.*"\s*$/ && + $last_coalesced_string_linenr != $linenr - 1) { + my $extracted_string = get_quoted_string($line, $rawline); + my $comma_close = ""; + if ($rawline =~ /\Q$extracted_string\E(\s*\)\s*;\s*$|\s*,\s*)/) { + $comma_close = $1; + } + + fix_delete_line($fixlinenr - 1, $prevrawline); + fix_delete_line($fixlinenr, $rawline); + my $fixedline = $prevrawline; + $fixedline =~ s/"\s*$//; + $fixedline .= substr($extracted_string, 1) . trim($comma_close); + fix_insert_line($fixlinenr - 1, $fixedline); + $fixedline = $rawline; + $fixedline =~ s/\Q$extracted_string\E\Q$comma_close\E//; + if ($fixedline !~ /\+\s*$/) { + fix_insert_line($fixlinenr, $fixedline); + } + $last_coalesced_string_linenr = $linenr; + } + } + +# check for missing a space in a string concatenation + if ($prevrawline =~ /[^\\]\w"$/ && $rawline =~ /^\+[\t ]+"\w/) { + WARN('MISSING_SPACE', + "break quoted strings at a space character\n" . $hereprev); + } + +# check for spaces before a quoted newline + if ($rawline =~ /^.*\".*\s\\n/) { + if (WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE", + "unnecessary whitespace before a quoted newline\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/^(\+.*\".*)\s+\\n/$1\\n/; + } + + } + +# concatenated string without spaces between elements + if ($line =~ /$String[A-Z_]/ || $line =~ /[A-Za-z0-9_]$String/) { + CHK("CONCATENATED_STRING", + "Concatenated strings should use spaces between elements\n" . $herecurr); + } + +# uncoalesced string fragments + if ($line =~ /$String\s*"/) { + WARN("STRING_FRAGMENTS", + "Consecutive strings are generally better as a single string\n" . $herecurr); + } + +# check for %L{u,d,i} and 0x%[udi] in strings + my $string; + while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) { + $string = substr($rawline, $-[1], $+[1] - $-[1]); + $string =~ s/%%/__/g; + if ($string =~ /(?<!%)%[\*\d\.\$]*L[udi]/) { + WARN("PRINTF_L", + "\%Ld/%Lu are not-standard C, use %lld/%llu\n" . $herecurr); + last; + } + if ($string =~ /0x%[\*\d\.\$\Llzth]*[udi]/) { + ERROR("PRINTF_0xDECIMAL", + "Prefixing 0x with decimal output is defective\n" . $herecurr); + } + } + +# check for line continuations in quoted strings with odd counts of " + if ($rawline =~ /\\$/ && $rawline =~ tr/"/"/ % 2) { + WARN("LINE_CONTINUATIONS", + "Avoid line continuations in quoted strings\n" . $herecurr); + } + +# warn about #if 0 + if ($line =~ /^.\s*\#\s*if\s+0\b/) { + CHK("REDUNDANT_CODE", + "if this code is redundant consider removing it\n" . + $herecurr); + } + +# check for needless "if (<foo>) fn(<foo>)" uses + if ($prevline =~ /\bif\s*\(\s*($Lval)\s*\)/) { + my $tested = quotemeta($1); + my $expr = '\s*\(\s*' . $tested . '\s*\)\s*;'; + if ($line =~ /\b(kfree|usb_free_urb|debugfs_remove(?:_recursive)?|(?:kmem_cache|mempool|dma_pool)_destroy)$expr/) { + my $func = $1; + if (WARN('NEEDLESS_IF', + "$func(NULL) is safe and this check is probably not required\n" . $hereprev) && + $fix) { + my $do_fix = 1; + my $leading_tabs = ""; + my $new_leading_tabs = ""; + if ($lines[$linenr - 2] =~ /^\+(\t*)if\s*\(\s*$tested\s*\)\s*$/) { + $leading_tabs = $1; + } else { + $do_fix = 0; + } + if ($lines[$linenr - 1] =~ /^\+(\t+)$func\s*\(\s*$tested\s*\)\s*;\s*$/) { + $new_leading_tabs = $1; + if (length($leading_tabs) + 1 ne length($new_leading_tabs)) { + $do_fix = 0; + } + } else { + $do_fix = 0; + } + if ($do_fix) { + fix_delete_line($fixlinenr - 1, $prevrawline); + $fixed[$fixlinenr] =~ s/^\+$new_leading_tabs/\+$leading_tabs/; + } + } + } + } + +# check for unnecessary "Out of Memory" messages + if ($line =~ /^\+.*\b$logFunctions\s*\(/ && + $prevline =~ /^[ \+]\s*if\s*\(\s*(\!\s*|NULL\s*==\s*)?($Lval)(\s*==\s*NULL\s*)?\s*\)/ && + (defined $1 || defined $3) && + $linenr > 3) { + my $testval = $2; + my $testline = $lines[$linenr - 3]; + + my ($s, $c) = ctx_statement_block($linenr - 3, $realcnt, 0); +# print("line: <$line>\nprevline: <$prevline>\ns: <$s>\nc: <$c>\n\n\n"); + + if ($c =~ /(?:^|\n)[ \+]\s*(?:$Type\s*)?\Q$testval\E\s*=\s*(?:\([^\)]*\)\s*)?\s*(?:devm_)?(?:[kv][czm]alloc(?:_node|_array)?\b|kstrdup|(?:dev_)?alloc_skb)/) { + WARN("OOM_MESSAGE", + "Possible unnecessary 'out of memory' message\n" . $hereprev); + } + } + +# check for logging functions with KERN_<LEVEL> + if ($line !~ /printk(?:_ratelimited|_once)?\s*\(/ && + $line =~ /\b$logFunctions\s*\(.*\b(KERN_[A-Z]+)\b/) { + my $level = $1; + if (WARN("UNNECESSARY_KERN_LEVEL", + "Possible unnecessary $level\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\s*$level\s*//; + } + } + +# check for mask then right shift without a parentheses + if ($^V && $^V ge 5.10.0 && + $line =~ /$LvalOrFunc\s*\&\s*($LvalOrFunc)\s*>>/ && + $4 !~ /^\&/) { # $LvalOrFunc may be &foo, ignore if so + WARN("MASK_THEN_SHIFT", + "Possible precedence defect with mask then right shift - may need parentheses\n" . $herecurr); + } + +# check for pointer comparisons to NULL + if ($^V && $^V ge 5.10.0) { + while ($line =~ /\b$LvalOrFunc\s*(==|\!=)\s*NULL\b/g) { + my $val = $1; + my $equal = "!"; + $equal = "" if ($4 eq "!="); + if (CHK("COMPARISON_TO_NULL", + "Comparison to NULL could be written \"${equal}${val}\"\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b\Q$val\E\s*(?:==|\!=)\s*NULL\b/$equal$val/; + } + } + } + +# check for bad placement of section $InitAttribute (e.g.: __initdata) + if ($line =~ /(\b$InitAttribute\b)/) { + my $attr = $1; + if ($line =~ /^\+\s*static\s+(?:const\s+)?(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*[=;]/) { + my $ptr = $1; + my $var = $2; + if ((($ptr =~ /\b(union|struct)\s+$attr\b/ && + ERROR("MISPLACED_INIT", + "$attr should be placed after $var\n" . $herecurr)) || + ($ptr !~ /\b(union|struct)\s+$attr\b/ && + WARN("MISPLACED_INIT", + "$attr should be placed after $var\n" . $herecurr))) && + $fix) { + $fixed[$fixlinenr] =~ s/(\bstatic\s+(?:const\s+)?)(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*([=;])\s*/"$1" . trim(string_find_replace($2, "\\s*$attr\\s*", " ")) . " " . trim(string_find_replace($3, "\\s*$attr\\s*", "")) . " $attr" . ("$4" eq ";" ? ";" : " = ")/e; + } + } + } + +# check for $InitAttributeData (ie: __initdata) with const + if ($line =~ /\bconst\b/ && $line =~ /($InitAttributeData)/) { + my $attr = $1; + $attr =~ /($InitAttributePrefix)(.*)/; + my $attr_prefix = $1; + my $attr_type = $2; + if (ERROR("INIT_ATTRIBUTE", + "Use of const init definition must use ${attr_prefix}initconst\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/$InitAttributeData/${attr_prefix}initconst/; + } + } + +# check for $InitAttributeConst (ie: __initconst) without const + if ($line !~ /\bconst\b/ && $line =~ /($InitAttributeConst)/) { + my $attr = $1; + if (ERROR("INIT_ATTRIBUTE", + "Use of $attr requires a separate use of const\n" . $herecurr) && + $fix) { + my $lead = $fixed[$fixlinenr] =~ + /(^\+\s*(?:static\s+))/; + $lead = rtrim($1); + $lead = "$lead " if ($lead !~ /^\+$/); + $lead = "${lead}const "; + $fixed[$fixlinenr] =~ s/(^\+\s*(?:static\s+))/$lead/; + } + } + +# check for __read_mostly with const non-pointer (should just be const) + if ($line =~ /\b__read_mostly\b/ && + $line =~ /($Type)\s*$Ident/ && $1 !~ /\*\s*$/ && $1 =~ /\bconst\b/) { + if (ERROR("CONST_READ_MOSTLY", + "Invalid use of __read_mostly with const type\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\s+__read_mostly\b//; + } + } + +# don't use __constant_<foo> functions outside of include/uapi/ + if ($realfile !~ m@^include/uapi/@ && + $line =~ /(__constant_(?:htons|ntohs|[bl]e(?:16|32|64)_to_cpu|cpu_to_[bl]e(?:16|32|64)))\s*\(/) { + my $constant_func = $1; + my $func = $constant_func; + $func =~ s/^__constant_//; + if (WARN("CONSTANT_CONVERSION", + "$constant_func should be $func\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b$constant_func\b/$func/g; + } + } + +# prefer usleep_range over udelay + if ($line =~ /\budelay\s*\(\s*(\d+)\s*\)/) { + my $delay = $1; + # ignore udelay's < 10, however + if (! ($delay < 10) ) { + CHK("USLEEP_RANGE", + "usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt\n" . $herecurr); + } + if ($delay > 2000) { + WARN("LONG_UDELAY", + "long udelay - prefer mdelay; see arch/arm/include/asm/delay.h\n" . $herecurr); + } + } + +# warn about unexpectedly long msleep's + if ($line =~ /\bmsleep\s*\((\d+)\);/) { + if ($1 < 20) { + WARN("MSLEEP", + "msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt\n" . $herecurr); + } + } + +# check for comparisons of jiffies + if ($line =~ /\bjiffies\s*$Compare|$Compare\s*jiffies\b/) { + WARN("JIFFIES_COMPARISON", + "Comparing jiffies is almost always wrong; prefer time_after, time_before and friends\n" . $herecurr); + } + +# check for comparisons of get_jiffies_64() + if ($line =~ /\bget_jiffies_64\s*\(\s*\)\s*$Compare|$Compare\s*get_jiffies_64\s*\(\s*\)/) { + WARN("JIFFIES_COMPARISON", + "Comparing get_jiffies_64() is almost always wrong; prefer time_after64, time_before64 and friends\n" . $herecurr); + } + +# warn about #ifdefs in C files +# if ($line =~ /^.\s*\#\s*if(|n)def/ && ($realfile =~ /\.c$/)) { +# print "#ifdef in C files should be avoided\n"; +# print "$herecurr"; +# $clean = 0; +# } + +# warn about spacing in #ifdefs + if ($line =~ /^.\s*\#\s*(ifdef|ifndef|elif)\s\s+/) { + if (ERROR("SPACING", + "exactly one space required after that #$1\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ + s/^(.\s*\#\s*(ifdef|ifndef|elif))\s{2,}/$1 /; + } + + } + +# check for spinlock_t definitions without a comment. + if ($line =~ /^.\s*(struct\s+mutex|spinlock_t)\s+\S+;/ || + $line =~ /^.\s*(DEFINE_MUTEX)\s*\(/) { + my $which = $1; + if (!ctx_has_comment($first_line, $linenr)) { + CHK("UNCOMMENTED_DEFINITION", + "$1 definition without comment\n" . $herecurr); + } + } +# check for memory barriers without a comment. + + my $barriers = qr{ + mb| + rmb| + wmb| + read_barrier_depends + }x; + my $barrier_stems = qr{ + mb__before_atomic| + mb__after_atomic| + store_release| + load_acquire| + store_mb| + (?:$barriers) + }x; + my $all_barriers = qr{ + (?:$barriers)| + smp_(?:$barrier_stems)| + virt_(?:$barrier_stems) + }x; + + if ($line =~ /\b(?:$all_barriers)\s*\(/) { + if (!ctx_has_comment($first_line, $linenr)) { + WARN("MEMORY_BARRIER", + "memory barrier without comment\n" . $herecurr); + } + } + + my $underscore_smp_barriers = qr{__smp_(?:$barrier_stems)}x; + + if ($realfile !~ m@^include/asm-generic/@ && + $realfile !~ m@/barrier\.h$@ && + $line =~ m/\b(?:$underscore_smp_barriers)\s*\(/ && + $line !~ m/^.\s*\#\s*define\s+(?:$underscore_smp_barriers)\s*\(/) { + WARN("MEMORY_BARRIER", + "__smp memory barriers shouldn't be used outside barrier.h and asm-generic\n" . $herecurr); + } + +# check for waitqueue_active without a comment. + if ($line =~ /\bwaitqueue_active\s*\(/) { + if (!ctx_has_comment($first_line, $linenr)) { + WARN("WAITQUEUE_ACTIVE", + "waitqueue_active without comment\n" . $herecurr); + } + } + +# Check for expedited grace periods that interrupt non-idle non-nohz +# online CPUs. These expedited can therefore degrade real-time response +# if used carelessly, and should be avoided where not absolutely +# needed. It is always OK to use synchronize_rcu_expedited() and +# synchronize_sched_expedited() at boot time (before real-time applications +# start) and in error situations where real-time response is compromised in +# any case. Note that synchronize_srcu_expedited() does -not- interrupt +# other CPUs, so don't warn on uses of synchronize_srcu_expedited(). +# Of course, nothing comes for free, and srcu_read_lock() and +# srcu_read_unlock() do contain full memory barriers in payment for +# synchronize_srcu_expedited() non-interruption properties. + if ($line =~ /\b(synchronize_rcu_expedited|synchronize_sched_expedited)\(/) { + WARN("EXPEDITED_RCU_GRACE_PERIOD", + "expedited RCU grace periods should be avoided where they can degrade real-time response\n" . $herecurr); + + } + +# check of hardware specific defines + if ($line =~ m@^.\s*\#\s*if.*\b(__i386__|__powerpc64__|__sun__|__s390x__)\b@ && $realfile !~ m@include/asm-@) { + CHK("ARCH_DEFINES", + "architecture specific defines should be avoided\n" . $herecurr); + } + +# Check that the storage class is at the beginning of a declaration + if ($line =~ /\b$Storage\b/ && $line !~ /^.\s*$Storage\b/) { + WARN("STORAGE_CLASS", + "storage class should be at the beginning of the declaration\n" . $herecurr) + } + +# check the location of the inline attribute, that it is between +# storage class and type. + if ($line =~ /\b$Type\s+$Inline\b/ || + $line =~ /\b$Inline\s+$Storage\b/) { + ERROR("INLINE_LOCATION", + "inline keyword should sit between storage class and type\n" . $herecurr); + } + +# Check for __inline__ and __inline, prefer inline + if ($realfile !~ m@\binclude/uapi/@ && + $line =~ /\b(__inline__|__inline)\b/) { + if (WARN("INLINE", + "plain inline is preferred over $1\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b(__inline__|__inline)\b/inline/; + + } + } + +# Check for __attribute__ packed, prefer __packed + if ($realfile !~ m@\binclude/uapi/@ && + $line =~ /\b__attribute__\s*\(\s*\(.*\bpacked\b/) { + WARN("PREFER_PACKED", + "__packed is preferred over __attribute__((packed))\n" . $herecurr); + } + +# Check for __attribute__ aligned, prefer __aligned + if ($realfile !~ m@\binclude/uapi/@ && + $line =~ /\b__attribute__\s*\(\s*\(.*aligned/) { + WARN("PREFER_ALIGNED", + "__aligned(size) is preferred over __attribute__((aligned(size)))\n" . $herecurr); + } + +# Check for __attribute__ format(printf, prefer __printf + if ($realfile !~ m@\binclude/uapi/@ && + $line =~ /\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf/) { + if (WARN("PREFER_PRINTF", + "__printf(string-index, first-to-check) is preferred over __attribute__((format(printf, string-index, first-to-check)))\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf\s*,\s*(.*)\)\s*\)\s*\)/"__printf(" . trim($1) . ")"/ex; + + } + } + +# Check for __attribute__ format(scanf, prefer __scanf + if ($realfile !~ m@\binclude/uapi/@ && + $line =~ /\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\b/) { + if (WARN("PREFER_SCANF", + "__scanf(string-index, first-to-check) is preferred over __attribute__((format(scanf, string-index, first-to-check)))\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\s*,\s*(.*)\)\s*\)\s*\)/"__scanf(" . trim($1) . ")"/ex; + } + } + +# Check for __attribute__ weak, or __weak declarations (may have link issues) + if ($^V && $^V ge 5.10.0 && + $line =~ /(?:$Declare|$DeclareMisordered)\s*$Ident\s*$balanced_parens\s*(?:$Attribute)?\s*;/ && + ($line =~ /\b__attribute__\s*\(\s*\(.*\bweak\b/ || + $line =~ /\b__weak\b/)) { + ERROR("WEAK_DECLARATION", + "Using weak declarations can have unintended link defects\n" . $herecurr); + } + +# check for c99 types like uint8_t used outside of uapi/ + if ($realfile !~ m@\binclude/uapi/@ && + $line =~ /\b($Declare)\s*$Ident\s*[=;,\[]/) { + my $type = $1; + if ($type =~ /\b($typeC99Typedefs)\b/) { + $type = $1; + my $kernel_type = 'u'; + $kernel_type = 's' if ($type =~ /^_*[si]/); + $type =~ /(\d+)/; + $kernel_type .= $1; + if (CHK("PREFER_KERNEL_TYPES", + "Prefer kernel type '$kernel_type' over '$type'\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b$type\b/$kernel_type/; + } + } + } + +# check for cast of C90 native int or longer types constants + if ($line =~ /(\(\s*$C90_int_types\s*\)\s*)($Constant)\b/) { + my $cast = $1; + my $const = $2; + if (WARN("TYPECAST_INT_CONSTANT", + "Unnecessary typecast of c90 int constant\n" . $herecurr) && + $fix) { + my $suffix = ""; + my $newconst = $const; + $newconst =~ s/${Int_type}$//; + $suffix .= 'U' if ($cast =~ /\bunsigned\b/); + if ($cast =~ /\blong\s+long\b/) { + $suffix .= 'LL'; + } elsif ($cast =~ /\blong\b/) { + $suffix .= 'L'; + } + $fixed[$fixlinenr] =~ s/\Q$cast\E$const\b/$newconst$suffix/; + } + } + +# check for sizeof(&) + if ($line =~ /\bsizeof\s*\(\s*\&/) { + WARN("SIZEOF_ADDRESS", + "sizeof(& should be avoided\n" . $herecurr); + } + +# check for sizeof without parenthesis + if ($line =~ /\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/) { + if (WARN("SIZEOF_PARENTHESIS", + "sizeof $1 should be sizeof($1)\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/"sizeof(" . trim($1) . ")"/ex; + } + } + +# check for struct spinlock declarations + if ($line =~ /^.\s*\bstruct\s+spinlock\s+\w+\s*;/) { + WARN("USE_SPINLOCK_T", + "struct spinlock should be spinlock_t\n" . $herecurr); + } + +# check for seq_printf uses that could be seq_puts + if ($sline =~ /\bseq_printf\s*\(.*"\s*\)\s*;\s*$/) { + my $fmt = get_quoted_string($line, $rawline); + $fmt =~ s/%%//g; + if ($fmt !~ /%/) { + if (WARN("PREFER_SEQ_PUTS", + "Prefer seq_puts to seq_printf\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\bseq_printf\b/seq_puts/; + } + } + } + +# Check for misused memsets + if ($^V && $^V ge 5.10.0 && + defined $stat && + $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*$FuncArg\s*\)/) { + + my $ms_addr = $2; + my $ms_val = $7; + my $ms_size = $12; + + if ($ms_size =~ /^(0x|)0$/i) { + ERROR("MEMSET", + "memset to 0's uses 0 as the 2nd argument, not the 3rd\n" . "$here\n$stat\n"); + } elsif ($ms_size =~ /^(0x|)1$/i) { + WARN("MEMSET", + "single byte memset is suspicious. Swapped 2nd/3rd argument?\n" . "$here\n$stat\n"); + } + } + +# Check for memcpy(foo, bar, ETH_ALEN) that could be ether_addr_copy(foo, bar) +# if ($^V && $^V ge 5.10.0 && +# defined $stat && +# $stat =~ /^\+(?:.*?)\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) { +# if (WARN("PREFER_ETHER_ADDR_COPY", +# "Prefer ether_addr_copy() over memcpy() if the Ethernet addresses are __aligned(2)\n" . "$here\n$stat\n") && +# $fix) { +# $fixed[$fixlinenr] =~ s/\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/ether_addr_copy($2, $7)/; +# } +# } + +# Check for memcmp(foo, bar, ETH_ALEN) that could be ether_addr_equal*(foo, bar) +# if ($^V && $^V ge 5.10.0 && +# defined $stat && +# $stat =~ /^\+(?:.*?)\bmemcmp\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) { +# WARN("PREFER_ETHER_ADDR_EQUAL", +# "Prefer ether_addr_equal() or ether_addr_equal_unaligned() over memcmp()\n" . "$here\n$stat\n") +# } + +# check for memset(foo, 0x0, ETH_ALEN) that could be eth_zero_addr +# check for memset(foo, 0xFF, ETH_ALEN) that could be eth_broadcast_addr +# if ($^V && $^V ge 5.10.0 && +# defined $stat && +# $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) { +# +# my $ms_val = $7; +# +# if ($ms_val =~ /^(?:0x|)0+$/i) { +# if (WARN("PREFER_ETH_ZERO_ADDR", +# "Prefer eth_zero_addr over memset()\n" . "$here\n$stat\n") && +# $fix) { +# $fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_zero_addr($2)/; +# } +# } elsif ($ms_val =~ /^(?:0xff|255)$/i) { +# if (WARN("PREFER_ETH_BROADCAST_ADDR", +# "Prefer eth_broadcast_addr() over memset()\n" . "$here\n$stat\n") && +# $fix) { +# $fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_broadcast_addr($2)/; +# } +# } +# } + +# typecasts on min/max could be min_t/max_t + if ($^V && $^V ge 5.10.0 && + defined $stat && + $stat =~ /^\+(?:.*?)\b(min|max)\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\)/) { + if (defined $2 || defined $7) { + my $call = $1; + my $cast1 = deparenthesize($2); + my $arg1 = $3; + my $cast2 = deparenthesize($7); + my $arg2 = $8; + my $cast; + + if ($cast1 ne "" && $cast2 ne "" && $cast1 ne $cast2) { + $cast = "$cast1 or $cast2"; + } elsif ($cast1 ne "") { + $cast = $cast1; + } else { + $cast = $cast2; + } + WARN("MINMAX", + "$call() should probably be ${call}_t($cast, $arg1, $arg2)\n" . "$here\n$stat\n"); + } + } + +# check usleep_range arguments + if ($^V && $^V ge 5.10.0 && + defined $stat && + $stat =~ /^\+(?:.*?)\busleep_range\s*\(\s*($FuncArg)\s*,\s*($FuncArg)\s*\)/) { + my $min = $1; + my $max = $7; + if ($min eq $max) { + WARN("USLEEP_RANGE", + "usleep_range should not use min == max args; see Documentation/timers/timers-howto.txt\n" . "$here\n$stat\n"); + } elsif ($min =~ /^\d+$/ && $max =~ /^\d+$/ && + $min > $max) { + WARN("USLEEP_RANGE", + "usleep_range args reversed, use min then max; see Documentation/timers/timers-howto.txt\n" . "$here\n$stat\n"); + } + } + +# check for naked sscanf + if ($^V && $^V ge 5.10.0 && + defined $stat && + $line =~ /\bsscanf\b/ && + ($stat !~ /$Ident\s*=\s*sscanf\s*$balanced_parens/ && + $stat !~ /\bsscanf\s*$balanced_parens\s*(?:$Compare)/ && + $stat !~ /(?:$Compare)\s*\bsscanf\s*$balanced_parens/)) { + my $lc = $stat =~ tr@\n@@; + $lc = $lc + $linenr; + my $stat_real = raw_line($linenr, 0); + for (my $count = $linenr + 1; $count <= $lc; $count++) { + $stat_real = $stat_real . "\n" . raw_line($count, 0); + } + WARN("NAKED_SSCANF", + "unchecked sscanf return value\n" . "$here\n$stat_real\n"); + } + +# check for simple sscanf that should be kstrto<foo> + if ($^V && $^V ge 5.10.0 && + defined $stat && + $line =~ /\bsscanf\b/) { + my $lc = $stat =~ tr@\n@@; + $lc = $lc + $linenr; + my $stat_real = raw_line($linenr, 0); + for (my $count = $linenr + 1; $count <= $lc; $count++) { + $stat_real = $stat_real . "\n" . raw_line($count, 0); + } + if ($stat_real =~ /\bsscanf\b\s*\(\s*$FuncArg\s*,\s*("[^"]+")/) { + my $format = $6; + my $count = $format =~ tr@%@%@; + if ($count == 1 && + $format =~ /^"\%(?i:ll[udxi]|[udxi]ll|ll|[hl]h?[udxi]|[udxi][hl]h?|[hl]h?|[udxi])"$/) { + WARN("SSCANF_TO_KSTRTO", + "Prefer kstrto<type> to single variable sscanf\n" . "$here\n$stat_real\n"); + } + } + } + +# check for new externs in .h files. + if ($realfile =~ /\.h$/ && + $line =~ /^\+\s*(extern\s+)$Type\s*$Ident\s*\(/s) { + if (CHK("AVOID_EXTERNS", + "extern prototypes should be avoided in .h files\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/(.*)\bextern\b\s*(.*)/$1$2/; + } + } + +# check for new externs in .c files. + if ($realfile =~ /\.c$/ && defined $stat && + $stat =~ /^.\s*(?:extern\s+)?$Type\s+($Ident)(\s*)\(/s) + { + my $function_name = $1; + my $paren_space = $2; + + my $s = $stat; + if (defined $cond) { + substr($s, 0, length($cond), ''); + } + if ($s =~ /^\s*;/ && + $function_name ne 'uninitialized_var') + { + WARN("AVOID_EXTERNS", + "externs should be avoided in .c files\n" . $herecurr); + } + + if ($paren_space =~ /\n/) { + WARN("FUNCTION_ARGUMENTS", + "arguments for function declarations should follow identifier\n" . $herecurr); + } + + } elsif ($realfile =~ /\.c$/ && defined $stat && + $stat =~ /^.\s*extern\s+/) + { + WARN("AVOID_EXTERNS", + "externs should be avoided in .c files\n" . $herecurr); + } + + if ($realfile =~ /\.[ch]$/ && defined $stat && + $stat =~ /^.\s*(?:extern\s+)?$Type\s*$Ident\s*\(\s*([^{]+)\s*\)\s*;/s && + $1 ne "void") { + my $args = trim($1); + while ($args =~ m/\s*($Type\s*(?:$Ident|\(\s*\*\s*$Ident?\s*\)\s*$balanced_parens)?)/g) { + my $arg = trim($1); + if ($arg =~ /^$Type$/ && $arg !~ /enum\s+$Ident$/) { + WARN("FUNCTION_ARGUMENTS", + "function definition argument '$arg' should also have an identifier name\n" . $herecurr); + } + } + } + +# checks for new __setup's + if ($rawline =~ /\b__setup\("([^"]*)"/) { + my $name = $1; + + if (!grep(/$name/, @setup_docs)) { + CHK("UNDOCUMENTED_SETUP", + "__setup appears un-documented -- check Documentation/kernel-parameters.txt\n" . $herecurr); + } + } + +# check for pointless casting of kmalloc return + if ($line =~ /\*\s*\)\s*[kv][czm]alloc(_node){0,1}\b/) { + WARN("UNNECESSARY_CASTS", + "unnecessary cast may hide bugs, see http://c-faq.com/malloc/mallocnocast.html\n" . $herecurr); + } + +# alloc style +# p = alloc(sizeof(struct foo), ...) should be p = alloc(sizeof(*p), ...) + if ($^V && $^V ge 5.10.0 && + $line =~ /\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*([kv][mz]alloc(?:_node)?)\s*\(\s*(sizeof\s*\(\s*struct\s+$Lval\s*\))/) { + CHK("ALLOC_SIZEOF_STRUCT", + "Prefer $3(sizeof(*$1)...) over $3($4...)\n" . $herecurr); + } + +# check for k[mz]alloc with multiplies that could be kmalloc_array/kcalloc + if ($^V && $^V ge 5.10.0 && + $line =~ /\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*(k[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)\s*,/) { + my $oldfunc = $3; + my $a1 = $4; + my $a2 = $10; + my $newfunc = "kmalloc_array"; + $newfunc = "kcalloc" if ($oldfunc eq "kzalloc"); + my $r1 = $a1; + my $r2 = $a2; + if ($a1 =~ /^sizeof\s*\S/) { + $r1 = $a2; + $r2 = $a1; + } + if ($r1 !~ /^sizeof\b/ && $r2 =~ /^sizeof\s*\S/ && + !($r1 =~ /^$Constant$/ || $r1 =~ /^[A-Z_][A-Z0-9_]*$/)) { + if (WARN("ALLOC_WITH_MULTIPLY", + "Prefer $newfunc over $oldfunc with multiply\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*(k[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)/$1 . ' = ' . "$newfunc(" . trim($r1) . ', ' . trim($r2)/e; + + } + } + } + +# check for krealloc arg reuse + if ($^V && $^V ge 5.10.0 && + $line =~ /\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*krealloc\s*\(\s*\1\s*,/) { + WARN("KREALLOC_ARG_REUSE", + "Reusing the krealloc arg is almost always a bug\n" . $herecurr); + } + +# check for alloc argument mismatch + if ($line =~ /\b(kcalloc|kmalloc_array)\s*\(\s*sizeof\b/) { + WARN("ALLOC_ARRAY_ARGS", + "$1 uses number as first arg, sizeof is generally wrong\n" . $herecurr); + } + +# check for multiple semicolons + if ($line =~ /;\s*;\s*$/) { + if (WARN("ONE_SEMICOLON", + "Statements terminations use 1 semicolon\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/(\s*;\s*){2,}$/;/g; + } + } + +# check for #defines like: 1 << <digit> that could be BIT(digit), it is not exported to uapi + if ($realfile !~ m@^include/uapi/@ && + $line =~ /#\s*define\s+\w+\s+\(?\s*1\s*([ulUL]*)\s*\<\<\s*(?:\d+|$Ident)\s*\)?/) { + my $ull = ""; + $ull = "_ULL" if (defined($1) && $1 =~ /ll/i); + if (CHK("BIT_MACRO", + "Prefer using the BIT$ull macro\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\(?\s*1\s*[ulUL]*\s*<<\s*(\d+|$Ident)\s*\)?/BIT${ull}($1)/; + } + } + +# check for #if defined CONFIG_<FOO> || defined CONFIG_<FOO>_MODULE + if ($line =~ /^\+\s*#\s*if\s+defined(?:\s*\(?\s*|\s+)(CONFIG_[A-Z_]+)\s*\)?\s*\|\|\s*defined(?:\s*\(?\s*|\s+)\1_MODULE\s*\)?\s*$/) { + my $config = $1; + if (WARN("PREFER_IS_ENABLED", + "Prefer IS_ENABLED(<FOO>) to CONFIG_<FOO> || CONFIG_<FOO>_MODULE\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] = "\+#if IS_ENABLED($config)"; + } + } + +# check for case / default statements not preceded by break/fallthrough/switch + if ($line =~ /^.\s*(?:case\s+(?:$Ident|$Constant)\s*|default):/) { + my $has_break = 0; + my $has_statement = 0; + my $count = 0; + my $prevline = $linenr; + while ($prevline > 1 && ($file || $count < 3) && !$has_break) { + $prevline--; + my $rline = $rawlines[$prevline - 1]; + my $fline = $lines[$prevline - 1]; + last if ($fline =~ /^\@\@/); + next if ($fline =~ /^\-/); + next if ($fline =~ /^.(?:\s*(?:case\s+(?:$Ident|$Constant)[\s$;]*|default):[\s$;]*)*$/); + $has_break = 1 if ($rline =~ /fall[\s_-]*(through|thru)/i); + next if ($fline =~ /^.[\s$;]*$/); + $has_statement = 1; + $count++; + $has_break = 1 if ($fline =~ /\bswitch\b|\b(?:break\s*;[\s$;]*$|return\b|goto\b|continue\b)/); + } + if (!$has_break && $has_statement) { + WARN("MISSING_BREAK", + "Possible switch case/default not preceeded by break or fallthrough comment\n" . $herecurr); + } + } + +# check for switch/default statements without a break; + if ($^V && $^V ge 5.10.0 && + defined $stat && + $stat =~ /^\+[$;\s]*(?:case[$;\s]+\w+[$;\s]*:[$;\s]*|)*[$;\s]*\bdefault[$;\s]*:[$;\s]*;/g) { + my $ctx = ''; + my $herectx = $here . "\n"; + my $cnt = statement_rawlines($stat); + for (my $n = 0; $n < $cnt; $n++) { + $herectx .= raw_line($linenr, $n) . "\n"; + } + WARN("DEFAULT_NO_BREAK", + "switch default: should use break\n" . $herectx); + } + +# check for gcc specific __FUNCTION__ + if ($line =~ /\b__FUNCTION__\b/) { + if (WARN("USE_FUNC", + "__func__ should be used instead of gcc specific __FUNCTION__\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\b__FUNCTION__\b/__func__/g; + } + } + +# check for uses of __DATE__, __TIME__, __TIMESTAMP__ + while ($line =~ /\b(__(?:DATE|TIME|TIMESTAMP)__)\b/g) { + ERROR("DATE_TIME", + "Use of the '$1' macro makes the build non-deterministic\n" . $herecurr); + } + +# check for use of yield() + if ($line =~ /\byield\s*\(\s*\)/) { + WARN("YIELD", + "Using yield() is generally wrong. See yield() kernel-doc (sched/core.c)\n" . $herecurr); + } + +# check for comparisons against true and false + if ($line =~ /\+\s*(.*?)\b(true|false|$Lval)\s*(==|\!=)\s*(true|false|$Lval)\b(.*)$/i) { + my $lead = $1; + my $arg = $2; + my $test = $3; + my $otype = $4; + my $trail = $5; + my $op = "!"; + + ($arg, $otype) = ($otype, $arg) if ($arg =~ /^(?:true|false)$/i); + + my $type = lc($otype); + if ($type =~ /^(?:true|false)$/) { + if (("$test" eq "==" && "$type" eq "true") || + ("$test" eq "!=" && "$type" eq "false")) { + $op = ""; + } + + CHK("BOOL_COMPARISON", + "Using comparison to $otype is error prone\n" . $herecurr); + +## maybe suggesting a correct construct would better +## "Using comparison to $otype is error prone. Perhaps use '${lead}${op}${arg}${trail}'\n" . $herecurr); + + } + } + +# check for semaphores initialized locked + if ($line =~ /^.\s*sema_init.+,\W?0\W?\)/) { + WARN("CONSIDER_COMPLETION", + "consider using a completion\n" . $herecurr); + } + +# recommend kstrto* over simple_strto* and strict_strto* + if ($line =~ /\b((simple|strict)_(strto(l|ll|ul|ull)))\s*\(/) { + WARN("CONSIDER_KSTRTO", + "$1 is obsolete, use k$3 instead\n" . $herecurr); + } + +# check for __initcall(), use device_initcall() explicitly or more appropriate function please + if ($line =~ /^.\s*__initcall\s*\(/) { + WARN("USE_DEVICE_INITCALL", + "please use device_initcall() or more appropriate function instead of __initcall() (see include/linux/init.h)\n" . $herecurr); + } + +# check for various structs that are normally const (ops, kgdb, device_tree) + if ($line !~ /\bconst\b/ && + $line =~ /\bstruct\s+($const_structs)\b/) { + WARN("CONST_STRUCT", + "struct $1 should normally be const\n" . + $herecurr); + } + +# use of NR_CPUS is usually wrong +# ignore definitions of NR_CPUS and usage to define arrays as likely right + if ($line =~ /\bNR_CPUS\b/ && + $line !~ /^.\s*\s*#\s*if\b.*\bNR_CPUS\b/ && + $line !~ /^.\s*\s*#\s*define\b.*\bNR_CPUS\b/ && + $line !~ /^.\s*$Declare\s.*\[[^\]]*NR_CPUS[^\]]*\]/ && + $line !~ /\[[^\]]*\.\.\.[^\]]*NR_CPUS[^\]]*\]/ && + $line !~ /\[[^\]]*NR_CPUS[^\]]*\.\.\.[^\]]*\]/) + { + WARN("NR_CPUS", + "usage of NR_CPUS is often wrong - consider using cpu_possible(), num_possible_cpus(), for_each_possible_cpu(), etc\n" . $herecurr); + } + +# Use of __ARCH_HAS_<FOO> or ARCH_HAVE_<BAR> is wrong. + if ($line =~ /\+\s*#\s*define\s+((?:__)?ARCH_(?:HAS|HAVE)\w*)\b/) { + ERROR("DEFINE_ARCH_HAS", + "#define of '$1' is wrong - use Kconfig variables or standard guards instead\n" . $herecurr); + } + +# likely/unlikely comparisons similar to "(likely(foo) > 0)" + if ($^V && $^V ge 5.10.0 && + $line =~ /\b((?:un)?likely)\s*\(\s*$FuncArg\s*\)\s*$Compare/) { + WARN("LIKELY_MISUSE", + "Using $1 should generally have parentheses around the comparison\n" . $herecurr); + } + +# whine mightly about in_atomic + if ($line =~ /\bin_atomic\s*\(/) { + if ($realfile =~ m@^drivers/@) { + ERROR("IN_ATOMIC", + "do not use in_atomic in drivers\n" . $herecurr); + } elsif ($realfile !~ m@^kernel/@) { + WARN("IN_ATOMIC", + "use of in_atomic() is incorrect outside core kernel code\n" . $herecurr); + } + } + +# whine about ACCESS_ONCE + if ($^V && $^V ge 5.10.0 && + $line =~ /\bACCESS_ONCE\s*$balanced_parens\s*(=(?!=))?\s*($FuncArg)?/) { + my $par = $1; + my $eq = $2; + my $fun = $3; + $par =~ s/^\(\s*(.*)\s*\)$/$1/; + if (defined($eq)) { + if (WARN("PREFER_WRITE_ONCE", + "Prefer WRITE_ONCE(<FOO>, <BAR>) over ACCESS_ONCE(<FOO>) = <BAR>\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\bACCESS_ONCE\s*\(\s*\Q$par\E\s*\)\s*$eq\s*\Q$fun\E/WRITE_ONCE($par, $fun)/; + } + } else { + if (WARN("PREFER_READ_ONCE", + "Prefer READ_ONCE(<FOO>) over ACCESS_ONCE(<FOO>)\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/\bACCESS_ONCE\s*\(\s*\Q$par\E\s*\)/READ_ONCE($par)/; + } + } + } + +# check for lockdep_set_novalidate_class + if ($line =~ /^.\s*lockdep_set_novalidate_class\s*\(/ || + $line =~ /__lockdep_no_validate__\s*\)/ ) { + if ($realfile !~ m@^kernel/lockdep@ && + $realfile !~ m@^include/linux/lockdep@ && + $realfile !~ m@^drivers/base/core@) { + ERROR("LOCKDEP", + "lockdep_no_validate class is reserved for device->mutex.\n" . $herecurr); + } + } + + if ($line =~ /debugfs_create_\w+.*\b$mode_perms_world_writable\b/ || + $line =~ /DEVICE_ATTR.*\b$mode_perms_world_writable\b/) { + WARN("EXPORTED_WORLD_WRITABLE", + "Exporting world writable files is usually an error. Consider more restrictive permissions.\n" . $herecurr); + } + +# Mode permission misuses where it seems decimal should be octal +# This uses a shortcut match to avoid unnecessary uses of a slow foreach loop + if ($^V && $^V ge 5.10.0 && + defined $stat && + $line =~ /$mode_perms_search/) { + foreach my $entry (@mode_permission_funcs) { + my $func = $entry->[0]; + my $arg_pos = $entry->[1]; + + my $lc = $stat =~ tr@\n@@; + $lc = $lc + $linenr; + my $stat_real = raw_line($linenr, 0); + for (my $count = $linenr + 1; $count <= $lc; $count++) { + $stat_real = $stat_real . "\n" . raw_line($count, 0); + } + + my $skip_args = ""; + if ($arg_pos > 1) { + $arg_pos--; + $skip_args = "(?:\\s*$FuncArg\\s*,\\s*){$arg_pos,$arg_pos}"; + } + my $test = "\\b$func\\s*\\(${skip_args}($FuncArg(?:\\|\\s*$FuncArg)*)\\s*[,\\)]"; + if ($stat =~ /$test/) { + my $val = $1; + $val = $6 if ($skip_args ne ""); + if (($val =~ /^$Int$/ && $val !~ /^$Octal$/) || + ($val =~ /^$Octal$/ && length($val) ne 4)) { + ERROR("NON_OCTAL_PERMISSIONS", + "Use 4 digit octal (0777) not decimal permissions\n" . "$here\n" . $stat_real); + } + if ($val =~ /^$Octal$/ && (oct($val) & 02)) { + ERROR("EXPORTED_WORLD_WRITABLE", + "Exporting writable files is usually an error. Consider more restrictive permissions.\n" . "$here\n" . $stat_real); + } + } + } + } + +# check for uses of S_<PERMS> that could be octal for readability + if ($line =~ /\b$mode_perms_string_search\b/) { + my $val = ""; + my $oval = ""; + my $to = 0; + my $curpos = 0; + my $lastpos = 0; + while ($line =~ /\b(($mode_perms_string_search)\b(?:\s*\|\s*)?\s*)/g) { + $curpos = pos($line); + my $match = $2; + my $omatch = $1; + last if ($lastpos > 0 && ($curpos - length($omatch) != $lastpos)); + $lastpos = $curpos; + $to |= $mode_permission_string_types{$match}; + $val .= '\s*\|\s*' if ($val ne ""); + $val .= $match; + $oval .= $omatch; + } + $oval =~ s/^\s*\|\s*//; + $oval =~ s/\s*\|\s*$//; + my $octal = sprintf("%04o", $to); + if (WARN("SYMBOLIC_PERMS", + "Symbolic permissions '$oval' are not preferred. Consider using octal permissions '$octal'.\n" . $herecurr) && + $fix) { + $fixed[$fixlinenr] =~ s/$val/$octal/; + } + } + +# validate content of MODULE_LICENSE against list from include/linux/module.h + if ($line =~ /\bMODULE_LICENSE\s*\(\s*($String)\s*\)/) { + my $extracted_string = get_quoted_string($line, $rawline); + my $valid_licenses = qr{ + GPL| + GPL\ v2| + GPL\ and\ additional\ rights| + Dual\ BSD/GPL| + Dual\ MIT/GPL| + Dual\ MPL/GPL| + Proprietary + }x; + if ($extracted_string !~ /^"(?:$valid_licenses)"$/x) { + WARN("MODULE_LICENSE", + "unknown module license " . $extracted_string . "\n" . $herecurr); + } + } + } + + # If we have no input at all, then there is nothing to report on + # so just keep quiet. + if ($#rawlines == -1) { + exit(0); + } + + # In mailback mode only produce a report in the negative, for + # things that appear to be patches. + if ($mailback && ($clean == 1 || !$is_patch)) { + exit(0); + } + + # This is not a patch, and we are are in 'no-patch' mode so + # just keep quiet. + if (!$chk_patch && !$is_patch) { + exit(0); + } + + if (!$is_patch && $file !~ /cover-letter\.patch$/) { + ERROR("NOT_UNIFIED_DIFF", + "Does not appear to be a unified-diff format patch\n"); + } + if ($is_patch && $has_commit_log && $chk_signoff && $signoff == 0) { + ERROR("MISSING_SIGN_OFF", + "Missing Signed-off-by: line(s)\n"); + } + + print report_dump(); + if ($summary && !($clean == 1 && $quiet == 1)) { + print "$filename " if ($summary_file); + print "total: $cnt_error errors, $cnt_warn warnings, " . + (($check)? "$cnt_chk checks, " : "") . + "$cnt_lines lines checked\n"; + } + + if ($quiet == 0) { + # If there were any defects found and not already fixing them + if (!$clean and !$fix) { + print << "EOM" + +NOTE: For some of the reported defects, checkpatch may be able to + mechanically convert to the typical style using --fix or --fix-inplace. +EOM + } + # If there were whitespace errors which cleanpatch can fix + # then suggest that. + if ($rpt_cleaners) { + $rpt_cleaners = 0; + print << "EOM" + +NOTE: Whitespace errors detected. + You may wish to use scripts/cleanpatch or scripts/cleanfile +EOM + } + } + + if ($clean == 0 && $fix && + ("@rawlines" ne "@fixed" || + $#fixed_inserted >= 0 || $#fixed_deleted >= 0)) { + my $newfile = $filename; + $newfile .= ".EXPERIMENTAL-checkpatch-fixes" if (!$fix_inplace); + my $linecount = 0; + my $f; + + @fixed = fix_inserted_deleted_lines(\@fixed, \@fixed_inserted, \@fixed_deleted); + + open($f, '>', $newfile) + or die "$P: Can't open $newfile for write\n"; + foreach my $fixed_line (@fixed) { + $linecount++; + if ($file) { + if ($linecount > 3) { + $fixed_line =~ s/^\+//; + print $f $fixed_line . "\n"; + } + } else { + print $f $fixed_line . "\n"; + } + } + close($f); + + if (!$quiet) { + print << "EOM"; + +Wrote EXPERIMENTAL --fix correction(s) to '$newfile' + +Do _NOT_ trust the results written to this file. +Do _NOT_ submit these changes without inspecting them for correctness. + +This EXPERIMENTAL file is simply a convenience to help rewrite patches. +No warranties, expressed or implied... +EOM + } + } + + if ($quiet == 0) { + print "\n"; + if ($clean == 1) { + print "$vname has no obvious style problems and is ready for submission.\n"; + } else { + print "$vname has style problems, please review.\n"; + } + } + return $clean; +} diff --git a/freertos/cvitek/scripts/const_structs.checkpatch b/freertos/cvitek/scripts/const_structs.checkpatch new file mode 100644 index 000000000..ac5f12671 --- /dev/null +++ b/freertos/cvitek/scripts/const_structs.checkpatch @@ -0,0 +1,64 @@ +acpi_dock_ops +address_space_operations +backlight_ops +block_device_operations +clk_ops +comedi_lrange +component_ops +dentry_operations +dev_pm_ops +dma_map_ops +driver_info +drm_connector_funcs +drm_encoder_funcs +drm_encoder_helper_funcs +ethtool_ops +extent_io_ops +file_lock_operations +file_operations +hv_ops +ide_dma_ops +ide_port_ops +inode_operations +intel_dvo_dev_ops +irq_domain_ops +item_operations +iwl_cfg +iwl_ops +kgdb_arch +kgdb_io +kset_uevent_ops +lock_manager_operations +machine_desc +microcode_ops +mlxsw_reg_info +mtrr_ops +neigh_ops +net_device_ops +nlmsvc_binding +nvkm_device_chip +of_device_id +pci_raw_ops +pipe_buf_operations +platform_hibernation_ops +platform_suspend_ops +proto_ops +regmap_access_table +rpc_pipe_ops +rtc_class_ops +sd_desc +seq_operations +sirfsoc_padmux +snd_ac97_build_ops +snd_soc_component_driver +soc_pcmcia_socket_ops +stacktrace_ops +sysfs_ops +tty_operations +uart_ops +usb_mon_operations +v4l2_ctrl_ops +v4l2_ioctl_ops +vm_operations_struct +wacom_features +wd_ops diff --git a/freertos/cvitek/scripts/cv180x_lscript.ld b/freertos/cvitek/scripts/cv180x_lscript.ld new file mode 100644 index 000000000..13c5477b8 --- /dev/null +++ b/freertos/cvitek/scripts/cv180x_lscript.ld @@ -0,0 +1,204 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A53 Linker Script */ +/* */ +/*******************************************************************/ +INCLUDE cvi_board_memmap.ld + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x20000; +/* _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; */ +/*_HEAP_SIZE = 0x20000;*/ + +_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024; +_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048; +_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + psu_ddr_0_MEM_0 : ORIGIN = CVIMMAP_FREERTOS_ADDR , LENGTH = CVIMMAP_FREERTOS_SIZE +} + +/* Specify the default entry point to the program */ + +/*ENTRY(_vector_table)*/ +ENTRY(_start) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > psu_ddr_0_MEM_0 + +.init (ALIGN(64)) : { + KEEP (*(.init)) +} > psu_ddr_0_MEM_0 + +.fini (ALIGN(64)) : { + KEEP (*(.fini)) +} > psu_ddr_0_MEM_0 + +.interp : { + KEEP (*(.interp)) +} > psu_ddr_0_MEM_0 + +.note-ABI-tag : { + KEEP (*(.note-ABI-tag)) +} > psu_ddr_0_MEM_0 + +.rodata : { + . = ALIGN(64); + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.srodata*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > psu_ddr_0_MEM_0 + +.rodata1 : { + . = ALIGN(64); + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > psu_ddr_0_MEM_0 + +.data : { + . = ALIGN(64); + _data = .; + *(.data) + *(.data.*) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + _edata = .; +} > psu_ddr_0_MEM_0 + +.data1 : { + . = ALIGN(64); + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > psu_ddr_0_MEM_0 + +.got : { + *(.got) +} > psu_ddr_0_MEM_0 + +.got1 : { + *(.got1) +} > psu_ddr_0_MEM_0 + +.got2 : { + *(.got2) +} > psu_ddr_0_MEM_0 + +.ctors : { + . = ALIGN(64); + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > psu_ddr_0_MEM_0 + +.dtors : { + . = ALIGN(64); + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > psu_ddr_0_MEM_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > psu_ddr_0_MEM_0 + +.eh_frame : { + *(.eh_frame) +} > psu_ddr_0_MEM_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > psu_ddr_0_MEM_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > psu_ddr_0_MEM_0 + +.bss (NOLOAD) : { + . = ALIGN(64); + _bss = .; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(64); + _ebss = .; +} > psu_ddr_0_MEM_0 + +/*_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );*/ + _data_lma = LOADADDR(.data); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(64); + _heap = .; + HeapBase = .; + _heap_start = .; + *(.heap*) + /*. += _HEAP_SIZE;*/ + /*_heap_size = _HEAP_SIZE; */ + _heap_end = .; + HeapLimit = .; +} > psu_ddr_0_MEM_0 + +.stack (NOLOAD) : { + . = ALIGN(64); + _stack_end_end = .; + . += _STACK_SIZE; + _stack_top = .; +} > psu_ddr_0_MEM_0 + +_end = .; +} + diff --git a/freertos/cvitek/scripts/cv181x_lscript.ld b/freertos/cvitek/scripts/cv181x_lscript.ld new file mode 100644 index 000000000..13c5477b8 --- /dev/null +++ b/freertos/cvitek/scripts/cv181x_lscript.ld @@ -0,0 +1,204 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A53 Linker Script */ +/* */ +/*******************************************************************/ +INCLUDE cvi_board_memmap.ld + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x20000; +/* _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; */ +/*_HEAP_SIZE = 0x20000;*/ + +_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024; +_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048; +_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + psu_ddr_0_MEM_0 : ORIGIN = CVIMMAP_FREERTOS_ADDR , LENGTH = CVIMMAP_FREERTOS_SIZE +} + +/* Specify the default entry point to the program */ + +/*ENTRY(_vector_table)*/ +ENTRY(_start) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > psu_ddr_0_MEM_0 + +.init (ALIGN(64)) : { + KEEP (*(.init)) +} > psu_ddr_0_MEM_0 + +.fini (ALIGN(64)) : { + KEEP (*(.fini)) +} > psu_ddr_0_MEM_0 + +.interp : { + KEEP (*(.interp)) +} > psu_ddr_0_MEM_0 + +.note-ABI-tag : { + KEEP (*(.note-ABI-tag)) +} > psu_ddr_0_MEM_0 + +.rodata : { + . = ALIGN(64); + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.srodata*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > psu_ddr_0_MEM_0 + +.rodata1 : { + . = ALIGN(64); + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > psu_ddr_0_MEM_0 + +.data : { + . = ALIGN(64); + _data = .; + *(.data) + *(.data.*) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + _edata = .; +} > psu_ddr_0_MEM_0 + +.data1 : { + . = ALIGN(64); + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > psu_ddr_0_MEM_0 + +.got : { + *(.got) +} > psu_ddr_0_MEM_0 + +.got1 : { + *(.got1) +} > psu_ddr_0_MEM_0 + +.got2 : { + *(.got2) +} > psu_ddr_0_MEM_0 + +.ctors : { + . = ALIGN(64); + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > psu_ddr_0_MEM_0 + +.dtors : { + . = ALIGN(64); + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > psu_ddr_0_MEM_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > psu_ddr_0_MEM_0 + +.eh_frame : { + *(.eh_frame) +} > psu_ddr_0_MEM_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > psu_ddr_0_MEM_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > psu_ddr_0_MEM_0 + +.bss (NOLOAD) : { + . = ALIGN(64); + _bss = .; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(64); + _ebss = .; +} > psu_ddr_0_MEM_0 + +/*_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );*/ + _data_lma = LOADADDR(.data); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(64); + _heap = .; + HeapBase = .; + _heap_start = .; + *(.heap*) + /*. += _HEAP_SIZE;*/ + /*_heap_size = _HEAP_SIZE; */ + _heap_end = .; + HeapLimit = .; +} > psu_ddr_0_MEM_0 + +.stack (NOLOAD) : { + . = ALIGN(64); + _stack_end_end = .; + . += _STACK_SIZE; + _stack_top = .; +} > psu_ddr_0_MEM_0 + +_end = .; +} + diff --git a/freertos/cvitek/scripts/cv1835_lscript.ld b/freertos/cvitek/scripts/cv1835_lscript.ld new file mode 100644 index 000000000..2831e0d97 --- /dev/null +++ b/freertos/cvitek/scripts/cv1835_lscript.ld @@ -0,0 +1,320 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-A53 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x100000; + +_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024; +_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048; +_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + psu_ddr_0_MEM_0 : ORIGIN = 0x110000000, LENGTH = 0x10000000 + psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000 + psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000 + psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.text : { + KEEP (*(.vectors)) + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > psu_ddr_0_MEM_0 + +.init (ALIGN(64)) : { + KEEP (*(.init)) +} > psu_ddr_0_MEM_0 + +.fini (ALIGN(64)) : { + KEEP (*(.fini)) +} > psu_ddr_0_MEM_0 + +.interp : { + KEEP (*(.interp)) +} > psu_ddr_0_MEM_0 + +.note-ABI-tag : { + KEEP (*(.note-ABI-tag)) +} > psu_ddr_0_MEM_0 + +.rodata : { + . = ALIGN(64); + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > psu_ddr_0_MEM_0 + +.rodata1 : { + . = ALIGN(64); + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > psu_ddr_0_MEM_0 + +.sdata2 : { + . = ALIGN(64); + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > psu_ddr_0_MEM_0 + +.sbss2 : { + . = ALIGN(64); + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > psu_ddr_0_MEM_0 + +.data : { + . = ALIGN(64); + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > psu_ddr_0_MEM_0 + +.data1 : { + . = ALIGN(64); + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > psu_ddr_0_MEM_0 + +.got : { + *(.got) +} > psu_ddr_0_MEM_0 + +.got1 : { + *(.got1) +} > psu_ddr_0_MEM_0 + +.got2 : { + *(.got2) +} > psu_ddr_0_MEM_0 + +.ctors : { + . = ALIGN(64); + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > psu_ddr_0_MEM_0 + +.dtors : { + . = ALIGN(64); + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > psu_ddr_0_MEM_0 + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > psu_ddr_0_MEM_0 + +.eh_frame : { + *(.eh_frame) +} > psu_ddr_0_MEM_0 + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > psu_ddr_0_MEM_0 + +.gcc_except_table : { + *(.gcc_except_table) +} > psu_ddr_0_MEM_0 + +.mmu_tbl0 (ALIGN(4096)) : { + __mmu_tbl0_start = .; + *(.mmu_tbl0) + __mmu_tbl0_end = .; +} > psu_ddr_0_MEM_0 + +.mmu_tbl1 (ALIGN(4096)) : { + __mmu_tbl1_start = .; + *(.mmu_tbl1) + __mmu_tbl1_end = .; +} > psu_ddr_0_MEM_0 + +.mmu_tbl2 (ALIGN(4096)) : { + __mmu_tbl2_start = .; + *(.mmu_tbl2) + __mmu_tbl2_end = .; +} > psu_ddr_0_MEM_0 + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > psu_ddr_0_MEM_0 + +.preinit_array : { + . = ALIGN(64); + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > psu_ddr_0_MEM_0 + +.init_array : { + . = ALIGN(64); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > psu_ddr_0_MEM_0 + +.fini_array : { + . = ALIGN(64); + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > psu_ddr_0_MEM_0 + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > psu_ddr_0_MEM_0 + +.sdata : { + . = ALIGN(64); + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > psu_ddr_0_MEM_0 + +.sbss (NOLOAD) : { + . = ALIGN(64); + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + . = ALIGN(64); + __sbss_end = .; +} > psu_ddr_0_MEM_0 + +.tdata : { + . = ALIGN(64); + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > psu_ddr_0_MEM_0 + +.tbss : { + . = ALIGN(64); + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > psu_ddr_0_MEM_0 + +.bss (NOLOAD) : { + . = ALIGN(64); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(64); + __bss_end__ = .; +} > psu_ddr_0_MEM_0 + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(64); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > psu_ddr_0_MEM_0 + +.stack (NOLOAD) : { + . = ALIGN(64); + _el3_stack_end = .; + . += _STACK_SIZE; + __el3_stack = .; + _el2_stack_end = .; + . += _EL2_STACK_SIZE; + . = ALIGN(64); + __el2_stack = .; + _el1_stack_end = .; + . += _EL1_STACK_SIZE; + . = ALIGN(64); + __el1_stack = .; + _el0_stack_end = .; + . += _EL0_STACK_SIZE; + . = ALIGN(64); + __el0_stack = .; +} > psu_ddr_0_MEM_0 + +_end = .; +} + diff --git a/freertos/cvitek/scripts/spelling.txt b/freertos/cvitek/scripts/spelling.txt new file mode 100644 index 000000000..163c720d3 --- /dev/null +++ b/freertos/cvitek/scripts/spelling.txt @@ -0,0 +1,1072 @@ +# Originally from Debian's Lintian tool. Various false positives have been +# removed, and various additions have been made as they've been discovered +# in the kernel source. +# +# License: GPLv2 +# +# The format of each line is: +# mistake||correction +# +abandonning||abandoning +abigious||ambiguous +abitrate||arbitrate +abov||above +abreviated||abbreviated +absense||absence +absolut||absolute +absoulte||absolute +acccess||access +acceleratoin||acceleration +accelleration||acceleration +accesing||accessing +accesnt||accent +accessable||accessible +accesss||access +accidentaly||accidentally +accidentually||accidentally +accoding||according +accomodate||accommodate +accomodates||accommodates +accordign||according +accoring||according +accout||account +accquire||acquire +accquired||acquired +accross||across +acessable||accessible +acess||access +achitecture||architecture +acient||ancient +acitions||actions +acitve||active +acknowldegement||acknowldegement +acknowledgement||acknowledgment +ackowledge||acknowledge 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+wirte||write +withing||within +wnat||want +workarould||workaround +writeing||writing +writting||writing +zombe||zombie +zomebie||zombie diff --git a/freertos/cvitek/scripts/toolchain-aarch64-elf.cmake b/freertos/cvitek/scripts/toolchain-aarch64-elf.cmake new file mode 100644 index 000000000..757dad698 --- /dev/null +++ b/freertos/cvitek/scripts/toolchain-aarch64-elf.cmake @@ -0,0 +1,52 @@ +include(CMakeForceCompiler) + +# The Generic system name is used for embedded targets (targets without OS) in +# CMake +SET( CMAKE_SYSTEM_NAME Generic) +set( CMAKE_SYSTEM_PROCESSOR aarch64 ) +set( ARCH aarch64 ) +#set( CROSS_COMPILE aarch64-linux-gnu-) +set( CROSS_COMPILE aarch64-elf-) + +set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc) +set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++) +set(CMAKE_S_COMPILER ${CROSS_COMPILE}gcc) + +message(STATUS "CMAKE_C_COMPILER: ${CMAKE_C_COMPILER}") +message(STATUS "CMAKE_CXX_COMPILER: ${CMAKE_CXX_COMPILER}") + +# skip tests +set(CMAKE_C_COMPILER_WORKS 1) + +# We must set the OBJCOPY setting into cache so that it's available to the +# whole project. Otherwise, this does not get set into the CACHE and therefore +# the build doesn't know what the OBJCOPY filepath is +set(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy + CACHE FILEPATH "The toolchain objcopy command " FORCE ) + +# Set the CMAKE C flags (which should also be used by the assembler! +#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O3 -DFREERTOS_BSP" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O2 -std=gnu11" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -ffunction-sections" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fdata-sections" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wl,--gc-sections" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-pointer-to-int-cast" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-missing-field-initializers" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -g -Wall -Wextra" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -nostdlib" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mcmodel=large" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DFREERTOS_BSP -DGUEST" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_SMP" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_64BIT" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_PHYS_ADDR_T_64BIT" ) +# need to compatible with linux-kernel structure size, please check with linux-kernl .config +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_DEBUG_SPINLOCK" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DDEVICE_FROM_DTS" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__linux" ) + +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" ) +set( CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" ) + +set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-missing-field-initializers" ) +set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-parentheses" ) diff --git a/freertos/cvitek/scripts/toolchain-riscv64-elf.cmake b/freertos/cvitek/scripts/toolchain-riscv64-elf.cmake new file mode 100644 index 000000000..66d150262 --- /dev/null +++ b/freertos/cvitek/scripts/toolchain-riscv64-elf.cmake @@ -0,0 +1,59 @@ +include(CMakeForceCompiler) + +# The Generic system name is used for embedded targets (targets without OS) in +# CMake +SET( CMAKE_SYSTEM_NAME Generic) +set( CMAKE_SYSTEM_PROCESSOR riscv64 ) +set( ARCH riscv64 ) +#set( CROSS_COMPILE aarch64-linux-gnu-) +set( CROSS_COMPILE riscv64-unknown-elf-) + +set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc) +set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++) +set(CMAKE_S_COMPILER ${CROSS_COMPILE}gcc) + +message(STATUS "CMAKE_C_COMPILER: ${CMAKE_C_COMPILER}") +message(STATUS "CMAKE_CXX_COMPILER: ${CMAKE_CXX_COMPILER}") + +# skip tests +set(CMAKE_C_COMPILER_WORKS 1) + +# We must set the OBJCOPY setting into cache so that it's available to the +# whole project. Otherwise, this does not get set into the CACHE and therefore +# the build doesn't know what the OBJCOPY filepath is +set(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy + CACHE FILEPATH "The toolchain objcopy command " FORCE ) + +# Set the CMAKE C flags (which should also be used by the assembler! +#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O3 -DFREERTOS_BSP" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O2 -std=gnu11" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=rv64imafdc" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mabi=lp64d" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -ffunction-sections" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fdata-sections" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wl,--gc-sections" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-pointer-to-int-cast" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fno-builtin" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-missing-field-initializers" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -g -Wall -Wextra" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -nostdlib" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mcmodel=medany" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DFREERTOS_BSP" ) +if ($ENV{DDR_64MB_SIZE} STREQUAL "y") +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DLINUX_BSP_64MB" ) +else() +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DLINUX_BSP_128MB" ) +endif() +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__riscv_xlen=64" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DTHEAD_C906" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_64BIT" ) +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DRISCV_FPU" ) +#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DPXP_PLAT" ) +#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DFPGA_PLAT" ) +#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DRISCV_QEMU" ) + +set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" ) +set( CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" ) + +set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-missing-field-initializers" ) +set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-parentheses" ) diff --git a/freertos/cvitek/task/CMakeLists.txt b/freertos/cvitek/task/CMakeLists.txt new file mode 100644 index 000000000..aec52dff8 --- /dev/null +++ b/freertos/cvitek/task/CMakeLists.txt @@ -0,0 +1,63 @@ +cmake_minimum_required(VERSION 3.16.5) + +project(arch C ASM) + +set(CMAKE_CXX_STANDARD 11) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS ON) + +set(CMAKE_INSTALL_PREFIX ${TOP_DIR}/install) +set(CMAKE_INSTALL_INC_PREFIX ${TOP_DIR}/install/include) + +set(SAFETY_FLAGS "-Wall -Wextra -fno-strict-aliasing -static --specs=nosys.specs") +#set(SAFETY_FLAGS "-Werror -Wall -Wextra -fno-strict-aliasing") +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${SAFETY_FLAGS} -D${RUN_TYPE}") +set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${SAFETY_FLAGS}") + +include(${TOP_DIR}/scripts/ParseConfiguration.cmake) +ParseConfiguration("${BUILD_ENV_PATH}/.config") + +if (RUN_TYPE STREQUAL "BLINKY_DEMO") + add_subdirectory(demo/Blinky_Demo) +elseif (RUN_TYPE STREQUAL "FULL_DEMO") + add_subdirectory(demo/Full_Demo) +elseif (RUN_TYPE STREQUAL "POSIX_DEMO") + add_subdirectory(demo/POSIX_Demo) +elseif (RUN_TYPE STREQUAL "CVIRTOS") +if (CHIP STREQUAL "cv1835") + add_subdirectory(comm) + + add_subdirectory(vip) + add_subdirectory(display) + add_subdirectory(vcodec) +elseif (CHIP STREQUAL "cv181x" OR CHIP STREQUAL "cv180x") + add_subdirectory(comm) + add_subdirectory(rgn) + add_subdirectory(audio) +if (CONFIG_FAST_IMAGE_TYPE STRGREATER "0") + add_subdirectory(vi) + + add_subdirectory(camera) + add_subdirectory(vcodec) + # add_subdirectory(vip) +endif() +endif() + +if(CONFIG_BOARD STREQUAL "cv181x_fpga" OR CONFIG_BOARD STREQUAL "cv181x_fpga_c906") + add_compile_definitions(FPGA_PORTING) +endif() + +endif() +add_subdirectory(main) + +add_custom_target(cvirtos.bin + DEPENDS ${CMAKE_INSTALL_PREFIX}/bin/cvirtos.elf +) +add_custom_command(TARGET cvirtos.bin + COMMAND echo "Build cvirtos.bin and it depends on ${CMAKE_INSTALL_PREFIX}/bin/cvirtos.elf" + POST_BUILD + DEPENDS ${CMAKE_INSTALL_PREFIX}/bin/cvirtos.elf + COMMAND ${CMAKE_OBJCOPY} ARGS ${CMAKE_INSTALL_PREFIX}/bin/cvirtos.elf -O binary ${CMAKE_INSTALL_PREFIX}/bin/cvirtos.bin + COMMAND ${CMAKE_OBJDUMP} ARGS -dS ${CMAKE_INSTALL_PREFIX}/bin/cvirtos.elf > ${CMAKE_INSTALL_PREFIX}/bin/cvirtos.dis + VERBATIM +) diff --git a/freertos/cvitek/task/audio/CMakeLists.txt b/freertos/cvitek/task/audio/CMakeLists.txt new file mode 100644 index 000000000..18fe863ac --- /dev/null +++ b/freertos/cvitek/task/audio/CMakeLists.txt @@ -0,0 +1,26 @@ +file(GLOB _SOURCES "src/${RUN_ARCH}/*.c" "src/SSP_Algorithm_20220128/*.c" "src/unit_test/*.c") +file(GLOB _HEADERS "include/*.h" "src/SSP_Algorithm_20220128/*.h" "src/unit_test/*.h") + +include_directories(include) +include_directories(src) +include_directories(src/SSP_Algorithm_20220128) +include_directories(src/unit_test) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) + +include_directories(../comm/include) +include_directories(../common/include/cv181x) +#include_directories(../../common/include/cv1835) +add_definitions(-DPLATFORM_RTOS) +#add_definitions(-DAUDIO_UNIT_TEST) +#add_definitions(-DFE_WAVE_FILE=/pattern/FE_ht_s_ref_hw_8k_1.wav) +#add_definitions(-DNE_WAVE_FILE=/pattern/NE_ht_s_ref_hw_8k_1.wav) +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DFE_WAVE_FILE=./pattern/FE_ht_s_ref_hw_8k_1.wav -DNE_WAVE_FILE=./pattern/NE_ht_s_ref_hw_8k_1.wav") + +add_library(audio STATIC ${_SOURCES}) +install(TARGETS audio DESTINATION lib) + diff --git a/freertos/cvitek/task/audio/include/cvi_comm_aio.h b/freertos/cvitek/task/audio/include/cvi_comm_aio.h new file mode 100644 index 000000000..766fa445c --- /dev/null +++ b/freertos/cvitek/task/audio/include/cvi_comm_aio.h @@ -0,0 +1,581 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_comm_aio.h + * Description: basic audio in out definition + */ + +#ifndef __CVI_COMM_AIO_H__ +#define __CVI_COMM_AIO_H__ + +#include "cvi_common.h" +#ifndef PLATFORM_RTOS +#include "cvi_errno.h" +#endif + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + + +#define CVI_MAX_AUDIO_FRAME_NUM 300 /*max count of audio frame in Buffer */ +#define CVI_AUD_MAX_VOICE_POINT_NUM 1280 /*max sample per frame for voice encode */ +#define CVI_AUD_MAX_AUDIO_POINT_NUM 2048 /*max sample per frame for all encoder(aacplus:2048)*/ +#define CVI_AUD_MAX_CHANNEL_NUM 3 +#define CVI_MAX_AUDIO_STREAM_LEN (4 * 4096) + + + +#define MAX_AUDIO_FILE_PATH_LEN 256 +#define MAX_AUDIO_FILE_NAME_LEN 256 +#define MAX_AUDIO_VQE_CUSTOMIZE_NAME 64 + +/*The VQE EQ Band num.*/ +#define VQE_EQ_BAND_NUM 10 + +#define AI_RECORDVQE_MASK_HPF 0x1 +#define AI_RECORDVQE_MASK_RNR 0x2 +#define AI_RECORDVQE_MASK_HDR 0x4 +#define AI_RECORDVQE_MASK_DRC 0x8 +#define AI_RECORDVQE_MASK_EQ 0x10 +#define AI_RECORDVQE_MASK_AGC 0x20 + + +//#define AI_TALKVQE_MASK_HPF 0x1//not support +#define AI_TALKVQE_MASK_AEC 0x3 +#define AI_TALKVQE_MASK_ANR 0x4 +#define AI_TALKVQE_MASK_AGC 0x8 +#define AI_TALKVQE_MASK_NOTCH_FILTER 0x30 +//#define AI_TALKVQE_MASK_EQ 0x10//not supoort +#define NEXT_SSP_ALGO 1 + + +/* LP AEC Control */ +#define LP_AEC_ENABLE 0x1 /* bit 0 */ +/* NLP AES Control */ +#define NLP_AES_ENABLE 0x2 /* bit 1 */ +/* NR Control */ +#define NR_ENABLE 0x4 /* bit 2 */ +/* AGC Control */ +#define AGC_ENABLE 0x8 /* bit 3 */ +/* Notch Filter Control */ +#define NOTCH_ENABLE 0x10 /* bit 4 */ +/* DC Filter Control */ +#define DCREMOVER_ENABLE 0x20 /* bit 5 */ +/* DG Control */ +#define DG_ENABLE 0x40 /* bit 6 */ +/* Delay Control */ +#define DELAY_ENABLE 0x80 /* bit 7 */ + +//control for AO_VQE +/* AGC Control in SPK Path */ +#define SPK_AGC_ENABLE 0x1 /* bit 0 */ +#define SPK_EQ_ENABLE 0x2 /* bit 1 */ + +#define CVI_MAX_AI_DEVICE_ID_NUM 3 +#define CVI_MAX_AO_DEVICE_ID_NUM 3 +/* define macro */ + +#define CHECK_AI_DEVID_VALID(x) \ + ((((x) > (CVI_MAX_AI_DEVICE_ID_NUM-1))) ? 1:0) +#define CHECK_AO_DEVID_VALID(x) \ + ((((x) > (CVI_MAX_AO_DEVICE_ID_NUM-1))) ? 1:0) +#define CHECK_AENC_DEVID_VALID(x) \ + ((((x) > (AENC_MAX_CHN_NUM-1))) ? 1:0) +#define CHECK_ADEC_DEVID_VALID(x) \ + ((((x) > (ADEC_MAX_CHN_NUM-1))) ? 1:0) + + +typedef enum _AUDIO_SAMPLE_RATE_E { + AUDIO_SAMPLE_RATE_8000 = 8000, /* 8K samplerate*/ + /* 12K samplerate(not support in this version)*/ + AUDIO_SAMPLE_RATE_11025 = 11025, /* 11.025K samplerate*/ + AUDIO_SAMPLE_RATE_16000 = 16000, /* 16K samplerate*/ + AUDIO_SAMPLE_RATE_22050 = 22050, /* 22.050K samplerate*/ + AUDIO_SAMPLE_RATE_24000 = 24000, /* 24K samplerate*/ + AUDIO_SAMPLE_RATE_32000 = 32000, /* 32K samplerate*/ + AUDIO_SAMPLE_RATE_44100 = 44100, /* 44.1K samplerate*/ + AUDIO_SAMPLE_RATE_48000 = 48000, /* 48K samplerate*/ + AUDIO_SAMPLE_RATE_64000 = 64000, /* 64K samplerate*/ + /* 96K samplerate is not support in cv183x series*/ + AUDIO_SAMPLE_RATE_BUTT, +} AUDIO_SAMPLE_RATE_E; + +typedef enum _AUDIO_BIT_WIDTH_E { + AUDIO_BIT_WIDTH_8 = 0, /* 8bit width */ + AUDIO_BIT_WIDTH_16 = 1, /* 16bit width*/ + AUDIO_BIT_WIDTH_24 = 2, /* 24bit width*/ + AUDIO_BIT_WIDTH_32 = 3, /* 24bit width*/ + AUDIO_BIT_WIDTH_BUTT, +} AUDIO_BIT_WIDTH_E; + +typedef enum _AIO_MODE_E { + AIO_MODE_I2S_MASTER = 0, /* AIO I2S master mode */ + AIO_MODE_I2S_SLAVE, /* AIO I2S slave mode */ + AIO_MODE_PCM_SLAVE_STD, /* AIO PCM slave standard mode */ + AIO_MODE_PCM_SLAVE_NSTD, /* AIO PCM slave non-standard mode */ + AIO_MODE_PCM_MASTER_STD, /* AIO PCM master standard mode */ + AIO_MODE_PCM_MASTER_NSTD, /* AIO PCM master non-standard mode */ + AIO_MODE_BUTT +} AIO_MODE_E; + +typedef enum { + AIO_I2STYPE_INNERCODEC = 0, /* AIO I2S connect inner audio CODEC */ + AIO_I2STYPE_INNERHDMI, /* AIO I2S connect Inner HDMI */ + AIO_I2STYPE_EXTERN, /* AIO I2S connect extern hardware */ +} AIO_I2STYPE_E; + +typedef enum _AIO_SOUND_MODE_E { + AUDIO_SOUND_MODE_MONO = 0, /*mono*/ + AUDIO_SOUND_MODE_STEREO = 1, /*stereo only support interlace mode*/ + AUDIO_SOUND_MODE_BUTT +} AUDIO_SOUND_MODE_E; + +/*An example of the packing scheme for G726-32 codewords is as */ +/*shown, and bit A3 is the least significant */ +/*bit of the first codeword:*/ +/*RTP G726-32:*/ +/*0 1*/ +/*0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5*/ +/*+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-*/ +/*|B B B B|A A A A|D D D D|C C C C| ...*/ +/*|0 1 2 3|0 1 2 3|0 1 2 3|0 1 2 3|*/ +/*+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-*/ +/*MEDIA G726-32:*/ +/*0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5*/ +/*+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-*/ +/*|A A A A|B B B B|C C C C|D D D D| ...*/ +/*|3 2 1 0|3 2 1 0|3 2 1 0|3 2 1 0|*/ +/*+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-*/ +typedef enum _G726_BPS_E { + G726_16K = 0, /* G726 16kbps, see RFC3551.txt 4.5.4 G726-16 */ + G726_24K, /* G726 24kbps, see RFC3551.txt 4.5.4 G726-24 */ + G726_32K, /* G726 32kbps, see RFC3551.txt 4.5.4 G726-32 */ + G726_40K, /* G726 40kbps, see RFC3551.txt 4.5.4 G726-40 */ + MEDIA_G726_16K, /* G726 16kbps for ASF ... */ + MEDIA_G726_24K, /* G726 24kbps for ASF ... */ + MEDIA_G726_32K, /* G726 32kbps for ASF ... */ + MEDIA_G726_40K, /* G726 40kbps for ASF ... */ + G726_BUTT, +} G726_BPS_E; + +typedef enum _ADPCM_TYPE_E { + /* see DVI4 diiffers in three respects from the IMA ADPCM at RFC3551.txt 4.5.1 DVI4 */ + + ADPCM_TYPE_DVI4 = 0, /* 32kbps ADPCM(DVI4) for RTP */ + ADPCM_TYPE_IMA, /* 32kbps ADPCM(IMA),NOTICE:point num must be 161/241/321/481 */ + ADPCM_TYPE_ORG_DVI4, + ADPCM_TYPE_BUTT, +} ADPCM_TYPE_E; + +#define AI_EXPAND 0x01 +#define AI_CUT 0x02 + +typedef struct _AIO_ATTR_S { + AUDIO_SAMPLE_RATE_E enSamplerate; /* sample rate */ + AUDIO_BIT_WIDTH_E enBitwidth; /* bitwidth */ + AIO_MODE_E enWorkmode; /* master or slave mode */ + AUDIO_SOUND_MODE_E enSoundmode; /* momo or steror */ + CVI_U32 u32EXFlag; + /* expand 8bit to 16bit,use AI_EXPAND(only valid for AI 8bit),*/ + /*use AI_CUT(only valid for extern Codec for 24bit) */ + CVI_U32 u32FrmNum; + /* frame num in buf[2,CVI_MAX_AUDIO_FRAME_NUM] */ + CVI_U32 u32PtNumPerFrm; + /* point num per frame (80/160/240/320/480/1024/2048) */ + /*(ADPCM IMA should add 1 point, AMR only support 160) */ + CVI_U32 u32ChnCnt; /* channel number on FS, valid value:1/2/4/8 */ + CVI_U32 u32ClkSel; /* 0: AI and AO clock is separate*/ + /* 1: AI and AO clock is inseparate, AI use AO's clock*/ + AIO_I2STYPE_E enI2sType; /* i2s type */ +} AIO_ATTR_S; + +typedef struct _AI_CHN_PARAM_S { + CVI_U32 u32UsrFrmDepth; +} AI_CHN_PARAM_S; + +typedef struct _AUDIO_FRAME_S { + AUDIO_BIT_WIDTH_E enBitwidth;/*audio frame bitwidth*/ + AUDIO_SOUND_MODE_E enSoundmode;/*audio frame momo or stereo mode*/ + CVI_U8 * u64VirAddr[2]; + CVI_U64 u64PhyAddr[2]; + CVI_U64 u64TimeStamp; /*audio frame timestamp*/ + CVI_U32 u32Seq; /*audio frame seq*/ + CVI_U32 u32Len; /*data length per channel in frame*/ + CVI_U32 u32PoolId[2]; +} AUDIO_FRAME_S; + +typedef struct _AEC_FRAME_S { + AUDIO_FRAME_S stRefFrame; /* AEC reference audio frame */ + CVI_BOOL bValid; /* whether frame is valid */ + CVI_BOOL bSysBind; /* whether is sysbind */ +} AEC_FRAME_S; + + +typedef struct _AUDIO_FRAME_INFO_S { + AUDIO_FRAME_S *pstFrame;/*frame ptr*/ + CVI_U32 u32Id; /*frame id*/ +} AUDIO_FRAME_INFO_S; + +typedef struct _AUDIO_STREAM_S { + /* CVI_U8 ATTRIBUTE *pStream;the virtual address of stream */ + /* CVI_U64 ATTRIBUTE u64PhyAddr; the physics address of stream */ + CVI_U8 *pStream; /* the virtual address of stream */ + CVI_U64 u64PhyAddr; /* the physics address of stream */ + CVI_U32 u32Len; /* stream length, by bytes */ + CVI_U64 u64TimeStamp; /* frame time stamp*/ + CVI_U32 u32Seq; /* frame seq,if stream is not a valid frame,u32Seq is 0*/ +} AUDIO_STREAM_S; + + +typedef struct _AO_CHN_STATE_S { + CVI_U32 u32ChnTotalNum; /* total number of channel buffer */ + CVI_U32 u32ChnFreeNum; /* free number of channel buffer */ + CVI_U32 u32ChnBusyNum; /* busy number of channel buffer */ +} AO_CHN_STATE_S; + +typedef enum _AUDIO_TRACK_MODE_E { + AUDIO_TRACK_NORMAL = 0, + AUDIO_TRACK_BOTH_LEFT = 1, + AUDIO_TRACK_BOTH_RIGHT = 2, + AUDIO_TRACK_EXCHANGE = 3, + AUDIO_TRACK_MIX = 4, + AUDIO_TRACK_LEFT_MUTE = 5, + AUDIO_TRACK_RIGHT_MUTE = 6, + AUDIO_TRACK_BOTH_MUTE = 7, + + AUDIO_TRACK_BUTT +} AUDIO_TRACK_MODE_E; + + +typedef enum _AUDIO_FADE_RATE_E { + AUDIO_FADE_RATE_NONE = 0, + AUDIO_FADE_RATE_10 = 10, + AUDIO_FADE_RATE_20 = 20, + AUDIO_FADE_RATE_30 = 30, + AUDIO_FADE_RATE_50 = 50, + AUDIO_FADE_RATE_100 = 100, + AUDIO_FADE_RATE_200 = 200, + AUDIO_FADE_RATE_BUTT = -1 +} AUDIO_FADE_RATE_E; + +typedef struct _AUDIO_FADE_S { + CVI_BOOL bFade; + AUDIO_FADE_RATE_E enFadeInRate; + AUDIO_FADE_RATE_E enFadeOutRate; +} AUDIO_FADE_S; + +/**Defines the configure parameters of AEC.*/ +typedef struct _AI_AEC_CONFIG_S { + CVI_U16 para_aec_filter_len; + CVI_U16 para_aes_std_thrd; /* the threshold of STD/DTD, [0, 35] */ + CVI_U16 para_aes_supp_coeff; /* the residual echo suppression level in AES, [0, 24] */ +} AI_AEC_CONFIG_S __attribute__((packed)) __attribute__((aligned(0x8))); + +/**Defines the configure parameters of UPVQE work state.*/ +typedef enum _VQE_WORKSTATE_E { + VQE_WORKSTATE_COMMON = 0, + /* common environment, Applicable to the family of voice calls. */ + VQE_WORKSTATE_MUSIC = 1, + /* music environment , Applicable to the family of music environment. */ + VQE_WORKSTATE_NOISY = 2, + /* noisy environment , Applicable to the noisy voice calls. */ +} VQE_WORKSTATE_E; + +/**Defines record type*/ +typedef enum _VQE_RECORD_TYPE { + VQE_RECORD_NORMAL = 0, + /*<double micphone recording. */ + VQE_RECORD_BUTT, +} VQE_RECORD_TYPE; + + +/* HDR Set CODEC GAIN Function Handle type */ +typedef CVI_S32(*pFuncGainCallBack)(CVI_S32 s32SetGain); + + + + +//#define CVIAUDIO_ALGO_SSP 0x11//defalut algorithm +//#define CVIAUDIO_ALGO_SSP_NOTCH 0x12//customize algorithm with notch filter +#define CVIAUDIO_ALGO_ONLINE_PARAM 0xC0 //customize parameter from /mnt/data/audvqe.cfg +typedef struct _AUDIO_DELAY_CONFIG_S { + /* the initial filter length of linear AEC to support up for echo tail, [1, 13] */ + CVI_U16 para_aec_init_filter_len; + /* the digital gain target, [1, 12] */ + CVI_U16 para_dg_target; + /* the delay sample for ref signal, [1, 3000] */ + CVI_U16 para_delay_sample; +} AUDIO_DELAY_CONFIG_S __attribute__((packed)) __attribute__((aligned(0x8))); +typedef struct _AUDIO_AGC_CONFIG_S { + /* the max boost gain for AGC release processing, [0, 3] */ + /* para_obj.para_agc_max_gain = 1; */ + CVI_S8 para_agc_max_gain; + /* the gain level of target high of AGC, [0, 36] */ + /* para_obj.para_agc_target_high = 2; */ + CVI_S8 para_agc_target_high; + /* the gain level of target low of AGC, [0, 36] */ + /* para_obj.para_agc_target_low = 6; */ + CVI_S8 para_agc_target_low; + /* speech-activated AGC functionality, [0, 1] */ + /* para_obj.para_agc_vad_enable = 1; */ + CVI_BOOL para_agc_vad_ena; +} AUDIO_AGC_CONFIG_S __attribute__((packed)) __attribute__((aligned(0x8))); + + +typedef struct _AUDIO_SPK_AGC_CONFIG_S { + /* the max boost gain for AGC release processing, [0, 3] */ + /* para_obj.para_agc_max_gain = 1; */ + CVI_S8 para_agc_max_gain; + /* the gain level of target high of AGC, [0, 36] */ + /* para_obj.para_agc_target_high = 2; */ + CVI_S8 para_agc_target_high; + /* the gain level of target low of AGC, [0, 36] */ + /* para_obj.para_agc_target_low = 6; */ + CVI_S8 para_agc_target_low; +} AUDIO_SPK_AGC_CONFIG_S; + +typedef struct _AUDIO_SPK_EQ_CONFIG_S { + CVI_U16 para_spk_eq_nband; + CVI_U16 para_spk_eq_freq[5]; + CVI_U16 para_spk_eq_gain[5]; + CVI_U16 para_spk_eq_qfactor[5]; +} AUDIO_SPK_EQ_CONFIG_S; + +typedef struct _AUDIO_ANR_CONFIG_S { + /* the coefficient of NR priori SNR tracking, [0, 20] */ + /* para_obj.para_nr_snr_coeff = 15; */ + CVI_U16 para_nr_snr_coeff; + /* the coefficient of NR noise tracking, [0, 14] */ + /* para_obj.para_nr_noise_coeff = 2; */ + //CVI_S8 para_nr_noise_coeff; + CVI_U16 para_nr_init_sile_time; +} AUDIO_ANR_CONFIG_S __attribute__((packed)) __attribute__((aligned(0x8))); + +typedef struct _AI_TALKVQE_CONFIG_S { + CVI_U16 para_client_config; + CVI_U32 u32OpenMask; + CVI_S32 s32WorkSampleRate; + /* Sample Rate: 8KHz/16KHz. default: 8KHz*/ + //MIC IN VQE setting + AI_AEC_CONFIG_S stAecCfg; + AUDIO_ANR_CONFIG_S stAnrCfg; + AUDIO_AGC_CONFIG_S stAgcCfg; + AUDIO_DELAY_CONFIG_S stAecDelayCfg; + CVI_S32 s32RevMask;//turn this flag to default 0x11 + CVI_S32 para_notch_freq;//user can ignore this flag + CVI_CHAR customize[MAX_AUDIO_VQE_CUSTOMIZE_NAME]; +} AI_TALKVQE_CONFIG_S __attribute__((packed)) __attribute__((aligned(0x8))); + +typedef struct _AO_VQE_CONFIG_S { + CVI_U32 u32OpenMask; + CVI_S32 s32WorkSampleRate; + /* Sample Rate: 8KHz/16KHz default: 8KHz*/ + AUDIO_SPK_AGC_CONFIG_S stAgcCfg; + AUDIO_SPK_EQ_CONFIG_S stEqCfg; +} AO_VQE_CONFIG_S; + +/**Defines the configure parameters of Record VQE.*/ +typedef struct _AI_RECORDVQE_CONFIG_S { + CVI_U32 u32OpenMask; + CVI_S32 s32WorkSampleRate; + /* Sample Rate:16KHz/48KHz*/ + CVI_S32 s32FrameSample; + CVI_S32 s32BytesPerSample; + /* VQE frame length:80-4096 */ + VQE_WORKSTATE_E enWorkstate; + CVI_S32 s32InChNum; + CVI_S32 s32OutChNum; + VQE_RECORD_TYPE enRecordType; + AUDIO_AGC_CONFIG_S stAgcCfg; +} AI_RECORDVQE_CONFIG_S; +/* Defines the module register configure of VQE. */ +typedef struct _VQE_MODULE_CONFIG_S { + CVI_VOID *pHandle; +} VQE_MODULE_CONFIG_S; + +typedef struct _AUDIO_VQE_REGISTER_S { + VQE_MODULE_CONFIG_S stResModCfg; + VQE_MODULE_CONFIG_S stHpfModCfg; + VQE_MODULE_CONFIG_S stHdrModCfg; + VQE_MODULE_CONFIG_S stGainModCfg; + + // Record VQE + VQE_MODULE_CONFIG_S stRecordModCfg; + + // Talk VQE + VQE_MODULE_CONFIG_S stAecModCfg; + VQE_MODULE_CONFIG_S stAnrModCfg; + VQE_MODULE_CONFIG_S stAgcModCfg; + VQE_MODULE_CONFIG_S stEqModCfg; + + // CviFi VQE + VQE_MODULE_CONFIG_S stRnrModCfg; + VQE_MODULE_CONFIG_S stDrcModCfg; + VQE_MODULE_CONFIG_S stPeqModCfg; +} AUDIO_VQE_REGISTER_S; + +/*Defines the configure parameters of AI saving file.*/ +typedef struct _AUDIO_SAVE_FILE_INFO_S { + CVI_BOOL bCfg; + CVI_CHAR aFilePath[MAX_AUDIO_FILE_PATH_LEN]; + CVI_CHAR aFileName[MAX_AUDIO_FILE_NAME_LEN]; + CVI_U32 u32FileSize; /*in KB*/ +} AUDIO_SAVE_FILE_INFO_S; + +/*Defines whether the file is saving or not .*/ +typedef struct _AUDIO_FILE_STATUS_S { + CVI_BOOL bSaving; +} AUDIO_FILE_STATUS_S; + +/**Defines audio clksel type*/ +typedef enum _AUDIO_CLKSEL_E { + AUDIO_CLKSEL_BASE = 0, /*<Audio base clk. */ + AUDIO_CLKSEL_SPARE, /*<Audio spare clk. */ + + AUDIO_CLKSEL_BUTT, +} AUDIO_CLKSEL_E; + +/*Defines audio mode parameter.*/ +typedef struct _AUDIO_MOD_PARAM_S { + AUDIO_CLKSEL_E enClkSel; +} AUDIO_MOD_PARAM_S; + + +typedef struct _cvi_wavHEADER { + /* RIFF string */ + CVI_U8 riff[4]; + // overall size of file in bytes + CVI_U32 overall_size; + // WAVE string + CVI_U8 wave[4]; + // fmt string with trailing null char + CVI_U8 fmt_chunk_marker[4]; + // length of the format data + CVI_U32 length_of_fmt; + // format type. 1-PCM, 3- IEEE float, 6 - 8bit A law, 7 - 8bit mu law + CVI_U16 format_type; + // no.of channels + CVI_U16 channels; + // sampling rate (blocks per second) + CVI_U32 sample_rate; + // SampleRate * NumChannels * BitsPerSample/8 + CVI_U32 byterate; + // NumChannels * BitsPerSample/8 + CVI_U16 block_align; + // bits per sample, 8- 8bits, 16- 16 bits etc + CVI_U16 bits_per_sample; + // DATA string or FLLR string + CVI_U8 data_chunk_header[4]; + // NumSamples * NumChannels * BitsPerSample/8 - size of the next chunk that will be read + CVI_U32 data_size; +} ST_CVI_WAV_HEADER; + + +typedef struct _AudioUnitTestCfg { + CVI_S32 channels; + CVI_S32 Time_in_second; + CVI_S32 sample_rate; + CVI_CHAR format[64]; //pcm/ g711//g726... + CVI_S32 period_size; + CVI_S32 bitdepth; + CVI_S32 unit_test; + CVI_S32 s32TestMode; + CVI_CHAR filename[256]; + CVI_BOOL bOptCfg; +} ST_AudioUnitTestCfg; + + +typedef struct _ST_CVIAUDIO_SPEEDPLAY_USR_CONFIG { + int sampleRate; + int channels; + float speed; + float pitch; + float rate; + float volume; +} ST_CVIAO_SPEEDPLAY_CONFIG; + +extern ST_AudioUnitTestCfg stAudTestCfg; +/* at least one parameter is illegal ,eg, an illegal enumeration value */ +#define CVI_ERR_AIO_ILLEGAL_PARAM 0xAA000001 +/* using a NULL point */ +#define CVI_ERR_AIO_NULL_PTR 0xAA000002 +/* operation is not supported by NOW */ +#define CVI_ERR_AIO_NOT_PERM 0xAA000003 +/* vqe err */ +#define CVI_ERR_AIO_REGISTER_ERR 0xAA000004 + +/* invalid device ID */ +#define CVI_ERR_AI_INVALID_DEVID 0xA0000005 +/* invalid channel ID */ +#define CVI_ERR_AI_INVALID_CHNID 0xA0000006 +/* at least one parameter is illegal ,eg, an illegal enumeration value */ +#define CVI_ERR_AI_ILLEGAL_PARAM 0xA0000001 +/* using a NULL point */ +#define CVI_ERR_AI_NULL_PTR 0xA0000002 +/* try to enable or initialize system,device or channel, before configing attribute */ +#define CVI_ERR_AI_NOT_CONFIG 0xA0000007 +/* operation is not supported by NOW */ +#define CVI_ERR_AI_NOT_SUPPORT 0xA0000008 +/* operation is not permitted ,eg, try to change stati attribute */ +#define CVI_ERR_AI_NOT_PERM 0xA0000003 +/* the devide is not enabled */ +#define CVI_ERR_AI_NOT_ENABLED 0xA0000009 +/* failure caused by malloc memory */ +#define CVI_ERR_AI_NOMEM 0xA000000A +/* failure caused by malloc buffer */ +#define CVI_ERR_AI_NOBUF 0xA000000B +/* no data in buffer */ +#define CVI_ERR_AI_BUF_EMPTY 0xA000000C +/* no buffer for new data */ +#define CVI_ERR_AI_BUF_FULL 0xA000000D +/* system is not ready,had not initialized or loaded*/ +#define CVI_ERR_AI_SYS_NOTREADY 0xA000000E + +#define CVI_ERR_AI_BUSY 0xA000000F +/* vqe err */ +#define CVI_ERR_AI_VQE_ERR 0xA0000010 +#define CVI_ERR_AI_VQE_BUF_FULL 0xA0000011 +#define CVI_ERR_AI_VQE_FILE_UNEXIST 0xA0000012 +/* invalid device ID */ +#define CVI_ERR_AO_INVALID_DEVID 0xA1000001 +/* invalid channel ID */ +#define CVI_ERR_AO_INVALID_CHNID 0xA1000002 +/* at least one parameter is illegal ,eg, an illegal enumeration value */ +#define CVI_ERR_AO_ILLEGAL_PARAM 0xA1000003 +/* using a NULL point */ +#define CVI_ERR_AO_NULL_PTR 0xA1000004 +/* try to enable or initialize system,device or channel, before configing attribute */ +#define CVI_ERR_AO_NOT_CONFIG 0xA1000005 +/* operation is not supported by NOW */ +#define CVI_ERR_AO_NOT_SUPPORT 0xA1000006 +/* operation is not permitted ,eg, try to change stati attribute */ +#define CVI_ERR_AO_NOT_PERM 0xA1000007 +/* the devide is not enabled */ +#define CVI_ERR_AO_NOT_ENABLED 0xA1000008 +/* failure caused by malloc memory */ +#define CVI_ERR_AO_NOMEM 0xA1000009 +/* failure caused by malloc buffer */ +#define CVI_ERR_AO_NOBUF 0xA100000A +/* no data in buffer */ +#define CVI_ERR_AO_BUF_EMPTY 0xA100000B +/* no buffer for new data */ +#define CVI_ERR_AO_BUF_FULL 0xA100000C +/* system is not ready,had not initialized or loaded*/ +#define CVI_ERR_AO_SYS_NOTREADY 0xA100000D + +#define CVI_ERR_AO_BUSY 0xA100000E +/* vqe err */ +#define CVI_ERR_AO_VQE_ERR 0xA100000F + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif /* End of #ifndef __CVI_COMM_AI_H__ */ + diff --git a/freertos/cvitek/task/audio/include/cvi_common.h b/freertos/cvitek/task/audio/include/cvi_common.h new file mode 100644 index 000000000..d71064b8a --- /dev/null +++ b/freertos/cvitek/task/audio/include/cvi_common.h @@ -0,0 +1,281 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_common.h + * Description: Common video definitions. + */ + +#ifndef __CVI_COMMON_H__ +#define __CVI_COMMON_H__ + +#include <string.h> + +#include "cvi_type.h" +#include "cvi_defines.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#ifndef VER_X +#define VER_X 1 +#endif + +#ifndef VER_Y +#define VER_Y 0 +#endif + +#ifndef VER_Z +#define VER_Z 0 +#endif + +#ifndef __FILENAME__ +#define __FILENAME__ (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__) +#endif + +#ifdef CVI_DEBUG +#define VER_D " Debug" +#else +#define VER_D " Release" +#endif + + +#define ATTRIBUTE __attribute__((aligned(ALIGN_NUM))) + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif + +#define STR_HELPER(x) #x +#define STR(x) STR_HELPER(x) +#define MK_VERSION(x, y, z) STR(x) "." STR(y) "." STR(z) + + + +typedef CVI_S32 AI_CHN; +typedef CVI_S32 AO_CHN; +typedef CVI_S32 AENC_CHN; +typedef CVI_S32 ADEC_CHN; +typedef CVI_S32 AUDIO_DEV; +typedef CVI_S32 VI_DEV; +typedef CVI_S32 VI_PIPE; +typedef CVI_S32 VI_CHN; +typedef CVI_S32 VO_DEV; +typedef CVI_S32 VO_LAYER; +typedef CVI_S32 VO_CHN; +typedef CVI_S32 GRAPHIC_LAYER; +typedef CVI_S32 VENC_CHN; +typedef CVI_S32 VDEC_CHN; +typedef CVI_S32 ISP_DEV; +typedef CVI_S32 SENSOR_ID; +typedef CVI_S32 MIPI_DEV; +typedef CVI_S32 SLAVE_DEV; +typedef CVI_S32 VPSS_GRP; +typedef CVI_S32 VPSS_CHN; + +#define CVI_INVALID_CHN (-1) +#define CVI_INVALID_LAYER (-1) +#define CVI_INVALID_DEV (-1) +#define CVI_INVALID_HANDLE (-1) +#define CVI_INVALID_VALUE (-1) +#define CVI_INVALID_TYPE (-1) + + +#define CCM_MATRIX_SIZE (9) +#define CCM_MATRIX_NUM (7) + + +#define FOREACH_MOD(MOD) {\ + MOD(BASE) \ + MOD(VB) \ + MOD(SYS) \ + MOD(RGN) \ + MOD(CHNL) \ + MOD(VDEC) \ + MOD(VPSS) \ + MOD(VENC) \ + MOD(H264E) \ + MOD(JPEGE) \ + MOD(MPEG4E) \ + MOD(H265E) \ + MOD(JPEGD) \ + MOD(VO) \ + MOD(VI) \ + MOD(DIS) \ + MOD(RC) \ + MOD(AIO) \ + MOD(AI) \ + MOD(AO) \ + MOD(AENC) \ + MOD(ADEC) \ + MOD(AUD) \ + MOD(VPU) \ + MOD(ISP) \ + MOD(IVE) \ + MOD(USER) \ + MOD(PROC) \ + MOD(LOG) \ + MOD(H264D) \ + MOD(GDC) \ + MOD(PHOTO) \ + MOD(FB) \ + MOD(BUTT) \ +} + +#define GENERATE_ENUM(ENUM) CVI_ID_ ## ENUM, + +typedef enum _MOD_ID_E FOREACH_MOD(GENERATE_ENUM) MOD_ID_E; + +typedef struct _MMF_CHN_S { + MOD_ID_E enModId; + CVI_S32 s32DevId; + CVI_S32 s32ChnId; +} MMF_CHN_S; + + +/* We just copy this value of payload type from RTP/RTSP definition */ +typedef enum { + PT_PCMU = 0, + PT_1016 = 1, + PT_G721 = 2, + PT_GSM = 3, + PT_G723 = 4, + PT_DVI4_8K = 5, + PT_DVI4_16K = 6, + PT_LPC = 7, + PT_PCMA = 8, + PT_G722 = 9, + PT_S16BE_STEREO = 10, + PT_S16BE_MONO = 11, + PT_QCELP = 12, + PT_CN = 13, + PT_MPEGAUDIO = 14, + PT_G728 = 15, + PT_DVI4_3 = 16, + PT_DVI4_4 = 17, + PT_G729 = 18, + PT_G711A = 19, + PT_G711U = 20, + PT_G726 = 21, + PT_G729A = 22, + PT_LPCM = 23, + PT_CelB = 25, + PT_JPEG = 26, + PT_CUSM = 27, + PT_NV = 28, + PT_PICW = 29, + PT_CPV = 30, + PT_H261 = 31, + PT_MPEGVIDEO = 32, + PT_MPEG2TS = 33, + PT_H263 = 34, + PT_SPEG = 35, + PT_MPEG2VIDEO = 36, + PT_AAC = 37, + PT_WMA9STD = 38, + PT_HEAAC = 39, + PT_PCM_VOICE = 40, + PT_PCM_AUDIO = 41, + PT_MP3 = 43, + PT_ADPCMA = 49, + PT_AEC = 50, + PT_X_LD = 95, + PT_H264 = 96, + PT_D_GSM_HR = 200, + PT_D_GSM_EFR = 201, + PT_D_L8 = 202, + PT_D_RED = 203, + PT_D_VDVI = 204, + PT_D_BT656 = 220, + PT_D_H263_1998 = 221, + PT_D_MP1S = 222, + PT_D_MP2P = 223, + PT_D_BMPEG = 224, + PT_MP4VIDEO = 230, + PT_MP4AUDIO = 237, + PT_VC1 = 238, + PT_JVC_ASF = 255, + PT_D_AVI = 256, + PT_DIVX3 = 257, + PT_AVS = 258, + PT_REAL8 = 259, + PT_REAL9 = 260, + PT_VP6 = 261, + PT_VP6F = 262, + PT_VP6A = 263, + PT_SORENSON = 264, + PT_H265 = 265, + PT_VP8 = 266, + PT_MVC = 267, + PT_PNG = 268, + /* add by ourselves */ + PT_AMR = 1001, + PT_MJPEG = 1002, + PT_BUTT +} PAYLOAD_TYPE_E; + +#define VERSION_NAME_MAXLEN 128 +typedef struct _MMF_VERSION_S { + char version[VERSION_NAME_MAXLEN]; +} MMF_VERSION_S; + +typedef enum { + GPIO_GRPA, + GPIO_GRPB, + GPIO_GRPC, + GPIO_GRPD, + GPIO_GRPE, + GPIO_GRO_BUFF +} GPIO_GRP_E; + +typedef enum { + GPIO_INDEX_0, + GPIO_INDEX_1, + GPIO_INDEX_2, + GPIO_INDEX_3, + GPIO_INDEX_4, + GPIO_INDEX_5, + GPIO_INDEX_6, + GPIO_INDEX_7, + GPIO_INDEX_8, + GPIO_INDEX_9, + GPIO_INDEX_10, + GPIO_INDEX_11, + GPIO_INDEX_12, + GPIO_INDEX_13, + GPIO_INDEX_14, + GPIO_INDEX_15, + GPIO_INDEX_16, + GPIO_INDEX_17, + GPIO_INDEX_18, + GPIO_INDEX_19, + GPIO_INDEX_20, + GPIO_INDEX_21, + GPIO_INDEX_22, + GPIO_INDEX_23, + GPIO_INDEX_24, + GPIO_INDEX_25, + GPIO_INDEX_26, + GPIO_INDEX_27, + GPIO_INDEX_28, + GPIO_INDEX_29, + GPIO_INDEX_30, + GPIO_INDEX_31, + GPIO_INDEX_BUFF +} GPIO_INDEX_E; + +typedef enum { + GPIO_ACTIVE_LOW, + GPIO_ACTIVE_HIGH, + GPIO_ACTIVE_BUFF +} GPIO_ACTIVE_E; + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_COMMON_H__ */ diff --git a/freertos/cvitek/task/audio/include/cvi_defines.h b/freertos/cvitek/task/audio/include/cvi_defines.h new file mode 100644 index 000000000..edefab206 --- /dev/null +++ b/freertos/cvitek/task/audio/include/cvi_defines.h @@ -0,0 +1,350 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_defines.h + * Description: + * The common definitions per chip capability. + */ + /****************************************************************************** */ + +#ifndef __CVI_DEFINES_H__ +#define __CVI_DEFINES_H__ + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +#define CVI_CHIP_TEST 0x0 + +#ifndef CVI_CHIP_NAME +#define CVI_CHIP_NAME "CV1822" +#endif + +#define CVI1835 0x1 +#define CVI1832 0x2 +#define CVI1838 0x3 +#define CVI1822 0x4 +#define CVI1829 0x5 +#define CVI1826 0x6 +#define CVI1821 0x7 +#define CVI1820 0x8 +#define CVI1823 0x9 +#define CVI1825 0xA + +#define CVIU01 0x1 +#define CVIU02 0x2 + +#define CVI_COLDBOOT 0x1 +#define CVI_WDTBOOT 0x2 +#define CVI_SUSPENDBOOT 0x3 +#define CVI_WARMBOOT 0x4 + +#define IS_CHIP_CV183X(x) (((x) == CVI1829) || ((x) == CVI1832) || ((x) == CVI1835) || ((x) == CVI1838)) +#define IS_CHIP_CV182X(x) (((x) == CVI1820) || ((x) == CVI1821) || ((x) == CVI1822) \ + || ((x) == CVI1823) || ((x) == CVI1825) || ((x) == CVI1826)) + +#define MMF_VER_PRIX "_MMF_V" + +#define ALIGN_NUM 4 + +#define LUMA_PHY_ALIGN 16 + +#define DEFAULT_ALIGN 64 +#define MAX_ALIGN 1024 +#define SEG_CMP_LENGTH 256 + +/* For VENC */ +#define VENC_MAX_NAME_LEN 16 +#define VENC_MAX_CHN_NUM 64 +#define VEDU_IP_NUM 1 +#define H264E_MAX_WIDTH 4096 +#define H264E_MAX_HEIGHT 4096 +#define H264E_MIN_WIDTH 114 +#define H264E_MIN_HEIGHT 114 +#define H265E_MAX_WIDTH 4096 +#define H265E_MAX_HEIGHT 4096 +#define H265E_MIN_WIDTH 114 +#define H265E_MIN_HEIGHT 114 +#define JPEGE_MAX_WIDTH 8192 +#define JPEGE_MAX_HEIGHT 8192 +#define JPEGE_MIN_WIDTH 32 +#define JPEGE_MIN_HEIGHT 32 +#define JPGE_MAX_NUM 1 +#define VENC_MAX_ROI_NUM 8 +#define H264E_MIN_HW_INDEX 0 +#define H264E_MAX_HW_INDEX 11 +#define H264E_MIN_VW_INDEX 0 +#define H264E_MAX_VW_INDEX 3 +#define VENC_QP_HISGRM_NUM 52 +#define MAX_TILE_NUM 1 +#define H265E_ADAPTIVE_FRAME_TYPE 4 +#define H265E_ADAPTIVE_QP_TYPE 5 + +#define VENC_MIN_INPUT_FRAME_RATE 1 +#define VENC_MAX_INPUT_FRAME_RATE 240 + +#define VENC_MAX_RECEIVE_SOURCE 4 + +#define VENC_PIC_RECEIVE_SOURCE0 0 +#define VENC_PIC_RECEIVE_SOURCE1 1 +#define VENC_PIC_RECEIVE_SOURCE2 2 +#define VENC_PIC_RECEIVE_SOURCE3 3 + +#define VENC_ALIGN_W 32 +#define VENC_ALIGN_H 16 + +/* For RC */ +#define RC_TEXTURE_THR_SIZE 16 +#define MIN_BITRATE 2 +#define MAX_BITRATE (100*1024) + +/* For VDEC */ +#define VDEC_MAX_CHN_NUM 64 +#define VDH_MAX_CHN_NUM 0 +#define VEDU_CHN_START VDH_MAX_CHN_NUM +#define VEDU_H264D_ERRRATE 10 +#define VEDU_H264D_FULLERR 100 + +#define H264D_ALIGN_W 64 +#define H264D_ALIGN_H 64 +#define H265D_ALIGN_W 64 +#define H265D_ALIGN_H 64 +#define JPEGD_ALIGN_W 64 +#define JPEGD_ALIGN_H 16 +#define JPEGD_RGB_ALIGN 16 + +#define H264D_ALIGN_FRM 0x1000 +#define H265D_ALIGN_FRM 0x1000 +#define JPEGD_ALIGN_FRM 0x1000 + +#define H264D_MAX_SPS 32 +#define H264D_MIN_SPS 1 +#define H264D_MAX_PPS 256 +#define H264D_MIN_PPS 1 +#define H264D_MAX_SLICE 300 +#define H264D_MIN_SLICE 1 + +#define H265D_MAX_VPS 16 +#define H265D_MIN_VPS 1 +#define H265D_MAX_SPS 16 +#define H265D_MIN_SPS 1 +#define H265D_MAX_PPS 64 +#define H265D_MIN_PPS 1 +#define H265D_MAX_SLICE 200 +#define H265D_MIN_SLICE 1 + +#define VEDU_H264D_MAX_WIDTH 2880 +#define VEDU_H264D_MAX_HEIGHT 1920 +#define VEDU_H264D_MIN_WIDTH 114 +#define VEDU_H264D_MIN_HEIGHT 114 + +#define VEDU_H265D_MAX_WIDTH 2880 +#define VEDU_H265D_MAX_HEIGHT 1920 +#define VEDU_H265D_MIN_WIDTH 114 +#define VEDU_H265D_MIN_HEIGHT 114 + +#define JPEGD_IP_NUM 1 +#define JPEGD_MAX_WIDTH 2880 +#define JPEGD_MAX_HEIGHT 1920 +#define JPEGD_MIN_WIDTH 8 +#define JPEGD_MIN_HEIGHT 8 + +/* For Region */ +#define RGN_MIN_WIDTH 2 +#define RGN_MIN_HEIGHT 2 + +#define RGN_COVER_MIN_X -8192 +#define RGN_COVER_MIN_Y -8192 +#define RGN_COVER_MAX_X 8190 +#define RGN_COVER_MAX_Y 8190 +#define RGN_COVER_MAX_WIDTH 8192 +#define RGN_COVER_MAX_HEIGHT 8192 + +#define RGN_COVEREX_MIN_X -8192 +#define RGN_COVEREX_MIN_Y -8192 +#define RGN_COVEREX_MAX_X 8190 +#define RGN_COVEREX_MAX_Y 8190 +#define RGN_COVEREX_MAX_WIDTH 8192 +#define RGN_COVEREX_MAX_HEIGHT 8192 + +#define RGN_OVERLAY_MIN_X 0 +#define RGN_OVERLAY_MIN_Y 0 +#define RGN_OVERLAY_MAX_X 8190 +#define RGN_OVERLAY_MAX_Y 8190 +#define RGN_OVERLAY_MAX_WIDTH 8192 +#define RGN_OVERLAY_MAX_HEIGHT 8192 + +#define RGN_OVERLAYEX_MIN_X 0 +#define RGN_OVERLAYEX_MIN_Y 0 +#define RGN_OVERLAYEX_MAX_X 8190 +#define RGN_OVERLAYEX_MAX_Y 8190 +#define RGN_OVERLAYEX_MAX_WIDTH 8192 +#define RGN_OVERLAYEX_MAX_HEIGHT 8192 + +#define RGN_MOSAIC_X_ALIGN 4 +#define RGN_MOSAIC_Y_ALIGN 2 +#define RGN_MOSAIC_WIDTH_ALIGN 4 +#define RGN_MOSAIC_HEIGHT_ALIGN 4 + +#define RGN_MOSAIC_MIN_X 0 +#define RGN_MOSAIC_MIN_Y 0 +#define RGN_MOSAIC_MAX_X 8190 +#define RGN_MOSAIC_MAX_Y 8190 +#define RGN_MOSAIC_MIN_WIDTH 32 +#define RGN_MOSAIC_MIN_HEIGHT 32 +#define RGN_MOSAIC_MAX_WIDTH 8192 +#define RGN_MOSAIC_MAX_HEIGHT 8192 + +#define RGN_MAX_BUF_NUM 2 + +#define RGN_MAX_NUM_VPSS 8 +#define RGN_MAX_NUM_VO 8 +#define RGN_EX_MAX_NUM_VPSS 32 +#define RGN_EX_MAX_WIDTH 2304 + +#define RGN_MAX_NUM 100 + +/*************************************/ +#define VENC_MAX_SSE_NUM 8 +#define CVI_MAX_SENSOR_NUM 2 + +/* For VI */ +/* number of channel and device on video input unit of chip + * Note! VI_MAX_CHN_NUM is NOT equal to VI_MAX_DEV_NUM + * multiplied by VI_MAX_CHN_NUM, because all VI devices + * can't work at mode of 4 channels at the same time. + */ +#define VI_MAX_DEV_NUM 3 +#define VI_MAX_PHY_PIPE_NUM 4 +#define VI_MAX_VIR_PIPE_NUM 0 +#define VI_MAX_PIPE_NUM (VI_MAX_PHY_PIPE_NUM + VI_MAX_VIR_PIPE_NUM) +#define VI_MAX_WDR_NUM 1 + +#define VI_MAX_VIR_CHN_NUM 2 +#define VI_MAX_PHY_CHN_NUM 2 +#define VI_MAX_EXT_CHN_NUM 2 +#define VI_MAX_CHN_NUM (VI_MAX_PHY_CHN_NUM + VI_MAX_VIR_CHN_NUM) +#define VI_EXT_CHN_START VI_MAX_CHN_NUM +#define VI_MAX_EXTCHN_BIND_PER_CHN 1 + +#define VI_MAX_WDR_FRAME_NUM 2 +#define VI_MAX_NODE_NUM 3 +#define VIPROC_IP_NUM 1 +#define VICAP_IP_NUM 1 + +#define VI_MAX_SPLIT_NODE_NUM 3 + +#define VI_DEV_MIN_WIDTH 120 +#define VI_DEV_MIN_HEIGHT 120 +#define VI_DEV_MAX_WIDTH 4608 +#define VI_DEV_MAX_HEIGHT 4608 +#define VI_FPN_MAX_WIDTH 4096 +#define VI_FPN_MAX_HEIGHT VI_DEV_MAX_HEIGHT + +#define VI_PIPE_OFFLINE_MIN_WIDTH 120 +#define VI_PIPE_OFFLINE_MIN_HEIGHT 120 +#define VI_PIPE_OFFLINE_MAX_WIDTH 4096 +#define VI_PIPE_OFFLINE_MAX_HEIGHT 2160 + +#define VI_PIPE_ONLINE_MIN_WIDTH 120 +#define VI_PIPE_ONLINE_MIN_HEIGHT 120 +#define VI_PIPE_ONLINE_MAX_WIDTH 2688 +#define VI_PIPE_ONLINE_MAX_HEIGHT 1944 + +#define VI_PIPE0_MAX_WIDTH 4096 +#define VI_PIPE0_MAX_HEIGHT 2160 +#define VI_PIPE1_MAX_WIDTH 4096 +#define VI_PIPE1_MAX_HEIGHT 2160 +#define VI_PIPE2_MAX_WIDTH 2688 +#define VI_PIPE2_MAX_HEIGHT 1944 +#define VI_PIPE3_MAX_WIDTH 2688 +#define VI_PIPE3_MAX_HEIGHT 1944 + +#define VI_PIPE_WDR_FIRST_MAX_WIDTH VI_PIPE1_MAX_WIDTH +#define VI_PIPE_FUSION_MAX_WIDTH 2688 +#define VI_PIPE_FUSION_MAX_HEIGHT 1944 + +#define VI_PHYCHN_OFFLINE_MIN_WIDTH 120 +#define VI_PHYCHN_OFFLINE_MIN_HEIGHT 120 +#define VI_PHYCHN_OFFLINE_MAX_WIDTH 4608 +#define VI_PHYCHN_OFFLINE_MAX_HEIGHT 4608 + +#define VI_PHYCHN_ONLINE_MIN_WIDTH 120 +#define VI_PHYCHN_ONLINE_MIN_HEIGHT 120 +#define VI_PHYCHN_ONLINE_MAX_WIDTH 2048 +#define VI_PHYCHN_ONLINE_MAX_HEIGHT 4608 + +#define VI_CMP_PARAM_SIZE 152 + +#define VI_PIXEL_FORMAT PIXEL_FORMAT_NV21 + +#define CVI_VI_VPSS_EXTRA_BUF 0 + +#define CVI_VI_CHN_0_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_CHN_1_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_CHN_2_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_CHN_3_BUF (2 + CVI_VI_VPSS_EXTRA_BUF) +#define CVI_VI_BUF (CVI_VI_CHN_0_BUF + CVI_VI_CHN_1_BUF + CVI_VI_CHN_2_BUF + CVI_VI_CHN_3_BUF) + +/* For VO */ +#define VO_MIN_CHN_WIDTH 32 /* channel minimal width */ +#define VO_MIN_CHN_HEIGHT 32 /* channel minimal height */ +#define VO_MAX_DEV_NUM 1 /* max dev num */ +#define VO_MAX_LAYER_NUM 1 /* max layer num */ +#define VO_MAX_PRIORITY 1 /* max layer priority */ +#define VO_MAX_CHN_NUM 1 /* max chn num */ +#define VO_MAX_LAYER_IN_DEV 1 /* max layer num of each dev */ +#define VO_MAX_GRAPHICS_LAYER_NUM 1 +#define VO_MIN_TOLERATE 1 /* min play toleration 1ms */ +#define VO_MAX_TOLERATE 100000 /* max play toleration 100s */ + +/* For AUDIO */ +#define AI_DEV_MAX_NUM 1 +#define AO_DEV_MIN_NUM 0 +#define AO_DEV_MAX_NUM 2 +#define AIO_MAX_NUM 2 +#define AENC_MAX_CHN_NUM 2 +#define ADEC_MAX_CHN_NUM 2 + +#define AI_MAX_CHN_NUM 2 +#define AO_MAX_CHN_NUM 1 +#define AO_SYSCHN_CHNID (AO_MAX_CHN_NUM - 1) + +#define AIO_MAX_CHN_NUM ((AO_MAX_CHN_NUM > AI_MAX_CHN_NUM) ? AO_MAX_CHN_NUM:AI_MAX_CHN_NUM) + +/* For VPSS */ +#define VPSS_IP_NUM 2 +#define VPSS_DEV_0 0 +#define VPSS_DEV_1 1 +#define VPSS_MAX_GRP_NUM 16 +#define VPSS_ONLINE_GRP_0 0 +#define VPSS_ONLINE_GRP_1 1 +#define VPSS_MAX_PHY_CHN_NUM 3 +#define VPSS_MAX_CHN_NUM (VPSS_MAX_PHY_CHN_NUM) +#define VPSS_MIN_IMAGE_WIDTH 32 +#define VPSS_MAX_IMAGE_WIDTH 4608 +#define VPSS_MAX_IMAGE_HEIGHT 4096 +#define VPSS_MAX_ZOOMIN 32 +#define VPSS_MAX_ZOOMOUT 32 + +/*For Gdc*/ +#define LDC_MIN_IMAGE_WIDTH 640 +#define LDC_MIN_IMAGE_HEIGHT 480 + +#define SPREAD_MIN_IMAGE_WIDTH 640 +#define SPREAD_MIN_IMAGE_HEIGHT 480 + +/* For GDC */ +#define GDC_IP_NUM 1 +#define GDC_PROC_JOB_INFO_NUM (500) + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_DEFINES_H__ */ + diff --git a/freertos/cvitek/task/audio/include/cvi_type.h b/freertos/cvitek/task/audio/include/cvi_type.h new file mode 100644 index 000000000..98f7793f8 --- /dev/null +++ b/freertos/cvitek/task/audio/include/cvi_type.h @@ -0,0 +1,69 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_type.h + * Description: + */ + +#ifndef __CVI_TYPE_H__ +#define __CVI_TYPE_H__ + +#include <stdbool.h> +#include <stdint.h> +#include <stddef.h> + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +/*---------------------------------------------- + * The common data type + *---------------------------------------------- + */ + +typedef unsigned char CVI_UCHAR; +typedef unsigned char CVI_U8; +typedef unsigned short CVI_U16; +typedef unsigned int CVI_U32; +typedef unsigned int CVI_HANDLE; + +typedef signed char CVI_S8; +typedef char CVI_CHAR; +typedef short CVI_S16; +typedef int CVI_S32; + +typedef unsigned long CVI_UL; +typedef signed long CVI_SL; + +typedef float CVI_FLOAT; +typedef double CVI_DOUBLE; + +typedef void CVI_VOID; +typedef bool CVI_BOOL; + +typedef uint64_t CVI_U64; +typedef int64_t CVI_S64; + +typedef size_t CVI_SIZE_T; + +/*---------------------------------------------- + * const defination + *---------------------------------------------- + */ + +#define CVI_NULL 0L +#define CVI_SUCCESS 0 +#define CVI_FAILURE (-1) +#define CVI_FAILURE_ILLEGAL_PARAM (-2) +#define CVI_TRUE 1 +#define CVI_FALSE 0 + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVI_TYPE_H__ */ diff --git a/freertos/cvitek/task/audio/include/cviaudio_algo_interface.h b/freertos/cvitek/task/audio/include/cviaudio_algo_interface.h new file mode 100644 index 000000000..b0775c629 --- /dev/null +++ b/freertos/cvitek/task/audio/include/cviaudio_algo_interface.h @@ -0,0 +1,16 @@ +/* Include files */ +#ifndef __CVIAUDIO_ALGO_INTERFACE__ +#define __CVIAUDIO_ALGO_INTERFACE__ +#include <stdio.h> +void *CviAud_Algo_Init(int s32FunctMask, void *param_info); +int CviAud_Algo_Process(void *pHandle, uint64_t mic_in, + uint64_t ref_in, uint64_t out, int iLength); +void CviAud_Algo_DeInit(void *pHandle); +void CviAud_Algo_GetVersion(char *pstrVersion); +#ifdef NEXT_SSP_ALGO +void CviAud_SpkAlgo_DeInit(void *pHandle); +int CviAud_SpkAlgo_Process(void *pHandle, short *spk_in, + short *spk_out, int iLength); +void *CviAud_SpkAlgo_Init(int s32FunctMask, void *param_info); +#endif +#endif diff --git a/freertos/cvitek/task/audio/include/cviaudio_rtos_align.h b/freertos/cvitek/task/audio/include/cviaudio_rtos_align.h new file mode 100644 index 000000000..41e0bf3b4 --- /dev/null +++ b/freertos/cvitek/task/audio/include/cviaudio_rtos_align.h @@ -0,0 +1,91 @@ +#ifndef __CVIAUDIO_KERNEL_ALIGN_H__ +#define __CVIAUDIO_KERNEL_ALIGN_H__ +#ifdef __cplusplus +extern "C" { +#endif +#include <stdio.h> +#include "cvi_comm_aio.h" + + +#ifndef CVIAUDIO_BYTES_ALIGNMENT +#define CVIAUDIO_BYTES_ALIGNMENT 64 +#endif + +#ifndef CVIAUDIO_ALIGN +#define CVIAUDIO_ALIGN(x, a) (((x) + ((a)-1)) & ~((a)-1)) +#endif + +#define ATTR __attribute__ + +#ifndef __packed +#define __packed ATTR((packed)) +#endif + +#ifndef __aligned +#define __aligned(x) ATTR((aligned(x))) +#endif + +typedef struct _AI_AEC_CONFIG_S_RTOS AI_AEC_CONFIG_S_RTOS; +struct _AI_AEC_CONFIG_S_RTOS { + CVI_U8 para_aec_filter_len; + CVI_U8 para_aes_std_thrd; /* the threshold of STD/DTD, [0, 35] */ + CVI_U8 para_aes_supp_coeff; /* the residual echo suppression level in AES, [0, 24] */ +} __packed __aligned(0x4); + +typedef struct _AUDIO_DELAY_CONFIG_S_RTOS AUDIO_DELAY_CONFIG_S_RTOS; +struct _AUDIO_DELAY_CONFIG_S_RTOS { + /* the initial filter length of linear AEC to support up for echo tail, [1, 13] */ + CVI_U8 para_aec_init_filter_len; + /* the digital gain target, [1, 12] */ + CVI_U8 para_dg_target; + /* the delay sample for ref signal, [1, 3000] */ + CVI_U8 para_delay_sample; +} __packed __aligned(0x4); + +typedef struct _AUDIO_AGC_CONFIG_S_RTOS AUDIO_AGC_CONFIG_S_RTOS; +struct _AUDIO_AGC_CONFIG_S_RTOS { + /* the max boost gain for AGC release processing, [0, 3] */ + /* para_obj.para_agc_max_gain = 1; */ + CVI_U8 para_agc_max_gain; + /* the gain level of target high of AGC, [0, 36] */ + /* para_obj.para_agc_target_high = 2; */ + CVI_U8 para_agc_target_high; + /* the gain level of target low of AGC, [0, 36] */ + /* para_obj.para_agc_target_low = 6; */ + CVI_U8 para_agc_target_low; + /* speech-activated AGC functionality, [0, 1] */ + /* para_obj.para_agc_vad_enable = 1; */ + CVI_U8 para_agc_vad_ena; +} __packed __aligned(0x4); + +typedef struct _AUDIO_ANR_CONFIG_S_RTOS AUDIO_ANR_CONFIG_S_RTOS; +struct _AUDIO_ANR_CONFIG_S_RTOS { + /* the coefficient of NR priori SNR tracking, [0, 20] */ + /* para_obj.para_nr_snr_coeff = 15; */ + CVI_U8 para_nr_snr_coeff; + /* the coefficient of NR noise tracking, [0, 14] */ + /* para_obj.para_nr_noise_coeff = 2; */ + //CVI_S8 para_nr_noise_coeff; + CVI_U8 para_nr_init_sile_time; +} __packed __aligned(0x4); + +typedef struct _AI_TALKVQE_CONFIG_S_RTOS AI_TALKVQE_CONFIG_S_RTOS; +struct _AI_TALKVQE_CONFIG_S_RTOS { + CVI_U8 para_client_config; + CVI_U8 u32OpenMask; + CVI_U16 s32WorkSampleRate; + /* Sample Rate: 8KHz/16KHz. default: 8KHz*/ + //MIC IN VQE setting + AI_AEC_CONFIG_S_RTOS stAecCfg; + AUDIO_ANR_CONFIG_S_RTOS stAnrCfg; + AUDIO_AGC_CONFIG_S_RTOS stAgcCfg; + AUDIO_DELAY_CONFIG_S_RTOS stAecDelayCfg; + CVI_U8 s32RevMask;//turn this flag to default 0x11 + CVI_U8 para_notch_freq;//user can ignore this flag + CVI_U8 customize[8]; +} __packed __aligned(0x4); + +#ifdef __cplusplus +} +#endif +#endif diff --git a/freertos/cvitek/task/audio/include/cviaudio_rtos_cmd.h b/freertos/cvitek/task/audio/include/cviaudio_rtos_cmd.h new file mode 100644 index 000000000..d437252c4 --- /dev/null +++ b/freertos/cvitek/task/audio/include/cviaudio_rtos_cmd.h @@ -0,0 +1,177 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cviaudio_rtos_cmd.h + * Description: + */ + +#ifndef __CVIAUDIO_RTOS_CMD_H__ +#define __CVIAUDIO_RTOS_CMD_H__ + +#include <stdbool.h> +#include <stddef.h> +//#include <stdint.h> +#include "cvi_comm_aio.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +/*---------------------------------------------- + * The common data type + *---------------------------------------------- + */ +#define CVIAUDIO_SSP_CHUNK_NUMBERS 25 +#define CVIAUDIO_SSP_SINGLE_CHUNK_SIZE_BYTES (160*2) //1 chunk = 160 samples +#define CVIAUDIO_SSP_SINGLE_CHUNK_SAMPLES (160) +#define CVIAUDIO_MAX_BUFFER_SIZE ((320)*(CVIAUDIO_SSP_CHUNK_NUMBERS)) +//4000bytes 0.5 sec for 8k, 0.25 sec for 16k +typedef struct _st_ssp_buffer_table { + unsigned char bBufOccupy; + uint64_t mic_in_addr;//save the phy address + uint64_t ref_in_addr; + uint64_t output_addr; +} ST_SSP_BUFTBL; +//data struct for CVIAUDIO_RTOS_CMD_SSP_INIT +typedef struct _ssp_rots_init { + //AI_TALKVQE_CONFIG_S stAinVqeConfig; + CVI_S32 s32RevMask; + uint32_t CbPhyAddr; + ST_SSP_BUFTBL buffertbl[CVIAUDIO_SSP_CHUNK_NUMBERS]; + char *pmic_in_vir; + char *pref_in_vir; + char *poutput_vir; + char *CbVirAddr; +} ST_SSP_RTOS_INIT; + +typedef struct _ssp_mic_vqe_addr { + uint64_t AinVqeCfgPhy; + AI_TALKVQE_CONFIG_S *pAinVqeCfg; +} ST_SSP_MIC_VQE_ADDR; + +typedef struct _ssp_mic_buf_table_addr { + uint64_t buffertblPhy; + uint64_t mic_in_phy; + uint64_t ref_in_phy; + uint64_t output_phy; + ST_SSP_BUFTBL *pbuffertbl;//buffertbl[CVIAUDIO_SSP_CHUNK_NUMBERS]; + char *pmic_in_vir; + char *pref_in_vir; + char *poutput_vir; +} ST_SSP_MIC_BUF_TABLE_ADDR; + +typedef struct _ssp_rtos_indicator { + unsigned char chunks_number; + unsigned char Wpt_index;//for input pcm original pcm data + unsigned char Rpt_index;//for user space copy to user + unsigned char Ppt_index;//for RTOS process data + unsigned char channel_nums; + unsigned char ssp_on; + unsigned char ssp_with_aec; + unsigned char reserved_bytes[3];//3 bytes reserve, force 64bytes alignment + unsigned int msg_counter; +} ST_SSP_RTOS_INDICATOR; +typedef struct _ssp_rtos_indicator_addr { + uint64_t indicatorPhy; + ST_SSP_RTOS_INDICATOR *pindicator; +} ST_SSP_RTOS_INDICATOR_ADDR; +typedef struct _st_cviaduio_mailbox { + uint64_t u64RevMask; + uint64_t AinVqeCfgPhy; + uint64_t buffertblPhy; + uint64_t indicatorPhy; +} ST_CVIAUDIO_MAILBOX; + +//for block mode command from user space ---- start +typedef struct _st_cviaudio_mailbox_block { + uint64_t u64RevMask; + uint64_t AinVqeCfgPhy; +} ST_CVIAUDIO_MAILBOX_BLOCK; + +typedef struct _st_civaudio_block_frame { + uint64_t u64RevMask; + uint64_t mic_in_addr; + uint64_t ref_in_addr; + uint64_t output_addr; +} ST_CVIAUDIO_BLOCK_FRAME; +//for block mode command from user space ---- end + +typedef struct _st_spk_ssp_buffer_table { + unsigned char bBufOccupy; + size_t spk_in_addr; + size_t spk_out_addr; +} ST_SPK_SSP_BUFTBL; +//data struct for CVIAUDIO_RTOS_CMD_SSP_SPK_INIT +typedef struct _ssp_spk_rtos_init { + AO_VQE_CONFIG_S stAoutVqeConfig; + ST_SPK_SSP_BUFTBL spkbuffertbl[CVIAUDIO_SSP_CHUNK_NUMBERS]; +} ST_SPK_SSP_RTOS_INIT; + +//data struct for CVIAUDIO_RTOS_CMD_SSP_SPK_PROCESS +typedef struct _spk_ssp_data_rtos { + unsigned char chunks_number; + unsigned char wpt_index; + unsigned char channel_nums; + unsigned int msg_spk_counter; +} ST_SSP_RTOS_SPK_DATA; + +typedef struct _ssp_spk_data_rtos_ret { + unsigned char status; + unsigned int cb_command; +} ST_SSP_RTOS_SPK_DATA_RET; + + +/*---------------------------------------------- + * definition of cmd + *---------------------------------------------- + */ +/*define for the magic word noted for transmittion between kernel and rtos */ +#define CVIAUDIO_RTOS_MAGIC_WORD_UNIT_TEST_MODE 0x38 +#define CVIAUDIO_RTOS_MAGIC_WORD_KERNEL_BIND_MODE 0x99 +#define CVIAUDIO_RTOS_MAGIC_WORD_USERSPACE_BLOCK_MODE 0xbb +#define CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG 0xfa +#define CVIAUDIO_RTOS_TRIGGER_THRESHOLD 3 +#define CVAUDIO_AUDIO_ION_SIZE_REQUIRE 0x1000 +#ifndef CVIAUDIO_BYTES_ALIGNMENT +#define CVIAUDIO_BYTES_ALIGNMENT 64 +#endif +#ifndef CVIAUDIO_ALIGN +#define CVIAUDIO_ALIGN(x, a) (((x) + ((a)-1)) & ~((a)-1)) +#endif +#define CVIAUDIO_BUF_TBL_UNOCCUPIED 0 +#define CVIAUDIO_BUF_TBL_INPUT 1 +#define CVIAUDIO_BUF_TBL_AFTER_SSP 2 + +/*define the audio SSP CMD---------------start*/ +#define CVIAUDIO_RTOS_CMD_SSP_INIT 0x01 +#define CVIAUDIO_RTOS_CMD_SSP_DEINIT 0x02 +#define CVIAUDIO_RTOS_CMD_SSP_PROCESS 0x03 +#define CVIAUDIO_RTOS_CMD_SSP_SPK_INIT 0x04 +#define CVIAUDIO_RTOS_CMD_SSP_SPK_DEINIT 0x05 +#define CVIAUDIO_RTOS_CMD_SSP_SPK_PROCESS 0x06 +#define CVIAUDIO_RTOS_CMD_SSP_DEBUG 0x07 +#define CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST 0x08 +#define CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST_BLOCK_MODE_INIT 0x09 +#define CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST_BLOCK_MODE_GET 0x0A +#define CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK 0x0B +#define CVIAUDIO_RTOS_CMD_SSP_PROC_BLOCK 0x0C +#define CVIAUDIO_RTOS_CMD_SSP_DEINIT_BLOCK 0x0D + +#define CVIAUDIO_RTOS_CMD_SSP_MAX 0xFF + + +#define CVIAUDIO_CMD_STATUS_RECEIVE 0x10 +#define CVIAUDIO_CMD_STATUS_OPERATE 0x20 +#define CVIAUDIO_CMD_STATUS_FINISHED 0x40 +#define CVIAUDIO_CMD_STATUS_ERROR 0x80 + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVIAUDIO_RTOS_CMD_H__ */ diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/abs.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/abs.c new file mode 100755 index 000000000..db44cff50 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/abs.c @@ -0,0 +1,17 @@ + +/* Include files */ +#include "mmse.h" +#include "abs.h" +#include "power.h" +#include "mmse_rtwutil.h" + +/* Function Definitions */ +void a_abs(const creal32_T a[321], float y[321], int N) +{ + int k; + for (k = 0; k < N; k++) { + y[k] = rt_hypotf(a[k].re, a[k].im); + } +} + + diff --git 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a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.c new file mode 100755 index 000000000..d054ad7a7 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.c @@ -0,0 +1,183 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ +/*% */ +/*% agc.c */ +/*% Author: Sharon Lee */ +/*% History: */ +/*% Created by Sharon Lee in October, 2019 */ +/*% */ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + +/* Include files */ +#include "tmwtypes.h" +#include "struct.h" +#include "define.h" +#include "db2linear.h" +#include "agc_subfun.h" +#include "agc_init.h" +#include "agc.h" + +/* Function Definitions */ +void AGC(short *sin, short *sout, agc_struct *agc_obj, ssp_para_struct *para_obj, boolean_T speech_vad, boolean_T st_vad, int nenr_silence_time, int nenr_silence_cnt, short path) +{ + short i; + short unit_gain; + short frame_signal_identify; + short tmp16; + short sig_in; + short sig_out; + short sig_err; + int temp32; + int diff; + + if (1 == path) { + if (para_obj->para_agc_vad_ena == true) { + if (speech_vad == false) { + agc_obj->agc_vad1_cnt = MAX(0, agc_obj->agc_vad1_cnt - 1); + if (!agc_obj->agc_vad1_cnt) + agc_obj->agc_vad1 = false; + } else { + agc_obj->agc_vad1 = true; + if (agc_obj->Fs == 16000) + agc_obj->agc_vad1_cnt = para_obj->para_agc_vad_cnt * 2; /* keep it longer than speech vad in order to have better speech fidelity at the end of speech segment */ + else + agc_obj->agc_vad1_cnt = para_obj->para_agc_vad_cnt; /* keep it longer than speech vad in order to have better speech fidelity at the end of speech segment */ + } + + #if (1) + if (st_vad == false) { + agc_obj->agc_vad2 = true; + agc_obj->agc_vad2_cnt = 3; + } else { + agc_obj->agc_vad2_cnt = MAX(0, agc_obj->agc_vad2_cnt - 1); + if (!agc_obj->agc_vad2_cnt) + agc_obj->agc_vad2 = false; + } + #endif + } + } + + if (nenr_silence_cnt < nenr_silence_time) { /* be in silence to solve CODEC initial random signal issue and not to perform AGC as well */ + agc_obj->agc_vad1 = false; + agc_obj->agc_vad1_cnt = 0; + } + + agc_obj->env = envelope(sin, agc_obj->frame_size); /* calculate once every 20ms@NB or 10ms@WB */ + + unit_gain = (1L << (agc_obj->max_gain)); + + frame_signal_identify = 0; + if (agc_obj->env > agc_obj->pcb_noise_thrd) + frame_signal_identify = 1; /* no matter it is noise or speech signals */ + + for (i = 0; i < agc_obj->frame_size; i++) { + + sig_in = sin[i]; + + if (agc_obj->unit_gain_change_det == true) { + if (ABS(agc_obj->env) < (short)(0.0316*32768)) { + agc_obj->max_gain++; /* drop 6dB to max gain */ + unit_gain = (1L << (agc_obj->max_gain)); + agc_obj->gain32 = unit_gain << 16; + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + agc_obj->unit_gain = agc_obj->max_gain; + agc_obj->unit_gain_change_det = false; + agc_obj->smooth_cnt = 10; + } + } + + if (1 == path) { + if (para_obj->para_agc_vad_ena == true) { + /* speech-activated AGC */ + if ((agc_obj->agc_vad1 == true) && (agc_obj->agc_vad2 == true)) { + agc_obj->target_high = (agc_obj->target_high_Q15*unit_gain) >> 15; + agc_obj->target_low = (agc_obj->target_low_Q15*unit_gain) >> 15; + agc_obj->agc_vad3 = true; + } else { + agc_obj->target_high = (agc_obj->env*unit_gain) >> 15; /* better for keeping speech fidelity */ + agc_obj->target_low = (agc_obj->env*unit_gain) >> 15; /* better for keeping speech fidelity */ + agc_obj->agc_vad3 = false; + } + } + } + + + tmp16 = agc_obj->gain32 >> 16; /* leave space for gain>1, gain has Q format, unit_gain is 1 */ + sig_err = ((int)agc_obj->env)*((int)tmp16) >> 15; /* use the MSB */ + + if ( agc_obj->pcb_noise_cnt < agc_obj->pcb_noise_hold_time) { + diff = 0; + tmp16 = (agc_obj->env*unit_gain) >> 15; + + /* release */ + if (tmp16 < agc_obj->target_low) + diff = (agc_obj->target_low) - sig_err; + + /* attack */ + if (tmp16 > agc_obj->target_high) + diff = (agc_obj->target_high) - sig_err; + + /* as the original, gain is about one(unit_gain) */ + if (tmp16 >= agc_obj->target_low && tmp16 <= agc_obj->target_high) + diff = tmp16 - sig_err; + + update_gain(diff, agc_obj); /* update agc_obj->gain32 sample by sample */ + } + + temp32 = ((int)(agc_obj->gain32 >> 16)* (int)(sig_in)) >> agc_obj->unit_gain; + while (ABS(temp32) > 32767L) { /* overflow limiter */ + agc_obj->gain32 = (((int)(agc_obj->gain32 >> 16) * MINUS_halfdB) << 1); /* MINUS_halfdB is Q1.15, so gain32 is Q1.31 */ + temp32 = ((int)(agc_obj->gain32 >> 16)*(int)(sig_in)) >> agc_obj->unit_gain; + } + sig_out = sin[i]*(agc_obj->gain32 >> 16) >> agc_obj->unit_gain; + + #if (1) /* smooth output to avoid pop noise when unit gain changed */ + if (agc_obj->smooth_cnt) { + sig_out = ((agc_obj->alpha * agc_obj->sout_hist) >> 15) + ((agc_obj->alpha2 * sig_out) >> 15); + agc_obj->alpha -= 3276; /* each step 1/10 */ + agc_obj ->alpha2 += 3276; /* each step 1/10 */ + agc_obj->smooth_cnt--; + } + #endif + + sout[i] = sig_out; + + /* modify for release processing, automaticly drop 6dB on max gain if big signal come in */ + if (agc_obj->unit_gain_change == true) { + if (ABS(sig_in) > (short)(0.223*32768)) { + agc_obj->unit_gain_change = false; + agc_obj->unit_gain_change_det = true; + } + } + agc_obj->sout_hist = sig_out; /* update y(n-1) */ + + } + + #if (1) + if (frame_signal_identify == 0) { + agc_obj->pcb_noise_cnt++; + agc_obj->pcb_noise_cnt = MIN(agc_obj->pcb_noise_hold_time, agc_obj->pcb_noise_cnt); + } + else + agc_obj->pcb_noise_cnt = 0; + + if ( agc_obj->pcb_noise_cnt == agc_obj->pcb_noise_hold_time) { + tmp16 = (agc_obj->gain32 >> 16) >> 7; + tmp16 = MAX(tmp16, 1); + tmp16 = (agc_obj->gain32 >> 16) - tmp16; + agc_obj->gain32 = ((long)tmp16) << 16; /* cut down gain32 */ + + if ((agc_obj->gain32 >> 16) < unit_gain) + agc_obj->gain32 = unit_gain << 16; + } + #endif + + if (1 == path) { + if (para_obj->para_agc_vad_ena == true) { + agc_obj->agc_vad_hist = agc_obj->agc_vad3; + } + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.h new file mode 100755 index 000000000..f9c9a5bec --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.h @@ -0,0 +1,18 @@ + +#ifndef AGC_H +#define AGC_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "struct.h" +#include "tmwtypes.h" + +/* Function Declarations */ +extern void AGC(short *sin, short *sout, agc_struct *agc_obj, ssp_para_struct *para_obj, boolean_T speech_vad, boolean_T st_vad, int nenr_silence_time, int nenr_silence_cnt, short path); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc.o new file mode 100644 index 0000000000000000000000000000000000000000..1d621175204f80a9534d090bafb62ec0d2a2e1c7 GIT binary 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+/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ +/*% */ +/*% agc_init.c */ +/*% Author: Sharon Lee */ +/*% History: */ +/*% Created by Sharon Lee in October, 2019 */ +/*% */ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + +/* Include files */ +#include <string.h> +#include <stdio.h> +#include "agc_init.h" +#include "struct.h" +#include "define.h" +#include "db2linear.h" + +/* Function Definitions */ +void AGC_init(agc_struct *agc, ssp_para_struct *para_obj, float Fs, int frame_size, short path) +{ + agc_struct *agc_obj; + + agc_obj = agc; + agc_obj->Fs = (short)Fs; + agc_obj->frame_size = (short)frame_size; + agc_obj->env = 0L; + + agc_obj->fixed_step_size = 1 << 10; + agc_obj->stepsize_release = agc_obj->fixed_step_size; + agc_obj->stepsize_attack = MAX( agc_obj->fixed_step_size, (1 << 13)); + + agc_obj->pcb_noise_thrd = 38; + if (agc_obj->Fs == 16000) /* WB */ + agc_obj->pcb_noise_hold_time = 50*(3+1); /* unit is frame */ + else /* NB */ + agc_obj->pcb_noise_hold_time = 25*(3+1); /* unit is frame */ + agc_obj->pcb_noise_cnt = 0; + + if (1 == path) { + agc_obj->unit_gain_change = para_obj->para_agc_cut6_ena; /* allow to drop unit gain 6dB and only for one time, controlled here!!! */ + if (!para_obj->para_agc_max_gain) + agc_obj->unit_gain_change = false; + } else { + agc_obj->unit_gain_change = false; + } + + agc_obj->unit_gain_change_det = false; + agc_obj->sout_hist = 0; + agc_obj->smooth_cnt = 0; + agc_obj->alpha = (short)((float)(9.0F/10.0F) * 32767); /* coef for Lagrange Interpolation */ + agc_obj->alpha2 = 32767 - agc_obj->alpha; + + agc_obj->agc_vad1 = false; + agc_obj->agc_vad1_cnt = 0; + agc_obj->agc_vad2 = false; + agc_obj->agc_vad2_cnt = 0; + agc_obj->agc_vad_hist = false; + +} + +void AGC_para(agc_struct *agc, ssp_para_struct *para, short path) +{ + long unit_gain; + agc_struct *agc_obj; + ssp_para_struct *para_obj; + static short agc_gain_table[7] = {14, 13, 12, 11, 10, 9, 8}; + + /* restrict parameter range */ + para_obj = para; + agc_obj = agc; + + if (1 == path) { + para_obj->para_agc_cut6_ena = 1; + para_obj->para_agc_vad_cnt = 7; + para_obj->para_agc_max_gain = MIN(MAX(para_obj->para_agc_max_gain, 0), 6); + para_obj->para_agc_target_high = MIN(MAX(para_obj->para_agc_target_high, 0), 36); + para_obj->para_agc_target_low = MIN(MAX(para_obj->para_agc_target_low, 0), 72); + para_obj->para_agc_vad_ena = MIN(MAX(para_obj->para_agc_vad_ena, 0), 1); + //para_obj->para_agc_vad_cnt = MIN(MAX(para_obj->para_agc_vad_cnt, 1), 25); + //para_obj->para_agc_cut6_ena = MIN(MAX(para_obj->para_agc_cut6_ena, 0), 1); + agc_obj->max_gain = agc_gain_table[para_obj->para_agc_max_gain]; + agc_obj->target_high = db_to_linear(para_obj->para_agc_target_high); + agc_obj->target_low = db_to_linear(para_obj->para_agc_target_low); + } else { + para_obj->para_spk_agc_cut6_ena = 0; + para_obj->para_spk_agc_vad_ena = 0; + para_obj->para_spk_agc_vad_cnt = 7; + para_obj->para_spk_agc_max_gain = MIN(MAX(para_obj->para_spk_agc_max_gain, 0), 6); + para_obj->para_spk_agc_target_high = MIN(MAX(para_obj->para_spk_agc_target_high, 0), 36); + para_obj->para_spk_agc_target_low = MIN(MAX(para_obj->para_spk_agc_target_low, 0), 72); + agc_obj->max_gain = agc_gain_table[para_obj->para_spk_agc_max_gain]; + agc_obj->target_high = db_to_linear(para_obj->para_spk_agc_target_high); + agc_obj->target_low = db_to_linear(para_obj->para_spk_agc_target_low); + } + + unit_gain = (1L << (agc_obj->max_gain)); /* if max is Q3.13, i.e 2^13=8192 */ + agc_obj->unit_gain = agc_obj->max_gain; + agc_obj->gain32 = unit_gain << 16; /* start from unit gain */ + + agc_obj->target_high_Q15 = agc_obj->target_high; /* target high in Q1.15 format */ + + agc_obj->target_low = MIN(agc_obj->target_low, agc_obj->target_high); + agc_obj->target_low_Q15 = agc_obj->target_low; /* target low in Q1.15 format */ + + agc_obj->target_high = (short)((agc_obj->target_high*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + agc_obj->target_low = (short)((agc_obj->target_low*unit_gain) >> 15); /* proper Q format according to agc max_gain */ + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_init.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_init.h new file mode 100755 index 000000000..b780f776e --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_init.h @@ -0,0 +1,19 @@ + +#ifndef AGC_INIT_H +#define AGC_INIT_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "struct.h" +#include "tmwtypes.h" + +/* Function Declarations */ +extern void AGC_init(agc_struct *agc, ssp_para_struct *para_obj, float Fs, int frame_size, short path); +extern void AGC_para(agc_struct *agc, ssp_para_struct *para, short path); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_init.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_init.o new file 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b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_subfun.c new file mode 100755 index 000000000..91fb0786a --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_subfun.c @@ -0,0 +1,68 @@ + +/* Include files */ +#include "struct.h" +#include "define.h" +#include "agc_subfun.h" + +/* Function Definitions */ +short envelope(short* sin, short frame_size) /* Envelope detector based on frame */ +{ + short i; + short temp; + short temp_max; + short y; + short *ptr_sin; + //int y1, y2; + + ptr_sin = sin; + temp_max = 0x4; /* keep a minimal DC here */ + for (i = 0; i < frame_size; i++) { + temp = *ptr_sin++; + if (temp == (short)0x8000) + temp = (short)0x8001; + temp = ABS(temp); + if (temp > temp_max) + temp_max = temp; + } + + #if 1 + y = temp_max; + #else + y1 = ((int)(agc_obj->alpha1)* (int)(agc_obj->env)) << 1; + y2 = ((int)(agc_obj->alpha) * (int)(temp_max)) << 1; + y = (y1 + y2) >> 16; + #endif + + return y; + +} + +void update_gain(int diff, agc_struct *agc_obj) +{ + int delta32; + int gain32; + short step_size; + + if (diff > 32767) + diff = 32767; + else if (diff < -32768) + diff = -32768; + + if (diff > 0) /* attack time and release time constants should be separated here!!! */ + step_size = agc_obj->stepsize_release; /* usually gain slowly increase, so release time constant here slowly */ + else + step_size = agc_obj->stepsize_attack; /* usually gain quickly decrease, so attack time constant here quickly */ + + delta32 = ((int)(step_size) * (int)(diff)) << 1; + gain32 = agc_obj->gain32 + delta32; + + //if(gain32 <0) + // printf(""); + if (((unsigned int)gain32) > 32767*65536) /* saturation restriction */ + gain32 = 32767*65536; /* 0x7FFF0000 */ + + agc_obj->gain32 = gain32; + + } + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_subfun.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_subfun.h new file mode 100755 index 000000000..981795ef2 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_subfun.h @@ -0,0 +1,18 @@ + +#ifndef AGC_SUBFUN_H +#define AGC_SUBFUN_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "struct.h" + +/* Function Declarations */ +extern short envelope(short* sin, short frame_size); +extern void update_gain(int diff, agc_struct *agc_obj); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_subfun.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/agc_subfun.o new file mode 100644 index 0000000000000000000000000000000000000000..0b9200cf2739c1f12c8f2bbaccd48fc6212ec0dd GIT binary patch literal 6568 zcmbtYdvH|M9X@yOhJ@ti9YTVL3ym0r-8?n|D$x)~AQee?4ovM_HoG_3)qTzG-H>Fc z_CXOSRXggmoias6r&6X?OP!8(YO(Ef`j0bxP#;4Xb&xiYAchgGK}Y(1chB9uM5UeS znYs7-z0dEQ^E>CB-3PkXbt{S@?52oDk>`Z?!7NKt&}KoSm?LHjvB-OFvbW>?#&1+C zD(LQb-}8;b7b`V!(W5SzEZ2G`-6h(^3QaWJaQVO|Yd*Y^@=tkoRkZo1=Kbs^$NW=s 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1.836111675302431e+33, 1.880178355509689e+36, 2.173486178969201e+39, 2.816838087944084e+42 }; + + /* ((4^m)*factorial(m)*factorial(m+v)) for first order (v = 1) */ + static float bessel_v1_f[13] = { 8, 192, 9216, 737280, 88473600, 1.486356480000000e+10, 3.329438515200000e+12, 9.588782923776000e+14, (float)3.451961852559360e+17, (float)1.518863215126118e+20, (float)8.019597775865905e+22, + (float)5.004229012140325e+25, (float)3.643078720838156e+28 }; + static double bessel_v1_d[5] = { 3.060186125504052e+31, 2.937778680483889e+34, 3.196303204366472e+37, 3.912275122144561e+40, 5.351992367093760e+43 }; + + float *bessel_f_ptr, *bessel_f_ptr0; + double *bessel_d_ptr, *bessel_d_ptr0; + float acc0_f, acc1_f; + float tmp2_f; + double acc0_d, acc1_d; + double tmp2_d; + boolean_T short_iteration; + int i, m; + float tmp1; + + if (v == 0.0F) { + bessel_f_ptr0 = &bessel_v0_f[0]; + bessel_d_ptr0 = &bessel_v0_d[0]; + } else { + bessel_f_ptr0 = &bessel_v1_f[0]; + bessel_d_ptr0 = &bessel_v1_d[0]; + } + + for (i = 0; i < 321; i++) { /* input vector length */ + acc0_f = 1.0F; /* result for m = 0 */ + acc1_f = acc0_f; + tmp2_f = 1.0F; + tmp1 = x[i] * x[i]; + bessel_f_ptr = bessel_f_ptr0; + short_iteration = false; + + for (m = 0; m < 13; m++) { + if ((double)(tmp2_f*tmp1) > 3.4E+38) /* positive for sure */ + tmp2_f = (float)3.4E+38; + else + tmp2_f *= tmp1; + acc0_f = acc0_f + tmp2_f / (*bessel_f_ptr); + if (acc0_f == acc1_f) { + short_iteration = true; + break; + } + acc1_f = acc0_f; + bessel_f_ptr++; + } + + if (short_iteration == true) { + /* bessel(i,1) = ((x/2)^v)*acc0 */ + if (v == 0.0F) { + bessel[i] = acc0_f; + } else { + bessel[i] = x[i] / 2.0F * acc0_f; + } + goto bessel_end; + } + + tmp2_d = (double)tmp2_f; + acc0_d = (double)acc0_f; + acc1_d = acc0_d; + bessel_d_ptr = bessel_d_ptr0; + + for (m = 0; m < 5; m++) { + tmp2_d *= tmp1; /* positive for sure */ + if (tmp2_d > 1.7E+200) /* 1.7E+308 */ + break; + acc0_d = acc0_d + tmp2_d / (*bessel_d_ptr); + if ((float)(acc0_d) == (float)(acc1_d)) + break; + acc1_d = acc0_d; + bessel_d_ptr++; + } + + /* bessel(i,1) = ((x/2)^v)*acc0 */ + if (v == 0.0F) { + bessel[i] = (float)(acc0_d); + } else { + bessel[i] = (float)(x[i] / 2.0F * acc0_d); + } + bessel_end: + m = 0; /* meaningless, add to avoid error from compiler */ + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/bessel.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/bessel.h new file mode 100755 index 000000000..a2811ff4a --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/bessel.h @@ -0,0 +1,17 @@ + +#ifndef BESSEL_H +#define BESSEL_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "tmwtypes.h" + +/* Function Declarations */ +extern void bessel_function(float v, const float x[321], float bessel[321]); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/bessel.o 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b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cvi_ssp_interface.c new file mode 100644 index 000000000..1be14a977 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cvi_ssp_interface.c @@ -0,0 +1,732 @@ +#include <stdio.h> +#include <string.h> +/* for checking chip id */ +#include <unistd.h> +#include <fcntl.h> +#include "tmwtypes.h" +#include "mmse_init.h" +#include "mmse.h" +#include "define.h" +#include "struct.h" +#include "agc_init.h" +#include "agc.h" +#include "lpaec.h" +#include "packfft.h" +#include "nlpaes.h" +#include "notch.h" +#include "dc.h" +#include "functrl.h" +#include "struct.h" +#include "dg.h" +#include "delay.h" +#include "eq.h" +#include "cvi_ssp_interface.h" +#include "memalloc.h" +#ifndef PLATFORM_RTOS +not support to enter here +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <stdlib.h> +#include <linux/cvi_base.h> +#include "cvi_audio_arch.h" +#endif + + +#ifdef PLATFORM_RTOS +int cviaud_dbg = 1; +#endif +#ifdef TYPE_ARM +int cviaud_dbg = 0; +#endif + +#define UNUSED(x) ((x) = (x)) + +#define LOG_ERROR(fmt, args...) \ + do{\ + if (cviaud_dbg > 0) \ + printf("[error][%s][%d] "fmt, __func__, __LINE__, ##args); \ + }while(0); + +#define LOG_PRINTF(fmt, args...) \ + do{\ + if (cviaud_dbg > 1) \ + printf("[%s][%d] "fmt, __func__, __LINE__, ##args); \ + }while(0); + +#ifndef AEC_FRAME_LENGTH +#define AEC_FRAME_LENGTH (160) +#endif + +typedef struct stSpkInfo { + float fs; //sample rate + agc_struct spk_agc_obj; + cascaded_iir_struct spk_eq_obj; + float spk_eq_state[12]; + ssp_para_struct spk_ssp_para_obj; +} ST_SPK_INFO; + +struct st3AInfo { + /* Delay History Buffer */ + DelayState *delay_state; + /* DG History Buffer */ + dg_struct dg_obj; + /* DC Filter History Buffer */ + dcfilter_struct dc_obj; + /* Notch Filter History Buffer */ + qfilter_struct notch_obj; + int notch_state[4]; + /* LP AEC History Buffer */ + /* This holds the state of the linear echo canceller, need one per channel */ + LinearEchoState* aec_state; + /* NLP AES History Buffer */ + NonLinearEchoState *aes_state; + short filter_length; + short init_filter_length; + //float fe_smooth_coef; + boolean_T aec_supp16k_ena; + + float fs; //sample rate + ssp_para_struct para_obj; + float aa; + float mu; + NRState *nr_state; + int nenr_silence_time; + int nenr_silence_cnt; + /* NLP AES History Buffer */ + boolean_T st_vad; + short aes_std_in[160]; + float aes_supp_coef1; + float aes_supp_coef2; + float std_thrd; + //struct stAnrInfor * pstAnrInfor; + /* NR History Buffer */ + boolean_T speech_vad; + float frame; + float initial_noise_pow_time; + float nr_frame1_last_sample; + // AGC info + //struct stAgcInfor *pstAgcInfor; + /* Input/Output Buffer */ + short ne_fixed_in[320]; /* near-end and fixed-point input */ + float ne_float_in[320]; /* near-end and floating-point input */ + short fe_fixed_in[320]; /* far-end and fixed-point input */ + //float fe_float_in[320]; /* far-end and floating-point input */ + float ne_float_out[160]; /* near-end and floating-point output */ + short ne_fixed_out[160]; /* near-end and fixed-point output */ + + agc_struct agc_obj; + int bInitOk; +}; +#if 0//ndef PLATFORM_RTOS +static int _cviaudio_get_GetChipId(unsigned int *pu32ChipId) +{ + //mimic CVI_S32 CVI_SYS_GetChipId(unsigned int *pu32ChipId) + static unsigned int id = 0xffffffff; + int fd; + + if (id == 0xffffffff) { + unsigned int tmp = 0; + + fd = open("/dev/cvi-base", O_RDWR | O_SYNC); + if (fd == -1) { + LOG_ERROR("Can't open device, cvi-base.\n"); + LOG_ERROR("system not ready\n"); + //abort();//no need abort + return (-1); + } + + if (ioctl(fd, IOCTL_READ_CHIP_ID, &tmp) < 0) { + LOG_ERROR("ioctl IOCTL_READ_CHIP_ID failed\n"); + //abort(); + return (-1); + } + + switch (tmp) { + case E_CHIPID_CV1822: + id = CVI1822; + break; + case E_CHIPID_CV1832: + id = CVI1832; + break; + case E_CHIPID_CV1835: + id = CVI1835; + break; + case E_CHIPID_CV1838: + id = CVI1838; + break; + case E_CHIPID_CV1829: + id = CVI1829; + break; + case E_CHIPID_CV1826: + id = CVI1826; + break; + case E_CHIPID_CV1821: + id = CVI1821; + break; + case E_CHIPID_CV1820: + id = CVI1820; + break; + case E_CHIPID_CV1823: + id = CVI1823; + break; + case E_CHIPID_CV1825: + id = CVI1825; + break; + default: + LOG_ERROR("unknown id(%#x)\n", tmp); + return (-1); + break; + } + + close(fd); + } + + *pu32ChipId = id; + return 0; +} +#endif + +void *audio_ssp_init(void *para_obj, unsigned int sample_rate) +{ + + struct st3AInfo *pst3Ainfo = NULL; + short cond1, cond2; + unsigned int u32ChipId = 0xFF; + ssp_para_struct *para_info = (ssp_para_struct *)para_obj; + int turn_on_notch_filter = 0; +#if 0//ndef PLATFORM_RTOS + cviAudioGetDbgMask(&cviaud_dbg); + + _cviaudio_get_GetChipId(&u32ChipId); + + if (u32ChipId == CVI1835 || + u32ChipId == CVI1832 || + u32ChipId == CVI1838 || + u32ChipId == CVI1822 || + u32ChipId == CVI1821 || + u32ChipId == CVI1829 || + u32ChipId == CVI1820 || + u32ChipId == CVI1823 || + u32ChipId == CVI1825 || + u32ChipId == CVI1826) { + + LOG_PRINTF("cvitek support chip on cviaudio_algo\n"); + } + else { + LOG_ERROR("[Error]Cvitek verification chip id failure...[%d]\n", u32ChipId); + //return NULL; + } +#endif + +#ifndef PLATFORM_RTOS + pst3Ainfo = (struct st3AInfo *)malloc(sizeof(struct st3AInfo)); +#else + //pst3Ainfo = (struct st3AInfo *)pvPortMalloc(sizeof(struct st3AInfo)); + pst3Ainfo = (struct st3AInfo *)mem_alloc(sizeof(struct st3AInfo)); +#endif + if(NULL == pst3Ainfo) + { + LOG_ERROR("malloc failed.aec init failed.\n"); + return NULL; + } + + memset(pst3Ainfo,0,sizeof(struct st3AInfo)); + memcpy(&pst3Ainfo->para_obj,para_info,sizeof(ssp_para_struct)); + pst3Ainfo->fs = sample_rate;// pst3Ainfo->para_obj.para_sample_rate; + + //printf("[SSP_VER20220128]user setting config param------dump---start\n"); + printf("[SSP_VER20220128]sample_rate:%d.\n", (int)pst3Ainfo->fs); + printf("[SSP_VER20220128]para_client_config:%d.\n", pst3Ainfo->para_obj.para_client_config); + printf("[SSP_VER20220128]para_fun_config:%d.\n", pst3Ainfo->para_obj.para_fun_config); + printf("[SSP_VER20220128]para_delay_sample:%d.\n", pst3Ainfo->para_obj.para_delay_sample); + printf("[SSP_VER20220128]para_dg_target:%d.\n", pst3Ainfo->para_obj.para_dg_target); + printf("[SSP_VER20220128]para_aec_init_filter_len:%d.\n", pst3Ainfo->para_obj.para_aec_init_filter_len); + printf("[SSP_VER20220128]para_aec_filter_len:%d.\n", pst3Ainfo->para_obj.para_aec_filter_len); + printf("[SSP_VER20220128]para_aes_std_thrd:%d.\n", pst3Ainfo->para_obj.para_aes_std_thrd); + printf("[SSP_VER20220128]para_aes_supp_coeff:%d.\n", pst3Ainfo->para_obj.para_aes_supp_coeff); + printf("[SSP_VER20220128]para_nr_init_sile_time:%d.\n", pst3Ainfo->para_obj.para_nr_init_sile_time); + printf("[SSP_VER20220128]para_nr_snr_coeff:%d.\n", pst3Ainfo->para_obj.para_nr_snr_coeff); + printf("[SSP_VER20220128]para_agc_max_gain:%d.\n", pst3Ainfo->para_obj.para_agc_max_gain); + printf("[SSP_VER20220128]para_agc_target_high:%d.\n", pst3Ainfo->para_obj.para_agc_target_high); + printf("[SSP_VER20220128]para_agc_target_low:%d.\n", pst3Ainfo->para_obj.para_agc_target_low); + printf("[SSP_VER20220128]para_agc_vad_ena:%d.\n", pst3Ainfo->para_obj.para_agc_vad_ena); + printf("[SSP_VER20220128]para_notch_freq:%d.\n", pst3Ainfo->para_obj.para_notch_freq); + //printf("[SSP_VER20220128]user setting config param------dump---end\n"); + + //TODO: check ssp init with ssp_main.c + //reference from ssp_main.c + cond1 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + if (cond1) { + delay_para(&pst3Ainfo->para_obj); + pst3Ainfo->delay_state = delay_init(&pst3Ainfo->para_obj); + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + DG_para(&pst3Ainfo->dg_obj, &pst3Ainfo->para_obj); + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + DC_remover_init(&pst3Ainfo->dc_obj, pst3Ainfo->fs); + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + notch_para(&pst3Ainfo->notch_obj, &pst3Ainfo->para_obj, pst3Ainfo->fs); + notch_init(&pst3Ainfo->notch_obj, pst3Ainfo->notch_state); + } + + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + + if (cond1 | cond2) { + LP_AEC_para(&pst3Ainfo->para_obj, &pst3Ainfo->filter_length, &pst3Ainfo->init_filter_length); + pst3Ainfo->aec_state = LP_AEC_init(AEC_FRAME_LENGTH, pst3Ainfo->filter_length, + pst3Ainfo->init_filter_length, pst3Ainfo->fs); + } + if (cond2) { + NLP_AES_para(&pst3Ainfo->para_obj, &pst3Ainfo->std_thrd, &pst3Ainfo->aes_supp_coef1, + &pst3Ainfo->aes_supp_coef2); + pst3Ainfo->aes_state = NLP_AES_init(AEC_FRAME_LENGTH, pst3Ainfo->fs, pst3Ainfo->std_thrd, + pst3Ainfo->aes_supp_coef1, pst3Ainfo->aes_supp_coef2); + pst3Ainfo->aes_state->echo_state = pst3Ainfo->aec_state; + } + if (!(pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE)) { + /* add fool-proof design for parameter configuration */ + pst3Ainfo->para_obj.para_agc_vad_ena = 0; + } + cond1 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + cond2 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + if (cond1 | (cond2 && pst3Ainfo->para_obj.para_agc_vad_ena)) { + NR_para(&pst3Ainfo->para_obj, &pst3Ainfo->aa, &pst3Ainfo->mu); + pst3Ainfo->nr_state = NR_init(AEC_FRAME_LENGTH, pst3Ainfo->fs, pst3Ainfo->aa, pst3Ainfo->mu); + } + if (cond2) { + AGC_para(&pst3Ainfo->agc_obj, &pst3Ainfo->para_obj, 1); + AGC_init(&pst3Ainfo->agc_obj, &pst3Ainfo->para_obj, pst3Ainfo->fs, AEC_FRAME_LENGTH, 1); + } + + pst3Ainfo->speech_vad = true; + pst3Ainfo->st_vad = false; /* default */ + pst3Ainfo->frame = 1.0F; + pst3Ainfo->nenr_silence_cnt = 0; + + pst3Ainfo->para_obj.para_nr_init_sile_time = MIN(MAX(pst3Ainfo->para_obj.para_nr_init_sile_time, 0), 250); + if (pst3Ainfo->fs == 16000.0F) { + pst3Ainfo->initial_noise_pow_time = 14; + pst3Ainfo->nenr_silence_time = pst3Ainfo->para_obj.para_nr_init_sile_time*2; + } else { + pst3Ainfo->initial_noise_pow_time = 7; + pst3Ainfo->nenr_silence_time = pst3Ainfo->para_obj.para_nr_init_sile_time; + } + + pst3Ainfo->bInitOk = true; + + return (void *)pst3Ainfo; +} + + + +int audio_ssp_process(void *handle, short *mic_in, short *ref_in, short *dataout, int iLength) +{ + int hopsize = iLength; /* input hop size */ + int i; + int len = 2* iLength; + short cond1, cond2, cond3, cond4, cond5, cond6; + + int len1 = len/2; + int nFFT = 2*len; + float alpha, alpha2; + float tmp1 = 0.0; + struct st3AInfo *pst3Ainfo = (struct st3AInfo *)handle; + + if (!pst3Ainfo) { + printf("[error]audio_ssp_process error.\n"); + return -1; + } + + if(!(pst3Ainfo && pst3Ainfo->bInitOk)) + { + printf("[error]audio_ssp_process error params.\n"); + return -1; + } + + if(iLength != 160) + { + printf("[error]audio_ssp_process parameter len must be 160 frames.\n"); + return -1; + } + if(!(mic_in || dataout)) + { + printf("[error]audio_ssp_process NULL parameers.\n"); + return -2; + } + if (ref_in == NULL) { + //printf("[v]ref_in null\n"); + pst3Ainfo->para_obj.para_fun_config &= (~(LP_AEC_ENABLE | NLP_AES_ENABLE)); + } + //port from ssp_main.c + //printf("[v]pst3Ainfo->para_obj.para_fun_config[%x]\n", pst3Ainfo->para_obj.para_fun_config); + if (pst3Ainfo->para_obj.para_client_config == 2) { + float tmp = 0; + + for (i = 0; i < hopsize; i++) { + tmp = (float)(ref_in[i])/(float)(32768.0F) * 15.84F; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + ref_in[i] = ROUND_POS(tmp*(short)(32767)); + mic_in[i] = ROUND_POS(((float)(mic_in[i])/(float)(32768.0F) * 0.5F)*(short)(32767)); + } + } + + + if(!(pst3Ainfo->para_obj.para_fun_config)) { + for(i=0;i< hopsize;i++) + dataout[i]=mic_in[i]; + } else { + /* Delay ref signal, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + if (cond1) { + delay_ref(ref_in, pst3Ainfo->delay_state, hopsize); + } + + /* Apply DG, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + apply_DG(mic_in, mic_in, &pst3Ainfo->dg_obj, hopsize); + } + + /* DC filter, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + DC_remover(mic_in, mic_in, &pst3Ainfo->dc_obj, hopsize); + } + + /* Notch filter, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + notch_filter(mic_in, mic_in, &pst3Ainfo->notch_obj, hopsize); + } + + /* Linear AEC, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + if (cond1 | cond2) { + LP_AEC(pst3Ainfo->aec_state, mic_in, ref_in, dataout); + //memcpy(&pst3Ainfo->aes_std_in[0], &mic_in[0], hopsize*2); + if (cond2) { + for (i = 0; i < hopsize; i++) + pst3Ainfo->aes_state->aes_std_in[i] = mic_in[i]; + } + for (i = 0; i < hopsize; i++) + mic_in[i] = dataout[i]; + } + + cond3 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + cond4 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + if (!(cond2 | cond3 | cond4)) { + /* Compensate DG frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + compen_DG(mic_in, mic_in, &pst3Ainfo->dg_obj, hopsize); + } + for (i = 0; i < hopsize; i++) + dataout[i] = mic_in[i]; /* save MCPS if NR+AES+AGC off */ + } else { + if (cond3 | pst3Ainfo->para_obj.para_agc_vad_ena) { + /* Stationary NR frame-by-frame processing */ + if (pst3Ainfo->nenr_silence_cnt >= pst3Ainfo->nenr_silence_time) { + NR(mic_in, + pst3Ainfo->initial_noise_pow_time, + &pst3Ainfo->frame, + pst3Ainfo->nr_state, + &pst3Ainfo->speech_vad, + pst3Ainfo->ne_float_out); + } else { + for (i = 0; i < hopsize; i++) { + pst3Ainfo->ne_float_out[i] = 0.0F; + pst3Ainfo->nr_state->x_old[i] = mic_in[i]; + /* update input overlap data */ + } + } + } + + if (cond3) { + /* Transform to fixed-point with 16-bit length for output */ + for (i = 0; i < hopsize; i++) { + pst3Ainfo->ne_float_out[i] = MIN(MAX(pst3Ainfo->ne_float_out[i], -1.0F), 1.0F); /* saturation protection to avoid overflow */ + if (pst3Ainfo->ne_float_out[i] < 0.0F) + dataout[i] = ROUND_NEG((pst3Ainfo->ne_float_out[i]*(int)(32768))); + else + dataout[i] = ROUND_POS((pst3Ainfo->ne_float_out[i]*(short)(32767))); + } + } else { + //printf("[v][%d]mic_in[0x%x]\n", __LINE__, mic_in[0]); + for (i = 0; i < hopsize; i++) + dataout[i] = mic_in[i]; + } + + /* Nonlinear AES, frame-by-frame processing */ + if (cond2) { + NLP_AES(pst3Ainfo->aes_state, dataout, pst3Ainfo->frame, pst3Ainfo->speech_vad); + pst3Ainfo->st_vad = (boolean_T)pst3Ainfo->aes_state->st_vad; + } + + if (2 == pst3Ainfo->para_obj.para_client_config) { + float tmp = 0; + + for (i = 0; i < hopsize; i++) { + tmp = (float)(dataout[i])/(float)(32768.0F) * 1.9952F; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + dataout[i] = ROUND_POS(tmp*(short)(32767)); + } + } + + /* Compensate DG, frame-by-frame processing */ + cond1 = pst3Ainfo->para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + compen_DG(dataout, dataout, &pst3Ainfo->dg_obj, hopsize); + } + + /* AGC frame-by-frame processing */ + if (cond4) { + //printf("[v]AGC [0x%x][0x%x]\n", dataout[0], dataout[1]); + AGC(dataout, + dataout, + &pst3Ainfo->agc_obj, + &pst3Ainfo->para_obj, + pst3Ainfo->speech_vad, + pst3Ainfo->st_vad, + pst3Ainfo->nenr_silence_time, + pst3Ainfo->nenr_silence_cnt, + 1); + //printf("[v]AGC_out[0x%x][0x%x]\n", dataout[0], dataout[1]); + } + } + } + + if (pst3Ainfo->nenr_silence_cnt < pst3Ainfo->nenr_silence_time) + pst3Ainfo->nenr_silence_cnt += 1; + else + pst3Ainfo->nenr_silence_cnt = pst3Ainfo->nenr_silence_time + 1; /* avoid overflow */ + + if (pst3Ainfo->nenr_silence_cnt > pst3Ainfo->nenr_silence_time) { + if (pst3Ainfo->frame < pst3Ainfo->initial_noise_pow_time) /* avoid overflow, 140ms */ + pst3Ainfo->frame += 1; + else + pst3Ainfo->frame = pst3Ainfo->initial_noise_pow_time + 1; + } + + return 0; +} + + +int audio_ssp_deinit(void *handle) +{ + struct st3AInfo *pst3Ainfo = (struct st3AInfo *)handle; + + if (!pst3Ainfo) { + LOG_ERROR("audio_ssp_deinit NULL handle\n"); + return -1; + } + short cond1, cond2, cond3, cond4, cond6; + + if (!pst3Ainfo->bInitOk) { + LOG_ERROR("audio_ssp_deinit not init\n"); + return -1; + } + pst3Ainfo->bInitOk = 0; + cond1 = pst3Ainfo->para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = pst3Ainfo->para_obj.para_fun_config & NLP_AES_ENABLE; + cond3 = pst3Ainfo->para_obj.para_fun_config & NR_ENABLE; + cond4 = pst3Ainfo->para_obj.para_fun_config & AGC_ENABLE; + cond6 = pst3Ainfo->para_obj.para_fun_config & DELAY_ENABLE; + + if (cond1 | cond2) { + LP_AEC_free(pst3Ainfo->aec_state); + } + if (cond2) { + if (pst3Ainfo->aec_state != NULL) + NLP_AES_free(pst3Ainfo->aes_state); + } + if (cond3 | (cond4 && pst3Ainfo->para_obj.para_agc_vad_ena)) { + if (pst3Ainfo->nr_state) + NR_free(pst3Ainfo->nr_state); + } + if (cond6) { + delay_free(pst3Ainfo->delay_state); + } +#ifndef PLATFORM_RTOS + free(pst3Ainfo); +#else + vPortFree(pst3Ainfo); +#endif + //pst3Ainfo = NULL; + return 0; +} + + +void *audio_ssp_spk_init(void *para_obj, unsigned int sample_rate) +{ + + ST_SPK_INFO *pstSpkInfo = NULL; + short cond1, cond2; + unsigned int u32ChipId = 0xFF; + ssp_para_struct * para_info = (ssp_para_struct *)para_obj; + int turn_on_notch_filter = 0; + int hopsize = 160; /* input hop size */ +#ifndef PLATFORM_RTOS + //cviAudioGetDbgMask(&cviaud_dbg); + pstSpkInfo = ((ST_SPK_INFO *)calloc(1, sizeof(ST_SPK_INFO))); +#else + //pstSpkInfo = (ST_SPK_INFO *)pvPortMalloc(sizeof(ST_SPK_INFO)); + pstSpkInfo = (ST_SPK_INFO *)mem_alloc(sizeof(ST_SPK_INFO)); +#endif + + + if(NULL == pstSpkInfo) + { + LOG_ERROR("calloc failed audio_ssp_spk_init failed.\n"); + return NULL; + } + + memcpy(&pstSpkInfo->spk_ssp_para_obj, para_info,sizeof(ssp_para_struct)); + pstSpkInfo->fs = sample_rate;//pstSpkInfo->spk_ssp_para_obj.para_sample_rate; + + + LOG_PRINTF("[SSP_VER20220128]user setting SPK config param------dump---start\n"); + LOG_PRINTF("[SSP_VER20220128]sample_rate:%d\n", (int)pstSpkInfo->fs); + LOG_PRINTF("[SSP_VER20220128]para_client_config:%d.\n", pstSpkInfo->spk_ssp_para_obj.para_client_config); + LOG_PRINTF("[SSP_VER20220128]para_fun_config:%d.\n", pstSpkInfo->spk_ssp_para_obj.para_fun_config); + LOG_PRINTF("[SSP_VER20220128]para_spk_agc_max_gain:%d.\n", pstSpkInfo->spk_ssp_para_obj.para_spk_agc_max_gain); + LOG_PRINTF("[SSP_VER20220128]para_spk_agc_target_high:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_agc_target_high); + LOG_PRINTF("[SSP_VER20220128]para_spk_agc_target_low:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_agc_target_low); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_nband:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_nband); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_freq[0]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_freq[0]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_gain[0]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_gain[0]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_qfactor[0]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_qfactor[0]); + + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_freq[1]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_freq[1]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_gain[1]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_gain[1]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_qfactor[1]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_qfactor[1]); + + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_freq[2]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_freq[2]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_gain[2]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_gain[2]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_qfactor[2]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_qfactor[2]); + + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_freq[3]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_freq[3]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_gain[3]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_gain[3]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_qfactor[3]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_qfactor[3]); + + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_freq[4]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_freq[4]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_gain[4]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_gain[4]); + LOG_PRINTF("[SSP_VER20220128]para_spk_eq_qfactor[4]:%d.\n", + pstSpkInfo->spk_ssp_para_obj.para_spk_eq_qfactor[4]); + + LOG_PRINTF("[SSP_VER20220128]user setting SPK config param------dump---end\n"); + + + //reference from ssp_main.c of cond5 spk condition + if ((pstSpkInfo->spk_ssp_para_obj.para_spk_fun_config) & SPK_AGC_ENABLE) { + AGC_para(&pstSpkInfo->spk_agc_obj, &pstSpkInfo->spk_ssp_para_obj, 2); + AGC_init(&pstSpkInfo->spk_agc_obj, &pstSpkInfo->spk_ssp_para_obj, pstSpkInfo->fs, hopsize, 2); + } else { + printf("[Error]Not a valid mask for AO VQE[0x%x]]\n", pstSpkInfo->spk_ssp_para_obj.para_spk_fun_config); + return NULL; + } + + if (pstSpkInfo->spk_ssp_para_obj.para_spk_fun_config & SPK_EQ_ENABLE) { + equalizer_para(&pstSpkInfo->spk_eq_obj, &pstSpkInfo->spk_ssp_para_obj, pstSpkInfo->fs); + equalizer_init(&pstSpkInfo->spk_eq_obj, pstSpkInfo->spk_eq_state); + } + return (void *)pstSpkInfo; +} + + +int audio_ssp_spk_process(void *handle, short *spk_in, short *dataout, int iLength) +{ + ST_SPK_INFO *pstSpkInfo = (ST_SPK_INFO *)handle; + int i = 0; + + UNUSED(iLength); + if (!pstSpkInfo) { + LOG_ERROR("audio_ssp_spk_process error.\n"); + return -1; + } + + //everyime entering hopsize = 160 samples + //AGC(fe_fixed_in, fe_fixed_out, &spk_agc_obj, &ssp_para_obj, hopsize, true, false, 0, 0, fs, 2); + if (pstSpkInfo->spk_ssp_para_obj.para_spk_fun_config & SPK_AGC_ENABLE) { + AGC(spk_in, + spk_in, + &pstSpkInfo->spk_agc_obj, + &pstSpkInfo->spk_ssp_para_obj, + true, + false, + 0, + 0, + 2); + if (pstSpkInfo->spk_ssp_para_obj.para_spk_fun_config & SPK_EQ_ENABLE) { + equalizer(spk_in, + spk_in, + &pstSpkInfo->spk_eq_obj, + AEC_FRAME_LENGTH); + + } + for (i = 0; i < AEC_FRAME_LENGTH; i++) + dataout[i] = spk_in[i]; + + } else if (pstSpkInfo->spk_ssp_para_obj.para_spk_fun_config & SPK_EQ_ENABLE) { + equalizer(spk_in, + dataout, + &pstSpkInfo->spk_eq_obj, + AEC_FRAME_LENGTH); + + } else { + //do nothing but copy input data + for (i = 0; i < AEC_FRAME_LENGTH; i++) + dataout[i] = spk_in[i]; + } + + return 0; +} + +int audio_ssp_spk_deinit(void *handle) +{ + ST_SPK_INFO *pstSpkInfo = (ST_SPK_INFO *)handle; + + if (!pstSpkInfo) { + LOG_ERROR("audio_ssp_spk_deinit handle not exist!!\n"); + return -1; + } else { +#ifndef PLATFORM_RTOS + free(pstSpkInfo); +#else + vPortFree(pstSpkInfo); +#endif + pstSpkInfo = NULL; + + } + + return 0; +} + + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cvi_ssp_interface.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cvi_ssp_interface.h new file mode 100644 index 000000000..6dd1c7c96 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cvi_ssp_interface.h @@ -0,0 +1,17 @@ +/* Include files */ +#ifndef __CVI_SSP_INTERFACE__ +#define __CVI_SSP_INTERFACE__ +#include <stdio.h> + +#define AEC_PRO_DATA_LEN (160) +//for uplink VQE(MIC in) +void *audio_ssp_init(void *para_obj, unsigned int sample_rate); +int audio_ssp_process(void *handle, short *mic_in, short *ref_in, short *dataout, int iLength); +int audio_ssp_deinit(void *handle); + +//for downlink VQE(SPK OUT) +void *audio_ssp_spk_init(void *para_obj, unsigned int sample_rate); +int audio_ssp_spk_process(void *handle, short *spk_in, short *dataout, int iLength); +int audio_ssp_spk_deinit(void *handle); + +#endif diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cvi_ssp_interface.o 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index 000000000..36a78bbd8 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cviaudio_algo_interface.c @@ -0,0 +1,353 @@ +/*usage from C std lib */ +#include <stdio.h> +#include<sys/types.h> +#include<sys/stat.h> +#include<fcntl.h> +#include <math.h> +#include <string.h> +#include <stdlib.h> +#include <sys/stat.h> +#ifndef PLATFORM_RTOS +#include <errno.h> +#endif +/* usage from cviaudio header */ +#include "struct.h" +#include "cvi_comm_aio.h" +#include "cvi_ssp_interface.h" +#define _AUDIO_ALGO_INTERFACE_VERSION_TAG_ "Aud_AlgoInterface_ver20220128" +#define _AUDIO_ALGO_INTERNAL_VERSION_ "CVITEK_AEC_Algo_20220128" +//turn on all the mask to user config, do not wrap or simply to 3 function AGC/ANR/AEC +#define CVIAUDIO_ALGO_FUNCTION_AGC 0x01 +#define CVIAUDIO_ALGO_FUNCTION_ANR 0x02 +#define CVIAUDIO_ALGO_FUNCTION_AEC 0x04 + +//TODO: step 1 add include header for specific algo +/* porting layer for specific algorithm */ +//#include "cvi_aec_interface_v2.h" +//#include "cvi_3a_internal.h" + +#define AEC_FRAME_LENGTH (160) +#ifndef CHECK_NULL_PTR +#define CHECK_NULL_PTR(ptr) \ + do { \ + if (!(ptr)) { \ + printf("func:%s,line:%d, NULL pointer\n", __func__, __LINE__); \ + return -1; \ + } \ + } while (0) +#endif + +int notch_dbglevel = 2; + +#define CVIAUD_NOTCH_ERR_PRINTF(fmt, args...) \ + do { \ + if (notch_dbglevel > 0) \ + printf("[cviaudio][error][%s][%d] "fmt, __func__, __LINE__, ##args);\ + } while (0) + +#define CVIAUD_NOTCH_DBG_PRINTF(fmt, args...) \ + do { \ + if (notch_dbglevel > 1) \ + printf("[cviaudio][info] "fmt, ##args);\ + } while (0) + +#define CVIAUD_NOTCH_TRA_PRINTF(fmt, args...) \ + do { \ + if (notch_dbglevel > 2) \ + printf("[cvitrace][%s][%d] "fmt, __func__, __LINE__, ##args);\ + } while (0) + +#ifndef SSP_UNUSED_REF +#define SSP_UNUSED_REF(X) ((X) = (X)) +#endif + +#ifndef DEFAULT_BYTES_PER_SAMPLE +#define DEFAULT_BYTES_PER_SAMPLE 2 +#endif + +#ifndef CVI_AEC_FRAMES_LEN +#define CVI_AEC_FRAMES_LEN 160 +#endif +//#define IBUFFSIZE 160/* Input buffer size */ +#define MAX_IBUFFSIZE 4096 +/* sample code from ffmpeg resampling_audio.c -----------end */ +bool gv_bEnableAEC;//TOD: this should not exist if aec, agc use the same handle + + +/************************************************************************************** + * Function: CviAud_Algo_Init + * + * Description: allocate and init for audio algorithm + * + * Inputs: s32FunctMask: CVIAUDIO_ALGO_FUNCTION_AGC + * /CVIAUDIO_ALGO_FUNCTION_AGC + * /CVIAUDIO_ALGO_FUNCTION_AGC + * param_info:input info needed for specific algorithm lib + * Outputs: none + * + * Return: algo handle + **************************************************************************************/ +void *CviAud_Algo_Init(int s32FunctMask, void *param_info) +{ + int s32Ret; + void *_handle = NULL; +#ifdef FAST_MATH_CALC + printf("[cviaudio][SSP]Using Fast Math[replace atan/logarithm]\n"); +#endif + const AI_TALKVQE_CONFIG_S *pstVqeConfig = (const AI_TALKVQE_CONFIG_S *)param_info; + ssp_para_struct ssp_para_info; + ssp_para_struct *p_ssp_para_info = &ssp_para_info; + + s32FunctMask = s32FunctMask; + memset(p_ssp_para_info, 0, sizeof(ssp_para_struct)); + // set to default value first .... + ssp_para_info.para_fun_config = 15; + ssp_para_info.para_delay_sample = 1; + ssp_para_info.para_dg_target = 1; + ssp_para_info.para_aec_init_filter_len = 2; + ssp_para_info.para_aec_filter_len = 13; + ssp_para_info.para_aes_std_thrd = 37; + ssp_para_info.para_aes_supp_coeff = 60; + ssp_para_info.para_nr_init_sile_time = 0; + ssp_para_info.para_nr_snr_coeff = 15; + ssp_para_info.para_agc_max_gain = 0; + ssp_para_info.para_agc_target_high = 2; + ssp_para_info.para_agc_target_low = 72; + ssp_para_info.para_agc_vad_ena = 1; + ssp_para_info.para_notch_freq = 0; + ssp_para_info.para_spk_fun_config = 0; + ssp_para_info.para_spk_agc_max_gain = 0; + ssp_para_info.para_spk_agc_target_high = 8; + ssp_para_info.para_spk_agc_target_low = 72; + + + //update value from use layer + //ssp_para_info.para_sample_rate = pstVqeConfig->s32WorkSampleRate;//only support 8k and 16k + ssp_para_info.para_client_config = pstVqeConfig->para_client_config; + ssp_para_info.para_fun_config = pstVqeConfig->u32OpenMask; + //update aec config + ssp_para_info.para_aec_filter_len = pstVqeConfig->stAecCfg.para_aec_filter_len; + ssp_para_info.para_aes_std_thrd = pstVqeConfig->stAecCfg.para_aes_std_thrd; + ssp_para_info.para_aes_supp_coeff = pstVqeConfig->stAecCfg.para_aes_supp_coeff; + //update nr config + ssp_para_info.para_nr_init_sile_time = pstVqeConfig->stAnrCfg.para_nr_init_sile_time; + ssp_para_info.para_nr_snr_coeff = pstVqeConfig->stAnrCfg.para_nr_snr_coeff;; + //update agc config + ssp_para_info.para_agc_max_gain = pstVqeConfig->stAgcCfg.para_agc_max_gain; + ssp_para_info.para_agc_target_high = pstVqeConfig->stAgcCfg.para_agc_target_high;; + ssp_para_info.para_agc_target_low = pstVqeConfig->stAgcCfg.para_agc_target_low; + ssp_para_info.para_agc_vad_ena = pstVqeConfig->stAgcCfg.para_agc_vad_ena; + //udpate sw aec config + ssp_para_info.para_aec_init_filter_len = pstVqeConfig->stAecDelayCfg.para_aec_init_filter_len; + ssp_para_info.para_dg_target = pstVqeConfig->stAecDelayCfg.para_dg_target; + ssp_para_info.para_delay_sample = pstVqeConfig->stAecDelayCfg.para_delay_sample; + //update notch filter setting for specific customer + ssp_para_info.para_notch_freq = pstVqeConfig->para_notch_freq;//only support 8k and 16k + #if 0 //leave the spk setting to CviAud_SpkAlgo_Init + ssp_para_info.para_spk_fun_config = pstVqeConfig->stSpkCfg.para_spk_fun_config; + ssp_para_info.para_spk_agc_max_gain = pstVqeConfig->stSpkCfg.para_spk_agc_max_gain; + ssp_para_info.para_spk_agc_target_high = pstVqeConfig->stSpkCfg.para_spk_agc_target_high; + ssp_para_info.para_spk_agc_target_low = pstVqeConfig->stSpkCfg.para_spk_agc_target_low; + #endif + + + _handle = (void *)audio_ssp_init((void *)p_ssp_para_info, pstVqeConfig->s32WorkSampleRate); + + + return (void *)_handle; + + +} + + +/************************************************************************************** + * Function: CviAud_Algo_Process + * + * Description: Process the audio algorithm through interface api CviAud_Algo_Process + * + * Inputs: pHandle: Create by CviAud_Algo_Init + * mic_in: input data address for entering audio algo + * ref_in: reference data for audio AEC algorithm + * iLength: input samples count for each process function call + * + * Outputs: out: pointer to outputbuf + * + * Return: output samples + * Notes: sure insamps < MAXFRAMESIZE + **************************************************************************************/ +int CviAud_Algo_Process(void *pHandle, uint64_t mic_in, + uint64_t ref_in, uint64_t out, int iLength) +{ +//TODO: step 3[ok] implement the function acquired + SSP_UNUSED_REF(iLength); + int ret = 0; + int s32RetTotalSamples = 0; + + if (pHandle == NULL) { + printf("Null input [%s][%d]\n", __func__, __LINE__); + return -1; + } + + if (iLength != AEC_FRAME_LENGTH) { + printf("input length only support 160 samples[%s][%d]\n", __func__, __LINE__); + return -1; + } + + ret = audio_ssp_process(pHandle, mic_in, ref_in, out, AEC_FRAME_LENGTH); + if (ret != 0) { + printf("audio_ssp_process error ret(%d).\n", ret); + return -1; + } + s32RetTotalSamples = AEC_FRAME_LENGTH; + + return s32RetTotalSamples; + +} + +/************************************************************************************** + * Function: CviAud_Algo_DeInit + * + * Description: free platform-specific data allocated by CviAud_Algo_Init + * + * Inputs: instance pointer (pHandle) + * Outputs: none + * + * Return: CVI_SUCCESS / CVI_FAILURE + **************************************************************************************/ +void CviAud_Algo_DeInit(void *pHandle) +{ + + //VQE_UNUSED_REF(pHandle); + //struct st3AInfo *pst3Ainfo = (struct st3AInfo *)pHandle; + + if (audio_ssp_deinit(pHandle) != 0) { + CVIAUD_NOTCH_ERR_PRINTF("3a deinit err\n"); + return; + } + +} + + + +/************************************************************************************** + * Function: CviAud_Algo_GetVersion + * + * Description: Get version info: algorithrm source , date through this api + * + * Inputs: None + * Outputs: None + * + * Return: Version info in string type + **************************************************************************************/ +void CviAud_Algo_GetVersion(char *pstrVersion) +{ + CVIAUD_NOTCH_DBG_PRINTF("CviAud algo interface[%s]\n", _AUDIO_ALGO_INTERFACE_VERSION_TAG_); + CVIAUD_NOTCH_DBG_PRINTF("CviAud algo lib[%s]\n", _AUDIO_ALGO_INTERNAL_VERSION_); + sprintf(pstrVersion, _AUDIO_ALGO_INTERNAL_VERSION_); + return; +} + +void *CviAud_SpkAlgo_Init(int s32FunctMask, void *param_info) +{ + + int s32Ret; + void *_handle = NULL; + + s32FunctMask = s32FunctMask; + const AO_VQE_CONFIG_S *pstVqeConfig = (const AO_VQE_CONFIG_S *)param_info; + ssp_para_struct ssp_para_info; + ssp_para_struct *p_ssp_para_info = &ssp_para_info; + + memset(p_ssp_para_info, 0, sizeof(ssp_para_struct)); + // set to default value first .... + //ignore the mic in param, since we only use for SPK + ssp_para_info.para_fun_config = 0; + ssp_para_info.para_aec_filter_len = 0; + ssp_para_info.para_aes_std_thrd = 0; + ssp_para_info.para_aes_supp_coeff = 0; + ssp_para_info.para_nr_init_sile_time = 0; + ssp_para_info.para_nr_snr_coeff = 0; + ssp_para_info.para_agc_max_gain = 0; + ssp_para_info.para_agc_target_high = 0; + ssp_para_info.para_agc_target_low = 0; + ssp_para_info.para_agc_vad_ena = 0; + ssp_para_info.para_notch_freq = 0; + //Focus on the spk config + ssp_para_info.para_spk_agc_max_gain = 0; + ssp_para_info.para_spk_agc_target_high = 8; + ssp_para_info.para_spk_agc_target_low = 72; + + + //update value from use layer + //ssp_para_info.para_sample_rate = pstVqeConfig->s32WorkSampleRate;//only support 8k and 16k + ssp_para_info.para_spk_fun_config = pstVqeConfig->u32OpenMask; + ssp_para_info.para_spk_agc_max_gain = pstVqeConfig->stAgcCfg.para_agc_max_gain; + ssp_para_info.para_spk_agc_target_high = pstVqeConfig->stAgcCfg.para_agc_target_high; + ssp_para_info.para_spk_agc_target_low = pstVqeConfig->stAgcCfg.para_agc_target_low; + + ssp_para_info.para_spk_eq_nband = pstVqeConfig->stEqCfg.para_spk_eq_nband; + ssp_para_info.para_spk_eq_freq[0] = pstVqeConfig->stEqCfg.para_spk_eq_freq[0]; + ssp_para_info.para_spk_eq_gain[0] = pstVqeConfig->stEqCfg.para_spk_eq_gain[0]; + ssp_para_info.para_spk_eq_qfactor[0] = pstVqeConfig->stEqCfg.para_spk_eq_qfactor[0]; + ssp_para_info.para_spk_eq_freq[1] = pstVqeConfig->stEqCfg.para_spk_eq_freq[1]; + ssp_para_info.para_spk_eq_gain[1] = pstVqeConfig->stEqCfg.para_spk_eq_gain[1]; + ssp_para_info.para_spk_eq_qfactor[1] = pstVqeConfig->stEqCfg.para_spk_eq_qfactor[1]; + ssp_para_info.para_spk_eq_freq[2] = pstVqeConfig->stEqCfg.para_spk_eq_freq[2]; + ssp_para_info.para_spk_eq_gain[2] = pstVqeConfig->stEqCfg.para_spk_eq_gain[2]; + ssp_para_info.para_spk_eq_qfactor[2] = pstVqeConfig->stEqCfg.para_spk_eq_qfactor[2]; + ssp_para_info.para_spk_eq_freq[3] = pstVqeConfig->stEqCfg.para_spk_eq_freq[3]; + ssp_para_info.para_spk_eq_gain[3] = pstVqeConfig->stEqCfg.para_spk_eq_gain[3]; + ssp_para_info.para_spk_eq_qfactor[3] = pstVqeConfig->stEqCfg.para_spk_eq_qfactor[3]; + ssp_para_info.para_spk_eq_freq[4] = pstVqeConfig->stEqCfg.para_spk_eq_freq[4]; + ssp_para_info.para_spk_eq_gain[4] = pstVqeConfig->stEqCfg.para_spk_eq_gain[4]; + ssp_para_info.para_spk_eq_qfactor[4] = pstVqeConfig->stEqCfg.para_spk_eq_qfactor[4]; + + + _handle = (void *)audio_ssp_spk_init((void *)p_ssp_para_info, pstVqeConfig->s32WorkSampleRate); + + + return (void *)_handle; + + +} + +int CviAud_SpkAlgo_Process(void *pHandle, short *spk_in, + short *spk_out, int iLength) +{ + SSP_UNUSED_REF(iLength); + int ret = 0; + int s32RetTotalSamples = 0; + + if (pHandle == NULL) { + printf("Null input [%s][%d]\n", __func__, __LINE__); + return -1; + } + + if (iLength != AEC_FRAME_LENGTH) { + printf("input length only support 160 samples[%s][%d]\n", __func__, __LINE__); + return -1; + } + + ret = audio_ssp_spk_process(pHandle, spk_in, spk_out, AEC_FRAME_LENGTH); + if (ret != 0) { + printf("audio_ssp_spk_process error ret(%d).\n", ret); + return -1; + } + s32RetTotalSamples = AEC_FRAME_LENGTH; + + return s32RetTotalSamples; + +} + +void CviAud_SpkAlgo_DeInit(void *pHandle) +{ + + //VQE_UNUSED_REF(pHandle); + //struct st3AInfo *pst3Ainfo = (struct st3AInfo *)pHandle; + + if (audio_ssp_spk_deinit(pHandle) != 0) { + CVIAUD_NOTCH_ERR_PRINTF("3a deinit err\n"); + return; + } + +} diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cviaudio_algo_interface.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/cviaudio_algo_interface.o new file mode 100644 index 0000000000000000000000000000000000000000..7d2c81628fbb5bf4ebdcb6c20804309b1de0d1f7 GIT binary patch literal 20344 zcmc(H3z$^JnRcB%Ju}^>hhdltHxU{bV7SbUL2iOFFar!Aa|6U%nx5&NnU<OEp)XvF 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*/ +void smooth16bit(short *state_p, short *in_p, short alpha, short size) +{ + short i; + short xn; + short yn1; + short alpha2; + long long acc0; + + xn = *in_p++; + yn1 = *state_p++; + alpha2 = -alpha-((short)0x8000); /* 1-alpha */ + alpha2 = MAX(0, (MIN(0x7fff, (unsigned short)alpha2)) ); + + for (i = size; i > 0 ; i--) { + acc0 = ((long)yn1*(long)alpha) << 1; + yn1 =*state_p--; + acc0 += ((xn*alpha2) << 1); + xn = *in_p++; + acc0 = MAX(((long)0x80000000l), (MIN(0x7fffffffl, acc0))); + *state_p = (short)(acc0 >> 16); + state_p += 2; + } +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/db2linear.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/db2linear.h new file mode 100755 index 000000000..fb8a48571 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/db2linear.h @@ -0,0 +1,15 @@ + +#ifndef DB2LINEAR_H +#define DB2LINEAR_H + +/* Include files */ +#include <stddef.h> +#include <stdlib.h> + +/* Function Declarations */ +extern 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b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dc.c new file mode 100755 index 000000000..5c77580db --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dc.c @@ -0,0 +1,52 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% + *% + *% dc.c + *% Author: Sharon Lee + *% History: + *% Created by Sharon Lee in April, 2021 + *% + *%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + +/* Include files */ +#include "define.h" +#include "struct.h" +#include "dc.h" + +/* Function Definitions */ +void DC_remover_init(dcfilter_struct* dc_obj, float Fs) +{ + int i; + int sampling_rate; + + sampling_rate = (int)Fs; + + if (sampling_rate == 8000) + dc_obj->dcfilter_radius = .9f; + if (sampling_rate == 16000) + dc_obj->dcfilter_radius = .982f; + + for (i=0;i<2;i++) + dc_obj->dcfilter_mem[i] = 0; + +} + +void DC_remover(short *in, short *out, dcfilter_struct* dc_obj, int frame_size) +{ + int i; + float den2; + float tmp; + + den2 = dc_obj->dcfilter_radius*dc_obj->dcfilter_radius + .7f*(1-dc_obj->dcfilter_radius)*(1-dc_obj->dcfilter_radius); + + for (i=0;i<frame_size;i++) { + float vin = in[i]; + float vout = dc_obj->dcfilter_mem[0] + vin; + dc_obj->dcfilter_mem[0] = dc_obj->dcfilter_mem[1] + 2*(-vin + dc_obj->dcfilter_radius*vout); /* history state */ + dc_obj->dcfilter_mem[1] = vin - den2 * vout; /* history state */ + tmp = dc_obj->dcfilter_radius * vout; + out[i] = (short)WORD2INT(tmp); + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dc.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dc.h new file mode 100755 index 000000000..cfa9b4ed7 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dc.h @@ -0,0 +1,15 @@ + +#ifndef DC_H +#define DC_H + +/* Include files */ +#include "define.h" +#include "struct.h" + +/* Function Declarations */ +extern void DC_remover_init(dcfilter_struct* dc_obj, float Fs); +extern void DC_remover(short *in, short *out, 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zxB5{6k0nwGaR~7`p|i+pi{1&=9wOU^i1)GO1ho7JZNtERg?Lj?E`+`jh1x|`k()i< NCamWG^cGq1{tW?ZRs#S4 literal 0 HcmV?d00001 diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/define.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/define.h new file mode 100755 index 000000000..d1f763a82 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/define.h @@ -0,0 +1,79 @@ + +#ifndef SHARON_DEFINE_H +#define SHARON_DEFINE_H + +/* Include files */ +#include <math.h> + + +/* Commonly Used Macro */ +#define IN_RANGE(n, lo, hi) ((lo) <= (n) && (n) <= (hi)) +#define ABS(t) (((t) < 0 ) ? -(t) : (t)) +#define MAX(x, y) (((x) < (y)) ? (y) : (x)) +#define MIN(x, y) (((x) > (y)) ? (y) : (x)) +#define ROUND_POS(x) (short) (((float)(x)) + 0.5F) +#define ROUND_NEG(x) (short) (((float)(x)) - 0.5F) +#define SQR(x) ((x)*(x)) + +/* Fixed Definitions */ +#define PLUS_1dB (int)(1.1220f * 32768) // Q.15 format +#define MINUS_quarterdB (int)(0.9716f * 32768) // Q.15 format +#define MINUS_halfdB (int)(0.944f * 32768) // Q.15 format +#define MINUS_1dB (int)(0.8912f * 32768) // Q.15 format +#define MINUS_2dB (int)(0.7943f * 32768) // Q.15 format + +/* Math Approximation */ +#define math_sqrt sqrt +#define math_acos acos +#define math_exp exp +#define math_cos_norm(x) (cos((.5f*M_PI)*(x))) +#define math_atan atan +#ifndef M_PI +#define M_PI 3.14159265358979323846 /* pi */ +#endif + +#define WORD2INT(x) ((x) < -32767.5f ? -32768 : ((x) > 32766.5f ? 32767 : floor(.5+(x)))) +#define toBARK(n) (13.1f*atan(.00074f*(n))+2.24f*atan((n)*(n)*1.85e-8f)+1e-4f*(n)) +#define toMEL(n) (2595.f*log10(1.f+(n)/700.f)) + +/* Floating Point */ +#define FLOAT_ZERO 0.f +#define FLOAT_ONE 1.f +#define FLOAT_HALF 0.5f +#define FP_VERY_SMALL 1e-15f +#define FP_VERY_LARGE 1e15f +#define AES_SNR_SCALING 1.f +#define AES_FRAC_SCALING 1.f +#define AES_EXPIN_SCALING 1.f + +/* We don't support visibility on Win32 */ +#define EXPORT + +/* Microsoft version of 'inline' */ +#ifdef PLATFORM_RTOS +#ifndef inline +#define inline __inline +#endif +#endif + + +#ifndef NULL +#define NULL 0 +#endif + +#if defined(_WIN32) + /* MSVC/Borland */ + typedef __int32 int32; + typedef unsigned __int32 uint32; + typedef __int16 int16; + typedef unsigned __int16 uint16; +#else + typedef int int32; + typedef unsigned int uint32; + typedef short int16; + typedef unsigned short uint16; +#endif + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.c new file mode 100755 index 000000000..b4291b0a5 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.c @@ -0,0 +1,86 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ +/*%*/ +/*% delay.c*/ +/*% Author: Sharon Lee*/ +/*% History:*/ +/*% Created by Sharon Lee in November, 2021*/ +/*%*/ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + + /* Include files */ +#include <stdio.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "memalloc.h" +#include "struct.h" +#include "define.h" +#include "delay.h" + +/* Function Definitions */ +EXPORT void delay_para(ssp_para_struct *para) +{ + ssp_para_struct *ssp_para_obj; + + /* Delay Parameter */ + ssp_para_obj = para; + ssp_para_obj->para_delay_sample = MIN(MAX(ssp_para_obj->para_delay_sample, 1), 3000); /* delay in sample, delay 0 sample if disable DELAY_ENABLE */ + +} + +EXPORT DelayState *delay_init(ssp_para_struct *para) +{ + int i; + ssp_para_struct *ssp_para_obj; + DelayState *st = (DelayState *)mem_alloc(sizeof(DelayState)); + + ssp_para_obj = para; + st->size = 3001; + + st->dly_ref_buf = (short*)mem_alloc(st->size*sizeof(short)); + + for (i=0;i<st->size;i++) + st->dly_ref_buf[i] = 0; + + st->addr = st->dly_ref_buf; + st->rdptr = st->addr; + st->wrptr = st->addr + ssp_para_obj->para_delay_sample; + + return st; + +} + +EXPORT void delay_free(DelayState *st) +{ + mem_free(st->dly_ref_buf); + mem_free(st); + +} + +EXPORT void delay_ref(short *pin, DelayState *delay_state, int frame_size) +{ + int i; + DelayState *st; + short *ptr1, *ptr2, *ptr3; + + st = delay_state; + + ptr1 = st->wrptr; /* write pointer in circular butter */ + ptr2 = pin; + ptr3 = st->rdptr; /* read pointer in circular butter */ + + for (i=0; i<frame_size; i++) { + *ptr1++ = *ptr2; /* read from input buffer and write to circular buffer */ + if(ptr1 >= (st->addr + st->size)) + ptr1 = st->addr; + *ptr2++ = *ptr3++; /* read from circular buffer and write to input buffer */ + if(ptr3 >= (st->addr + st->size)) + ptr3 = st->addr; + } + + st->wrptr = ptr1; /* restore for next frame */ + st->rdptr = ptr3; /* restore for next frame */ + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.h new file mode 100755 index 000000000..08aee1a9a --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.h @@ -0,0 +1,17 @@ + +#ifndef DELAY_H +#define DELAY_H + +/* Include files */ +#include "define.h" +#include "struct.h" + +/* Function Declarations */ +extern void delay_para(ssp_para_struct *para); +extern DelayState *delay_init(ssp_para_struct *para); +extern void delay_free(DelayState *st); +extern void delay_ref(short *pin, DelayState *delay_state, int frame_size); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/delay.o new file mode 100644 index 0000000000000000000000000000000000000000..e08d6fdb0a24965077085b97fbbf845b6a5cab3f GIT binary patch literal 10368 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Lee*/ +/*% History:*/ +/*% Created by Sharon Lee in November, 2021*/ +/*%*/ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + + /* Include files */ +#include <stdio.h> +#include <stdlib.h> +#include "struct.h" +#include "define.h" +#include "dg.h" + +/* Function Definitions */ +void DG_para(dg_struct *dg, ssp_para_struct *para) +{ + dg_struct *dg_obj; + ssp_para_struct *ssp_para_obj; + static float dg_cut_tab[12] = {0.891251F, 0.794328F, 0.707946F, 0.630957F, 0.562341F, 0.501187F, + 0.446684F, 0.398107F, 0.354813F, 0.316228F, 0.281838F, 0.251189F}; + static float dg_boost_tab[12] = {1.122018F, 1.258925F, 1.412538F, 1.584893F, 1.778279F, 1.995262F, + 2.238721F, 2.511886F, 2.818383F, 3.162278F, 3.548134F, 3.981072F}; + + /* DG Parameter */ + ssp_para_obj = para; + dg_obj = dg; + ssp_para_obj->para_dg_target = MIN(MAX(ssp_para_obj->para_dg_target, 1), 12); /* target 0dB if disable DG_ENABLE */ + dg_obj->cut_gain = dg_cut_tab[ssp_para_obj->para_dg_target-1]; + dg_obj->boost_gain = dg_boost_tab[ssp_para_obj->para_dg_target-1]; + +} + +void apply_DG(short *pin, short *pout, dg_struct *dg, int frame_size) +{ + int i; + float tmp; + dg_struct *dg_obj; + + dg_obj = dg; + for (i=0;i<frame_size;i++) { + tmp = (float)(pin[i])/(float)(32768.0F)*dg_obj->cut_gain; + if (tmp < 0.0F) { + pout[i] = ROUND_NEG(tmp*(int)(32768)); + } else { + pout[i] = ROUND_POS(tmp*(short)(32767)); + } + } + +} + +void compen_DG(short *pin, short *pout, dg_struct *dg, int frame_size) +{ + int i; + float tmp; + dg_struct *dg_obj; + + dg_obj = dg; + for (i=0;i<frame_size;i++) { + tmp = (float)(pin[i])/(float)(32768.0F)*dg_obj->boost_gain; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + if (tmp < 0.0F) { + pout[i] = ROUND_NEG(tmp*(int)(32768)); + } else { + pout[i] = ROUND_POS(tmp*(short)(32767)); + } + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dg.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dg.h new file mode 100755 index 000000000..b8e630d34 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dg.h @@ -0,0 +1,20 @@ + +#ifndef DG_H +#define DG_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "struct.h" +#include "tmwtypes.h" + +/* Function Declarations */ +extern void DG_para(dg_struct *dg, ssp_para_struct *para); +extern void apply_DG(short *pin, short *pout, dg_struct *dg, int frame_size); +extern void compen_DG(short *pin, short *pout, dg_struct *dg, int frame_size); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dg.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dg.o new file mode 100644 index 0000000000000000000000000000000000000000..5538a299f79717ab05715cf56bcb5e2b8385893b GIT binary patch literal 10056 zcmc&)33Oc5dA@IEw9Jz%%aUx#n;1JX7%Ytz3t2X{B(JiJZOIlP;831NGo#ViqnTkA zFABkK10;duu$IyWaLg7$DJc$6Xh?xT2&vPM1}M;$hQ%x=#0qvmW_Q2u&i_VF2GX9> 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(st->amp_inst_band[k] - st->noisy_st_trough[k] > 0.0F) { + alpha = 0.98F; + } else { + alpha = 0.5F; + } + + st->noisy_st_trough[k] = alpha * st->noisy_st_trough[k] + (1.0F - alpha) * st->amp_inst_band[k]; + if (st->amp_inst_band[k] - st->noisy_st_peak[k] > 0.0F) { + alpha = 0.9F; + } else { + alpha = 0.93F; + } + + st->noisy_st_peak[k] = alpha * st->noisy_st_peak[k] + (1.0F - alpha) * st->amp_inst_band[k]; + + /* to make sure noisy_st_peak cannot go up too much, now maximal 24 dB range */ + if (st->noisy_st_peak[k] / 16.0F - st->noisy_st_trough[k] > 0.0F) { + st->noisy_st_peak[k] = st->noisy_st_trough[k] * 16.0F; + } + + /* the smaller the threshold, the faster to suppress noise but easily introduce more speech distortion as trade-off */ + if (st->noisy_st_peak[k] * 0.5012F - st->noisy_st_trough[k] > 0.0F) { + DR_bin_cnt++; + } + } + + if (DR_bin_cnt == 0.0F) { + DR_bin_cnt = st->vad_dr_cnt - 1.0F; + if (0.0F > DR_bin_cnt) { + DR_bin_cnt = 0.0F; + } + + st->vad_dr_cnt = DR_bin_cnt; + if (DR_bin_cnt == 0.0F) { + st->vad_dr = 0.0F; + } + } else { + st->vad_dr = 1.0F; + if (st->Fs == 16000.0F) { + st->vad_dr_cnt = 7.0F; + } else { + if (st->Fs == 8000.0F) { + st->vad_dr_cnt = 7.0F; + } + } + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dr_detection.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dr_detection.h new file mode 100755 index 000000000..07441bbd9 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dr_detection.h @@ -0,0 +1,16 @@ + +#ifndef DR_DETECTION_H +#define DR_DETECTION_H + +/* Include files */ +#include <stddef.h> +#include <stdlib.h> +#include "tmwtypes.h" +#include "struct.h" + +/* Function Declarations */ +extern void dr_detection(NRState *st); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dr_detection.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/dr_detection.o new file mode 100644 index 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+ + /* Include files */ +#include <stdio.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "struct.h" +#include "define.h" +#include "eq.h" + +/* Function Definitions */ +void equalizer_para(cascaded_iir_struct *spk_eq_obj, ssp_para_struct *para, float Fs) +{ + short i, j; + ssp_para_struct *ssp_para; + float kcoef[5], vcoef[5], qfactor[5]; + float num[3], den[3], filter_gain; + static float fs8k_kcoef_tab[10] = {0.03929011F,0.07870170F,0.09849140F,0.13831677F,0.19891237F, + 0.32491970F,0.50952548F,1.49660575F,3.54573250F,254.64660645F}; + static float fs16k_kcoef_tab[11] = {0.01963748F,0.03929011F,0.04912685F,0.06883073F,0.09849140F, + 0.15838444F,0.24007876F,0.53451115F,0.75698018F,0.99608070F,509.29516602F}; + static float vcoef_tab[61] = {0.01000000F,0.01122018F,0.01258925F,0.01412538F,0.01584893F, + 0.01778279F,0.01995262F,0.02238721F,0.02511887F,0.02818383F,0.03162277F,0.03548134F, + 0.03981072F,0.04466836F,0.05011872F,0.05623413F,0.06309573F,0.07079457F,0.07943282F, + 0.08912510F,0.10000000F,0.11220185F,0.12589253F,0.14125375F,0.15848932F,0.17782794F, + 0.19952624F,0.22387211F,0.25118864F,0.28183830F,0.31622776F,0.35481340F,0.39810717F, + 0.44668359F,0.50118721F,0.56234133F,0.63095737F,0.70794576F,0.79432821F,0.89125091F, + 1.00000000F,1.12201846F,1.25892544F,1.41253757F,1.58489323F,1.77827942F,1.99526227F, + 2.23872113F,2.51188636F,2.81838298F,3.16227770F,3.54813385F,3.98107171F,4.46683598F, + 5.01187229F,5.62341309F,6.30957365F,7.07945776F,7.94328213F,8.91250896F,10.00000000F}; + static float qfactor_tab[18] = {0.01F, 0.05F, 0.1F, 0.2F, 0.3F, 0.4F, 0.5F, 0.6F, 0.7F, 0.8F, 0.9F, 1.0F, 1.5F, + 2.0F, 3.0F, 9.0F, 27.0F, 45.0F}; + + /* Equalizer Parameter */ + ssp_para = para; + ssp_para->para_spk_eq_nband = MIN(MAX(ssp_para->para_spk_eq_nband, 1), 5); + for(i = 0; i < ssp_para->para_spk_eq_nband; i++) { + if (8000.0F == Fs) { + ssp_para->para_spk_eq_freq[i] = MIN(MAX(ssp_para->para_spk_eq_freq[i], 0), 9); + kcoef[i] = fs8k_kcoef_tab[ssp_para->para_spk_eq_freq[i]]; + } else { + ssp_para->para_spk_eq_freq[i] = MIN(MAX(ssp_para->para_spk_eq_freq[i], 0), 10); + kcoef[i] = fs16k_kcoef_tab[ssp_para->para_spk_eq_freq[i]]; + } + + ssp_para->para_spk_eq_gain[i] = MIN(MAX(ssp_para->para_spk_eq_gain[i], 0), 60); + vcoef[i] = vcoef_tab[ssp_para->para_spk_eq_gain[i]]; + + ssp_para->para_spk_eq_qfactor[i] = MIN(MAX(ssp_para->para_spk_eq_qfactor[i], 0), 17); + qfactor[i] = qfactor_tab[ssp_para->para_spk_eq_qfactor[i]]; + } + + /* IIR filter */ + spk_eq_obj->b0 = FLOAT_ONE; + for(i = 0; i < ssp_para->para_spk_eq_nband; i++) { + if (FLOAT_ONE == vcoef[i]) { /* linear gain = 1 */ + filter_gain = FLOAT_ONE; + den[0] = FLOAT_ONE; + num[0] = FLOAT_ONE; + den[1] = FLOAT_ZERO; + num[1] = FLOAT_ZERO; + den[2] = FLOAT_ZERO; + num[2] = FLOAT_ZERO; + } else { + num[0] = 1.0F+vcoef[i]*kcoef[i]/qfactor[i]+kcoef[i]*kcoef[i]; + num[1] = 2.0F*(kcoef[i]*kcoef[i]-1); + num[2] = 1.0F-vcoef[i]*kcoef[i]/qfactor[i] + kcoef[i]*kcoef[i]; + den[0] = 1.0F+kcoef[i]/qfactor[i] + kcoef[i]*kcoef[i]; + den[1] = 2.0F*(kcoef[i]*kcoef[i]-1); + den[2] = 1.0F-kcoef[i]/qfactor[i] + kcoef[i]*kcoef[i]; + filter_gain = num[0]/den[0]; + for (j = 2; j >= 0 ; j--) { + num[j] = num[j]/num[0]; + den[j] = den[j]/den[0]; + } + } + spk_eq_obj->coef[0+4*i] = num[2]; + spk_eq_obj->coef[1+4*i] = num[1]; + spk_eq_obj->coef[2+4*i] = den[2]; + spk_eq_obj->coef[3+4*i] = den[1]; + spk_eq_obj->b0 *= filter_gain; + } + + spk_eq_obj->stage = ssp_para->para_spk_eq_nband; + +} + +void equalizer_init(cascaded_iir_struct *spk_eq_obj, float *spk_eq_state) +{ + short i; + + for(i = 0; i < 12; i++) { + spk_eq_state[i] = FLOAT_ZERO; + } + spk_eq_obj->pstate = spk_eq_state; + +} + +void equalizer(short *pin, short *pout, cascaded_iir_struct *eq, short frame_size) +{ + short i, j; + short *ptr1, *ptr2; + float *pst, *pcoef; + float acc0, acc1, xn, xn1, xn2, yn2; + float yn1 = 0.0; + + ptr1 = pin; + ptr2 = pout; + + for(i = 0; i < frame_size; i++) { + pcoef = &eq->coef[0]; + pst = eq->pstate; + xn = (float)(*ptr1++)/(float)(32768.0F); /* x(n) */ + acc0 = xn*eq->b0; + //acc0 = xn*ABS(eq->b0); + + for(j = eq->stage; j > 0; j--) { + xn2 = *pst++; /* take x(n-2) */ + acc1 = acc0 + (xn2)*(*pcoef++); + + xn1 = *pst++; /* take x(n-1) */ + acc1 += (xn1)*(*pcoef++); + + yn2 = *pst++; /* take y(n-2) */ + acc1 -= (yn2)*(*pcoef++); + + yn1 = *pst; /* take y(n-1) */ + + pst -= 3; /* point to x(n-2) */ + *pst++ = xn1; /* update x(n-2) */ + *pst++ = acc0; /* update x(n-1), point to y(n-2) */ + acc0 = acc1 - (yn1)*(*pcoef++); + } + + *pst++ = yn1; /* update y(n-2) */ + *pst = acc0; /* update y(n-1) */ + + acc0 = MIN(MAX(acc0, -1.0F), 1.0F); + if (acc0 < 0.0F) + *ptr2++ = ROUND_NEG(acc0*(int)(32768)); /* y(n) */ + else + *ptr2++ = ROUND_POS(acc0*(short)(32767)); /* y(n) */ + + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/eq.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/eq.h new file mode 100755 index 000000000..d550ffe64 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/eq.h @@ -0,0 +1,20 @@ + +#ifndef EQ_H +#define EQ_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "struct.h" +#include "tmwtypes.h" + +/* Function Declarations */ +void equalizer_para(cascaded_iir_struct *spk_eq_obj, ssp_para_struct *para, float Fs); +void equalizer_init(cascaded_iir_struct *spk_eq_obj, float *spk_eq_state); +void equalizer(short *pin, short *pout, cascaded_iir_struct *eq, short frame_size); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/eq.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/eq.o new file mode 100644 index 0000000000000000000000000000000000000000..051f535712bead90aea308d25c7ed80f29b548fc GIT binary patch literal 13756 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zXV!boB@jrxT$}8AbK%(b4Y8`g;BpSx$<{eRT;R{Elm|v^2Twd~f0JQnmw{Ma0e>D6 zl5AZuh)jP6;g9vwALp0tuL^c{8M;V7`2ohxPPXon5&m9)Kd!0thsWKtzstm*-NrDC zzLH~mv+APHB_r(4!x3Dj6K$ARik+>f^4OGxv|;j(u&eRlSxsxK3){=Y=e^8+`E5qO za80rMB?>!q!+<V?%Q25qbv6UE>*e`JMt7-k)k^KOl^J#v+4m4g^{z)LelHGC709f& R5Sg)M`rAJ3!gkoM{|yw{g6jYP literal 0 HcmV?d00001 diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.c new file mode 100755 index 000000000..d4bc67ba2 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.c @@ -0,0 +1,1242 @@ +/************************************************************************** * */ +/* FFT implementation minus cosine transforms, minus all but radix 2/4 case + * We only need this cut-down version. To do more than just power-of-two sized vectors + * + * Note that the packing is a little strange; rather than the FFT r/i + * packing following R_0, I_0, R_1, I_1, R_2, I_2 ... R_n-1, I_n-1, + * it follows R_0, R_1, I_1, R_2, I_2 ... R_n-1, I_n-1, R_n */ +/************************************************************************** * */ + +/* Include files */ +#include <math.h> +#include "define.h" +#include "memalloc.h" +#include "fftcore.h" + +/* Function Definitions */ +static void drfti1(int n, float *wa, int *ifac){ + static int ntryh[4] = { 4,2,3,5 }; + static float tpi = 6.28318530717958648f; + float arg,argh,argld,fi; + int ntry=0,i,j=-1; + int k1, l1, l2, ib; + int ld, ii, ip, is, nq, nr; + int ido, ipm, nfm1; + int nl=n; + int nf=0; + + L101: + j++; + if (j < 4) + ntry=ntryh[j]; + else + ntry+=2; + + L104: + nq=nl/ntry; + nr=nl-ntry*nq; + if (nr!=0) goto L101; + + nf++; + ifac[nf+1]=ntry; + nl=nq; + if(ntry!=2)goto L107; + if(nf==1)goto L107; + + for (i=1;i<nf;i++){ + ib=nf-i+1; + ifac[ib+1]=ifac[ib]; + } + ifac[2] = 2; + + L107: + if(nl!=1)goto L104; + ifac[0]=n; + ifac[1]=nf; + argh=tpi/n; + is=0; + nfm1=nf-1; + l1=1; + + if(nfm1==0)return; + + for (k1=0;k1<nfm1;k1++){ + ip=ifac[k1+2]; + ld=0; + l2=l1*ip; + ido=n/l2; + ipm=ip-1; + + for (j=0;j<ipm;j++){ + ld+=l1; + i=is; + argld=(float)ld*argh; + fi=0.f; + for (ii=2;ii<ido;ii+=2){ + fi+=1.f; + arg=fi*argld; + wa[i++]=(float)cos(arg); + wa[i++]=(float)sin(arg); + } + is+=ido; + } + l1=l2; + } +} + +static void fdrffti(int n, float *wsave, int *ifac){ + + if (n == 1) return; + drfti1(n, wsave+n, ifac); +} + +static void dradf2(int ido,int l1,float *cc,float *ch,float *wa1){ + int i,k; + float ti2,tr2; + int t0,t1,t2,t3,t4,t5,t6; + + t1=0; + t0=(t2=l1*ido); + t3=ido<<1; + for(k=0;k<l1;k++){ + ch[t1<<1]=cc[t1]+cc[t2]; + ch[(t1<<1)+t3-1]=cc[t1]-cc[t2]; + t1+=ido; + t2+=ido; + } + + if(ido<2)return; + if(ido==2)goto L105; + + t1=0; + t2=t0; + for(k=0;k<l1;k++){ + t3=t2; + t4=(t1<<1)+(ido<<1); + t5=t1; + t6=t1+t1; + for(i=2;i<ido;i+=2){ + t3+=2; + t4-=2; + t5+=2; + t6+=2; + tr2=wa1[i-2]*cc[t3-1]+wa1[i-1]*cc[t3]; + ti2=wa1[i-2]*cc[t3]-wa1[i-1]*cc[t3-1]; + ch[t6]=cc[t5]+ti2; + ch[t4]=ti2-cc[t5]; + ch[t6-1]=cc[t5-1]+tr2; + ch[t4-1]=cc[t5-1]-tr2; + } + t1+=ido; + t2+=ido; + } + + if(ido%2==1)return; + + L105: + t3=(t2=(t1=ido)-1); + t2+=t0; + for(k=0;k<l1;k++){ + ch[t1]=-cc[t2]; + ch[t1-1]=cc[t3]; + t1+=ido<<1; + t2+=ido; + t3+=ido; + } +} + +static void dradf4(int ido,int l1,float *cc,float *ch,float *wa1, + float *wa2,float *wa3){ + static float hsqt2 = .70710678118654752f; + int i,k,t0,t1,t2,t3,t4,t5,t6; + float ci2,ci3,ci4,cr2,cr3,cr4,ti1,ti2,ti3,ti4,tr1,tr2,tr3,tr4; + t0=l1*ido; + + t1=t0; + t4=t1<<1; + t2=t1+(t1<<1); + t3=0; + + for(k=0;k<l1;k++){ + tr1=cc[t1]+cc[t2]; + tr2=cc[t3]+cc[t4]; + + ch[t5=t3<<2]=tr1+tr2; + ch[(ido<<2)+t5-1]=tr2-tr1; + ch[(t5+=(ido<<1))-1]=cc[t3]-cc[t4]; + ch[t5]=cc[t2]-cc[t1]; + + t1+=ido; + t2+=ido; + t3+=ido; + t4+=ido; + } + + if(ido<2)return; + if(ido==2)goto L105; + + + t1=0; + for(k=0;k<l1;k++){ + t2=t1; + t4=t1<<2; + t5=(t6=ido<<1)+t4; + for(i=2;i<ido;i+=2){ + t3=(t2+=2); + t4+=2; + t5-=2; + + t3+=t0; + cr2=wa1[i-2]*cc[t3-1]+wa1[i-1]*cc[t3]; + ci2=wa1[i-2]*cc[t3]-wa1[i-1]*cc[t3-1]; + t3+=t0; + cr3=wa2[i-2]*cc[t3-1]+wa2[i-1]*cc[t3]; + ci3=wa2[i-2]*cc[t3]-wa2[i-1]*cc[t3-1]; + t3+=t0; + cr4=wa3[i-2]*cc[t3-1]+wa3[i-1]*cc[t3]; + ci4=wa3[i-2]*cc[t3]-wa3[i-1]*cc[t3-1]; + + tr1=cr2+cr4; + tr4=cr4-cr2; + ti1=ci2+ci4; + ti4=ci2-ci4; + + ti2=cc[t2]+ci3; + ti3=cc[t2]-ci3; + tr2=cc[t2-1]+cr3; + tr3=cc[t2-1]-cr3; + + ch[t4-1]=tr1+tr2; + ch[t4]=ti1+ti2; + + ch[t5-1]=tr3-ti4; + ch[t5]=tr4-ti3; + + ch[t4+t6-1]=ti4+tr3; + ch[t4+t6]=tr4+ti3; + + ch[t5+t6-1]=tr2-tr1; + ch[t5+t6]=ti1-ti2; + } + t1+=ido; + } + if(ido&1)return; + + L105: + + t2=(t1=t0+ido-1)+(t0<<1); + t3=ido<<2; + t4=ido; + t5=ido<<1; + t6=ido; + + for(k=0;k<l1;k++){ + ti1=-hsqt2*(cc[t1]+cc[t2]); + tr1=hsqt2*(cc[t1]-cc[t2]); + + ch[t4-1]=tr1+cc[t6-1]; + ch[t4+t5-1]=cc[t6-1]-tr1; + + ch[t4]=ti1-cc[t1+t0]; + ch[t4+t5]=ti1+cc[t1+t0]; + + t1+=ido; + t2+=ido; + t4+=t3; + t6+=ido; + } +} + +static void dradfg(int ido,int ip,int l1,int idl1,float *cc,float *c1, + float *c2,float *ch,float *ch2,float *wa){ + + static float tpi=6.283185307179586f; + int idij,ipph,i,j,k,l,ic,ik,is; + int t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,t10; + float dc2,ai1,ai2,ar1,ar2,ds2; + int nbd; + float dcp,arg,dsp,ar1h,ar2h; + int idp2,ipp2; + + arg=tpi/(float)ip; + dcp=(float)cos(arg); + dsp=(float)sin(arg); + ipph=(ip+1)>>1; + ipp2=ip; + idp2=ido; + nbd=(ido-1)>>1; + t0=l1*ido; + t10=ip*ido; + + if(ido==1)goto L119; + for(ik=0;ik<idl1;ik++)ch2[ik]=c2[ik]; + + t1=0; + for(j=1;j<ip;j++){ + t1+=t0; + t2=t1; + for(k=0;k<l1;k++){ + ch[t2]=c1[t2]; + t2+=ido; + } + } + + is=-ido; + t1=0; + if(nbd>l1){ + for(j=1;j<ip;j++){ + t1+=t0; + is+=ido; + t2= -ido+t1; + for(k=0;k<l1;k++){ + idij=is-1; + t2+=ido; + t3=t2; + for(i=2;i<ido;i+=2){ + idij+=2; + t3+=2; + ch[t3-1]=wa[idij-1]*c1[t3-1]+wa[idij]*c1[t3]; + ch[t3]=wa[idij-1]*c1[t3]-wa[idij]*c1[t3-1]; + } + } + } + }else{ + + for(j=1;j<ip;j++){ + is+=ido; + idij=is-1; + t1+=t0; + t2=t1; + for(i=2;i<ido;i+=2){ + idij+=2; + t2+=2; + t3=t2; + for(k=0;k<l1;k++){ + ch[t3-1]=wa[idij-1]*c1[t3-1]+wa[idij]*c1[t3]; + ch[t3]=wa[idij-1]*c1[t3]-wa[idij]*c1[t3-1]; + t3+=ido; + } + } + } + } + + t1=0; + t2=ipp2*t0; + if(nbd<l1){ + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + for(i=2;i<ido;i+=2){ + t3+=2; + t4+=2; + t5=t3-ido; + t6=t4-ido; + for(k=0;k<l1;k++){ + t5+=ido; + t6+=ido; + c1[t5-1]=ch[t5-1]+ch[t6-1]; + c1[t6-1]=ch[t5]-ch[t6]; + c1[t5]=ch[t5]+ch[t6]; + c1[t6]=ch[t6-1]-ch[t5-1]; + } + } + } + }else{ + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + for(k=0;k<l1;k++){ + t5=t3; + t6=t4; + for(i=2;i<ido;i+=2){ + t5+=2; + t6+=2; + c1[t5-1]=ch[t5-1]+ch[t6-1]; + c1[t6-1]=ch[t5]-ch[t6]; + c1[t5]=ch[t5]+ch[t6]; + c1[t6]=ch[t6-1]-ch[t5-1]; + } + t3+=ido; + t4+=ido; + } + } + } + +L119: + for(ik=0;ik<idl1;ik++)c2[ik]=ch2[ik]; + + t1=0; + t2=ipp2*idl1; + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1-ido; + t4=t2-ido; + for(k=0;k<l1;k++){ + t3+=ido; + t4+=ido; + c1[t3]=ch[t3]+ch[t4]; + c1[t4]=ch[t4]-ch[t3]; + } + } + + ar1=1.f; + ai1=0.f; + t1=0; + t2=ipp2*idl1; + t3=(ip-1)*idl1; + for(l=1;l<ipph;l++){ + t1+=idl1; + t2-=idl1; + ar1h=dcp*ar1-dsp*ai1; + ai1=dcp*ai1+dsp*ar1; + ar1=ar1h; + t4=t1; + t5=t2; + t6=t3; + t7=idl1; + + for(ik=0;ik<idl1;ik++){ + ch2[t4++]=c2[ik]+ar1*c2[t7++]; + ch2[t5++]=ai1*c2[t6++]; + } + + dc2=ar1; + ds2=ai1; + ar2=ar1; + ai2=ai1; + + t4=idl1; + t5=(ipp2-1)*idl1; + for(j=2;j<ipph;j++){ + t4+=idl1; + t5-=idl1; + + ar2h=dc2*ar2-ds2*ai2; + ai2=dc2*ai2+ds2*ar2; + ar2=ar2h; + + t6=t1; + t7=t2; + t8=t4; + t9=t5; + for(ik=0;ik<idl1;ik++){ + ch2[t6++]+=ar2*c2[t8++]; + ch2[t7++]+=ai2*c2[t9++]; + } + } + } + + t1=0; + for(j=1;j<ipph;j++){ + t1+=idl1; + t2=t1; + for(ik=0;ik<idl1;ik++)ch2[ik]+=c2[t2++]; + } + + if(ido<l1)goto L132; + + t1=0; + t2=0; + for(k=0;k<l1;k++){ + t3=t1; + t4=t2; + for(i=0;i<ido;i++)cc[t4++]=ch[t3++]; + t1+=ido; + t2+=t10; + } + + goto L135; + + L132: + for(i=0;i<ido;i++){ + t1=i; + t2=i; + for(k=0;k<l1;k++){ + cc[t2]=ch[t1]; + t1+=ido; + t2+=t10; + } + } + + L135: + t1=0; + t2=ido<<1; + t3=0; + t4=ipp2*t0; + for(j=1;j<ipph;j++){ + + t1+=t2; + t3+=t0; + t4-=t0; + + t5=t1; + t6=t3; + t7=t4; + + for(k=0;k<l1;k++){ + cc[t5-1]=ch[t6]; + cc[t5]=ch[t7]; + t5+=t10; + t6+=ido; + t7+=ido; + } + } + + if(ido==1)return; + if(nbd<l1)goto L141; + + t1=-ido; + t3=0; + t4=0; + t5=ipp2*t0; + for(j=1;j<ipph;j++){ + t1+=t2; + t3+=t2; + t4+=t0; + t5-=t0; + t6=t1; + t7=t3; + t8=t4; + t9=t5; + for(k=0;k<l1;k++){ + for(i=2;i<ido;i+=2){ + ic=idp2-i; + cc[i+t7-1]=ch[i+t8-1]+ch[i+t9-1]; + cc[ic+t6-1]=ch[i+t8-1]-ch[i+t9-1]; + cc[i+t7]=ch[i+t8]+ch[i+t9]; + cc[ic+t6]=ch[i+t9]-ch[i+t8]; + } + t6+=t10; + t7+=t10; + t8+=ido; + t9+=ido; + } + } + return; + + L141: + + t1=-ido; + t3=0; + t4=0; + t5=ipp2*t0; + for(j=1;j<ipph;j++){ + t1+=t2; + t3+=t2; + t4+=t0; + t5-=t0; + for(i=2;i<ido;i+=2){ + t6=idp2+t1-i; + t7=i+t3; + t8=i+t4; + t9=i+t5; + for(k=0;k<l1;k++){ + cc[t7-1]=ch[t8-1]+ch[t9-1]; + cc[t6-1]=ch[t8-1]-ch[t9-1]; + cc[t7]=ch[t8]+ch[t9]; + cc[t6]=ch[t9]-ch[t8]; + t6+=t10; + t7+=t10; + t8+=ido; + t9+=ido; + } + } + } +} + +static void drftf1(int n,float *c,float *ch,float *wa,int *ifac){ + int i,k1,l1,l2; + int na,kh,nf; + int ip,iw,ido,idl1,ix2,ix3; + + nf=ifac[1]; + na=1; + l2=n; + iw=n; + + for(k1=0;k1<nf;k1++){ + kh=nf-k1; + ip=ifac[kh+1]; + l1=l2/ip; + ido=n/l2; + idl1=ido*l1; + iw-=(ip-1)*ido; + na=1-na; + + if(ip!=4)goto L102; + + ix2=iw+ido; + ix3=ix2+ido; + if(na!=0) + dradf4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + else + dradf4(ido,l1,c,ch,wa+iw-1,wa+ix2-1,wa+ix3-1); + goto L110; + + L102: + if(ip!=2)goto L104; + if(na!=0)goto L103; + + dradf2(ido,l1,c,ch,wa+iw-1); + goto L110; + + L103: + dradf2(ido,l1,ch,c,wa+iw-1); + goto L110; + + L104: + if(ido==1)na=1-na; + if(na!=0)goto L109; + + dradfg(ido,ip,l1,idl1,c,c,c,ch,ch,wa+iw-1); + na=1; + goto L110; + + L109: + dradfg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + na=0; + + L110: + l2=l1; + } + + if(na==1)return; + + for(i=0;i<n;i++)c[i]=ch[i]; +} + +static void dradb2(int ido,int l1,float *cc,float *ch,float *wa1){ + int i,k,t0,t1,t2,t3,t4,t5,t6; + float ti2,tr2; + + t0=l1*ido; + + t1=0; + t2=0; + t3=(ido<<1)-1; + for(k=0;k<l1;k++){ + ch[t1]=cc[t2]+cc[t3+t2]; + ch[t1+t0]=cc[t2]-cc[t3+t2]; + t2=(t1+=ido)<<1; + } + + if(ido<2)return; + if(ido==2)goto L105; + + t1=0; + t2=0; + for(k=0;k<l1;k++){ + t3=t1; + t5=(t4=t2)+(ido<<1); + t6=t0+t1; + for(i=2;i<ido;i+=2){ + t3+=2; + t4+=2; + t5-=2; + t6+=2; + ch[t3-1]=cc[t4-1]+cc[t5-1]; + tr2=cc[t4-1]-cc[t5-1]; + ch[t3]=cc[t4]-cc[t5]; + ti2=cc[t4]+cc[t5]; + ch[t6-1]=wa1[i-2]*tr2-wa1[i-1]*ti2; + ch[t6]=wa1[i-2]*ti2+wa1[i-1]*tr2; + } + t2=(t1+=ido)<<1; + } + + if(ido%2==1)return; + +L105: + t1=ido-1; + t2=ido-1; + for(k=0;k<l1;k++){ + ch[t1]=cc[t2]+cc[t2]; + ch[t1+t0]=-(cc[t2+1]+cc[t2+1]); + t1+=ido; + t2+=ido<<1; + } +} + +static void dradb3(int ido,int l1,float *cc,float *ch,float *wa1, + float *wa2){ + static float taur = -.5f; + static float taui = .8660254037844386f; + int i,k,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,t10; + float ci2,ci3,di2,di3,cr2,cr3,dr2,dr3,ti2,tr2; + t0=l1*ido; + + t1=0; + t2=t0<<1; + t3=ido<<1; + t4=ido+(ido<<1); + t5=0; + for(k=0;k<l1;k++){ + tr2=cc[t3-1]+cc[t3-1]; + cr2=cc[t5]+(taur*tr2); + ch[t1]=cc[t5]+tr2; + ci3=taui*(cc[t3]+cc[t3]); + ch[t1+t0]=cr2-ci3; + ch[t1+t2]=cr2+ci3; + t1+=ido; + t3+=t4; + t5+=t4; + } + + if(ido==1)return; + + t1=0; + t3=ido<<1; + for(k=0;k<l1;k++){ + t7=t1+(t1<<1); + t6=(t5=t7+t3); + t8=t1; + t10=(t9=t1+t0)+t0; + + for(i=2;i<ido;i+=2){ + t5+=2; + t6-=2; + t7+=2; + t8+=2; + t9+=2; + t10+=2; + tr2=cc[t5-1]+cc[t6-1]; + cr2=cc[t7-1]+(taur*tr2); + ch[t8-1]=cc[t7-1]+tr2; + ti2=cc[t5]-cc[t6]; + ci2=cc[t7]+(taur*ti2); + ch[t8]=cc[t7]+ti2; + cr3=taui*(cc[t5-1]-cc[t6-1]); + ci3=taui*(cc[t5]+cc[t6]); + dr2=cr2-ci3; + dr3=cr2+ci3; + di2=ci2+cr3; + di3=ci2-cr3; + ch[t9-1]=wa1[i-2]*dr2-wa1[i-1]*di2; + ch[t9]=wa1[i-2]*di2+wa1[i-1]*dr2; + ch[t10-1]=wa2[i-2]*dr3-wa2[i-1]*di3; + ch[t10]=wa2[i-2]*di3+wa2[i-1]*dr3; + } + t1+=ido; + } +} + +static void dradb4(int ido,int l1,float *cc,float *ch,float *wa1, + float *wa2,float *wa3){ + static float sqrt2=1.414213562373095f; + int i,k,t0,t1,t2,t3,t4,t5,t6,t7,t8; + float ci2,ci3,ci4,cr2,cr3,cr4,ti1,ti2,ti3,ti4,tr1,tr2,tr3,tr4; + t0=l1*ido; + + t1=0; + t2=ido<<2; + t3=0; + t6=ido<<1; + for(k=0;k<l1;k++){ + t4=t3+t6; + t5=t1; + tr3=cc[t4-1]+cc[t4-1]; + tr4=cc[t4]+cc[t4]; + tr1=cc[t3]-cc[(t4+=t6)-1]; + tr2=cc[t3]+cc[t4-1]; + ch[t5]=tr2+tr3; + ch[t5+=t0]=tr1-tr4; + ch[t5+=t0]=tr2-tr3; + ch[t5+=t0]=tr1+tr4; + t1+=ido; + t3+=t2; + } + + if(ido<2)return; + if(ido==2)goto L105; + + t1=0; + for(k=0;k<l1;k++){ + t5=(t4=(t3=(t2=t1<<2)+t6))+t6; + t7=t1; + for(i=2;i<ido;i+=2){ + t2+=2; + t3+=2; + t4-=2; + t5-=2; + t7+=2; + ti1=cc[t2]+cc[t5]; + ti2=cc[t2]-cc[t5]; + ti3=cc[t3]-cc[t4]; + tr4=cc[t3]+cc[t4]; + tr1=cc[t2-1]-cc[t5-1]; + tr2=cc[t2-1]+cc[t5-1]; + ti4=cc[t3-1]-cc[t4-1]; + tr3=cc[t3-1]+cc[t4-1]; + ch[t7-1]=tr2+tr3; + cr3=tr2-tr3; + ch[t7]=ti2+ti3; + ci3=ti2-ti3; + cr2=tr1-tr4; + cr4=tr1+tr4; + ci2=ti1+ti4; + ci4=ti1-ti4; + + ch[(t8=t7+t0)-1]=wa1[i-2]*cr2-wa1[i-1]*ci2; + ch[t8]=wa1[i-2]*ci2+wa1[i-1]*cr2; + ch[(t8+=t0)-1]=wa2[i-2]*cr3-wa2[i-1]*ci3; + ch[t8]=wa2[i-2]*ci3+wa2[i-1]*cr3; + ch[(t8+=t0)-1]=wa3[i-2]*cr4-wa3[i-1]*ci4; + ch[t8]=wa3[i-2]*ci4+wa3[i-1]*cr4; + } + t1+=ido; + } + + if(ido%2 == 1)return; + + L105: + + t1=ido; + t2=ido<<2; + t3=ido-1; + t4=ido+(ido<<1); + for(k=0;k<l1;k++){ + t5=t3; + ti1=cc[t1]+cc[t4]; + ti2=cc[t4]-cc[t1]; + tr1=cc[t1-1]-cc[t4-1]; + tr2=cc[t1-1]+cc[t4-1]; + ch[t5]=tr2+tr2; + ch[t5+=t0]=sqrt2*(tr1-ti1); + ch[t5+=t0]=ti2+ti2; + ch[t5+=t0]=-sqrt2*(tr1+ti1); + + t3+=ido; + t1+=t2; + t4+=t2; + } +} + +static void dradbg(int ido,int ip,int l1,int idl1,float *cc,float *c1, + float *c2,float *ch,float *ch2,float *wa){ + static float tpi=6.283185307179586f; + int idij,ipph,i,j,k,l,ik,is,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,t10, + t11,t12; + float dc2,ai1,ai2,ar1,ar2,ds2; + int nbd; + float dcp,arg,dsp,ar1h,ar2h; + int ipp2; + + t10=ip*ido; + t0=l1*ido; + arg=tpi/(float)ip; + dcp=(float)cos(arg); + dsp=(float)sin(arg); + nbd=(ido-1)>>1; + ipp2=ip; + ipph=(ip+1)>>1; + if(ido<l1)goto L103; + + t1=0; + t2=0; + for(k=0;k<l1;k++){ + t3=t1; + t4=t2; + for(i=0;i<ido;i++){ + ch[t3]=cc[t4]; + t3++; + t4++; + } + t1+=ido; + t2+=t10; + } + goto L106; + + L103: + t1=0; + for(i=0;i<ido;i++){ + t2=t1; + t3=t1; + for(k=0;k<l1;k++){ + ch[t2]=cc[t3]; + t2+=ido; + t3+=t10; + } + t1++; + } + + L106: + t1=0; + t2=ipp2*t0; + t7=(t5=ido<<1); + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + t6=t5; + for(k=0;k<l1;k++){ + ch[t3]=cc[t6-1]+cc[t6-1]; + ch[t4]=cc[t6]+cc[t6]; + t3+=ido; + t4+=ido; + t6+=t10; + } + t5+=t7; + } + + if (ido == 1)goto L116; + if(nbd<l1)goto L112; + + t1=0; + t2=ipp2*t0; + t7=0; + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + + t7+=(ido<<1); + t8=t7; + for(k=0;k<l1;k++){ + t5=t3; + t6=t4; + t9=t8; + t11=t8; + for(i=2;i<ido;i+=2){ + t5+=2; + t6+=2; + t9+=2; + t11-=2; + ch[t5-1]=cc[t9-1]+cc[t11-1]; + ch[t6-1]=cc[t9-1]-cc[t11-1]; + ch[t5]=cc[t9]-cc[t11]; + ch[t6]=cc[t9]+cc[t11]; + } + t3+=ido; + t4+=ido; + t8+=t10; + } + } + goto L116; + + L112: + t1=0; + t2=ipp2*t0; + t7=0; + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + t7+=(ido<<1); + t8=t7; + t9=t7; + for(i=2;i<ido;i+=2){ + t3+=2; + t4+=2; + t8+=2; + t9-=2; + t5=t3; + t6=t4; + t11=t8; + t12=t9; + for(k=0;k<l1;k++){ + ch[t5-1]=cc[t11-1]+cc[t12-1]; + ch[t6-1]=cc[t11-1]-cc[t12-1]; + ch[t5]=cc[t11]-cc[t12]; + ch[t6]=cc[t11]+cc[t12]; + t5+=ido; + t6+=ido; + t11+=t10; + t12+=t10; + } + } + } + +L116: + ar1=1.f; + ai1=0.f; + t1=0; + t9=(t2=ipp2*idl1); + t3=(ip-1)*idl1; + for(l=1;l<ipph;l++){ + t1+=idl1; + t2-=idl1; + + ar1h=dcp*ar1-dsp*ai1; + ai1=dcp*ai1+dsp*ar1; + ar1=ar1h; + t4=t1; + t5=t2; + t6=0; + t7=idl1; + t8=t3; + for(ik=0;ik<idl1;ik++){ + c2[t4++]=ch2[t6++]+ar1*ch2[t7++]; + c2[t5++]=ai1*ch2[t8++]; + } + dc2=ar1; + ds2=ai1; + ar2=ar1; + ai2=ai1; + + t6=idl1; + t7=t9-idl1; + for(j=2;j<ipph;j++){ + t6+=idl1; + t7-=idl1; + ar2h=dc2*ar2-ds2*ai2; + ai2=dc2*ai2+ds2*ar2; + ar2=ar2h; + t4=t1; + t5=t2; + t11=t6; + t12=t7; + for(ik=0;ik<idl1;ik++){ + c2[t4++]+=ar2*ch2[t11++]; + c2[t5++]+=ai2*ch2[t12++]; + } + } + } + + t1=0; + for(j=1;j<ipph;j++){ + t1+=idl1; + t2=t1; + for(ik=0;ik<idl1;ik++)ch2[ik]+=ch2[t2++]; + } + + t1=0; + t2=ipp2*t0; + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + for(k=0;k<l1;k++){ + ch[t3]=c1[t3]-c1[t4]; + ch[t4]=c1[t3]+c1[t4]; + t3+=ido; + t4+=ido; + } + } + + if(ido==1)goto L132; + if(nbd<l1)goto L128; + + t1=0; + t2=ipp2*t0; + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + for(k=0;k<l1;k++){ + t5=t3; + t6=t4; + for(i=2;i<ido;i+=2){ + t5+=2; + t6+=2; + ch[t5-1]=c1[t5-1]-c1[t6]; + ch[t6-1]=c1[t5-1]+c1[t6]; + ch[t5]=c1[t5]+c1[t6-1]; + ch[t6]=c1[t5]-c1[t6-1]; + } + t3+=ido; + t4+=ido; + } + } + goto L132; + + L128: + t1=0; + t2=ipp2*t0; + for(j=1;j<ipph;j++){ + t1+=t0; + t2-=t0; + t3=t1; + t4=t2; + for(i=2;i<ido;i+=2){ + t3+=2; + t4+=2; + t5=t3; + t6=t4; + for(k=0;k<l1;k++){ + ch[t5-1]=c1[t5-1]-c1[t6]; + ch[t6-1]=c1[t5-1]+c1[t6]; + ch[t5]=c1[t5]+c1[t6-1]; + ch[t6]=c1[t5]-c1[t6-1]; + t5+=ido; + t6+=ido; + } + } + } + +L132: + if(ido==1)return; + + for(ik=0;ik<idl1;ik++)c2[ik]=ch2[ik]; + + t1=0; + for(j=1;j<ip;j++){ + t2=(t1+=t0); + for(k=0;k<l1;k++){ + c1[t2]=ch[t2]; + t2+=ido; + } + } + + if(nbd>l1)goto L139; + + is= -ido-1; + t1=0; + for(j=1;j<ip;j++){ + is+=ido; + t1+=t0; + idij=is; + t2=t1; + for(i=2;i<ido;i+=2){ + t2+=2; + idij+=2; + t3=t2; + for(k=0;k<l1;k++){ + c1[t3-1]=wa[idij-1]*ch[t3-1]-wa[idij]*ch[t3]; + c1[t3]=wa[idij-1]*ch[t3]+wa[idij]*ch[t3-1]; + t3+=ido; + } + } + } + return; + + L139: + is= -ido-1; + t1=0; + for(j=1;j<ip;j++){ + is+=ido; + t1+=t0; + t2=t1; + for(k=0;k<l1;k++){ + idij=is; + t3=t2; + for(i=2;i<ido;i+=2){ + idij+=2; + t3+=2; + c1[t3-1]=wa[idij-1]*ch[t3-1]-wa[idij]*ch[t3]; + c1[t3]=wa[idij-1]*ch[t3]+wa[idij]*ch[t3-1]; + } + t2+=ido; + } + } +} + +static void drftb1(int n, float *c, float *ch, float *wa, int *ifac){ + int i,k1,l1,l2; + int na; + int nf,ip,iw,ix2,ix3,ido,idl1; + + nf=ifac[1]; + na=0; + l1=1; + iw=1; + + for(k1=0;k1<nf;k1++){ + ip=ifac[k1 + 2]; + l2=ip*l1; + ido=n/l2; + idl1=ido*l1; + if(ip!=4)goto L103; + ix2=iw+ido; + ix3=ix2+ido; + + if(na!=0) + dradb4(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1); + else + dradb4(ido,l1,c,ch,wa+iw-1,wa+ix2-1,wa+ix3-1); + na=1-na; + goto L115; + + L103: + if(ip!=2)goto L106; + + if(na!=0) + dradb2(ido,l1,ch,c,wa+iw-1); + else + dradb2(ido,l1,c,ch,wa+iw-1); + na=1-na; + goto L115; + + L106: + if(ip!=3)goto L109; + + ix2=iw+ido; + if(na!=0) + dradb3(ido,l1,ch,c,wa+iw-1,wa+ix2-1); + else + dradb3(ido,l1,c,ch,wa+iw-1,wa+ix2-1); + na=1-na; + goto L115; + + L109: + //if(ip!=5)goto L112; + //if(ip==5)goto L115; +/* The radix five case can be translated later..... */ +/* if(ip!=5)goto L112; + + ix2=iw+ido; + ix3=ix2+ido; + ix4=ix3+ido; + if(na!=0) + dradb5(ido,l1,ch,c,wa+iw-1,wa+ix2-1,wa+ix3-1,wa+ix4-1); + else + dradb5(ido,l1,c,ch,wa+iw-1,wa+ix2-1,wa+ix3-1,wa+ix4-1); + na=1-na; + goto L115; + + L112:*/ + if(na!=0) + dradbg(ido,ip,l1,idl1,ch,ch,ch,c,c,wa+iw-1); + else + dradbg(ido,ip,l1,idl1,c,c,c,ch,ch,wa+iw-1); + if(ido==1)na=1-na; + + L115: + l1=l2; + iw+=(ip-1)*ido; + } + + if(na==0)return; + + for(i=0;i<n;i++)c[i]=ch[i]; +} + +void core_drft_forward(struct drft_lookup *l,float *data){ + if(l->n==1)return; + drftf1(l->n,data,l->trigcache,l->trigcache+l->n,l->splitcache); +} + +void core_drft_backward(struct drft_lookup *l,float *data){ + if (l->n==1)return; + drftb1(l->n,data,l->trigcache,l->trigcache+l->n,l->splitcache); +} + +void core_drft_init(struct drft_lookup *l,int n) +{ + l->n=n; + l->trigcache=(float*)mem_alloc(3*n*sizeof(*l->trigcache)); + l->splitcache=(int*)mem_alloc(32*sizeof(*l->splitcache)); + fdrffti(n, l->trigcache, l->splitcache); +} + +void core_drft_clear(struct drft_lookup *l) +{ + if(l) + { + if(l->trigcache) + mem_free(l->trigcache); + if(l->splitcache) + mem_free(l->splitcache); + } +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.h new file mode 100755 index 000000000..1ad7375eb --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.h @@ -0,0 +1,20 @@ + +#ifndef FFTCORE_H +#define FFTCORE_H + +/** Discrete Rotational Fourier Transform (DRFT) lookup */ +struct drft_lookup{ + int n; + float *trigcache; + int *splitcache; +}; + +/* Function Declarations */ +extern void core_drft_forward(struct drft_lookup *l,float *data); +extern void core_drft_backward(struct drft_lookup *l,float *data); +extern void core_drft_init(struct drft_lookup *l,int n); +extern void core_drft_clear(struct drft_lookup *l); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/fftcore.o new file mode 100644 index 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a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/functrl.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/functrl.h new file mode 100755 index 000000000..a1752eaf8 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/functrl.h @@ -0,0 +1,37 @@ + +#ifndef FUNCTRL_H +#define FUNCTRL_H + +/* LP AEC Control */ +#define LP_AEC_ENABLE 0x1 /* bit 0 */ + +/* NLP AES Control */ +#define NLP_AES_ENABLE 0x2 /* bit 1 */ + +/* NR Control */ +#define NR_ENABLE 0x4 /* bit 2 */ + +/* AGC Control */ +#define AGC_ENABLE 0x8 /* bit 3 */ + +/* Notch Filter Control */ +#define NOTCH_ENABLE 0x10 /* bit 4 */ + +/* DC Filter Control */ +#define DCREMOVER_ENABLE 0x20 /* bit 5 */ + +/* DG Control */ +#define DG_ENABLE 0x40 /* bit 6 */ + +/* Delay Control */ +#define DELAY_ENABLE 0x80 /* bit 7 */ + +/* AGC Control in SPK Path */ +#define SPK_AGC_ENABLE 0x1 /* bit 0 */ + +/* EQ Control in SPK Path */ +#define SPK_EQ_ENABLE 0x2 /* bit 1 */ + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.c new file mode 100755 index 000000000..9ac182405 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.c @@ -0,0 +1,43 @@ + +/* Include files */ +#include <math.h> +#include "mmse.h" +#include "log.h" +#include "power.h" +#include "mmse_rtwutil.h" + +#ifdef FAST_MATH_CALC +inline float fast_log2 (float val) + { + int * const exp_ptr = (int *)(&val); + int x = *exp_ptr; + const int log_2 = ((x >> 23) & 255) - 128; + x &= ~(255 << 23); + x += 127 << 23; + *exp_ptr = x; + + val = ((-1.0f/3) * val + 2) * val - 2.0f/3; // (1) + + return (val + log_2); + } + + inline float fast_log(const float val) + { + return (fast_log2 (val) * 0.69314718f); + } +#endif + +/* Function Definitions */ +void b_log(float x[321]) +{ + int k; + for (k = 0; k < 321; k++) { +#ifdef FAST_MATH_CALC + x[k] = (float)fast_log(x[k]); +#else + x[k] = (float)log(x[k]); +#endif + } +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.h new file mode 100755 index 000000000..2642dc4ae --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.h @@ -0,0 +1,17 @@ + +#ifndef LOG_H +#define LOG_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "tmwtypes.h" + +/* Function Declarations */ +extern void b_log(float x[321]); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/log.o new file mode 100644 index 0000000000000000000000000000000000000000..50d83d27ffe693c8dd93f2312489225c2d93fc41 GIT binary patch literal 4320 zcmc&%Yit}>6~1?7_K{tC{c0RLxa}r#Wm7t{e&M(wrgj`BT@+%gPSQ}N470oA-KD!b z*3PW!goseYqe!SA)RsR$f)u16ejuSrp%N8Qc~s&DP+k%eKTwfS5p|R_L`A9~d}rp~ z^^Ku`#1D>i=R4;+=bn4#+{f&mUp#u4bIzo2Hp;dv#(v%rdSX){jI!Nq7c>8KeLi-W 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+EXPORT void LP_AEC_para(ssp_para_struct *para, short *filter_length, short *init_filter_length) +{ + ssp_para_struct *para_obj; + unsigned short tmp; + + /* LP AEC Parameters */ + para_obj = para; + + tmp = MIN(MAX(para_obj->para_aec_init_filter_len, 1), 13); /* 8kHz: [20ms, 260ms], each step 20ms; 16kHz: [10ms, 130ms], each step 10ms */ + *init_filter_length = tmp; + + tmp = MIN(MAX(para_obj->para_aec_filter_len, 1), 13); /* 8kHz: [20ms, 260ms], each step 20ms; 16kHz: [10ms, 130ms], each step 10ms */ + *filter_length = tmp; + +} + +EXPORT LinearEchoState *LP_AEC_init(int frame_size, short filter_length, short init_filter_length, float Fs) +{ + + int i, N, M; + LinearEchoState *st = (LinearEchoState *)mem_alloc(sizeof(LinearEchoState)); + + st->frame_size = frame_size; + st->window_size = 2*frame_size; + N = st->window_size; + st->M = filter_length; + st->initial_filter_len = init_filter_length; + M = st->initial_filter_len; + + st->ss = .35f; // fe_smooth_coef; + st->cancel_count = 0; + st->sum_adapt = 0; + st->saturated = 0; + st->screwed_up = 0; + + st->sampling_rate = (int)Fs; + st->spec_average = (float)st->frame_size/(float)st->sampling_rate; + st->beta0 = (2.0f*st->frame_size)/st->sampling_rate; + st->beta_max = (.5f*st->frame_size)/st->sampling_rate; + st->leak_estimate = 0; + + st->fft_table = speech_fft_init(N); + + st->e = (float*)mem_alloc(N*sizeof(float)); + st->x = (float*)mem_alloc(N*sizeof(float)); + st->input = (float*)mem_alloc(st->frame_size*sizeof(float)); + st->y = (float*)mem_alloc(N*sizeof(float)); + st->last_y = (float*)mem_alloc(N*sizeof(float)); + st->Yf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + st->Rf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + st->Xf = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + st->Yh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + st->Eh = (float*)mem_alloc((st->frame_size+1)*sizeof(float)); + + st->X = (float*)mem_alloc((13+1)*N*sizeof(float)); + st->Y = (float*)mem_alloc(N*sizeof(float)); + st->E = (float*)mem_alloc(N*sizeof(float)); + st->W = (float*)mem_alloc(13*N*sizeof(float)); +#ifdef TWO_FILTER + st->foreground = (float*)mem_alloc(13*N*sizeof(float)); +#endif + st->PHI = (float*)mem_alloc(N*sizeof(float)); + st->power = (float*)mem_alloc((frame_size+1)*sizeof(float)); + st->power_1 = (float*)mem_alloc((frame_size+1)*sizeof(float)); + st->window = (float*)mem_alloc(N*sizeof(float)); + st->prop = (float*)mem_alloc(13*sizeof(float)); + st->wtmp = (float*)mem_alloc(N*sizeof(float)); + for (i=0;i<N;i++) + st->window[i] = .5f-.5f*(float)cos(2*M_PI*i/N); /* Hanning window */ + for (i=0;i<=st->frame_size;i++) + st->power_1[i] = FLOAT_ONE; + for (i=0;i<N*13;i++) + st->W[i] = 0; + { + float sum = 0; + /* Ratio of ~10 between adaptation rate of first and last block */ + float decay = (float)math_exp(-(2.4/M)); + st->prop[0] = .7f; + sum = st->prop[0]; + for (i=1;i<M;i++) { + st->prop[i] = st->prop[i-1] * decay; + sum = sum + st->prop[i]; + } + for (i=M-1;i>=0;i--) { + st->prop[i] = (.8f * st->prop[i])/sum; + } + } + + st->memX = (float*)mem_alloc(sizeof(float)); + st->memD = (float*)mem_alloc(sizeof(float)); + st->memE = (float*)mem_alloc(sizeof(float)); + st->preemph = .9f; + + if (st->sampling_rate<12000) + st->notch_radius = .9f; + else if (st->sampling_rate<24000) + st->notch_radius = .982f; + else + st->notch_radius = .992f; + st->notch_mem = (float*)mem_alloc(2*sizeof(float)); + for (i=0;i<2;i++) + st->notch_mem[i] = 0; + + st->adapted = 0; + st->Pey = st->Pyy = FLOAT_ONE; + +#ifdef TWO_FILTER + st->Davg1 = st->Davg2 = FLOAT_ZERO; + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; +#endif + + st->aec_min_leak = .005f; + st->aec_var1_smooth = .36f; + st->aec_var2_smooth = .7225f; + st->aec_var1_update = .5f; + st->aec_var2_update = .25f; + st->aec_var_backtrack = 4.f; + + st->echo_cnt = 0; + + return st; + +} + +void echo_state_reset(LinearEchoState *st) +{ + + int i, M, N; + + st->cancel_count = 0; + st->screwed_up = 0; + N = st->window_size; + M = st->M; + + M = M; + for (i=0;i<N*13;i++) + st->W[i] = 0; +#ifdef TWO_FILTER + for (i=0;i<N*13;i++) + st->foreground[i] = 0; +#endif + for (i=0;i<N*(13+1);i++) + st->X[i] = 0; + for (i=0;i<=st->frame_size;i++) { + st->power[i] = 0; + st->power_1[i] = FLOAT_ONE; + st->Eh[i] = 0; + st->Yh[i] = 0; + } + for (i=0;i<st->frame_size;i++) { + st->last_y[i] = 0; + } + for (i=0;i<N;i++) { + st->E[i] = 0; + } + for (i=0;i<N;i++) { + st->x[i] = 0; + } + for (i=0;i<2;i++) + st->notch_mem[i] = 0; + for (i=0;i<1;i++) + st->memD[i] = st->memE[i] = 0; + for (i=0;i<1;i++) + st->memX[i] = 0; + + st->saturated = 0; + st->adapted = 0; + st->sum_adapt = 0; + st->Pey = st->Pyy = FLOAT_ONE; +#ifdef TWO_FILTER + st->Davg1 = st->Davg2 = FLOAT_ZERO; + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; +#endif + +} + +EXPORT void LP_AEC_free(LinearEchoState *st) +{ + + speech_fft_free(st->fft_table); + + mem_free(st->e); + mem_free(st->x); + mem_free(st->input); + mem_free(st->y); + mem_free(st->last_y); + mem_free(st->Yf); + mem_free(st->Rf); + mem_free(st->Xf); + mem_free(st->Yh); + mem_free(st->Eh); + + mem_free(st->X); + mem_free(st->Y); + mem_free(st->E); + mem_free(st->W); +#ifdef TWO_FILTER + mem_free(st->foreground); +#endif + mem_free(st->PHI); + mem_free(st->power); + mem_free(st->power_1); + mem_free(st->window); + mem_free(st->prop); + mem_free(st->wtmp); + mem_free(st->memX); + mem_free(st->memD); + mem_free(st->memE); + mem_free(st->notch_mem); + + mem_free(st); +} + +EXPORT void LP_AEC(LinearEchoState *st, const short *in, const short *far_end, short *out) +{ + + int i , j; + int N, M; + float Syy, See, Sxx, Sdd, Sff; +#ifdef TWO_FILTER + float Dbf; /* the variance of e(n) */ + int update_foreground; /* update foreground flag */ +#endif + float Sey; + float ss, ss_1; + float Pey = FLOAT_ONE, Pyy = FLOAT_ONE; + float alpha, alpha_1; + float RER; /* Residual to Error Ratio */ + float tmp32; + + + if (st->echo_cnt > (st->sampling_rate/st->frame_size*3)) { + M = st->M; /* from parameter */ + st->echo_cnt = (st->sampling_rate/st->frame_size*3)+1; /* avoid cnt overflow */ + } else { + M = st->initial_filter_len; + } + + N = st->window_size; + st->cancel_count++; + + //ss = 0.3f / M; + ss = st->ss / M; + ss_1 = 1 - ss; + + + /******************************************************************************/ + /* TX Signal Preprocessing*/ + /******************************************************************************/ + /* Apply DC filter to make sure DC doesn't end up causing problems */ + DC_filter(in, st->notch_radius, st->input, st->frame_size, st->notch_mem); + + /* Copy input data to buffer and apply pre-emphasis filter */ + for (i=0;i<st->frame_size;i++) { + float tmp32; + /* H = 1-0.9z^(-1), FIR filter */ + /* tmp32 = input(n) - preemph * input(n-1), input(n) is d(n) */ + tmp32 = st->input[i] - st->preemph * st->memD[0]; + st->memD[0] = st->input[i]; + st->input[i] = tmp32; + } + + /******************************************************************************/ + /* RX Signal Preprocessing*/ + /******************************************************************************/ + for (i=0;i<st->frame_size;i++) { + float tmp32; + /* x[1:2*frame_size]: |--previous frame--|--current frame--| */ + st->x[i] = st->x[i+st->frame_size]; /* perform pre-emphasis filtering for previous frame */ + /* tmp32 = far_end(n) - preemph * far_end(n -1) */ + tmp32 = far_end[i] - st->preemph * st->memX[0]; + st->x[i+st->frame_size] = tmp32; /* perform pre-emphasis filtering for current frame */ + st->memX[0] = far_end[i]; + } + + /* Shift the filter length buffer of far-end in frequency domain */ + for (j=M-1;j>=0;j--) { + for (i=0;i<N;i++) + st->X[(j+1)*N+i] = st->X[j*N+i]; + } + speech_fft(st->fft_table, st->x, &st->X[0]); + + Sxx = 0; + Sxx += inner_prod(st->x+st->frame_size, st->x+st->frame_size, st->frame_size); /* the variance of x(n) */ + accum_power_spectrum(st->X, st->Xf, N); /* Xf(k) = pow(X(k)), the power spectrum of X(k) */ + + Sff = 0; +#ifdef TWO_FILTER + /* Compute foreground filter */ + /* Y(k) = X(k) * W(k) */ + accum_spectral_mul(st->X, st->foreground, st->Y, N, M); + speech_ifft(st->fft_table, st->Y, st->e); + for (i=0;i<st->frame_size;i++) { + /* e(n) = d(n) - y(n), e(n) use the first part, y(n) use the last part */ + st->e[i] = st->input[i] - st->e[i+st->frame_size]; + } + /* the variance of e(n) */ + Sff += inner_prod(st->e, st->e, st->frame_size); +#endif + + /* Adjust proportional adaption rate */ + if (st->adapted) + aec_adjust_prop (st->W, N, M, st->prop); + if (st->saturated == 0) { + for (j=M-1;j>=0;j--) { + /* Compute delta_W(k, m, j), PHI(i) is delta_W(k, m, j) */ + /* delta_W(k, m, j) = power_1(k) * prop(m) * conj[X(k, m, j-1)] * E(k, j-1)*/ + /* st->power_1: optima l step size, length is frame size+1 */ + /* st->prop: proportianal step size, length is M */ + /* st->X: focus on j+1, means the previous X state, X length is (M+1)*N */ + /* st->E: error in frequency domain */ + /* [0] = matlab[1].re (matlab[1].im = 0), [1] = [2].re, [2] = [2].im, [3] = [3].re, [4] = [3].im, ..., */ + /* [317] = [160].re, [318] = [160].im, [319] = [161].re (matlab[161].im = 0) */ + /* st->PHI: length is window size N */ + weighted_gradient_phi(st->power_1, st->prop[j], &st->X[(j+1)*N], st->E, st->PHI, N); + /* compute weight gradient */ + for (i=0;i<N;i++) /* only calculate (N/2+1) frequency bin, two data(re/im) in each bin, so N data in total */ + /* W(k, m, j) = W(k, m, j-1) + delta_W(k, m, j) */ + st->W[ j*N + i] += st->PHI[i]; + } + } else { + st->saturated--; + } + + /* Overlap-store method to let circular convolution become linear convolution */ + for (j=0;j<M;j++) { + //if (j==0 || ((2+st->cancel_count)%(M-1)) == j+1) { + if (j==0 || st->cancel_count%(M-1) == j-1) { /* better */ + speech_ifft(st->fft_table, &st->W[j*N], st->wtmp); + for (i=st->frame_size;i<N;i++) { + st->wtmp[i] = 0; /* set 0 to the last part */ + } + speech_fft(st->fft_table, st->wtmp, &st->W[j*N]); + } + } + + /* Reset to zeros for accumulation */ + for (i=0;i<=st->frame_size;i++) + st->Rf[i] = st->Yf[i] = st->Xf[i] = 0; + + Dbf = 0; + See = 0; +#ifdef TWO_FILTER + /* Difference in response, this is used to estimate the variance of the residual power estimate */ + /* st.Y(:) = st.Y(:) + st.X(:, j) .* st.W(:, j); */ + accum_spectral_mul(st->X, st->W, st->Y, N, M); + /* st.y : [ ~ | leak background ] */ + speech_ifft(st->fft_table, st->Y, st->y); + for (i=0;i<st->frame_size;i++) { + st->e[i] = st->e[i+st->frame_size] - st->y[i+st->frame_size]; + } + Dbf += 10 + inner_prod(st->e, st->e, st->frame_size); /* the variance of e(n) */ + for (i=0;i<st->frame_size;i++) + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + See += inner_prod(st->e, st->e, st->frame_size); /* the variance of e(n) */ +#endif + +#ifndef TWO_FILTER + Sff = See; +#endif + +#ifdef TWO_FILTER + /* For two time windows, compute the mean of the energy difference, as well as the variance */ + st->Davg1 = .6f * st->Davg1 + .4f * (Sff - See); + st->Davg2 = .85f * st->Davg2 + .15f * (Sff - See); + st->Dvar1 = st->aec_var1_smooth * st->Dvar1 + .16f * Sff * Dbf ; + st->Dvar2 = st->aec_var2_smooth * st->Dvar2 + .0225f * Sff * Dbf ; + + update_foreground = 0; + /* Inspect if there is a statistically significant reduction in the residual echo */ + if (((Sff - See) * ABS(Sff - See)) > (Sff * Dbf)) + update_foreground = 1; + else if ((st->Davg1 * ABS(st->Davg1)) > (st->aec_var1_update * st->Dvar1)) + update_foreground = 1; + else if ((st->Davg2 * ABS(st->Davg2)) > (st->aec_var2_update * st->Dvar2)) + update_foreground = 1; + + if (update_foreground) { /* update foreground filter */ + st->Davg1 = st->Davg2 = FLOAT_ZERO; + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; + /* Copy background filter to foreground filter */ + for (i=0;i<N*M;i++) /* copy data for (N/2+1) frequency bin */ + st->foreground[i] = st->W[i]; + /* Apply a smooth transition to avoid blocking artifacts */ + /* y1(n) = window(n+N/2)y1(n) + window(n)y2(n) */ + for (i=0;i<st->frame_size;i++) + /* Perform windowing and 50% OLA, output = window first part * leak background(new) + window last part * leak forground(old) */ + /* st.e last part still be leak(y) foreground */ + st->e[i+st->frame_size] = st->window[i+st->frame_size] * st->e[i+st->frame_size] + st->window[i] * st->y[i+st->frame_size]; + + } else { /* check if the background filter is significantly worse */ + int reset_background = 0; + if ((-(Sff - See) * ABS(Sff - See)) > (st->aec_var_backtrack * Sff * Dbf)) + reset_background = 1; + if ((-(st->Davg1) * ABS(st->Davg1)) > (st->aec_var_backtrack * st->Dvar1)) + reset_background = 1; + if ((-(st->Davg2) * ABS(st->Davg2)) > (st->aec_var_backtrack * st->Dvar2)) + reset_background = 1; + + if (reset_background) { + /* Copy foreground filter to background filter */ + for (i=0;i<N*M;i++) /* copy data for (N/2+1) frequency bin */ + st->W[i] = st->foreground[i]; + for (i=0;i<st->frame_size;i++) + st->y[i+st->frame_size] = st->e[i+st->frame_size]; + for (i=0;i<st->frame_size;i++) + st->e[i] = st->input[i] - st->y[i+st->frame_size]; + + See = Sff; /* reset error power, copy foreground to background */ + st->Davg1 = st->Davg2 = FLOAT_ZERO; + st->Dvar1 = st->Dvar2 = FLOAT_ZERO; + } + } +#endif + + Sey = Syy = Sdd = 0; + /* Compute error signal (for the output with de-emphasis) */ + for (i=0;i<st->frame_size;i++) { + float tmp_out; +#ifdef TWO_FILTER + /* The estimated echo e is processed after windowing and OLA */ + tmp_out = st->input[i] - st->e[i+st->frame_size]; +#else + tmp_out = st->input[i] - st->y[i+st->frame_size]; +#endif + /* H = 1/(1-0.9z^(-1)), IIR, de-emphasis filtering */ + tmp_out = tmp_out + st->preemph * st->memE[0]; + /* this is an arbitrary test for saturation in the mic signal */ + if (in[i] <= -32000 || in[i] >= 32000) { + if (st->saturated == 0) + st->saturated = 1; + } + out[i] = (short)WORD2INT(tmp_out); /* the output data is processed after windowing and OLA cuz e(n) */ + st->memE[0] = tmp_out; /* state out(n-1) */ + } + + /* Compute error signal */ + for (i=0;i<st->frame_size;i++) { + st->e[i+st->frame_size] = st->e[i]; + st->e[i] = 0; + } + + /* Compute a bunch of correlations */ + Sey += inner_prod(st->e+st->frame_size, st->y+st->frame_size, st->frame_size); /* the covariance of e(n) and y(n) */ + Syy += inner_prod(st->y+st->frame_size, st->y+st->frame_size, st->frame_size); /* the variance of y(n) */ + Sdd += inner_prod(st->input, st->input, st->frame_size); /* the variance of d(n) */ + + speech_fft(st->fft_table, st->e, st->E); + for (i=0;i<st->frame_size;i++) + st->y[i] = 0; + speech_fft(st->fft_table, st->y, st->Y); + + accum_power_spectrum(st->E, st->Rf, N); /* Rf(k) = the power spectrum of E(k), error power in each frequency bin (N/2+1) */ + accum_power_spectrum(st->Y, st->Yf, N); /* Yf(k) = the power spectrum of Y(k) , estimated echo power in each frequency bin (N/2+1) */ + + + /* Sanity check */ + if (!(Syy>=0 && Sxx>=0 && See >= 0)) { /* things have gone really bad */ + st->screwed_up += 50; + for (i=0;i<st->frame_size;i++) + out[i] = 0; + } else if (Sff > (Sdd + (float)(N * 10000))) { /* if foreground error signal is a lot greater than mic in */ + st->screwed_up++; + } else { /* everything is fine */ + st->screwed_up = 0; + } + + if (st->screwed_up>=50) { + //speech_warning("AEC started behaving unreasonable and need to reset"); + echo_state_reset(st); + return; + } + + See = MAX(See, (float)(N * 100)); /* add a small noise floor to make sure not to have problems when dividing */ + + Sxx = 0; + Sxx += inner_prod(st->x+st->frame_size, st->x+st->frame_size, st->frame_size); /* far-end (TD) current frame power sum */ + accum_power_spectrum(st->X, st->Xf, N); /* Xf(k) = far-end(FD) power in each frequency bin (N/2+1) */ + + for (j=0;j<=st->frame_size;j++) + st->power[j] = ss_1 * st->power[j] + 1 + ss * st->Xf[j]; /* smooth far end power estimate over time */ + + /* Compute filtered spectra and cross-correlations */ + for (j=st->frame_size;j>=0;j--) { + float Eh, Yh; + + Eh = st->Rf[j] - st->Eh[j]; + Yh = st->Yf[j] - st->Yh[j]; + Pey = Pey + Eh * Yh; + Pyy = Pyy + Yh * Yh; + st->Eh[j] = (1-st->spec_average)*st->Eh[j] + st->spec_average*st->Rf[j]; + st->Yh[j] = (1-st->spec_average)*st->Yh[j] + st->spec_average*st->Yf[j]; + } + + Pyy = (float)math_sqrt(Pyy); /* the standard deviation of Y(k) */ + Pey = Pey / Pyy; /* the correlation coefficient of E(k) and Y(k) */ + + /* Compute correlation update rate */ + /* beta0 is the base learning rate for the leakage estimate */ + tmp32 = st->beta0 * Syy; + if (tmp32 > (st->beta_max * See)) + tmp32 = st->beta_max * See; + alpha = tmp32 / See; + alpha_1 = FLOAT_ONE - alpha; + + /* Update correlations (recursive average) */ + st->Pey = alpha_1 * st->Pey + alpha * Pey; + st->Pyy = alpha_1 * st->Pyy + alpha * Pyy; + + if (st->Pyy < FLOAT_ONE) + st->Pyy = FLOAT_ONE; + + if (st->Pey < st->aec_min_leak * st->Pyy) + st->Pey = st->aec_min_leak * st->Pyy; + + if (st->Pey > st->Pyy) + st->Pey = st->Pyy; + + st->leak_estimate = st->Pey / st->Pyy; + if (st->leak_estimate > 16383) + st->leak_estimate = 32767; + + + /* Compute Residual to Error Ratio */ + RER = (float)((.0001*Sxx + 3*st->leak_estimate*Syy) / See); + if (RER < Sey*Sey/(1+See*Syy)) + RER = Sey*Sey/(1+See*Syy); + if (RER > .5) + RER = .5; + st->RER = RER; + + if (st->RER*32767 > 1000) + st->echo_cnt++; + + if (!st->adapted && st->sum_adapt > M && st->leak_estimate*Syy > .03f*Syy) { + st->adapted = 1; + } + + if (st->adapted) { + /* Normal learning rate calculation once it's past the minimal adaptation phase */ + for (i=0;i<=st->frame_size;i++) { + float r, e; + //int tmp; + + #if (0) /* unhelpful */ + tmp = st->sampling_rate; + if ((i*tmp/st->window_size<=1000) && (i*tmp/st->window_size>=600)) { + st->leak_estimate = st->leak_estimate - 0.03f; + if (st->leak_estimate < 0) { + st->leak_estimate = 0; + } + } else if (i*tmp/st->window_size>1000) { + st->leak_estimate = st->leak_estimate - 0.1f; + if (st->leak_estimate < 0) { + st->leak_estimate = 0; + } + } + #endif + + /* Compute frequency-domain adaptation mask */ + r = st->leak_estimate * st->Yf[i]; + e = st->Rf[i] + 1; /* the power spectrum of E(k) */ + if (r>.5f*e) + r = .5f*e; + + #if (0) + r = .3f * r + .7f * RER * e; + #else /* better */ + r = .7f * r + .3f * RER * e; + #endif + + //st->power_1[i] = (r * adapt_rate) / (e * (st->power[i] + 1)); + st->power_1[i] = r / (e * (st->power[i] + 10)); + + } + } else { + + /* Temporary adaption rate if filter is not yet adapted enough */ + float adapt_rate = 0; + + if (Sxx > (float)(N * 1000)) { /* far-end exists a certain level of energy */ + tmp32 = .25f * Sxx; + if (tmp32 > .25*See) + tmp32 = (float)(.25*See); + adapt_rate = tmp32 / See; /* residual echo/error signal */ + } + + for (i=0;i<=st->frame_size;i++) + st->power_1[i] = adapt_rate / (st->power[i] + 10); + + /* How much has it adapted so far */ + st->sum_adapt = st->sum_adapt + adapt_rate; /* the bigger the value, the bigger the echo */ + } + + #if (1) + for (i=0;i<st->frame_size;i++) + st->last_y[i] = st->last_y[st->frame_size+i]; + if (st->adapted) { + /* if the filter is adapted, take the filtered echo */ + for (i=0;i<st->frame_size;i++) + st->last_y[st->frame_size+i] = (float)(in[i]-out[i]); + } else { + /* otherwise, take the far-end signal */ + for (i=0;i<N;i++) + st->last_y[i] = st->x[i]; + } + #endif + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec.h new file mode 100755 index 000000000..e9824ae8c --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec.h @@ -0,0 +1,19 @@ + +#ifndef LPAEC_H +#define LPAEC_H + + /* Include files */ +#include "define.h" +#include "struct.h" +#include "tmwtypes.h" + +/* Function Declarations */ +extern void LP_AEC_para(ssp_para_struct *para, short *filter_length, short *init_filter_length); +extern LinearEchoState *LP_AEC_init(int frame_size, short filter_length, short init_filter_length, float Fs); +extern void LP_AEC_free(LinearEchoState *st); +extern void LP_AEC(LinearEchoState *st, const short *rec, const short *play, short *out); +extern void echo_state_reset(LinearEchoState *st); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec.o new file mode 100644 index 0000000000000000000000000000000000000000..24f6a319e2b3d20983efd949c356946a13b90734 GIT binary patch literal 48352 zcmd4434B!5`Tu|K+{t7z3CR$)01+l30R*xV0Rut^$p8^0EMiQlNyr`oiCF+66=W09 zS`=#$(NIO)s6~rPae*o*wbY8nr3#i>MJvvH3G28N{-4je&rK$%{ciu?@AbQ{oV=gs zInP<{x#ygF?wM^_?liBi>zZ}w+EA@i)3jaBtC)}sg`rxUHb66OOWisBY<u&=?UDAa z&uq`$xTo77{jV#Z?*B}W<*+wRx(zY5yPtVTVum9oe0l1N^^^5MzR&eRsV{~vub-^# zVU|h%JTcwwP4YQzU+cYfhaUH-XNNy)T_5lCFLT1CpU4P5rd>F9{z9mKeO~ytVJBbm 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<math.h> +#include "define.h" +#include "lpaec_subfun.h" +#ifndef PLATFORM_RTOS +not suppose to enter here +inline void DC_filter(const short *in, float radius, float *out, int len, float *mem) +#else +/* Function Definitions */ +void DC_filter(const short *in, float radius, float *out, int len, float *mem) +#endif +{ + int i; + float den2; + + den2 = radius*radius + .7f*(1-radius)*(1-radius); + + for (i=0;i<len;i++) { + float vin = in[i]; + float vout = mem[0] + vin; + mem[0] = mem[1] + 2*(-vin + radius*vout); /* history buffer */ + mem[1] = vin - den2 * vout; /* history buffer */ + out[i] = radius * vout; + } +} + +inline float inner_prod(const float *x, const float *y, int len) +{ + float sum = 0; + + len >>= 1; + while(len--) { + float part = 0; + part = part + (*x++) * (*y++); + part = part + (*x++) * (*y++); + sum = sum + part; + } + return sum; +} + +inline void bin_power_spectrum(const float *X, float *ps, int N) +{ + int i, j; + + ps[0] = X[0] * X[0]; + for (i=1,j=1;i<N-1;i+=2,j++) { /* half-complex vector */ + ps[j] = X[i] * X[i] + X[i+1] * X[i+1]; + } + ps[j] = X[i] * X[i]; +} + +inline void accum_power_spectrum(const float *X, float *ps, int N) +{ + int i, j; + + ps[0] += (X[0] * X[0]); /* ps[0] = ps[0] + X[0] * X[0], real part only, the im part in first point is zero */ + for (i=1,j=1;i<N-1;i+=2,j++) { + ps[j] += (X[i] * X[i] + X[i+1] * X[i+1]); + } + ps[j] += (X[i] * X[i]); /* real part only, the im part in (N/2+1)th point is zero */ +} + +inline void accum_spectral_mul(const float *X, const float *Y, float *acc, int N, int M) +{ + int i,j; + + for (i=0;i<N;i++) + acc[i] = 0; + for (j=0;j<M;j++) { + acc[0] += (X[0]*Y[0]); /* real part only for the first point of X and Y */ + for (i=1;i<N-1;i+=2) { /* X[i] and Y[i] are the real part of X and Y respectively, X[i+1] and Y[i+1] are the imaginary part of X and Y respectively */ + acc[i] += (X[i]*Y[i] - X[i+1]*Y[i+1]); /* real part */ + acc[i+1] += (X[i+1]*Y[i] + X[i]*Y[i+1]); /* imaginary part */ + } + acc[i] += (X[i]*Y[i]); /* real part only for the (N/2+1)th point of X and Y */ + X += N; + Y += N; + } +} + +inline void weighted_gradient_phi(const float *w, const float p, const float *X, const float *Y, float *prod, int N) +{ + int i, j; + float W; + + W = p * w[0]; /* real value */ + prod[0] = W * X[0] * Y[0]; /* real part only for the first point of X and Y */ + for (i=1,j=1;i<N-1;i+=2,j++) { + W = p * w[j]; /* real value */ + /* perform conj(X)*Y, conjugation of X[i] + X[i+1]j = X[i] - X[i+1]j */ + prod[i] = W * (X[i] * Y[i] + X[i+1] * Y[i+1]); /* real part */ + prod[i+1] = W * (-X[i+1] * Y[i] + X[i] * Y[i+1]); /* imaginary part */ + } + W = p * w[j]; /* real value */ + prod[i] = W * X[i] * Y[i]; /* real part only for the (N/2+1)th point of X and Y */ +} + +inline void aec_adjust_prop(const float *W, int N, int M, float *prop) +{ + int i, j; + float max_sum = 1; + float prop_sum = 1; + //float max_sum_matlab[20]; + + for (i=0;i<M;i++) { + float tmp = 1; + for (j=0;j<N;j++) + /* tmp(m) = tmp(m) + W(k, m) * W(k, m) */ + tmp += (W[i*N+j] * W[i*N+j]); /* sum the power of the (N/2+1) frequency bin in each taplen */ + prop[i] = (float)math_sqrt(tmp); + + #if (1) /* better */ + if (prop[i] > max_sum) + max_sum = prop[i]; + #else + if (prop[i] < 1.0) + max_sum_matlab[i] = 1.0; + else + max_sum_matlab[i] = prop[i]; + #endif + + } + + for (i=0;i<M;i++) { + + #if (1) /* better */ + prop[i] += (.1f * max_sum); + #else + prop[i] += (.1f * max_sum_matlab[i]); + #endif + + prop_sum += prop[i]; /* sum(prop(m)) */ + } + for (i=0;i<M;i++) { + prop[i] = (.99f * prop[i]) / prop_sum; + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec_subfun.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec_subfun.h new file mode 100755 index 000000000..7b92c35b0 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec_subfun.h @@ -0,0 +1,28 @@ + +#ifndef LPAEC_SUBFUN_H +#define LPAEC_SUBFUN_H + + /* Include files */ +#include "define.h" + +#ifndef PLATFORM_RTOS +/* Function Declarations */ +extern inline void DC_filter(const short *in, float radius, float *out, int len, float *mem); +extern inline float inner_prod(const float *x, const float *y, int len); +extern inline void bin_power_spectrum(const float *X, float *ps, int N); +extern inline void accum_power_spectrum(const float *X, float *ps, int N); +extern inline void accum_spectral_mul(const float *X, const float *Y, float *acc, int N, int M); +extern inline void weighted_gradient_phi(const float *w, const float p, const float *X, const float *Y, float *prod, int N); +extern inline void aec_adjust_prop(const float *W, int N, int M, float *prop); +#else +void DC_filter(const short *in, float radius, float *out, int len, float *mem); +float inner_prod(const float *x, const float *y, int len); +void bin_power_spectrum(const float *X, float *ps, int N); +void accum_power_spectrum(const float *X, float *ps, int N); +void accum_spectral_mul(const float *X, const float *Y, float *acc, int N, int M); +void weighted_gradient_phi(const float *w, const float p, const float *X, const float *Y, float *prod, int N); +void aec_adjust_prop(const float *W, int N, int M, float *prop); +#endif +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec_subfun.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/lpaec_subfun.o new file mode 100644 index 0000000000000000000000000000000000000000..43e2b3d13274d77b8b11fa88bd08e040b270ef8c GIT binary patch literal 18460 zcmc(mdwf;ZnfKQ|``mI8LP)~37)~H02;>Ig(iAa5E)Z@Z0mM^k$c-dNa+zEJPgS5? zMQc&CUdA!jL9l(bGS*gK>#g;|j8ZG&SZk%e9s5c}&Th_N1>4T}{(fseJ2^?|yzhMa z$GbkP{aw$qp7pHDUTf{0bvE0}mX{lbp`2i-X=+eX>eEF!$5W&+O=YSKb-_{*HN7v| z7ujmP7};p4P>!`PQeowUO3oMT^iS`9vgCa3&WB<NJ{3#%<n;S|Mr@kfKTl=P`8@rE zf9|QMiafvQP}Hcr>!RxS#8NySE9JF0pHDvVwDn5pPUzgRpxX;wuay(&x5|p=d>%yJ ztKp4SPGy;Orr2v8gnh<|BG_NFJ_`F--tvUzd_M8SOHre^-zqPjW4S|5TgM|l*zSs| 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z%+9v|4~mGoF8aJ`nB8}#VXPe^kT#5!V&`Q29Cq=6HVoGevwIVEB~B*tovFj$CgS_y zzY6mJ`RoVx6lYv`MvA4#EFDs&D>d5@K*u#69|L;^v$w(D*PYBbJF4QAgDQo;V^9R4 apNz<QQxMrUXRkt1eTog|UM3_suKy43y+cF* literal 0 HcmV?d00001 diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/memalloc.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/memalloc.h new file mode 100755 index 000000000..6d8f2ad19 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/memalloc.h @@ -0,0 +1,91 @@ + +#ifndef MEMALLOC_H +#define MEMALLOC_H + + /* Include files */ +#include <string.h> +#include <stdio.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#else +#include "malloc.h" +#endif +//#ifndef printf +//#define printf(...) printf(__VA_ARGS__) +//#endif +#define pr_err(...) printf("ERR:" __VA_ARGS__) +#define printfw(...) +#define printfe(...) +#define _inline + +/** Wrapper for calloc. To do your own dynamic allocation, all you need to do is to replace this function, mem_realloc and mem_free + Note tthat mem_alloc needs to CLEAR THE MEMORY */ +#ifndef OVERRIDE_SPEECH_ALLOC +static _inline void *mem_alloc (int size) +{ + /* WARNING: this is not equivalent to malloc(). If you want to use malloc() + or your own allocator, YOU NEED TO CLEAR THE MEMORY ALLOCATED. Otherwise + you will experience strange bugs */ +#ifndef PLATFORM_RTOS + return calloc(size,1); +#else + //return (void *)calloc(size,1); + uintptr_t *ptr = pvPortMalloc(size); + + memset(ptr, 0, size); + return ptr; +#endif +} +#endif + +/** Wrapper for calloc. To do your own dynamic allocation, all you need to do is replace this function, mem_realloc and mem_alloc */ +#ifndef OVERRIDE_SPEECH_FREE +static _inline void mem_free (void *ptr) +{ +#ifndef PLATFORM_RTOS + free(ptr); +#else + vPortFree(ptr); +#endif +} +#endif + +/** Copy n elements from src to dst. The 0* term provides compile-time type checking */ +#ifndef OVERRIDE_SPEECH_COPY +#define SPEECH_COPY(dst, src, n) (memcpy((dst), (src), (n)*sizeof(*(dst)) + 0*((dst)-(src)) )) +#endif + +/** Copy n elements from src to dst, allowing overlapping regions. The 0* term provides compile-time type checking */ +#ifndef OVERRIDE_SPEECH_MOVE +#define SPEECH_MOVE(dst, src, n) (memmove((dst), (src), (n)*sizeof(*(dst)) + 0*((dst)-(src)) )) +#endif + +/** For n elements worth of memory, set every byte to the value of c, starting at address dst */ +#ifndef OVERRIDE_SPEECH_MEMSET +#define SPEECH_MEMSET(dst, c, n) (memset((dst), (c), (n)*sizeof(*(dst)))) +#endif + +/*#ifndef OVERRIDE_SPEECH_FATAL +static _inline void _speech_fatal(const char *str, const char *file, int line) +{ + printfe("Fatal (internal) error in %s, line %d: %s\n", file, line, str); + fprintf (stderr, "Fatal (internal) error in %s, line %d: %s\n", file, line, str); + exit(1); +} +#endif */ + +/*#ifndef OVERRIDE_SPEECH_WARNING +static _inline void speech_warning(const char *str) +{ +#ifndef DISABLE_WARNINGS + printfw("warning: %s\n", str); + fprintf (stderr, "warning: %s\n", str); +#endif +} +#endif */ + +/*#define speech_fatal(str) _speech_fatal(str, __FILE__, __LINE__); */ + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.c new file mode 100755 index 000000000..efd30f9d5 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.c @@ -0,0 +1,408 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ +/*% */ +/*% mmse.c */ +/*% Author: Sharon Lee */ +/*% History: */ +/*% Created by Sharon Lee in August, 2019 */ +/*% */ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ + +/* Include files */ +#include <math.h> +#include <string.h> +#include "mmse_init.h" +#include "mmse.h" +#include "bessel.h" +#include "power.h" +#include "sum.h" +#include "log.h" +#include "dr_detection.h" +#include "slope_detection.h" +#include "abs.h" +#include "mmse_rtwutil.h" +#include "packfft.h" +#include "define.h" +#include "tmwtypes.h" +#include "struct.h" + +//extern *fp_test; +//extern frame_cnt; +float gammak[321]; +float ksi[321]; +float tmp_fft_out[642]; +float tmp_ifft_out[642]; +float nr_sig[321]; +creal32_T nr_fd_half[321]; + +#ifndef SSP_CALLOC +#define SSP_CALLOC(TYPE, COUNT) ((TYPE *)calloc(COUNT, sizeof(TYPE))) +#endif + +#ifndef SSP_SAFE_FREE_BUF +#define SSP_SAFE_FREE_BUF(OBJ) {if (NULL != OBJ) {free(OBJ); OBJ = NULL; } } +#endif + +#ifndef SSP_CHECK_NULL_PTR +#define SSP_CHECK_NULL_PTR(ptr) \ + do { \ + if (!(ptr)) { \ + printf("func:%s,line:%d, NULL pointer\n", __func__, __LINE__); \ + return; \ + } \ + } while (0) +#endif + +/* Function Definitions */ +EXPORT void NR(short *x, float initial_noise_pow_time, float *frame, NRState *st, boolean_T *speech_vad, float *y) +{ + int i, j, k; + int len, len1, nFFT; + float c; + float qkr; +#ifdef SSP_STACK_TO_HEAP + //float gammak[321]; + //float ksi[321]; + //float tmp_ifft_out[642]; + //float nr_sig[321]; + float *gammak = SSP_CALLOC(float, 321); + float *ksi = SSP_CALLOC(float, 321); + float *tmp_fft_out = SSP_CALLOC(float, 642); + float *tmp_ifft_out = SSP_CALLOC(float, 642); + float *nr_sig = SSP_CALLOC(float, 321); + creal32_T *nr_fd_half = SSP_CALLOC(creal32_T, 321); + SSP_CHECK_NULL_PTR(gammak); + SSP_CHECK_NULL_PTR(ksi); + SSP_CHECK_NULL_PTR(tmp_fft_out); + SSP_CHECK_NULL_PTR(tmp_ifft_out); + SSP_CHECK_NULL_PTR(nr_sig); + SSP_CHECK_NULL_PTR(nr_fd_half); +#else + + +#endif + float xtmp_re; + float xtmp_im; + float lambda; + float absar; + boolean_T vad; + float b_c[3]; + /* fft_out[640] bin box order: [1].re, [2].re,[2].im, ... ,[320].re,[320].im,[321].re */ + /* ifft_out[640] bin box order: [1].re, [2].re,[2].im, ... ,[320].re,[320].im,[321].re */ + //creal32_T nr_fd_half[321]; + + float tmp, tmp1, alpha, alpha2; + + + /* Preparation */ + c = 0.886226925F; + qkr = 2.33333333F; + len = 2*st->frame_size; /* window size */ + len1 = st->frame_size; /* overlap size */ + nFFT = 2*2*st->frame_size; + for (i = 0; i < st->frame_size; i++) { + x[i+st->frame_size] = x[i]; /* go first to avoid overwriting by x_old[], applicable for AEC on or AEC off */ + x[i] = st->x_old[i]; + st->x_old[i] = x[i+st->frame_size]; /* update input overlap data */ + } + /* Transform to floating-point with float precision for input signals, input sample have to be 16-bit length */ + for (i = 0; i < 2*st->frame_size; i++) { + st->float_x[i] = (float)(x[i])/(float)(32768.0F); + } + + /* Apply analysis window */ + for (i = 0; i < (nFFT/2); i++) { + tmp_ifft_out[i] = st->ana_win[i] * st->float_x[i]; + tmp_ifft_out[(nFFT/2) + i] = 0.0F; + } + + /* Take fourier transform of one frame */ + speech_fft(st->nr_fft_table, tmp_ifft_out, tmp_fft_out); /* faster than matlab fft() */ + nr_fd_half[0].re = tmp_fft_out[0] * nFFT; /* multiply nFFT to get values as in matlab */ + nr_fd_half[0].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + nr_fd_half[j].re = tmp_fft_out[k] * nFFT; + nr_fd_half[j].im = tmp_fft_out[k+1] * nFFT; + } + nr_fd_half[nFFT/2].re = tmp_fft_out[nFFT-1] * nFFT; + nr_fd_half[nFFT/2].im = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + + a_abs(nr_fd_half, nr_sig, (nFFT/2+1)); /* amplitude */ + c_power(nr_sig, tmp_ifft_out, (nFFT/2+1)); /* power */ + + /* Solve the issue of silence segment appeared in the beginning */ + //tmp1 = c_sum(nr_sig, (nFFT/2+1)); + tmp1 = c_sum(nr_sig, (nFFT/2)); + if (tmp1/(nFFT/2.0F) < 0.0003F) { /* small signal segment */ + *frame = 1.0F; /* reset initial noise power estimate */ + st->vad_slope_cnt = 0.0F; + st->vad_slope = 0.0F; + st->vad_dr_cnt = 0.0F; + st->vad_dr = 0.0F; + st->vad_mmse = 0.0F; + st->vad_mmse_cnt = 0.0F; + xtmp_im = nFFT / 2.0F; + for (i = 0; i < (int)(xtmp_im + 1.0F); i++) { + st->noise_mean[i] = 0.0F; + st->noise_mu2[i] = 0.0F; + st->Xk_prev[i] = 0.0F; + } + for (i = 0; i < 5; i++) { + st->noisy_st_trough[i] = 0.0F; + st->noisy_st_peak[i] = 0.0F; + for (j = 0; j < 3; j++) { + st->amp_inst_band[i+5*j] = 0.0F; + } + } + for (i = 0; i < 3; i++) { + st->amp_inst_sum_hist[i] = 0.0F; + } + } + + if (*frame <= initial_noise_pow_time) { /* amplitude of accumulating the first handful of frames */ + for (i = 0; i < 321; i++) { + st->noise_mean[i] += nr_sig[i]; + tmp_fft_out[i] = st->noise_mean[i] / (*frame); + } + c_power(tmp_fft_out, st->noise_mu2, 321); /* average power for one frame */ + /*for (i = 0; i < 321; i++) + fprintf(fp_test, "%f \n", st->noise_mu2[i]);*/ + } + + for (i = 0; i < (nFFT/2+1); i++) { + if (st->noise_mu2[i] == 0.0F) { /* zero denominator */ + if (tmp_ifft_out[i] == 0.0F) { + gammak[i] = 0.0F; + } else { + gammak[i] = 40.0F; + } + } else { + absar = tmp_ifft_out[i] / st->noise_mu2[i]; + if (!(absar < 40.0F)) { + absar = 40.0F; + } + gammak[i] = absar; /* posteriori SNR */ + } + } + + if (*frame == 1.0F) { /* priori SNR for the first frame */ + for (k = 0; k < 321; k++) { + xtmp_im = gammak[k] - 1.0F; + xtmp_im = MAX(xtmp_im, 0.0F); + ksi[k] = st->aa + (1.0F - st->aa) * xtmp_im; + } + } else { /* decision-directed estimate for priori SNR */ + for (k = 0; k < 321; k++) { + xtmp_im = gammak[k] - 1.0F; + xtmp_im = MAX(xtmp_im, 0.0F); + if (0.0F == st->noise_mu2[k]) + st->noise_mu2[k] = (float)3.3495873e-008; /* assign a small value to avoid dividing by zero */ + ksi[k] = st->aa * st->Xk_prev[k] / st->noise_mu2[k] + (1.0F - st->aa) * xtmp_im; + ksi[k] = MAX(ksi[k], st->ksi_min); /* limit ksi greater than -25dB in power */ + } + } + + /* slope detection */ + for (i = 0; i < 5; i++) { + st->amp_inst_band[10 + i] = st->amp_inst_band[5 + i]; + st->amp_inst_band[5 + i] = st->amp_inst_band[i]; + } + + st->amp_inst_band[0] = c_sum(*(float (*)[20])&nr_sig[4], 20); /* 20 */ + st->amp_inst_band[1] = c_sum(*(float (*)[20])&nr_sig[24], 20); /* 20 */ + st->amp_inst_band[2] = c_sum(*(float (*)[40])&nr_sig[44], 40); /* 40 */ + st->amp_inst_band[3] = c_sum(*(float (*)[80])&nr_sig[84], 80); /* 80 */ + st->amp_inst_band[4] = c_sum(*(float (*)[156])&nr_sig[164], 156); /* 156 */ + /*for (i = 0; i < 5; i++) + fprintf(fp_test, "%f \n", st->amp_inst_band[i]);*/ + + slope_detection(st); + + /* dynamic range detection */ + dr_detection(st); + + if ((st->vad_slope != 0.0F) || (st->vad_dr != 0.0F)) { + vad = true; + } else { + vad = false; + } + + /* log_sigma_k calculation for mmse vad */ + for (i = 0; i < 321; i++) { + tmp_fft_out[i] = 1.0F + ksi[i]; + } + b_log(tmp_fft_out); /* C = log(1+ksi) */ + + for (k = 0; k < 321; k++) { + if (0.0F == (1.0F + ksi[k])) + tmp_fft_out[k] = gammak[k] * ksi[k] / ((float)3.3495873e-008) - tmp_fft_out[k]; /* assign a small value to avoid dividing by zero */ + else + tmp_fft_out[k] = gammak[k] * ksi[k] / (1.0F + ksi[k]) - tmp_fft_out[k]; /* log_sigma_k */ + } + + xtmp_im = c_sum(tmp_fft_out, nFFT/2); /* here only consider log_sigma_k(1:nFFT/2) */ + xtmp_im = xtmp_im/(nFFT/2.0F); + + if (xtmp_im <= st->eta) { + st->vad_mmse_cnt = MAX(0.0F, st->vad_mmse_cnt - 1.0F); + if (st->vad_mmse_cnt == 0.0F) { + st->vad_mmse = 0.0F; + } + } else { + st->vad_mmse = 1.0F; + st->vad_mmse_cnt = st->vad_mmse_cnt_para; + } + + /* noise power estimate correction when it is too high */ + /* small speech in quiet after big statioanry noise, correct wrong */ + st->amp_inst_sum_hist[2] = st->amp_inst_sum_hist[1]; + st->amp_inst_sum_hist[1] = st->amp_inst_sum_hist[0]; + st->amp_inst_sum_hist[0] = c_sum(st->amp_inst_band, 5); + //fprintf(fp_test, "%f \n", st->amp_inst_sum_hist[0]); + + c_power(st->amp_inst_sum_hist, b_c, 3); /* power based */ + /*for (k = 0; k < 3; k++) + fprintf(fp_test, "%f \n", b_c[k]);*/ + + for (k = 0; k < 3; k++) { + b_c[k] *= 0.3333F; /* average power */ + } + + xtmp_im = b_c[0]; + for (k = 0; k < 2; k++) { + xtmp_im += b_c[k + 1]; + } + + absar = st->noise_mu2[4]; + for (k = 0; k < 315; k++) { + absar += st->noise_mu2[k + 5]; + } + + if (absar / 8.0F > xtmp_im) { /* +/-18dB for statioanry noise variance for the whole signals, assumption */ + for (k = 0; k < 321; k++) { + st->noise_mu2[k] = 0.8F * st->noise_mu2[k] + 0.2F * tmp_ifft_out[k]; /* here faster to update noise power */ + } + } + + /* %% keep better speech quality, not too easy to update noise power %% */ + *speech_vad = true; + if ((st->vad_mmse == 0.0F) || (!vad)) { + for (k = 0; k < 321; k++) { + st->noise_mu2[k] = st->mu * st->noise_mu2[k] + (1.0F - st->mu) * tmp_ifft_out[k]; /* update noise power */ + } + *speech_vad = false; + } + + /* === end of vad === */ + + + /* v(k) calculation */ + for (k = 0; k < 321; k++) { + if (0.0F == (1.0F + ksi[k])) + xtmp_im = ksi[k] * gammak[k] / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + else + xtmp_im = ksi[k] * gammak[k] / (1.0F + ksi[k]); /* v(k) */ + tmp_ifft_out[k] = xtmp_im; + tmp_fft_out[321+k] = xtmp_im / 2.0F; + tmp_fft_out[k] = (float)exp(-0.5F * xtmp_im); /* C = exp(-0.5*vk) */ + } + + d_power(tmp_ifft_out, &tmp_ifft_out[321]); /* vk.^0.5 */ + for (i = 0; i < 321; i++) { + //if ((tmp_ifft_out[321+i] == 0.0F) && (gammak[i] == 0.0F)) { /* bug fixed to avoid zero denominator */ + if ((gammak[i] == 0.0F)) { + tmp_ifft_out[321+i] = 0.0F; + } else { + tmp_ifft_out[321+i] = (c * tmp_ifft_out[321+i] * tmp_fft_out[i]) / gammak[i]; + } + } + + bessel_function(0.0F, &tmp_fft_out[321], tmp_fft_out); /* zero order modified Bessel function */ + bessel_function(1.0F, &tmp_fft_out[321], &tmp_fft_out[321]); /* first order modified Bessel function */ + + /* G(ksi, gammak) estimation */ + for (k = 0; k < 321; k++) { + tmp = tmp_ifft_out[321+k]; + xtmp_re = tmp_fft_out[k] * (1.0F + tmp_ifft_out[k]); + tmp1 = tmp_fft_out[321+k] * tmp_ifft_out[k]; + if (0.0F == (1.0F + ksi[k])) + lambda = qkr * (float)exp(tmp_ifft_out[k]) / ((float)3.3495873e-008); /* assign a small value to avoid dividing by zero */ + else + lambda = qkr * (float)exp(tmp_ifft_out[k]) / (1.0F + ksi[k]); + xtmp_re = nr_sig[k] * (tmp * (xtmp_re + tmp1)); + if (0.0F == (1.0F + lambda)) + tmp = lambda / ((float)3.3495873e-008) * xtmp_re; /* assign a small value to avoid dividing by zero */ + else + tmp = lambda / (1.0F + lambda) * xtmp_re; /* estimated amplitude of clean speech */ + + //Xk_prev[k].re = c_sig[k].re * c_sig[k].re - c_sig[k].im * c_sig[k].im; /* use for updating ksi in next frame */ + //Xk_prev[k].im = c_sig[k].re * c_sig[k].im + c_sig[k].im * c_sig[k].re; /* use for updating ksi in next frame */ + st->Xk_prev[k] = tmp * tmp; /* use for updating ksi in next frame */ + tmp_ifft_out[321+k] = tmp; + } + + for (k = 0; k < (nFFT/2+1); k++) { + nr_sig[k] = (float)atan2(nr_fd_half[k].im, nr_fd_half[k].re); /* theta */ + } + + for (k = 0; k < (nFFT/2+1); k++) { + if (nr_sig[k] == 0.0F) { + xtmp_re = 1.0F; + xtmp_im = 0.0F; + } else { + xtmp_re = (float)cos(nr_sig[k]); /* Euler's formula */ + xtmp_im = (float)sin(nr_sig[k]); /* Euler's formula */ + } + nr_fd_half[k].re = xtmp_re; /* phase part */ + nr_fd_half[k].im = xtmp_im; /* phase part */ + } + + for (k = 0; k < 321; k++) { + //tmp1 = c_sig[k].re; + //c_sig[k].re = c_sig[k].re * nr_fd_half[k].re - c_sig[k].im * nr_fd_half[k].im; /* estimated clean speech signal */ + //c_sig[k].im = tmp1 * nr_fd_half[k].im + c_sig[k].im * nr_fd_half[k].re; /* estimated clean speech signal */ + tmp = tmp_ifft_out[321+k]; + nr_fd_half[k].re = tmp * nr_fd_half[k].re; /* estimated clean speech signal */ + nr_fd_half[k].im = tmp * nr_fd_half[k].im; /* estimated clean speech signal */ + } + + tmp_fft_out[0] = nr_fd_half[0].re; + for (k = 1, j = 1; j < (nFFT/2); k+=2, j++) { + tmp_fft_out[k] = nr_fd_half[j].re; + tmp_fft_out[k+1] = nr_fd_half[j].im; + } + tmp_fft_out[nFFT-1] = nr_fd_half[nFFT/2].re; + + /* restore nFFT points before doing inverse FFT, do conjugate symmetric for the lower half points inside speech_ifft() */ + speech_ifft(st->nr_fft_table, tmp_fft_out, tmp_ifft_out); /* faster than matlab ifft(), in/out not use the same buffer */ + for (k = 0; k < len; k++) { /* ignore output samples from (len+1) to (2*len) */ + tmp_ifft_out[k] /= nFFT; /* divide by nFFT to get values as in matlab */ + } + + for (k = 0; k < len1; k++) { + y[k] = st->y_old[k] + (tmp_ifft_out[k] * st->syn_win[k]); /* apply synthesis window and 50% OLA for output */ + st->y_old[k] = tmp_ifft_out[len1 + k] * st->syn_win[len1 + k]; /* apply synthesis window and update output OLA buffer */ + } + + if (1 == (unsigned short)*frame) + st->nr_frame1_last_sample = y[st->frame_size-1]; + if (2 == (unsigned short)*frame) { + alpha2 = 1.0F/160.0F; + alpha = 1 - alpha2; + y[0] = alpha * st->nr_frame1_last_sample + alpha2 * y[0]; + for (i = 0; i < st->frame_size-1; i++) { + alpha2 = (float)(1.0F + i)/160.0F; + alpha = 1 - alpha2; + y[i+1] = alpha * y[i] + alpha2 * y[i+1]; + } + } +#ifdef SSP_STACK_TO_HEAP + SSP_SAFE_FREE_BUF(gammak); + SSP_SAFE_FREE_BUF(ksi); + SSP_SAFE_FREE_BUF(tmp_fft_out); + SSP_SAFE_FREE_BUF(tmp_ifft_out); + SSP_SAFE_FREE_BUF(nr_sig); + SSP_SAFE_FREE_BUF(nr_fd_half); +#endif +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.h new file mode 100755 index 000000000..976662ef5 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.h @@ -0,0 +1,18 @@ + +#ifndef MMSE_H +#define MMSE_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "tmwtypes.h" +#include "struct.h" + +/* Function Declarations */ +extern void NR(short *x, float initial_noise_pow_time, float *frame, NRState *st, boolean_T *speech_vad, float *y); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse.o new file mode 100644 index 0000000000000000000000000000000000000000..251e0b07e4521f139c70135d8071a34f17d55ff2 GIT binary patch literal 22112 zcmc(m34B!5+5gX-J2RQ=Aq#{MV6s41vP=>-!(!GE0zyc@C0ZwwJwrCLKp3rnY>IDd zSZX0bM+FzORaD%y;D**>Yphmnr7opvg}F_DNT^od-*e`<VZ#5l{y(4h|M~ncocn#A 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zGaixN+|p5#j$an>8y~(X@lV+IGh}*R>E-Fpj*hm5%FYhl=KuD<t3>(MpX!m089of3 z@faqL1e{66wpboN<d*^~rrIC%v%!bb^S`hE2Ts&}bfh9+Y8AN%bX4Gl!P_9UBl%FE z`_X#@J+BZ&Jzj*qf;CD%blW9}@K4W%Ph`4~2&G4P(bHQ5S-%FNn2r}3C;cLH@tTYL zM&q6EKhPibL-(Wi>i+kAFyHqMnC?sQ`h8uH^=lxC@6&{^lE8;<tA*~L-W+^pNMnG~ z!_+&R-cKRx*FY2#(|vv<)1lkeLiSH@p<jBKDu&ae_rCfy5Jd*k`&4g4Kih4P{nNV& z=}|jT{^(tiUfy2Flpgg5IwEEYv4V_zkd4CqOx>><4T)P1AG+V8?57)cP=os&<VVLV z2)a!AF8Fnmz=xiN!_fW9QQ=oFG^gn0cpEatMk`+~l5_BEtt+5@uTeg~VM{C0`(#+V q;79&=#2-GcLVD{FF%~iO7f^KH2n5QTJ|-cG59SGR3kiJa_x*3c8#EmN literal 0 HcmV?d00001 diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.c new file mode 100755 index 000000000..3394f1386 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.c @@ -0,0 +1,275 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% + *% + *% mmse_init.c + *% Author: Sharon Lee + *% History: + *% Created by Sharon Lee in August, 2019 + *% + *%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + +/* Include files */ +#include <string.h> +#include "define.h" +#include "struct.h" +#include "packfft.h" +#include "memalloc.h" +#include "mmse_init.h" + +/* Function Definitions */ +EXPORT void NR_para(ssp_para_struct *para, float *aa, float *mu) +{ + ssp_para_struct *para_obj; + unsigned short temp; + + /* NR Parameters */ + para_obj = para; + para_obj->para_nr_noise_coeff = 2; + + //para_obj->para_nr_init_sile_time = MIN(MAX(para_obj->para_nr_init_sile_time, 0), 250); + //if (fs == 16000.0F) { + //*nenr_silence_time = para_obj->para_nr_init_sile_time*2; + //} else { + //*nenr_silence_time = para_obj->para_nr_init_sile_time; + //} + + temp = MIN(MAX(para_obj->para_nr_snr_coeff, 0), 25); + //if (temp >= 0 && temp <= 3) { /* for low SNR, [0, 3] = > [0.6, 0.9] */ + if (temp <= 3) { /* for low SNR, [0, 3] = > [0.6, 0.9] */ + *aa = (float)(0.60 + temp * 0.1); /* the speed of priori SNR tracking */ + } + else if (temp > 3 && temp <= 10) { /* for middle SNR, [4, 10] => [0.91, 0.97] */ + *aa = (float)(0.90 + (temp - 3) * 0.01); /* the speed of priori SNR tracking */ + } + else if (temp > 10 && temp <= 20) { /* for high SNR, [11, 20] => [0.972, 0.99] */ + *aa = (float)(0.97 + (temp - 10) * 0.002); /* the speed of priori SNR tracking */ + } + else { /* for higher SNR, [21, 25] => [0.991, 0.995] */ + *aa = (float)(0.99 + (temp - 20) * 0.001); /* the speed of priori SNR tracking */ + } + + temp = MIN(MAX(para_obj->para_nr_noise_coeff, 0), 14); + *mu = (float)(0.99 - temp * 0.01); + +} + +EXPORT NRState *NR_init(int frame_size, float fs, float aa, float mu) +{ + int i; + + static const float fv0[320] = { 0.00978696439F, 0.0195724051F, 0.0293563232F, + 0.0391375758F, 0.0489150211F, 0.0586875156F, 0.0684547871F, 0.0782151669F, + 0.0879682377F, 0.0977126881F, 0.107447952F, 0.117172875F, 0.126886666F, + 0.136588231F, 0.146276712F, 0.155951113F, 0.165610686F, 0.175254285F, + 0.184881195F, 0.194490388F, 0.204080895F, 0.213651851F, 0.223202422F, + 0.232731596F, 0.242238432F, 0.251722068F, 0.261181623F, 0.270616144F, + 0.280024707F, 0.289406538F, 0.298760593F, 0.308086067F, 0.317382F, + 0.32664752F, 0.33588177F, 0.345083892F, 0.354252934F, 0.363388F, 0.37248826F, + 0.381552905F, 0.390580982F, 0.399571627F, 0.408524F, 0.417437255F, + 0.426310569F, 0.435143F, 0.443933755F, 0.452682018F, 0.461386859F, + 0.470047563F, 0.478663206F, 0.487233073F, 0.495756179F, 0.50423187F, + 0.512659192F, 0.521037519F, 0.529365838F, 0.537643492F, 0.545869648F, + 0.554043531F, 0.562164307F, 0.570231259F, 0.578243613F, 0.586200595F, + 0.594101369F, 0.601945281F, 0.609731555F, 0.617459357F, 0.62512809F, + 0.632736921F, 0.640285134F, 0.647772F, 0.655196846F, 0.662559F, 0.669857562F, + 0.677092075F, 0.68426168F, 0.691365719F, 0.698403656F, 0.705374539F, + 0.712277949F, 0.719113111F, 0.725879431F, 0.732576191F, 0.739202797F, + 0.745758593F, 0.752243042F, 0.75865525F, 0.764995F, 0.771261334F, + 0.77745384F, 0.783571839F, 0.789614856F, 0.795582235F, 0.80147332F, + 0.807287753F, 0.813024819F, 0.818684F, 0.824264765F, 0.829766572F, + 0.835188925F, 0.84053123F, 0.845793068F, 0.850973964F, 0.85607326F, + 0.861090541F, 0.866025388F, 0.870877266F, 0.875645757F, 0.880330384F, + 0.88493067F, 0.889446199F, 0.893876493F, 0.898221254F, 0.902479887F, + 0.906652153F, 0.910737574F, 0.914735734F, 0.918646276F, 0.922468841F, + 0.926203072F, 0.929848552F, 0.933404922F, 0.936872F, 0.940249264F, + 0.94353646F, 0.946733356F, 0.949839532F, 0.952854693F, 0.955778599F, + 0.958611F, 0.961351573F, 0.964000046F, 0.966556191F, 0.969019771F, + 0.971390486F, 0.973668218F, 0.975852728F, 0.977943659F, 0.979940951F, + 0.981844425F, 0.983653843F, 0.985368967F, 0.986989796F, 0.988516092F, + 0.989947617F, 0.99128443F, 0.992526233F, 0.993673F, 0.994724631F, + 0.995680928F, 0.996541858F, 0.997307301F, 0.997977257F, 0.998551607F, + 0.999030352F, 0.999413371F, 0.999700665F, 0.999892235F, 0.999988F, 0.999988F, + 0.999892235F, 0.999700665F, 0.999413371F, 0.999030352F, 0.998551607F, + 0.997977257F, 0.997307301F, 0.996541858F, 0.995680928F, 0.994724631F, + 0.993673F, 0.992526233F, 0.99128443F, 0.989947617F, 0.988516092F, + 0.986989796F, 0.985368967F, 0.983653843F, 0.981844425F, 0.979940951F, + 0.977943659F, 0.975852728F, 0.973668218F, 0.971390486F, 0.969019771F, + 0.966556191F, 0.964000046F, 0.961351573F, 0.958611F, 0.955778599F, + 0.952854693F, 0.949839532F, 0.946733356F, 0.94353646F, 0.940249264F, + 0.936872F, 0.933404922F, 0.929848552F, 0.926203072F, 0.922468841F, + 0.918646276F, 0.914735734F, 0.910737574F, 0.906652153F, 0.902479887F, + 0.898221254F, 0.893876493F, 0.889446199F, 0.88493067F, 0.880330384F, + 0.875645757F, 0.870877266F, 0.866025388F, 0.861090541F, 0.85607326F, + 0.850973964F, 0.845793068F, 0.84053123F, 0.835188925F, 0.829766572F, + 0.824264765F, 0.818684F, 0.813024819F, 0.807287753F, 0.80147332F, + 0.795582235F, 0.789614856F, 0.783571839F, 0.77745384F, 0.771261334F, + 0.764995F, 0.75865525F, 0.752243042F, 0.745758593F, 0.739202797F, + 0.732576191F, 0.725879431F, 0.719113111F, 0.712277949F, 0.705374539F, + 0.698403656F, 0.691365719F, 0.68426168F, 0.677092075F, 0.669857562F, + 0.662559F, 0.655196846F, 0.647772F, 0.640285134F, 0.632736921F, 0.62512809F, + 0.617459357F, 0.609731555F, 0.601945281F, 0.594101369F, 0.586200595F, + 0.578243613F, 0.570231259F, 0.562164307F, 0.554043531F, 0.545869648F, + 0.537643492F, 0.529365838F, 0.521037519F, 0.512659192F, 0.50423187F, + 0.495756179F, 0.487233073F, 0.478663206F, 0.470047563F, 0.461386859F, + 0.452682018F, 0.443933755F, 0.435143F, 0.426310569F, 0.417437255F, 0.408524F, + 0.399571627F, 0.390580982F, 0.381552905F, 0.37248826F, 0.363388F, + 0.354252934F, 0.345083892F, 0.33588177F, 0.32664752F, 0.317382F, + 0.308086067F, 0.298760593F, 0.289406538F, 0.280024707F, 0.270616144F, + 0.261181623F, 0.251722068F, 0.242238432F, 0.232731596F, 0.223202422F, + 0.213651851F, 0.204080895F, 0.194490388F, 0.184881195F, 0.175254285F, + 0.165610686F, 0.155951113F, 0.146276712F, 0.136588231F, 0.126886666F, + 0.117172875F, 0.107447952F, 0.0977126881F, 0.0879682377F, 0.0782151669F, + 0.0684547871F, 0.0586875156F, 0.0489150211F, 0.0391375758F, 0.0293563232F, + 0.0195724051F, 0.00978696439F }; + + static const float fv1[320] = { 0.0107656615F, 0.0215296466F, 0.0322919562F, + 0.043051336F, 0.0538065247F, 0.0645562708F, 0.0753002688F, 0.0860366821F, + 0.0967650637F, 0.107483961F, 0.118192747F, 0.128890172F, 0.139575332F, + 0.150247052F, 0.160904393F, 0.171546221F, 0.182171762F, 0.19277972F, + 0.203369319F, 0.213939428F, 0.224488989F, 0.235017046F, 0.245522663F, + 0.256004751F, 0.266462266F, 0.276894271F, 0.287299782F, 0.297677755F, + 0.308027178F, 0.318347186F, 0.328636646F, 0.338894695F, 0.349120229F, + 0.359312266F, 0.369469941F, 0.379592299F, 0.38967824F, 0.399726808F, + 0.40973708F, 0.419708192F, 0.429639101F, 0.439528793F, 0.449376404F, + 0.459180981F, 0.468941629F, 0.478657305F, 0.488327146F, 0.497950226F, + 0.507525563F, 0.517052352F, 0.526529551F, 0.535956383F, 0.545331836F, + 0.554655075F, 0.563925147F, 0.573141277F, 0.582302451F, 0.591407835F, + 0.600456655F, 0.609447896F, 0.618380725F, 0.627254426F, 0.636068F, + 0.64482069F, 0.653511524F, 0.662139833F, 0.670704722F, 0.679205298F, + 0.687640905F, 0.696010649F, 0.704313636F, 0.71254921F, 0.720716536F, + 0.7288149F, 0.736843348F, 0.744801283F, 0.752687871F, 0.760502279F, + 0.768244F, 0.775912F, 0.783505738F, 0.791024446F, 0.798467398F, 0.805833817F, + 0.813123107F, 0.820334494F, 0.827467382F, 0.834520817F, 0.841494501F, + 0.84838748F, 0.855199218F, 0.861929059F, 0.868576348F, 0.875140488F, + 0.881620646F, 0.888016522F, 0.894327343F, 0.900552392F, 0.906691253F, + 0.91274327F, 0.918707848F, 0.924584389F, 0.930372417F, 0.936071396F, + 0.94168061F, 0.947199643F, 0.952627957F, 0.957965F, 0.963210344F, + 0.968363464F, 0.973423779F, 0.978390813F, 0.983264148F, 0.988043427F, + 0.992727876F, 0.997317374F, 1.00181139F, 1.00620937F, 1.01051092F, + 1.01471579F, 1.01882339F, 1.02283347F, 1.02674544F, 1.03055918F, 1.03427422F, + 1.03789008F, 1.04140675F, 1.04482353F, 1.04814017F, 1.05135643F, 1.05447209F, + 1.05748677F, 1.06040013F, 1.0632118F, 1.06592178F, 1.06852961F, 1.07103503F, + 1.07343805F, 1.07573807F, 1.0779351F, 1.08002889F, 1.08201921F, 1.08390594F, + 1.08568883F, 1.08736777F, 1.08894241F, 1.09041286F, 1.09177887F, 1.09304035F, + 1.09419715F, 1.09524906F, 1.09619606F, 1.09703803F, 1.09777498F, 1.09840679F, + 1.09893346F, 1.09935474F, 1.09967077F, 1.09988153F, 1.09998679F, 1.09998679F, + 1.09988153F, 1.09967077F, 1.09935474F, 1.09893346F, 1.09840679F, 1.09777498F, + 1.09703803F, 1.09619606F, 1.09524906F, 1.09419715F, 1.09304035F, 1.09177887F, + 1.09041286F, 1.08894241F, 1.08736777F, 1.08568883F, 1.08390594F, 1.08201921F, + 1.08002889F, 1.0779351F, 1.07573807F, 1.07343805F, 1.07103503F, 1.06852961F, + 1.06592178F, 1.0632118F, 1.06040013F, 1.05748677F, 1.05447209F, 1.05135643F, + 1.04814017F, 1.04482353F, 1.04140675F, 1.03789008F, 1.03427422F, 1.03055918F, + 1.02674544F, 1.02283347F, 1.01882339F, 1.01471579F, 1.01051092F, 1.00620937F, + 1.00181139F, 0.997317374F, 0.992727876F, 0.988043427F, 0.983264148F, + 0.978390813F, 0.973423779F, 0.968363464F, 0.963210344F, 0.957965F, + 0.952627957F, 0.947199643F, 0.94168061F, 0.936071396F, 0.930372417F, + 0.924584389F, 0.918707848F, 0.91274327F, 0.906691253F, 0.900552392F, + 0.894327343F, 0.888016522F, 0.881620646F, 0.875140488F, 0.868576348F, + 0.861929059F, 0.855199218F, 0.84838748F, 0.841494501F, 0.834520817F, + 0.827467382F, 0.820334494F, 0.813123107F, 0.805833817F, 0.798467398F, + 0.791024446F, 0.783505738F, 0.775912F, 0.768244F, 0.760502279F, 0.752687871F, + 0.744801283F, 0.736843348F, 0.7288149F, 0.720716536F, 0.71254921F, + 0.704313636F, 0.696010649F, 0.687640905F, 0.679205298F, 0.670704722F, + 0.662139833F, 0.653511524F, 0.64482069F, 0.636068F, 0.627254426F, + 0.618380725F, 0.609447896F, 0.600456655F, 0.591407835F, 0.582302451F, + 0.573141277F, 0.563925147F, 0.554655075F, 0.545331836F, 0.535956383F, + 0.526529551F, 0.517052352F, 0.507525563F, 0.497950226F, 0.488327146F, + 0.478657305F, 0.468941629F, 0.459180981F, 0.449376404F, 0.439528793F, + 0.429639101F, 0.419708192F, 0.40973708F, 0.399726808F, 0.38967824F, + 0.379592299F, 0.369469941F, 0.359312266F, 0.349120229F, 0.338894695F, + 0.328636646F, 0.318347186F, 0.308027178F, 0.297677755F, 0.287299782F, + 0.276894271F, 0.266462266F, 0.256004751F, 0.245522663F, 0.235017046F, + 0.224488989F, 0.213939428F, 0.203369319F, 0.19277972F, 0.182171762F, + 0.171546221F, 0.160904393F, 0.150247052F, 0.139575332F, 0.128890172F, + 0.118192747F, 0.107483961F, 0.0967650637F, 0.0860366821F, 0.0753002688F, + 0.0645562708F, 0.0538065247F, 0.043051336F, 0.0322919562F, 0.0215296466F, + 0.0107656615F }; + + NRState *st = (NRState *)mem_alloc(sizeof(NRState)); + st->Fs = fs; + st->frame_size = frame_size; + st->aa = aa; + st->mu = mu; + + st->nr_fft_table = speech_fft_init(2*2*st->frame_size); + st->ana_win = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + st->syn_win = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + st->x_old = (short*)mem_alloc(st->frame_size*sizeof(short)); + st->y_old = (float*)mem_alloc(st->frame_size*sizeof(float)); + st->Xk_prev = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + st->noise_mean = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + st->noise_mu2 = (float*)mem_alloc((2*st->frame_size+1)*sizeof(float)); + st->amp_inst_band = (float*)mem_alloc(5*3*sizeof(float)); + st->noisy_st_trough = (float*)mem_alloc(5*sizeof(float)); + st->noisy_st_peak = (float*)mem_alloc(5*sizeof(float)); + st->amp_inst_sum_hist = (float*)mem_alloc(3*sizeof(float)); + st->float_x = (float*)mem_alloc(2*st->frame_size*sizeof(float)); + + for (i = 0; i < 2*st->frame_size; i++) { + st->ana_win[i] = fv0[i]; + st->syn_win[i] = fv1[i]; + } + + for (i = 0; i < st->frame_size; i++) { + st->x_old[i] = 0; + st->y_old[i] = 0.0F; + } + + for (i = 0; i < 2*st->frame_size+1; i++) { + //Xk_prev[i].re = 0.0F; + //Xk_prev[i].im = 0.0F; + st->Xk_prev[i] = 0.0F; + st->noise_mean[i] = 0.0F; + st->noise_mu2[i] = 0.0F; + } + + for (i = 0; i < 15; i++) { + st->amp_inst_band[i] = 0.0F; + } + + for (i = 0; i < 5; i++) { + st->noisy_st_trough[i] = 0.0F; + st->noisy_st_peak[i] = 0.0F; + } + + for (i = 0; i < 3; i++) { + st->amp_inst_sum_hist[i] = 0.0F; + } + + st->eta = 0.15F; + st->ksi_min = 0.0031622777F; + st->vad_slope_cnt = 0.0F; + st->vad_slope = 0.0F; + st->vad_dr_cnt = 0.0F; + st->vad_dr = 0.0F; + st->vad_mmse = 0.0F; + st->vad_mmse_cnt = 0.0F; + if (fs == 16000) + st->vad_mmse_cnt_para = 4; /* last at least 40ms, once the mmse vad goes up, keep the circumstance a period of time to get better speech quality */ + else if (fs == 8000) + st->vad_mmse_cnt_para = 2; /* last at least 40ms, once the mmse vad goes up, keep the circumstance a period of time to get better speech quality */ + + return st; + +} + +EXPORT void NR_free(NRState *st) +{ + speech_fft_free(st->nr_fft_table); + mem_free(st->ana_win); + mem_free(st->syn_win); + mem_free(st->x_old); + mem_free(st->y_old); + mem_free(st->Xk_prev); + mem_free(st->noise_mean); + mem_free(st->noise_mu2); + mem_free(st->amp_inst_band); + mem_free(st->noisy_st_trough); + mem_free(st->noisy_st_peak); + mem_free(st->amp_inst_sum_hist); + mem_free(st->float_x); + + mem_free(st); + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.h new file mode 100755 index 000000000..989a0f405 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.h @@ -0,0 +1,20 @@ + +#ifndef MMSE_INIT_H +#define MMSE_INIT_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "tmwtypes.h" +#include "struct.h" + +/* Function Declarations */ +extern void NR_para(ssp_para_struct *para, float *aa, float *mu); +extern NRState *NR_init(int frame_size, float fs, float aa, float mu); +extern void NR_free(NRState *st); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_init.o new file mode 100644 index 0000000000000000000000000000000000000000..8a56d88a56f0de07f90d9fbce875908bdbb6c92a GIT binary patch literal 18484 zcmd6O33OD|vi3gRola*UolXKIj15GHKt>{<Bxi>yf+9pFk*Vo)I)mwSnshg_fP#vE zT%MqE6@>?0MFB-cQM`x>3OGHShwFfH6_r77M7_eRZ=X6z$6x>dt^cjJ*4u0C^HtTZ zU3;pkbNb|D(eP2_nx+Y}Xd*|na6(KSs#@ZT737GnqLZSAE>GQQ$=<&tt543}tRB`r zJ>JjkYR~EL{^m1DA|a>G`x{PXP01Lv;be#U_*1JddGge;`SGXX>UW)basG8D#k}F) zo=Bf|)^_>6ALoSAXM`@blBR3QhLdUa$Bsdts43_JNo>E*jwO<&lQdK7-#GU0cVh9s z9ys&H6_pk8p-VrVm+{aya()J=rSjERP)^7@|BCXI?5E06Y3R?8iSKR>l_q{8bH6$} zRO^;|(zYV5JmB7Os%-g=Q#0;7eQNOX^FN(CZ!6y-{MAcOw!L%d$qvi+pKPb3{-D;) zJ>!&!`$hYypd5Nyx9iFa%J-kOtv0yD<pYUxECzRE#ujmHr|m-PX0*AzIoxMPGqtgq zI^r#HvtDHeQ!|>Wjg`qPi=**AuY{(^cl(k)>N>Khd_?)&VUTntx{T>hPPU&XdW`(> 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b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_rtwutil.c new file mode 100755 index 000000000..f34e63c67 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_rtwutil.c @@ -0,0 +1,101 @@ + +/* Include files */ +#include <math.h> +#include "mmse_rtwutil.h" + +/*extern *fp_test; +extern debug_cnt; +extern frame_cnt;*/ + +/* Function Definitions */ +double rt_hypotd(double u0, double u1) +{ + double y; + double a; + double b; + + //if (frame_cnt == 300) + // printf(""); + + #if 0 + a = u0; + b = u1; + y = (double)sqrt(a * a + b * b); + if (y == 0.0F) /* can avoid y to be zero if as denominator */ + { + a = fabs(u0); + b = fabs(u1); + if (a < b) { + a /= b; + y = b * sqrt(a * a + 1.0); + } else if (a > b) { + b /= a; + y = a * sqrt(b * b + 1.0); + } else { + y = a * 1.4142135623730951; + } + } + #else + a = fabs(u0); + b = fabs(u1); + if (a < b) { + a /= b; + y = b * sqrt(a * a + 1.0); + } else if (a > b) { + b /= a; + y = a * sqrt(b * b + 1.0); + } else { + y = a * 1.4142135623730951; + } + #endif + + /*fprintf(fp_test, "%.8lf \n", y); + debug_cnt++; + if (debug_cnt == 80943) + printf("");*/ + + return y; +} + +float rt_hypotf(float u0, float u1) +{ + float y; + float a; + float b; + + #if 1 + a = u0; + b = u1; + y = (float)sqrt(a * a + b * b); + if (y == 0.0F) /* can avoid y to be zero if as denominator */ + { + a = (float)fabs(u0); + b = (float)fabs(u1); + if (a < b) { + a /= b; + y = b * (float)sqrt(a * a + 1.0F); + } else if (a > b) { + b /= a; + y = a * (float)sqrt(b * b + 1.0F); + } else { + y = a * 1.41421354F; + } + } + #else + a = (float)fabs(u0); + b = (float)fabs(u1); + if (a < b) { + a /= b; + y = b * (float)sqrt(a * a + 1.0F); + } else if (a > b) { + b /= a; + y = a * (float)sqrt(b * b + 1.0F); + } else { + y = a * 1.41421354F; + } + #endif + + return y; +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_rtwutil.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_rtwutil.h new file mode 100755 index 000000000..006b13475 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_rtwutil.h @@ -0,0 +1,16 @@ + +#ifndef MMSE_RTWUTIL_H +#define MMSE_RTWUTIL_H + +/* Include files */ +#include <stddef.h> +#include <stdlib.h> +#include "tmwtypes.h" + +/* Function Declarations */ +extern double rt_hypotd(double u0, double u1); +extern float rt_hypotf(float u0, float u1); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_rtwutil.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/mmse_rtwutil.o new file mode 100644 index 0000000000000000000000000000000000000000..77130278773718db4b3304ae8a8ddd0e1d09d163 GIT binary patch literal 6928 zcmc(jdu&_P9mmi0y^dWwabIbh&<;6W8D?NRX-iv5OY<PmpwQ+)QO9GJUrAgXyYr*8 z9pk-8D{OQt0tRKtA86}_fD9;%sYs<7P#7RFl?|~nm^KO6s0D&-Xl(1g-{aqPZbH!} z?T`JWb3ebwIlpu6Ip>~x?Hjs#FER{6*<z@WnzEFdSg0fJl^P+nL^W&8doX;$x^1Fz z80DG!9<RJ`+lQ4ofA<_~IzDz{fj?AH{-@u!Zu35UW5xLTldwD$kN;q$-OpM-L#w&R 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b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes.c new file mode 100755 index 000000000..713762daf --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes.c @@ -0,0 +1,464 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ +/*% */ +/*% nlpaes.c */ +/*% Author: Sharon Lee */ +/*% History: */ +/*% Created by Sharon Lee in August, 2020 */ +/*% */ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ + +/* Include files */ +#include <math.h> +#include "tmwtypes.h" +#include "define.h" +#include "struct.h" +#include "nlpaes_subfun.h" +#include "memalloc.h" +#include "packfft.h" +#include "lpaec_subfun.h" +#include "nlpaes.h" + +#ifdef SSP_STACK_TO_HEAP + short *mic_raw_std; + float *tmp1; + float *tmp2; +#endif + +#ifndef SSP_SAFE_FREE_BUF +#define SSP_SAFE_FREE_BUF(OBJ) {if (NULL != OBJ) {free(OBJ); OBJ = NULL; } } +#endif + +#ifndef SSP_CALLOC +#define SSP_CALLOC(TYPE, COUNT) ((TYPE *)calloc(COUNT, sizeof(TYPE))) +#endif + +/* Function Definitions */ +EXPORT void NLP_AES_para(ssp_para_struct *para, float *std_thrd, float *aes_supp_coef1, float *aes_supp_coef2) +{ + ssp_para_struct *para_obj; + unsigned short tmp; + + /* NLP AES Parameters */ + para_obj = para; + + tmp = MIN(MAX(para_obj->para_aes_std_thrd, 0), 39); /* the threshold level for residual echo */ + *std_thrd = 0.6f + tmp * 0.01f; /* [0.6, 0.99], each step 0.01 */ + + tmp = MIN(MAX(para_obj->para_aes_supp_coeff, 0), 100); /* the suppression level for residual echo */ + *aes_supp_coef1 = 1.0f + tmp * 0.125f; /* [1.0, 13.5], each step 0.125 */ + *aes_supp_coef2 = 2.0f + tmp * 0.25f; /* [2.0, 27.0], each step 0.25 */ + +} + +EXPORT NonLinearEchoState *NLP_AES_init(int frame_size, float sampling_rate, float std_thrd, float aes_supp_coef1, float aes_supp_coef2) +{ + int i; + int N, N3, M; + + NonLinearEchoState *st = (NonLinearEchoState *)mem_alloc(sizeof(NonLinearEchoState)); + st->fdstd_thrd = std_thrd; + st->aes_supp_coef1 = aes_supp_coef1; + st->aes_supp_coef2 = aes_supp_coef2; + st->frame_size = frame_size; + st->ps_size = st->frame_size; + N = st->ps_size; /* power spectrum size */ + N3 = 2*N - st->frame_size; + st->sampling_rate = (int)sampling_rate; + + st->echo_state = NULL; + st->nbands = 2; + M = st->nbands; + st->bank = filterbank_create(M, sampling_rate, N, 1); + st->frame = (float*)mem_alloc(2*N*sizeof(float)); + st->window = (float*)mem_alloc(2*N*sizeof(float)); + st->ft = (float*)mem_alloc(2*N*sizeof(float)); + st->ps = (float*)mem_alloc((N+M)*sizeof(float)); + st->echo_noise = (float*)mem_alloc((N+M)*sizeof(float)); + st->residual_echo = (float*)mem_alloc((N+M)*sizeof(float)); + st->old_ps = (float*)mem_alloc((N+M)*sizeof(float)); + st->prior = (float*)mem_alloc((N+M)*sizeof(float)); + st->post = (float*)mem_alloc((N+M)*sizeof(float)); + st->gain = (float*)mem_alloc((N+M)*sizeof(float)); + st->gain2 = (float*)mem_alloc((N+M)*sizeof(float)); + st->gain_floor = (float*)mem_alloc((N+M)*sizeof(float)); + st->zeta = (float*)mem_alloc((N+M)*sizeof(float)); + + st->inbuf = (float*)mem_alloc(N3*sizeof(float)); + st->outbuf = (float*)mem_alloc(N3*sizeof(float)); + + aes_conj_window(st->window, 2*N3); + + for (i=0;i<N+M;i++) { + st->old_ps[i] = FLOAT_ONE; + st->gain[i] = FLOAT_ONE; + st->post[i] = FLOAT_ONE; + st->prior[i] = FLOAT_ONE; + st->echo_noise[i] = FLOAT_ZERO; + st->zeta[0] = FLOAT_ZERO; + } + + st->echo_sup = -40; + st->echo_sup_active = -15; + + for (i=0;i<N3;i++) { + st->inbuf[i] = 0; + st->outbuf[i] = 0; + } + + st->fft_lookup = speech_fft_init(2*N); + + st->nb_adapt = 0; + st->min_count = 0; + + /* STD/DTD */ + st->aes_std_in = (short*)mem_alloc(frame_size*sizeof(short)); + st->mic_raw_ola = (short*)mem_alloc(frame_size*sizeof(short)); + //st->fdstd_mic_in_sm = (float*)mem_alloc(frame_size*sizeof(float)); + //st->fdstd_linear_echo_sm = (float*)mem_alloc(frame_size*sizeof(float)); + + for (i=0;i < st->frame_size;i++) { + st->mic_raw_ola[i] = 0; + //st->fdstd_mic_in_sm[i] = FLOAT_ZERO; + //st->fdstd_linear_echo_sm[i] = FLOAT_ZERO; + } + st->RER_smooth = FLOAT_ZERO; + st->RER_vad = 0; + st->st_vad = 0; + st->fdstd_vad = 0; + st->frame1_last_sample = 0; + + return st; + +} + +EXPORT void NLP_AES_free(NonLinearEchoState *st) +{ + mem_free(st->frame); + mem_free(st->ft); + mem_free(st->ps); + mem_free(st->gain2); + mem_free(st->gain_floor); + mem_free(st->window); + mem_free(st->old_ps); + mem_free(st->gain); + mem_free(st->prior); + mem_free(st->post); + mem_free(st->echo_noise); + mem_free(st->residual_echo); + mem_free(st->zeta); + + mem_free(st->inbuf); + mem_free(st->outbuf); + + speech_fft_free(st->fft_lookup); + filterbank_free(st->bank); + + mem_free(st->aes_std_in); + mem_free(st->mic_raw_ola); + //mem_free(st->fdstd_mic_in_sm); + //mem_free(st->fdstd_linear_echo_sm); + + mem_free(st); +#ifdef SSP_STACK_TO_HEAP + //SSP_SAFE_FREE_BUF(mic_raw_std); + SSP_SAFE_FREE_BUF(tmp1); + SSP_SAFE_FREE_BUF(tmp2); +#endif + +} + +void std_residual_echo(NonLinearEchoState *st, float *residual_echo, int len, boolean_T speech_vad) +{ + int i; + float leak2; + int N; + //float rer_coef; + + N = st->echo_state->window_size; + len = len; + /* Apply hanning window (should pre-compute it) */ + for (i=0;i<N;i++) + st->echo_state->y[i] = st->echo_state->window[i] * st->echo_state->last_y[i]; + + /* Compute power spectrum of the linear echo in each bin */ + speech_fft(st->echo_state->fft_table, st->echo_state->y, st->echo_state->Y); + bin_power_spectrum(st->echo_state->Y, residual_echo, N); /* powe-based linear echo */ + + //rer_coef = 0.75f; + //st->RER_smooth = rer_coef*st->RER_smooth + (FLOAT_ONE-rer_coef)*st->echo_state->RER; /* not better */ + //if (st->RER_smooth*32767 > 2000) + if (st->echo_state->RER*32767 > 3000) + st->RER_vad = 1; + else + st->RER_vad = 0; + + + { +#ifdef SSP_STACK_TO_HEAP + if (tmp1 == NULL) + tmp1 = SSP_CALLOC(float, 320); + if (tmp2 == NULL) + tmp2 = SSP_CALLOC(float, 320); + + memset(tmp1, 0, 320 * sizeof(float)); + memset(tmp2, 0, 320 * sizeof(float)); +#else + float tmp1[320], tmp2[320]; +#endif + float fdstd_tau, fdstd_tau_sum; + int start_f, end_f; + + for (i=0;i < st->frame_size;i++) { + tmp1[i] = st->mic_raw_ola[i]; /* previous frame */ + tmp1[i+st->frame_size] = st->aes_std_in[i]; /* current frame */ + st->mic_raw_ola[i] = st->aes_std_in[i]; /* update input overlap data */ + } + + for (i=0;i<N;i++) + tmp1[i] = st->echo_state->window[i] * tmp1[i]; + speech_fft(st->echo_state->fft_table, tmp1, tmp2); + bin_power_spectrum(tmp2, tmp1, N); + + fdstd_tau_sum = FLOAT_ZERO; + start_f = (int)(ceil(100 * N / st->sampling_rate)); + end_f = (int)(floor(3800 * N / st->sampling_rate)); + for (i = start_f; i <= end_f; i++) { + fdstd_tau = (float)sqrt(residual_echo[i]/(tmp1[i] + 0.000000000465f)); /* add small DC to avoid zero denominator */ + fdstd_tau_sum += fdstd_tau; + } + + if (fdstd_tau_sum > (float)(end_f - start_f + 1)) /* fix abnormal situation */ + fdstd_tau_sum = (float)(end_f - start_f + 1); + + st->fdstd_tau_mean = fdstd_tau_sum/(end_f - start_f + 1); /* frame-based */ + if (st->fdstd_tau_mean > st->fdstd_thrd) + st->fdstd_vad = 1; + else + st->fdstd_vad = 0; + + if ((st->RER_vad) && (st->fdstd_vad)) + st->st_vad = 1; + else + st->st_vad = 0; + + } + + if (st->st_vad) { + if (st->echo_state->leak_estimate > .5) /* the bigger the value, the more abrupt the signal */ + leak2 = st->aes_supp_coef1; + else + leak2 = st->aes_supp_coef2 * st->echo_state->leak_estimate; + } else { + if (!(st->RER_vad) && (speech_vad)) { + leak2 = 0.0f; /* keep clean speech signal not to be attenuated */ + } else { + if (st->echo_state->leak_estimate > .5) + leak2 = 1.0f; + else + leak2 = 2.0f * st->echo_state->leak_estimate; + } + } + + for (i=0;i<=st->frame_size;i++) { + if (st->st_vad) + residual_echo[i] = leak2 * residual_echo[i]; + else + residual_echo[i] = (short)(leak2 * residual_echo[i]); + } + +} + +EXPORT void NLP_AES(NonLinearEchoState *aes_state, short *y, float aes_frame, boolean_T speech_vad) +{ + int i; + int M; + int N; + int N3; + float *ps; + float Zframe; + float Pframe; + float beta, beta_1; + float effective_echo_suppress; + NonLinearEchoState *st; + float alpha, alpha2; + float y_tmp[160]; + + st = aes_state; + N = st->ps_size; + N3 = 2*N - st->frame_size; + ps = st->ps; + + st->nb_adapt++; + if (st->nb_adapt>20000) + st->nb_adapt = 20000; + st->min_count++; + + beta = MAX(.03f, (float)(FLOAT_ONE / st->nb_adapt)); + beta_1 = FLOAT_ONE - beta; + beta_1 = beta_1; + M = st->nbands; + + /* Deal with residual echo if provided */ + if (st->echo_state) { + std_residual_echo(st, st->residual_echo, N, speech_vad); + + /* If there are ridiculous values, it'll show up in the DC and just reset everything to zero */ + if (!(st->residual_echo[0] >=0 && st->residual_echo[0]<N*1e9f)) { + for (i=0;i<N;i++) + st->residual_echo[i] = 0; + } + + for (i=0;i<N;i++) + st->echo_noise[i] = MAX(.6f * st->echo_noise[i], st->residual_echo[i]); /* power-based */ + filterbank_linear2sb(st->bank, st->echo_noise, st->echo_noise+N); + } else { + for (i=0;i<N+M;i++) + st->echo_noise[i] = 0; + } + + aes_analysis(st, y); + + /* Special case for first frame */ + if (st->nb_adapt==1) + for (i=0;i<N+M;i++) + st->old_ps[i] = ps[i]; + + for (i=0;i<N+M;i++) { + float gamma; + + /* Total noise estimate */ + float tot_noise = 1.f + st->echo_noise[i]; + + /* Posteriori SNR */ + st->post[i] = ps[i] / tot_noise - 1.f; + st->post[i]=MIN(st->post[i], 100.f); + + /* Update gamma */ + gamma = .1f + .89f * SQR(st->old_ps[i] / (st->old_ps[i] + tot_noise)); + + /* Priori SNR */ + st->prior[i] = gamma * MAX(0, st->post[i]) + (FLOAT_ONE-gamma) * (st->old_ps[i] / tot_noise); + st->prior[i] = MIN(st->prior[i], 100.f); + } + + /* Recursive average of the priori SNR */ + st->zeta[0] = .7f * st->zeta[0] + .3f * st->prior[0]; + for (i=1;i<N-1;i++) + st->zeta[i] = .7f * st->zeta[i] + .15f * st->prior[i] + .075f * st->prior[i-1] + .075f * st->prior[i+1]; + for (i=N-1;i<N+M;i++) + st->zeta[i] = .7f * st->zeta[i] + .3f * st->prior[i]; + + Zframe = 0; + for (i=N;i<N+M;i++) + Zframe = Zframe + st->zeta[i]; + + Pframe = .1f + .899f * aes_qcurve(Zframe / st->nbands); + effective_echo_suppress = (FLOAT_ONE - Pframe) * st->echo_sup + Pframe * st->echo_sup_active; + aes_gain_floor(effective_echo_suppress, st->echo_noise+N, st->gain_floor+N, M); + + /* Compute speech probability of presence */ + for (i=N;i<N+M;i++) { + float theta; + float MM; /* gain from hypergeometric function */ + float prior_ratio; /* Weiner filter gain */ + float P1; /* priority probability of speech presence */ + float q; /* speech absence the priori probability */ + + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + theta = prior_ratio * (1.f + st->post[i]); + + MM = aes_hypergeom_gain(theta); + st->gain[i] = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + st->old_ps[i] = .2f * st->old_ps[i] + .8f * SQR(st->gain[i]) * ps[i]; /* save old power spectrum */ + + P1 = .199f + .8f * aes_qcurve(st->zeta[i]); + q = FLOAT_ONE - Pframe * P1; + st->gain2[i] = 1/(1.f + (q/(1.f-q))*(1+st->prior[i])*(float)exp(-theta)); /* lambda/(1+lambda) */ + + } + + filterbank_sb2linear(st->bank,st->gain2+N, st->gain2); + filterbank_sb2linear(st->bank,st->gain+N, st->gain); + filterbank_sb2linear(st->bank,st->gain_floor+N, st->gain_floor); + + /* Compute gain */ + for (i=0;i<N;i++) { + float MM; + float theta; + float prior_ratio; + float tmp; + float p; + float g; + + prior_ratio = st->prior[i] / (st->prior[i] + 1.f); + theta = prior_ratio * (1.f + st->post[i]); + + /* Optimal estimator for loudness domain */ + MM = aes_hypergeom_gain(theta); + g = MIN(FLOAT_ONE, prior_ratio * MM); /* gain with bound */ + p = st->gain2[i]; /* interpolated speech probability of presence */ + + /* Constrain the gain to be close to the scale gain */ + if ((.333f *g) > st->gain[i]) + g = 3.f * st->gain[i]; + st->gain[i] = g; + + /* save old power spectrum */ + st->old_ps[i] = .2f * st->old_ps[i] + .8f * SQR(st->gain[i]) * ps[i]; + + /* Apply gain floor */ + if (st->gain[i] < st->gain_floor[i]) + st->gain[i] = st->gain_floor[i]; + + /* Take into account speech probability of presence */ + tmp = p * (float)math_sqrt(st->gain[i]) + (FLOAT_ONE -p) * (float)math_sqrt(st->gain_floor[i]); + st->gain2[i] = SQR(tmp); + + //if (st->st_vad) + //if (st->RER_vad) + st->gain2[i] = st->gain2[i] * st->gain[i]; + + } + + + for (i=1;i<N;i++) { + st->ft[2*i-1] = st->gain2[i] * st->ft[2*i-1]; + st->ft[2*i] = st->gain2[i] * st->ft[2*i]; + } + st->ft[0] = st->gain2[0] * st->ft[0]; + st->ft[2*N-1] = st->gain2[N-1] * st->ft[2*N-1]; + + speech_ifft(st->fft_lookup, st->ft, st->frame); + + /* Apply synthesis window (for WOLA) */ + for (i=0;i<2*N;i++) + st->frame[i] = st->frame[i] * st->window[i]; + + /* Perform overlap and add */ + for (i=0;i<N3;i++) { + y_tmp[i] = st->outbuf[i] + st->frame[i]; + } + + if (1 == (unsigned short)aes_frame) + st->frame1_last_sample = y_tmp[N3-1]; + if (2 == (unsigned short)aes_frame) { + alpha2 = 1.0F/160.0F; + alpha = 1 - alpha2; + y_tmp[0] = alpha * st->frame1_last_sample + alpha2 * y_tmp[0]; + for (i = 0; i < N3-1; i++) { + alpha2 = (float)(1.0F + i)/160.0F; + alpha = 1 - alpha2; + y_tmp[i+1] = alpha * y_tmp[i] + alpha2 * y_tmp[i+1]; + } + } + + for (i=0;i<N3;i++) + y[i] = (short)WORD2INT(y_tmp[i]); + + /* Update OLA outbuf */ + for (i=0;i<N3;i++) + st->outbuf[i] = st->frame[st->frame_size+i]; /* output 50% OLA */ + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes.h new file mode 100755 index 000000000..9dc748f1b --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes.h @@ -0,0 +1,19 @@ + +#ifndef NLPAES_H +#define NLPAES_H + +/* Include files */ +#include "define.h" +#include "struct.h" +#include "tmwtypes.h" + +/* Function Declarations */ +extern void NLP_AES_para(ssp_para_struct *para, float *std_thrd, float *aes_supp_coef1, float *aes_supp_coef2); +extern NonLinearEchoState *NLP_AES_init(int frame_size, float sampling_rate, float std_thrd, float aes_supp_coef1, float aes_supp_coef2); +extern void NLP_AES_free(NonLinearEchoState *st); +extern void NLP_AES(NonLinearEchoState *aes_state, short *y, float aes_frame, boolean_T speech_vad); +extern void std_residual_echo(NonLinearEchoState *aes_state, float *yout, int len, boolean_T speech_vad); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes.o new file mode 100644 index 0000000000000000000000000000000000000000..fd9e30f677daf3931fab52235a43f624e955299f GIT binary patch literal 39588 zcmch=33wD$+V@@6-RX2Xp|cPnK!6SjBp_KqmJlU`q=m301Q8=MO~@WX5|a)~bR+@- zqNAv|;SzL|LELa1)KQojMIMKlaY1Dim0?^E=r$45xbpu0r|wERJmYsg-}_$gTi12^ zci;C}>uh!EbanNbg4rHj*ERFdwG^#a)3mE@Q$8W%6;iYWZI~AI%=+v0U6(wz!yj9i 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mel_interval = max_mel / (float)(banks - 1); + + bank = (FilterBank*)mem_alloc(sizeof(FilterBank)); + bank->nb_banks = banks; + bank->len = len; + bank->bank_left = (int*)mem_alloc(len*sizeof(int)); + bank->bank_right = (int*)mem_alloc(len*sizeof(int)); + bank->filter_left = (float*)mem_alloc(len*sizeof(float)); + bank->filter_right = (float*)mem_alloc(len*sizeof(float)); + + //bank->scaling = (float*)mem_alloc(banks*sizeof(float)); + + for (i=0;i<len;i++) { + float curr_freq; + float mel; + float val; + curr_freq = (float)(i * df); + mel = (float)toBARK(curr_freq); + if (mel > max_mel) + break; + + id1 = (int)(floor(mel/mel_interval)); + if (id1>banks-2) { + id1 = banks-2; + val = FLOAT_ONE; + } else { + val = (mel - id1*mel_interval) / mel_interval; + } + id2 = id1+1; + bank->bank_left[i] = id1; + bank->filter_left[i] = FLOAT_ONE - val; + bank->bank_right[i] = id2; + bank->filter_right[i] = val; + } + + #if (0) + for (i=0;i<bank->nb_banks;i++) + bank->scaling[i] = 0; + for (i=0;i<bank->len;i++) { + int id = bank->bank_left[i]; + bank->scaling[id] += bank->filter_left[i]; + id = bank->bank_right[i]; + bank->scaling[id] += bank->filter_right[i]; + } + for (i=0;i<bank->nb_banks;i++) + bank->scaling[i] = FLOAT_ONE/(bank->scaling[i]); + #endif + + return bank; +} + +inline void filterbank_free(FilterBank *bank) +{ + mem_free(bank->bank_left); + mem_free(bank->bank_right); + mem_free(bank->filter_left); + mem_free(bank->filter_right); + //mem_free(bank->scaling); + mem_free(bank); +} + +inline void filterbank_linear2sb(FilterBank *bank, float *ps, float *mel) +{ + int i; + for (i=0;i<bank->nb_banks;i++) + mel[i] = 0; + + for (i=0;i<bank->len;i++) { + int id; + id = bank->bank_left[i]; + mel[id] += (bank->filter_left[i] * ps[i]); + id = bank->bank_right[i]; + mel[id] += (bank->filter_right[i] * ps[i]); + } + + /*for (i=0;i<bank->nb_banks;i++) + mel[i] = (bank->scaling[i]) * mel[i]; + */ + +} + +inline void filterbank_sb2linear(FilterBank *bank, float *mel, float *ps) +{ + int i; + for (i=0;i<bank->len;i++) { + float tmp; + int id1, id2; + id1 = bank->bank_left[i]; + id2 = bank->bank_right[i]; + tmp = mel[id1] * bank->filter_left[i]; + tmp += (mel[id2] * bank->filter_right[i]); + ps[i] = tmp; + } +} + +inline void aes_conj_window(float *w, int len) /* Hanning */ +{ + int i; + for (i=0;i<len;i++) { + float tmp; + float x = (float)(4.f * i) / (float)len; + int inv = 0; + if (x<1.f) { + } else if (x<2.f) { + x = 2.f-x; + inv = 1; + } else if (x<3.f) { + x = x-2.f; + inv = 1; + } else { + x = 4.f-x; + } + x = 1.271903f * x; + tmp = .5f-.5f * (float)math_cos_norm(x); /* Hanning */ + tmp = tmp * tmp; + if (inv) + tmp = FLOAT_ONE - tmp; + w[i] = (float)math_sqrt(tmp); + + } +} + +inline float aes_hypergeom_gain(float vk) +{ + int ind; + float integer, frac; + float x; + static const float table[21] = { + 0.82157f, 1.02017f, 1.20461f, 1.37534f, 1.53363f, 1.68092f, 1.81865f, + 1.94811f, 2.07038f, 2.18638f, 2.29688f, 2.40255f, 2.50391f, 2.60144f, + 2.69551f, 2.78647f, 2.87458f, 2.96015f, 3.04333f, 3.12431f, 3.20326f}; + + x = AES_EXPIN_SCALING*vk; + integer = (float)floor(2*x); + ind = (int)integer; + if (ind<0) + return AES_FRAC_SCALING; + if (ind>19) + return (float)(AES_FRAC_SCALING*(1.f+.1296/x)); + frac = 2*x-integer; + return (float)(AES_FRAC_SCALING*((1.f-frac)*table[ind] + frac*table[ind+1])/sqrt(x+.0001f)); + +} + +inline float aes_qcurve(float x) +{ + return 1.f/(1.f+.15f/(AES_SNR_SCALING*x)); +} + +inline void aes_gain_floor(float effective_echo_suppress, float *echo, float *gain_floor, int len) +{ + int i; + float echo_floor; + + echo_floor = (float)exp(.2302585f * effective_echo_suppress); + + /* Compute the gain floor for the residual echo */ + for (i=0;i<len;i++) + gain_floor[i] = AES_FRAC_SCALING * (float)sqrt(echo_floor * echo[i]) / (float)sqrt(1.f + echo[i]); +} + +inline void aes_analysis(NonLinearEchoState *st, short *x) +{ + int i; + int N = st->ps_size; + int N3 = 2*N - st->frame_size; + float *ps = st->ps; + + /* Build input buffer for windowing */ + for (i=0;i<st->frame_size;i++) { + st->frame[i] = st->inbuf[i]; /* take data in previous frame */ + st->frame[N3+i] = x[i]; /* take data in current frame */ + st->inbuf[i] = x[i]; /* update data in previous frame */ + } + + /* Windowing */ + for (i=0;i<2*N;i++) + st->frame[i] = st->frame[i] * st->window[i]; + + /* Perform FFT */ + speech_fft(st->fft_lookup, st->frame, st->ft); + + /* Power spectrum */ + ps[0] = st->ft[0] * st->ft[0]; /* re^2 */ + for (i=1;i<N;i++) /* 0 to N-1 is enough for filterbank computation */ + ps[i] = st->ft[2*i-1] * st->ft[2*i-1] + st->ft[2*i] * st->ft[2*i]; /* re^2 + im^2 */ + + filterbank_linear2sb(st->bank, ps, ps+N); + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes_subfun.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes_subfun.h new file mode 100755 index 000000000..791d9abba --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes_subfun.h @@ -0,0 +1,33 @@ + +#ifndef NLPAES_SUBFUN_H +#define NLPAES_SUBFUN_H + + /* Include files */ +#include "define.h" +#include "struct.h" + +/* Function Declarations */ +#ifndef PLATFORM_RTOS +extern FilterBank *filterbank_create(int banks, float sampling, int len, int type); +extern inline void filterbank_free(FilterBank *bank); +extern inline void filterbank_linear2sb(FilterBank *bank, float *ps, float *mel); +extern inline void filterbank_sb2linear(FilterBank *bank, float *mel, float *psd); +extern inline void aes_conj_window(float *w, int len); +extern inline float aes_hypergeom_gain(float vk); +extern inline float aes_qcurve(float x); +extern inline void aes_gain_floor(float effective_echo_suppress, float *echo, float *gain_floor, int len); +extern inline void aes_analysis(NonLinearEchoState *st, short *x); +#else +FilterBank *filterbank_create(int banks, float sampling, int len, int type); +void filterbank_free(FilterBank *bank); +void filterbank_linear2sb(FilterBank *bank, float *ps, float *mel); +void filterbank_sb2linear(FilterBank *bank, float *mel, float *psd); +void aes_conj_window(float *w, int len); +float aes_hypergeom_gain(float vk); +float aes_qcurve(float x); +void aes_gain_floor(float effective_echo_suppress, float *echo, float *gain_floor, int len); +void aes_analysis(NonLinearEchoState *st, short *x); +#endif +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes_subfun.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/nlpaes_subfun.o new file mode 100644 index 0000000000000000000000000000000000000000..39f011282dad3c99d75674bd3ef40fd491eaf796 GIT binary patch literal 26440 zcmchf3wTu3x%bzeTZT#42?=UIgb5@NA$I~q1POseKrSH!<fh{!ncT?DWWpuV5=0Tf zDpqP$&?xnIMa3R3)JjFG)v9f^#nw}`rP`tuGbL3tv|7Laf9-cJiS+r-^L*bq8`l24 z?^^GA*M051XJ%(h>B2I@FjV+3RHlk*N*%jGr#K5WGS&HNyq2>6dUDAnD!Vsn*S3S- zQP-C}6;eALWq<6gc}DepJ>45}?~DuWp5D{zf2Ke5VOM5oQddv!s=YnEs~_$TO?dU` z(952$zxdbJ2Sdg0WQN?Hp5B!odqeS_%#gYB>Ch3K<_!&rH`3tcp;Rw?G(H`ArE6%& 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b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/notch.c new file mode 100755 index 000000000..009666ce1 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/notch.c @@ -0,0 +1,135 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% + *% + *% notch.c + *% Author: Sharon Lee + *% History: + *% Created by Sharon Lee in April, 2021 + *% + *%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + + /* Include files */ +#include <stdio.h> +#include <stdlib.h> +#include "struct.h" +#include "define.h" +#include "notch.h" + +/* Function Definitions */ +void notch_para(qfilter_struct *notch_obj, ssp_para_struct *para, float Fs) +{ + ssp_para_struct *para_obj; + unsigned short tmp; + + /* The last coef is scale value of Hd */ + static short nb_notch_coef[2][6] = { + {7415,-10487,7415,23068,-16239, 18020}, + {5441,10882,5441,-32196,-15812,24237} + }; + static short wb_notch_coef[2][6] = { + {7255,-13406,7255,30207,-16311,18459}, + {8192,0,8192,0,-16096, 16240} + }; + + /* Notch Filter Parameter */ + para_obj = para; + tmp = MIN(MAX(para_obj->para_notch_freq, 0), 1); /* the notch freq, 0 for 1kHz and 1 for 4kHz */ + if (Fs == 8000.0F) + notch_obj->qcoef = &nb_notch_coef[tmp][0]; + else + notch_obj->qcoef = &wb_notch_coef[tmp][0]; + +} + +void notch_init(qfilter_struct *notch_obj, int *notch_state) +{ + unsigned short i; + + for(i=0; i<4;i++) { + notch_state[i] = 0; + } + + notch_obj->nq = 1; + notch_obj->pstate = notch_state; + +} + +void notch_filter(short *pin, short *pout, qfilter_struct *filter, int frame_size) +{ + long long acc0; + int i, j, *pst, xn, xn1, xn2, yn1, yn2; + short *pcoef, *ptr1, *ptr2; + short coef_tmp1, coef_tmp2, coef_tmp3, coef_tmp4, coef_tmp5; + short state_tmp1, state_tmp2, state_tmp3, state_tmp4, state_tmp5; + + //initialize + acc0 =0; + + ptr1 = pin; + ptr2 = pout; + + for(i = frame_size; i > 0; i--) { + pcoef = filter->qcoef; + pst = filter->pstate; + xn = (((int) (*ptr1++))<<16); + + for(j = filter->nq; j > 0; j--) { + coef_tmp1 = *pcoef; /* for high part */ + state_tmp1 = ((short)(xn>>0x10)); /* for high part */ + acc0 = ((unsigned short)(xn))*(*pcoef++); /* low part */ + + xn1 = *pst; /* take x(n-1) */ + *pst++ = xn; /* update x(n-1)*/ + + coef_tmp2 = *pcoef; /* for high part */ + state_tmp2 = ((short)(xn1>>0x10)); /* for high part */ + acc0 += ((unsigned short)(xn1))*(*pcoef++); /* low part */ + + xn2 = *pst; /* take x(n-2) */ + *pst++ = xn1; /* update x(n-2) */ + + coef_tmp3 = *pcoef; /* for high part */ + state_tmp3 = ((short)(xn2>>0x10)); /* for high part */ + acc0 += ((unsigned short)(xn2))*(*pcoef++); /* low part */ + + yn1 = *pst++; /* take y(n-1) */ + + coef_tmp4 = *pcoef; /* for high part */ + state_tmp4 = ((short)(yn1>>0x10)); /* for high part */ + acc0 += ((unsigned short)(yn1))*(*pcoef++); /* low part */ + + yn2 = *pst; /* take y(n-2) */ + + coef_tmp5 = *pcoef; /* for high part */ + state_tmp5 = ((short)(yn2>>0x10)); /* for high part */ + acc0 += ((unsigned short)(yn2))*(*pcoef++); /* low part */ + + *pst++ = yn1; /* update y(n-2) */ + + acc0 >>= 0x10; /* be low part */ + acc0 += ((short)(state_tmp1))*coef_tmp1; /* high part */ + acc0 += ((short)(state_tmp2))*coef_tmp2; /* high part */ + acc0 += ((short)(state_tmp3))*coef_tmp3; /* high part */ + acc0 += ((short)(state_tmp4))*coef_tmp4; /* high part */ + acc0 += ((short)(state_tmp5))*coef_tmp5; /* high part */ + + acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, (((int)acc0)<<2)))); /* Q2.14 */ + + pst[-2] = (int)acc0 ; /* update y(n-1) */ + xn = (int)acc0; /* update x(n) for next IIR filter */ + + } + + if(acc0>=0) + acc0 = (((int)((int)acc0>>16)) * (*pcoef)); + else + acc0 = -(((int)(-(int)acc0>>16)) * (*pcoef)); /* remove zero-inputs-limit-cycle osicillation */ + + //acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, (((int)acc0)<<3)))); + acc0 = MAX(((int)0x80000000), (MIN(0x7fffffff, ((acc0)<<3)))); /* Q3.13 */ + *ptr2++ = (short)(acc0>>16); + + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/notch.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/notch.h new file mode 100755 index 000000000..7a2461066 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/notch.h @@ -0,0 +1,20 @@ + +#ifndef NOTCH_H +#define NOTCH_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "struct.h" +#include "tmwtypes.h" + +/* Function Declarations */ +extern void notch_para(qfilter_struct *notch_obj, ssp_para_struct *para, float Fs); +extern void notch_init(qfilter_struct *notch_obj, int *notch_state); +extern void notch_filter(short *pin, short *pout, qfilter_struct *filter, int frame_size); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/notch.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/notch.o new file mode 100644 index 0000000000000000000000000000000000000000..aec9a4797dc2de7d7453a09b8f995d90a8f674fd GIT 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+ + /* Include files */ + #include <math.h> +#include "define.h" +#include "memalloc.h" +#include "fftcore.h" +#include "packfft.h" + +/* Function Definitions */ +void *speech_fft_init(int size) +{ + struct drft_lookup *table; + table = mem_alloc(sizeof(struct drft_lookup)); + core_drft_init((struct drft_lookup *)table, size); + return (void*)table; +} + +void speech_fft_free(void *table) +{ + core_drft_clear(table); + mem_free(table); +} + +void speech_fft(void *table, float *in, float *out) +{ + if (in==out) { + int i; + float scale = (float)(1./((struct drft_lookup *)table)->n); + //speech_warning("FFT should not be done in-place"); + for (i=0;i<((struct drft_lookup *)table)->n;i++) + out[i] = scale*in[i]; + } else { + int i; + float scale = (float)(1./((struct drft_lookup *)table)->n); + for (i=0;i<((struct drft_lookup *)table)->n;i++) + out[i] = scale*in[i]; + } + core_drft_forward((struct drft_lookup *)table, out); +} + +void speech_ifft(void *table, float *in, float *out) +{ + if (in==out) { + //speech_warning("FFT should not be done in-place"); + } else { + int i; + for (i=0;i<((struct drft_lookup *)table)->n;i++) + out[i] = in[i]; + } + core_drft_backward((struct drft_lookup *)table, out); +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/packfft.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/packfft.h new file mode 100755 index 000000000..298d19a49 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/packfft.h @@ -0,0 +1,16 @@ + +#ifndef PACKFFT_H +#define PACKFFT_H + + /* Include files */ +#include "define.h" + +/* Function Declarations */ +extern void *speech_fft_init(int size); +extern void speech_fft_free(void *table); +extern void speech_fft(void *table, float *in, float *out); +extern void speech_ifft(void *table, float *in, float *out); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/packfft.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/packfft.o 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file mode 100755 index 000000000..e941ba506 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/power.c @@ -0,0 +1,25 @@ + +/* Include files */ +#include <math.h> +#include "mmse.h" +#include "power.h" +#include "mmse_rtwutil.h" + +/* Function Definitions */ +void c_power(const float a[], float y[], int N) +{ + int k; + for (k = 0; k < N; k++) { + y[k] = a[k] * a[k]; + } +} + +void d_power(const float a[321], float y[321]) +{ + int k; + for (k = 0; k < 321; k++) { + y[k] = (float)sqrt(a[k]); + } +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/power.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/power.h new file mode 100755 index 000000000..aa3935f5b --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/power.h @@ -0,0 +1,18 @@ + +#ifndef POWER_H +#define POWER_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "tmwtypes.h" + +/* Function Declarations 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"slope_detection.h" + +/* Function Definitions */ +void slope_detection(NRState *st) +{ + int instant_slope; + int k; + float temp; + + /* signal power change based VAD */ + /* consider small speech at the biginning, ensure it is not suppressed */ + instant_slope = 0; + for (k = 0; k < 5; k++) { /* subband based */ + temp = st->amp_inst_band[k] / 4.0F; + if ((temp - st->amp_inst_band[5 + k] > 0.0F) || (temp - st->amp_inst_band[10 + k] > 0.0F)) { + instant_slope = 1; + } + } + + if (instant_slope == 0) { + temp = st->vad_slope_cnt - 1.0F; + if (0.0F > temp) { + temp = 0.0F; + } + + st->vad_slope_cnt = temp; + if (temp == 0.0F) { + st->vad_slope = 0.0F; + } + } else { + st->vad_slope = 1.0F; + if (st->Fs == 16000.0F) { + st->vad_slope_cnt = 8.0F; + } else { + if (st->Fs == 8000.0F) { + st->vad_slope_cnt = 4.0F; + } + } + } + +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/slope_detection.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/slope_detection.h new file mode 100755 index 000000000..7e0aa9871 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/slope_detection.h @@ -0,0 +1,18 @@ + +#ifndef SLOPE_DETECTION_H +#define SLOPE_DETECTION_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "tmwtypes.h" +#include "struct.h" + +/* Function Declarations */ +extern void slope_detection(NRState *st); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/slope_detection.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/slope_detection.o new file mode 100644 index 0000000000000000000000000000000000000000..6abd026612e9f6f9bf04b648403d76b2168a730f GIT binary patch literal 6280 zcmbuDdvIJ;9mmhzyLo3ro0PVxwQL_k!R~I7hPG5HP17_)N|R{{RH)qE>~6B#?j!EK zo3<;qJQPu@W~Msj4<ycjj-$*70v34)2ts+NW$HL16qJ#f4r(%Gus8z_`2C*yyW34# zbsSIT-p}uG&hNZ_d+)h9(6f1yVHnCUhFY%9Xi9x=j`mb_YAjc+YOXSOot{#=j!&x6 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b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/ssp_main.c_org @@ -0,0 +1,765 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% + *% + *% ssp_main.c + *% Author: Sharon Lee + *% History: + *% Created by Sharon Lee for NR in August, 2019 + *% Add AGC by Sharon Lee in December, 2019 + *% Add Linear Processing AEC by Sharon Lee in April, 2020 + *% Add Nonlinear Processing AES by Sharon Lee in August, 2020 + *% Add Notch Filter and DC Filter by Sharon Lee in April, 2021 + *% Add SPK-path AGC by Sharon Lee in July, 2021 + *% Add DG and Delay by Sharon Lee in November, 2021 + *% Add SPK-path Equalizer by Sharon Lee in January, 2022 + *%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + +/*************************************************************************************/ +/* This example C main file shows how to call entry-point functions and read input signals. */ +/* You must customize this file for your development environment/platform. */ +/* Modify it and integrate it into your own development environment/platform. */ +/* */ +/*************************************************************************************/ + +/* Include files */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "tmwtypes.h" +#include "mmse_init.h" +#include "mmse.h" +#include "define.h" +#include "struct.h" +#include "agc_init.h" +#include "agc.h" +#include "lpaec.h" +#include "packfft.h" +#include "nlpaes.h" +#include "notch.h" +#include "dc.h" +#include "dg.h" +#include "delay.h" +#include "eq.h" +#include "functrl.h" + +#define INPUT_FILE_AS_ARG 1 +FILE *fp_test_ne_mic_in; +FILE *fp_test_fe_ref_in; +FILE *fp_test_ne_out; +FILE *fp_test_fe_in; +FILE *fp_test_fe_out; + +#if INPUT_FILE_AS_ARG +char *mic_ne_filename; +char *mic_fe_filename; +char *spk_in_filename; +int customer_option; +#endif +//#define SHARON_DEBUG +#ifdef SHARON_DEBUG +FILE *fp_test; +long long frame_cnt = 0; +long long debug_cnt = 0; +#endif + + +/* Function Declarations */ +static void SSP_Algorithm(void); +/* Function Definitions */ +static void SSP_Algorithm(void) +{ + + float fs; /* sampling rate */ + int hopsize = 160; /* input hop size */ + + /* Delay History Buffer */ + DelayState *delay_state = NULL; + + /* DG History Buffer */ + static dg_struct dg_obj; + + /* DC Filter History Buffer */ + static dcfilter_struct dc_obj; + + /* Notch Filter History Buffer */ + static qfilter_struct notch_obj; + static int notch_state[4]; + + /* LP AEC History Buffer */ + LinearEchoState *aec_state = NULL; + short filter_length, init_filter_length; + + /* NLP AES History Buffer */ + NonLinearEchoState *aes_state = NULL; + boolean_T st_vad; + float std_thrd; + float aes_supp_coef1; + float aes_supp_coef2; + + /* NR History Buffer */ + NRState *nr_state = NULL; + boolean_T speech_vad; + float aa, mu; + float frame; + float initial_noise_pow_time; + int nenr_silence_time, nenr_silence_cnt; + + /* AGC History Buffer */ + static agc_struct agc_obj; + + /* Near-end Input/Output Buffer */ + short ne_mic_fixed_in[320]; /* near-end and fixed-point mic input */ + short fe_ref_fixed_in[320]; /* far-end and fixed-point ref input */ + float ne_float_out[160]; /* near-end and floating-point output */ + short ne_fixed_out[160]; /* near-end and fixed-point output */ + float tmp; + + + /* Far-end Input/Output Buffer */ + short fe_fixed_in[160]; /* far-end and fixed-point input */ + short fe_fixed_out[160]; /* far-end and fixed-point output */ + + /* AGC History Buffer in SPK Path */ + static agc_struct spk_agc_obj; + + /* EQ History Buffer in SPK Path */ + static cascaded_iir_struct spk_eq_obj; + static float spk_eq_state[12]; + + /* For Test */ + short wav_header[44]; + short cond1, cond2, cond3, cond4, cond5, cond6; + int i; + + +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ +/*%*/ +/*% SSP Algorithm Parameter */ +/*%*/ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + + static ssp_para_struct ssp_para_obj; + /* SSP algorithm parameter need to be adjusted according to different prototype machine from client */ + /* { 0: default }, { 1: CEOP }, { 2: HT master (ref hw) }, { 3: HT slave (ref hw) }, { 4: ZT (ref sw)} */ + /* { 5: an example of slightly enhanced low frequencies in spk-path equalizer } */ + /* { 6: an example of slightly enhanced high frequencies in spk-path equalizer } */ + ssp_para_obj.para_client_config = 0; /* for choosing client's prototype machine, [0, 6] */ +#if INPUT_FILE_AS_ARG + ssp_para_obj.para_client_config = customer_option; + printf("input_file_as_arg option[%d]\n", customer_option); +#endif + + speech_vad = speech_vad; + /* Assign Parameter Value to SSP Algorithm */ + /* These values of parameters need to be adjusted according to the actual field try on prototype machine of client, these parameters can be pulled out to be API input arguments for SDK */ + if (1 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 60; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 10; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 6; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 1; + ssp_para_obj.para_spk_fun_config = 0; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (2 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 15; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 18; + ssp_para_obj.para_agc_target_low = 66; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 0; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (3 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 15; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 1; + ssp_para_obj.para_aec_filter_len = 2; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 15; + ssp_para_obj.para_agc_target_low = 15; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 0; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (4 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 207; + ssp_para_obj.para_delay_sample = 450; + ssp_para_obj.para_dg_target = 6; + ssp_para_obj.para_aec_init_filter_len = 13; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 1; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (5 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 0; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 2; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 4; + ssp_para_obj.para_spk_eq_freq[0] = 6; ssp_para_obj.para_spk_eq_gain[0] = 43; ssp_para_obj.para_spk_eq_qfactor[0] = 0; + ssp_para_obj.para_spk_eq_freq[1] = 7; ssp_para_obj.para_spk_eq_gain[1] = 38; ssp_para_obj.para_spk_eq_qfactor[1] = 11; + ssp_para_obj.para_spk_eq_freq[2] = 8; ssp_para_obj.para_spk_eq_gain[2] = 39; ssp_para_obj.para_spk_eq_qfactor[2] = 11; + ssp_para_obj.para_spk_eq_freq[3] = 9; ssp_para_obj.para_spk_eq_gain[3] = 37; ssp_para_obj.para_spk_eq_qfactor[3] = 0; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (6 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 0; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 2; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 3; + ssp_para_obj.para_spk_eq_freq[0] = 7; ssp_para_obj.para_spk_eq_gain[0] = 42; ssp_para_obj.para_spk_eq_qfactor[0] = 9; + ssp_para_obj.para_spk_eq_freq[1] = 8; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 9; + ssp_para_obj.para_spk_eq_freq[2] = 9; ssp_para_obj.para_spk_eq_gain[2] = 43; ssp_para_obj.para_spk_eq_qfactor[2] = 0; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else { + ssp_para_obj.para_fun_config = 15; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 1; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } + + +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ +/*% */ +/*% SSP Algorithm Applied to MIC Path */ +/*% */ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ +#if !(INPUT_FILE_AS_ARG) + if ((fp_test_ne_mic_in = fopen("./pattern/mic/ht/slave/NE_ht_s_ref_hw_8k_1.wav", "rb")) == NULL) { + printf("Cannot open input file \n"); + exit(2); + } + if ((fp_test_fe_ref_in = fopen("./pattern/mic/ht/slave/FE_ht_s_ref_hw_8k_1.wav", "rb")) == NULL) { + printf("Cannot open input file \n"); + exit(2); + } + if ((fp_test_ne_out = fopen("./pattern/mic/ht/slave/mic_ssp_ht_s_ref_hw_8k_1.pcm", "wb")) == NULL) { + printf("Cannot open output file \n"); + exit(2); + } +#endif + #ifdef SHARON_DEBUG + fp_test = fopen("./pattern/test.txt", "wb"); + #endif + + + /* Get the sampling rate from CODEC configuration if run with system codes */ + fread(&wav_header[0], 1, 44, fp_test_fe_ref_in); /* wav header */ + fread(&wav_header[0], 1, 44, fp_test_ne_mic_in); /* wav header */ + fs = (float)(wav_header[12]); /* sampling rate recorded in 24th byte with 4-byte length, little endian */ + printf("parsing sample rate from wav[%f]\n", fs); + #ifdef SHARON_DEBUG + if ((fs != 8000.0F) && (fs != 16000.0F)) + printf("Input is not wave format \n"); + #endif + + + cond1 = ssp_para_obj.para_fun_config & DELAY_ENABLE; + if (cond1) { + delay_para(&ssp_para_obj); + delay_state = delay_init(&ssp_para_obj); + } + + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + DG_para(&dg_obj, &ssp_para_obj); + } + + cond1 = ssp_para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + DC_remover_init(&dc_obj, fs); + } + + cond1 = ssp_para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + notch_para(¬ch_obj, &ssp_para_obj, fs); + notch_init(¬ch_obj, notch_state); + } + + cond1 = ssp_para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = ssp_para_obj.para_fun_config & NLP_AES_ENABLE; + if (cond1 | cond2) { + LP_AEC_para(&ssp_para_obj, &filter_length, &init_filter_length); + aec_state = LP_AEC_init(hopsize, filter_length, init_filter_length, fs); + } + if (cond2) { + NLP_AES_para(&ssp_para_obj, &std_thrd, &aes_supp_coef1, &aes_supp_coef2); + aes_state = NLP_AES_init(hopsize, fs, std_thrd, aes_supp_coef1, aes_supp_coef2); + aes_state->echo_state = aec_state; + } + + if (!(ssp_para_obj.para_fun_config & AGC_ENABLE)) { /* add fool-proof design for parameter configuration */ + ssp_para_obj.para_agc_vad_ena = 0; + } + cond1 = ssp_para_obj.para_fun_config & NR_ENABLE; + cond2 = ssp_para_obj.para_fun_config & AGC_ENABLE; + if (cond1 | (cond2 && ssp_para_obj.para_agc_vad_ena)) { + NR_para(&ssp_para_obj, &aa, &mu); + nr_state = NR_init(hopsize, fs, aa, mu); + } + if (cond2) { + AGC_para(&agc_obj, &ssp_para_obj, 1); + AGC_init(&agc_obj, &ssp_para_obj, fs, hopsize, 1); + } + + speech_vad = true; /* default */ + st_vad = false; /* default */ + frame = 1.0F; /* set initial value here in case of NR off */ + nenr_silence_cnt = 0; + ssp_para_obj.para_nr_init_sile_time = MIN(MAX(ssp_para_obj.para_nr_init_sile_time, 0), 250); + if (fs == 16000.0F) { + initial_noise_pow_time = 14; + nenr_silence_time = ssp_para_obj.para_nr_init_sile_time*2; + } else { + initial_noise_pow_time = 7; + nenr_silence_time = ssp_para_obj.para_nr_init_sile_time; + } + + + for (;;) /* Main Frame Loop in MIC Path */ + { + /* This section of codes have to be replaced by reading the bitstream from system layer in real platform */ + cond1 = fread(&ne_mic_fixed_in[0], sizeof(short), hopsize, fp_test_ne_mic_in); /* get current near-end frame data */ + cond2 = fread(&fe_ref_fixed_in[0], sizeof(short), hopsize, fp_test_fe_ref_in); /* get current far-end frame data */ + if ((cond1 != hopsize) | (cond2 != hopsize)) { + cond1 = ssp_para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = ssp_para_obj.para_fun_config & NLP_AES_ENABLE; + cond3 = ssp_para_obj.para_fun_config & NR_ENABLE; + cond4 = ssp_para_obj.para_fun_config & AGC_ENABLE; + cond6 = ssp_para_obj.para_fun_config & DELAY_ENABLE; + if (cond1 | cond2) { + LP_AEC_free(aec_state); + } + if (cond2) { + if (aec_state != NULL) + NLP_AES_free(aes_state); + } + if (cond3 | (cond4 && ssp_para_obj.para_agc_vad_ena)) { + if (nr_state != NULL) + NR_free(nr_state); + } + if (cond6) { + delay_free(delay_state); + } + fclose(fp_test_ne_mic_in); + fclose(fp_test_fe_ref_in); + fclose(fp_test_ne_out); + #ifdef SHARON_DEBUG + fclose(fp_test); + #endif + goto Pattern_EOF; + } + + if (2 == ssp_para_obj.para_client_config) { + for (i = 0; i < hopsize; i++) { + tmp = (float)(fe_ref_fixed_in[i])/(float)(32768.0F) * 15.84F; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + fe_ref_fixed_in[i] = ROUND_POS(tmp*(short)(32767)); + ne_mic_fixed_in[i] = ROUND_POS(((float)(ne_mic_fixed_in[i])/(float)(32768.0F) * 0.5F)*(short)(32767)); + } + } + + if (!(ssp_para_obj.para_fun_config)) { + for (i = 0; i < hopsize; i++) + ne_fixed_out[i] = ne_mic_fixed_in[i]; /* save MCPS if all off */ + } else { + + /* Delay ref signal, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DELAY_ENABLE; + if (cond1) { + delay_ref(fe_ref_fixed_in, delay_state, hopsize); + } + + /* Apply DG, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + apply_DG(ne_mic_fixed_in, ne_mic_fixed_in, &dg_obj, hopsize); + } + + /* DC filter, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + DC_remover(ne_mic_fixed_in, ne_mic_fixed_in, &dc_obj, hopsize); + } + + /* Notch filter, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + notch_filter(ne_mic_fixed_in, ne_mic_fixed_in, ¬ch_obj, hopsize); + } + + /* Linear AEC, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = ssp_para_obj.para_fun_config & NLP_AES_ENABLE; + if (cond1 | cond2) { + LP_AEC(aec_state, ne_mic_fixed_in, fe_ref_fixed_in, ne_fixed_out); + if (cond2) { + for (i = 0; i < hopsize; i++) + aes_state->aes_std_in[i] = ne_mic_fixed_in[i]; + } + for (i = 0; i < hopsize; i++) + ne_mic_fixed_in[i] = ne_fixed_out[i]; + } + + cond3 = ssp_para_obj.para_fun_config & NR_ENABLE; + cond4 = ssp_para_obj.para_fun_config & AGC_ENABLE; + if (!(cond2 | cond3 | cond4)) { + /* Compensate DG, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + compen_DG(ne_mic_fixed_in, ne_mic_fixed_in, &dg_obj, hopsize); + } + for (i = 0; i < hopsize; i++) + ne_fixed_out[i] = ne_mic_fixed_in[i]; /* save MCPS if NR+AES+AGC off */ + } else { + if (cond3 | ssp_para_obj.para_agc_vad_ena) { + /* Stationary NR, frame-by-frame processing */ + if (nenr_silence_cnt >= nenr_silence_time) { + NR(ne_mic_fixed_in, initial_noise_pow_time, &frame, nr_state, &speech_vad, ne_float_out); + } else { + for (i = 0; i < hopsize; i++) { + ne_float_out[i] = 0.0F; + nr_state->x_old[i] = ne_mic_fixed_in[i]; /* update input overlap data */ + } + } + } +//TODO: + if (cond3) { + /* Transform to fixed-point with 16-bit length for output */ + for (i = 0; i < hopsize; i++) { + ne_float_out[i] = MIN(MAX(ne_float_out[i], -1.0F), 1.0F); /* saturation protection to avoid overflow */ + if (ne_float_out[i] < 0.0F) + ne_fixed_out[i] = ROUND_NEG(ne_float_out[i]*(int)(32768)); + else + ne_fixed_out[i] = ROUND_POS(ne_float_out[i]*(short)(32767)); + } + } else { + for (i = 0; i < hopsize; i++) + ne_fixed_out[i] = ne_mic_fixed_in[i]; + } + + /* Nonlinear AES, frame-by-frame processing */ + if (cond2) { + NLP_AES(aes_state, ne_fixed_out, frame, speech_vad); + st_vad = (boolean_T)aes_state->st_vad; + } + + if (2 == ssp_para_obj.para_client_config) { + for (i = 0; i < hopsize; i++) { + tmp = (float)(ne_fixed_out[i])/(float)(32768.0F) * 1.9952F; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + ne_fixed_out[i] = ROUND_POS(tmp*(short)(32767)); + } + } + + /* Compensate DG, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + compen_DG(ne_fixed_out, ne_fixed_out, &dg_obj, hopsize); + } + + /* AGC, frame-by-frame processing */ + if (cond4) { + AGC(ne_fixed_out, ne_fixed_out, &agc_obj, &ssp_para_obj, speech_vad, st_vad, nenr_silence_time, nenr_silence_cnt, 1); + } + + } + } + + if (nenr_silence_cnt < nenr_silence_time) + nenr_silence_cnt += 1; + else + nenr_silence_cnt = nenr_silence_time + 1; /* avoid overflow */ + + if (nenr_silence_cnt > nenr_silence_time) { + if (frame < initial_noise_pow_time) + frame += 1; + else + frame = initial_noise_pow_time + 1; + } + + fwrite(&ne_fixed_out[0], sizeof(short), hopsize, fp_test_ne_out); + + #ifdef SHARON_DEBUG + frame_cnt++; + if (frame_cnt == 500) { + printf(" "); + //fclose(fp_test_ne_out); + } + #endif + + } + + Pattern_EOF: + printf("Test Pattern EOF in MIC Path!\n"); /* EOF, set breakpoint here for VC++ version */ + + +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ +/*% */ +/*% SSP Algorithm Applied to SPK Path */ +/*% */ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ +#if !(INPUT_FILE_AS_ARG) + if ((fp_test_fe_in = fopen("./pattern/spk/agc/FE_8k_1.wav", "rb")) == NULL) { + printf("Cannot open input file \n"); + exit(2); + } + if ((fp_test_fe_out = fopen("./pattern/spk/agc/spk_ssp_8k_1.pcm", "wb")) == NULL) { + printf("Cannot open output file \n"); + exit(2); + } +#endif + + /* Get the sampling rate from CODEC configuration if run with system codes */ + fread(&wav_header[0], 1, 44, fp_test_fe_in); /* wav header */ + fs = (float)(wav_header[12]); /* sampling rate recorded in 24th byte with 4-byte length, little endian */ + #ifdef SHARON_DEBUG + if ((fs != 8000.0F) && (fs != 16000.0F)) + printf("Input is not wave format \n"); + #endif + + cond5 = ssp_para_obj.para_spk_fun_config & SPK_AGC_ENABLE; + if (cond5) { + AGC_para(&spk_agc_obj, &ssp_para_obj, 2); + AGC_init(&spk_agc_obj, &ssp_para_obj, fs, hopsize, 2); + } + + cond5 = ssp_para_obj.para_spk_fun_config & SPK_EQ_ENABLE; + if (cond5) { + equalizer_para(&spk_eq_obj, &ssp_para_obj, fs); + equalizer_init(&spk_eq_obj, spk_eq_state); + } + + + for (;;) /* Main Frame Loop in SPK Path */ + { + /* This section of codes have to be replaced by reading the bitstream from system layer in real platform */ + cond5 = fread(&fe_fixed_in[0], sizeof(short), hopsize, fp_test_fe_in); /* get current far-end frame data */ + if ((cond5 != hopsize)) { + fclose(fp_test_fe_in); + fclose(fp_test_fe_out); + goto FE_Pattern_EOF; + } + + /* AGC, frame-by-frame processing in spk path */ + cond5 = ssp_para_obj.para_spk_fun_config & SPK_AGC_ENABLE; + if (cond5) { + AGC(fe_fixed_in, fe_fixed_in, &spk_agc_obj, &ssp_para_obj, true, false, 0, 0, 2); + } + + /* Equalizer, frame-by-frame processing in spk path */ + cond5 = ssp_para_obj.para_spk_fun_config & SPK_EQ_ENABLE; + if (cond5) { + equalizer(fe_fixed_in, fe_fixed_in, &spk_eq_obj, hopsize); + } + + for (i = 0; i < hopsize; i++) { + fe_fixed_out[i] = fe_fixed_in[i]; + } + fwrite(&fe_fixed_out[0], sizeof(short), hopsize, fp_test_fe_out); + + } + + FE_Pattern_EOF: + printf("Test Pattern EOF in SPK Path!\n"); /* EOF, set breakpoint here for VC++ version */ + +} +#if INPUT_FILE_AS_ARG +static void _ssp_main_usage(void) +{ + printf("-----------------ssp main 20211202 usage -----------------\n"); + printf("=============================================================\n"); + printf("input arg 1: NE file\n"); + printf("input arg 2: FE file\n"); + printf("input arg 3: SPK input test file\n"); + printf("ssp main will produce , near end result and spk result\n"); + printf("=============================================================\n"); +} +#endif + +int main(int argc, char * const argv[]) +{ +#ifndef INPUT_FILE_AS_ARG + (void)argc; + (void)argv; +#else + if (argc < 4) { + printf("Need more input arguements ssp algo 20211202!!!\n"); + _ssp_main_usage(); + return -1; + } +#if 0 +FILE *fp_test_ne_mic_in; +FILE *fp_test_fe_ref_in; +FILE *fp_test_ne_out; +FILE *fp_test_fe_in; +FILE *fp_test_fe_out; + +char *mic_ne_filename; +char *mic_fe_filename; +char *spk_in_filename; +#endif + mic_ne_filename = argv[1]; + if (access(mic_ne_filename, 0) < 0) { + printf("[Error]file name for mic_ne not exist[%s]\n", mic_ne_filename); + return -1; + } + if ((fp_test_ne_mic_in = fopen(mic_ne_filename, "rb")) == NULL) { + printf("[Error]Cannot open input file NE\n"); + return -1; + } + + mic_fe_filename = argv[2]; + if (access(mic_fe_filename, 0) < 0) { + printf("[Error]file name for mic_fe not exist[%s]\n", mic_fe_filename); + return -1; + } + if ((fp_test_fe_ref_in = fopen(mic_fe_filename, "rb")) == NULL) { + printf("[Error]Cannot open input file FE\n"); + return -1; + } + + spk_in_filename = argv[3]; + if (access(spk_in_filename, 0) < 0) { + printf("[Error]file name for SPK IN not exist[%s]\n", spk_in_filename); + return -1; + } + if ((fp_test_fe_in = fopen(spk_in_filename, "rb")) == NULL) { + printf("[Error]Cannot open input file FE for spk\n"); + return -1; + } + //setup the output filename + if ((fp_test_ne_out = fopen("mic_output.pcm", "wb")) == NULL) { + printf("Cannot open output file \n"); + exit(2); + } + + if ((fp_test_fe_out = fopen("spk_output.pcm", "wb")) == NULL) { + printf("Cannot open output file \n"); + exit(2); + } + /* {0: default}, {1: CEOP}, {2: HT master (ref hw)}, {3: HT slave (ref hw)}, {4: ZT (ref sw)} */ + printf("input customer option:\n"); + printf("{0: default}, {1: CEOP}, {2: HT master (ref hw)}, {3: HT slave (ref hw)}, {4: ZT (ref sw)} :\n\t"); + scanf("%d", &customer_option); + printf("Your option is[%d]\n", customer_option); +#endif + + SSP_Algorithm(); + + return 0; +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/ssp_main.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/ssp_main.o new file mode 100644 index 0000000000000000000000000000000000000000..51a2012d17fa734ad0340bc36973d5f48a3808b5 GIT binary patch literal 34936 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cascaded_iir_struct; + +/* Delay */ +typedef struct { + short *addr; /* start address of circular buffer */ + short *rdptr; /* current read address of CB */ + short *wrptr; /* current write address of CB */ + unsigned short size; /* size of CB */ + short *dly_ref_buf; +} DelayState; + +/* DG */ +typedef struct { + float cut_gain; + float boost_gain; +} dg_struct; + +/* DC Filter */ +typedef struct { + float dcfilter_radius; + float dcfilter_mem[2]; /* assign two elements per channel */ +} dcfilter_struct; + +/* Quadratic Filter */ +typedef struct { + short *qcoef; + int *pstate; /*point to state of the quad-filtering */ + unsigned short nq; /* number of quad filter */ +} qfilter_struct; + +/* If TWO_FILTER enabled, AEC would adopt a foreground filter and a background filter to enhance the robustness for double-talk and difficult signals, the cost is extra FFT and matrix-vector multiplication */ +#define TWO_FILTER + +/* LP AEC */ +typedef struct { + int frame_size; /* Number of samples processed each time */ + int window_size; + int M; + int cancel_count; + int adapted; + int saturated; + int screwed_up; + int sampling_rate; + float spec_average; + float beta0; + float beta_max; + float sum_adapt; + float leak_estimate; + + float *e; + float *x; /* Far-end input buffer (2N) */ + float *X; /* Far-end buffer (M+1 frames) in frequency domain */ + float *input; + float *y; + float *last_y; + float *Y; + float *E; + float *PHI; + float *W; /* (Background) filter weights */ +#ifdef TWO_FILTER + float *foreground; /* Foreground filter weights */ + float Davg1; /* 1st recursive average of the residual power difference */ + float Davg2; /* 2nd recurstve average of the residual power dtfference */ + float Dvar1; /* Estimated variance of 1st estimator */ + float Dvar2; /* Estimated variance of 2nd estimator */ +#endif + float *power; /* Power of the far-end signal */ + float *power_1; /* Inverse power of far-end */ + float *wtmp; + + float *Rf; + float *Yf; + float *Xf; + float *Eh; + float *Yh; + float Pey; + float Pyy; + float *window; + float *prop; + void *fft_table; + float *memX, *memD, *memE; + float preemph; + float notch_radius; + float *notch_mem; + + float aec_min_leak; + float aec_var1_smooth; + float aec_var2_smooth; + float aec_var1_update; + float aec_var2_update; + float aec_var_backtrack; + + float ss; /* far-end smooth coefficient */ + float RER; + long echo_cnt; + short initial_filter_len; +} LinearEchoState; + +/* Filter Bank */ +typedef struct { + int *bank_left; + int *bank_right; + float *filter_left; + float *filter_right; + //float *scaling; + int nb_banks; + int len; +} FilterBank; + +/* NLP AES */ +typedef struct { + int frame_size; /* Number of samples processed in each frame */ + int ps_size; /* Number of points in the power spectrum */ + int sampling_rate; /* Sampling rate of the input/output */ + FilterBank *bank; + + LinearEchoState *echo_state; + + float *frame; /* Processing frame (2*ps_size) */ + float *ft; /* Processing frame in freq domain (2*ps_size) */ + float *ps; /* Current power spectrum */ + float *gain2; /* Adjusted gains */ + float *gain_floor; /* Minimum gain allowed */ + float *window; /* Analysis/Synthesis window */ + float *old_ps; /* Power spectrum for last frame */ + float *gain; + float *prior; /* Priori SNR */ + float *post; /* Posteriori SNR */ + float *zeta; /* Smoothed priori SNR */ + float *echo_noise; + float *residual_echo; + int echo_sup; + int echo_sup_active; + + float *inbuf; /* Input OLA buffer (overlapped analysis) */ + float *outbuf; /* Output OLA buffer (for overlap and add) */ + + int nb_adapt; /* Number of frames used for adaptation so far */ + int min_count; /* Number of frames processed so far */ + void *fft_lookup; /* Lookup table for the FFT */ + int nbands; + + float RER_smooth; + int RER_vad; + int st_vad; + + /* FD STD/DTD */ + short *aes_std_in; + short *mic_raw_ola; + //float *fdstd_mic_in_sm; + //float *fdstd_linear_echo_sm; + float fdstd_tau_mean; + float fdstd_thrd; + int fdstd_vad; + + float aes_supp_coef1; /* Parameters */ + float aes_supp_coef2; /* Parameters */ + float frame1_last_sample; +} NonLinearEchoState; + +/* NR */ +typedef struct { + void *nr_fft_table; + float *ana_win; /* analysis window before performing fft */ + float *syn_win; /* synthesis window after performing ifft */ + short *x_old; /* input overlap buffer */ + float *y_old; /* output OLA buffer */ + float *Xk_prev; /* estimated clean speech power */ + float *noise_mean; /* noise mean */ + float *noise_mu2; /* estimated noise power */ + float *amp_inst_band; + float *noisy_st_trough; + float *noisy_st_peak; + float *amp_inst_sum_hist; + float *float_x; /* near-end and floating-point mic input */ + float vad_slope_cnt; + float vad_slope; + float vad_dr_cnt; + float vad_dr; + float vad_mmse; + float vad_mmse_cnt; + float eta; + float ksi_min; + float aa; + float mu; + float vad_mmse_cnt_para; + float nr_frame1_last_sample; + int frame_size; + float Fs; +} NRState; + +/* AGC */ +typedef struct { + short max_gain; + short unit_gain; + int gain32; + short env; + short target_low; + short target_low_Q15; + short target_high; + short target_high_Q15; + + short fixed_step_size; + short stepsize_release; + short stepsize_attack; + + short pcb_noise_thrd; + short pcb_noise_cnt; + short pcb_noise_hold_time; + + boolean_T unit_gain_change; + boolean_T unit_gain_change_det; + short sout_hist; + short smooth_cnt; + short alpha; + short alpha2; + + boolean_T agc_vad1; + short agc_vad1_cnt; + boolean_T agc_vad2; + short agc_vad2_cnt; + boolean_T agc_vad3; /* the activated AGC, take speech, noise and echo signal into account */ + boolean_T agc_vad_hist; + short frame_size; + short Fs; +} agc_struct; + +/* SSP Algorithm Parameter */ +typedef struct { + /* SSP Parameter in MIC Path */ + unsigned short para_client_config; /* for choosing client's prototype machine, [0, 6] */ + unsigned short para_fun_config; /* functionality on/off configuration in mic path, [0, 255] */ + unsigned short para_delay_sample; /* the delay sample for ref signal, [1, 3000] */ + unsigned short para_dg_target; /* the digital gain target, [1, 12] */ + unsigned short para_aec_init_filter_len; /* the initial filter length of linear AEC to support up for echo tail, [1, 13] */ + unsigned short para_aec_filter_len; /* the filter length of linear AEC to support up for echo tail, [1, 13] */ + unsigned short para_aes_std_thrd; /* the threshold level for residual echo, [0, 39] */ + unsigned short para_aes_supp_coeff; /* the suppression level for residual echo, [0, 100] */ + unsigned short para_nr_init_sile_time; /* the initial silence time supported by NR to avoid the initial bad/random signals from CODEC, [0, 250] */ + unsigned short para_nr_snr_coeff; /* the coefficient of NR priori SNR tracking, [0, 25] */ + unsigned short para_agc_max_gain; /* the max boost gain for AGC release processing, [0, 6] */ + unsigned short para_agc_target_high; /* the gain level of target high of AGC, [0, 36] */ + unsigned short para_agc_target_low; /* the gain level of target low of AGC, [0, 72] */ + boolean_T para_agc_vad_ena; /* speech-activated AGC functionality, [0, 1] */ + unsigned short para_notch_freq; /* the notch frequency, [0, 1] */ + /* Not open for tuning */ + unsigned short para_nr_noise_coeff; + unsigned short para_agc_vad_cnt; + boolean_T para_agc_cut6_ena; + + /* SSP Parameter in SPK Path */ + unsigned short para_spk_fun_config; /* functionality on/off configuration in spk path, [0, 1] */ + unsigned short para_spk_agc_max_gain; /* the max boost gain for spk-path AGC release processing, [0, 6] */ + unsigned short para_spk_agc_target_high; /* the gain level of target high of spk-path AGC, [0, 36] */ + unsigned short para_spk_agc_target_low; /* the gain level of target low of spk-path AGC, [0, 72] */ + unsigned short para_spk_eq_nband; /* the number of bands (stages) in spk-path EQ, [1, 5] */ + unsigned short para_spk_eq_freq[5]; /* the center frequency of each band in spk-path EQ, [0, 9]@8kFs, [0, 10]@16kFs */ + unsigned short para_spk_eq_gain[5]; /* the dB gain of each band in spk-path EQ, [0, 60] */ + unsigned short para_spk_eq_qfactor[5]; /* the quality factor of each band in spk-path EQ, [0, 17] */ + /* Not open for tuning */ + boolean_T para_spk_agc_vad_ena; + unsigned short para_spk_agc_vad_cnt; + boolean_T para_spk_agc_cut6_ena; +} ssp_para_struct; + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.c b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.c new file mode 100755 index 000000000..697456791 --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.c @@ -0,0 +1,37 @@ + +/* Include files */ +#include "mmse.h" +#include "sum.h" + +/* Function Definitions */ +creal32_T b_sum(const creal32_T x_data[], const int x_size[1]) +{ + creal32_T y; + int k; + if (x_size[0] == 0) { + y.re = 0.0F; + y.im = 0.0F; + } else { + y = x_data[0]; + for (k = 2; k <= x_size[0]; k++) { + y.re += x_data[k - 1].re; + y.im += x_data[k - 1].im; + } + } + + return y; +} + +float c_sum(const float x[], int N) +{ + float y; + int k; + y = x[0]; + for (k = 0; k < N-1; k++) { + y += x[k + 1]; + } + + return y; +} + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.h b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.h new file mode 100755 index 000000000..daff76fdf --- /dev/null +++ b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.h @@ -0,0 +1,18 @@ + +#ifndef SUM_H +#define SUM_H + +/* Include files */ +#include <stddef.h> +#ifndef PLATFORM_RTOS +#include <stdlib.h> +#endif +#include "tmwtypes.h" + +/* Function Declarations */ +extern creal32_T b_sum(const creal32_T x_data[], const int x_size[1]); +extern float c_sum(const float x[], int N); + +#endif + + diff --git a/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.o b/freertos/cvitek/task/audio/src/SSP_Algorithm_20220128/sum.o new file mode 100644 index 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+1,825 @@ + +#if defined(_MSC_VER) +# pragma once +#endif +#if defined(__GNUC__) && (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 3)) +# pragma once +#endif + +#ifndef TMWTYPES_H +#define TMWTYPES_H +/* + * File : tmwtypes.h + * Abstract: + * Data types definition + * + * When compiling stand-alone model code, data types can be overridden + * via compiler switches. + * + * Define NO_FLOATS to eliminate reference to real_T, etc. + */ + +#include <limits.h> + +#ifdef __APPLE_CC__ +#include <stdbool.h> +#endif + +#define LOGICAL_IS_A_TYPE +#define SPARSE_GENERALIZATION + +#ifdef NO_FLOATS +# define double double_not_allowed +# define float float_not_allowed +#endif /*NO_FLOATS*/ + +#ifndef NO_FLOATS + +#ifndef __MWERKS__ +# ifdef __STDC__ +# include <float.h> +# else +# define FLT_MANT_DIG 24 +# define DBL_MANT_DIG 53 +# endif +#endif + +#endif /*NO_FLOATS*/ + +/* + * The following data types cannot be overridden when building MEX files. + */ +#ifdef MATLAB_MEX_FILE +# undef CHARACTER_T +# undef INTEGER_T +# undef BOOLEAN_T +# undef REAL_T +# undef TIME_T +#endif + +/* + * The uchar_T, ushort_T and ulong_T types are needed for compilers which do + * not allow defines to be specified, at the command line, with spaces in them. + */ + +typedef unsigned char uchar_T; +typedef unsigned short ushort_T; +typedef unsigned long ulong_T; + +#if (defined(_MSC_VER) && _MSC_VER >= 1500) \ + || defined(__x86_64__) || defined(__LP64__) \ + || defined(__LCC64__) + +typedef unsigned long long ulonglong_T; +#endif + + + +/*=======================================================================* + * Fixed width word size data types: * + * int8_T, int16_T, int32_T - signed 8, 16, or 32 bit integers * + * uint8_T, uint16_T, uint32_T - unsigned 8, 16, or 32 bit integers * + * real32_T, real64_T - 32 and 64 bit floating point numbers * + *=======================================================================*/ + +/* When used with Real Time Workshop generated code, this + * header file can be used with a variety of compilers. + * + * The compiler could be for an 8 bit embedded processor that + * only had 8 bits per integer and 16 bits per long. + * In that example, a 32 bit integer size is not even available. + * This header file should be robust to that. + * + * For the case of an 8 bit processor, the preprocessor + * may be limited to 16 bit math like its target. That limitation + * would mean that 32 bit comparisons can't be done accurately. + * To increase robustness to this, comparisons are done against + * smaller values first. An inaccurate 32 bit comparison isn't + * attempted if the 16 bit comparison has already succeeded. + * + * Limitations on preprocessor math can also be stricter than + * for the target. There are known cases where a compiler + * targeting processors with 64 bit longs can't do accurate + * preprocessor comparisons on more than 32 bits. + */ + +/* Determine the number of bits for int, long, short, and char. + * If one fails to be determined, set the number of bits to -1 + */ + +#ifndef TMW_BITS_PER_INT +# if INT_MAX == 0x7FL +# define TMW_BITS_PER_INT 8 +# elif INT_MAX == 0x7FFFL +# define TMW_BITS_PER_INT 16 +# elif INT_MAX == 0x7FFFFFFFL +# define TMW_BITS_PER_INT 32 +# else +# define TMW_BITS_PER_INT -1 +# endif +#endif + +#ifndef TMW_BITS_PER_LONG +# if LONG_MAX == 0x7FL +# define TMW_BITS_PER_LONG 8 +# elif LONG_MAX == 0x7FFFL +# define TMW_BITS_PER_LONG 16 +# elif LONG_MAX == 0x7FFFFFFFL +# define TMW_BITS_PER_LONG 32 +# else +# define TMW_BITS_PER_LONG -1 +# endif +#endif + +#ifndef TMW_BITS_PER_SHRT +# if SHRT_MAX == 0x7FL +# define TMW_BITS_PER_SHRT 8 +# elif SHRT_MAX == 0x7FFFL +# define TMW_BITS_PER_SHRT 16 +# elif SHRT_MAX == 0x7FFFFFFFL +# define TMW_BITS_PER_SHRT 32 +# else +# define TMW_BITS_PER_SHRT -1 +# endif +#endif + +#ifndef TMW_BITS_PER_SCHAR +# if SCHAR_MAX == 0x7FL +# define TMW_BITS_PER_SCHAR 8 +# elif SCHAR_MAX == 0x7FFFL +# define TMW_BITS_PER_SCHAR 16 +# elif SCHAR_MAX == 0x7FFFFFFFL +# define TMW_BITS_PER_SCHAR 32 +# else +# define TMW_BITS_PER_SCHAR -1 +# endif +#endif + +#ifndef TMW_CHAR_SIGNED +# if SCHAR_MAX == CHAR_MAX +# define TMW_CHAR_SIGNED 1 +# else +# define TMW_CHAR_SIGNED 0 +# endif +#endif + +/* It is common for one or more of the integer types + * to be the same size. For example, on many embedded + * processors, both shorts and ints are 16 bits. On + * processors used for workstations, it is quite common + * for both int and long to be 32 bits. + * When there is more than one choice for typdef'ing + * a portable type like int16_T or uint32_T, in + * concept, it should not matter which choice is made. + * However, some style guides and some code checking + * tools do identify and complain about seemingly + * irrelevant differences. For example, a code + * checking tool may complain about an implicit + * conversion from int to short even though both + * are 16 bits. To reduce these types of + * complaints, it is best to make int the + * preferred choice when more than one is available. + */ + +#ifndef INT8_T +# if TMW_BITS_PER_INT == 8 +# define INT8_T int +# elif TMW_BITS_PER_LONG == 8 +# define INT8_T long +# elif TMW_BITS_PER_SCHAR == 8 +# define INT8_T signed char +# elif TMW_BITS_PER_SHRT == 8 +# define INT8_T short +# endif +#endif +#ifdef INT8_T + typedef INT8_T int8_T; +#endif + +#ifndef UINT8_T +# if TMW_BITS_PER_INT == 8 +# define UINT8_T unsigned int +# elif TMW_BITS_PER_LONG == 8 +# define UINT8_T unsigned long +# elif TMW_BITS_PER_SCHAR == 8 +# define UINT8_T unsigned char +# elif TMW_BITS_PER_SHRT == 8 +# define UINT8_T unsigned short +# endif +#endif +#ifdef UINT8_T + typedef UINT8_T uint8_T; +#endif + + +#ifndef INT16_T +# if TMW_BITS_PER_INT == 16 +# define INT16_T int +# elif TMW_BITS_PER_LONG == 16 +# define INT16_T long +# elif TMW_BITS_PER_SCHAR == 16 +# define INT16_T signed char +# elif TMW_BITS_PER_SHRT == 16 +# define INT16_T short +# endif +#endif +#ifdef INT16_T + typedef INT16_T int16_T; +#endif + + +#ifndef UINT16_T +# if TMW_BITS_PER_INT == 16 +# define UINT16_T unsigned int +# elif TMW_BITS_PER_LONG == 16 +# define UINT16_T unsigned long +# elif TMW_BITS_PER_SCHAR == 16 +# define UINT16_T unsigned char +# elif TMW_BITS_PER_SHRT == 16 +# define UINT16_T unsigned short +# endif +#endif +#ifdef UINT16_T + typedef UINT16_T uint16_T; +#endif + + +#ifndef INT32_T +# if TMW_BITS_PER_INT == 32 +# define INT32_T int +# elif TMW_BITS_PER_LONG == 32 +# define INT32_T long +# elif TMW_BITS_PER_SCHAR == 32 +# define INT32_T signed char +# elif TMW_BITS_PER_SHRT == 32 +# define INT32_T short +# endif +#endif +#ifdef INT32_T + typedef INT32_T int32_T; +#endif + + +#ifndef UINT32_T +# if TMW_BITS_PER_INT == 32 +# define UINT32_T unsigned int +# elif TMW_BITS_PER_LONG == 32 +# define UINT32_T unsigned long +# elif TMW_BITS_PER_SCHAR == 32 +# define UINT32_T unsigned char +# elif TMW_BITS_PER_SHRT == 32 +# define UINT32_T unsigned short +# endif +#endif +#ifdef UINT32_T + typedef UINT32_T uint32_T; +#endif + +/* The following is used to emulate smaller integer types when only + * larger types are available. For example, compilers for TI C3x/C4x DSPs + * define char and short to be 32 bits, so 8 and 16 bits are not directly + * available. This target is commonly used with RTW rapid prototyping. + * Other DSPs define char to be 16 bits, so 8 bits is not directly + * available. + */ +#ifndef INT8_T +# ifdef INT16_T +# define INT8_T INT16_T + typedef INT8_T int8_T; +# else +# ifdef INT32_T +# define INT8_T INT32_T + typedef INT8_T int8_T; +# endif +# endif +#endif + +#ifndef UINT8_T +# ifdef UINT16_T +# define UINT8_T UINT16_T + typedef UINT8_T uint8_T; +# else +# ifdef UINT32_T +# define UINT8_T UINT32_T + typedef UINT8_T uint8_T; +# endif +# endif +#endif + +#ifndef INT16_T +# ifdef INT32_T +# define INT16_T INT32_T + typedef INT16_T int16_T; +# endif +#endif + +#ifndef UINT16_T +# ifdef UINT32_T +# define UINT16_T UINT32_T + typedef UINT16_T uint16_T; +# endif +#endif + + +#ifndef NO_FLOATS + +#ifndef REAL32_T +# ifndef __MWERKS__ +# if FLT_MANT_DIG >= 23 +# define REAL32_T float +# endif +# else +# define REAL32_T float +# endif +#endif +#ifdef REAL32_T + typedef REAL32_T real32_T; +#endif + + +#ifndef REAL64_T +# ifndef __MWERKS__ +# if DBL_MANT_DIG >= 52 +# define REAL64_T double +# endif +# else +# define REAL64_T double +# endif +#endif +#ifdef REAL64_T + typedef REAL64_T real64_T; +#endif + +#endif /* NO_FLOATS*/ + +/*=======================================================================* + * Fixed width word size data types: * + * int64_T - signed 64 bit integers * + * uint64_T - unsigned 64 bit integers * + *=======================================================================*/ + + + +#ifndef INT64_T +# if defined(__APPLE__) +# define INT64_T long long +# define FMT64 "ll" +# if defined(__LP64__) && !defined(INT_TYPE_64_IS_LONG) +# define INT_TYPE_64_IS_LONG +# endif +# elif (defined(__x86_64__) || defined(__LP64__))&& !defined(__MINGW64__) +# define INT64_T long +# define FMT64 "l" +# if !defined(INT_TYPE_64_IS_LONG) +# define INT_TYPE_64_IS_LONG +# endif +# elif defined(_MSC_VER) || (defined(__BORLANDC__) && __BORLANDC__ >= 0x530) \ + || (defined(__WATCOMC__) && __WATCOMC__ >= 1100) +# define INT64_T __int64 +# define FMT64 "I64" +# elif defined(__GNUC__) || defined(TMW_ENABLE_INT64) \ + || defined(__LCC64__) +# define INT64_T long long +# define FMT64 "ll" +# endif +#endif + + + +#if defined(INT64_T) +# if defined(__GNUC__) && \ + ((__GNUC__ > 2) || ((__GNUC__ == 2) && (__GNUC_MINOR__ >=9))) + __extension__ +# endif + typedef INT64_T int64_T; +#endif + + + +#ifndef UINT64_T +# if defined(__APPLE__) +# define UINT64_T unsigned long long +# define FMT64 "ll" +# if defined(__LP64__) && !defined(INT_TYPE_64_IS_LONG) +# define INT_TYPE_64_IS_LONG +# endif +# elif (defined(__x86_64__) || defined(__LP64__))&& !defined(__MINGW64__) +# define UINT64_T unsigned long +# define FMT64 "l" +# if !defined(INT_TYPE_64_IS_LONG) +# define INT_TYPE_64_IS_LONG +# endif +# elif defined(_MSC_VER) || (defined(__BORLANDC__) && __BORLANDC__ >= 0x530) \ + || (defined(__WATCOMC__) && __WATCOMC__ >= 1100) +# define UINT64_T unsigned __int64 +# define FMT64 "I64" +# elif defined(__GNUC__) || defined(TMW_ENABLE_INT64) \ + || defined(__LCC64__) +# define UINT64_T unsigned long long +# define FMT64 "ll" +# endif +#endif + +#if defined(_WIN64) || (defined(__APPLE__) && defined(__LP64__)) \ + || defined(__x86_64__) \ + || defined(__LP64__) +# define INT_TYPE_64_IS_SUPPORTED +#endif + +#if defined(UINT64_T) +# if defined(__GNUC__) && \ + ((__GNUC__ > 2) || ((__GNUC__ == 2) && (__GNUC_MINOR__ >=9))) + __extension__ +# endif + typedef UINT64_T uint64_T; +#endif + +/*===========================================================================* + * Format string modifiers for using size_t variables in printf statements. * + *===========================================================================*/ + +#ifndef FMT_SIZE_T +# if (defined( __GNUC__ ) || defined(_STDC_C99))&& !defined(__MINGW64__) +# define FMT_SIZE_T "z" +# elif defined (__WATCOMC__) +# define FMT_SIZE_T "l" +# elif defined (_WIN32 ) +# define FMT_SIZE_T "I" +# else +# define FMT_SIZE_T "l" +# endif +#endif + +#ifndef FMT_PTRDIFF_T +# if defined(__APPLE__) +# define FMT_PTRDIFF_T "l" +# elif defined( __GNUC__ ) || defined(_STDC_C99) +# define FMT_PTRDIFF_T "t" +# elif defined (__WATCOMC__) +# define FMT_PTRDIFF_T "l" +# elif defined (_WIN32 ) +# define FMT_PTRDIFF_T "I" +# else +# define FMT_PTRDIFF_T "l" +# endif +#endif + +/*===========================================================================* + * General or logical data types where the word size is not guaranteed. * + * real_T - possible settings include real32_T or real64_T * + * time_T - possible settings include real32_T or real64_T * + * boolean_T * + * char_T * + * int_T * + * uint_T * + * byte_T * + *===========================================================================*/ + +#ifndef NO_FLOATS + +#ifndef REAL_T +# ifdef REAL64_T +# define REAL_T real64_T +# else +# ifdef REAL32_T +# define REAL_T real32_T +# endif +# endif +#endif +#ifdef REAL_T + typedef REAL_T real_T; +#endif + +#ifndef TIME_T +# ifdef REAL_T +# define TIME_T real_T +# endif +#endif +#ifdef TIME_T + typedef TIME_T time_T; +#endif + +#endif /* NO_FLOATS */ + +#ifndef BOOLEAN_T +# if defined(UINT8_T) +# define BOOLEAN_T UINT8_T +# else +# define BOOLEAN_T unsigned int +# endif +#endif +typedef BOOLEAN_T boolean_T; + + +#ifndef CHARACTER_T +# define CHARACTER_T char +#endif +typedef CHARACTER_T char_T; + + +#ifndef INTEGER_T +# define INTEGER_T int +#endif +typedef INTEGER_T int_T; + + +#ifndef UINTEGER_T +# define UINTEGER_T unsigned +#endif +typedef UINTEGER_T uint_T; + + +#ifndef BYTE_T +# define BYTE_T unsigned char +#endif +typedef BYTE_T byte_T; + + +/*===========================================================================* + * Define Complex Structures * + *===========================================================================*/ +#ifndef NO_FLOATS + +#ifndef CREAL32_T +# ifdef REAL32_T + typedef struct { + real32_T re, im; + } creal32_T; +# define CREAL32_T creal32_T +# endif +#endif + +#ifndef CREAL64_T +# ifdef REAL64_T + typedef struct { + real64_T re, im; + } creal64_T; +# define CREAL64_T creal64_T +# endif +#endif + +#ifndef CREAL_T +# ifdef REAL_T + typedef struct { + real_T re, im; + } creal_T; +# define CREAL_T creal_T +# endif +#endif + +#endif /* NO_FLOATS */ + +#ifndef CINT8_T +# ifdef INT8_T + typedef struct { + int8_T re, im; + } cint8_T; +# define CINT8_T cint8_T +# endif +#endif + +#ifndef CUINT8_T +# ifdef UINT8_T + typedef struct { + uint8_T re, im; + } cuint8_T; +# define CUINT8_T cuint8_T +# endif +#endif + +#ifndef CINT16_T +# ifdef INT16_T + typedef struct { + int16_T re, im; + } cint16_T; +# define CINT16_T cint16_T +# endif +#endif + +#ifndef CUINT16_T +# ifdef UINT16_T + typedef struct { + uint16_T re, im; + } cuint16_T; +# define CUINT16_T cuint16_T +# endif +#endif + +#ifndef CINT32_T +# ifdef INT32_T + typedef struct { + int32_T re, im; + } cint32_T; +# define CINT32_T cint32_T +# endif +#endif + +#ifndef CUINT32_T +# ifdef UINT32_T + typedef struct { + uint32_T re, im; + } cuint32_T; +# define CUINT32_T cuint32_T +# endif +#endif + +#ifndef CINT64_T +# ifdef INT64_T + typedef struct { + int64_T re, im; + } cint64_T; +# define CINT64_T cint64_T +# endif +#endif + +#ifndef CUINT64_T +# ifdef UINT64_T + typedef struct { + uint64_T re, im; + } cuint64_T; +# define CUINT64_T cuint64_T +# endif +#endif + +/*=======================================================================* + * Min and Max: * + * int8_T, int16_T, int32_T - signed 8, 16, or 32 bit integers * + * uint8_T, uint16_T, uint32_T - unsigned 8, 16, or 32 bit integers * + *=======================================================================*/ + +#define MAX_int8_T ((int8_T)(127)) /* 127 */ +#define MIN_int8_T ((int8_T)(-128)) /* -128 */ +#define MAX_uint8_T ((uint8_T)(255)) /* 255 */ +#define MIN_uint8_T ((uint8_T)(0)) + +#define MAX_int16_T ((int16_T)(32767)) /* 32767 */ +#define MIN_int16_T ((int16_T)(-32768)) /* -32768 */ +#define MAX_uint16_T ((uint16_T)(65535)) /* 65535 */ +#define MIN_uint16_T ((uint16_T)(0)) + +#define MAX_int32_T ((int32_T)(2147483647)) /* 2147483647 */ +#define MIN_int32_T ((int32_T)(-2147483647-1)) /* -2147483648 */ +#define MAX_uint32_T ((uint32_T)(0xFFFFFFFFU)) /* 4294967295 */ +#define MIN_uint32_T ((uint32_T)(0)) + +#if defined(_MSC_VER) || (defined(__BORLANDC__) && __BORLANDC__ >= 0x530) \ + || (defined(__WATCOMC__) && __WATCOMC__ >= 1100) \ + || defined(__LCC64__) +# ifdef INT64_T +# define MAX_int64_T ((int64_T)(9223372036854775807LL)) +# define MIN_int64_T ((int64_T)(-9223372036854775807LL-1LL)) +# endif +# ifdef UINT64_T +# define MAX_uint64_T ((uint64_T)(0xFFFFFFFFFFFFFFFFULL)) +# define MIN_uint64_T ((uint64_T)(0)) +# endif +#else +# ifdef INT64_T +# ifdef INT_TYPE_64_IS_LONG +# define MAX_int64_T ((int64_T)(9223372036854775807L)) +# define MIN_int64_T ((int64_T)(-9223372036854775807L-1L)) +# else +# define MAX_int64_T ((int64_T)(9223372036854775807LL)) +# define MIN_int64_T ((int64_T)(-9223372036854775807LL-1LL)) +# endif +# endif +# ifdef UINT64_T +# ifdef INT_TYPE_64_IS_LONG +# define MAX_uint64_T ((uint64_T)(0xFFFFFFFFFFFFFFFFUL)) +# define MIN_uint64_T ((uint64_T)(0)) +# else +# define MAX_uint64_T ((uint64_T)(0xFFFFFFFFFFFFFFFFULL)) +# define MIN_uint64_T ((uint64_T)(0)) +# endif +# endif +#endif + +#ifdef _MSC_VER +/* Conversion from unsigned __int64 to double is not implemented in windows + * and results in a compile error, thus the value must first be cast to + * signed __int64, and then to double. + * + * If the 64 bit int value is greater than 2^63-1, which is the signed int64 max, + * the macro below provides a workaround for casting a uint64 value to a double + * in windows. + */ +# define uint64_to_double(u) ( ((u) > _I64_MAX) ? \ + (double)(__int64)((u) - _I64_MAX - 1) + (double)_I64_MAX + 1: \ + (double)(__int64)(u) ) + +/* The following inline function should only be used in the macro double_to_uint64, + * as it only handles the specfic range of double between 2^63 and 2^64-1 */ +__forceinline +uint64_T double_to_uint64_helper(double d) { + union double_to_uint64_union_type { + double dd; + uint64_T i64; + } di; + di.dd = d; + return (((di.i64 & 0x000fffffffffffff) | 0x0010000000000000) << 11); +} + +/* The largest double value that can be cast to uint64 in windows is the + * signed int64 max, which is 2^63-1. The macro below provides + * a workaround for casting large double values to uint64 in windows. + */ +/* The magic number 18446744073709551616.0 is 2^64 */ +/* The magic number 9223372036854775808.0 is 2^63 */ +# define double_to_uint64(d) ( ((d) >= 18446744073709551616.0) ? \ + 0xffffffffffffffffULL : \ + ((d) >= 0.0) ? \ + ((d) >= 9223372036854775808.0) ? \ + double_to_uint64_helper(d) : \ + (unsigned __int64)(d) : \ + 0ULL ) +#else +# define uint64_to_double(u) ((double)(u)) +# if defined(__BORLANDC__) || defined(__WATCOMC__) || defined(__TICCSC__) +/* double_to_uint64 defined only for MSVC and UNIX */ +# else +# define double_to_uint64(d) ( ((d) >= 18446744073709551616.0) ? \ + (unsigned long long) 0xffffffffffffffffULL : \ + ((d) >= 0) ? (unsigned long long)(d) : (unsigned long long) 0 ) +# endif +#endif + +#if !defined(__cplusplus) && !defined(__bool_true_false_are_defined) + +#ifndef _bool_T +#define _bool_T + +typedef boolean_T bool; + +#ifndef false +#define false (0) +#endif +#ifndef true +#define true (1) +#endif + +#endif /* _bool_T */ + +#endif /* !__cplusplus */ + +/* + * This software assumes that the code is being compiled on a target using a + * 2's complement representation for signed integer values. + */ +#if ((SCHAR_MIN + 1) != -SCHAR_MAX) +#error "This code must be compiled using a 2's complement representation for signed integer values" +#endif + +/* + * Maximum length of a identifier (function/variable/model) + * including the null-termination character. + */ +#define TMW_NAME_LENGTH_MAX 64 + +/* + * Maximum values for indices and dimensions + */ +#include <stddef.h> + +#ifdef MX_COMPAT_32 +typedef int mwSize; +typedef int mwIndex; +typedef int mwSignedIndex; +#else +typedef size_t mwSize; /* unsigned pointer-width integer */ +typedef size_t mwIndex; /* unsigned pointer-width integer */ +typedef ptrdiff_t mwSignedIndex; /* a signed pointer-width integer */ +#endif + +typedef int SLIndex; +typedef int SLSize; + +#if (defined(_LP64) || defined(_WIN64)) && !defined(MX_COMPAT_32) +/* Currently 2^48 based on hardware limitations */ +# define MWSIZE_MAX 281474976710655UL +# define MWINDEX_MAX 281474976710655UL +# define MWSINDEX_MAX 281474976710655L +# define MWSINDEX_MIN -281474976710655L +#else +# define MWSIZE_MAX 2147483647UL +# define MWINDEX_MAX 2147483647UL +# define MWSINDEX_MAX 2147483647L +# define MWSINDEX_MIN -2147483647L +#endif +#define MWSIZE_MIN 0UL +#define MWINDEX_MIN 0UL + +/** UTF-16 character type */ + +#if (defined(__cplusplus) && (__cplusplus >= 201103L)) || (defined(_HAS_CHAR16_T_LANGUAGE_SUPPORT) && _HAS_CHAR16_T_LANGUAGE_SUPPORT) +typedef char16_t CHAR16_T; +#define U16_STRING_LITERAL_PREFIX u +#elif defined(_MSC_VER) +typedef wchar_t CHAR16_T; +#define U16_STRING_LITERAL_PREFIX L +#else +typedef UINT16_T CHAR16_T; +#endif + +#endif /* TMWTYPES_H */ + + diff --git a/freertos/cvitek/task/audio/src/riscv64/audio_main.c b/freertos/cvitek/task/audio/src/riscv64/audio_main.c new file mode 100644 index 000000000..a9e532dc1 --- /dev/null +++ b/freertos/cvitek/task/audio/src/riscv64/audio_main.c @@ -0,0 +1,690 @@ +/* Standard includes. */ +#include <stdio.h> +//#include <stdlib.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" +#include "malloc.h" +#include "sleep.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" +#include "arch_helpers.h" +/* audio only */ +#ifdef AUDIO_UNIT_TEST +#include "ssp_unit_test.h" +#endif +#include "cviaudio_rtos_cmd.h" +#include "cvi_comm_aio.h" +#include "comm.h" +#include "cviaudio_algo_interface.h" +#include "cviaudio_rtos_align.h" +/*define the audio print macro---------*/ +#define __AUDIO_LOG_ON__ +#define AUD_RTOS_LOG_LEVEL 0 + +#ifdef __AUDIO_LOG_ON__ +#define aud_printf printf +#else +#define aud_printf(...) +#endif + +#define aud_error(fmt, args...) \ + do { \ + if (AUD_RTOS_LOG_LEVEL >= 0) \ + aud_printf("[audio][rtos][error]<%s,%d> "fmt, __func__, __LINE__, ##args);\ + } while (0) + +#define aud_info(fmt, args...) \ + do { \ + if (AUD_RTOS_LOG_LEVEL >= 1) \ + aud_printf("[audio][rtos][info]<%s,%d> "fmt, __func__, __LINE__, ##args);\ + } while (0) +#define aud_debug(fmt, args...) \ + do { \ + if (AUD_RTOS_LOG_LEVEL >= 2) \ + aud_printf("[rtos][v]<%s,%d> "fmt, __func__, __LINE__, ##args);\ + } while (0) + +/*define the audio SSP CMD---------------end*/ +QueueHandle_t xQueueAudio; +QueueHandle_t xQueueAudioCmdqu; +int unit_test_triggered = 0; +unsigned char ssp_running = 0; +void *paudio_ssp_handle = NULL; +void *paudio_ssp_spk_handle = NULL; +//for ssp parameters after ssp_init +AI_TALKVQE_CONFIG_S *pstVqeConfig = NULL; +ST_SSP_RTOS_INDICATOR *pindicator = NULL; +ST_SSP_BUFTBL *pstSspBufTbl = NULL; +//for block mode global variables +void *paudio_ssp_block = NULL; + +#define CVIAUDIO_BASIC_AEC_LENGTH 160 +#ifndef CVIAUDIO_BYTES_PER_SAMPLE +#define CVIAUDIO_BYTES_PER_SAMPLE 2 +#endif + +#define CVIAUDIO_DUMP_PARAM 1 + +//#define AUDIO_MEASURE_3A_LOADING + +#ifndef CVIAUDIO_CHECK_NULL +#define CVIAUDIO_CHECK_NULL(ptr) \ + do { \ + if (!(ptr)) { \ + printf("func:%s,line:%d, NULL pointer\n", __func__, __LINE__); \ + } \ + } while (0) +#endif +// just to build & compiler venc sdk, do not need run this +__attribute__((optimize("-O0"))) void cvi_audio_init_test(void) +{ + + aud_printf("Enter cvitek audio ssp algorithm test mode\n"); + if (unit_test_triggered == 1) { + //already trigger + return; + + } else { + aud_printf("audio_ssp first trigger test begin.....!!!\n"); + aud_printf("audio_ssp first trigger test end!\n"); + unit_test_triggered = 1; + } +} + +static void _cviaudio_clear_cmdq(cmdqu_t *p_cmdqu) +{ + if (p_cmdqu == NULL) + return; + + p_cmdqu->ip_id = -1; + p_cmdqu->cmd_id = -1; + p_cmdqu->param_ptr = -1; +} + +static unsigned char _audio_task_check_ssp_proc_data_valid(ST_SSP_RTOS_INDICATOR *pIndicator) +{ + unsigned char ret = 1; + unsigned char check_val = 1; + + if (!pIndicator) { + aud_error("[error][rtos][audio_task]Null pt detect in proc data...\n"); + return 0; + } + + if (pIndicator->channel_nums > 2 || pIndicator->channel_nums < 1) { + check_val = 0; + aud_error("[error][rtos][audio_task]channel numbers[%d] invalid\n", + pIndicator->channel_nums); + } + + if (pIndicator->chunks_number <= 0 || + pIndicator->chunks_number > CVIAUDIO_SSP_CHUNK_NUMBERS) { + check_val = 0; + aud_error("[error][rtos][audio_task]invalid chunks_number[%d]\n", + pIndicator->chunks_number); + } + + if (pIndicator->Wpt_index > CVIAUDIO_SSP_CHUNK_NUMBERS) { + check_val = 0; + aud_error("[error][rtos][audio_task]wpt_index invalid range[%d]\n", + pIndicator->Wpt_index); + } + + if (!pIndicator->ssp_on) { + check_val = 0; + aud_error("[error][rtos][audio_task]ssp_on invalid[%d]\n", + pIndicator->ssp_on); + } + return (ret&check_val); + +} +void prvAudioRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + cmdqu_t rtos_cmdq; + unsigned char ret_val; + //ST_SSP_BUFTBL *pstSspBufTbl;//for unit test mode + unsigned int prev_msg_counter = -1;//counter to check the package from cviaudio_core.ko to rtos + //for spk out algorithm + ST_SSP_RTOS_SPK_DATA_RET *pSpkSspRtosData_Ret; + #ifdef AUDIO_UNIT_TEST + cmdqu_t rtos_cmdq_back2Kernel; + #endif + + #ifdef AUDIO_MEASURE_3A_LOADING + TickType_t xTimer3AProcStart; + TickType_t xTimer3AProcEnd; + static int frame_count; + static int total_diff; + #endif + + cvi_audio_init_test(); + printf("pAudioRunTask run Version:20220519\n"); + + xQueueAudioCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + xQueueAudio = main_GetMODHandle(E_QUEUE_AUDIO); + + for (;;) { + xQueueReceive(xQueueAudio, &rtos_cmdq, portMAX_DELAY); + + aud_info("prvAudioRunTask_cmd ip=%d cmd=%d para=%x\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + if (rtos_cmdq.ip_id != IP_AUDIO) { + //send back the err msg + aud_error("invalid ip_id[%d] into AudioRunTask\n", rtos_cmdq.ip_id); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + goto LEAVE_AUDIO_RUN_TASK; + } + + if (rtos_cmdq.cmd_id > CVIAUDIO_RTOS_CMD_SSP_MAX) { + aud_error("invalid cmd[%d]...\n", rtos_cmdq.cmd_id); + goto LEAVE_AUDIO_RUN_TASK; + } + + + + //printf("rtos_cmdq.cmd_id[%d]\n", rtos_cmdq.cmd_id); + switch (rtos_cmdq.cmd_id) { + case CVIAUDIO_RTOS_CMD_SSP_INIT: + { + aud_info("CVIAUDIO_RTOS_CMD_SSP_INIT\n"); + ST_CVIAUDIO_MAILBOX *gpstCviaudioMailBox= (ST_CVIAUDIO_MAILBOX *)rtos_cmdq.param_ptr; + + inv_dcache_range((uintptr_t)gpstCviaudioMailBox, sizeof(ST_CVIAUDIO_MAILBOX)); + aud_debug("CVIAUDIO_RTOS_CMD_SSP_INIT free_rtos addrPhy[0x%x]\n", rtos_cmdq.param_ptr); + aud_debug("magic word[0x%lx]\n", gpstCviaudioMailBox->u64RevMask); + if (gpstCviaudioMailBox->u64RevMask == CVIAUDIO_RTOS_MAGIC_WORD_KERNEL_BIND_MODE) { + pstVqeConfig = (AI_TALKVQE_CONFIG_S *)gpstCviaudioMailBox->AinVqeCfgPhy; + pstSspBufTbl = (ST_SSP_BUFTBL *)gpstCviaudioMailBox->buffertblPhy; + pindicator = (ST_SSP_RTOS_INDICATOR *)gpstCviaudioMailBox->indicatorPhy; + aud_debug("[SSP_INIT]show phy address vqe[0x%p] bufTbl[0x%p] indicator[0x%p]\n", + pstVqeConfig, pstSspBufTbl, pindicator); + inv_dcache_range((uintptr_t)gpstCviaudioMailBox->AinVqeCfgPhy, + sizeof(AI_TALKVQE_CONFIG_S)); + inv_dcache_range((uintptr_t)gpstCviaudioMailBox->buffertblPhy, + sizeof(ST_SSP_BUFTBL)); + inv_dcache_range((uintptr_t)gpstCviaudioMailBox->indicatorPhy, + sizeof(ST_SSP_RTOS_INDICATOR)); + aud_debug("[SSP_INIT]inv dcache ...done!!\n"); + + } else { + aud_error("[SSP]ERROR [%s][%d]...force break\n", __func__, __LINE__); + break; + } + //dump out the vqe config ------------------------------------------start + aud_debug("SSP_INIT dump-----------------------------------------------------\n"); + aud_debug("para_client_config[%d]\n", pstVqeConfig->para_client_config); + aud_debug("u32OpenMask[0x%x]\n", pstVqeConfig->u32OpenMask); + aud_debug("s32WorkSampleRate[%d]\n", pstVqeConfig->s32WorkSampleRate); + aud_debug("stAecCfg.para_aec_filter_len[%d]\n", pstVqeConfig->stAecCfg.para_aec_filter_len); + aud_debug("stAecCfg.para_aes_std_thrd[%d]\n", pstVqeConfig->stAecCfg.para_aes_std_thrd); + aud_debug("stAecCfg.para_aes_supp_coeff[%d]\n", pstVqeConfig->stAecCfg.para_aes_supp_coeff); + aud_debug("SSP_INIT dump-----------------------------------------------------[end]\n"); + //dump out the vqe config -------------------------------------------end + if (paudio_ssp_handle != NULL) { + aud_error("Warning ssp audio handle is not NULL\n"); + } + paudio_ssp_handle = CviAud_Algo_Init(pstVqeConfig->u32OpenMask, pstVqeConfig); + if (paudio_ssp_handle == NULL) { + aud_error("get null pt in init ssp\n"); + } else + ssp_running = 1; + + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_DEINIT: + { + aud_info("CVIAUDIO_RTOS_CMD_SSP_DEINIT\n"); + if (paudio_ssp_handle == NULL) { + aud_error("Error cannot de-init null pt\n"); + } else { + CviAud_Algo_DeInit(paudio_ssp_handle); + paudio_ssp_handle = NULL; + } + ssp_running = 0; + rtos_cmdq.ip_id = IP_AUDIO; + rtos_cmdq.cmd_id = CVIAUDIO_RTOS_CMD_SSP_DEINIT; + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_PROCESS: + { + aud_info("CVIAUDIO_RTOS_CMD_SSP_PROCESS\n"); + if (paudio_ssp_handle == NULL || pstSspBufTbl == NULL) { + aud_error("Error cannot process with NULL handle[%s][%d]\n", __func__, __LINE__); + break; + + } else { + do { + ret_val = _audio_task_check_ssp_proc_data_valid(pindicator); + if (!ret_val) { + aud_error("Error[%s][%d]..force break!!\n", __func__, __LINE__); + break; + } + + //if ((pindicator->msg_counter == prev_msg_counter) && (repeat_cnt < 100)) { + if ((pindicator->msg_counter == prev_msg_counter)) { + aud_error("[audio_task] counter same[%d][%d]\n", + prev_msg_counter, pindicator->msg_counter); + + inv_dcache_range((uintptr_t)pindicator, sizeof(ST_SSP_RTOS_INDICATOR)); + inv_dcache_range((uintptr_t)pstSspBufTbl, + sizeof(ST_SSP_BUFTBL) * CVIAUDIO_SSP_CHUNK_NUMBERS); + if (pindicator) { + if (pindicator->chunks_number >= 5) + vTaskDelay(pdMS_TO_TICKS(10)); + else if (pindicator->chunks_number >= 3) + vTaskDelay(pdMS_TO_TICKS(5)); + else + usleep(3000); + } + } + + //start process the data with the physical table: pstSspBufTbl + unsigned char bCheck_input_full = 1; + unsigned char cur_pt, proc_pkt_cnt, target_pkt_cnt, chn_num; + + proc_pkt_cnt = 0; + target_pkt_cnt = pindicator->chunks_number; + cur_pt = pindicator->Ppt_index; + chn_num = pindicator->channel_nums; + + + while (proc_pkt_cnt < target_pkt_cnt) { + if (pstSspBufTbl[cur_pt].bBufOccupy != CVIAUDIO_BUF_TBL_INPUT) { + bCheck_input_full = 0; + inv_dcache_range((uintptr_t)pindicator, sizeof(ST_SSP_RTOS_INDICATOR)); + inv_dcache_range((uintptr_t)pstSspBufTbl, + sizeof(ST_SSP_BUFTBL) * CVIAUDIO_SSP_CHUNK_NUMBERS); + break; + } + cur_pt = (cur_pt + 1) % CVIAUDIO_SSP_CHUNK_NUMBERS; + proc_pkt_cnt += 1; + } + cur_pt = pindicator->Ppt_index; + chn_num = pindicator->channel_nums; + proc_pkt_cnt = 0; + while ((proc_pkt_cnt != target_pkt_cnt) && (bCheck_input_full)) { + if (chn_num == 2 || pindicator->ssp_with_aec) { + ret_val = CviAud_Algo_Process(paudio_ssp_handle, + pstSspBufTbl[cur_pt].mic_in_addr, + pstSspBufTbl[cur_pt].ref_in_addr, + pstSspBufTbl[cur_pt].output_addr, + CVIAUDIO_BASIC_AEC_LENGTH); + } else { + ret_val = CviAud_Algo_Process(paudio_ssp_handle, + pstSspBufTbl[cur_pt].mic_in_addr, + (uint64_t)NULL, + pstSspBufTbl[cur_pt].output_addr, + CVIAUDIO_BASIC_AEC_LENGTH); + } + if (ret_val <= 0) + aud_error("[audio_task]CviAudio_Algo_Process error!!!\n"); + else + pstSspBufTbl[cur_pt].bBufOccupy = CVIAUDIO_BUF_TBL_AFTER_SSP; + proc_pkt_cnt += 1; + cur_pt = (cur_pt + 1) % CVIAUDIO_SSP_CHUNK_NUMBERS; + if (proc_pkt_cnt > (CVIAUDIO_SSP_CHUNK_NUMBERS + 1)) { + aud_error("[audio_task]proc_pkt_cnt abnormal..[%d]\n", + proc_pkt_cnt); + break; + } + } + if (bCheck_input_full) { + pindicator->Ppt_index = cur_pt; + prev_msg_counter = pindicator->msg_counter; + pindicator->msg_counter += 1; + clean_dcache_range((uintptr_t)pindicator, + sizeof(ST_SSP_RTOS_INDICATOR)); + clean_dcache_range((uintptr_t)pstSspBufTbl, + sizeof(ST_SSP_BUFTBL) * CVIAUDIO_SSP_CHUNK_NUMBERS); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + } + } while ((ret_val > 0) && ssp_running); + } + } + break; + case CVIAUDIO_RTOS_CMD_SSP_SPK_INIT: + { + //TODO: remain only mic in algo + rtos_cmdq.cmd_id = CVIAUDIO_RTOS_CMD_SSP_SPK_INIT; + rtos_cmdq.ip_id = IP_AUDIO; + //rtos_cmdq.param_ptr = p_ret_status; + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_SPK_DEINIT: + { + //TODO: remain only mic in algo + rtos_cmdq.ip_id = IP_AUDIO; + rtos_cmdq.cmd_id = CVIAUDIO_RTOS_CMD_SSP_SPK_DEINIT; + //rtos_cmdq.param_ptr = p_ret_status; + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_SPK_PROCESS: + { + //TODO: remain only mic in algo + rtos_cmdq.ip_id = IP_AUDIO; + rtos_cmdq.cmd_id = CVIAUDIO_RTOS_CMD_SSP_SPK_PROCESS; + rtos_cmdq.param_ptr = pSpkSspRtosData_Ret; + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_DEBUG: + { + //testing the mailbox transition + aud_info("Entering debug mode---------------------->>\n"); + + aud_info("Leaving debug mode<<----------------------\n"); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST_BLOCK_MODE_INIT: + { + //testing the mailbox transition + aud_info("RTOS_CMD_SSP_UNIT_TEST_BLOCK_MODE_INIT---------------------->>\n"); + #ifdef AUDIO_UNIT_TEST + SSP_Algorithm_Init(); + #endif + aud_info("[RTOS]Leaving CMD_SSP_UNIT_TEST_BLOCK_MODE_INIT<<-------------->>\n"); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + aud_info("[RTOS]Leaving\n"); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST_BLOCK_MODE_GET: + { + //testing the mailbox transition + int ret = 0; + uint64_t output_addr = rtos_cmdq.param_ptr; + + inv_dcache_range((uintptr_t)output_addr, 320); + aud_debug("dump 19 no critical / with o2/ with poshiun patch [0x%lx]\n", output_addr); + #ifdef USING_CRITICAL_PROTECT + taskENTER_CRITICAL(); + #endif + #ifdef AUDIO_UNIT_TEST + ret = SSP_Algorithm(1, NULL, output_addr); + #endif + if (ret == 0) { + aud_info("[Audio]Unit test file go to an end....finishedxxxxxxxxxxxxxxxxxxxx\n"); + break; + } else + aud_info("[Rtos][Audio]Unit test file going-------------------------------------->\n"); + #ifdef USING_CRITICAL_PROTECT + taskEXIT_CRITICAL(); + #endif + clean_dcache_range(output_addr, 320); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + + } + break; + case CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST: + { + //only support for mic in AEC unit test + aud_info("Enter CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST mode!!\n"); + aud_info("Keep sending back data to cviaudio_core irq_handler while occupied\n"); + #ifdef AUDIO_UNIT_TEST + int ret = 0; + unsigned char bCheck_input_full = 1; + unsigned char index = 0; + int count = 0; + unsigned int counter = 0; + #endif + ST_SSP_RTOS_INIT *pSspRtosCfg = rtos_cmdq.param_ptr; + aud_debug("[Rtos][Rtos space]s32RevMask[0x%x]\n",pSspRtosCfg->s32RevMask); + pstSspBufTbl = &pSspRtosCfg->buffertbl[0]; + pSpkSspRtosData_Ret = (ST_SSP_RTOS_SPK_DATA_RET *)pSspRtosCfg->CbPhyAddr; + aud_debug("[Rtos][Rtos_space]xxxpSspRtosCfg[0x%p]\n", pSspRtosCfg); + #if 0 + for (index = 0; index < CVIAUDIO_SSP_CHUNK_NUMBERS; index++) { + aud_debug("[Rtos]index[%d] occupy[%d] mic_in[0x%lx]\n", + index, + pSspRtosCfg->buffertbl[index].bBufOccupy, + pSspRtosCfg->buffertbl[index].mic_in_addr); + + } + #endif + aud_debug("[%s][%d]CbPhyAddr[0x%x]\n", + __func__, __LINE__, + pSspRtosCfg->CbPhyAddr); + aud_debug("pSpkSspRtosData_Ret[0%p]\n", pSpkSspRtosData_Ret); + #ifdef AUDIO_UNIT_TEST + SSP_Algorithm_Init(); + do { + for (index = 0; index < CVIAUDIO_SSP_CHUNK_NUMBERS; index++) { + #if 0 + aud_debug("index[%d] occupy[%d] mic_in[0x%lx]\n", index, pSspRtosCfg->buffertbl[index].bBufOccupy, pSspRtosCfg->buffertbl[index].mic_in_addr); + #endif + bCheck_input_full = bCheck_input_full*pSspRtosCfg->buffertbl[index].bBufOccupy; + if (!bCheck_input_full) { + //aud_debug("[Rtos][%s][%d]CbPhyAddr[0x%llx]xxxxxx\n", __func__, __LINE__, pSspRtosCfg->CbPhyAddr);// + inv_dcache_range((uintptr_t)pSspRtosCfg, sizeof(ST_SSP_RTOS_INIT)); + break; + } + } + if (bCheck_input_full) { + + for (index = 0; index < CVIAUDIO_SSP_CHUNK_NUMBERS; index++) { + pstSspBufTbl[index].bBufOccupy = 0; + ret = SSP_Algorithm(1, NULL, pstSspBufTbl[index].output_addr); + if (ret == 0) { + aud_info("Unit test file go to an end....finished\n"); + break; + } + } + //send back to cviaudio_core.ko since all chunks been process, and the + //occupy flag been pull to 0 + if (pSspRtosCfg->CbPhyAddr == 0) + aud_error("[Rtos][Error]Get physical address 000000\n"); + else { + + pSpkSspRtosData_Ret->cb_command = CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST; + pSpkSspRtosData_Ret->status = 1; + } + rtos_cmdq_back2Kernel.ip_id = IP_AUDIO; + rtos_cmdq_back2Kernel.cmd_id = CVIAUDIO_RTOS_CMD_SSP_UNIT_TEST; + rtos_cmdq_back2Kernel.param_ptr = pSpkSspRtosData_Ret; + rtos_cmdq_back2Kernel.resv.valid.linux_valid = 1; + rtos_cmdq_back2Kernel.resv.valid.rtos_valid = 0; + aud_debug("[Rtos][%s][%d]\n", __func__, __LINE__); + aud_debug("[Rtos]rtos_cmdq[%x]\n", rtos_cmdq.block); + aud_debug("[Rtos]rtos_cmdq linux_valid[%x]\n", rtos_cmdq.resv.valid.linux_valid); + aud_debug("[Rtos]rtos_cmdq rtos_valid[%x]\n", rtos_cmdq.resv.valid.rtos_valid); + aud_debug("[Rtos]rtos_cmdq[%x]\n", rtos_cmdq.param_ptr); + + aud_debug("[Rtos]rtos_cmdq_back2Kernel[%x]\n", rtos_cmdq_back2Kernel.block); + aud_debug("[Rtos]rtos_cmdq_back2Kernel[%x]\n", rtos_cmdq_back2Kernel.ip_id); + aud_debug("[Rtos]rtos_cmdq_back2Kernel[%x]\n", rtos_cmdq_back2Kernel.cmd_id); + aud_debug("[Rtos]rtos_cmdq_back2Kernel[%x]\n", rtos_cmdq_back2Kernel.resv.valid.linux_valid); + aud_debug("[Rtos]rtos_cmdq_back2Kernel[%x]\n", rtos_cmdq_back2Kernel.resv.valid.rtos_valid); + aud_debug("[Rtos]rtos_cmdq_back2Kernel[%x]\n", rtos_cmdq_back2Kernel.param_ptr); + + aud_debug("[Rtos][%s][%d]....flush\n", __func__, __LINE__); + clean_dcache_range(pSspRtosCfg, sizeof(ST_SSP_RTOS_INIT)); + aud_debug("[Rtos][flush_dcache_range][0x%lx][%d]....flush\n",pSspRtosCfg, sizeof(ST_SSP_RTOS_INIT)); + counter += 1; + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + aud_debug("[Rtos][%s][%d]....xxxxxxxcounter[%d]\n", __func__, __LINE__, counter); + aud_debug("[Rtos]keep waiting....\n"); + } else { + //printf("[Rtos][%s][%d]index[%d]not full\n", __func__, __LINE__, index); + //count += 1; + //if (count % 1000000 == 0) { + // printf("[Rtos][%s][%d]out count[%d]index[%d]\n", __func__, __LINE__, count, index); + //} + } + bCheck_input_full = 1; //reset the check flag + + + } while (ret != 0); + #endif + aud_info("[Rtos]out\n"); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK: + { + aud_info("CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK\n"); + ST_CVIAUDIO_MAILBOX_BLOCK *pstAudBlockMailBox = + (ST_CVIAUDIO_MAILBOX_BLOCK *)rtos_cmdq.param_ptr; + AI_TALKVQE_CONFIG_S_RTOS *_pstVqeConfig = NULL; + + inv_dcache_range((uintptr_t)pstAudBlockMailBox, sizeof(ST_CVIAUDIO_MAILBOX_BLOCK)); + aud_debug("CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK phy[0x%x]\n", rtos_cmdq.param_ptr); + if (pstAudBlockMailBox->u64RevMask != CVIAUDIO_RTOS_MAGIC_WORD_USERSPACE_BLOCK_MODE) { + aud_error("[CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK]magic word mismatch[0x%lx]\n", + pstAudBlockMailBox->u64RevMask); + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + clean_dcache_range((uintptr_t)pstAudBlockMailBox, sizeof(ST_CVIAUDIO_MAILBOX_BLOCK)); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + break; + } else + aud_debug("CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK magic word matched\n"); + + _pstVqeConfig = (AI_TALKVQE_CONFIG_S_RTOS *)pstAudBlockMailBox->AinVqeCfgPhy; + inv_dcache_range((uintptr_t)_pstVqeConfig, sizeof(AI_TALKVQE_CONFIG_S_RTOS)); + + printf("SSP_INIT dump-----------------------------------------------------\n"); + printf("para_client_config[%d]\n", _pstVqeConfig->para_client_config); + printf("u32OpenMask[0x%x]\n", _pstVqeConfig->u32OpenMask); + printf("s32WorkSampleRate[%d]\n", _pstVqeConfig->s32WorkSampleRate); + printf("stAecCfg.para_aec_filter_len[%d]\n", _pstVqeConfig->stAecCfg.para_aec_filter_len); + printf("stAecCfg.para_aes_std_thrd[%d]\n", _pstVqeConfig->stAecCfg.para_aes_std_thrd); + printf("stAecCfg.para_aes_supp_coeff[%d]\n", _pstVqeConfig->stAecCfg.para_aes_supp_coeff); + printf("SSP_INIT dump-----------------------------------------------------[end]\n"); + + AI_TALKVQE_CONFIG_S VqeConfig; + AI_TALKVQE_CONFIG_S *pVqeConfigSsp = &VqeConfig; + + pVqeConfigSsp->para_client_config = _pstVqeConfig->para_client_config; + pVqeConfigSsp->u32OpenMask = _pstVqeConfig->u32OpenMask; + pVqeConfigSsp->s32WorkSampleRate = _pstVqeConfig->s32WorkSampleRate; + pVqeConfigSsp->stAecCfg.para_aec_filter_len = _pstVqeConfig->stAecCfg.para_aec_filter_len; + pVqeConfigSsp->stAecCfg.para_aes_std_thrd = _pstVqeConfig->stAecCfg.para_aes_std_thrd; + pVqeConfigSsp->stAecCfg.para_aes_supp_coeff = _pstVqeConfig->stAecCfg.para_aes_supp_coeff; + pVqeConfigSsp->stAnrCfg.para_nr_snr_coeff = _pstVqeConfig->stAnrCfg.para_nr_snr_coeff; + pVqeConfigSsp->stAnrCfg.para_nr_init_sile_time = _pstVqeConfig->stAnrCfg.para_nr_init_sile_time; + pVqeConfigSsp->stAgcCfg.para_agc_max_gain = _pstVqeConfig->stAgcCfg.para_agc_max_gain; + pVqeConfigSsp->stAgcCfg.para_agc_target_high = _pstVqeConfig->stAgcCfg.para_agc_target_high; + pVqeConfigSsp->stAgcCfg.para_agc_target_low = _pstVqeConfig->stAgcCfg.para_agc_target_low; + pVqeConfigSsp->stAgcCfg.para_agc_vad_ena = _pstVqeConfig->stAgcCfg.para_agc_vad_ena; + pVqeConfigSsp->stAecDelayCfg.para_aec_init_filter_len = + _pstVqeConfig->stAecDelayCfg.para_aec_init_filter_len; + pVqeConfigSsp->stAecDelayCfg.para_dg_target = _pstVqeConfig->stAecDelayCfg.para_dg_target; + pVqeConfigSsp->stAecDelayCfg.para_delay_sample = _pstVqeConfig->stAecDelayCfg.para_delay_sample; + pVqeConfigSsp->s32RevMask = _pstVqeConfig->s32RevMask; + pVqeConfigSsp->para_notch_freq = _pstVqeConfig->para_notch_freq; + + if (paudio_ssp_block != NULL) + aud_error("warning paudio_ssp_blcok not Null..\n"); + + paudio_ssp_block = CviAud_Algo_Init(pVqeConfigSsp->u32OpenMask, pVqeConfigSsp); + if (paudio_ssp_block == NULL) { + aud_error("[CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK]paudio_ssp_block failure\n"); + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + clean_dcache_range((uintptr_t)pstAudBlockMailBox, sizeof(ST_CVIAUDIO_MAILBOX_BLOCK)); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + break; + } else + aud_info("CVIAUDIO_RTOS_CMD_SSP_INIT_BLOCK init success!!\n"); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_DEINIT_BLOCK: + { + aud_info("CVIAUDIO_RTOS_CMD_SSP_DEINIT_BLOCK\n"); + if (paudio_ssp_block) { + CviAud_Algo_DeInit(paudio_ssp_block); + paudio_ssp_block = NULL; + } else + aud_error("Error cannot de-init null pt\n"); + aud_info("CVIAUDIO_RTOS_CMD_SSP_DEINIT_BLOCK\n"); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + aud_info("[RTOS]Leaving\n"); + } + break; + case CVIAUDIO_RTOS_CMD_SSP_PROC_BLOCK: + { + aud_debug("CVIAUDIO_RTOS_CMD_SSP_PROC_BLOCK\n"); + int ret = 1; + //short *pvincent;//[v] + + if (!paudio_ssp_block) { + aud_error("Error cannot proc with null paudio_ssp_block\n"); + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + break; + } + ST_CVIAUDIO_BLOCK_FRAME *pstBlockFrm = (ST_CVIAUDIO_BLOCK_FRAME *)rtos_cmdq.param_ptr; + + inv_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + inv_dcache_range((uintptr_t)pstBlockFrm->mic_in_addr, 1280); + inv_dcache_range((uintptr_t)pstBlockFrm->output_addr, 1280); + inv_dcache_range((uintptr_t)pstBlockFrm->ref_in_addr, 1280); + if (pstBlockFrm->u64RevMask != CVIAUDIO_RTOS_MAGIC_WORD_USERSPACE_BLOCK_MODE) { + aud_error("[CVIAUDIO_RTOS_CMD_SSP_PROC_BLOCK]magic word mismatch[0x%lx]\n", + pstBlockFrm->u64RevMask); + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + clean_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + break; + + } else { + #ifdef AUDIO_MEASURE_3A_LOADING + xTimer3AProcStart = xTaskGetTickCount(); + #endif + ret = CviAud_Algo_Process(paudio_ssp_block, + pstBlockFrm->mic_in_addr, + pstBlockFrm->ref_in_addr, + pstBlockFrm->output_addr, + CVIAUDIO_BASIC_AEC_LENGTH); + if (ret < 0) { + aud_error("Error in CviAud_Algo_Process\n"); + rtos_cmdq.param_ptr = CVIAUDIO_RTOS_BLOCK_MODE_FAILURE_FLAG; + } + #ifdef AUDIO_MEASURE_3A_LOADING + //only measure 8K, not support 16K + frame_count++; + xTimer3AProcEnd = xTaskGetTickCount(); + total_diff += xTimer3AProcEnd - xTimer3AProcStart; + if (frame_count == 8000/CVIAUDIO_BASIC_AEC_LENGTH*3) { + printf("total_diff = %ld, cpu = %ld, portTICK_PERIOD_MS=%d\n", + total_diff, + total_diff*portTICK_PERIOD_MS/30, + portTICK_PERIOD_MS); + frame_count = 0; + total_diff = 0; + } + #endif + } + //pvincent = (short *)pstBlockFrm->output_addr; + //printf("CVIAUDIO_RTOS_CMD_SSP_PROC_BLOCK---success[0x%x][0x%x][0x%x]\n", pvincent[0], pvincent[1], pvincent[2]); + clean_dcache_range((uintptr_t)pstBlockFrm, sizeof(ST_CVIAUDIO_BLOCK_FRAME)); + clean_dcache_range((uintptr_t)pstBlockFrm->mic_in_addr, 1280); + clean_dcache_range((uintptr_t)pstBlockFrm->output_addr, 1280); + clean_dcache_range((uintptr_t)pstBlockFrm->ref_in_addr, 1280); + xQueueSend(xQueueAudioCmdqu, &rtos_cmdq, 0U); + aud_info("[RTOS]Leaving\n"); + } + break; + default: + aud_error("[error][rtos][audio_task]unrecognized cmd error[%d]\n", rtos_cmdq.cmd_id); + break; + + } + +LEAVE_AUDIO_RUN_TASK: + //after parsing and operating audio command, return to linux kernel the status or pointer + /* send cmd back to Cmdqu task and send mailbox to linux */ + + //clear_reset the command q old data + _cviaudio_clear_cmdq(&rtos_cmdq); + + } +} diff --git a/freertos/cvitek/task/audio/src/unit_test/incbin.h b/freertos/cvitek/task/audio/src/unit_test/incbin.h new file mode 100755 index 000000000..e5c524f58 --- /dev/null +++ b/freertos/cvitek/task/audio/src/unit_test/incbin.h @@ -0,0 +1,19 @@ +#ifndef __INC_BIN__ +#define __INC_BIN__ +#define _INCBIN(file, sym) \ + __asm__( \ + ".section .rodata\n" \ + ".global " #sym "\n" \ + /*".type " #sym ", %object\n"*/ \ + ".align 8\n" \ + #sym ":\n" \ + ".incbin \"" #file "\"\n" \ + ".size " #sym ", .-" #sym "\n" \ + ".global " #sym "_end\n" \ + ".align 8\n" \ + #sym "_end:\n" \ + ); + +#define INCBIN(file, sym) _INCBIN(file, sym) + +#endif diff --git a/freertos/cvitek/task/audio/src/unit_test/pattern/FE_ht_s_ref_hw_8k_1.wav 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z;S$<)M;d<D!Zd2s_wwm;TI6}7IMKP{u`HafW+C+1sbsc0KD-BSU52~%qS|&Gdq0}r zN3t(OyL(CdVmw(KuJpx^7t<-{L7Oj(cbO-?3^j|J#i(u;dAJUseRZ1RD9+rYTFw|) z{9~qQvK5;5G2fA|=>wL^pETiIGujs=HkqfCR=k-HRf*o1Msq(wZr6*3REB9sSQocJ z%rDR;7v&!#p||SgIC5T5T<TjV7j`&T@It!Bdv1Dl-e;t?HlOeTlwV{_`;7M!`ZDsB z_MwRjoAZ8<DKg|dP8;^%C7c4k)}l-a9PovRPSn+C&yqVoa|_vcQ#%9Ec8Vy%eRSn* lX5deD{=e)0|E~Z4yZ-<0`v1S{|NpN4|GWPG|84#M{{RlQ=o|n5 literal 0 HcmV?d00001 diff --git a/freertos/cvitek/task/audio/src/unit_test/ssp_main.c b/freertos/cvitek/task/audio/src/unit_test/ssp_main.c new file mode 100755 index 000000000..2e0bd9a74 --- /dev/null +++ b/freertos/cvitek/task/audio/src/unit_test/ssp_main.c @@ -0,0 +1,788 @@ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% + *% + *% ssp_main.c + *% Author: Sharon Lee + *% History: + *% Created by Sharon Lee for NR in August, 2019 + *% Add AGC by Sharon Lee in December, 2019 + *% Add Linear Processing AEC by Sharon Lee in April, 2020 + *% Add Nonlinear Processing AES by Sharon Lee in August, 2020 + *% Add Notch Filter and DC Filter by Sharon Lee in April, 2021 + *% Add SPK-path AGC by Sharon Lee in July, 2021 + *% Add DG and Delay by Sharon Lee in November, 2021 + *% Add SPK-path Equalizer by Sharon Lee in January, 2022 + *%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + +/*************************************************************************************/ +/* This example C main file shows how to call entry-point functions and read input signals. */ +/* You must customize this file for your development environment/platform. */ +/* Modify it and integrate it into your own development environment/platform. */ +/* */ +/*************************************************************************************/ + +/* Include files */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include "tmwtypes.h" +#include "mmse_init.h" +#include "mmse.h" +#include "define.h" +#include "struct.h" +#include "agc_init.h" +#include "agc.h" +#include "lpaec.h" +#include "packfft.h" +#include "nlpaes.h" +#include "notch.h" +#include "dc.h" +#include "dg.h" +#include "delay.h" +#include "eq.h" +#include "functrl.h" +#include "ssp_unit_test.h" +#include "incbin.h" + +#define INPUT_FILE_AS_ARG 1 +//#define RTOS_CVIAUDIO_DEBUG_MODE 1 +#ifdef RTOS_CVIAUDIO_DEBUG_MODE +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" +#include "rtos_cmdqu.h" +#endif + + +int customer_option; +INCBIN(FE_WAVE_FILE, fe_wave_input_file) +INCBIN(NE_WAVE_FILE, ne_wave_input_file) + +#ifdef RTOS_CVIAUDIO_DEBUG_MODE +extern QueueHandle_t xQueueCmdqu; +#endif + + +extern unsigned char fe_wave_input_file[]; +extern unsigned char ne_wave_input_file[]; +extern unsigned char fe_wave_input_file_end[]; +extern unsigned char ne_wave_input_file_end[]; +unsigned int fe_wave_input_step = 0; +unsigned int ne_wave_input_step = 0; +unsigned int fe_wave_input_size = 0; +unsigned int ne_wave_input_size = 0; + +short *pfe = NULL; +short *pne = NULL; + +#define CVIAUDIO_SSP_MAIN_UNIT_TEST_MODE 1 +#define CVIAUDIO_SSP_MAIN_FRAME_MODE 0 + +unsigned int count_bytes = 0; +//replace the local to global variable-------------------------------------------------------------------------------> +int return_value = 0; +float fs; /* sampling rate */ +int hopsize = 160; /* input hop size */ +int len; /* window size */ +int len1; /* overlap size */ +int nFFT; +/* Delay History Buffer */ +DelayState *delay_state = NULL; + +/* DG History Buffer */ +static dg_struct dg_obj; + +/* DC Filter History Buffer */ +static dcfilter_struct dc_obj; + +/* Notch Filter History Buffer */ +static qfilter_struct notch_obj; +static int notch_state[4]; + +/* LP AEC History Buffer */ +LinearEchoState *aec_state = NULL; +short filter_length, init_filter_length; + +/* NLP AES History Buffer */ +NonLinearEchoState *aes_state = NULL; +boolean_T st_vad; +float std_thrd; +float aes_supp_coef1; +float aes_supp_coef2; +/* NR History Buffer */ +short x_old[160]; /* input overlap buffer */ +NRState *nr_state = NULL; +boolean_T speech_vad; +float aa, mu; +float frame; +float initial_noise_pow_time; +int nenr_silence_time, nenr_silence_cnt; + +/* AGC History Buffer */ +static agc_struct agc_obj; + +/* Near-end Input/Output Buffer */ +short save_mic_in[320]; +short ne_mic_fixed_in[320]; /* near-end and fixed-point mic input */ +float ne_mic_float_in[320]; /* near-end and floating-point mic input */ +short fe_ref_fixed_in[320]; /* far-end and fixed-point ref input */ +float ne_float_out[160]; /* near-end and floating-point output */ +short ne_fixed_out[160]; /* near-end and fixed-point output */ +float tmp; + +/* For Test */ +short wav_header[44]; +short cond1, cond2, cond3, cond4, cond5, cond6; +int i; +static ssp_para_struct ssp_para_obj; +/* Far-end Input/Output Buffer */ +short fe_fixed_in[160]; /* far-end and fixed-point input */ +short fe_fixed_out[160]; /* far-end and fixed-point output */ + +/* AGC History Buffer in SPK Path */ +static agc_struct spk_agc_obj; + +/* EQ History Buffer in SPK Path */ +static cascaded_iir_struct spk_eq_obj; +static float spk_eq_state[12]; + +short range = 0; +float mut_val = 1.0F; +int SSP_Algorithm_Init(void) +{ + printf("[Rtos]enter[%s]---------------->\n", __func__); + + customer_option = 3;// ht slave + hopsize = 160; /* input hop size */ + len = 2*hopsize; /* window size */ + len1 = len/2; /* overlap size */ + nFFT = 2*len; + printf("pre-rest -----------------go\n"); + if( aec_state != NULL) + LP_AEC_free(aec_state); + if (aec_state != NULL) + NLP_AES_free(aes_state); + if (delay_state != NULL) + delay_free(delay_state); + + printf("reset the global variable----------------------start\n"); + delay_state = NULL; + memset(&dg_obj, 0, sizeof(dg_struct)); + memset(&dc_obj, 0, sizeof(dcfilter_struct)); + memset(¬ch_obj, 0, sizeof(qfilter_struct)); + memset(notch_state, 0,sizeof(int)*4); + if (!aec_state) + memset(aec_state, 0, sizeof(LinearEchoState)); + aec_state = NULL; + filter_length = 0; + init_filter_length = 0; + aes_state =NULL; + st_vad = 0; + std_thrd = 0; + aes_supp_coef1 = 0; + aes_supp_coef2 = 0; + memset(x_old, 0, sizeof(short) * 160); + speech_vad = 0; + frame = 0; + initial_noise_pow_time = 0; + nenr_silence_time = 0; + nenr_silence_cnt = 0; + memset(&agc_obj, 0, sizeof(agc_struct)); + memset(save_mic_in, 0, sizeof(short)*320); + memset(ne_mic_fixed_in, 0, sizeof(short)*320); + memset(ne_mic_float_in, 0, sizeof(float)*320); + memset(fe_ref_fixed_in, 0, sizeof(short)*320); + memset(ne_float_out, 0, sizeof(float)*160); + memset(ne_fixed_out, 0, sizeof(short)*160); + tmp = 0; + printf("reset the global variable-------------------------end\n"); + + + +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ +/*%*/ +/*% SSP Algorithm Parameter */ +/*%*/ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + + + /* SSP algorithm parameter need to be adjusted according to different prototype machine from client */ + /* { 0: default }, { 1: CEOP }, { 2: HT master (ref hw) }, { 3: HT slave (ref hw) }, { 4: ZT (ref sw)} */ + /* { 5: an example of slightly enhanced low frequencies in spk-path equalizer } */ + /* { 6: an example of slightly enhanced high frequencies in spk-path equalizer } */ + ssp_para_obj.para_client_config = 3; /* for choosing client's prototype machine, [0, 6] */ +#if INPUT_FILE_AS_ARG + ssp_para_obj.para_client_config = customer_option; + printf("input_file_as_arg option[%d]\n", ssp_para_obj.para_client_config); +#endif + fe_wave_input_size = fe_wave_input_file_end - fe_wave_input_file; + ne_wave_input_size = ne_wave_input_file_end - ne_wave_input_file; + speech_vad = speech_vad; + /* Assign Parameter Value to SSP Algorithm */ + /* These values of parameters need to be adjusted according to the actual field try on prototype machine of client, these parameters can be pulled out to be API input arguments for SDK */ + if (1 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 60; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 10; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 6; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 1; + ssp_para_obj.para_spk_fun_config = 0; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (2 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 15; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 18; + ssp_para_obj.para_agc_target_low = 66; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 0; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (3 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 15; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 1; + ssp_para_obj.para_aec_filter_len = 2; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 15; + ssp_para_obj.para_agc_target_low = 15; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 0; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (4 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 207; + ssp_para_obj.para_delay_sample = 450; + ssp_para_obj.para_dg_target = 6; + ssp_para_obj.para_aec_init_filter_len = 13; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 1; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (5 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 0; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 2; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 4; + ssp_para_obj.para_spk_eq_freq[0] = 6; ssp_para_obj.para_spk_eq_gain[0] = 43; ssp_para_obj.para_spk_eq_qfactor[0] = 0; + ssp_para_obj.para_spk_eq_freq[1] = 7; ssp_para_obj.para_spk_eq_gain[1] = 38; ssp_para_obj.para_spk_eq_qfactor[1] = 11; + ssp_para_obj.para_spk_eq_freq[2] = 8; ssp_para_obj.para_spk_eq_gain[2] = 39; ssp_para_obj.para_spk_eq_qfactor[2] = 11; + ssp_para_obj.para_spk_eq_freq[3] = 9; ssp_para_obj.para_spk_eq_gain[3] = 37; ssp_para_obj.para_spk_eq_qfactor[3] = 0; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else if (6 == ssp_para_obj.para_client_config) { + ssp_para_obj.para_fun_config = 0; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 2; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 3; + ssp_para_obj.para_spk_eq_freq[0] = 7; ssp_para_obj.para_spk_eq_gain[0] = 42; ssp_para_obj.para_spk_eq_qfactor[0] = 9; + ssp_para_obj.para_spk_eq_freq[1] = 8; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 9; + ssp_para_obj.para_spk_eq_freq[2] = 9; ssp_para_obj.para_spk_eq_gain[2] = 43; ssp_para_obj.para_spk_eq_qfactor[2] = 0; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } else { + ssp_para_obj.para_fun_config = 15; + ssp_para_obj.para_delay_sample = 1; + ssp_para_obj.para_dg_target = 1; + ssp_para_obj.para_aec_init_filter_len = 2; + ssp_para_obj.para_aec_filter_len = 13; + ssp_para_obj.para_aes_std_thrd = 37; + ssp_para_obj.para_aes_supp_coeff = 60; + ssp_para_obj.para_nr_init_sile_time = 0; + ssp_para_obj.para_nr_snr_coeff = 15; + ssp_para_obj.para_agc_max_gain = 0; + ssp_para_obj.para_agc_target_high = 2; + ssp_para_obj.para_agc_target_low = 72; + ssp_para_obj.para_agc_vad_ena = 1; + ssp_para_obj.para_notch_freq = 0; + ssp_para_obj.para_spk_fun_config = 1; + ssp_para_obj.para_spk_agc_max_gain = 0; + ssp_para_obj.para_spk_agc_target_high = 8; + ssp_para_obj.para_spk_agc_target_low = 72; + ssp_para_obj.para_spk_eq_nband = 1; + ssp_para_obj.para_spk_eq_freq[0] = 0; ssp_para_obj.para_spk_eq_gain[0] = 40; ssp_para_obj.para_spk_eq_qfactor[0] = 15; + ssp_para_obj.para_spk_eq_freq[1] = 0; ssp_para_obj.para_spk_eq_gain[1] = 40; ssp_para_obj.para_spk_eq_qfactor[1] = 15; + ssp_para_obj.para_spk_eq_freq[2] = 0; ssp_para_obj.para_spk_eq_gain[2] = 40; ssp_para_obj.para_spk_eq_qfactor[2] = 15; + ssp_para_obj.para_spk_eq_freq[3] = 0; ssp_para_obj.para_spk_eq_gain[3] = 40; ssp_para_obj.para_spk_eq_qfactor[3] = 15; + ssp_para_obj.para_spk_eq_freq[4] = 0; ssp_para_obj.para_spk_eq_gain[4] = 40; ssp_para_obj.para_spk_eq_qfactor[4] = 15; + } + +/*% SSP Algorithm Applied to MIC Path */ +/*% */ +/*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%*/ + /* Get the sampling rate from CODEC configuration if run with system codes */ + //fread(&wav_header[0], 1, 44, fp_test_fe_ref_in); /* wav header */ + //fread(&wav_header[0], 1, 44, fp_test_ne_mic_in); /* wav header */ + + //fs = (float)(wav_header[12]); /* sampling rate recorded in 24th byte with 4-byte length, little endian */ + fs = 8000; + cond1 = ssp_para_obj.para_fun_config & DELAY_ENABLE; + if (cond1) { + delay_para(&ssp_para_obj); + delay_state = delay_init(&ssp_para_obj); + } + + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + DG_para(&dg_obj, &ssp_para_obj); + } + + cond1 = ssp_para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + DC_remover_init(&dc_obj, fs); + } + + cond1 = ssp_para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + notch_para(¬ch_obj, &ssp_para_obj, fs); + notch_init(¬ch_obj, notch_state); + } + + cond1 = ssp_para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = ssp_para_obj.para_fun_config & NLP_AES_ENABLE; + if (cond1 | cond2) { + LP_AEC_para(&ssp_para_obj, &filter_length, &init_filter_length); + aec_state = LP_AEC_init(hopsize, filter_length, init_filter_length, fs); + } + if (cond2) { + NLP_AES_para(&ssp_para_obj, &std_thrd, &aes_supp_coef1, &aes_supp_coef2); + aes_state = NLP_AES_init(hopsize, fs, std_thrd, aes_supp_coef1, aes_supp_coef2); + aes_state->echo_state = aec_state; + } + + if (!(ssp_para_obj.para_fun_config & AGC_ENABLE)) { /* add fool-proof design for parameter configuration */ + ssp_para_obj.para_agc_vad_ena = 0; + } + cond1 = ssp_para_obj.para_fun_config & NR_ENABLE; + cond2 = ssp_para_obj.para_fun_config & AGC_ENABLE; + if (cond1 | (cond2 && ssp_para_obj.para_agc_vad_ena)) { + NR_para(&ssp_para_obj, &aa, &mu); + nr_state = NR_init(hopsize, fs, aa, mu); + } + if (cond2) { + AGC_para(&agc_obj, &ssp_para_obj, 1); + AGC_init(&agc_obj, &ssp_para_obj, fs, hopsize, 1); + } + + speech_vad = true; /* default */ + st_vad = false; /* default */ + frame = 1.0F; /* set initial value here in case of NR off */ + nenr_silence_cnt = 0; + ssp_para_obj.para_nr_init_sile_time = MIN(MAX(ssp_para_obj.para_nr_init_sile_time, 0), 250); + if (fs == 16000.0F) { + initial_noise_pow_time = 14; + nenr_silence_time = ssp_para_obj.para_nr_init_sile_time*2; + } else { + initial_noise_pow_time = 7; + nenr_silence_time = ssp_para_obj.para_nr_init_sile_time; + } + + count_bytes = 0; + printf("[Rtos]leave[%s]---------------->\n", __func__); + //add for test case + range = 0; + mut_val = 1.0F; + + return 1; +} + +/* Function Definitions */ +int SSP_Algorithm(int test_mode, short *pinput, uint64_t pout) +{ + //printf("input_file vvvv[%d][0x%x][0x%x]\n", ssp_para_obj.para_client_config, cond1, cond2); + memset(ne_fixed_out, 0, sizeof(short)*160); + memset(fe_ref_fixed_in, 0, sizeof(short)*160); + for (;;) /* Main Frame Loop in MIC Path */ + { + /* This section of codes have to be replaced by reading the bitstream from system layer in real platform */ +#if 0//TODO: replace by pointer + cond1 = fread(&ne_mic_fixed_in[0], sizeof(short), hopsize, fp_test_ne_mic_in); /* get current near-end frame data */ + cond2 = fread(&fe_ref_fixed_in[0], sizeof(short), hopsize, fp_test_fe_ref_in); /* get current far-end frame data */ +#else + //fill in the data + if (test_mode == CVIAUDIO_SSP_MAIN_UNIT_TEST_MODE) { + pfe = (short *)&fe_wave_input_file[count_bytes]; + pne = (short *)&ne_wave_input_file[count_bytes]; + for (i = 0; i < hopsize; i++) { + //save_mic_in[i] = pne[i]; + //ne_mic_fixed_in[i] = pfe[i]; + //fe_ref_fixed_in[i] = pne[i]; + ne_mic_fixed_in[i] = pne[i]; + fe_ref_fixed_in[i] = pfe[i]; + } + + count_bytes += hopsize * sizeof(short); + //if (count_bytes >= (fe_wave_input_size)/3) { + if (count_bytes >= (fe_wave_input_size)) { + printf("ssp_main unit test reach the end of file ...force break\n"); + return_value = 0; + return return_value; + + } else { + return_value = 1; + } + } else if (test_mode == CVIAUDIO_SSP_MAIN_FRAME_MODE) { + + for (i = 0; i < hopsize; i++) { + ne_mic_fixed_in[i] = pinput[i]; + } + + for (i = hopsize; i < hopsize*2; i++) { + fe_ref_fixed_in[i] = pinput[i]; + } + return_value = 1; + } + + + #endif +#if 0 + cond1 = cond2 = hopsize; //hopsize = 160 samples, total 320 bytes + if ((cond1 != hopsize) | (cond2 != hopsize)) { + cond1 = ssp_para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = ssp_para_obj.para_fun_config & NLP_AES_ENABLE; + cond3 = ssp_para_obj.para_fun_config & NR_ENABLE; + cond4 = ssp_para_obj.para_fun_config & AGC_ENABLE; + cond6 = ssp_para_obj.para_fun_config & DELAY_ENABLE; + if (cond1 | cond2) { + LP_AEC_free(aec_state); + } + if (cond2) { + if (aec_state != NULL) + NLP_AES_free(aes_state); + } + if (cond3 | (cond4 && ssp_para_obj.para_agc_vad_ena)) { + if (nr_state != NULL) + NR_free(nr_state); + } + if (cond6) { + delay_free(delay_state); + } + //fclose(fp_test_ne_mic_in); + //fclose(fp_test_fe_ref_in); + //fclose(fp_test_ne_out); + printf("illegal end of file:force end in [%s][%d]\n", __func__, __LINE__); + return 0; + //goto Pattern_EOF; + } +#endif + if (2 == ssp_para_obj.para_client_config) { + for (i = 0; i < hopsize; i++) { + tmp = (float)(fe_ref_fixed_in[i])/(float)(32768.0F) * 15.84F; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + fe_ref_fixed_in[i] = ROUND_POS(tmp*(short)(32767)); + ne_mic_fixed_in[i] = ROUND_POS(((float)(ne_mic_fixed_in[i])/(float)(32768.0F) * 0.5F)*(short)(32767)); + } + } + + if (!(ssp_para_obj.para_fun_config)) { + for (i = 0; i < hopsize; i++) + ne_fixed_out[i] = ne_mic_fixed_in[i]; /* save MCPS if all off */ + } else { + + /* Delay ref signal, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DELAY_ENABLE; + if (cond1) { + delay_ref(fe_ref_fixed_in, delay_state, hopsize); + } + + /* Apply DG, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + apply_DG(ne_mic_fixed_in, ne_mic_fixed_in, &dg_obj, hopsize); + } + + /* DC filter, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DCREMOVER_ENABLE; + if (cond1) { + DC_remover(ne_mic_fixed_in, ne_mic_fixed_in, &dc_obj, hopsize); + } + + /* Notch filter, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & NOTCH_ENABLE; + if (cond1) { + notch_filter(ne_mic_fixed_in, ne_mic_fixed_in, ¬ch_obj, hopsize); + } + + /* Linear AEC, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & LP_AEC_ENABLE; + cond2 = ssp_para_obj.para_fun_config & NLP_AES_ENABLE; + if (cond1 | cond2) { + LP_AEC(aec_state, ne_mic_fixed_in, fe_ref_fixed_in, ne_fixed_out); + if (cond2) { + for (i = 0; i < hopsize; i++) + aes_state->aes_std_in[i] = ne_mic_fixed_in[i]; + } + for (i = 0; i < hopsize; i++) + ne_mic_fixed_in[i] = ne_fixed_out[i]; + } + + cond3 = ssp_para_obj.para_fun_config & NR_ENABLE; + cond4 = ssp_para_obj.para_fun_config & AGC_ENABLE; + if (!(cond2 | cond3 | cond4)) { + /* Compensate DG, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + compen_DG(ne_mic_fixed_in, ne_mic_fixed_in, &dg_obj, hopsize); + } + for (i = 0; i < hopsize; i++) + ne_fixed_out[i] = ne_mic_fixed_in[i]; /* save MCPS if NR+AES+AGC off */ + } else { + if (cond3 | ssp_para_obj.para_agc_vad_ena) { + /* Stationary NR, frame-by-frame processing */ + if (nenr_silence_cnt >= nenr_silence_time) { + NR(ne_mic_fixed_in, initial_noise_pow_time, &frame, nr_state, &speech_vad, ne_float_out); + } else { + for (i = 0; i < hopsize; i++) { + ne_float_out[i] = 0.0F; + nr_state->x_old[i] = ne_mic_fixed_in[i]; /* update input overlap data */ + } + } + } +//TODO: + if (cond3) { + /* Transform to fixed-point with 16-bit length for output */ + for (i = 0; i < hopsize; i++) { + ne_float_out[i] = MIN(MAX(ne_float_out[i], -1.0F), 1.0F); /* saturation protection to avoid overflow */ + if (ne_float_out[i] < 0.0F) + ne_fixed_out[i] = ROUND_NEG(ne_float_out[i]*(int)(32768)); + else + ne_fixed_out[i] = ROUND_POS(ne_float_out[i]*(short)(32767)); + } + } else { + for (i = 0; i < hopsize; i++) + ne_fixed_out[i] = ne_mic_fixed_in[i]; + } + + /* Nonlinear AES, frame-by-frame processing */ + if (cond2) { + NLP_AES(aes_state, ne_fixed_out, frame, speech_vad); + st_vad = (boolean_T)aes_state->st_vad; + } + + if (2 == ssp_para_obj.para_client_config) { + for (i = 0; i < hopsize; i++) { + tmp = (float)(ne_fixed_out[i])/(float)(32768.0F) * 1.9952F; + tmp = MIN(MAX(tmp, -1.0F), 1.0F); + ne_fixed_out[i] = ROUND_POS(tmp*(short)(32767)); + } + } + + /* Compensate DG, frame-by-frame processing */ + cond1 = ssp_para_obj.para_fun_config & DG_ENABLE; + if (cond1) { + compen_DG(ne_fixed_out, ne_fixed_out, &dg_obj, hopsize); + } + + /* AGC, frame-by-frame processing */ + if (cond4) { + AGC(ne_fixed_out, ne_fixed_out, &agc_obj, &ssp_para_obj, speech_vad, st_vad, nenr_silence_time, nenr_silence_cnt, 1); + } + + } + } + + if (nenr_silence_cnt < nenr_silence_time) + nenr_silence_cnt += 1; + else + nenr_silence_cnt = nenr_silence_time + 1; /* avoid overflow */ + + if (nenr_silence_cnt > nenr_silence_time) { + if (frame < initial_noise_pow_time) + frame += 1; + else + frame = initial_noise_pow_time + 1; + } + + //fwrite(&ne_fixed_out[0], sizeof(short), hopsize, fp_test_ne_out); + + memcpy(pout, ne_fixed_out, sizeof(short)*hopsize); + //memcpy(pout, save_mic_in, sizeof(short)*hopsize); + //memcpy(pout, ne_mic_fixed_in, sizeof(short)*hopsize); + + return return_value; + } + + //Pattern_EOF: + // printf("Test Pattern EOF in MIC Path!\n"); /* EOF, set breakpoint here for VC++ version */ + +} + +#if 0 +#if INPUT_FILE_AS_ARG +static void _ssp_main_usage(void) +{ + printf("-----------------ssp main 20211202 usage -----------------\n"); + printf("=============================================================\n"); + printf("input arg 1: NE file\n"); + printf("input arg 2: FE file\n"); + printf("input arg 3: SPK input test file\n"); + printf("ssp main will produce , near end result and spk result\n"); + printf("=============================================================\n"); +} +#endif + +int main(int argc, char * const argv[]) +{ +#ifndef INPUT_FILE_AS_ARG + (void)argc; + (void)argv; +#else + if (argc < 4) { + printf("Need more input arguements ssp algo 20211202!!!\n"); + _ssp_main_usage(); + return -1; + } +#if 0 +FILE *fp_test_ne_mic_in; +FILE *fp_test_fe_ref_in; +FILE *fp_test_ne_out; +FILE *fp_test_fe_in; +FILE *fp_test_fe_out; + +char *mic_ne_filename; +char *mic_fe_filename; +char *spk_in_filename; +#endif + mic_ne_filename = argv[1]; + if (access(mic_ne_filename, 0) < 0) { + printf("[Error]file name for mic_ne not exist[%s]\n", mic_ne_filename); + return -1; + } + if ((fp_test_ne_mic_in = fopen(mic_ne_filename, "rb")) == NULL) { + printf("[Error]Cannot open input file NE\n"); + return -1; + } + + mic_fe_filename = argv[2]; + if (access(mic_fe_filename, 0) < 0) { + printf("[Error]file name for mic_fe not exist[%s]\n", mic_fe_filename); + return -1; + } + if ((fp_test_fe_ref_in = fopen(mic_fe_filename, "rb")) == NULL) { + printf("[Error]Cannot open input file FE\n"); + return -1; + } + + spk_in_filename = argv[3]; + if (access(spk_in_filename, 0) < 0) { + printf("[Error]file name for SPK IN not exist[%s]\n", spk_in_filename); + return -1; + } + if ((fp_test_fe_in = fopen(spk_in_filename, "rb")) == NULL) { + printf("[Error]Cannot open input file FE for spk\n"); + return -1; + } + //setup the output filename + if ((fp_test_ne_out = fopen("mic_output.pcm", "wb")) == NULL) { + printf("Cannot open output file \n"); + exit(2); + } + + if ((fp_test_fe_out = fopen("spk_output.pcm", "wb")) == NULL) { + printf("Cannot open output file \n"); + exit(2); + } + /* {0: default}, {1: CEOP}, {2: HT master (ref hw)}, {3: HT slave (ref hw)}, {4: ZT (ref sw)} */ + printf("input customer option:\n"); + printf("{0: default}, {1: CEOP}, {2: HT master (ref hw)}, {3: HT slave (ref hw)}, {4: ZT (ref sw)} :\n\t"); + scanf("%d", &customer_option); + printf("Your option is[%d]\n", customer_option); +#endif + + SSP_Algorithm(); + + return 0; +} +#endif + + diff --git a/freertos/cvitek/task/audio/src/unit_test/ssp_unit_test.h b/freertos/cvitek/task/audio/src/unit_test/ssp_unit_test.h new file mode 100644 index 000000000..7b9087093 --- /dev/null +++ b/freertos/cvitek/task/audio/src/unit_test/ssp_unit_test.h @@ -0,0 +1,12 @@ +/* Include files */ +#ifndef _SSP_UNIT_TEST_H_ +#define _SSP_UNIT_TEST_H_ +#include <stdio.h> +#ifdef TYPE_ARM +#include <stdint.h> +#endif + +int SSP_Algorithm(int test_mode, short *pinput, uint64_t pout); +int SSP_Algorithm2(int test_mode, short *pinput, uint64_t pout); +int SSP_Algorithm_Init(void); +#endif diff --git a/freertos/cvitek/task/audio/src/unit_test_arm.tar.gz b/freertos/cvitek/task/audio/src/unit_test_arm.tar.gz new file mode 100644 index 0000000000000000000000000000000000000000..e3a00ffa529f722e27edd7c76363779ebdbc637b GIT binary patch literal 4579232 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a/freertos/cvitek/task/camera/CMakeLists.txt b/freertos/cvitek/task/camera/CMakeLists.txt new file mode 100644 index 000000000..4727576c2 --- /dev/null +++ b/freertos/cvitek/task/camera/CMakeLists.txt @@ -0,0 +1,20 @@ +file(GLOB _SOURCES "src/${RUN_ARCH}/*.c") + +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/cif) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/vi) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/sensor) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/gpio) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +#include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/cif) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/config) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/snsr_i2c) +include_directories(../comm/include) + +add_library(camera STATIC ${_SOURCES}) +install(TARGETS camera DESTINATION lib) + diff --git a/freertos/cvitek/task/camera/include/cam_rtos_cmd.h b/freertos/cvitek/task/camera/include/cam_rtos_cmd.h new file mode 100644 index 000000000..0c0082edf --- /dev/null +++ b/freertos/cvitek/task/camera/include/cam_rtos_cmd.h @@ -0,0 +1,106 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: include/cvi_rtos_camera.h + * Description: + */ + +#ifndef __CVITEK_RTOS_CAMERA_CMD_H__ +#define __CVITEK_RTOS_CAMERA_CMD_H__ + +#include <stdbool.h> +#include <stddef.h> + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +/*---------------------------------------------- + * The common data type + *---------------------------------------------- + */ + +#ifndef loff_t +#define loff_t unsigned short +#define __user +#endif + +struct cvi_cif_ioctl_parm { + unsigned int devno; + unsigned int cmd; + unsigned long arg; +}; + +struct cvi_cif_dbg_hdler_param { + const char __user *user_buf; + size_t count; + loff_t *ppos; +}; + +struct cvi_cam_parm { + unsigned int ViPipe; + unsigned long arg; + unsigned long arg1; + unsigned long arg2; + unsigned long arg3; + unsigned long arg4; +}; + +/*---------------------------------------------- + * definition of cmd + *---------------------------------------------- + */ + +enum { + RTOS_CMD_CAM_EXIT, + + RTOS_CMD_CIF_IOCTL = 10, + RTOS_CMD_CIF_DBG_HDLER, + RTOS_CMD_CIF_END, + + RTOS_CMD_CAM_REG_CB = 20, + RTOS_CMD_CAM_UN_REG_CB, + RTOS_CMD_CAM_SET_BUS_INFO, + RTOS_CMD_CAM_STANDBY, + RTOS_CMD_CAM_RESTART, + RTOS_CMD_CAM_SET_ORIEN, + RTOS_CMD_CAM_W_REG, + RTOS_CMD_CAM_R_REG, + RTOS_CMD_CAM_SET_INIT, + RTOS_CMD_CAM_PATCH_RX_ATTR, + RTOS_CMD_CAM_PATCH_I2C_ADDR, + RTOS_CMD_CAM_GET_RX_ATTR, + RTOS_CMD_CAM_PROBE, + + RTOS_CMD_CAM_EXP_SENSOR_INIT = 40, + RTOS_CMD_CAM_EXP_SENSOR_EXIT, + RTOS_CMD_CAM_EXP_GLOBAL_INIT, + RTOS_CMD_CAM_SET_IMAGE_MODE, + RTOS_CMD_CAM_SET_WDR_MODE, + RTOS_CMD_CAM_GET_ISP_DEFAULT, + RTOS_CMD_CAM_GET_BLC, + RTOS_CMD_CAM_GET_REG_INFO, + + RTOS_CMD_CAM_GET_AE_DEFAULT = 60, + RTOS_CMD_CAM_SET_FPS, + RTOS_CMD_CAM_SET_SLOW_FPS, + RTOS_CMD_CAM_UPDATE_INTTIME, + RTOS_CMD_CAM_UPDATE_GAIN, + RTOS_CMD_CAM_CALC_AGAIN, + RTOS_CMD_CAM_CALC_DGAIN, + RTOS_CMD_CAM_GET_MAX_INTTIME, + RTOS_CMD_CAM_SET_FSWDR_ATTR, +} E_CVITEK_RTOS_CAMERA; + + + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* __cplusplus */ + +#endif /* __CVITEK_RTOS_CAMERA_CMD_H__ */ diff --git a/freertos/cvitek/task/camera/include/cam_task.h b/freertos/cvitek/task/camera/include/cam_task.h new file mode 100644 index 000000000..24bec9c3a --- /dev/null +++ b/freertos/cvitek/task/camera/include/cam_task.h @@ -0,0 +1,4 @@ +#ifndef __CAMERA_TASK_HEADER__ +#define __CAMERA_TASK_HEADER__ + +#endif // end of __CAMERA_TASK_HEADER__ diff --git a/freertos/cvitek/task/camera/src/riscv64/cam_task.c b/freertos/cvitek/task/camera/src/riscv64/cam_task.c new file mode 100644 index 000000000..996c294b0 --- /dev/null +++ b/freertos/cvitek/task/camera/src/riscv64/cam_task.c @@ -0,0 +1,196 @@ +/* Standard includes. */ +#include <stdio.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" +#include "timers.h" +#include "delay.h" +#include "mmio.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" +#include "comm.h" +#include "cvi_type.h" +#include "cvi_math.h" + +// #include "cam_task.h" +#include "cam_rtos_cmd.h" + +#include "cvi_common.h" +#include "cvi_comm_video.h" +#include "cvi_sns_ctrl.h" +#include "cvi_comm_isp.h" +#include "cvi_comm_vi.h" +#include "sample_comm.h" +#include "cvi_vi.h" +#include "cif_uapi.h" + +#include "sensor.h" +#include "cvi_i2c.h" + +static QueueHandle_t gCameraQueHandle; +static QueueHandle_t gQueueCameraCmdqu; + +void prvCameraRunTask(void *pvParameters) +{ + ISP_SNS_OBJ_S *pstSnsObj = NULL; + struct cvi_cam_parm *cam_parm = NULL; + uint32_t ViPipe = 0; + ISP_SENSOR_EXP_FUNC_S stSnsrSensorFunc; + AE_SENSOR_EXP_FUNC_S stSnsrAeFunc; + + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + cmdqu_t rtos_cmdq; + printf("%s:%d run +\n", __FUNCTION__, __LINE__); + + gCameraQueHandle = main_GetMODHandle(E_QUEUE_CAMERA); + gQueueCameraCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + + for (;;) { + xQueueReceive(gCameraQueHandle, &rtos_cmdq, portMAX_DELAY); + printf("prvCameraRunTask ip=%d, cmd=%d, para=%x\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + + if (rtos_cmdq.ip_id != IP_CAMERA) { + printf("Get CMD != IP_CAMERA\n"); + rtos_cmdq.ip_id = -1; + continue; + } + + cam_parm = (struct cvi_cam_parm *) rtos_cmdq.param_ptr; + ViPipe = cam_parm->ViPipe; + pstSnsObj = (ISP_SNS_OBJ_S *) SAMPLE_COMM_ISP_GetSnsObj(ViPipe); + if (!pstSnsObj) { + printf("[RTOS] SAMPLE_COMM_ISP_GetSnsObj = NULL\n"); + continue; + } + + if (rtos_cmdq.cmd_id > RTOS_CMD_CIF_END) { + pstSnsObj->pfnExpSensorCb(&stSnsrSensorFunc); + pstSnsObj->pfnExpAeCb(&stSnsrAeFunc); + } + + switch (rtos_cmdq.cmd_id) { + case RTOS_CMD_CIF_IOCTL: + { + struct cvi_cif_ioctl_parm *cif_parm = (struct cvi_cif_ioctl_parm *) rtos_cmdq.param_ptr; + cif_ioctl(cif_parm->devno, cif_parm->cmd, cif_parm->arg); + break; + } + case RTOS_CMD_CAM_REG_CB: + pstSnsObj->pfnRegisterCallback(ViPipe, + (ALG_LIB_S *) cam_parm->arg, (ALG_LIB_S *) cam_parm->arg1); + break; + case RTOS_CMD_CAM_UN_REG_CB: + pstSnsObj->pfnUnRegisterCallback(ViPipe, + (ALG_LIB_S *) cam_parm->arg, (ALG_LIB_S *) cam_parm->arg1); + break; + case RTOS_CMD_CAM_SET_BUS_INFO: + { + ISP_SNS_COMMBUS_U *pbi = (ISP_SNS_COMMBUS_U *) cam_parm->arg; + pstSnsObj->pfnSetBusInfo(ViPipe, *pbi); + break; + } + case RTOS_CMD_CAM_STANDBY: + pstSnsObj->pfnStandby(ViPipe); + break; + case RTOS_CMD_CAM_RESTART: + pstSnsObj->pfnRestart(ViPipe); + break; + case RTOS_CMD_CAM_SET_ORIEN: + pstSnsObj->pfnMirrorFlip(ViPipe, (ISP_SNS_MIRRORFLIP_TYPE_E) cam_parm->arg); + break; + case RTOS_CMD_CAM_W_REG: + pstSnsObj->pfnWriteReg(ViPipe, (CVI_S32) cam_parm->arg, (CVI_S32) cam_parm->arg1); + break; + case RTOS_CMD_CAM_R_REG: + pstSnsObj->pfnReadReg(ViPipe, (CVI_S32) cam_parm->arg); + break; + case RTOS_CMD_CAM_SET_INIT: + pstSnsObj->pfnSetInit(ViPipe, (ISP_INIT_ATTR_S *) cam_parm->arg); + break; + case RTOS_CMD_CAM_PATCH_RX_ATTR: + pstSnsObj->pfnPatchRxAttr((RX_INIT_ATTR_S *) cam_parm->arg); + break; + case RTOS_CMD_CAM_PATCH_I2C_ADDR: + pstSnsObj->pfnPatchI2cAddr((CVI_S32) cam_parm->arg); + break; + case RTOS_CMD_CAM_GET_RX_ATTR: + pstSnsObj->pfnGetRxAttr(ViPipe, (SNS_COMBO_DEV_ATTR_S *) cam_parm->arg); + break; + case RTOS_CMD_CAM_PROBE: + pstSnsObj->pfnSnsProbe(ViPipe); + break; + + /* ISP_SENSOR_EXP_FUNC_S */ + case RTOS_CMD_CAM_EXP_SENSOR_INIT: + stSnsrSensorFunc.pfn_cmos_sensor_init(ViPipe); + break; + case RTOS_CMD_CAM_EXP_SENSOR_EXIT: + stSnsrSensorFunc.pfn_cmos_sensor_exit(ViPipe); + break; + case RTOS_CMD_CAM_EXP_GLOBAL_INIT: + stSnsrSensorFunc.pfn_cmos_sensor_global_init(ViPipe); + break; + case RTOS_CMD_CAM_SET_IMAGE_MODE: + stSnsrSensorFunc.pfn_cmos_set_image_mode(ViPipe, + (ISP_CMOS_SENSOR_IMAGE_MODE_S *) cam_parm->arg); + break; + case RTOS_CMD_CAM_SET_WDR_MODE: + stSnsrSensorFunc.pfn_cmos_set_wdr_mode(ViPipe, (CVI_U8) cam_parm->arg); + break; + case RTOS_CMD_CAM_GET_ISP_DEFAULT: + stSnsrSensorFunc.pfn_cmos_get_isp_default(ViPipe, (ISP_CMOS_DEFAULT_S *) cam_parm->arg); + break; + case RTOS_CMD_CAM_GET_BLC: + stSnsrSensorFunc.pfn_cmos_get_isp_black_level(ViPipe, + (ISP_CMOS_BLACK_LEVEL_S *) cam_parm->arg); + break; + case RTOS_CMD_CAM_GET_REG_INFO: + stSnsrSensorFunc.pfn_cmos_get_sns_reg_info(ViPipe, + (ISP_SNS_SYNC_INFO_S *) cam_parm->arg); + break; + + /* AE_SENSOR_EXP_FUNC_S */ + case RTOS_CMD_CAM_GET_AE_DEFAULT: + stSnsrAeFunc.pfn_cmos_get_ae_default(ViPipe, (AE_SENSOR_DEFAULT_S *) cam_parm->arg); + break; + case RTOS_CMD_CAM_SET_FPS: + stSnsrAeFunc.pfn_cmos_fps_set(ViPipe, (CVI_FLOAT) cam_parm->arg, + (AE_SENSOR_DEFAULT_S *) cam_parm->arg1); + break; + case RTOS_CMD_CAM_SET_SLOW_FPS: + stSnsrAeFunc.pfn_cmos_slow_framerate_set(ViPipe, (CVI_U32) cam_parm->arg, + (AE_SENSOR_DEFAULT_S *) cam_parm->arg1); + break; + case RTOS_CMD_CAM_UPDATE_INTTIME: + stSnsrAeFunc.pfn_cmos_inttime_update(ViPipe, (CVI_U32 *) cam_parm->arg); + break; + case RTOS_CMD_CAM_UPDATE_GAIN: + stSnsrAeFunc.pfn_cmos_gains_update(ViPipe, + (CVI_U32 *) cam_parm->arg, (CVI_U32 *) cam_parm->arg1); + break; + case RTOS_CMD_CAM_CALC_AGAIN: + stSnsrAeFunc.pfn_cmos_again_calc_table(ViPipe, + (CVI_U32 *) cam_parm->arg, (CVI_U32 *) cam_parm->arg1); + break; + case RTOS_CMD_CAM_CALC_DGAIN: + stSnsrAeFunc.pfn_cmos_dgain_calc_table(ViPipe, + (CVI_U32 *) cam_parm->arg, (CVI_U32 *) cam_parm->arg1); + break; + case RTOS_CMD_CAM_GET_MAX_INTTIME: + stSnsrAeFunc.pfn_cmos_get_inttime_max(ViPipe, (CVI_U16) cam_parm->arg, + (CVI_U32 *) cam_parm->arg1, (CVI_U32 *) cam_parm->arg2, + (CVI_U32 *) cam_parm->arg3, (CVI_U32 *) cam_parm->arg4); + break; + case RTOS_CMD_CAM_SET_FSWDR_ATTR: + stSnsrAeFunc.pfn_cmos_ae_fswdr_attr_set(ViPipe, (AE_FSWDR_ATTR_S *) cam_parm->arg); + break; + } + rtos_cmdq.ip_id = -1; + } +} diff --git a/freertos/cvitek/task/comm/CMakeLists.txt b/freertos/cvitek/task/comm/CMakeLists.txt new file mode 100644 index 000000000..8890ed220 --- /dev/null +++ b/freertos/cvitek/task/comm/CMakeLists.txt @@ -0,0 +1,19 @@ +file(GLOB _SOURCES "src/${RUN_ARCH}/*.c") + +if (CONFIG_FAST_IMAGE_TYPE STRGREATER "0") +add_compile_definitions(FAST_IMAGE_ENABLE) +endif() + +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/spinlock) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/jenc) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/config) + +add_library(comm STATIC ${_SOURCES}) +install(TARGETS comm DESTINATION lib) + diff --git a/freertos/cvitek/task/comm/include/comm.h b/freertos/cvitek/task/comm/include/comm.h new file mode 100644 index 000000000..83403c674 --- /dev/null +++ b/freertos/cvitek/task/comm/include/comm.h @@ -0,0 +1,26 @@ +#ifndef __COMM_HEADER__ +#define __COMM_HEADER__ + +#include "comm_def.h" + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#endif + +extern void prvISPRunTask(void *pvParameters); +extern void prvVcodecRunTask(void *pvParameters); +extern void prvVipRunTask(void *pvParameters); +extern void prvVIRunTask(void *pvParameters); +extern void prvRGNRunTask(void *pvParameters); +extern void prvAudioRunTask(void *pvParameters); +extern void prvCameraRunTask(void *pvParameters); + +QueueHandle_t main_GetMODHandle(QUEUE_HANDLE_E handle_idx); + +/* + * Sensor API + */ +// extern void start_sensor(uint32_t u32SnsId); +extern void start_camera(uint32_t u32SnsId); + +#endif // end of __COMM_HEADER__ diff --git a/freertos/cvitek/task/comm/include/comm_def.h b/freertos/cvitek/task/comm/include/comm_def.h new file mode 100644 index 000000000..5e1cd2b44 --- /dev/null +++ b/freertos/cvitek/task/comm/include/comm_def.h @@ -0,0 +1,21 @@ +#ifndef __COMM_DEF_HEADER__ +#define __COMM_DEF_HEADER__ + +typedef enum _QUEUE_HANDLE_E { + E_QUEUE_ISP, + E_QUEUE_VCODEC, + E_QUEUE_VI, + E_QUEUE_CAMERA, + E_QUEUE_RGN, + E_QUEUE_CMDQU, + E_QUEUE_AUDIO, + E_QUEUE_MAX, +} QUEUE_HANDLE_E; + +#define STOP_CMD_DONE_NONE 0x00 +#define STOP_CMD_DONE_ISP 0x01 +#define STOP_CMD_DONE_VI 0x02 +#define STOP_CMD_DONE_VCODE 0x04 +#define STOP_CMD_DONE_ALL (STOP_CMD_DONE_VI | STOP_CMD_DONE_VCODE) + +#endif // end of __COMM_DEF_HEADER__ diff --git a/freertos/cvitek/task/comm/src/cv1835/comm_main.c b/freertos/cvitek/task/comm/src/cv1835/comm_main.c new file mode 100644 index 000000000..658fbcc65 --- /dev/null +++ b/freertos/cvitek/task/comm/src/cv1835/comm_main.c @@ -0,0 +1,175 @@ +/* Kernel includes. */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +#include "task.h" +#include "semphr.h" +#include "io.h" + +/* Xilinx includes. */ +#include "printf.h" +#include "rtos_queue.h" +#include "rtos_cmdqu.h" +#include "comm.h" + +#define mainQUEUE_LENGTH (1) +#define mainQUEUE_Cmdqu_TASK_PRIORITY (tskIDLE_PRIORITY + 5) +#define mainQUEUE_ISP_TASK_PRIORITY (tskIDLE_PRIORITY + 3) +#define mainQUEUE_Vcodec_TASK_PRIORITY (tskIDLE_PRIORITY + 3) +#define mainQUEUE_Vip_TASK_PRIORITY (tskIDLE_PRIORITY + 3) +#define mainQUEUE_Display_TASK_PRIORITY (tskIDLE_PRIORITY + 3) + +void prvQueueISR(void); +void prvCmdQuRunTask(void *pvParameters); + +QueueHandle_t xQueueIsp; +QueueHandle_t xQueueVcodec; +QueueHandle_t xQueueVip; +QueueHandle_t xQueueDisplay; +QueueHandle_t xQueueCmdqu; + +void main_cvirtos(void) +{ + printf("create cvi task\n"); + /* register prvQueueISR to IPI_8 */ + request_sgirq(8, prvQueueISR, 0, "prvQueueISR"); + xQueueIsp = xQueueCreate(mainQUEUE_LENGTH, sizeof(cmdqu_t)); + xQueueVcodec = xQueueCreate(mainQUEUE_LENGTH, sizeof(cmdqu_t)); + xQueueVip = xQueueCreate(mainQUEUE_LENGTH, sizeof(cmdqu_t)); + xQueueDisplay = xQueueCreate(mainQUEUE_LENGTH, sizeof(cmdqu_t)); + xQueueCmdqu = xQueueCreate(mainQUEUE_LENGTH, sizeof(cmdqu_t)); + + if (xQueueIsp != NULL && xQueueVcodec != NULL && xQueueVip != NULL && + xQueueDisplay != NULL) { + xTaskCreate(prvISPRunTask, "ISP", configMINIMAL_STACK_SIZE, + NULL, mainQUEUE_ISP_TASK_PRIORITY, NULL); + xTaskCreate(prvVcodecRunTask, "Vcodec", + configMINIMAL_STACK_SIZE, NULL, + mainQUEUE_Vcodec_TASK_PRIORITY, NULL); + xTaskCreate(prvVipRunTask, "Vip", configMINIMAL_STACK_SIZE, + NULL, mainQUEUE_Vip_TASK_PRIORITY, NULL); + xTaskCreate(prvDisplayRunTask, "Display", + configMINIMAL_STACK_SIZE, NULL, + mainQUEUE_Display_TASK_PRIORITY, NULL); + xTaskCreate(prvCmdQuRunTask, "CmdQu", configMINIMAL_STACK_SIZE, + NULL, mainQUEUE_Cmdqu_TASK_PRIORITY, NULL); + + /* Start the tasks and timer running. */ + vTaskStartScheduler(); + } +} + +void prvCmdQuRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + + struct rtos_shm_t *shm_para = 0x120000000; + cmdqu_t rtos_cmdq; + size_t malloc_addr; + printf("prvCmdQuRunTask run\n"); + + for (;;) { + xQueueReceive(xQueueCmdqu, &rtos_cmdq, portMAX_DELAY); + printf("prvCmdQuRunTask id=%d cmd=%d para=%lx\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + if (rtos_cmdq.ip_id == IP_SYSTEM) { + switch (rtos_cmdq.cmd_id) { + case 0: + /* RTOS init malloc done */ + memory_init(shm_para); + /* RTOS init queue done */ + //queue_init(shm_para); + /* send command to linux */ + queue_enqueue(&shm_para->rtos_cmd_queue, + &rtos_cmdq); + break; + + case 1: + /* RTOS allocate memory */ + malloc_addr = memory_alloc(rtos_cmdq.param_ptr); + rtos_cmdq.param_ptr = malloc_addr; + /* send command to linux */ + queue_enqueue(&shm_para->rtos_cmd_queue, + &rtos_cmdq); + writel(0x10008, 0x1F01F00); + __iowmb(); + break; + + case 2: + /* RTOS free memory */ + memory_free(rtos_cmdq.param_ptr); + /* send command to linux */ + queue_enqueue(&shm_para->rtos_cmd_queue, + &rtos_cmdq); + break; + + default: + break; + } + } else { + /* send command to linux*/ + queue_enqueue(&shm_para->rtos_cmd_queue, &rtos_cmdq); + writel(0x10008, 0x1F01F00); + __iowmb(); + } + rtos_cmdq.ip_id = -1; + } +} + +void prvQueueISR(void) +{ + printf("prvQueueISR\n"); + struct rtos_shm_t *shm_para = 0x120000000; + queue_t *linux_cmd_queue = (queue_t *)&shm_para->linux_cmd_queue; + // printf("buffer =%lx\n", ((unsigned long)shm_para->linux_cmd_queue.queue_buffer)); + // printf("offset =%lx\n", shm_para->virt_phys_offset); + // printf("queue =%lx\n", linux_cmd_queue); + + while (!queue_is_empty(linux_cmd_queue)) { + /* receive command from linux*/ + cmdqu_t *cmdq; + cmdqu_t rtos_cmdq; + cmdq = queue_peek(linux_cmd_queue); + printf("cmdq id = %lx\n", cmdq->ip_id); + printf("cmdq cmd = %lx\n", cmdq->cmd_id); + printf("cmdq param = %lx\n", cmdq->param_ptr); + + rtos_cmdq.ip_id = cmdq->ip_id; + rtos_cmdq.cmd_id = cmdq->cmd_id; + rtos_cmdq.param_ptr = cmdq->param_ptr; + + static int queue_init_done = 0; + /* + * RTOS run queue_init here because need to run init, + * before using queue_dequeue & queue_enqueue function. + */ + if (!queue_init_done) { + queue_init(shm_para); + queue_init_done = 1; + } + + queue_dequeue(linux_cmd_queue); + switch (rtos_cmdq.ip_id) { + case IP_ISP: + //if(!xQueueIsQueueFullFromISR(xQueueIsp)) + xQueueSendFromISR(xQueueIsp, &rtos_cmdq, 0U); + //else + // printf("ISP Queue is full\n"); + break; + case IP_VCODEC: + xQueueSendFromISR(xQueueVcodec, &rtos_cmdq, 0U); + break; + case IP_VIP: + xQueueSendFromISR(xQueueVip, &rtos_cmdq, 0U); + break; + case IP_DISPLAY: + xQueueSendFromISR(xQueueDisplay, &rtos_cmdq, 0U); + break; + case IP_SYSTEM: + xQueueSendFromISR(xQueueCmdqu, &rtos_cmdq, 0U); + break; + default: + break; + } + } +} diff --git a/freertos/cvitek/task/comm/src/riscv64/comm_main.c b/freertos/cvitek/task/comm/src/riscv64/comm_main.c new file mode 100644 index 000000000..70a6b8f22 --- /dev/null +++ b/freertos/cvitek/task/comm/src/riscv64/comm_main.c @@ -0,0 +1,442 @@ +/* Standard includes. */ +#include <stdio.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" +#include "mmio.h" +#include "delay.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" +#include "fast_image.h" +#include "cvi_mailbox.h" +#include "intr_conf.h" +#include "top_reg.h" +#include "memmap.h" + +#include "comm.h" +#include "cvi_spinlock.h" +#include "jenc.h" + +//#define __DEBUG__ + +#ifdef __DEBUG__ +#define debug_printf printf +#else +#define debug_printf(...) +#endif + +extern struct transfer_config_t transfer_config; +struct trace_snapshot_t snapshot; + +typedef struct _TASK_CTX_S { + char name[32]; + u16 stack_size; + UBaseType_t priority; + void (*runTask)(void *pvParameters); + u8 queLength; + QueueHandle_t queHandle; +} TASK_CTX_S; + +/**************************************************************************** + * Function prototypes + ****************************************************************************/ +void prvQueueISR(void); +void prvCmdQuRunTask(void *pvParameters); + +/**************************************************************************** + * Global parameters + ****************************************************************************/ +TASK_CTX_S gTaskCtx[E_QUEUE_MAX] = { + { + .name = "ISP", + .stack_size = configMINIMAL_STACK_SIZE * 8, + .priority = tskIDLE_PRIORITY + 3, +#ifndef FAST_IMAGE_ENABLE + .runTask = NULL, + .queLength = 1, + .queHandle = NULL, +#else + .runTask = prvISPRunTask, + .queLength = 10, + .queHandle = NULL, +#endif + }, + { + .name = "VCODEC", + .stack_size = configMINIMAL_STACK_SIZE, + .priority = tskIDLE_PRIORITY + 3, +#ifndef FAST_IMAGE_ENABLE + .runTask = NULL, + .queLength = 1, + .queHandle = NULL, +#else + .runTask = prvVcodecRunTask, + .queLength = 10, + .queHandle = NULL, +#endif + }, + { + .name = "VI", + .stack_size = configMINIMAL_STACK_SIZE, + .priority = tskIDLE_PRIORITY + 3, +#ifndef FAST_IMAGE_ENABLE + .runTask = NULL, + .queLength = 1, + .queHandle = NULL, +#else + .runTask = prvVIRunTask, + .queLength = 10, + .queHandle = NULL, +#endif + }, + { + .name = "CAMERA", + .stack_size = configMINIMAL_STACK_SIZE, + .priority = tskIDLE_PRIORITY + 3, +#ifndef FAST_IMAGE_ENABLE + .runTask = NULL, + .queLength = 1, + .queHandle = NULL, +#else + .runTask = prvCameraRunTask, + .queLength = 10, + .queHandle = NULL, +#endif + }, + { + .name = "RGN", + .stack_size = configMINIMAL_STACK_SIZE, + .priority = tskIDLE_PRIORITY + 3, + .runTask = prvRGNRunTask, + .queLength = 10, + .queHandle = NULL, + }, + { + .name = "CMDQU", + .stack_size = configMINIMAL_STACK_SIZE, + .priority = tskIDLE_PRIORITY + 5, + .runTask = prvCmdQuRunTask, + .queLength = 30, + .queHandle = NULL, + }, + { + .name = "AUDIO", + .stack_size = configMINIMAL_STACK_SIZE*15, + .priority = tskIDLE_PRIORITY + 3, + .runTask = prvAudioRunTask, + .queLength = 10, + .queHandle = NULL, + }, +}; + +volatile struct mailbox_set_register *mbox_reg; +volatile struct mailbox_done_register *mbox_done_reg; +volatile unsigned long *mailbox_context; // mailbox buffer context is 64 Bytess + +/**************************************************************************** + * Function definitions + ****************************************************************************/ +QueueHandle_t main_GetMODHandle(QUEUE_HANDLE_E handle_idx) +{ + if (handle_idx >= E_QUEUE_MAX) + return NULL; + + return gTaskCtx[handle_idx].queHandle; +} + +void main_create_tasks(void) +{ + u8 i = 0; + +#define TASK_INIT(_idx) \ +do { \ + gTaskCtx[_idx].queHandle = xQueueCreate(gTaskCtx[_idx].queLength, sizeof(cmdqu_t)); \ + if (gTaskCtx[_idx].queHandle != NULL && gTaskCtx[_idx].runTask != NULL) { \ + xTaskCreate(gTaskCtx[_idx].runTask, gTaskCtx[_idx].name, gTaskCtx[_idx].stack_size, \ + NULL, gTaskCtx[_idx].priority, NULL); \ + } \ +} while(0) + + for (; i < ARRAY_SIZE(gTaskCtx); i++) { + TASK_INIT(i); + } +} + +DEFINE_CVI_SPINLOCK(mailbox_lock, SPIN_MBOX); + +void main_cvirtos(void) +{ + printf("create cvi task\n"); + + request_irq(MBOX_INT_C906_2ND, prvQueueISR, 0, "mailbox", (void *)0); + +#ifdef FAST_IMAGE_ENABLE + start_camera(0); +#endif + + main_create_tasks(); + + /* Start the tasks and timer running. */ + vTaskStartScheduler(); + + /* If all is well, the scheduler will now be running, and the following + line will never be reached. If the following line does execute, then + there was either insufficient FreeRTOS heap memory available for the idle + and/or timer tasks to be created, or vTaskStartScheduler() was called from + User mode. See the memory management section on the FreeRTOS web site for + more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The + mode from which main() is called is set in the C start up code and must be + a privileged mode (not user mode). */ + for (;;) + ; +} + +#ifdef FAST_IMAGE_ENABLE +extern JPEG_PIC encoded_pics[MAX_JPEG_NUM]; +#endif +void prvCmdQuRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + + cmdqu_t rtos_cmdq; + cmdqu_t *cmdq; + cmdqu_t *rtos_cmdqu_t; + static int stop_ip = 0; + int ret = 0; + int flags; + int valid; + int send_to_cpu = SEND_TO_CPU1; + + unsigned int reg_base = MAILBOX_REG_BASE; + + /* set mcu_status to type1 running*/ + transfer_config.mcu_status = MCU_STATUS_RTOS_T1_RUNNING; + + if (transfer_config.conf_magic == C906_MAGIC_HEADER) + send_to_cpu = SEND_TO_CPU1; + else if (transfer_config.conf_magic == CA53_MAGIC_HEADER) + send_to_cpu = SEND_TO_CPU0; + /* to compatible code with linux side */ + cmdq = &rtos_cmdq; + mbox_reg = (struct mailbox_set_register *) reg_base; + mbox_done_reg = (struct mailbox_done_register *) (reg_base + 2); + mailbox_context = (unsigned long *) (MAILBOX_REG_BUFF); + + cvi_spinlock_init(); + printf("prvCmdQuRunTask run\n"); + + for (;;) { + xQueueReceive(gTaskCtx[E_QUEUE_CMDQU].queHandle, &rtos_cmdq, portMAX_DELAY); + + switch (rtos_cmdq.cmd_id) { +#if ( configUSE_TRACE_FACILITY == 1 ) + case SYS_CMD_INFO_TRACE_SNAPSHOT_START: + debug_printf("SYS_CMD_INFO_TRACE_SNAPSHOT_START\n"); + vTraceEnable(TRC_START); + break; + case SYS_CMD_INFO_TRACE_SNAPSHOT_STOP: + snapshot.ptr = xTraceGetTraceBuffer(); + snapshot.size = uiTraceGetTraceBufferSize(); + snapshot.type = 0; + rtos_cmdq.param_ptr = &snapshot; + vTraceStop(); + flush_dcache_range(&snapshot, sizeof (struct trace_snapshot_t)); + flush_dcache_range(snapshot.ptr, snapshot.size); + debug_printf("SYS_CMD_INFO_TRACE_SNAPSHOT_STOP PA =%lx\n", &snapshot); + debug_printf("SYS_CMD_INFO_TRACE_SNAPSHOT_STOP ptr =%lx\n", snapshot.ptr); + debug_printf("SYS_CMD_INFO_TRACE_SNAPSHOT_STOP size =%lx\n", snapshot.size); + goto send_label; + break; +#endif + case SYS_CMD_INFO_DUMP_JPG: + if (rtos_cmdq.param_ptr >= MAX_JPEG_NUM) { + printf("SYS_CMD_INFO_DUMP_JPG idx = %d, set idx to 0\n", rtos_cmdq.param_ptr); + rtos_cmdq.param_ptr = 0; + } + #ifdef FAST_IMAGE_ENABLE + rtos_cmdq.param_ptr = &encoded_pics[rtos_cmdq.param_ptr]; + #else + rtos_cmdq.param_ptr = 0x0; + #endif + goto send_label; + break; + case SYS_CMD_INFO_DUMP_EN: + dump_uart_enable(); + break; + case SYS_CMD_INFO_DUMP_DIS: + dump_uart_disable(); + break; + case SYS_CMD_INFO_DUMP_MSG: + /* SYS_CMD_INFO_DUMP_MSG is block mode*/ + rtos_cmdq.cmd_id = SYS_CMD_INFO_DUMP_MSG; + rtos_cmdq.param_ptr = (unsigned int) dump_uart_msg(); + goto send_label; + break; + case SYS_CMD_INFO_LINUX_INIT_DONE: + rtos_cmdq.cmd_id = SYS_CMD_INFO_RTOS_INIT_DONE; + rtos_cmdq.param_ptr = &transfer_config; + goto send_label; + break; + case SYS_CMD_INFO_STOP_ISR: + stop_ip = 0; + rtos_cmdq.cmd_id = SYS_CMD_INFO_STOP_ISR; + rtos_cmdq.ip_id = IP_VI; + xQueueSend(gTaskCtx[E_QUEUE_VI].queHandle, &rtos_cmdq, 0U); + break; + case SYS_CMD_INFO_STOP_ISR_DONE: + // stop interrupt in order to avoid losing frame + if (rtos_cmdq.ip_id == IP_VI) { + stop_ip |= STOP_CMD_DONE_VI; + rtos_cmdq.ip_id = IP_VCODEC; + rtos_cmdq.cmd_id = SYS_CMD_INFO_STOP_ISR; + xQueueSend(gTaskCtx[E_QUEUE_VCODEC].queHandle, &rtos_cmdq, 0U); + break; + } + if (rtos_cmdq.ip_id == IP_VCODEC) + stop_ip |= STOP_CMD_DONE_VCODE; + if (stop_ip != STOP_CMD_DONE_ALL) + break; + else { + // all isr of ip is disabled, and send msg back to linux + rtos_cmdq.ip_id = IP_SYSTEM; + } + case SYS_CMD_INFO_LINUX: + default: +send_label: + /* used to send command to linux*/ + rtos_cmdqu_t = (cmdqu_t *) mailbox_context; + + debug_printf("RTOS_CMDQU_SEND\n"); + debug_printf("ip_id=%d cmd_id=%d param_ptr=%x\n", cmdq->ip_id, cmdq->cmd_id, (unsigned int)cmdq->param_ptr); + debug_printf("mailbox_context = %x\n", mailbox_context); + debug_printf("linux_cmdqu_t = %x\n", rtos_cmdqu_t); + debug_printf("cmdq->ip_id = %d\n", cmdq->ip_id); + debug_printf("cmdq->cmd_id = %d\n", cmdq->cmd_id); + debug_printf("cmdq->block = %d\n", cmdq->block); + debug_printf("cmdq->para_ptr = %x\n", cmdq->param_ptr); + + drv_spin_lock_irqsave(&mailbox_lock, flags); + if (flags == MAILBOX_LOCK_FAILED) { + printf("[%s][%d] drv_spin_lock_irqsave failed! ip_id = %d , cmd_id = %d\n" , cmdq->ip_id , cmdq->cmd_id); + break; + } + + for (valid = 0; valid < MAILBOX_MAX_NUM; valid++) { + if (rtos_cmdqu_t->resv.valid.linux_valid == 0 && rtos_cmdqu_t->resv.valid.rtos_valid == 0) { + // mailbox buffer context is 4 bytes write access + int *ptr = (int *)rtos_cmdqu_t; + + cmdq->resv.valid.rtos_valid = 1; + *ptr = ((cmdq->ip_id << 0) | (cmdq->cmd_id << 8) | (cmdq->block << 15) | + (cmdq->resv.valid.linux_valid << 16) | + (cmdq->resv.valid.rtos_valid << 24)); + rtos_cmdqu_t->param_ptr = cmdq->param_ptr; + debug_printf("rtos_cmdqu_t->linux_valid = %d\n", rtos_cmdqu_t->resv.valid.linux_valid); + debug_printf("rtos_cmdqu_t->rtos_valid = %d\n", rtos_cmdqu_t->resv.valid.rtos_valid); + debug_printf("rtos_cmdqu_t->ip_id =%x %d\n", &rtos_cmdqu_t->ip_id, rtos_cmdqu_t->ip_id); + debug_printf("rtos_cmdqu_t->cmd_id = %d\n", rtos_cmdqu_t->cmd_id); + debug_printf("rtos_cmdqu_t->block = %d\n", rtos_cmdqu_t->block); + debug_printf("rtos_cmdqu_t->param_ptr addr=%x %x\n", &rtos_cmdqu_t->param_ptr, rtos_cmdqu_t->param_ptr); + debug_printf("*ptr = %x\n", *ptr); + // clear mailbox + mbox_reg->cpu_mbox_set[send_to_cpu].cpu_mbox_int_clr.mbox_int_clr = (1 << valid); + // trigger mailbox valid to rtos + mbox_reg->cpu_mbox_en[send_to_cpu].mbox_info |= (1 << valid); + mbox_reg->mbox_set.mbox_set = (1 << valid); + break; + } + rtos_cmdqu_t++; + } + drv_spin_unlock_irqrestore(&mailbox_lock, flags); + if (valid >= MAILBOX_MAX_NUM) { + printf("No valid mailbox is available\n"); + return -1; + } + break; + } + } +} + +void prvQueueISR(void) +{ + //printf("prvQueueISR\n"); + + unsigned char set_val; +// unsigned char done_val; + unsigned char valid_val; + int i; + cmdqu_t *cmdq; + BaseType_t YieldRequired = pdFALSE; + + set_val = mbox_reg->cpu_mbox_set[RECEIVE_CPU].cpu_mbox_int_int.mbox_int; + /* Now, we do not implement info back feature */ + // done_val = mbox_done_reg->cpu_mbox_done[RECEIVE_CPU].cpu_mbox_int_int.mbox_int; + + if (set_val) { + for(i = 0; i < MAILBOX_MAX_NUM; i++) { + valid_val = set_val & (1 << i); + + if (valid_val) { + cmdqu_t rtos_cmdq; + cmdq = (cmdqu_t *)(mailbox_context) + i; + + debug_printf("mailbox_context =%x\n", mailbox_context); + debug_printf("sizeof mailbox_context =%x\n", sizeof(cmdqu_t)); + /* mailbox buffer context is send from linux, clear mailbox interrupt */ + mbox_reg->cpu_mbox_set[RECEIVE_CPU].cpu_mbox_int_clr.mbox_int_clr = valid_val; + // need to disable enable bit + mbox_reg->cpu_mbox_en[RECEIVE_CPU].mbox_info &= ~valid_val; + + // copy cmdq context (8 bytes) to buffer ASAP + *((unsigned long *) &rtos_cmdq) = *((unsigned long *)cmdq); + /* need to clear mailbox interrupt before clear mailbox buffer */ + *((unsigned long*) cmdq) = 0; + + /* mailbox buffer context is send from linux*/ + if (rtos_cmdq.resv.valid.linux_valid == 1) { + debug_printf("cmdq=%x\n", cmdq); + debug_printf("cmdq->ip_id =%d\n", rtos_cmdq.ip_id); + debug_printf("cmdq->cmd_id =%d\n", rtos_cmdq.cmd_id); + debug_printf("cmdq->param_ptr =%x\n", rtos_cmdq.param_ptr); + debug_printf("cmdq->block =%x\n", rtos_cmdq.block); + debug_printf("cmdq->linux_valid =%d\n", rtos_cmdq.resv.valid.linux_valid); + debug_printf("cmdq->rtos_valid =%x\n", rtos_cmdq.resv.valid.rtos_valid); + switch (rtos_cmdq.ip_id) { + case IP_ISP: + xQueueSendFromISR(gTaskCtx[E_QUEUE_ISP].queHandle, &rtos_cmdq, &YieldRequired); + break; + case IP_VCODEC: + xQueueSendFromISR(gTaskCtx[E_QUEUE_VCODEC].queHandle, &rtos_cmdq, &YieldRequired); + break; + case IP_VI: + xQueueSendFromISR(gTaskCtx[E_QUEUE_VI].queHandle, &rtos_cmdq, &YieldRequired); + break; + case IP_RGN: + xQueueSendFromISR(gTaskCtx[E_QUEUE_RGN].queHandle, &rtos_cmdq, &YieldRequired); + break; + case IP_AUDIO: + xQueueSendFromISR(gTaskCtx[E_QUEUE_AUDIO].queHandle, &rtos_cmdq, &YieldRequired); + break; + case IP_SYSTEM: + xQueueSendFromISR(gTaskCtx[E_QUEUE_CMDQU].queHandle, &rtos_cmdq, &YieldRequired); + break; + case IP_CAMERA: + xQueueSendFromISR(gTaskCtx[E_QUEUE_CAMERA].queHandle, &rtos_cmdq, &YieldRequired); + break; + default: + printf("unknown ip_id =%d cmd_id=%d\n", rtos_cmdq.ip_id, rtos_cmdq.cmd_id); + break; + } + portYIELD_FROM_ISR(YieldRequired); + } else + printf("rtos cmdq is not valid %d, ip=%d , cmd=%d\n", + rtos_cmdq.resv.valid.rtos_valid, rtos_cmdq.ip_id, rtos_cmdq.cmd_id); + } + } + } +} diff --git a/freertos/cvitek/task/demo/Blinky_Demo/CMakeLists.txt b/freertos/cvitek/task/demo/Blinky_Demo/CMakeLists.txt new file mode 100644 index 000000000..c87d4a7cd --- /dev/null +++ b/freertos/cvitek/task/demo/Blinky_Demo/CMakeLists.txt @@ -0,0 +1,13 @@ +file(GLOB _SOURCES "*.c") + +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__BUILD_RTOS_KERNEL__") + +include_directories(src) +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) + +add_library(demo STATIC ${_SOURCES}) +install(TARGETS demo DESTINATION lib) + diff --git a/freertos/cvitek/task/demo/Blinky_Demo/main_blinky.c b/freertos/cvitek/task/demo/Blinky_Demo/main_blinky.c new file mode 100644 index 000000000..6039e4274 --- /dev/null +++ b/freertos/cvitek/task/demo/Blinky_Demo/main_blinky.c @@ -0,0 +1,187 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/****************************************************************************** + * NOTE 1: This project provides two demo applications. A simple blinky + * style project, and a more comprehensive test and demo application. The + * RUN_TYPE in build.sh setting in main.c is used to select between the two. + * See the notes on using RUN_TYPE in build.sh where it is defined below. + * + * NOTE 2: This file only contains the source code that is not specific to + * either the simply blinky or full demos - this includes initialisation code + * and callback functions. + * + * NOTE 3: This project builds the FreeRTOS source code, so is expecting the + * BSP project to be configured as a 'standalone' bsp project rather than a + * 'FreeRTOS' bsp project. However the BSP project MUST still be build with + * the FREERTOS_BSP symbol defined (-DFREERTOS_BSP must be added to the + * command line in the BSP configuration). + ****************************************************************************** + * + * main_blinky() creates one queue, and two tasks. It then starts the + * scheduler. + * + * The Queue Send Task: + * The queue send task is implemented by the prvQueueSendTask() function in + * this file. prvQueueSendTask() sits in a loop that causes it to repeatedly + * block for 200 milliseconds, before sending the value 100 to the queue that + * was created within main_blinky(). Once the value is sent, the task loops + * back around to block for another 200 milliseconds...and so on. + * + * The Queue Receive Task: + * The queue receive task is implemented by the prvQueueReceiveTask() function + * in this file. prvQueueReceiveTask() sits in a loop where it repeatedly + * blocks on attempts to read data from the queue that was created within + * main_blinky(). When data is received, the task checks the value of the + * data, and if the value equals the expected 100, outputs a message to the + * UART. The 'block time' parameter passed to the queue receive function + * specifies that the task should be held in the Blocked state indefinitely to + * wait for data to be available on the queue. The queue receive task will only + * leave the Blocked state when the queue send task writes to the queue. As the + * queue send task writes to the queue every 200 milliseconds, the queue receive + * task leaves the Blocked state every 200 milliseconds, and therefore outputs + * a message every 200 milliseconds. + */ + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* Xilinx includes. */ +#include "printf.h" +/* Priorities at which the tasks are created. */ +#define mainQUEUE_RECEIVE_TASK_PRIORITY (tskIDLE_PRIORITY + 2) +#define mainQUEUE_SEND_TASK_PRIORITY (tskIDLE_PRIORITY + 1) + +/* The rate at which data is sent to the queue. The 200ms value is converted +to ticks using the portTICK_PERIOD_MS constant. */ +#define mainQUEUE_SEND_FREQUENCY_MS pdMS_TO_TICKS(5000) + +/* The number of items the queue can hold. This is 1 as the receive task +will remove items as they are added, meaning the send task should always find +the queue empty. */ +#define mainQUEUE_LENGTH (1) + +/*-----------------------------------------------------------*/ + +/* + * The tasks as described in the comments at the top of this file. + */ +static void prvQueueReceiveTask(void *pvParameters); +static void prvQueueSendTask(void *pvParameters); + +/*-----------------------------------------------------------*/ + +/* The queue used by both tasks. */ +static QueueHandle_t xQueue = NULL; + +/*-----------------------------------------------------------*/ + +void main_blinky(void) +{ + /* Create the queue. */ + xQueue = xQueueCreate(mainQUEUE_LENGTH, sizeof(uint32_t)); + + if (xQueue != NULL) { + /* Start the two tasks as described in the comments at the top of this + file. */ + xTaskCreate( + prvQueueReceiveTask, /* The function that implements the task. */ + "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */ + configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */ + NULL, /* The parameter passed to the task - not used in this case. */ + mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */ + NULL); /* The task handle is not required, so NULL is passed. */ + + xTaskCreate(prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, + NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL); + + /* Start the tasks and timer running. */ + vTaskStartScheduler(); + } + + /* If all is well, the scheduler will now be running, and the following + line will never be reached. If the following line does execute, then + there was either insufficient FreeRTOS heap memory available for the idle + and/or timer tasks to be created, or vTaskStartScheduler() was called from + User mode. See the memory management section on the FreeRTOS web site for + more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The + mode from which main() is called is set in the C start up code and must be + a privileged mode (not user mode). */ + for (;;) + ; +} + +/*-----------------------------------------------------------*/ +static void prvQueueSendTask(void *pvParameters) +{ + TickType_t xNextWakeTime; + const uint32_t ulValueToSend = 100UL; + + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for (;;) { + /* Place this task in the blocked state until it is time to run again. */ + vTaskDelayUntil(&xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS); + + /* Send to the queue - causing the queue receive task to unblock and + toggle the LED. 0 is used as the block time so the sending operation + will not block - it shouldn't need to block as the queue should always + be empty at this point in the code. */ + xQueueSend(xQueue, &ulValueToSend, 0U); + } +} +/*-----------------------------------------------------------*/ + +static void prvQueueReceiveTask(void *pvParameters) +{ + uint32_t ulReceivedValue; + const uint32_t ulExpectedValue = 100UL; + + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + + for (;;) { + /* Wait until something arrives in the queue - this task will block + indefinitely provided INCLUDE_vTaskSuspend is set to 1 in + FreeRTOSConfig.h. */ + xQueueReceive(xQueue, &ulReceivedValue, portMAX_DELAY); + + /* To get here something must have been received from the queue, but is + it the expected value? If it is, toggle the LED. */ + if (ulReceivedValue == ulExpectedValue) { + printf("100 received\r\n"); + ulReceivedValue = 0U; + } + } +} +/*-----------------------------------------------------------*/ diff --git a/freertos/cvitek/task/demo/Common/Minimal/AbortDelay.c b/freertos/cvitek/task/demo/Common/Minimal/AbortDelay.c new file mode 100644 index 000000000..542b4a412 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/AbortDelay.c @@ -0,0 +1,760 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This file contains some test scenarios that ensure tasks respond correctly + * to xTaskAbortDelay() calls. It also ensures tasks return the correct state + * of eBlocked when blocked indefinitely in both the case where a task is + * blocked on an object and when a task is blocked on a notification. + */ + +/* Standard includes. */ +#include "limits.h" + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" +#include "event_groups.h" +#include "stream_buffer.h" + +/* Demo includes. */ +#include "AbortDelay.h" + +/* This file can only be used if the functionality it tests is included in the +build. Remove the whole file if this is not the case. */ +#if (INCLUDE_xTaskAbortDelay == 1) + +#if (INCLUDE_xTaskGetHandle != 1) +#error This test file uses the xTaskGetHandle() API function so INCLUDE_xTaskGetHandle must be set to 1 in FreeRTOSConfig.h. +#endif + +/* Task priorities. Allow these to be overridden. */ +#ifndef abtCONTROLLING_PRIORITY +#define abtCONTROLLING_PRIORITY (configMAX_PRIORITIES - 3) +#endif + +#ifndef abtBLOCKING_PRIORITY +#define abtBLOCKING_PRIORITY (configMAX_PRIORITIES - 2) +#endif + +/* The tests that are performed. */ +#define abtNOTIFY_WAIT_ABORTS 0 +#define abtNOTIFY_TAKE_ABORTS 1 +#define abtDELAY_ABORTS 2 +#define abtDELAY_UNTIL_ABORTS 3 +#define abtSEMAPHORE_TAKE_ABORTS 4 +#define abtEVENT_GROUP_ABORTS 5 +#define abtQUEUE_SEND_ABORTS 6 +#define abtSTREAM_BUFFER_RECEIVE 7 +#define abtMAX_TESTS 8 + +/*-----------------------------------------------------------*/ + +/* + * The two test tasks. The controlling task specifies which test to executed. + * More information is provided in the comments within the tasks. + */ +static void prvControllingTask(void *pvParameters); +static void prvBlockingTask(void *pvParameters); + +/* + * Test functions called by the blocking task. Each function follows the same + * pattern, but the way the task blocks is different in each case. + * + * In each function three blocking calls are made. The first and third + * blocking call is expected to time out, while the middle blocking call is + * expected to be aborted by the controlling task half way through the block + * time. + */ +static void prvTestAbortingTaskNotifyWait(void); +static void prvTestAbortingTaskNotifyTake(void); +static void prvTestAbortingTaskDelay(void); +static void prvTestAbortingTaskDelayUntil(void); +static void prvTestAbortingSemaphoreTake(void); +static void prvTestAbortingEventGroupWait(void); +static void prvTestAbortingQueueSend(void); +static void prvTestAbortingStreamBufferReceive(void); + +/* + * Performs a few tests to cover code paths not otherwise covered by the continuous + * tests. + */ +static void prvPerformSingleTaskTests(void); + +/* + * Checks the amount of time a task spent in the Blocked state is within the + * expected bounds. + */ +static void +prvCheckExpectedTimeIsWithinAnAcceptableMargin(TickType_t xStartTime, + TickType_t xExpectedBlockTime); + +/*-----------------------------------------------------------*/ + +/* Used to ensure that tasks are still executing without error. */ +static volatile BaseType_t xControllingCycles = 0, xBlockingCycles = 0; +static volatile BaseType_t xErrorOccurred = pdFALSE; + +/* Each task needs to know the other tasks handle so they can send signals to +each other. The handle is obtained from the task's name. */ +static const char *pcControllingTaskName = "AbtCtrl", + *pcBlockingTaskName = "AbtBlk"; + +/* The maximum amount of time a task will block for. */ +const TickType_t xMaxBlockTime = pdMS_TO_TICKS(100); +const TickType_t xHalfMaxBlockTime = pdMS_TO_TICKS(50); + +/* The actual block time is dependent on the priority of other tasks in the +system so the actual block time might be greater than that expected, but it +should be within an acceptable upper bound. */ +const TickType_t xAllowableMargin = pdMS_TO_TICKS(28); + +/*-----------------------------------------------------------*/ + +void vCreateAbortDelayTasks(void) +{ + /* Create the two test tasks described above. */ + xTaskCreate(prvControllingTask, pcControllingTaskName, + configMINIMAL_STACK_SIZE, NULL, abtCONTROLLING_PRIORITY, + NULL); + xTaskCreate(prvBlockingTask, pcBlockingTaskName, + configMINIMAL_STACK_SIZE, NULL, abtBLOCKING_PRIORITY, NULL); +} +/*-----------------------------------------------------------*/ + +static void prvControllingTask(void *pvParameters) +{ + TaskHandle_t xBlockingTask; + uint32_t ulTestToPerform = abtNOTIFY_WAIT_ABORTS; + TickType_t xTimeAtStart; + const TickType_t xStartMargin = 2UL; + + /* Just to remove compiler warnings. */ + (void)pvParameters; + + xBlockingTask = xTaskGetHandle(pcBlockingTaskName); + configASSERT(xBlockingTask); + + for (;;) { + /* Tell the secondary task to perform the next test. */ + xTimeAtStart = xTaskGetTickCount(); + xTaskNotify(xBlockingTask, ulTestToPerform, + eSetValueWithOverwrite); + + /* The secondary task has a higher priority, so will now be in the + Blocked state to wait for a maximum of xMaxBlockTime. It expects that + period to complete with a timeout. It will then block for + xMaxBlockTimeAgain, but this time it expects to the block time to abort + half way through. Block until it is time to send the abort to the + secondary task. xStartMargin is used because this task takes timing + from the beginning of the test, whereas the blocking task takes timing + from the entry into the Blocked state - and as the tasks run at + different priorities, there may be some discrepancy. Also, temporarily + raise the priority of the controlling task to that of the blocking + task to minimise discrepancies. */ + vTaskPrioritySet(NULL, abtBLOCKING_PRIORITY); + vTaskDelay(xMaxBlockTime + xHalfMaxBlockTime + xStartMargin); + if (xTaskAbortDelay(xBlockingTask) != pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Reset the priority to the normal controlling priority. */ + vTaskPrioritySet(NULL, abtCONTROLLING_PRIORITY); + + /* Now wait to be notified that the secondary task has completed its + test. */ + ulTaskNotifyTake(pdTRUE, portMAX_DELAY); + + /* Did the entire test run for the expected time, which is two full + block times plus the half block time caused by calling + xTaskAbortDelay()? */ + prvCheckExpectedTimeIsWithinAnAcceptableMargin( + xTimeAtStart, + (xMaxBlockTime + xMaxBlockTime + xHalfMaxBlockTime)); + + /* Move onto the next test. */ + ulTestToPerform++; + + if (ulTestToPerform >= abtMAX_TESTS) { + ulTestToPerform = 0; + } + + /* To indicate this task is still executing. */ + xControllingCycles++; + } +} +/*-----------------------------------------------------------*/ + +static void prvBlockingTask(void *pvParameters) +{ + TaskHandle_t xControllingTask; + uint32_t ulNotificationValue; + const uint32_t ulMax = 0xffffffffUL; + + /* Just to remove compiler warnings. */ + (void)pvParameters; + + /* Start by performing a few tests to cover code not exercised in the loops + below. */ + prvPerformSingleTaskTests(); + + xControllingTask = xTaskGetHandle(pcControllingTaskName); + configASSERT(xControllingTask); + + for (;;) { + /* Wait to be notified of the test that is to be performed next. */ + xTaskNotifyWait(0, ulMax, &ulNotificationValue, portMAX_DELAY); + + switch (ulNotificationValue) { + case abtNOTIFY_WAIT_ABORTS: + prvTestAbortingTaskNotifyWait(); + break; + + case abtNOTIFY_TAKE_ABORTS: + prvTestAbortingTaskNotifyTake(); + break; + + case abtDELAY_ABORTS: + prvTestAbortingTaskDelay(); + break; + + case abtDELAY_UNTIL_ABORTS: + prvTestAbortingTaskDelayUntil(); + break; + + case abtSEMAPHORE_TAKE_ABORTS: + prvTestAbortingSemaphoreTake(); + break; + + case abtEVENT_GROUP_ABORTS: + prvTestAbortingEventGroupWait(); + break; + + case abtQUEUE_SEND_ABORTS: + prvTestAbortingQueueSend(); + break; + + case abtSTREAM_BUFFER_RECEIVE: + prvTestAbortingStreamBufferReceive(); + break; + + default: + /* Should not get here. */ + break; + } + + /* Let the primary task know the test is complete. */ + xTaskNotifyGive(xControllingTask); + + /* To indicate this task is still executing. */ + xBlockingCycles++; + } +} +/*-----------------------------------------------------------*/ + +static void prvPerformSingleTaskTests(void) +{ + TaskHandle_t xThisTask; + BaseType_t xReturned; + + /* Try unblocking this task using both the task and ISR versions of the API - + both should return false as this task is not blocked. */ + xThisTask = xTaskGetCurrentTaskHandle(); + + xReturned = xTaskAbortDelay(xThisTask); + if (xReturned != pdFALSE) { + xErrorOccurred = pdTRUE; + } +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingTaskDelayUntil(void) +{ + TickType_t xTimeAtStart, xLastBlockTime; + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* Take a copy of the time as it is updated in the call to + vTaskDelayUntil() but its original value is needed to determine the actual + time spend in the Blocked state. */ + xLastBlockTime = xTimeAtStart; + + /* This first delay should just time out. */ + vTaskDelayUntil(&xLastBlockTime, xMaxBlockTime); + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* This second delay should be aborted by the primary task half way + through. Again take a copy of the time as it is updated in the call to + vTaskDelayUntil() buts its original value is needed to determine the amount + of time actually spent in the Blocked state. */ + xTimeAtStart = xTaskGetTickCount(); + xLastBlockTime = xTimeAtStart; + vTaskDelayUntil(&xLastBlockTime, xMaxBlockTime); + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* As with the other tests, the third block period should not time out. */ + xTimeAtStart = xTaskGetTickCount(); + xLastBlockTime = xTimeAtStart; + vTaskDelayUntil(&xLastBlockTime, xMaxBlockTime); + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingTaskDelay(void) +{ + TickType_t xTimeAtStart; + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + vTaskDelay(xMaxBlockTime); + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + through. */ + vTaskDelay(xMaxBlockTime); + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + vTaskDelay(xMaxBlockTime); + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingTaskNotifyTake(void) +{ + TickType_t xTimeAtStart; + uint32_t ulReturn; + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + ulReturn = ulTaskNotifyTake(pdFALSE, xMaxBlockTime); + if (ulReturn != 0) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + through. */ + ulReturn = ulTaskNotifyTake(pdFALSE, xMaxBlockTime); + if (ulReturn != 0) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + ulReturn = ulTaskNotifyTake(pdFALSE, xMaxBlockTime); + if (ulReturn != 0) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingEventGroupWait(void) +{ + TickType_t xTimeAtStart; + EventGroupHandle_t xEventGroup; + EventBits_t xBitsToWaitFor = (EventBits_t)0x01, xReturn; + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + static StaticEventGroup_t xEventGroupBuffer; + + /* Create the event group. Statically allocated memory is used so the + creation cannot fail. */ + xEventGroup = xEventGroupCreateStatic(&xEventGroupBuffer); + } +#else + { + xEventGroup = xEventGroupCreate(); + configASSERT(xEventGroup); + } +#endif + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xEventGroupWaitBits(xEventGroup, xBitsToWaitFor, pdTRUE, + pdTRUE, xMaxBlockTime); + if (xReturn != 0x00) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + through. */ + xReturn = xEventGroupWaitBits(xEventGroup, xBitsToWaitFor, pdTRUE, + pdTRUE, xMaxBlockTime); + if (xReturn != 0x00) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xEventGroupWaitBits(xEventGroup, xBitsToWaitFor, pdTRUE, + pdTRUE, xMaxBlockTime); + if (xReturn != 0x00) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Not really necessary in this case, but for completeness. */ + vEventGroupDelete(xEventGroup); +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingStreamBufferReceive(void) +{ + TickType_t xTimeAtStart; + StreamBufferHandle_t xStreamBuffer; + size_t xReturn; + const size_t xTriggerLevelBytes = (size_t)1; + uint8_t uxRxData; + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + /* Defines the memory that will actually hold the streams within the + stream buffer. */ + static uint8_t ucStorageBuffer + [sizeof(configMESSAGE_BUFFER_LENGTH_TYPE) + 1]; + + /* The variable used to hold the stream buffer structure. */ + StaticStreamBuffer_t xStreamBufferStruct; + + xStreamBuffer = xStreamBufferCreateStatic( + sizeof(ucStorageBuffer), xTriggerLevelBytes, + ucStorageBuffer, &xStreamBufferStruct); + } +#else + { + xStreamBuffer = xStreamBufferCreate(sizeof(uint8_t), + xTriggerLevelBytes); + configASSERT(xStreamBuffer); + } +#endif + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xStreamBufferReceive(xStreamBuffer, &uxRxData, + sizeof(uxRxData), xMaxBlockTime); + if (xReturn != 0x00) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + through xMaxBlockTime. */ + xReturn = xStreamBufferReceive(xStreamBuffer, &uxRxData, + sizeof(uxRxData), xMaxBlockTime); + if (xReturn != 0x00) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xStreamBufferReceive(xStreamBuffer, &uxRxData, + sizeof(uxRxData), xMaxBlockTime); + if (xReturn != 0x00) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Not really necessary in this case, but for completeness. */ + vStreamBufferDelete(xStreamBuffer); +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingQueueSend(void) +{ + TickType_t xTimeAtStart; + BaseType_t xReturn; + const UBaseType_t xQueueLength = (UBaseType_t)1; + QueueHandle_t xQueue; + uint8_t ucItemToQueue; + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + static StaticQueue_t xQueueBuffer; + static uint8_t ucQueueStorage[sizeof(uint8_t)]; + + /* Create the queue. Statically allocated memory is used so the + creation cannot fail. */ + xQueue = xQueueCreateStatic(xQueueLength, sizeof(uint8_t), + ucQueueStorage, &xQueueBuffer); + } +#else + { + xQueue = xQueueCreate(xQueueLength, sizeof(uint8_t)); + configASSERT(xQueue); + } +#endif + + /* This function tests aborting when in the blocked state waiting to send, + so the queue must be full. There is only one space in the queue. */ + xReturn = xQueueSend(xQueue, &ucItemToQueue, xMaxBlockTime); + if (xReturn != pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xQueueSend(xQueue, &ucItemToQueue, xMaxBlockTime); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + through. */ + xReturn = xQueueSend(xQueue, &ucItemToQueue, xMaxBlockTime); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xQueueSend(xQueue, &ucItemToQueue, xMaxBlockTime); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Not really necessary in this case, but for completeness. */ + vQueueDelete(xQueue); +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingSemaphoreTake(void) +{ + TickType_t xTimeAtStart; + BaseType_t xReturn; + SemaphoreHandle_t xSemaphore; + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + static StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. Statically allocated memory is used so the + creation cannot fail. */ + xSemaphore = xSemaphoreCreateBinaryStatic(&xSemaphoreBuffer); + } +#else + { + xSemaphore = xSemaphoreCreateBinary(); + } +#endif + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xSemaphoreTake(xSemaphore, xMaxBlockTime); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + through xMaxBlockTime. */ + xReturn = xSemaphoreTake(xSemaphore, portMAX_DELAY); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xSemaphoreTake(xSemaphore, xMaxBlockTime); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Not really necessary in this case, but for completeness. */ + vSemaphoreDelete(xSemaphore); +} +/*-----------------------------------------------------------*/ + +static void prvTestAbortingTaskNotifyWait(void) +{ + TickType_t xTimeAtStart; + BaseType_t xReturn; + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xTaskNotifyWait(0, 0, NULL, xMaxBlockTime); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + through xMaxBlockTime. */ + xReturn = xTaskNotifyWait(0, 0, NULL, portMAX_DELAY); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xHalfMaxBlockTime); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xTaskNotifyWait(0, 0, NULL, xMaxBlockTime); + if (xReturn != pdFALSE) { + xErrorOccurred = pdTRUE; + } + prvCheckExpectedTimeIsWithinAnAcceptableMargin(xTimeAtStart, + xMaxBlockTime); +} +/*-----------------------------------------------------------*/ + +static void +prvCheckExpectedTimeIsWithinAnAcceptableMargin(TickType_t xStartTime, + TickType_t xExpectedBlockTime) +{ + TickType_t xTimeNow, xActualBlockTime; + + xTimeNow = xTaskGetTickCount(); + xActualBlockTime = xTimeNow - xStartTime; + + /* The actual block time should not be less than the expected block time. */ + if (xActualBlockTime < xExpectedBlockTime) { + xErrorOccurred = pdTRUE; + } + + /* The actual block time can be greater than the expected block time, as it + depends on the priority of the other tasks, but it should be within an + acceptable margin. */ + if (xActualBlockTime > (xExpectedBlockTime + xAllowableMargin)) { + xErrorOccurred = pdTRUE; + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreAbortDelayTestTasksStillRunning(void) +{ + static BaseType_t xLastControllingCycleCount = 0, + xLastBlockingCycleCount = 0; + BaseType_t xReturn = pdPASS; + + /* Have both tasks performed at least one cycle since this function was + last called? */ + if (xControllingCycles == xLastControllingCycleCount) { + xReturn = pdFAIL; + } + + if (xBlockingCycles == xLastBlockingCycleCount) { + xReturn = pdFAIL; + } + + if (xErrorOccurred == pdTRUE) { + xReturn = pdFAIL; + } + + xLastBlockingCycleCount = xBlockingCycles; + xLastControllingCycleCount = xControllingCycles; + + return xReturn; +} + +#endif /* INCLUDE_xTaskAbortDelay == 1 */ diff --git a/freertos/cvitek/task/demo/Common/Minimal/BlockQ.c b/freertos/cvitek/task/demo/Common/Minimal/BlockQ.c new file mode 100644 index 000000000..f85959363 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/BlockQ.c @@ -0,0 +1,297 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Creates six tasks that operate on three queues as follows: + * + * The first two tasks send and receive an incrementing number to/from a queue. + * One task acts as a producer and the other as the consumer. The consumer is a + * higher priority than the producer and is set to block on queue reads. The queue + * only has space for one item - as soon as the producer posts a message on the + * queue the consumer will unblock, pre-empt the producer, and remove the item. + * + * The second two tasks work the other way around. Again the queue used only has + * enough space for one item. This time the consumer has a lower priority than the + * producer. The producer will try to post on the queue blocking when the queue is + * full. When the consumer wakes it will remove the item from the queue, causing + * the producer to unblock, pre-empt the consumer, and immediately re-fill the + * queue. + * + * The last two tasks use the same queue producer and consumer functions. This time the queue has + * enough space for lots of items and the tasks operate at the same priority. The + * producer will execute, placing items into the queue. The consumer will start + * executing when either the queue becomes full (causing the producer to block) or + * a context switch occurs (tasks of the same priority will time slice). + * + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo program include files. */ +#include "BlockQ.h" + +#define blckqSTACK_SIZE configMINIMAL_STACK_SIZE +#define blckqNUM_TASK_SETS (3) + +#if (configSUPPORT_DYNAMIC_ALLOCATION == 0) +#error This example cannot be used if dynamic allocation is not allowed. +#endif + +/* Structure used to pass parameters to the blocking queue tasks. */ +typedef struct BLOCKING_QUEUE_PARAMETERS { + QueueHandle_t xQueue; /*< The queue to be used by the task. */ + TickType_t xBlockTime; /*< The block time to use on queue reads/writes. */ + volatile short * + psCheckVariable; /*< Incremented on each successful cycle to check the task is still running. */ +} xBlockingQueueParameters; + +/* Task function that creates an incrementing number and posts it on a queue. */ +static portTASK_FUNCTION_PROTO(vBlockingQueueProducer, pvParameters); + +/* Task function that removes the incrementing number from a queue and checks that +it is the expected number. */ +static portTASK_FUNCTION_PROTO(vBlockingQueueConsumer, pvParameters); + +/* Variables which are incremented each time an item is removed from a queue, and +found to be the expected value. +These are used to check that the tasks are still running. */ +static volatile short sBlockingConsumerCount[blckqNUM_TASK_SETS] = { + (uint16_t)0, (uint16_t)0, (uint16_t)0 +}; + +/* Variable which are incremented each time an item is posted on a queue. These +are used to check that the tasks are still running. */ +static volatile short sBlockingProducerCount[blckqNUM_TASK_SETS] = { + (uint16_t)0, (uint16_t)0, (uint16_t)0 +}; + +/*-----------------------------------------------------------*/ + +void vStartBlockingQueueTasks(UBaseType_t uxPriority) +{ + xBlockingQueueParameters *pxQueueParameters1, *pxQueueParameters2; + xBlockingQueueParameters *pxQueueParameters3, *pxQueueParameters4; + xBlockingQueueParameters *pxQueueParameters5, *pxQueueParameters6; + const UBaseType_t uxQueueSize1 = 1, uxQueueSize5 = 5; + const TickType_t xBlockTime = pdMS_TO_TICKS((TickType_t)1000); + const TickType_t xDontBlock = (TickType_t)0; + + /* Create the first two tasks as described at the top of the file. */ + + /* First create the structure used to pass parameters to the consumer tasks. */ + pxQueueParameters1 = (xBlockingQueueParameters *)pvPortMalloc( + sizeof(xBlockingQueueParameters)); + + /* Create the queue used by the first two tasks to pass the incrementing number. + Pass a pointer to the queue in the parameter structure. */ + pxQueueParameters1->xQueue = + xQueueCreate(uxQueueSize1, (UBaseType_t)sizeof(uint16_t)); + + /* The consumer is created first so gets a block time as described above. */ + pxQueueParameters1->xBlockTime = xBlockTime; + + /* Pass in the variable that this task is going to increment so we can check it + is still running. */ + pxQueueParameters1->psCheckVariable = &(sBlockingConsumerCount[0]); + + /* Create the structure used to pass parameters to the producer task. */ + pxQueueParameters2 = (xBlockingQueueParameters *)pvPortMalloc( + sizeof(xBlockingQueueParameters)); + + /* Pass the queue to this task also, using the parameter structure. */ + pxQueueParameters2->xQueue = pxQueueParameters1->xQueue; + + /* The producer is not going to block - as soon as it posts the consumer will + wake and remove the item so the producer should always have room to post. */ + pxQueueParameters2->xBlockTime = xDontBlock; + + /* Pass in the variable that this task is going to increment so we can check + it is still running. */ + pxQueueParameters2->psCheckVariable = &(sBlockingProducerCount[0]); + + /* Note the producer has a lower priority than the consumer when the tasks are + spawned. */ + xTaskCreate(vBlockingQueueConsumer, "QConsB1", blckqSTACK_SIZE, + (void *)pxQueueParameters1, uxPriority, NULL); + xTaskCreate(vBlockingQueueProducer, "QProdB2", blckqSTACK_SIZE, + (void *)pxQueueParameters2, tskIDLE_PRIORITY, NULL); + + /* Create the second two tasks as described at the top of the file. This uses + the same mechanism but reverses the task priorities. */ + + pxQueueParameters3 = (xBlockingQueueParameters *)pvPortMalloc( + sizeof(xBlockingQueueParameters)); + pxQueueParameters3->xQueue = + xQueueCreate(uxQueueSize1, (UBaseType_t)sizeof(uint16_t)); + pxQueueParameters3->xBlockTime = xDontBlock; + pxQueueParameters3->psCheckVariable = &(sBlockingProducerCount[1]); + + pxQueueParameters4 = (xBlockingQueueParameters *)pvPortMalloc( + sizeof(xBlockingQueueParameters)); + pxQueueParameters4->xQueue = pxQueueParameters3->xQueue; + pxQueueParameters4->xBlockTime = xBlockTime; + pxQueueParameters4->psCheckVariable = &(sBlockingConsumerCount[1]); + + xTaskCreate(vBlockingQueueConsumer, "QConsB3", blckqSTACK_SIZE, + (void *)pxQueueParameters3, tskIDLE_PRIORITY, NULL); + xTaskCreate(vBlockingQueueProducer, "QProdB4", blckqSTACK_SIZE, + (void *)pxQueueParameters4, uxPriority, NULL); + + /* Create the last two tasks as described above. The mechanism is again just + the same. This time both parameter structures are given a block time. */ + pxQueueParameters5 = (xBlockingQueueParameters *)pvPortMalloc( + sizeof(xBlockingQueueParameters)); + pxQueueParameters5->xQueue = + xQueueCreate(uxQueueSize5, (UBaseType_t)sizeof(uint16_t)); + pxQueueParameters5->xBlockTime = xBlockTime; + pxQueueParameters5->psCheckVariable = &(sBlockingProducerCount[2]); + + pxQueueParameters6 = (xBlockingQueueParameters *)pvPortMalloc( + sizeof(xBlockingQueueParameters)); + pxQueueParameters6->xQueue = pxQueueParameters5->xQueue; + pxQueueParameters6->xBlockTime = xBlockTime; + pxQueueParameters6->psCheckVariable = &(sBlockingConsumerCount[2]); + + xTaskCreate(vBlockingQueueProducer, "QProdB5", blckqSTACK_SIZE, + (void *)pxQueueParameters5, tskIDLE_PRIORITY, NULL); + xTaskCreate(vBlockingQueueConsumer, "QConsB6", blckqSTACK_SIZE, + (void *)pxQueueParameters6, tskIDLE_PRIORITY, NULL); +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vBlockingQueueProducer, pvParameters) +{ + uint16_t usValue = 0; + xBlockingQueueParameters *pxQueueParameters; + short sErrorEverOccurred = pdFALSE; + + pxQueueParameters = (xBlockingQueueParameters *)pvParameters; + + for (;;) { + if (xQueueSend(pxQueueParameters->xQueue, (void *)&usValue, + pxQueueParameters->xBlockTime) != pdPASS) { + sErrorEverOccurred = pdTRUE; + } else { + /* We have successfully posted a message, so increment the variable + used to check we are still running. */ + if (sErrorEverOccurred == pdFALSE) { + (*pxQueueParameters->psCheckVariable)++; + } + + /* Increment the variable we are going to post next time round. The + consumer will expect the numbers to follow in numerical order. */ + ++usValue; + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + } + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vBlockingQueueConsumer, pvParameters) +{ + uint16_t usData, usExpectedValue = 0; + xBlockingQueueParameters *pxQueueParameters; + short sErrorEverOccurred = pdFALSE; + + pxQueueParameters = (xBlockingQueueParameters *)pvParameters; + + for (;;) { + if (xQueueReceive(pxQueueParameters->xQueue, &usData, + pxQueueParameters->xBlockTime) == pdPASS) { + if (usData != usExpectedValue) { + /* Catch-up. */ + usExpectedValue = usData; + + sErrorEverOccurred = pdTRUE; + } else { + /* We have successfully received a message, so increment the + variable used to check we are still running. */ + if (sErrorEverOccurred == pdFALSE) { + (*pxQueueParameters->psCheckVariable)++; + } + + /* Increment the value we expect to remove from the queue next time + round. */ + ++usExpectedValue; + } + +#if configUSE_PREEMPTION == 0 + { + if (pxQueueParameters->xBlockTime == 0) { + taskYIELD(); + } + } +#endif + } + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreBlockingQueuesStillRunning(void) +{ + static short sLastBlockingConsumerCount[blckqNUM_TASK_SETS] = { + (uint16_t)0, (uint16_t)0, (uint16_t)0 + }; + static short sLastBlockingProducerCount[blckqNUM_TASK_SETS] = { + (uint16_t)0, (uint16_t)0, (uint16_t)0 + }; + BaseType_t xReturn = pdPASS, xTasks; + + /* Not too worried about mutual exclusion on these variables as they are 16 + bits and we are only reading them. We also only care to see if they have + changed or not. + + Loop through each check variable to and return pdFALSE if any are found not + to have changed since the last call. */ + + for (xTasks = 0; xTasks < blckqNUM_TASK_SETS; xTasks++) { + if (sBlockingConsumerCount[xTasks] == + sLastBlockingConsumerCount[xTasks]) { + xReturn = pdFALSE; + } + sLastBlockingConsumerCount[xTasks] = + sBlockingConsumerCount[xTasks]; + + if (sBlockingProducerCount[xTasks] == + sLastBlockingProducerCount[xTasks]) { + xReturn = pdFALSE; + } + sLastBlockingProducerCount[xTasks] = + sBlockingProducerCount[xTasks]; + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/EventGroupsDemo.c b/freertos/cvitek/task/demo/Common/Minimal/EventGroupsDemo.c new file mode 100644 index 000000000..146d37fe1 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/EventGroupsDemo.c @@ -0,0 +1,1014 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* +* This file contains fairly comprehensive checks on the behaviour of event +* groups. It is not intended to be a user friendly demonstration of the +* event groups API. +* +* NOTE: The tests implemented in this file are informal 'sanity' tests +* only and are not part of the module tests that make use of the +* mtCOVERAGE_TEST_MARKER macro within the event groups implementation. +*/ + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "event_groups.h" + +/* Demo app includes. */ +#include "EventGroupsDemo.h" + +#if (INCLUDE_eTaskGetState != 1) +#error INCLUDE_eTaskGetState must be set to 1 in FreeRTOSConfig.h to use this demo file. +#endif + +/* Priorities used by the tasks. */ +#define ebSET_BIT_TASK_PRIORITY (tskIDLE_PRIORITY) +#define ebWAIT_BIT_TASK_PRIORITY (tskIDLE_PRIORITY + 1) + +/* Generic bit definitions. */ +#define ebBIT_0 (0x01) +#define ebBIT_1 (0x02) +#define ebBIT_2 (0x04) +#define ebBIT_3 (0x08) +#define ebBIT_4 (0x10) +#define ebBIT_5 (0x20) +#define ebBIT_6 (0x40) +#define ebBIT_7 (0x80) + +/* Combinations of bits used in the demo. */ +#define ebCOMBINED_BITS (ebBIT_1 | ebBIT_5 | ebBIT_7) +#define ebALL_BITS \ + (ebBIT_0 | ebBIT_1 | ebBIT_2 | ebBIT_3 | ebBIT_4 | ebBIT_5 | ebBIT_6 | \ + ebBIT_7) + +/* Associate a bit to each task. These bits are used to identify all the tasks +that synchronise with the xEventGroupSync() function. */ +#define ebSET_BIT_TASK_SYNC_BIT ebBIT_0 +#define ebWAIT_BIT_TASK_SYNC_BIT ebBIT_1 +#define ebRENDESVOUS_TASK_1_SYNC_BIT ebBIT_2 +#define ebRENDESVOUS_TASK_2_SYNC_BIT ebBIT_3 +#define ebALL_SYNC_BITS \ + (ebSET_BIT_TASK_SYNC_BIT | ebWAIT_BIT_TASK_SYNC_BIT | \ + ebRENDESVOUS_TASK_1_SYNC_BIT | ebRENDESVOUS_TASK_2_SYNC_BIT) + +/* A block time of zero simply means "don't block". */ +#define ebDONT_BLOCK (0) +#define ebONE_TICK ((TickType_t)1) + +/* A 5ms delay. */ +#define ebSHORT_DELAY pdMS_TO_TICKS((TickType_t)5) + +/* Used in the selective bits test which checks no, one or both tasks blocked on +event bits in a group are unblocked as appropriate as different bits get set. */ +#define ebSELECTIVE_BITS_1 0x03 +#define ebSELECTIVE_BITS_2 0x05 + +#ifndef ebRENDESVOUS_TEST_TASK_STACK_SIZE +#define ebRENDESVOUS_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif + +#ifndef ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE +#define ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif + +/*-----------------------------------------------------------*/ + +/* + * NOTE: The tests implemented in this function are informal 'sanity' tests + * only and are not part of the module tests that make use of the + * mtCOVERAGE_TEST_MARKER macro within the event groups implementation. + * + * The master test task. This task: + * + * 1) Calls prvSelectiveBitsTestMasterFunction() to test the behaviour when two + * tasks are blocked on different bits in an event group. The counterpart of + * this test is implemented by the prvSelectiveBitsTestSlaveFunction() + * function (which is called by the two tasks that block on the event group). + * + * 2) Calls prvBitCombinationTestMasterFunction() to test the behaviour when + * just one task is blocked on various combinations of bits within an event + * group. The counterpart of this test is implemented within the 'test + * slave' task. + * + * 3) Calls prvPerformTaskSyncTests() to test task synchronisation behaviour. + */ +static void prvTestMasterTask(void *pvParameters); + +/* + * A helper task that enables the 'test master' task to perform several + * behavioural tests. See the comments above the prvTestMasterTask() prototype + * above. + */ +static void prvTestSlaveTask(void *pvParameters); + +/* + * The part of the test that is performed between the 'test master' task and the + * 'test slave' task to test the behaviour when the slave blocks on various + * event bit combinations. + */ +static BaseType_t +prvBitCombinationTestMasterFunction(BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle); + +/* + * The part of the test that uses all the tasks to test the task synchronisation + * behaviour. + */ +static BaseType_t prvPerformTaskSyncTests(BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle); + +/* + * Two instances of prvSyncTask() are created. They start by calling + * prvSelectiveBitsTestSlaveFunction() to act as slaves when the test master is + * executing the prvSelectiveBitsTestMasterFunction() function. They then loop + * to test the task synchronisation (rendezvous) behaviour. + */ +static void prvSyncTask(void *pvParameters); + +/* + * Functions used in a test that blocks two tasks on various different bits + * within an event group - then sets each bit in turn and checks that the + * correct tasks unblock at the correct times. + */ +static BaseType_t prvSelectiveBitsTestMasterFunction(void); +static void prvSelectiveBitsTestSlaveFunction(void); + +/*-----------------------------------------------------------*/ + +/* Variables that are incremented by the tasks on each cycle provided no errors +have been found. Used to detect an error or stall in the test cycling. */ +static volatile uint32_t ulTestMasterCycles = 0, ulTestSlaveCycles = 0, + ulISRCycles = 0; + +/* The event group used by all the task based tests. */ +static EventGroupHandle_t xEventGroup = NULL; + +/* The event group used by the interrupt based tests. */ +static EventGroupHandle_t xISREventGroup = NULL; + +/* Handles to the tasks that only take part in the synchronisation calls. */ +static TaskHandle_t xSyncTask1 = NULL, xSyncTask2 = NULL; + +/*-----------------------------------------------------------*/ + +void vStartEventGroupTasks(void) +{ + TaskHandle_t xTestSlaveTaskHandle; + + /* + * This file contains fairly comprehensive checks on the behaviour of event + * groups. It is not intended to be a user friendly demonstration of the + * event groups API. + * + * NOTE: The tests implemented in this file are informal 'sanity' tests + * only and are not part of the module tests that make use of the + * mtCOVERAGE_TEST_MARKER macro within the event groups implementation. + * + * Create the test tasks as described at the top of this file. + */ + xTaskCreate(prvTestSlaveTask, "WaitO", + ebRENDESVOUS_TEST_TASK_STACK_SIZE, NULL, + ebWAIT_BIT_TASK_PRIORITY, &xTestSlaveTaskHandle); + xTaskCreate(prvTestMasterTask, "SetB", + ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE, + (void *)xTestSlaveTaskHandle, ebSET_BIT_TASK_PRIORITY, + NULL); + xTaskCreate(prvSyncTask, "Rndv", ebRENDESVOUS_TEST_TASK_STACK_SIZE, + (void *)ebRENDESVOUS_TASK_1_SYNC_BIT, + ebWAIT_BIT_TASK_PRIORITY, &xSyncTask1); + xTaskCreate(prvSyncTask, "Rndv", ebRENDESVOUS_TEST_TASK_STACK_SIZE, + (void *)ebRENDESVOUS_TASK_2_SYNC_BIT, + ebWAIT_BIT_TASK_PRIORITY, &xSyncTask2); + + /* If the last task was created then the others will have been too. */ + configASSERT(xSyncTask2); + + /* Create the event group used by the ISR tests. The event group used by + the tasks is created by the tasks themselves. */ + xISREventGroup = xEventGroupCreate(); + configASSERT(xISREventGroup); +} +/*-----------------------------------------------------------*/ + +static void prvTestMasterTask(void *pvParameters) +{ + BaseType_t xError; + + /* The handle to the slave task is passed in as the task parameter. */ + TaskHandle_t xTestSlaveTaskHandle = (TaskHandle_t)pvParameters; + + /* Avoid compiler warnings. */ + (void)pvParameters; + + /* Create the event group used by the tasks ready for the initial tests. */ + xEventGroup = xEventGroupCreate(); + configASSERT(xEventGroup); + + /* Perform the tests that block two tasks on different combinations of bits, + then set each bit in turn and check the correct tasks unblock at the correct + times. */ + xError = prvSelectiveBitsTestMasterFunction(); + + for (;;) { + /* Recreate the event group ready for the next cycle. */ + xEventGroup = xEventGroupCreate(); + configASSERT(xEventGroup); + + /* Perform the tests that check the behaviour when a single task is + blocked on various combinations of event bits. */ + xError = prvBitCombinationTestMasterFunction( + xError, xTestSlaveTaskHandle); + + /* Perform the task synchronisation tests. */ + xError = prvPerformTaskSyncTests(xError, xTestSlaveTaskHandle); + + /* Delete the event group. */ + vEventGroupDelete(xEventGroup); + + /* Now all the other tasks should have completed and suspended + themselves ready for the next go around the loop. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eSuspended) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask1) != eSuspended) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eSuspended) { + xError = pdTRUE; + } + + /* Only increment the cycle variable if no errors have been detected. */ + if (xError == pdFALSE) { + ulTestMasterCycles++; + } + + configASSERT(xError == pdFALSE); + } +} +/*-----------------------------------------------------------*/ + +static void prvSyncTask(void *pvParameters) +{ + EventBits_t uxSynchronisationBit, uxReturned; + + /* A few tests that check the behaviour when two tasks are blocked on + various different bits within an event group are performed before this task + enters its infinite loop to carry out its main demo function. */ + prvSelectiveBitsTestSlaveFunction(); + + /* The bit to use to indicate this task is at the synchronisation point is + passed in as the task parameter. */ + uxSynchronisationBit = (EventBits_t)pvParameters; + + for (;;) { + /* Now this task takes part in a task synchronisation - sometimes known + as a 'rendezvous'. Its execution pattern is controlled by the 'test + master' task, which is responsible for taking this task out of the + Suspended state when it is time to test the synchronisation behaviour. + See: http://www.freertos.org/xEventGroupSync.html. */ + vTaskSuspend(NULL); + + /* Set the bit that indicates this task is at the synchronisation + point. The first time this is done the 'test master' task has a lower + priority than this task so this task will get to the sync point before + the set bits task - test this by first calling xEventGroupSync() with + a zero block time, and a block time that is too short for the other + task, before calling again with a max delay - the first two calls should + return before the rendezvous completes, the third only after the + rendezvous is complete. */ + uxReturned = xEventGroupSync( + xEventGroup, /* The event group used for the synchronisation. */ + uxSynchronisationBit, /* The bit to set in the event group to indicate this task is at the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks taking part in the sync. */ + ebDONT_BLOCK); /* The maximum time to wait for the sync condition to be met before giving up. */ + + /* No block time was specified, so as per the comments above, the + rendezvous is not expected to have completed yet. */ + configASSERT((uxReturned & ebALL_SYNC_BITS) != ebALL_SYNC_BITS); + + uxReturned = xEventGroupSync( + xEventGroup, /* The event group used for the synchronisation. */ + uxSynchronisationBit, /* The bit to set in the event group to indicate this task is at the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks taking part in the sync. */ + ebONE_TICK); /* The maximum time to wait for the sync condition to be met before giving up. */ + + /* A short block time was specified, so as per the comments above, the + rendezvous is not expected to have completed yet. */ + configASSERT((uxReturned & ebALL_SYNC_BITS) != ebALL_SYNC_BITS); + + uxReturned = xEventGroupSync( + xEventGroup, /* The event group used for the synchronisation. */ + uxSynchronisationBit, /* The bit to set in the event group to indicate this task is at the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks taking part in the sync. */ + portMAX_DELAY); /* The maximum time to wait for the sync condition to be met before giving up. */ + + /* A max delay was used, so this task should only exit the above + function call when the sync condition is met. Check this is the + case. */ + configASSERT((uxReturned & ebALL_SYNC_BITS) == ebALL_SYNC_BITS); + + /* Remove compiler warning if configASSERT() is not defined. */ + (void)uxReturned; + + /* Wait until the 'test master' task unsuspends this task again. */ + vTaskSuspend(NULL); + + /* Set the bit that indicates this task is at the synchronisation + point again. This time the 'test master' task has a higher priority + than this task so will get to the sync point before this task. */ + uxReturned = xEventGroupSync(xEventGroup, uxSynchronisationBit, + ebALL_SYNC_BITS, portMAX_DELAY); + + /* Again a max delay was used, so this task should only exit the above + function call when the sync condition is met. Check this is the + case. */ + configASSERT((uxReturned & ebALL_SYNC_BITS) == ebALL_SYNC_BITS); + + /* Block on the event group again. This time the event group is going + to be deleted while this task is blocked on it so it is expected that 0 + be returned. */ + uxReturned = + xEventGroupWaitBits(xEventGroup, ebALL_SYNC_BITS, + pdFALSE, pdTRUE, portMAX_DELAY); + configASSERT(uxReturned == 0); + } +} +/*-----------------------------------------------------------*/ + +static void prvTestSlaveTask(void *pvParameters) +{ + EventBits_t uxReturned; + BaseType_t xError = pdFALSE; + + /* Avoid compiler warnings. */ + (void)pvParameters; + + for (;;) { + /********************************************************************** + * Part 1: This section is the counterpart to the + * prvBitCombinationTestMasterFunction() function which is called by the + * test master task. + *********************************************************************** + + This task is controller by the 'test master' task (which is + implemented by prvTestMasterTask()). Suspend until resumed by the + 'test master' task. */ + vTaskSuspend(NULL); + + /* Wait indefinitely for one of the bits in ebCOMBINED_BITS to get + set. Clear the bit on exit. */ + uxReturned = xEventGroupWaitBits( + xEventGroup, /* The event group that contains the event bits being queried. */ + ebBIT_1, /* The bit to wait for. */ + pdTRUE, /* Clear the bit on exit. */ + pdTRUE, /* Wait for all the bits (only one in this case anyway). */ + portMAX_DELAY); /* Block indefinitely to wait for the condition to be met. */ + + /* The 'test master' task set all the bits defined by ebCOMBINED_BITS, + only one of which was being waited for by this task. The return value + shows the state of the event bits when the task was unblocked, however + because the task was waiting for ebBIT_1 and 'clear on exit' was set to + the current state of the event bits will have ebBIT_1 clear. */ + if (uxReturned != ebCOMBINED_BITS) { + xError = pdTRUE; + } + + /* Now call xEventGroupWaitBits() again, this time waiting for all the + bits in ebCOMBINED_BITS to be set. This call should block until the + 'test master' task sets ebBIT_1 - which was the bit cleared in the call + to xEventGroupWaitBits() above. */ + uxReturned = xEventGroupWaitBits( + xEventGroup, + ebCOMBINED_BITS, /* The bits being waited on. */ + pdFALSE, /* Don't clear the bits on exit. */ + pdTRUE, /* All the bits must be set to unblock. */ + portMAX_DELAY); + + /* Were all the bits set? */ + if ((uxReturned & ebCOMBINED_BITS) != ebCOMBINED_BITS) { + xError = pdTRUE; + } + + /* Suspend again to wait for the 'test master' task. */ + vTaskSuspend(NULL); + + /* Now call xEventGroupWaitBits() again, again waiting for all the bits + in ebCOMBINED_BITS to be set, but this time clearing the bits when the + task is unblocked. */ + uxReturned = xEventGroupWaitBits( + xEventGroup, + ebCOMBINED_BITS, /* The bits being waited on. */ + pdTRUE, /* Clear the bits on exit. */ + pdTRUE, /* All the bits must be set to unblock. */ + portMAX_DELAY); + + /* The 'test master' task set all the bits in the event group, so that + is the value that should have been returned. The bits defined by + ebCOMBINED_BITS will have been clear again in the current value though + as 'clear on exit' was set to pdTRUE. */ + if (uxReturned != ebALL_BITS) { + xError = pdTRUE; + } + + /********************************************************************** + * Part 2: This section is the counterpart to the + * prvPerformTaskSyncTests() function which is called by the + * test master task. + *********************************************************************** + + + Once again wait for the 'test master' task to unsuspend this task + when it is time for the next test. */ + vTaskSuspend(NULL); + + /* Now peform a synchronisation with all the other tasks. At this point + the 'test master' task has the lowest priority so will get to the sync + point after all the other synchronising tasks. */ + uxReturned = xEventGroupSync( + xEventGroup, /* The event group used for the sync. */ + ebWAIT_BIT_TASK_SYNC_BIT, /* The bit in the event group used to indicate this task is at the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for. These bits are set by the other tasks taking part in the sync. */ + portMAX_DELAY); /* The maximum time to wait for the sync condition to be met before giving up. */ + + /* A sync with a max delay should only exit when all the synchronisation + bits are set... */ + if ((uxReturned & ebALL_SYNC_BITS) != ebALL_SYNC_BITS) { + xError = pdTRUE; + } + + /* ...but now the synchronisation bits should be clear again. Read back + the current value of the bits within the event group to check that is + the case. Setting the bits to zero will return the bits previous value + then leave all the bits clear. */ + if (xEventGroupSetBits(xEventGroup, 0x00) != 0) { + xError = pdTRUE; + } + + /* Check the bits are indeed 0 now by simply reading then. */ + if (xEventGroupGetBits(xEventGroup) != 0) { + xError = pdTRUE; + } + + if (xError == pdFALSE) { + /* This task is still cycling without finding an error. */ + ulTestSlaveCycles++; + } + + vTaskSuspend(NULL); + + /* This time sync when the 'test master' task has the highest priority + at the point where it sets its sync bit - so this time the 'test master' + task will get to the sync point before this task. */ + uxReturned = + xEventGroupSync(xEventGroup, ebWAIT_BIT_TASK_SYNC_BIT, + ebALL_SYNC_BITS, portMAX_DELAY); + + /* A sync with a max delay should only exit when all the synchronisation + bits are set... */ + if ((uxReturned & ebALL_SYNC_BITS) != ebALL_SYNC_BITS) { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again. */ + if (xEventGroupSetBits(xEventGroup, 0x00) != 0) { + xError = pdTRUE; + } + + /* Block on the event group again. This time the event group is going + to be deleted while this task is blocked on it, so it is expected that 0 + will be returned. */ + uxReturned = + xEventGroupWaitBits(xEventGroup, ebALL_SYNC_BITS, + pdFALSE, pdTRUE, portMAX_DELAY); + + if (uxReturned != 0) { + xError = pdTRUE; + } + + if (xError == pdFALSE) { + /* This task is still cycling without finding an error. */ + ulTestSlaveCycles++; + } + + configASSERT(xError == pdFALSE); + } +} +/*-----------------------------------------------------------*/ + +static BaseType_t prvPerformTaskSyncTests(BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle) +{ + EventBits_t uxBits; + + /* The three tasks that take part in the synchronisation (rendezvous) are + expected to be in the suspended state at the start of the test. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eSuspended) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask1) != eSuspended) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eSuspended) { + xError = pdTRUE; + } + + /* Try a synch with no other tasks involved. First set all the bits other + than this task's bit. */ + xEventGroupSetBits(xEventGroup, + (ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT)); + + /* Then wait on just one bit - the bit that is being set. */ + uxBits = xEventGroupSync( + xEventGroup, /* The event group used for the synchronisation. */ + ebSET_BIT_TASK_SYNC_BIT, /* The bit set by this task when it reaches the sync point. */ + ebSET_BIT_TASK_SYNC_BIT, /* The bits to wait for - in this case it is just waiting for itself. */ + portMAX_DELAY); /* The maximum time to wait for the sync condition to be met. */ + + /* A sync with a max delay should only exit when all the synchronise + bits are set...check that is the case. In this case there is only one + sync bit anyway. */ + if ((uxBits & ebSET_BIT_TASK_SYNC_BIT) != ebSET_BIT_TASK_SYNC_BIT) { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again, leaving all the other + bits set (as only one bit was being waited for). */ + if (xEventGroupGetBits(xEventGroup) != + (ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT)) { + xError = pdTRUE; + } + + /* Clear all the bits to zero again. */ + xEventGroupClearBits(xEventGroup, + (ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT)); + if (xEventGroupGetBits(xEventGroup) != 0) { + xError = pdTRUE; + } + + /* Unsuspend the other tasks then check they have executed up to the + synchronisation point. */ + vTaskResume(xTestSlaveTaskHandle); + vTaskResume(xSyncTask1); + vTaskResume(xSyncTask2); + + if (eTaskGetState(xTestSlaveTaskHandle) != eBlocked) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask1) != eBlocked) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eBlocked) { + xError = pdTRUE; + } + + /* Set this task's sync bit. */ + uxBits = xEventGroupSync( + xEventGroup, /* The event group used for the synchronisation. */ + ebSET_BIT_TASK_SYNC_BIT, /* The bit set by this task when it reaches the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks that take part in the sync. */ + portMAX_DELAY); /* The maximum time to wait for the sync condition to be met. */ + + /* A sync with a max delay should only exit when all the synchronise + bits are set...check that is the case. */ + if ((uxBits & ebALL_SYNC_BITS) != ebALL_SYNC_BITS) { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again. */ + if (xEventGroupGetBits(xEventGroup) != 0) { + xError = pdTRUE; + } + + /* The other tasks should now all be suspended again, ready for the next + synchronisation. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eSuspended) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask1) != eSuspended) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eSuspended) { + xError = pdTRUE; + } + + /* Sync again - but this time set the last necessary bit as the + highest priority task, rather than the lowest priority task. Unsuspend + the other tasks then check they have executed up to the synchronisation + point. */ + vTaskResume(xTestSlaveTaskHandle); + vTaskResume(xSyncTask1); + vTaskResume(xSyncTask2); + + if (eTaskGetState(xTestSlaveTaskHandle) != eBlocked) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask1) != eBlocked) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eBlocked) { + xError = pdTRUE; + } + + /* Raise the priority of this task above that of the other tasks. */ + vTaskPrioritySet(NULL, ebWAIT_BIT_TASK_PRIORITY + 1); + + /* Set this task's sync bit. */ + uxBits = xEventGroupSync(xEventGroup, ebSET_BIT_TASK_SYNC_BIT, + ebALL_SYNC_BITS, portMAX_DELAY); + + /* A sync with a max delay should only exit when all the synchronisation + bits are set... */ + if ((uxBits & ebALL_SYNC_BITS) != ebALL_SYNC_BITS) { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again. */ + if (xEventGroupGetBits(xEventGroup) != 0) { + xError = pdTRUE; + } + + /* The other tasks should now all be in the ready state again, but not + executed yet as this task still has a higher relative priority. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eReady) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask1) != eReady) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eReady) { + xError = pdTRUE; + } + + /* Reset the priority of this task back to its original value. */ + vTaskPrioritySet(NULL, ebSET_BIT_TASK_PRIORITY); + + /* Now all the other tasks should have reblocked on the event bits + to test the behaviour when the event bits are deleted. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eBlocked) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask1) != eBlocked) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eBlocked) { + xError = pdTRUE; + } + + return xError; +} +/*-----------------------------------------------------------*/ + +static BaseType_t +prvBitCombinationTestMasterFunction(BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle) +{ + EventBits_t uxBits; + + /* Resume the other task. It will block, pending a single bit from + within ebCOMBINED_BITS. */ + vTaskResume(xTestSlaveTaskHandle); + + /* Ensure the other task is blocked on the task. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eBlocked) { + xError = pdTRUE; + } + + /* Set all the bits in ebCOMBINED_BITS - the 'test slave' task is only + blocked waiting for one of them. */ + xEventGroupSetBits(xEventGroup, ebCOMBINED_BITS); + + /* The 'test slave' task should now have executed, clearing ebBIT_1 (the + bit it was blocked on), then re-entered the Blocked state to wait for + all the other bits in ebCOMBINED_BITS to be set again. First check + ebBIT_1 is clear. */ + uxBits = xEventGroupWaitBits(xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, + ebDONT_BLOCK); + + if (uxBits != (ebCOMBINED_BITS & ~ebBIT_1)) { + xError = pdTRUE; + } + + /* Ensure the other task is still in the blocked state. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eBlocked) { + xError = pdTRUE; + } + + /* Set all the bits other than ebBIT_1 - which is the bit that must be + set before the other task unblocks. */ + xEventGroupSetBits(xEventGroup, ebALL_BITS & ~ebBIT_1); + + /* Ensure all the expected bits are still set. */ + uxBits = xEventGroupWaitBits(xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, + ebDONT_BLOCK); + + if (uxBits != (ebALL_BITS & ~ebBIT_1)) { + xError = pdTRUE; + } + + /* Ensure the other task is still in the blocked state. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eBlocked) { + xError = pdTRUE; + } + + /* Now also set ebBIT_1, which should unblock the other task, which will + then suspend itself. */ + xEventGroupSetBits(xEventGroup, ebBIT_1); + + /* Ensure the other task is suspended. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eSuspended) { + xError = pdTRUE; + } + + /* The other task should not have cleared the bits - so all the bits + should still be set. */ + if (xEventGroupSetBits(xEventGroup, 0x00) != ebALL_BITS) { + xError = pdTRUE; + } + + /* Clear ebBIT_1 again. */ + if (xEventGroupClearBits(xEventGroup, ebBIT_1) != ebALL_BITS) { + xError = pdTRUE; + } + + /* Resume the other task - which will wait on all the ebCOMBINED_BITS + again - this time clearing the bits when it is unblocked. */ + vTaskResume(xTestSlaveTaskHandle); + + /* Ensure the other task is blocked once again. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eBlocked) { + xError = pdTRUE; + } + + /* Set the bit the other task is waiting for. */ + xEventGroupSetBits(xEventGroup, ebBIT_1); + + /* Ensure the other task is suspended once again. */ + if (eTaskGetState(xTestSlaveTaskHandle) != eSuspended) { + xError = pdTRUE; + } + + /* The other task should have cleared the bits in ebCOMBINED_BITS. + Clear the remaining bits. */ + uxBits = xEventGroupWaitBits(xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, + ebDONT_BLOCK); + + if (uxBits != (ebALL_BITS & ~ebCOMBINED_BITS)) { + xError = pdTRUE; + } + + /* Clear all bits ready for the sync with the other three tasks. The + value returned is the value prior to the bits being cleared. */ + if (xEventGroupClearBits(xEventGroup, ebALL_BITS) != + (ebALL_BITS & ~ebCOMBINED_BITS)) { + xError = pdTRUE; + } + + /* The bits should be clear now. */ + if (xEventGroupGetBits(xEventGroup) != 0x00) { + xError = pdTRUE; + } + + return xError; +} +/*-----------------------------------------------------------*/ + +static void prvSelectiveBitsTestSlaveFunction(void) +{ + EventBits_t uxPendBits, uxReturned; + + /* Used in a test that blocks two tasks on various different bits within an + event group - then sets each bit in turn and checks that the correct tasks + unblock at the correct times. + + This function is called by two different tasks - each of which will use a + different bit. Check the task handle to see which task the function was + called by. */ + if (xTaskGetCurrentTaskHandle() == xSyncTask1) { + uxPendBits = ebSELECTIVE_BITS_1; + } else { + uxPendBits = ebSELECTIVE_BITS_2; + } + + for (;;) { + /* Wait until it is time to perform the next cycle of the test. The + task is unsuspended by the tests implemented in the + prvSelectiveBitsTestMasterFunction() function. */ + vTaskSuspend(NULL); + uxReturned = + xEventGroupWaitBits(xEventGroup, uxPendBits, pdTRUE, + pdFALSE, portMAX_DELAY); + + if (uxReturned == (EventBits_t)0) { + break; + } + } +} +/*-----------------------------------------------------------*/ + +static BaseType_t prvSelectiveBitsTestMasterFunction(void) +{ + BaseType_t xError = pdFALSE; + EventBits_t uxBit; + + /* Used in a test that blocks two tasks on various different bits within an + event group - then sets each bit in turn and checks that the correct tasks + unblock at the correct times. The two other tasks (xSyncTask1 and + xSyncTask2) call prvSelectiveBitsTestSlaveFunction() to perform their parts in + this test. + + Both other tasks should start in the suspended state. */ + if (eTaskGetState(xSyncTask1) != eSuspended) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eSuspended) { + xError = pdTRUE; + } + + /* Test each bit in the byte individually. */ + for (uxBit = 0x01; uxBit < 0x100; uxBit <<= 1) { + /* Resume both tasks. */ + vTaskResume(xSyncTask1); + vTaskResume(xSyncTask2); + + /* Now both tasks should be blocked on the event group. */ + if (eTaskGetState(xSyncTask1) != eBlocked) { + xError = pdTRUE; + } + + if (eTaskGetState(xSyncTask2) != eBlocked) { + xError = pdTRUE; + } + + /* Set one bit. */ + xEventGroupSetBits(xEventGroup, uxBit); + + /* Is the bit set in the first set of selective bits? If so the first + sync task should have unblocked and returned to the suspended state. */ + if ((uxBit & ebSELECTIVE_BITS_1) == 0) { + /* Task should not have unblocked. */ + if (eTaskGetState(xSyncTask1) != eBlocked) { + xError = pdTRUE; + } + } else { + /* Task should have unblocked and returned to the suspended state. */ + if (eTaskGetState(xSyncTask1) != eSuspended) { + xError = pdTRUE; + } + } + + /* Same checks for the second sync task. */ + if ((uxBit & ebSELECTIVE_BITS_2) == 0) { + /* Task should not have unblocked. */ + if (eTaskGetState(xSyncTask2) != eBlocked) { + xError = pdTRUE; + } + } else { + /* Task should have unblocked and returned to the suspended state. */ + if (eTaskGetState(xSyncTask2) != eSuspended) { + xError = pdTRUE; + } + } + } + + /* Ensure both tasks are blocked on the event group again, then delete the + event group so the other tasks leave this portion of the test. */ + vTaskResume(xSyncTask1); + vTaskResume(xSyncTask2); + + /* Deleting the event group is the signal that the two other tasks should + leave the prvSelectiveBitsTestSlaveFunction() function and continue to the main + part of their functionality. */ + vEventGroupDelete(xEventGroup); + + return xError; +} +/*-----------------------------------------------------------*/ + +void vPeriodicEventGroupsProcessing(void) +{ + static BaseType_t xCallCount = 0, xISRTestError = pdFALSE; + const BaseType_t xSetBitCount = 100, xGetBitsCount = 200, + xClearBitsCount = 300; + const EventBits_t uxBitsToSet = 0x12U; + EventBits_t uxReturned; + BaseType_t xMessagePosted; + + /* Called periodically from the tick hook to exercise the "FromISR" + functions. */ + + /* Check the even group tasks were actually created. */ + configASSERT(xISREventGroup); + + xCallCount++; + + if (xCallCount == xSetBitCount) { + /* All the event bits should start clear. */ + uxReturned = xEventGroupGetBitsFromISR(xISREventGroup); + if (uxReturned != 0x00) { + xISRTestError = pdTRUE; + } else { + /* Set the bits. This is called from the tick hook so it is not + necessary to use the last parameter to ensure a context switch + occurs immediately. */ + xMessagePosted = xEventGroupSetBitsFromISR( + xISREventGroup, uxBitsToSet, NULL); + if (xMessagePosted != pdPASS) { + xISRTestError = pdTRUE; + } + } + } else if (xCallCount == xGetBitsCount) { + /* Check the bits were set as expected. */ + uxReturned = xEventGroupGetBitsFromISR(xISREventGroup); + if (uxReturned != uxBitsToSet) { + xISRTestError = pdTRUE; + } + } else if (xCallCount == xClearBitsCount) { + /* Clear the bits again. */ + uxReturned = (EventBits_t)xEventGroupClearBitsFromISR( + xISREventGroup, uxBitsToSet); + + /* Check the message was posted. */ + if (uxReturned != pdPASS) { + xISRTestError = pdTRUE; + } + + /* Go back to the start. */ + xCallCount = 0; + + /* If no errors have been detected then increment the count of test + cycles. */ + if (xISRTestError == pdFALSE) { + ulISRCycles++; + } + } else { + /* Nothing else to do. */ + } +} + +/*-----------------------------------------------------------*/ +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreEventGroupTasksStillRunning(void) +{ + static uint32_t ulPreviousWaitBitCycles = 0, ulPreviousSetBitCycles = 0, + ulPreviousISRCycles = 0; + BaseType_t xStatus = pdPASS; + + /* Check the tasks are still cycling without finding any errors. */ + if (ulPreviousSetBitCycles == ulTestMasterCycles) { + xStatus = pdFAIL; + } + ulPreviousSetBitCycles = ulTestMasterCycles; + + if (ulPreviousWaitBitCycles == ulTestSlaveCycles) { + xStatus = pdFAIL; + } + ulPreviousWaitBitCycles = ulTestSlaveCycles; + + if (ulPreviousISRCycles == ulISRCycles) { + xStatus = pdFAIL; + } + ulPreviousISRCycles = ulISRCycles; + + return xStatus; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/GenQTest.c b/freertos/cvitek/task/demo/Common/Minimal/GenQTest.c new file mode 100644 index 000000000..c1096716a --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/GenQTest.c @@ -0,0 +1,964 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Tests the extra queue functionality introduced in FreeRTOS.org V4.5.0 - + * including xQueueSendToFront(), xQueueSendToBack(), xQueuePeek() and + * mutex behaviour. + * + * See the comments above the prvSendFrontAndBackTest() and + * prvLowPriorityMutexTask() prototypes below for more information. + */ + +/* Standard includes. */ +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" + +/* Demo program include files. */ +#include "GenQTest.h" + +#define genqQUEUE_LENGTH (5) +#define intsemNO_BLOCK (0) +#define genqSHORT_BLOCK (pdMS_TO_TICKS(2)) + +#define genqMUTEX_LOW_PRIORITY (tskIDLE_PRIORITY) +#define genqMUTEX_TEST_PRIORITY (tskIDLE_PRIORITY + 1) +#define genqMUTEX_MEDIUM_PRIORITY (tskIDLE_PRIORITY + 2) +#define genqMUTEX_HIGH_PRIORITY (tskIDLE_PRIORITY + 3) + +#ifndef genqMUTEX_TEST_TASK_STACK_SIZE +#define genqMUTEX_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif + +#ifndef genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE +#define genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif +/*-----------------------------------------------------------*/ + +/* + * Tests the behaviour of the xQueueSendToFront() and xQueueSendToBack() + * macros by using both to fill a queue, then reading from the queue to + * check the resultant queue order is as expected. Queue data is also + * peeked. + */ +static void prvSendFrontAndBackTest(void *pvParameters); + +/* + * The following three tasks are used to demonstrate the mutex behaviour. + * Each task is given a different priority to demonstrate the priority + * inheritance mechanism. + * + * The low priority task obtains a mutex. After this a high priority task + * attempts to obtain the same mutex, causing its priority to be inherited + * by the low priority task. The task with the inherited high priority then + * resumes a medium priority task to ensure it is not blocked by the medium + * priority task while it holds the inherited high priority. Once the mutex + * is returned the task with the inherited priority returns to its original + * low priority, and is therefore immediately preempted by first the high + * priority task and then the medium priority task before it can continue. + */ +static void prvLowPriorityMutexTask(void *pvParameters); +static void prvMediumPriorityMutexTask(void *pvParameters); +static void prvHighPriorityMutexTask(void *pvParameters); + +/* + * Tests the behaviour when a low priority task inherits the priority of a + * higher priority task when taking two mutexes, and returns the mutexes in + * first the same order as the two mutexes were obtained, and second the + * opposite order as the two mutexes were obtained. + */ +static void prvTakeTwoMutexesReturnInSameOrder(SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex); +static void +prvTakeTwoMutexesReturnInDifferentOrder(SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex); + +#if (INCLUDE_xTaskAbortDelay == 1) + +#if (configUSE_PREEMPTION == 0) +#error The additional tests included when INCLUDE_xTaskAbortDelay is 1 expect preemption to be used. +#endif + +/* Tests the behaviour when a low priority task inherits the priority of a + high priority task only for the high priority task to timeout before + obtaining the mutex. */ +static void prvHighPriorityTimeout(SemaphoreHandle_t xMutex); +#endif + +/*-----------------------------------------------------------*/ + +/* Flag that will be latched to pdTRUE should any unexpected behaviour be +detected in any of the tasks. */ +static volatile BaseType_t xErrorDetected = pdFALSE; + +/* Counters that are incremented on each cycle of a test. This is used to +detect a stalled task - a test that is no longer running. */ +static volatile uint32_t ulLoopCounter = 0; +static volatile uint32_t ulLoopCounter2 = 0; + +/* The variable that is guarded by the mutex in the mutex demo tasks. */ +static volatile uint32_t ulGuardedVariable = 0; + +/* Handles used in the mutex test to suspend and resume the high and medium +priority mutex test tasks. */ +static TaskHandle_t xHighPriorityMutexTask, xMediumPriorityMutexTask; + +/* If INCLUDE_xTaskAbortDelay is 1 additional tests are performed, requiring an +additional task. */ +#if (INCLUDE_xTaskAbortDelay == 1) +static TaskHandle_t xSecondMediumPriorityMutexTask; +#endif + +/* Lets the high priority semaphore task know that its wait for the semaphore +was aborted, in which case not being able to obtain the semaphore is not to be +considered an error. */ +static volatile BaseType_t xBlockWasAborted = pdFALSE; + +/*-----------------------------------------------------------*/ + +void vStartGenericQueueTasks(UBaseType_t uxPriority) +{ + QueueHandle_t xQueue; + SemaphoreHandle_t xMutex; + + /* Create the queue that we are going to use for the + prvSendFrontAndBackTest demo. */ + xQueue = xQueueCreate(genqQUEUE_LENGTH, sizeof(uint32_t)); + + if (xQueue != NULL) { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one + is in use. The queue registry is provided as a means for kernel aware + debuggers to locate queues and has no purpose if a kernel aware debugger + is not being used. The call to vQueueAddToRegistry() will be removed + by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + defined to be less than 1. */ + vQueueAddToRegistry(xQueue, "Gen_Queue_Test"); + + /* Create the demo task and pass it the queue just created. We are + passing the queue handle by value so it does not matter that it is + declared on the stack here. */ + xTaskCreate(prvSendFrontAndBackTest, "GenQ", + genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE, + (void *)xQueue, uxPriority, NULL); + } + + /* Create the mutex used by the prvMutexTest task. */ + xMutex = xSemaphoreCreateMutex(); + + if (xMutex != NULL) { + /* vQueueAddToRegistry() adds the mutex to the registry, if one is + in use. The registry is provided as a means for kernel aware + debuggers to locate mutexes and has no purpose if a kernel aware + debugger is not being used. The call to vQueueAddToRegistry() will be + removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + defined or is defined to be less than 1. */ + vQueueAddToRegistry((QueueHandle_t)xMutex, "Gen_Queue_Mutex"); + + /* Create the mutex demo tasks and pass it the mutex just created. We + are passing the mutex handle by value so it does not matter that it is + declared on the stack here. */ + xTaskCreate(prvLowPriorityMutexTask, "MuLow", + genqMUTEX_TEST_TASK_STACK_SIZE, (void *)xMutex, + genqMUTEX_LOW_PRIORITY, NULL); + xTaskCreate(prvMediumPriorityMutexTask, "MuMed", + configMINIMAL_STACK_SIZE, NULL, + genqMUTEX_MEDIUM_PRIORITY, + &xMediumPriorityMutexTask); + xTaskCreate(prvHighPriorityMutexTask, "MuHigh", + genqMUTEX_TEST_TASK_STACK_SIZE, (void *)xMutex, + genqMUTEX_HIGH_PRIORITY, &xHighPriorityMutexTask); + +/* If INCLUDE_xTaskAbortDelay is set then additional tests are performed, + requiring two instances of prvHighPriorityMutexTask(). */ +#if (INCLUDE_xTaskAbortDelay == 1) + { + xTaskCreate(prvHighPriorityMutexTask, "MuHigh2", + configMINIMAL_STACK_SIZE, (void *)xMutex, + genqMUTEX_MEDIUM_PRIORITY, + &xSecondMediumPriorityMutexTask); + } +#endif /* INCLUDE_xTaskAbortDelay */ + } +} +/*-----------------------------------------------------------*/ + +static void prvSendFrontAndBackTest(void *pvParameters) +{ + uint32_t ulData, ulData2, ulLoopCounterSnapshot; + QueueHandle_t xQueue; + +#ifdef USE_STDIO + void vPrintDisplayMessage(const char *const *ppcMessageToSend); + + const char *const pcTaskStartMsg = + "Queue SendToFront/SendToBack/Peek test started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage(&pcTaskStartMsg); +#endif + + xQueue = (QueueHandle_t)pvParameters; + + for (;;) { + /* The queue is empty, so sending an item to the back of the queue + should have the same effect as sending it to the front of the queue. + + First send to the front and check everything is as expected. */ + ulLoopCounterSnapshot = ulLoopCounter; + xQueueSendToFront(xQueue, (void *)&ulLoopCounterSnapshot, + intsemNO_BLOCK); + + if (uxQueueMessagesWaiting(xQueue) != 1) { + xErrorDetected = pdTRUE; + } + + if (xQueueReceive(xQueue, (void *)&ulData, intsemNO_BLOCK) != + pdPASS) { + xErrorDetected = pdTRUE; + } + + /* The data we sent to the queue should equal the data we just received + from the queue. */ + if (ulLoopCounter != ulData) { + xErrorDetected = pdTRUE; + } + + /* Then do the same, sending the data to the back, checking everything + is as expected. */ + if (uxQueueMessagesWaiting(xQueue) != 0) { + xErrorDetected = pdTRUE; + } + + ulLoopCounterSnapshot = ulLoopCounter; + xQueueSendToBack(xQueue, (void *)&ulLoopCounterSnapshot, + intsemNO_BLOCK); + + if (uxQueueMessagesWaiting(xQueue) != 1) { + xErrorDetected = pdTRUE; + } + + if (xQueueReceive(xQueue, (void *)&ulData, intsemNO_BLOCK) != + pdPASS) { + xErrorDetected = pdTRUE; + } + + if (uxQueueMessagesWaiting(xQueue) != 0) { + xErrorDetected = pdTRUE; + } + + /* The data sent to the queue should equal the data just received from + the queue. */ + if (ulLoopCounter != ulData) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* Place 2, 3, 4 into the queue, adding items to the back of the queue. */ + for (ulData = 2; ulData < 5; ulData++) { + xQueueSendToBack(xQueue, (void *)&ulData, + intsemNO_BLOCK); + } + + /* Now the order in the queue should be 2, 3, 4, with 2 being the first + thing to be read out. Now add 1 then 0 to the front of the queue. */ + if (uxQueueMessagesWaiting(xQueue) != 3) { + xErrorDetected = pdTRUE; + } + ulData = 1; + xQueueSendToFront(xQueue, (void *)&ulData, intsemNO_BLOCK); + ulData = 0; + xQueueSendToFront(xQueue, (void *)&ulData, intsemNO_BLOCK); + + /* Now the queue should be full, and when we read the data out we + should receive 0, 1, 2, 3, 4. */ + if (uxQueueMessagesWaiting(xQueue) != 5) { + xErrorDetected = pdTRUE; + } + + if (xQueueSendToFront(xQueue, (void *)&ulData, + intsemNO_BLOCK) != errQUEUE_FULL) { + xErrorDetected = pdTRUE; + } + + if (xQueueSendToBack(xQueue, (void *)&ulData, intsemNO_BLOCK) != + errQUEUE_FULL) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* Check the data we read out is in the expected order. */ + for (ulData = 0; ulData < genqQUEUE_LENGTH; ulData++) { + /* Try peeking the data first. */ + if (xQueuePeek(xQueue, &ulData2, intsemNO_BLOCK) != + pdPASS) { + xErrorDetected = pdTRUE; + } + + if (ulData != ulData2) { + xErrorDetected = pdTRUE; + } + + /* Now try receiving the data for real. The value should be the + same. Clobber the value first so we know we really received it. */ + ulData2 = ~ulData2; + if (xQueueReceive(xQueue, &ulData2, intsemNO_BLOCK) != + pdPASS) { + xErrorDetected = pdTRUE; + } + + if (ulData != ulData2) { + xErrorDetected = pdTRUE; + } + } + + /* The queue should now be empty again. */ + if (uxQueueMessagesWaiting(xQueue) != 0) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* Our queue is empty once more, add 10, 11 to the back. */ + ulData = 10; + if (xQueueSend(xQueue, &ulData, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + ulData = 11; + if (xQueueSend(xQueue, &ulData, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + if (uxQueueMessagesWaiting(xQueue) != 2) { + xErrorDetected = pdTRUE; + } + + /* Now we should have 10, 11 in the queue. Add 7, 8, 9 to the + front. */ + for (ulData = 9; ulData >= 7; ulData--) { + if (xQueueSendToFront(xQueue, (void *)&ulData, + intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + } + + /* Now check that the queue is full, and that receiving data provides + the expected sequence of 7, 8, 9, 10, 11. */ + if (uxQueueMessagesWaiting(xQueue) != 5) { + xErrorDetected = pdTRUE; + } + + if (xQueueSendToFront(xQueue, (void *)&ulData, + intsemNO_BLOCK) != errQUEUE_FULL) { + xErrorDetected = pdTRUE; + } + + if (xQueueSendToBack(xQueue, (void *)&ulData, intsemNO_BLOCK) != + errQUEUE_FULL) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* Check the data we read out is in the expected order. */ + for (ulData = 7; ulData < (7 + genqQUEUE_LENGTH); ulData++) { + if (xQueueReceive(xQueue, &ulData2, intsemNO_BLOCK) != + pdPASS) { + xErrorDetected = pdTRUE; + } + + if (ulData != ulData2) { + xErrorDetected = pdTRUE; + } + } + + if (uxQueueMessagesWaiting(xQueue) != 0) { + xErrorDetected = pdTRUE; + } + + /* Increment the loop counter to indicate these tasks are still + executing. */ + ulLoopCounter++; + } +} +/*-----------------------------------------------------------*/ + +#if (INCLUDE_xTaskAbortDelay == 1) + +static void prvHighPriorityTimeout(SemaphoreHandle_t xMutex) +{ + static UBaseType_t uxLoopCount = 0; + + /* The tests in this function are very similar, the slight variations + are for code coverage purposes. */ + + /* Take the mutex. It should be available now. Check before and after + taking that the holder is reported correctly. */ + if (xSemaphoreGetMutexHolder(xMutex) != NULL) { + xErrorDetected = pdTRUE; + } + if (xSemaphoreTake(xMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + if (xSemaphoreGetMutexHolder(xMutex) != xTaskGetCurrentTaskHandle()) { + xErrorDetected = pdTRUE; + } + + /* This task's priority should be as per that assigned when the task was + created. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_LOW_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the high priority task. This will attempt to take the + mutex, and block when it finds it cannot obtain it. */ + vTaskResume(xHighPriorityMutexTask); + + /* This task should now have inherited the priority of the high priority + task as by now the high priority task will have attempted to obtain the + mutex. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Unblock a second medium priority task. It too will attempt to take + the mutex and enter the Blocked state - it won't run yet though as this + task has inherited a priority above it. */ + vTaskResume(xSecondMediumPriorityMutexTask); + + /* This task should still have the priority of the high priority task as + that had already been inherited as is the highest priority of the three + tasks using the mutex. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* On some loops, block for a short while to provide additional + code coverage. Blocking here will allow the medium priority task to + execute and so also block on the mutex so when the high priority task + causes this task to disinherit the high priority it is inherited down to + the priority of the medium priority task. When there is no delay the + medium priority task will not run until after the disinheritance, so + this task will disinherit back to its base priority, then only up to the + medium priority after the medium priority has executed. */ + vTaskDelay(uxLoopCount & (UBaseType_t)0x07); + + /* Now force the high priority task to unblock. It will fail to obtain + the mutex and go back to the suspended state - allowing this task to + execute again. xBlockWasAborted is set to pdTRUE so the higher priority + task knows that its failure to obtain the semaphore is not an error. */ + xBlockWasAborted = pdTRUE; + if (xTaskAbortDelay(xHighPriorityMutexTask) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* This task has inherited the priority of xHighPriorityMutexTask so + could still be running even though xHighPriorityMutexTask is no longer + blocked. Delay for a short while to ensure xHighPriorityMutexTask gets + a chance to run - indicated by this task changing priority. It should + disinherit the high priority task, but then inherit the priority of the + medium priority task that is waiting for the same mutex. */ + while (uxTaskPriorityGet(NULL) != genqMUTEX_MEDIUM_PRIORITY) { + /* If this task gets stuck here then the check variables will stop + incrementing and the check task will detect the error. */ + vTaskDelay(genqSHORT_BLOCK); + } + + /* Now force the medium priority task to unblock. xBlockWasAborted is + set to pdTRUE so the medium priority task knows that its failure to + obtain the semaphore is not an error. */ + xBlockWasAborted = pdTRUE; + if (xTaskAbortDelay(xSecondMediumPriorityMutexTask) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* This time no other tasks are waiting for the mutex, so this task + should return to its base priority. This might not happen straight + away as it is running at the same priority as the task it just + unblocked. */ + while (uxTaskPriorityGet(NULL) != genqMUTEX_LOW_PRIORITY) { + /* If this task gets stuck here then the check variables will stop + incrementing and the check task will detect the error. */ + vTaskDelay(genqSHORT_BLOCK); + } + + /* Give the semaphore back ready for the next test. Check the mutex + holder before and after using the "FromISR" version for code coverage. */ + if (xSemaphoreGetMutexHolderFromISR(xMutex) != + xTaskGetCurrentTaskHandle()) { + xErrorDetected = pdTRUE; + } + xSemaphoreGive(xMutex); + if (xSemaphoreGetMutexHolderFromISR(xMutex) != NULL) { + xErrorDetected = pdTRUE; + } + + configASSERT(xErrorDetected == pdFALSE); + + /* Now do the same again, but this time unsuspend the tasks in the + opposite order. This takes a different path though the code because + when the high priority task has its block aborted there is already + another task in the list of tasks waiting for the mutex, and the + low priority task drops down to that priority, rather than dropping + down to its base priority before inheriting the priority of the medium + priority task. */ + if (xSemaphoreTake(xMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + if (uxTaskPriorityGet(NULL) != genqMUTEX_LOW_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* This time unsuspend the medium priority task first. This will + attempt to take the mutex, and block when it finds it cannot obtain it. */ + vTaskResume(xSecondMediumPriorityMutexTask); + + /* This time this task should now have inherited the priority of the + medium task. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_MEDIUM_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* This time the high priority task in unsuspended second. */ + vTaskResume(xHighPriorityMutexTask); + + /* The high priority task should already have run, causing this task to + inherit a priority for the second time. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* This time, when the high priority task has its delay aborted and it + fails to obtain the mutex this task will immediately have its priority + lowered down to that of the highest priority task waiting on the mutex, + which is the medium priority task. */ + xBlockWasAborted = pdTRUE; + if (xTaskAbortDelay(xHighPriorityMutexTask) != pdPASS) { + xErrorDetected = pdTRUE; + } + + while (uxTaskPriorityGet(NULL) != genqMUTEX_MEDIUM_PRIORITY) { + /* If this task gets stuck here then the check variables will stop + incrementing and the check task will detect the error. */ + vTaskDelay(genqSHORT_BLOCK); + } + + /* And finally, when the medium priority task also have its delay + aborted there are no other tasks waiting for the mutex so this task + returns to its base priority. */ + xBlockWasAborted = pdTRUE; + if (xTaskAbortDelay(xSecondMediumPriorityMutexTask) != pdPASS) { + xErrorDetected = pdTRUE; + } + + while (uxTaskPriorityGet(NULL) != genqMUTEX_LOW_PRIORITY) { + /* If this task gets stuck here then the check variables will stop + incrementing and the check task will detect the error. */ + vTaskDelay(genqSHORT_BLOCK); + } + + /* Give the semaphore back ready for the next test. */ + xSemaphoreGive(xMutex); + + configASSERT(xErrorDetected == pdFALSE); + + /* uxLoopCount is used to add a variable delay, and in-so-doing provide + additional code coverage. */ + uxLoopCount++; +} + +#endif /* INCLUDE_xTaskAbortDelay == 1 */ +/*-----------------------------------------------------------*/ + +static void +prvTakeTwoMutexesReturnInDifferentOrder(SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex) +{ + /* Take the mutex. It should be available now. */ + if (xSemaphoreTake(xMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* Set the guarded variable to a known start value. */ + ulGuardedVariable = 0; + + /* This task's priority should be as per that assigned when the task was + created. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_LOW_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the high priority task. This will attempt to take the + mutex, and block when it finds it cannot obtain it. */ + vTaskResume(xHighPriorityMutexTask); + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + +/* Ensure the task is reporting its priority as blocked and not + suspended (as it would have done in versions up to V7.5.3). */ +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xHighPriorityMutexTask) == eBlocked); + } +#endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the high priority + task as by now the high priority task will have attempted to obtain the + mutex. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Attempt to set the priority of this task to the test priority - + between the idle priority and the medium/high test priorities, but the + actual priority should remain at the high priority. */ + vTaskPrioritySet(NULL, genqMUTEX_TEST_PRIORITY); + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the medium priority task. This should not run as the + inherited priority of this task is above that of the medium priority + task. */ + vTaskResume(xMediumPriorityMutexTask); + + /* If the medium priority task did run then it will have incremented the + guarded variable. */ + if (ulGuardedVariable != 0) { + xErrorDetected = pdTRUE; + } + + /* Take the local mutex too, so two mutexes are now held. */ + if (xSemaphoreTake(xLocalMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* When the semaphore is given back the priority of this task should not + yet be disinherited because the local mutex is still held. This is a + simplification to allow FreeRTOS to be integrated with middleware that + attempts to hold multiple mutexes without bloating the code with complex + algorithms. It is possible that the high priority mutex task will + execute as it shares a priority with this task. */ + if (xSemaphoreGive(xMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* The guarded variable is only incremented by the medium priority task, + which still should not have executed as this task should remain at the + higher priority, ensure this is the case. */ + if (ulGuardedVariable != 0) { + xErrorDetected = pdTRUE; + } + + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now also give back the local mutex, taking the held count back to 0. + This time the priority of this task should be disinherited back to the + priority to which it was set while the mutex was held. This means + the medium priority task should execute and increment the guarded + variable. When this task next runs both the high and medium priority + tasks will have been suspended again. */ + if (xSemaphoreGive(xLocalMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* Check the guarded variable did indeed increment... */ + if (ulGuardedVariable != 1) { + xErrorDetected = pdTRUE; + } + + /* ... and that the priority of this task has been disinherited to + genqMUTEX_TEST_PRIORITY. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_TEST_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Set the priority of this task back to its original value, ready for + the next loop around this test. */ + vTaskPrioritySet(NULL, genqMUTEX_LOW_PRIORITY); +} +/*-----------------------------------------------------------*/ + +static void prvTakeTwoMutexesReturnInSameOrder(SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex) +{ + /* Take the mutex. It should be available now. */ + if (xSemaphoreTake(xMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* Set the guarded variable to a known start value. */ + ulGuardedVariable = 0; + + /* This task's priority should be as per that assigned when the task was + created. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_LOW_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the high priority task. This will attempt to take the + mutex, and block when it finds it cannot obtain it. */ + vTaskResume(xHighPriorityMutexTask); + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + +/* Ensure the task is reporting its priority as blocked and not + suspended (as it would have done in versions up to V7.5.3). */ +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xHighPriorityMutexTask) == eBlocked); + } +#endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the high priority + task as by now the high priority task will have attempted to obtain the + mutex. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the medium priority task. This should not run as the + inherited priority of this task is above that of the medium priority + task. */ + vTaskResume(xMediumPriorityMutexTask); + + /* If the medium priority task did run then it will have incremented the + guarded variable. */ + if (ulGuardedVariable != 0) { + xErrorDetected = pdTRUE; + } + + /* Take the local mutex too, so two mutexes are now held. */ + if (xSemaphoreTake(xLocalMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* When the local semaphore is given back the priority of this task should + not yet be disinherited because the shared mutex is still held. This is a + simplification to allow FreeRTOS to be integrated with middleware that + attempts to hold multiple mutexes without bloating the code with complex + algorithms. It is possible that the high priority mutex task will + execute as it shares a priority with this task. */ + if (xSemaphoreGive(xLocalMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* The guarded variable is only incremented by the medium priority task, + which still should not have executed as this task should remain at the + higher priority, ensure this is the case. */ + if (ulGuardedVariable != 0) { + xErrorDetected = pdTRUE; + } + + if (uxTaskPriorityGet(NULL) != genqMUTEX_HIGH_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now also give back the shared mutex, taking the held count back to 0. + This time the priority of this task should be disinherited back to the + priority at which it was created. This means the medium priority task + should execute and increment the guarded variable. When this task next runs + both the high and medium priority tasks will have been suspended again. */ + if (xSemaphoreGive(xMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* Check the guarded variable did indeed increment... */ + if (ulGuardedVariable != 1) { + xErrorDetected = pdTRUE; + } + + /* ... and that the priority of this task has been disinherited to + genqMUTEX_LOW_PRIORITY. */ + if (uxTaskPriorityGet(NULL) != genqMUTEX_LOW_PRIORITY) { + xErrorDetected = pdTRUE; + } +} +/*-----------------------------------------------------------*/ + +static void prvLowPriorityMutexTask(void *pvParameters) +{ + SemaphoreHandle_t xMutex = (SemaphoreHandle_t)pvParameters, xLocalMutex; + +#ifdef USE_STDIO + void vPrintDisplayMessage(const char *const *ppcMessageToSend); + + const char *const pcTaskStartMsg = + "Mutex with priority inheritance test started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage(&pcTaskStartMsg); +#endif + + /* The local mutex is used to check the 'mutexs held' count. */ + xLocalMutex = xSemaphoreCreateMutex(); + configASSERT(xLocalMutex); + + for (;;) { + /* The first tests exercise the priority inheritance when two mutexes + are taken then returned in a different order to which they were + taken. */ + prvTakeTwoMutexesReturnInDifferentOrder(xMutex, xLocalMutex); + + /* Just to show this task is still running. */ + ulLoopCounter2++; + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* The second tests exercise the priority inheritance when two mutexes + are taken then returned in the same order in which they were taken. */ + prvTakeTwoMutexesReturnInSameOrder(xMutex, xLocalMutex); + + /* Just to show this task is still running. */ + ulLoopCounter2++; + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + +#if (INCLUDE_xTaskAbortDelay == 1) + { + /* Tests the behaviour when a low priority task inherits the + priority of a high priority task only for the high priority task to + timeout before obtaining the mutex. */ + prvHighPriorityTimeout(xMutex); + } +#endif + } +} +/*-----------------------------------------------------------*/ + +static void prvMediumPriorityMutexTask(void *pvParameters) +{ + (void)pvParameters; + + for (;;) { + /* The medium priority task starts by suspending itself. The low + priority task will unsuspend this task when required. */ + vTaskSuspend(NULL); + + /* When this task unsuspends all it does is increment the guarded + variable, this is so the low priority task knows that it has + executed. */ + ulGuardedVariable++; + } +} +/*-----------------------------------------------------------*/ + +static void prvHighPriorityMutexTask(void *pvParameters) +{ + SemaphoreHandle_t xMutex = (SemaphoreHandle_t)pvParameters; + + for (;;) { + /* The high priority task starts by suspending itself. The low + priority task will unsuspend this task when required. */ + vTaskSuspend(NULL); + + /* When this task unsuspends all it does is attempt to obtain the + mutex. It should find the mutex is not available so a block time is + specified. */ + if (xSemaphoreTake(xMutex, portMAX_DELAY) != pdPASS) { + /* This task would expect to obtain the mutex unless its wait for + the mutex was aborted. */ + if (xBlockWasAborted == pdFALSE) { + xErrorDetected = pdTRUE; + } else { + xBlockWasAborted = pdFALSE; + } + } else { + /* When the mutex is eventually obtained it is just given back before + returning to suspend ready for the next cycle. */ + if (xSemaphoreGive(xMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + } + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreGenericQueueTasksStillRunning(void) +{ + static uint32_t ulLastLoopCounter = 0, ulLastLoopCounter2 = 0; + + /* If the demo task is still running then we expect the loop counters to + have incremented since this function was last called. */ + if (ulLastLoopCounter == ulLoopCounter) { + xErrorDetected = pdTRUE; + } + + if (ulLastLoopCounter2 == ulLoopCounter2) { + xErrorDetected = pdTRUE; + } + + ulLastLoopCounter = ulLoopCounter; + ulLastLoopCounter2 = ulLoopCounter2; + + /* Errors detected in the task itself will have latched xErrorDetected + to true. */ + + return (BaseType_t)!xErrorDetected; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/IntSemTest.c b/freertos/cvitek/task/demo/Common/Minimal/IntSemTest.c new file mode 100644 index 000000000..f00b3ebd1 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/IntSemTest.c @@ -0,0 +1,506 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Demonstrates and tests mutexes being used from an interrupt. + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* Demo program include files. */ +#include "IntSemTest.h" + +/*-----------------------------------------------------------*/ + +/* The priorities of the test tasks. */ +#define intsemMASTER_PRIORITY (tskIDLE_PRIORITY) +#define intsemSLAVE_PRIORITY (tskIDLE_PRIORITY + 1) + +/* The rate at which the tick hook will give the mutex. */ +#define intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS (100) + +/* A block time of 0 means 'don't block'. */ +#define intsemNO_BLOCK 0 + +/* The maximum count value for the counting semaphore given from an +interrupt. */ +#define intsemMAX_COUNT 3 + +/*-----------------------------------------------------------*/ + +/* + * The master is a task that receives a mutex that is given from an interrupt - + * although generally mutexes should not be used given in interrupts (and + * definitely never taken in an interrupt) there are some circumstances when it + * may be desirable. + * + * The slave task is just used by the master task to force priority inheritance + * on a mutex that is shared between the master and the slave - which is a + * separate mutex to that given by the interrupt. + */ +static void vInterruptMutexSlaveTask(void *pvParameters); +static void vInterruptMutexMasterTask(void *pvParameters); + +/* + * A test whereby the master takes the shared and interrupt mutexes in that + * order, then gives them back in the same order, ensuring the priority + * inheritance is behaving as expected at each step. + */ +static void prvTakeAndGiveInTheSameOrder(void); + +/* + * A test whereby the master takes the shared and interrupt mutexes in that + * order, then gives them back in the opposite order to which they were taken, + * ensuring the priority inheritance is behaving as expected at each step. + */ +static void prvTakeAndGiveInTheOppositeOrder(void); + +/* + * A simple task that interacts with an interrupt using a counting semaphore, + * primarily for code coverage purposes. + */ +static void vInterruptCountingSemaphoreTask(void *pvParameters); + +/*-----------------------------------------------------------*/ + +/* Flag that will be latched to pdTRUE should any unexpected behaviour be +detected in any of the tasks. */ +static volatile BaseType_t xErrorDetected = pdFALSE; + +/* Counters that are incremented on each cycle of a test. This is used to +detect a stalled task - a test that is no longer running. */ +static volatile uint32_t ulMasterLoops = 0, ulCountingSemaphoreLoops = 0; + +/* Handles of the test tasks that must be accessed from other test tasks. */ +static TaskHandle_t xSlaveHandle; + +/* A mutex which is given from an interrupt - although generally mutexes should +not be used given in interrupts (and definitely never taken in an interrupt) +there are some circumstances when it may be desirable. */ +static SemaphoreHandle_t xISRMutex = NULL; + +/* A counting semaphore which is given from an interrupt. */ +static SemaphoreHandle_t xISRCountingSemaphore = NULL; + +/* A mutex which is shared between the master and slave tasks - the master +does both sharing of this mutex with the slave and receiving a mutex from the +interrupt. */ +static SemaphoreHandle_t xMasterSlaveMutex = NULL; + +/* Flag that allows the master task to control when the interrupt gives or does +not give the mutex. There is no mutual exclusion on this variable, but this is +only test code and it should be fine in the 32=bit test environment. */ +static BaseType_t xOkToGiveMutex = pdFALSE, + xOkToGiveCountingSemaphore = pdFALSE; + +/* Used to coordinate timing between tasks and the interrupt. */ +const TickType_t xInterruptGivePeriod = + pdMS_TO_TICKS(intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS); + +/*-----------------------------------------------------------*/ + +void vStartInterruptSemaphoreTasks(void) +{ + /* Create the semaphores that are given from an interrupt. */ + xISRMutex = xSemaphoreCreateMutex(); + configASSERT(xISRMutex); + xISRCountingSemaphore = xSemaphoreCreateCounting(intsemMAX_COUNT, 0); + configASSERT(xISRCountingSemaphore); + + /* Create the mutex that is shared between the master and slave tasks (the + master receives a mutex from an interrupt and shares a mutex with the + slave. */ + xMasterSlaveMutex = xSemaphoreCreateMutex(); + configASSERT(xMasterSlaveMutex); + + /* Create the tasks that share mutexes between then and with interrupts. */ + xTaskCreate(vInterruptMutexSlaveTask, "IntMuS", + configMINIMAL_STACK_SIZE, NULL, intsemSLAVE_PRIORITY, + &xSlaveHandle); + xTaskCreate(vInterruptMutexMasterTask, "IntMuM", + configMINIMAL_STACK_SIZE, NULL, intsemMASTER_PRIORITY, + NULL); + + /* Create the task that blocks on the counting semaphore. */ + xTaskCreate(vInterruptCountingSemaphoreTask, "IntCnt", + configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL); +} +/*-----------------------------------------------------------*/ + +static void vInterruptMutexMasterTask(void *pvParameters) +{ + /* Just to avoid compiler warnings. */ + (void)pvParameters; + + for (;;) { + prvTakeAndGiveInTheSameOrder(); + + /* Ensure not to starve out other tests. */ + ulMasterLoops++; + vTaskDelay(intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS); + + prvTakeAndGiveInTheOppositeOrder(); + + /* Ensure not to starve out other tests. */ + ulMasterLoops++; + vTaskDelay(intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS); + } +} +/*-----------------------------------------------------------*/ + +static void prvTakeAndGiveInTheSameOrder(void) +{ +/* Ensure the slave is suspended, and that this task is running at the + lower priority as expected as the start conditions. */ +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xSlaveHandle) == eSuspended); + } +#endif /* INCLUDE_eTaskGetState */ + + if (uxTaskPriorityGet(NULL) != intsemMASTER_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Take the semaphore that is shared with the slave. */ + if (xSemaphoreTake(xMasterSlaveMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* This task now has the mutex. Unsuspend the slave so it too + attempts to take the mutex. */ + vTaskResume(xSlaveHandle); + +/* The slave has the higher priority so should now have executed and + blocked on the semaphore. */ +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xSlaveHandle) == eBlocked); + } +#endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the slave + task. */ + if (uxTaskPriorityGet(NULL) != intsemSLAVE_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now wait a little longer than the time between ISR gives to also + obtain the ISR mutex. */ + xOkToGiveMutex = pdTRUE; + if (xSemaphoreTake(xISRMutex, (xInterruptGivePeriod * 2)) != pdPASS) { + xErrorDetected = pdTRUE; + } + xOkToGiveMutex = pdFALSE; + + /* Attempting to take again immediately should fail as the mutex is + already held. */ + if (xSemaphoreTake(xISRMutex, intsemNO_BLOCK) != pdFAIL) { + xErrorDetected = pdTRUE; + } + + /* Should still be at the priority of the slave task. */ + if (uxTaskPriorityGet(NULL) != intsemSLAVE_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Give back the ISR semaphore to ensure the priority is not + disinherited as the shared mutex (which the higher priority task is + attempting to obtain) is still held. */ + if (xSemaphoreGive(xISRMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + + if (uxTaskPriorityGet(NULL) != intsemSLAVE_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Finally give back the shared mutex. This time the higher priority + task should run before this task runs again - so this task should have + disinherited the priority and the higher priority task should be in the + suspended state again. */ + if (xSemaphoreGive(xMasterSlaveMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + + if (uxTaskPriorityGet(NULL) != intsemMASTER_PRIORITY) { + xErrorDetected = pdTRUE; + } + +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xSlaveHandle) == eSuspended); + } +#endif /* INCLUDE_eTaskGetState */ + + /* Reset the mutex ready for the next round. */ + xQueueReset(xISRMutex); +} +/*-----------------------------------------------------------*/ + +static void prvTakeAndGiveInTheOppositeOrder(void) +{ +/* Ensure the slave is suspended, and that this task is running at the + lower priority as expected as the start conditions. */ +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xSlaveHandle) == eSuspended); + } +#endif /* INCLUDE_eTaskGetState */ + + if (uxTaskPriorityGet(NULL) != intsemMASTER_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Take the semaphore that is shared with the slave. */ + if (xSemaphoreTake(xMasterSlaveMutex, intsemNO_BLOCK) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* This task now has the mutex. Unsuspend the slave so it too + attempts to take the mutex. */ + vTaskResume(xSlaveHandle); + +/* The slave has the higher priority so should now have executed and + blocked on the semaphore. */ +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xSlaveHandle) == eBlocked); + } +#endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the slave + task. */ + if (uxTaskPriorityGet(NULL) != intsemSLAVE_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Now wait a little longer than the time between ISR gives to also + obtain the ISR mutex. */ + xOkToGiveMutex = pdTRUE; + if (xSemaphoreTake(xISRMutex, (xInterruptGivePeriod * 2)) != pdPASS) { + xErrorDetected = pdTRUE; + } + xOkToGiveMutex = pdFALSE; + + /* Attempting to take again immediately should fail as the mutex is + already held. */ + if (xSemaphoreTake(xISRMutex, intsemNO_BLOCK) != pdFAIL) { + xErrorDetected = pdTRUE; + } + + /* Should still be at the priority of the slave task. */ + if (uxTaskPriorityGet(NULL) != intsemSLAVE_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Give back the shared semaphore to ensure the priority is not disinherited + as the ISR mutex is still held. The higher priority slave task should run + before this task runs again. */ + if (xSemaphoreGive(xMasterSlaveMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + + /* Should still be at the priority of the slave task as this task still + holds one semaphore (this is a simplification in the priority inheritance + mechanism. */ + if (uxTaskPriorityGet(NULL) != intsemSLAVE_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Give back the ISR semaphore, which should result in the priority being + disinherited as it was the last mutex held. */ + if (xSemaphoreGive(xISRMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + + if (uxTaskPriorityGet(NULL) != intsemMASTER_PRIORITY) { + xErrorDetected = pdTRUE; + } + + /* Reset the mutex ready for the next round. */ + xQueueReset(xISRMutex); +} +/*-----------------------------------------------------------*/ + +static void vInterruptMutexSlaveTask(void *pvParameters) +{ + /* Just to avoid compiler warnings. */ + (void)pvParameters; + + for (;;) { + /* This task starts by suspending itself so when it executes can be + controlled by the master task. */ + vTaskSuspend(NULL); + + /* This task will execute when the master task already holds the mutex. + Attempting to take the mutex will place this task in the Blocked + state. */ + if (xSemaphoreTake(xMasterSlaveMutex, portMAX_DELAY) != + pdPASS) { + xErrorDetected = pdTRUE; + } + + if (xSemaphoreGive(xMasterSlaveMutex) != pdPASS) { + xErrorDetected = pdTRUE; + } + } +} +/*-----------------------------------------------------------*/ + +static void vInterruptCountingSemaphoreTask(void *pvParameters) +{ + BaseType_t xCount; + const TickType_t xDelay = + pdMS_TO_TICKS(intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS) * + (intsemMAX_COUNT + 1); + + (void)pvParameters; + + for (;;) { + /* Expect to start with the counting semaphore empty. */ + if (uxQueueMessagesWaiting( + (QueueHandle_t)xISRCountingSemaphore) != 0) { + xErrorDetected = pdTRUE; + } + + /* Wait until it is expected that the interrupt will have filled the + counting semaphore. */ + xOkToGiveCountingSemaphore = pdTRUE; + vTaskDelay(xDelay); + xOkToGiveCountingSemaphore = pdFALSE; + + /* Now it is expected that the counting semaphore is full. */ + if (uxQueueMessagesWaiting( + (QueueHandle_t)xISRCountingSemaphore) != + intsemMAX_COUNT) { + xErrorDetected = pdTRUE; + } + + if (uxQueueSpacesAvailable( + (QueueHandle_t)xISRCountingSemaphore) != 0) { + xErrorDetected = pdTRUE; + } + + ulCountingSemaphoreLoops++; + + /* Expect to be able to take the counting semaphore intsemMAX_COUNT + times. A block time of 0 is used as the semaphore should already be + there. */ + xCount = 0; + while (xSemaphoreTake(xISRCountingSemaphore, 0) == pdPASS) { + xCount++; + } + + if (xCount != intsemMAX_COUNT) { + xErrorDetected = pdTRUE; + } + + /* Now raise the priority of this task so it runs immediately that the + semaphore is given from the interrupt. */ + vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1); + + /* Block to wait for the semaphore to be given from the interrupt. */ + xOkToGiveCountingSemaphore = pdTRUE; + xSemaphoreTake(xISRCountingSemaphore, portMAX_DELAY); + xSemaphoreTake(xISRCountingSemaphore, portMAX_DELAY); + xOkToGiveCountingSemaphore = pdFALSE; + + /* Reset the priority so as not to disturbe other tests too much. */ + vTaskPrioritySet(NULL, tskIDLE_PRIORITY); + + ulCountingSemaphoreLoops++; + } +} +/*-----------------------------------------------------------*/ + +void vInterruptSemaphorePeriodicTest(void) +{ + static TickType_t xLastGiveTime = 0; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + TickType_t xTimeNow; + + /* No mutual exclusion on xOkToGiveMutex, but this is only test code (and + only executed on a 32-bit architecture) so ignore that in this case. */ + xTimeNow = xTaskGetTickCountFromISR(); + if (((TickType_t)(xTimeNow - xLastGiveTime)) >= + pdMS_TO_TICKS(intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS)) { + configASSERT(xISRMutex); + if (xOkToGiveMutex != pdFALSE) { + /* Null is used as the second parameter in this give, and non-NULL + in the other gives for code coverage reasons. */ + xSemaphoreGiveFromISR(xISRMutex, NULL); + + /* Second give attempt should fail. */ + configASSERT( + xSemaphoreGiveFromISR( + xISRMutex, &xHigherPriorityTaskWoken) == + pdFAIL); + } + + if (xOkToGiveCountingSemaphore != pdFALSE) { + xSemaphoreGiveFromISR(xISRCountingSemaphore, + &xHigherPriorityTaskWoken); + } + xLastGiveTime = xTimeNow; + } + + /* Remove compiler warnings about the value being set but not used. */ + (void)xHigherPriorityTaskWoken; +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreInterruptSemaphoreTasksStillRunning(void) +{ + static uint32_t ulLastMasterLoopCounter = 0, + ulLastCountingSemaphoreLoops = 0; + + /* If the demo tasks are running then it is expected that the loop counters + will have changed since this function was last called. */ + if (ulLastMasterLoopCounter == ulMasterLoops) { + xErrorDetected = pdTRUE; + } + + ulLastMasterLoopCounter = ulMasterLoops; + + if (ulLastCountingSemaphoreLoops == ulCountingSemaphoreLoops) { + xErrorDetected = pdTRUE; + } + + ulLastCountingSemaphoreLoops = ulCountingSemaphoreLoops++; + + /* Errors detected in the task itself will have latched xErrorDetected + to true. */ + + return (BaseType_t)!xErrorDetected; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/MessageBufferAMP.c b/freertos/cvitek/task/demo/Common/Minimal/MessageBufferAMP.c new file mode 100644 index 000000000..e9cc02be5 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/MessageBufferAMP.c @@ -0,0 +1,320 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * An example that mimics a message buffer being used to pass data from one core + * to another. The core that sends the data is referred to as core A. The core + * that receives the data is referred to as core B. The task implemented by + * prvCoreATask() runs on core A. Two instances of the task implemented by + * prvCoreBTasks() run on core B. prvCoreATask() sends messages via message + * buffers to both instances of prvCoreBTasks(), one message buffer per channel. + * A third message buffer is used to pass the handle of the message buffer + * written to by core A to an interrupt service routine that is triggered by + * core A but executes on core B. + * + * The example relies on the FreeRTOS provided default implementation of + * sbSEND_COMPLETED() being overridden by an implementation in FreeRTOSConfig.h + * that writes the handle of the message buffer that contains data into the + * control message buffer, then generates an interrupt in core B. The necessary + * implementation is provided in this file and can be enabled by adding the + * following to FreeRTOSConfig.h: + * + * #define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateCoreBInterrupt( pxStreamBuffer ) + * + * Core to core communication via message buffer requires the message buffers + * to be at an address known to both cores within shared memory. + * + * Note that, while this example uses three message buffers, the same + * functionality can be implemented using a single message buffer by using the + * same design pattern described on the link below for queues, but using message + * buffers instead. It is actually simpler with a message buffer as variable + * length data can be written into the message buffer directly: + * http://www.freertos.org/Pend-on-multiple-rtos-objects.html#alternative_design_pattern + */ + +/* Standard includes. */ +#include "stdio.h" +#include "string.h" + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "message_buffer.h" + +/* Demo app includes. */ +#include "MessageBufferAMP.h" + +/* Enough for 3 4 byte pointers, including the additional 4 bytes per message +overhead of message buffers. */ +#define mbaCONTROL_MESSAGE_BUFFER_SIZE (24) + +/* Enough four 4 8 byte strings, plus the additional 4 bytes per message +overhead of message buffers. */ +#define mbaTASK_MESSAGE_BUFFER_SIZE (60) + +/* The number of instances of prvCoreBTasks that are created. */ +#define mbaNUMBER_OF_CORE_B_TASKS 2 + +/* A block time of 0 simply means, don't block. */ +#define mbaDONT_BLOCK 0 + +/* Macro that mimics an interrupt service routine executing by simply calling +the routine inline. */ +#define mbaGENERATE_CORE_B_INTERRUPT() prvCoreBInterruptHandler() + +/*-----------------------------------------------------------*/ + +/* + * Implementation of the task that, on a real dual core device, would run on + * core A and send message to tasks running on core B. + */ +static void prvCoreATask(void *pvParameters); + +/* + * Implementation of the task that, on a real dual core device, would run on + * core B and receive message from core A. The demo creates two instances of + * this task. + */ +static void prvCoreBTasks(void *pvParameters); + +/* + * The function that, on a real dual core device, would handle inter-core + * interrupts, but in this case is just called inline. + */ +static void prvCoreBInterruptHandler(void); + +/*-----------------------------------------------------------*/ + +/* The message buffers used to pass data from core A to core B. */ +static MessageBufferHandle_t xCoreBMessageBuffers[mbaNUMBER_OF_CORE_B_TASKS]; + +/* The control message buffer. This is used to pass the handle of the message +message buffer that holds application data into the core to core interrupt +service routine. */ +static MessageBufferHandle_t xControlMessageBuffer; + +/* Counters used to indicate to the check that the tasks are still executing. */ +static uint32_t ulCycleCounters[mbaNUMBER_OF_CORE_B_TASKS]; + +/* Set to pdFALSE if any errors are detected. Used to inform the check task +that something might be wrong. */ +BaseType_t xDemoStatus = pdPASS; + +/*-----------------------------------------------------------*/ + +void vStartMessageBufferAMPTasks(configSTACK_DEPTH_TYPE xStackSize) +{ + BaseType_t x; + + xControlMessageBuffer = + xMessageBufferCreate(mbaCONTROL_MESSAGE_BUFFER_SIZE); + + xTaskCreate( + prvCoreATask, /* The function that implements the task. */ + "AMPCoreA", /* Human readable name for the task. */ + xStackSize, /* Stack size (in words!). */ + NULL, /* Task parameter is not used. */ + tskIDLE_PRIORITY, /* The priority at which the task is created. */ + NULL); /* No use for the task handle. */ + + for (x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++) { + xCoreBMessageBuffers[x] = + xMessageBufferCreate(mbaTASK_MESSAGE_BUFFER_SIZE); + configASSERT(xCoreBMessageBuffers[x]); + + /* Pass the loop counter into the created task using the task's + parameter. The task then uses the value as an index into the + ulCycleCounters and xCoreBMessageBuffers arrays. */ + xTaskCreate(prvCoreBTasks, "AMPCoreB1", xStackSize, (void *)x, + tskIDLE_PRIORITY + 1, NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvCoreATask(void *pvParameters) +{ + BaseType_t x; + uint32_t ulNextValue = 0; + const TickType_t xDelay = pdMS_TO_TICKS(250); + char cString[15]; /* At least large enough to hold "4294967295\0" (0xffffffff). */ + + /* Remove warning about unused parameters. */ + (void)pvParameters; + + for (;;) { + /* Create the next string to send. The value is incremented on each + loop iteration, and the length of the string changes as the number of + digits in the value increases. */ + sprintf(cString, "%lu", (unsigned long)ulNextValue); + + /* Send the value from this (pseudo) Core A to the tasks on the (pseudo) + Core B via the message buffers. This will result in sbSEND_COMPLETED() + being executed, which in turn will write the handle of the message + buffer written to into xControlMessageBuffer then generate an interrupt + in core B. */ + for (x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++) { + xMessageBufferSend(/* The message buffer to write to. */ + xCoreBMessageBuffers[x], + /* The source of the data to send. */ + (void *)cString, + /* The length of the data to send. */ + strlen(cString), + /* The block time, should the buffer be full. */ + mbaDONT_BLOCK); + } + + /* Delay before repeating with a different and potentially different + length string. */ + vTaskDelay(xDelay); + ulNextValue++; + } +} +/*-----------------------------------------------------------*/ + +static void prvCoreBTasks(void *pvParameters) +{ + BaseType_t x; + size_t xReceivedBytes; + uint32_t ulNextValue = 0; + char cExpectedString + [15]; /* At least large enough to hold "4294967295\0" (0xffffffff). */ + char cReceivedString[15]; + + /* The index into the xCoreBMessageBuffers and ulLoopCounter arrays is + passed into this task using the task's parameter. */ + x = (BaseType_t)pvParameters; + configASSERT(x < mbaNUMBER_OF_CORE_B_TASKS); + + for (;;) { + /* Create the string that is expected to be received this time round. */ + sprintf(cExpectedString, "%lu", (unsigned long)ulNextValue); + + /* Wait to receive the next message from core A. */ + memset(cReceivedString, 0x00, sizeof(cReceivedString)); + xReceivedBytes = + xMessageBufferReceive(/* The message buffer to receive from. */ + xCoreBMessageBuffers[x], + /* Location to store received data. */ + cReceivedString, + /* Maximum number of bytes to receive. */ + sizeof(cReceivedString), + /* Ticks to wait if buffer is empty. */ + portMAX_DELAY); + + /* Check the number of bytes received was as expected. */ + configASSERT(xReceivedBytes == strlen(cExpectedString)); + (void)xReceivedBytes; /* Incase configASSERT() is not defined. */ + + /* If the received string matches that expected then increment the loop + counter so the check task knows this task is still running. */ + if (strcmp(cReceivedString, cExpectedString) == 0) { + (ulCycleCounters[x])++; + } else { + xDemoStatus = pdFAIL; + } + + /* Expect the next string in sequence the next time around. */ + ulNextValue++; + } +} +/*-----------------------------------------------------------*/ + +/* Called by the reimplementation of sbSEND_COMPLETED(), which can be defined +as follows in FreeRTOSConfig.h: +#define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateCoreBInterrupt( pxStreamBuffer ) +*/ +void vGenerateCoreBInterrupt(void *xUpdatedMessageBuffer) +{ + MessageBufferHandle_t xUpdatedBuffer = + (MessageBufferHandle_t)xUpdatedMessageBuffer; + + /* If sbSEND_COMPLETED() has been implemented as above, then this function + is called from within xMessageBufferSend(). As this function also calls + xMessageBufferSend() itself it is necessary to guard against a recursive + call. If the message buffer just updated is the message buffer written to + by this function, then this is a recursive call, and the function can just + exit without taking further action. */ + if (xUpdatedBuffer != xControlMessageBuffer) { + /* Use xControlMessageBuffer to pass the handle of the message buffer + written to by core A to the interrupt handler about to be generated in + core B. */ + xMessageBufferSend(xControlMessageBuffer, &xUpdatedBuffer, + sizeof(xUpdatedBuffer), mbaDONT_BLOCK); + + /* This is where the interrupt would be generated. In this case it is + not a genuine interrupt handler that executes, just a standard function + call. */ + mbaGENERATE_CORE_B_INTERRUPT(); + } +} +/*-----------------------------------------------------------*/ + +/* Handler for the interrupts that are triggered on core A but execute on core +B. */ +static void prvCoreBInterruptHandler(void) +{ + MessageBufferHandle_t xUpdatedMessageBuffer; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + /* xControlMessageBuffer contains the handle of the message buffer that + contains data. */ + if (xMessageBufferReceive(xControlMessageBuffer, &xUpdatedMessageBuffer, + sizeof(xUpdatedMessageBuffer), + mbaDONT_BLOCK) == + sizeof(xUpdatedMessageBuffer)) { + /* Call the API function that sends a notification to any task that is + blocked on the xUpdatedMessageBuffer message buffer waiting for data to + arrive. */ + xMessageBufferSendCompletedFromISR(xUpdatedMessageBuffer, + &xHigherPriorityTaskWoken); + } + + /* Normal FreeRTOS yield from interrupt semantics, where + xHigherPriorityTaskWoken is initialzed to pdFALSE and will then get set to + pdTRUE if the interrupt safe API unblocks a task that has a priority above + that of the currently executing task. */ + portYIELD_FROM_ISR(xHigherPriorityTaskWoken); +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreMessageBufferAMPTasksStillRunning(void) +{ + static uint32_t ulLastCycleCounters[mbaNUMBER_OF_CORE_B_TASKS] = { 0 }; + BaseType_t x; + + /* Called by the check task to determine the health status of the tasks + implemented in this demo. */ + for (x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++) { + if (ulLastCycleCounters[x] == ulCycleCounters[x]) { + xDemoStatus = pdFAIL; + } else { + ulLastCycleCounters[x] = ulCycleCounters[x]; + } + } + + return xDemoStatus; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/MessageBufferDemo.c b/freertos/cvitek/task/demo/Common/Minimal/MessageBufferDemo.c new file mode 100644 index 000000000..854c6d348 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/MessageBufferDemo.c @@ -0,0 +1,914 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* Standard includes. */ +#include "stdio.h" +#include "string.h" + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "message_buffer.h" + +/* Demo app includes. */ +#include "MessageBufferDemo.h" + +/* The number of bytes of storage in the message buffers used in this test. */ +#define mbMESSAGE_BUFFER_LENGTH_BYTES ((size_t)50) + +/* The number of additional bytes used to store the length of each message. */ +#define mbBYTES_TO_STORE_MESSAGE_LENGTH \ + (sizeof(configMESSAGE_BUFFER_LENGTH_TYPE)) + +/* Start and end ASCII characters used in messages sent to the buffers. */ +#define mbASCII_SPACE 32 +#define mbASCII_TILDA 126 + +/* Defines the number of tasks to create in this test and demo. */ +#define mbNUMBER_OF_ECHO_CLIENTS (2) +#define mbNUMBER_OF_SENDER_TASKS (2) + +/* Priority of the test tasks. The send and receive go from low to high +priority tasks, and from high to low priority tasks. */ +#define mbLOWER_PRIORITY (tskIDLE_PRIORITY) +#define mbHIGHER_PRIORITY (tskIDLE_PRIORITY + 1) + +/* Block times used when sending and receiving from the message buffers. */ +#define mbRX_TX_BLOCK_TIME pdMS_TO_TICKS(175UL) + +/* A block time of 0 means "don't block". */ +#define mbDONT_BLOCK (0) + +/*-----------------------------------------------------------*/ + +/* + * Performs various tests that do not require multiple tasks to interact. + */ +static void prvSingleTaskTests(MessageBufferHandle_t xMessageBuffer); + +/* + * Tests sending and receiving various lengths of messages via a message buffer. + * The echo client sends the messages to the echo server, which then sends the + * message back to the echo client which, checks it receives exactly what it + * sent. + */ +static void prvEchoClient(void *pvParameters); +static void prvEchoServer(void *pvParameters); + +/* + * Tasks that send and receive to a message buffer at a low priority and without + * blocking, so the send and receive functions interleave in time as the tasks + * are switched in and out. + */ +static void prvNonBlockingReceiverTask(void *pvParameters); +static void prvNonBlockingSenderTask(void *pvParameters); + +#if (configSUPPORT_STATIC_ALLOCATION == 1) +/* This file tests both statically and dynamically allocated message buffers. + Allocate the structures and buffers to be used by the statically allocated + objects, which get used in the echo tests. */ +static void prvReceiverTask(void *pvParameters); +static void prvSenderTask(void *pvParameters); + +static StaticMessageBuffer_t xStaticMessageBuffers[mbNUMBER_OF_ECHO_CLIENTS]; +static uint8_t ucBufferStorage[mbNUMBER_OF_SENDER_TASKS] + [mbMESSAGE_BUFFER_LENGTH_BYTES + 1]; +static uint32_t ulSenderLoopCounters[mbNUMBER_OF_SENDER_TASKS] = { 0 }; +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/*-----------------------------------------------------------*/ + +/* The buffers used by the echo client and server tasks. */ +typedef struct ECHO_MESSAGE_BUFFERS { + /* Handles to the data structures that describe the message buffers. */ + MessageBufferHandle_t xEchoClientBuffer; + MessageBufferHandle_t xEchoServerBuffer; +} EchoMessageBuffers_t; +static uint32_t ulEchoLoopCounters[mbNUMBER_OF_ECHO_CLIENTS] = { 0 }; + +/* The non-blocking tasks monitor their operation, and if no errors have been +found, increment ulNonBlockingRxCounter. xAreMessageBufferTasksStillRunning() +then checks ulNonBlockingRxCounter and only returns pdPASS if +ulNonBlockingRxCounter is still incrementing. */ +static uint32_t ulNonBlockingRxCounter = 0; + +/* A message that is longer than the buffer, parts of which are written to the +message buffer to test writing different lengths at different offsets. */ +static const char *pc55ByteString = + "One two three four five six seven eight nine ten eleve"; + +/* Remember the required stack size so tasks can be created at run time (after +initialisation time. */ +static configSTACK_DEPTH_TYPE xBlockingStackSize = 0; + +/*-----------------------------------------------------------*/ + +void vStartMessageBufferTasks(configSTACK_DEPTH_TYPE xStackSize) +{ + MessageBufferHandle_t xMessageBuffer; + +#ifndef configMESSAGE_BUFFER_BLOCK_TASK_STACK_SIZE + xBlockingStackSize = (xStackSize + (xStackSize >> 1U)); +#else + xBlockingStackSize = configMESSAGE_BUFFER_BLOCK_TASK_STACK_SIZE; +#endif + + /* The echo servers sets up the message buffers before creating the echo + client tasks. One set of tasks has the server as the higher priority, and + the other has the client as the higher priority. */ + xTaskCreate(prvEchoServer, "1EchoServer", xBlockingStackSize, NULL, + mbHIGHER_PRIORITY, NULL); + xTaskCreate(prvEchoServer, "2EchoServer", xBlockingStackSize, NULL, + mbLOWER_PRIORITY, NULL); + + /* The non blocking tasks run continuously and will interleave with each + other, so must be created at the lowest priority. The message buffer they + use is created and passed in using the task's parameter. */ + xMessageBuffer = xMessageBufferCreate(mbMESSAGE_BUFFER_LENGTH_BYTES); + xTaskCreate(prvNonBlockingReceiverTask, "NonBlkRx", xStackSize, + (void *)xMessageBuffer, tskIDLE_PRIORITY, NULL); + xTaskCreate(prvNonBlockingSenderTask, "NonBlkTx", xStackSize, + (void *)xMessageBuffer, tskIDLE_PRIORITY, NULL); + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + /* The sender tasks set up the message buffers before creating the + receiver tasks. Priorities must be 0 and 1 as the priority is used to + index into the xStaticMessageBuffers and ucBufferStorage arrays. */ + xTaskCreate(prvSenderTask, "1Sender", xBlockingStackSize, NULL, + mbHIGHER_PRIORITY, NULL); + xTaskCreate(prvSenderTask, "2Sender", xBlockingStackSize, NULL, + mbLOWER_PRIORITY, NULL); + } +#endif /* configSUPPORT_STATIC_ALLOCATION */ +} +/*-----------------------------------------------------------*/ + +static void prvSingleTaskTests(MessageBufferHandle_t xMessageBuffer) +{ + size_t xReturned, xItem, xExpectedSpace, xNextLength; + const size_t xMax6ByteMessages = mbMESSAGE_BUFFER_LENGTH_BYTES / + (6 + mbBYTES_TO_STORE_MESSAGE_LENGTH); + const size_t x6ByteLength = 6, x17ByteLength = 17; + uint8_t *pucFullBuffer, *pucData, *pucReadData; + TickType_t xTimeBeforeCall, xTimeAfterCall; + const TickType_t xBlockTime = pdMS_TO_TICKS(25), + xAllowableMargin = pdMS_TO_TICKS(3); + UBaseType_t uxOriginalPriority; + + /* Remove warning in case configASSERT() is not defined. */ + (void)xAllowableMargin; + + /* To minimise stack and heap usage a full size buffer is allocated from + the heap, then buffers which hold smaller amounts of data are overlayed + with the larger buffer - just make sure not to use both at once!. */ + pucFullBuffer = pvPortMalloc(mbMESSAGE_BUFFER_LENGTH_BYTES); + configASSERT(pucFullBuffer); + + pucData = pucFullBuffer; + pucReadData = pucData + x17ByteLength; + + /* Nothing has been added or removed yet, so expect the free space to be + exactly as created and the length of the next message to be 0. */ + xExpectedSpace = xMessageBufferSpaceAvailable(xMessageBuffer); + configASSERT(xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES); + configASSERT(xMessageBufferIsEmpty(xMessageBuffer) == pdTRUE); + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == 0); + /* In case configASSERT() is not define. */ + (void)xExpectedSpace; + (void)xNextLength; + + /* The buffer is 50 bytes long. When an item is added to the buffer an + additional 4 bytes are added to hold the item's size. That means adding + 6 bytes to the buffer will actually add 10 bytes to the buffer. Therefore, + with a 50 byte buffer, a maximum of 5 6 bytes items can be added before the + buffer is completely full. NOTE: The numbers in this paragraph assume + sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) == 4. */ + for (xItem = 0; xItem < xMax6ByteMessages; xItem++) { + configASSERT(xMessageBufferIsFull(xMessageBuffer) == pdFALSE); + + /* Generate recognisable data to write to the buffer. This is just + ascii characters that shows which loop iteration the data was written + in. The 'FromISR' version is used to give it some exercise as a block + time is not used. That requires the call to be in a critical section + so this code can also run on FreeRTOS ports that do not support + interrupt nesting (and so don't have interrupt safe critical + sections).*/ + memset((void *)pucData, ((int)'0') + (int)xItem, x6ByteLength); + taskENTER_CRITICAL(); + { + xReturned = + xMessageBufferSendFromISR(xMessageBuffer, + (void *)pucData, + x6ByteLength, NULL); + } + taskEXIT_CRITICAL(); + configASSERT(xReturned == x6ByteLength); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* The space in the buffer will have reduced by the amount of user data + written into the buffer and the amount of space used to store the length + of the data written into the buffer. */ + xExpectedSpace -= + (x6ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH); + xReturned = xMessageBufferSpaceAvailable(xMessageBuffer); + configASSERT(xReturned == xExpectedSpace); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Only 6 byte messages are written. */ + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == x6ByteLength); + (void)xNextLength; /* In case configASSERT() is not defined. */ + } + + /* Now the buffer should be full, and attempting to add anything will should + fail. */ + configASSERT(xMessageBufferIsFull(xMessageBuffer) == pdTRUE); + xReturned = xMessageBufferSend(xMessageBuffer, (void *)pucData, + sizeof(pucData[0]), mbDONT_BLOCK); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Adding with a timeout should also fail after the appropriate time. The + priority is temporarily boosted in this part of the test to keep the + allowable margin to a minimum. */ + uxOriginalPriority = uxTaskPriorityGet(NULL); + vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xMessageBufferSend(xMessageBuffer, (void *)pucData, + sizeof(pucData[0]), xBlockTime); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet(NULL, uxOriginalPriority); + configASSERT(((TickType_t)(xTimeAfterCall - xTimeBeforeCall)) >= + xBlockTime); + configASSERT(((TickType_t)(xTimeAfterCall - xTimeBeforeCall)) < + (xBlockTime + xAllowableMargin)); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + (void)xTimeBeforeCall; + (void)xTimeAfterCall; + + /* The buffer is now full of data in the form "000000", "111111", etc. Make + sure the data is read out as expected. */ + for (xItem = 0; xItem < xMax6ByteMessages; xItem++) { + /* Generate the data that is expected to be read out for this loop + iteration. */ + memset((void *)pucData, ((int)'0') + (int)xItem, x6ByteLength); + + /* Try reading the message into a buffer that is too small. The message + should remain in the buffer. */ + xReturned = + xMessageBufferReceive(xMessageBuffer, + (void *)pucReadData, + x6ByteLength - 1, mbDONT_BLOCK); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Should still be at least one 6 byte message still available. */ + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == x6ByteLength); + (void)xNextLength; /* In case configASSERT() is not defined. */ + + /* Read the next 6 bytes out. The 'FromISR' version is used to give it + some exercise as a block time is not used. THa requires the code to be + in a critical section so this test can be run with FreeRTOS ports that + do not support interrupt nesting (and therefore don't have interrupt + safe critical sections). */ + taskENTER_CRITICAL(); + { + xReturned = xMessageBufferReceiveFromISR( + xMessageBuffer, (void *)pucReadData, + x6ByteLength, NULL); + } + taskEXIT_CRITICAL(); + configASSERT(xReturned == x6ByteLength); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Does the data read out match that expected? */ + configASSERT(memcmp((void *)pucData, (void *)pucReadData, + x6ByteLength) == 0); + + /* The space in the buffer will have increased by the amount of user + data read from into the buffer and the amount of space used to store the + length of the data read into the buffer. */ + xExpectedSpace += + (x6ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH); + xReturned = xMessageBufferSpaceAvailable(xMessageBuffer); + configASSERT(xReturned == xExpectedSpace); + (void)xReturned; /* In case configASSERT() is not defined. */ + } + + /* The buffer should be empty again. */ + configASSERT(xMessageBufferIsEmpty(xMessageBuffer) == pdTRUE); + xExpectedSpace = xMessageBufferSpaceAvailable(xMessageBuffer); + configASSERT(xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES); + (void)xExpectedSpace; /* In case configASSERT() is not defined. */ + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == 0); + (void)xNextLength; /* In case configASSERT() is not defined. */ + + /* Reading with a timeout should also fail after the appropriate time. The + priority is temporarily boosted in this part of the test to keep the + allowable margin to a minimum. */ + vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xMessageBufferReceive(xMessageBuffer, (void *)pucReadData, + x6ByteLength, xBlockTime); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet(NULL, uxOriginalPriority); + configASSERT((xTimeAfterCall - xTimeBeforeCall) >= xBlockTime); + configASSERT((xTimeAfterCall - xTimeBeforeCall) < + (xBlockTime + xAllowableMargin)); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + (void)xTimeBeforeCall; + (void)xTimeAfterCall; + + /* In the next loop 17 bytes are written to then read out on each iteration. + The expected length variable is always used after 17 bytes have been written + into the buffer - the length of the message is also written, making a total + of 21 bytes consumed for each 17 byte message. */ + xExpectedSpace = mbMESSAGE_BUFFER_LENGTH_BYTES - + (x17ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH); + + /* Reading and writing 17 bytes at a time will result in 21 bytes being + written into the buffer, and as 50 is not divisible by 21, writing multiple + times will cause the data to wrap in the buffer.*/ + for (xItem = 0; xItem < 100; xItem++) { + /* Generate recognisable data to write to the queue. This is just + ascii characters that shows which loop iteration the data was written + in. */ + memset((void *)pucData, ((int)'0') + (int)xItem, x17ByteLength); + xReturned = xMessageBufferSend(xMessageBuffer, (void *)pucData, + x17ByteLength, mbDONT_BLOCK); + configASSERT(xReturned == x17ByteLength); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Only 17 byte messages are written. */ + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == x17ByteLength); + (void)xNextLength; /* In case configASSERT() is not defined. */ + + /* The space in the buffer will have reduced by the amount of user data + written into the buffer and the amount of space used to store the length + of the data written into the buffer. */ + xReturned = xMessageBufferSpaceAvailable(xMessageBuffer); + configASSERT(xReturned == xExpectedSpace); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Read the 17 bytes out again. */ + xReturned = xMessageBufferReceive(xMessageBuffer, + (void *)pucReadData, + x17ByteLength, mbDONT_BLOCK); + configASSERT(xReturned == x17ByteLength); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Does the data read out match that expected? */ + configASSERT(memcmp((void *)pucData, (void *)pucReadData, + x17ByteLength) == 0); + + /* Don't expect any messages to be available as the data was read out + again. */ + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == 0); + (void)xNextLength; /* In case configASSERT() is not defined. */ + } + + /* The buffer should be empty again. */ + configASSERT(xMessageBufferIsEmpty(xMessageBuffer) == pdTRUE); + xExpectedSpace = xMessageBufferSpaceAvailable(xMessageBuffer); + configASSERT(xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES); + + /* Cannot write within sizeof( size_t ) (assumed to be 4 bytes in this test) + bytes of the full 50 bytes, as that would not leave space for the four bytes + taken by the data length. */ + xReturned = + xMessageBufferSend(xMessageBuffer, (const void *)pc55ByteString, + mbMESSAGE_BUFFER_LENGTH_BYTES, mbDONT_BLOCK); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ +#ifndef configMESSAGE_BUFFER_LENGTH_TYPE + { + /* The following will fail if configMESSAGE_BUFFER_LENGTH_TYPE is set + to a non 32-bit type. */ + xReturned = xMessageBufferSend( + xMessageBuffer, (const void *)pc55ByteString, + mbMESSAGE_BUFFER_LENGTH_BYTES - 1, mbDONT_BLOCK); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + xReturned = xMessageBufferSend( + xMessageBuffer, (const void *)pc55ByteString, + mbMESSAGE_BUFFER_LENGTH_BYTES - 2, mbDONT_BLOCK); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + xReturned = xMessageBufferSend( + xMessageBuffer, (const void *)pc55ByteString, + mbMESSAGE_BUFFER_LENGTH_BYTES - 3, mbDONT_BLOCK); + configASSERT(xReturned == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + } +#endif + + /* Don't expect any messages to be available as the above were too large to + get written. */ + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == 0); + (void)xNextLength; /* In case configASSERT() is not defined. */ + + /* Can write mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) bytes though. */ + xReturned = xMessageBufferSend( + xMessageBuffer, (const void *)pc55ByteString, + mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof(size_t), mbDONT_BLOCK); + configASSERT(xReturned == + mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof(size_t)); + (void)xReturned; /* In case configASSERT() is not defined. */ + xNextLength = xMessageBufferNextLengthBytes(xMessageBuffer); + configASSERT(xNextLength == + (mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof(size_t))); + (void)xNextLength; /* In case configASSERT() is not defined. */ + xReturned = xMessageBufferReceive( + xMessageBuffer, (void *)pucFullBuffer, + mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof(size_t), mbDONT_BLOCK); + configASSERT(xReturned == + (mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof(size_t))); + (void)xReturned; /* In case configASSERT() is not defined. */ + configASSERT(memcmp((const void *)pucFullBuffer, pc55ByteString, + mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof(size_t)) == + 0); + + /* Clean up. */ + vPortFree(pucFullBuffer); + xMessageBufferReset(xMessageBuffer); +} +/*-----------------------------------------------------------*/ + +static void prvNonBlockingSenderTask(void *pvParameters) +{ + MessageBufferHandle_t xMessageBuffer; + int32_t iDataToSend = 0; + size_t xStringLength; + const int32_t iMaxValue = 1500; + char cTxString[12]; /* Large enough to hold a 32 number in ASCII. */ + + /* In this case the message buffer has already been created and is passed + into the task using the task's parameter. */ + xMessageBuffer = (MessageBufferHandle_t)pvParameters; + + /* Create a string from an incrementing number. The length of the + string will increase and decrease as the value of the number increases + then overflows. */ + memset(cTxString, 0x00, sizeof(cTxString)); + sprintf(cTxString, "%d", (int)iDataToSend); + xStringLength = strlen(cTxString); + + for (;;) { + /* Doesn't block so calls can interleave with the non-blocking + receives performed by prvNonBlockingReceiverTask(). */ + if (xMessageBufferSend(xMessageBuffer, (void *)cTxString, + strlen(cTxString), + mbDONT_BLOCK) == xStringLength) { + iDataToSend++; + + if (iDataToSend > iMaxValue) { + /* The value sent is reset back to 0 to ensure the string being sent + does not remain at the same length for too long. */ + iDataToSend = 0; + } + + /* Create the next string. */ + memset(cTxString, 0x00, sizeof(cTxString)); + sprintf(cTxString, "%d", (int)iDataToSend); + xStringLength = strlen(cTxString); + } + } +} +/*-----------------------------------------------------------*/ + +static void prvNonBlockingReceiverTask(void *pvParameters) +{ + MessageBufferHandle_t xMessageBuffer; + BaseType_t xNonBlockingReceiveError = pdFALSE; + int32_t iDataToSend = 0; + size_t xStringLength, xReceiveLength; + const int32_t iMaxValue = 1500; + char cExpectedString[12]; /* Large enough to hold a 32 number in ASCII. */ + char cRxString[12]; + + /* In this case the message buffer has already been created and is passed + into the task using the task's parameter. */ + xMessageBuffer = (MessageBufferHandle_t)pvParameters; + + /* Create a string from an incrementing number. The length of the + string will increase and decrease as the value of the number increases + then overflows. This should always match the string sent to the buffer by + the non blocking sender task. */ + memset(cExpectedString, 0x00, sizeof(cExpectedString)); + memset(cRxString, 0x00, sizeof(cRxString)); + sprintf(cExpectedString, "%d", (int)iDataToSend); + xStringLength = strlen(cExpectedString); + + for (;;) { + /* Doesn't block so calls can interleave with the non-blocking + receives performed by prvNonBlockingReceiverTask(). */ + xReceiveLength = + xMessageBufferReceive(xMessageBuffer, (void *)cRxString, + sizeof(cRxString), mbDONT_BLOCK); + + /* Should only ever receive no data is available, or the expected + length of data is available. */ + if ((xReceiveLength != 0) && + (xReceiveLength != xStringLength)) { + xNonBlockingReceiveError = pdTRUE; + } + + if (xReceiveLength == xStringLength) { + /* Ensure the received data was that expected, then generate the + next expected string. */ + if (strcmp(cRxString, cExpectedString) != 0) { + xNonBlockingReceiveError = pdTRUE; + } + + iDataToSend++; + + if (iDataToSend > iMaxValue) { + /* The value sent is reset back to 0 to ensure the string being sent + does not remain at the same length for too long. */ + iDataToSend = 0; + } + + memset(cExpectedString, 0x00, sizeof(cExpectedString)); + memset(cRxString, 0x00, sizeof(cRxString)); + sprintf(cExpectedString, "%d", (int)iDataToSend); + xStringLength = strlen(cExpectedString); + + if (xNonBlockingReceiveError == pdFALSE) { + /* No errors detected so increment the counter that lets the + check task know this test is still functioning correctly. */ + ulNonBlockingRxCounter++; + } + } + } +} +/*-----------------------------------------------------------*/ + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + +static void prvSenderTask(void *pvParameters) +{ + MessageBufferHandle_t xMessageBuffer, xTempMessageBuffer; + int32_t iDataToSend = 0; + const int32_t iSendsBetweenIncrements = 100; + char cTxString[12]; /* Large enough to hold a 32 number in ASCII. */ + const TickType_t xTicksToWait = mbRX_TX_BLOCK_TIME, + xShortDelay = pdMS_TO_TICKS(50); + StaticMessageBuffer_t xStaticMessageBuffer; + size_t xBytesSent; + + /* The task's priority is used as an index into the loop counters used to + indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet(NULL); + + /* Make sure a change in priority does not inadvertently result in an + invalid array index. */ + configASSERT(uxIndex < mbNUMBER_OF_ECHO_CLIENTS); + + /* Avoid compiler warnings about unused parameters. */ + (void)pvParameters; + + xMessageBuffer = xMessageBufferCreateStatic( + sizeof(ucBufferStorage) / + mbNUMBER_OF_SENDER_TASKS, /* The number of bytes in each buffer in the array. */ + &(ucBufferStorage + [uxIndex] + [0]), /* The address of the buffer to use within the array. */ + &(xStaticMessageBuffers + [uxIndex])); /* The static message buffer structure to use within the array. */ + + /* Now the message buffer has been created the receiver task can be created. + If this sender task has the higher priority then the receiver task is + created at the lower priority - if this sender task has the lower priority + then the receiver task is created at the higher priority. */ + if (uxTaskPriorityGet(NULL) == mbLOWER_PRIORITY) { + /* Here prvSingleTaskTests() performs various tests on a message buffer + that was created statically. */ + prvSingleTaskTests(xMessageBuffer); + xTaskCreate(prvReceiverTask, "MsgReceiver", xBlockingStackSize, + (void *)xMessageBuffer, mbHIGHER_PRIORITY, NULL); + } else { + xTaskCreate(prvReceiverTask, "MsgReceiver", xBlockingStackSize, + (void *)xMessageBuffer, mbLOWER_PRIORITY, NULL); + } + + for (;;) { + /* Create a string from an incrementing number. The length of the + string will increase and decrease as the value of the number increases + then overflows. */ + memset(cTxString, 0x00, sizeof(cTxString)); + sprintf(cTxString, "%d", (int)iDataToSend); + + do { + xBytesSent = xMessageBufferSend(xMessageBuffer, + (void *)cTxString, + strlen(cTxString), + xTicksToWait); + } while ( + xBytesSent == + 0); /* Buffer may become full when receiver is running at the idle priority. */ + + iDataToSend++; + + if ((iDataToSend % iSendsBetweenIncrements) == 0) { + /* Increment a loop counter so a check task can tell this task is + still running as expected. */ + ulSenderLoopCounters[uxIndex]++; + + if (uxTaskPriorityGet(NULL) == mbHIGHER_PRIORITY) { + /* Allow other tasks to run. */ + vTaskDelay(xShortDelay); + } + + /* This message buffer is just created and deleted to ensure no + issues when attempting to delete a message buffer that was + created using statically allocated memory. To save stack space + the buffer is set to point to the cTxString array - this is + ok because nothing is actually written to the memory. */ + xTempMessageBuffer = xMessageBufferCreateStatic( + sizeof(cTxString), (uint8_t *)cTxString, + &xStaticMessageBuffer); + vMessageBufferDelete(xTempMessageBuffer); + } + } +} + +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + +static void prvReceiverTask(void *pvParameters) +{ + MessageBufferHandle_t *const pxMessageBuffer = + (MessageBufferHandle_t *)pvParameters; + char cExpectedString + [12]; /* Large enough to hold a 32-bit number in ASCII. */ + char cReceivedString + [12]; /* Large enough to hold a 32-bit number in ASCII. */ + int32_t iExpectedData = 0; + const TickType_t xTicksToWait = pdMS_TO_TICKS(5UL); + size_t xReceivedBytes; + + for (;;) { + /* Generate the next expected string in the cExpectedString buffer. */ + memset(cExpectedString, 0x00, sizeof(cExpectedString)); + sprintf(cExpectedString, "%d", (int)iExpectedData); + + /* Receive the next string from the message buffer. */ + memset(cReceivedString, 0x00, sizeof(cReceivedString)); + + do { + xReceivedBytes = xMessageBufferReceive( + pxMessageBuffer, (void *)cReceivedString, + sizeof(cExpectedString), xTicksToWait); + + } while (xReceivedBytes == 0); + + /* Ensure the received string matches the expected string. */ + configASSERT(strcmp(cExpectedString, cReceivedString) == 0); + + iExpectedData++; + } +} + +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +static void prvEchoClient(void *pvParameters) +{ + size_t xSendLength = 0, ux; + char *pcStringToSend, *pcStringReceived, cNextChar = mbASCII_SPACE; + const TickType_t xTicksToWait = pdMS_TO_TICKS(50); + + /* The task's priority is used as an index into the loop counters used to +indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet(NULL); + + /* Pointers to the client and server message buffers are passed into this task +using the task's parameter. */ + EchoMessageBuffers_t *pxMessageBuffers = + (EchoMessageBuffers_t *)pvParameters; + + /* Prevent compiler warnings. */ + (void)pvParameters; + + /* Create the buffer into which strings to send to the server will be + created, and the buffer into which strings echoed back from the server will + be copied. */ + pcStringToSend = (char *)pvPortMalloc(mbMESSAGE_BUFFER_LENGTH_BYTES); + pcStringReceived = (char *)pvPortMalloc(mbMESSAGE_BUFFER_LENGTH_BYTES); + + configASSERT(pcStringToSend); + configASSERT(pcStringReceived); + + for (;;) { + /* Generate the length of the next string to send. */ + xSendLength++; + + /* The message buffer is being used to hold variable length data, so + each data item requires sizeof( size_t ) bytes to hold the data's + length, hence the sizeof() in the if() condition below. */ + if (xSendLength > + (mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof(size_t))) { + /* Back to a string length of 1. */ + xSendLength = sizeof(char); + + /* Maintain a count of the number of times this code executes so a + check task can determine if this task is still functioning as + expected or not. As there are two client tasks, and the priorities + used are 0 and 1, the task's priority is used as an index into the + loop count array. */ + ulEchoLoopCounters[uxIndex]++; + } + + memset(pcStringToSend, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES); + + for (ux = 0; ux < xSendLength; ux++) { + pcStringToSend[ux] = cNextChar; + + cNextChar++; + + if (cNextChar > mbASCII_TILDA) { + cNextChar = mbASCII_SPACE; + } + } + + /* Send the generated string to the buffer. */ + do { + ux = xMessageBufferSend( + pxMessageBuffers->xEchoClientBuffer, + (void *)pcStringToSend, xSendLength, + xTicksToWait); + + if (ux == 0) { + mtCOVERAGE_TEST_MARKER(); + } + + } while (ux == 0); + + /* Wait for the string to be echoed back. */ + memset(pcStringReceived, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES); + xMessageBufferReceive(pxMessageBuffers->xEchoServerBuffer, + (void *)pcStringReceived, xSendLength, + portMAX_DELAY); + + configASSERT(strcmp(pcStringToSend, pcStringReceived) == 0); + } +} +/*-----------------------------------------------------------*/ + +static void prvEchoServer(void *pvParameters) +{ + MessageBufferHandle_t xTempMessageBuffer; + size_t xReceivedLength; + char *pcReceivedString; + EchoMessageBuffers_t xMessageBuffers; + TickType_t xTimeOnEntering; + const TickType_t xTicksToBlock = pdMS_TO_TICKS(250UL); + + /* Prevent compiler warnings about unused parameters. */ + (void)pvParameters; + + /* Create the message buffer used to send data from the client to the server, + and the message buffer used to echo the data from the server back to the + client. */ + xMessageBuffers.xEchoClientBuffer = + xMessageBufferCreate(mbMESSAGE_BUFFER_LENGTH_BYTES); + xMessageBuffers.xEchoServerBuffer = + xMessageBufferCreate(mbMESSAGE_BUFFER_LENGTH_BYTES); + configASSERT(xMessageBuffers.xEchoClientBuffer); + configASSERT(xMessageBuffers.xEchoServerBuffer); + + /* Create the buffer into which received strings will be copied. */ + pcReceivedString = (char *)pvPortMalloc(mbMESSAGE_BUFFER_LENGTH_BYTES); + configASSERT(pcReceivedString); + + /* Don't expect to receive anything yet! */ + xTimeOnEntering = xTaskGetTickCount(); + xReceivedLength = xMessageBufferReceive( + xMessageBuffers.xEchoClientBuffer, (void *)pcReceivedString, + mbMESSAGE_BUFFER_LENGTH_BYTES, xTicksToBlock); + configASSERT(((TickType_t)(xTaskGetTickCount() - xTimeOnEntering)) >= + xTicksToBlock); + configASSERT(xReceivedLength == 0); + (void)xTimeOnEntering; /* In case configASSERT() is not defined. */ + + /* Now the message buffers have been created the echo client task can be + created. If this server task has the higher priority then the client task + is created at the lower priority - if this server task has the lower + priority then the client task is created at the higher priority. */ + if (uxTaskPriorityGet(NULL) == mbLOWER_PRIORITY) { + xTaskCreate(prvEchoClient, "EchoClient", + configMINIMAL_STACK_SIZE, (void *)&xMessageBuffers, + mbHIGHER_PRIORITY, NULL); + } else { + /* Here prvSingleTaskTests() performs various tests on a message buffer + that was created dynamically. */ + prvSingleTaskTests(xMessageBuffers.xEchoClientBuffer); + xTaskCreate(prvEchoClient, "EchoClient", + configMINIMAL_STACK_SIZE, (void *)&xMessageBuffers, + mbLOWER_PRIORITY, NULL); + } + + for (;;) { + memset(pcReceivedString, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES); + + /* Has any data been sent by the client? */ + xReceivedLength = + xMessageBufferReceive(xMessageBuffers.xEchoClientBuffer, + (void *)pcReceivedString, + mbMESSAGE_BUFFER_LENGTH_BYTES, + portMAX_DELAY); + + /* Should always receive data as max delay was used. */ + configASSERT(xReceivedLength > 0); + + /* Echo the received data back to the client. */ + xMessageBufferSend(xMessageBuffers.xEchoServerBuffer, + (void *)pcReceivedString, xReceivedLength, + portMAX_DELAY); + + /* This message buffer is just created and deleted to ensure no memory + leaks. */ + xTempMessageBuffer = + xMessageBufferCreate(mbMESSAGE_BUFFER_LENGTH_BYTES); + vMessageBufferDelete(xTempMessageBuffer); + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreMessageBufferTasksStillRunning(void) +{ + static uint32_t ulLastEchoLoopCounters[mbNUMBER_OF_ECHO_CLIENTS] = { 0 }; + static uint32_t ulLastNonBlockingRxCounter = 0; + BaseType_t xReturn = pdPASS, x; + + for (x = 0; x < mbNUMBER_OF_ECHO_CLIENTS; x++) { + if (ulLastEchoLoopCounters[x] == ulEchoLoopCounters[x]) { + xReturn = pdFAIL; + } else { + ulLastEchoLoopCounters[x] = ulEchoLoopCounters[x]; + } + } + + if (ulNonBlockingRxCounter == ulLastNonBlockingRxCounter) { + xReturn = pdFAIL; + } else { + ulLastNonBlockingRxCounter = ulNonBlockingRxCounter; + } + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + static uint32_t + ulLastSenderLoopCounters[mbNUMBER_OF_ECHO_CLIENTS] = { + 0 + }; + + for (x = 0; x < mbNUMBER_OF_SENDER_TASKS; x++) { + if (ulLastSenderLoopCounters[x] == + ulSenderLoopCounters[x]) { + xReturn = pdFAIL; + } else { + ulLastSenderLoopCounters[x] = + ulSenderLoopCounters[x]; + } + } + } +#endif /* configSUPPORT_STATIC_ALLOCATION */ + + return xReturn; +} +/*-----------------------------------------------------------*/ diff --git a/freertos/cvitek/task/demo/Common/Minimal/PollQ.c b/freertos/cvitek/task/demo/Common/Minimal/PollQ.c new file mode 100644 index 000000000..dfc1dd761 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/PollQ.c @@ -0,0 +1,216 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This version of PollQ. c is for use on systems that have limited stack + * space and no display facilities. The complete version can be found in + * the Demo/Common/Full directory. + * + * Creates two tasks that communicate over a single queue. One task acts as a + * producer, the other a consumer. + * + * The producer loops for three iteration, posting an incrementing number onto the + * queue each cycle. It then delays for a fixed period before doing exactly the + * same again. + * + * The consumer loops emptying the queue. Each item removed from the queue is + * checked to ensure it contains the expected value. When the queue is empty it + * blocks for a fixed period, then does the same again. + * + * All queue access is performed without blocking. The consumer completely empties + * the queue each time it runs so the producer should never find the queue full. + * + * An error is flagged if the consumer obtains an unexpected value or the producer + * find the queue is full. + */ + +/* +Changes from V2.0.0 + + + Delay periods are now specified using variables and constants of + TickType_t rather than uint32_t. +*/ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo program include files. */ +#include "PollQ.h" + +#define pollqSTACK_SIZE configMINIMAL_STACK_SIZE +#define pollqQUEUE_SIZE (10) +#define pollqPRODUCER_DELAY (pdMS_TO_TICKS((TickType_t)200)) +#define pollqCONSUMER_DELAY \ + (pollqPRODUCER_DELAY - (TickType_t)(20 / portTICK_PERIOD_MS)) +#define pollqNO_DELAY ((TickType_t)0) +#define pollqVALUES_TO_PRODUCE ((BaseType_t)3) +#define pollqINITIAL_VALUE ((BaseType_t)0) + +/* The task that posts the incrementing number onto the queue. */ +static portTASK_FUNCTION_PROTO(vPolledQueueProducer, pvParameters); + +/* The task that empties the queue. */ +static portTASK_FUNCTION_PROTO(vPolledQueueConsumer, pvParameters); + +/* Variables that are used to check that the tasks are still running with no +errors. */ +static volatile BaseType_t xPollingConsumerCount = pollqINITIAL_VALUE, + xPollingProducerCount = pollqINITIAL_VALUE; + +/*-----------------------------------------------------------*/ + +void vStartPolledQueueTasks(UBaseType_t uxPriority) +{ + static QueueHandle_t xPolledQueue; + + /* Create the queue used by the producer and consumer. */ + xPolledQueue = + xQueueCreate(pollqQUEUE_SIZE, (UBaseType_t)sizeof(uint16_t)); + + if (xPolledQueue != NULL) { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + in use. The queue registry is provided as a means for kernel aware + debuggers to locate queues and has no purpose if a kernel aware debugger + is not being used. The call to vQueueAddToRegistry() will be removed + by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + defined to be less than 1. */ + vQueueAddToRegistry(xPolledQueue, "Poll_Test_Queue"); + + /* Spawn the producer and consumer. */ + xTaskCreate(vPolledQueueConsumer, "QConsNB", pollqSTACK_SIZE, + (void *)&xPolledQueue, uxPriority, + (TaskHandle_t *)NULL); + xTaskCreate(vPolledQueueProducer, "QProdNB", pollqSTACK_SIZE, + (void *)&xPolledQueue, uxPriority, + (TaskHandle_t *)NULL); + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vPolledQueueProducer, pvParameters) +{ + uint16_t usValue = (uint16_t)0; + BaseType_t xError = pdFALSE, xLoop; + + for (;;) { + for (xLoop = 0; xLoop < pollqVALUES_TO_PRODUCE; xLoop++) { + /* Send an incrementing number on the queue without blocking. */ + if (xQueueSend(*((QueueHandle_t *)pvParameters), + (void *)&usValue, + pollqNO_DELAY) != pdPASS) { + /* We should never find the queue full so if we get here there + has been an error. */ + xError = pdTRUE; + } else { + if (xError == pdFALSE) { + /* If an error has ever been recorded we stop incrementing the + check variable. */ + portENTER_CRITICAL(); + xPollingProducerCount++; + portEXIT_CRITICAL(); + } + + /* Update the value we are going to post next time around. */ + usValue++; + } + } + + /* Wait before we start posting again to ensure the consumer runs and + empties the queue. */ + vTaskDelay(pollqPRODUCER_DELAY); + } +} /*lint !e818 Function prototype must conform to API. */ +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vPolledQueueConsumer, pvParameters) +{ + uint16_t usData, usExpectedValue = (uint16_t)0; + BaseType_t xError = pdFALSE; + + for (;;) { + /* Loop until the queue is empty. */ + while (uxQueueMessagesWaiting( + *((QueueHandle_t *)pvParameters))) { + if (xQueueReceive(*((QueueHandle_t *)pvParameters), + &usData, pollqNO_DELAY) == pdPASS) { + if (usData != usExpectedValue) { + /* This is not what we expected to receive so an error has + occurred. */ + xError = pdTRUE; + + /* Catch-up to the value we received so our next expected + value should again be correct. */ + usExpectedValue = usData; + } else { + if (xError == pdFALSE) { + /* Only increment the check variable if no errors have + occurred. */ + portENTER_CRITICAL(); + xPollingConsumerCount++; + portEXIT_CRITICAL(); + } + } + + /* Next time round we would expect the number to be one higher. */ + usExpectedValue++; + } + } + + /* Now the queue is empty we block, allowing the producer to place more + items in the queue. */ + vTaskDelay(pollqCONSUMER_DELAY); + } +} /*lint !e818 Function prototype must conform to API. */ +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running with no errors. */ +BaseType_t xArePollingQueuesStillRunning(void) +{ + BaseType_t xReturn; + + /* Check both the consumer and producer poll count to check they have both + been changed since out last trip round. We do not need a critical section + around the check variables as this is called from a higher priority than + the other tasks that access the same variables. */ + if ((xPollingConsumerCount == pollqINITIAL_VALUE) || + (xPollingProducerCount == pollqINITIAL_VALUE)) { + xReturn = pdFALSE; + } else { + xReturn = pdTRUE; + } + + /* Set the check variables back down so we know if they have been + incremented the next time around. */ + xPollingConsumerCount = pollqINITIAL_VALUE; + xPollingProducerCount = pollqINITIAL_VALUE; + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/QPeek.c b/freertos/cvitek/task/demo/Common/Minimal/QPeek.c new file mode 100644 index 000000000..65eb69371 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/QPeek.c @@ -0,0 +1,416 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Tests the behaviour when data is peeked from a queue when there are + * multiple tasks blocked on the queue. + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" + +/* Demo program include files. */ +#include "QPeek.h" + +#define qpeekQUEUE_LENGTH (5) +#define qpeekNO_BLOCK (0) +#define qpeekSHORT_DELAY (10) + +#define qpeekLOW_PRIORITY (tskIDLE_PRIORITY + 0) +#define qpeekMEDIUM_PRIORITY (tskIDLE_PRIORITY + 1) +#define qpeekHIGH_PRIORITY (tskIDLE_PRIORITY + 2) +#define qpeekHIGHEST_PRIORITY (tskIDLE_PRIORITY + 3) + +/*-----------------------------------------------------------*/ + +/* + * The following three tasks are used to demonstrate the peeking behaviour. + * Each task is given a different priority to demonstrate the order in which + * tasks are woken as data is peeked from a queue. + */ +static void prvLowPriorityPeekTask(void *pvParameters); +static void prvMediumPriorityPeekTask(void *pvParameters); +static void prvHighPriorityPeekTask(void *pvParameters); +static void prvHighestPriorityPeekTask(void *pvParameters); + +/*-----------------------------------------------------------*/ + +/* Flag that will be latched to pdTRUE should any unexpected behaviour be +detected in any of the tasks. */ +static volatile BaseType_t xErrorDetected = pdFALSE; + +/* Counter that is incremented on each cycle of a test. This is used to +detect a stalled task - a test that is no longer running. */ +static volatile uint32_t ulLoopCounter = 0; + +/* Handles to the test tasks. */ +TaskHandle_t xMediumPriorityTask, xHighPriorityTask, xHighestPriorityTask; +/*-----------------------------------------------------------*/ + +void vStartQueuePeekTasks(void) +{ + QueueHandle_t xQueue; + + /* Create the queue that we are going to use for the test/demo. */ + xQueue = xQueueCreate(qpeekQUEUE_LENGTH, sizeof(uint32_t)); + + if (xQueue != NULL) { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + in use. The queue registry is provided as a means for kernel aware + debuggers to locate queues and has no purpose if a kernel aware debugger + is not being used. The call to vQueueAddToRegistry() will be removed + by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + defined to be less than 1. */ + vQueueAddToRegistry(xQueue, "QPeek_Test_Queue"); + + /* Create the demo tasks and pass it the queue just created. We are + passing the queue handle by value so it does not matter that it is declared + on the stack here. */ + xTaskCreate(prvLowPriorityPeekTask, "PeekL", + configMINIMAL_STACK_SIZE, (void *)xQueue, + qpeekLOW_PRIORITY, NULL); + xTaskCreate(prvMediumPriorityPeekTask, "PeekM", + configMINIMAL_STACK_SIZE, (void *)xQueue, + qpeekMEDIUM_PRIORITY, &xMediumPriorityTask); + xTaskCreate(prvHighPriorityPeekTask, "PeekH1", + configMINIMAL_STACK_SIZE, (void *)xQueue, + qpeekHIGH_PRIORITY, &xHighPriorityTask); + xTaskCreate(prvHighestPriorityPeekTask, "PeekH2", + configMINIMAL_STACK_SIZE, (void *)xQueue, + qpeekHIGHEST_PRIORITY, &xHighestPriorityTask); + } +} +/*-----------------------------------------------------------*/ + +static void prvHighestPriorityPeekTask(void *pvParameters) +{ + QueueHandle_t xQueue = (QueueHandle_t)pvParameters; + uint32_t ulValue; + +#ifdef USE_STDIO + { + void vPrintDisplayMessage(const char *const *ppcMessageToSend); + + const char *const pcTaskStartMsg = + "Queue peek test started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage(&pcTaskStartMsg); + } +#endif + + for (;;) { + /* Try peeking from the queue. The queue should be empty so we will + block, allowing the high priority task to execute. */ + if (xQueuePeek(xQueue, &ulValue, portMAX_DELAY) != pdPASS) { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we reach here the high and medium priority tasks should still + be blocked on the queue. We unblocked because the low priority task + wrote a value to the queue, which we should have peeked. Peeking the + data (rather than receiving it) will leave the data on the queue, so + the high priority task should then have also been unblocked, but not + yet executed. */ + if (ulValue != 0x11223344) { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if (uxQueueMessagesWaiting(xQueue) != 1) { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* Now we are going to actually receive the data, so when the high + priority task runs it will find the queue empty and return to the + blocked state. */ + ulValue = 0; + if (xQueueReceive(xQueue, &ulValue, qpeekNO_BLOCK) != pdPASS) { + /* We expected to receive the value. */ + xErrorDetected = pdTRUE; + } + + if (ulValue != 0x11223344) { + /* We did not receive the expected value - which should have been + the same value as was peeked. */ + xErrorDetected = pdTRUE; + } + + /* Now we will block again as the queue is once more empty. The low + priority task can then execute again. */ + if (xQueuePeek(xQueue, &ulValue, portMAX_DELAY) != pdPASS) { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we get here the low priority task should have again written to the + queue. */ + if (ulValue != 0x01234567) { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if (uxQueueMessagesWaiting(xQueue) != 1) { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* We only peeked the data, so suspending ourselves now should enable + the high priority task to also peek the data. The high priority task + will have been unblocked when we peeked the data as we left the data + in the queue. */ + vTaskSuspend(NULL); + + /* This time we are going to do the same as the above test, but the + high priority task is going to receive the data, rather than peek it. + This means that the medium priority task should never peek the value. */ + if (xQueuePeek(xQueue, &ulValue, portMAX_DELAY) != pdPASS) { + xErrorDetected = pdTRUE; + } + + if (ulValue != 0xaabbaabb) { + xErrorDetected = pdTRUE; + } + + vTaskSuspend(NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvHighPriorityPeekTask(void *pvParameters) +{ + QueueHandle_t xQueue = (QueueHandle_t)pvParameters; + uint32_t ulValue; + + for (;;) { + /* Try peeking from the queue. The queue should be empty so we will + block, allowing the medium priority task to execute. Both the high + and highest priority tasks will then be blocked on the queue. */ + if (xQueuePeek(xQueue, &ulValue, portMAX_DELAY) != pdPASS) { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we get here the highest priority task should have peeked the data + (unblocking this task) then suspended (allowing this task to also peek + the data). */ + if (ulValue != 0x01234567) { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if (uxQueueMessagesWaiting(xQueue) != 1) { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* We only peeked the data, so suspending ourselves now should enable + the medium priority task to also peek the data. The medium priority task + will have been unblocked when we peeked the data as we left the data + in the queue. */ + vTaskSuspend(NULL); + + /* This time we are going actually receive the value, so the medium + priority task will never peek the data - we removed it from the queue. */ + if (xQueueReceive(xQueue, &ulValue, portMAX_DELAY) != pdPASS) { + xErrorDetected = pdTRUE; + } + + if (ulValue != 0xaabbaabb) { + xErrorDetected = pdTRUE; + } + + vTaskSuspend(NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvMediumPriorityPeekTask(void *pvParameters) +{ + QueueHandle_t xQueue = (QueueHandle_t)pvParameters; + uint32_t ulValue; + + for (;;) { + /* Try peeking from the queue. The queue should be empty so we will + block, allowing the low priority task to execute. The highest, high + and medium priority tasks will then all be blocked on the queue. */ + if (xQueuePeek(xQueue, &ulValue, portMAX_DELAY) != pdPASS) { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we get here the high priority task should have peeked the data + (unblocking this task) then suspended (allowing this task to also peek + the data). */ + if (ulValue != 0x01234567) { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if (uxQueueMessagesWaiting(xQueue) != 1) { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* Just so we know the test is still running. */ + ulLoopCounter++; + + /* Now we can suspend ourselves so the low priority task can execute + again. */ + vTaskSuspend(NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvLowPriorityPeekTask(void *pvParameters) +{ + QueueHandle_t xQueue = (QueueHandle_t)pvParameters; + uint32_t ulValue; + + for (;;) { + /* Write some data to the queue. This should unblock the highest + priority task that is waiting to peek data from the queue. */ + ulValue = 0x11223344; + if (xQueueSendToBack(xQueue, &ulValue, qpeekNO_BLOCK) != + pdPASS) { + /* We were expecting the queue to be empty so we should not of + had a problem writing to the queue. */ + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* By the time we get here the data should have been removed from + the queue. */ + if (uxQueueMessagesWaiting(xQueue) != 0) { + xErrorDetected = pdTRUE; + } + + /* Write another value to the queue, again waking the highest priority + task that is blocked on the queue. */ + ulValue = 0x01234567; + if (xQueueSendToBack(xQueue, &ulValue, qpeekNO_BLOCK) != + pdPASS) { + /* We were expecting the queue to be empty so we should not of + had a problem writing to the queue. */ + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* All the other tasks should now have successfully peeked the data. + The data is still in the queue so we should be able to receive it. */ + ulValue = 0; + if (xQueueReceive(xQueue, &ulValue, qpeekNO_BLOCK) != pdPASS) { + /* We expected to receive the data. */ + xErrorDetected = pdTRUE; + } + + if (ulValue != 0x01234567) { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + /* Lets just delay a while as this is an intensive test as we don't + want to starve other tests of processing time. */ + vTaskDelay(qpeekSHORT_DELAY); + + /* Unsuspend the other tasks so we can repeat the test - this time + however not all the other tasks will peek the data as the high + priority task is actually going to remove it from the queue. Send + to front is used just to be different. As the queue is empty it + makes no difference to the result. */ + vTaskResume(xMediumPriorityTask); + vTaskResume(xHighPriorityTask); + vTaskResume(xHighestPriorityTask); + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + + ulValue = 0xaabbaabb; + if (xQueueSendToFront(xQueue, &ulValue, qpeekNO_BLOCK) != + pdPASS) { + /* We were expecting the queue to be empty so we should not of + had a problem writing to the queue. */ + xErrorDetected = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* This time we should find that the queue is empty. The high priority + task actually removed the data rather than just peeking it. */ + if (xQueuePeek(xQueue, &ulValue, qpeekNO_BLOCK) != + errQUEUE_EMPTY) { + /* We expected to receive the data. */ + xErrorDetected = pdTRUE; + } + + /* Unsuspend the highest and high priority tasks so we can go back + and repeat the whole thing. The medium priority task should not be + suspended as it was not able to peek the data in this last case. */ + vTaskResume(xHighPriorityTask); + vTaskResume(xHighestPriorityTask); + + /* Lets just delay a while as this is an intensive test as we don't + want to starve other tests of processing time. */ + vTaskDelay(qpeekSHORT_DELAY); + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreQueuePeekTasksStillRunning(void) +{ + static uint32_t ulLastLoopCounter = 0; + + /* If the demo task is still running then we expect the loopcounter to + have incremented since this function was last called. */ + if (ulLastLoopCounter == ulLoopCounter) { + xErrorDetected = pdTRUE; + } + + ulLastLoopCounter = ulLoopCounter; + + /* Errors detected in the task itself will have latched xErrorDetected + to true. */ + + return (BaseType_t)!xErrorDetected; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/QueueOverwrite.c b/freertos/cvitek/task/demo/Common/Minimal/QueueOverwrite.c new file mode 100644 index 000000000..ea687165c --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/QueueOverwrite.c @@ -0,0 +1,215 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Basic task to demonstrate the xQueueOverwrite() function. See the comments + * in the function itself. + */ + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo program include files. */ +#include "QueueOverwrite.h" + +/* A block time of 0 just means "don't block". */ +#define qoDONT_BLOCK 0 + +/* Number of times to overwrite the value in the queue. */ +#define qoLOOPS 5 + +/* The task that uses the queue. */ +static void prvQueueOverwriteTask(void *pvParameters); + +/* Variable that is incremented on each loop of prvQueueOverwriteTask() provided +prvQueueOverwriteTask() has not found any errors. */ +static uint32_t ulLoopCounter = 0; + +/* Set to pdFALSE if an error is discovered by the +vQueueOverwritePeriodicISRDemo() function. */ +static BaseType_t xISRTestStatus = pdPASS; + +/* The queue that is accessed from the ISR. The queue accessed by the task is +created inside the task itself. */ +static QueueHandle_t xISRQueue = NULL; + +/*-----------------------------------------------------------*/ + +void vStartQueueOverwriteTask(UBaseType_t uxPriority) +{ + const UBaseType_t uxQueueLength = 1; + + /* Create the queue used by the ISR. xQueueOverwriteFromISR() should only + be used on queues that have a length of 1. */ + xISRQueue = xQueueCreate(uxQueueLength, (UBaseType_t)sizeof(uint32_t)); + + /* Create the test task. The queue used by the test task is created inside + the task itself. */ + xTaskCreate(prvQueueOverwriteTask, "QOver", configMINIMAL_STACK_SIZE, + NULL, uxPriority, (TaskHandle_t *)NULL); +} +/*-----------------------------------------------------------*/ + +static void prvQueueOverwriteTask(void *pvParameters) +{ + QueueHandle_t xTaskQueue; + const UBaseType_t uxQueueLength = 1; + uint32_t ulValue, ulStatus = pdPASS, x; + + /* The parameter is not used. */ + (void)pvParameters; + + /* Create the queue. xQueueOverwrite() should only be used on queues that + have a length of 1. */ + xTaskQueue = xQueueCreate(uxQueueLength, (UBaseType_t)sizeof(uint32_t)); + configASSERT(xTaskQueue); + + for (;;) { + /* The queue is empty. Writing to the queue then reading from the queue + should return the item written. */ + ulValue = 10; + xQueueOverwrite(xTaskQueue, &ulValue); + + ulValue = 0; + xQueueReceive(xTaskQueue, &ulValue, qoDONT_BLOCK); + + if (ulValue != 10) { + ulStatus = pdFAIL; + } + + /* Now try writing to the queue several times. Each time the value + in the queue should get overwritten. */ + for (x = 0; x < qoLOOPS; x++) { + /* Write to the queue. */ + xQueueOverwrite(xTaskQueue, &x); + + /* Check the value in the queue is that written, even though the + queue was not necessarily empty. */ + xQueuePeek(xTaskQueue, &ulValue, qoDONT_BLOCK); + if (ulValue != x) { + ulStatus = pdFAIL; + } + + /* There should always be one item in the queue. */ + if (uxQueueMessagesWaiting(xTaskQueue) != + uxQueueLength) { + ulStatus = pdFAIL; + } + } + + /* Empty the queue again. */ + xQueueReceive(xTaskQueue, &ulValue, qoDONT_BLOCK); + + if (uxQueueMessagesWaiting(xTaskQueue) != 0) { + ulStatus = pdFAIL; + } + + if (ulStatus != pdFAIL) { + /* Increment a counter to show this task is still running without + error. */ + ulLoopCounter++; + } + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xIsQueueOverwriteTaskStillRunning(void) +{ + BaseType_t xReturn; + + if (xISRTestStatus != pdPASS) { + xReturn = pdFAIL; + } else if (ulLoopCounter > 0) { + xReturn = pdPASS; + } else { + /* The task has either stalled of discovered an error. */ + xReturn = pdFAIL; + } + + ulLoopCounter = 0; + + return xReturn; +} +/*-----------------------------------------------------------*/ + +void vQueueOverwritePeriodicISRDemo(void) +{ + static uint32_t ulCallCount = 0; + const uint32_t ulTx1 = 10UL, ulTx2 = 20UL, ulNumberOfSwitchCases = 3UL; + uint32_t ulRx; + + /* This function should be called from an interrupt, such as the tick hook + function vApplicationTickHook(). */ + + configASSERT(xISRQueue); + + switch (ulCallCount) { + case 0: + /* The queue is empty. Write ulTx1 to the queue. In this demo the + last parameter is not used because there are no tasks blocked on + this queue. */ + xQueueOverwriteFromISR(xISRQueue, &ulTx1, NULL); + + /* Peek the queue to check it holds the expected value. */ + xQueuePeekFromISR(xISRQueue, &ulRx); + if (ulRx != ulTx1) { + xISRTestStatus = pdFAIL; + } + break; + + case 1: + /* The queue already holds ulTx1. Overwrite the value in the queue + with ulTx2. */ + xQueueOverwriteFromISR(xISRQueue, &ulTx2, NULL); + break; + + case 2: + /* Read from the queue to empty the queue again. The value read + should be ulTx2. */ + xQueueReceiveFromISR(xISRQueue, &ulRx, NULL); + + if (ulRx != ulTx2) { + xISRTestStatus = pdFAIL; + } + break; + } + + /* Run the next case in the switch statement above next time this function + is called. */ + ulCallCount++; + + if (ulCallCount >= ulNumberOfSwitchCases) { + /* Go back to the start. */ + ulCallCount = 0; + } +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/QueueSet.c b/freertos/cvitek/task/demo/Common/Minimal/QueueSet.c new file mode 100644 index 000000000..a63a19920 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/QueueSet.c @@ -0,0 +1,1051 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Tests the use of queue sets. + * + * A receive task creates a number of queues and adds them to a queue set before + * blocking on the queue set receive. A transmit task and (optionally) an + * interrupt repeatedly unblocks the receive task by sending messages to the + * queues in a pseudo random order. The receive task removes the messages from + * the queues and flags an error if the received message does not match that + * expected. The task sends values in the range 0 to + * queuesetINITIAL_ISR_TX_VALUE, and the ISR sends value in the range + * queuesetINITIAL_ISR_TX_VALUE to ULONG_MAX. + */ + +/* Standard includes. */ +#include <stdlib.h> +#include <limits.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo includes. */ +#include "QueueSet.h" + +#if (configUSE_QUEUE_SETS == \ + 1) /* Remove the tests if queue sets are not defined. */ + +/* The number of queues that are created and added to the queue set. */ +#define queuesetNUM_QUEUES_IN_SET 3 + +/* The length of each created queue. */ +#define queuesetQUEUE_LENGTH 3 + +/* Block times used in this demo. A block time or 0 means "don't block". */ +#define queuesetSHORT_DELAY 200 +#define queuesetDONT_BLOCK 0 + +/* Messages are sent in incrementing order from both a task and an interrupt. +The task sends values in the range 0 to 0xfffe, and the interrupt sends values +in the range of 0xffff to ULONG_MAX. */ +#define queuesetINITIAL_ISR_TX_VALUE 0xffffUL + +/* The priorities used in this demo. */ +#define queuesetLOW_PRIORITY (tskIDLE_PRIORITY) +#define queuesetMEDIUM_PRIORITY (queuesetLOW_PRIORITY + 1) + +/* For test purposes the priority of the sending task is changed after every +queuesetPRIORITY_CHANGE_LOOPS number of values are sent to a queue. */ +#define queuesetPRIORITY_CHANGE_LOOPS \ + ((queuesetNUM_QUEUES_IN_SET * queuesetQUEUE_LENGTH) * 2) + +/* The ISR sends to the queue every queuesetISR_TX_PERIOD ticks. */ +#define queuesetISR_TX_PERIOD (100UL) + +/* A delay inserted when the Tx task changes its priority to be above the idle +task priority to ensure the idle priority tasks get some CPU time before the +next iteration of the queue set Tx task. */ +#define queuesetTX_LOOP_DELAY pdMS_TO_TICKS((TickType_t)200) + +/* The allowable maximum deviation between a received value and the expected +received value. A deviation will occur when data is received from a queue +inside an ISR in between a task receiving from a queue and the task checking +the received value. */ +#define queuesetALLOWABLE_RX_DEVIATION 3 + +/* Ignore values that are at the boundaries of allowable values to make the +testing of limits easier (don't have to deal with wrapping values). */ +#define queuesetIGNORED_BOUNDARY (queuesetALLOWABLE_RX_DEVIATION * 2) + +typedef enum { + eEqualPriority = 0, /* Tx and Rx tasks have the same priority. */ + eTxHigherPriority, /* The priority of the Tx task is above that of the Rx task. */ + eTxLowerPriority /* The priority of the Tx task is below that of the Rx task. */ +} eRelativePriorities; + +/* + * The task that periodically sends to the queue set. + */ +static void prvQueueSetSendingTask(void *pvParameters); + +/* + * The task that reads from the queue set. + */ +static void prvQueueSetReceivingTask(void *pvParameters); + +/* + * Check the value received from a queue is the expected value. Some values + * originate from the send task, some values originate from the ISR, with the + * range of the value being used to distinguish between the two message + * sources. + */ +static void prvCheckReceivedValue(uint32_t ulReceived); + +/* + * For purposes of test coverage, functions that read from and write to a + * queue set from an ISR respectively. + */ +static void prvReceiveFromQueueInSetFromISR(void); +static void prvSendToQueueInSetFromISR(void); + +/* + * Create the queues and add them to a queue set before resuming the Tx + * task. + */ +static void prvSetupTest(void); + +/* + * Checks a value received from a queue falls within the range of expected + * values. + */ +static BaseType_t +prvCheckReceivedValueWithinExpectedRange(uint32_t ulReceived, + uint32_t ulExpectedReceived); + +/* + * Increase test coverage by occasionally change the priorities of the two tasks + * relative to each other. + */ +static void prvChangeRelativePriorities(void); + +/* + * Queue overwrites can only be performed on queues of length of one, requiring + * a special test function so a queue of length 1 can temporarily be added to a + * set. + */ +static void prvTestQueueOverwriteWithQueueSet(void); + +/* + * Test the case where two queues within a set are written to with + * xQueueOverwrite(). + */ +static void prvTestQueueOverwriteOnTwoQueusInQueueSet(void); +static void prvTestQueueOverwriteFromISROnTwoQueusInQueueSet(void); + +/* + * Local pseudo random number seed and return functions. Used to avoid calls + * to the standard library. + */ +static size_t prvRand(void); +static void prvSRand(size_t uxSeed); + +/*-----------------------------------------------------------*/ + +/* The queues that are added to the set. */ +static QueueHandle_t xQueues[queuesetNUM_QUEUES_IN_SET] = { 0 }; + +/* Counts how many times each queue in the set is used to ensure all the +queues are used. */ +static uint32_t ulQueueUsedCounter[queuesetNUM_QUEUES_IN_SET] = { 0 }; + +/* The handle of the queue set to which the queues are added. */ +static QueueSetHandle_t xQueueSet; + +/* If the prvQueueSetReceivingTask() task has not detected any errors then +it increments ulCycleCounter on each iteration. +xAreQueueSetTasksStillRunning() returns pdPASS if the value of +ulCycleCounter has changed between consecutive calls, and pdFALSE if +ulCycleCounter has stopped incrementing (indicating an error condition). */ +static volatile uint32_t ulCycleCounter = 0UL; + +/* Set to pdFAIL if an error is detected by any queue set task. +ulCycleCounter will only be incremented if xQueueSetTasksSatus equals pdPASS. */ +static volatile BaseType_t xQueueSetTasksStatus = pdPASS; + +/* Just a flag to let the function that writes to a queue from an ISR know that +the queues are setup and can be used. */ +static volatile BaseType_t xSetupComplete = pdFALSE; + +/* The value sent to the queue from the ISR is file scope so the +xAreQueeuSetTasksStillRunning() function can check it is incrementing as +expected. */ +static volatile uint32_t ulISRTxValue = queuesetINITIAL_ISR_TX_VALUE; + +/* Used by the pseudo random number generator. */ +static size_t uxNextRand = 0; + +/* The task handles are stored so their priorities can be changed. */ +TaskHandle_t xQueueSetSendingTask, xQueueSetReceivingTask; + +/*-----------------------------------------------------------*/ + +void vStartQueueSetTasks(void) +{ + /* Create the tasks. */ + xTaskCreate(prvQueueSetSendingTask, "SetTx", configMINIMAL_STACK_SIZE, + NULL, queuesetMEDIUM_PRIORITY, &xQueueSetSendingTask); + + if (xQueueSetSendingTask != NULL) { + xTaskCreate(prvQueueSetReceivingTask, "SetRx", + configMINIMAL_STACK_SIZE, + (void *)xQueueSetSendingTask, + queuesetMEDIUM_PRIORITY, &xQueueSetReceivingTask); + + /* It is important that the sending task does not attempt to write to a + queue before the queue has been created. It is therefore placed into + the suspended state before the scheduler has started. It is resumed by + the receiving task after the receiving task has created the queues and + added the queues to the queue set. */ + vTaskSuspend(xQueueSetSendingTask); + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreQueueSetTasksStillRunning(void) +{ + static uint32_t ulLastCycleCounter, ulLastISRTxValue = 0; + static uint32_t ulLastQueueUsedCounter[queuesetNUM_QUEUES_IN_SET] = { + 0 + }; + BaseType_t xReturn = pdPASS, x; + + if (ulLastCycleCounter == ulCycleCounter) { + /* The cycle counter is no longer being incremented. Either one of the + tasks is stalled or an error has been detected. */ + xReturn = pdFAIL; + } + + ulLastCycleCounter = ulCycleCounter; + + /* Ensure that all the queues in the set have been used. This ensures the + test is working as intended and guards against the rand() in the Tx task + missing some values. */ + for (x = 0; x < queuesetNUM_QUEUES_IN_SET; x++) { + if (ulLastQueueUsedCounter[x] == ulQueueUsedCounter[x]) { + xReturn = pdFAIL; + } + + ulLastQueueUsedCounter[x] = ulQueueUsedCounter[x]; + } + + /* Check the global status flag. */ + if (xQueueSetTasksStatus != pdPASS) { + xReturn = pdFAIL; + } + + /* Check that the ISR is still sending values to the queues too. */ + if (ulISRTxValue == ulLastISRTxValue) { + xReturn = pdFAIL; + } else { + ulLastISRTxValue = ulISRTxValue; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +static void prvQueueSetSendingTask(void *pvParameters) +{ + uint32_t ulTaskTxValue = 0; + size_t uxQueueToWriteTo; + QueueHandle_t xQueueInUse; + + /* Remove compiler warning about the unused parameter. */ + (void)pvParameters; + + /* Seed mini pseudo random number generator. */ + prvSRand((size_t)&ulTaskTxValue); + + for (;;) { + /* Generate the index for the queue to which a value is to be sent. */ + uxQueueToWriteTo = prvRand() % queuesetNUM_QUEUES_IN_SET; + xQueueInUse = xQueues[uxQueueToWriteTo]; + + /* Note which index is being written to to ensure all the queues are + used. */ + (ulQueueUsedCounter[uxQueueToWriteTo])++; + + /* Send to the queue to unblock the task that is waiting for data to + arrive on a queue within the queue set to which this queue belongs. */ + if (xQueueSendToBack(xQueueInUse, &ulTaskTxValue, + portMAX_DELAY) != pdPASS) { + /* The send should always pass as an infinite block time was + used. */ + xQueueSetTasksStatus = pdFAIL; + } + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + + ulTaskTxValue++; + + /* If the Tx value has reached the range used by the ISR then set it + back to 0. */ + if (ulTaskTxValue == queuesetINITIAL_ISR_TX_VALUE) { + ulTaskTxValue = 0; + } + + /* Increase test coverage by occasionally change the priorities of the + two tasks relative to each other. */ + prvChangeRelativePriorities(); + } +} +/*-----------------------------------------------------------*/ + +static void prvChangeRelativePriorities(void) +{ + static UBaseType_t ulLoops = 0; + static eRelativePriorities ePriorities = eEqualPriority; + + /* Occasionally change the task priority relative to the priority of + the receiving task. */ + ulLoops++; + if (ulLoops >= queuesetPRIORITY_CHANGE_LOOPS) { + ulLoops = 0; + + switch (ePriorities) { + case eEqualPriority: + /* Both tasks are running with medium priority. Now lower the + priority of the receiving task so the Tx task has the higher + relative priority. */ + vTaskPrioritySet(xQueueSetReceivingTask, + queuesetLOW_PRIORITY); + ePriorities = eTxHigherPriority; + break; + + case eTxHigherPriority: + /* The Tx task is running with a higher priority than the Rx + task. Switch the priorities around so the Rx task has the + higher relative priority. */ + vTaskPrioritySet(xQueueSetReceivingTask, + queuesetMEDIUM_PRIORITY); + vTaskPrioritySet(xQueueSetSendingTask, + queuesetLOW_PRIORITY); + ePriorities = eTxLowerPriority; + break; + + case eTxLowerPriority: + /* The Tx task is running with a lower priority than the Rx + task. Make the priorities equal again. */ + vTaskPrioritySet(xQueueSetSendingTask, + queuesetMEDIUM_PRIORITY); + ePriorities = eEqualPriority; + + /* When both tasks are using a non-idle priority the queue set + tasks will starve idle priority tasks of execution time - so + relax a bit before the next iteration to minimise the impact. */ + vTaskDelay(queuesetTX_LOOP_DELAY); + + break; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvQueueSetReceivingTask(void *pvParameters) +{ + uint32_t ulReceived; + QueueHandle_t xActivatedQueue; + TickType_t xBlockTime; + + /* Remove compiler warnings. */ + (void)pvParameters; + + /* Create the queues and add them to the queue set before resuming the Tx + task. */ + prvSetupTest(); + + for (;;) { + /* For test coverage reasons, the block time is dependent on the + priority of this task - which changes during the test. When the task + is at the idle priority it polls the queue set. */ + if (uxTaskPriorityGet(NULL) == tskIDLE_PRIORITY) { + xBlockTime = 0; + } else { + xBlockTime = portMAX_DELAY; + } + + /* Wait for a message to arrive on one of the queues in the set. */ + xActivatedQueue = xQueueSelectFromSet(xQueueSet, portMAX_DELAY); + + if (xActivatedQueue == NULL) { + if (xBlockTime != 0) { + /* This should not happen as an infinite delay was used. */ + xQueueSetTasksStatus = pdFAIL; + } + } else { + /* Reading from the queue should pass with a zero block time as + this task will only run when something has been posted to a task + in the queue set. */ + if (xQueueReceive(xActivatedQueue, &ulReceived, + queuesetDONT_BLOCK) != pdPASS) { + xQueueSetTasksStatus = pdFAIL; + } + + /* Ensure the value received was the value expected. This function + manipulates file scope data and is also called from an ISR, hence + the critical section. */ + taskENTER_CRITICAL(); + { + prvCheckReceivedValue(ulReceived); + } + taskEXIT_CRITICAL(); + + if (xQueueSetTasksStatus == pdPASS) { + ulCycleCounter++; + } + } + } +} +/*-----------------------------------------------------------*/ + +void vQueueSetAccessQueueSetFromISR(void) +{ + static uint32_t ulCallCount = 0; + + /* xSetupComplete is set to pdTRUE when the queues have been created and + are available for use. */ + if (xSetupComplete == pdTRUE) { + /* It is intended that this function is called from the tick hook + function, so each call is one tick period apart. */ + ulCallCount++; + if (ulCallCount > queuesetISR_TX_PERIOD) { + ulCallCount = 0; + + /* First attempt to read from the queue set. */ + prvReceiveFromQueueInSetFromISR(); + + /* Then write to the queue set. */ + prvSendToQueueInSetFromISR(); + } + } +} +/*-----------------------------------------------------------*/ + +static void prvCheckReceivedValue(uint32_t ulReceived) +{ + static uint32_t ulExpectedReceivedFromTask = 0, + ulExpectedReceivedFromISR = + queuesetINITIAL_ISR_TX_VALUE; + + /* Values are received in tasks and interrupts. It is likely that the + receiving task will sometimes get preempted by the receiving interrupt + between reading a value from the queue and calling this function. When + that happens, if the receiving interrupt calls this function the values + will get passed into this function slightly out of order. For that + reason the value passed in is tested against a small range of expected + values, rather than a single absolute value. To make the range testing + easier values in the range limits are ignored. */ + + /* If the received value is equal to or greater than + queuesetINITIAL_ISR_TX_VALUE then it was sent by an ISR. */ + if (ulReceived >= queuesetINITIAL_ISR_TX_VALUE) { + /* The value was sent from the ISR. */ + if ((ulReceived - queuesetINITIAL_ISR_TX_VALUE) < + queuesetIGNORED_BOUNDARY) { + /* The value received is at the lower limit of the expected range. + Don't test it and expect to receive one higher next time. */ + } else if ((ULONG_MAX - ulReceived) <= + queuesetIGNORED_BOUNDARY) { + /* The value received is at the higher limit of the expected range. + Don't test it and expect to wrap soon. */ + } else { + /* Check the value against its expected value range. */ + if (prvCheckReceivedValueWithinExpectedRange( + ulReceived, ulExpectedReceivedFromISR) != + pdPASS) { + xQueueSetTasksStatus = pdFAIL; + } + } + + configASSERT(xQueueSetTasksStatus); + + /* It is expected to receive an incrementing number. */ + ulExpectedReceivedFromISR++; + if (ulExpectedReceivedFromISR == 0) { + ulExpectedReceivedFromISR = + queuesetINITIAL_ISR_TX_VALUE; + } + } else { + /* The value was sent from the Tx task. */ + if (ulReceived < queuesetIGNORED_BOUNDARY) { + /* The value received is at the lower limit of the expected range. + Don't test it, and expect to receive one higher next time. */ + } else if (((queuesetINITIAL_ISR_TX_VALUE - 1) - ulReceived) <= + queuesetIGNORED_BOUNDARY) { + /* The value received is at the higher limit of the expected range. + Don't test it and expect to wrap soon. */ + } else { + /* Check the value against its expected value range. */ + if (prvCheckReceivedValueWithinExpectedRange( + ulReceived, ulExpectedReceivedFromTask) != + pdPASS) { + xQueueSetTasksStatus = pdFAIL; + } + } + + configASSERT(xQueueSetTasksStatus); + + /* It is expected to receive an incrementing number. */ + ulExpectedReceivedFromTask++; + if (ulExpectedReceivedFromTask >= + queuesetINITIAL_ISR_TX_VALUE) { + ulExpectedReceivedFromTask = 0; + } + } +} +/*-----------------------------------------------------------*/ + +static BaseType_t +prvCheckReceivedValueWithinExpectedRange(uint32_t ulReceived, + uint32_t ulExpectedReceived) +{ + BaseType_t xReturn = pdPASS; + + if (ulReceived > ulExpectedReceived) { + configASSERT((ulReceived - ulExpectedReceived) <= + queuesetALLOWABLE_RX_DEVIATION); + if ((ulReceived - ulExpectedReceived) > + queuesetALLOWABLE_RX_DEVIATION) { + xReturn = pdFALSE; + } + } else { + configASSERT((ulExpectedReceived - ulReceived) <= + queuesetALLOWABLE_RX_DEVIATION); + if ((ulExpectedReceived - ulReceived) > + queuesetALLOWABLE_RX_DEVIATION) { + xReturn = pdFALSE; + } + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +static void prvReceiveFromQueueInSetFromISR(void) +{ + QueueSetMemberHandle_t xActivatedQueue; + uint32_t ulReceived; + + /* See if any of the queues in the set contain data. */ + xActivatedQueue = xQueueSelectFromSetFromISR(xQueueSet); + + if (xActivatedQueue != NULL) { + /* Reading from the queue for test purposes only. */ + if (xQueueReceiveFromISR(xActivatedQueue, &ulReceived, NULL) != + pdPASS) { + /* Data should have been available as the handle was returned from + xQueueSelectFromSetFromISR(). */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Ensure the value received was the value expected. */ + prvCheckReceivedValue(ulReceived); + } +} +/*-----------------------------------------------------------*/ + +static void prvSendToQueueInSetFromISR(void) +{ + static BaseType_t xQueueToWriteTo = 0; + uint32_t ulTxValueSnapshot = ulISRTxValue; + + if (xQueueSendFromISR(xQueues[xQueueToWriteTo], + (void *)&ulTxValueSnapshot, NULL) == pdPASS) { + ulISRTxValue++; + + /* If the Tx value has wrapped then set it back to its initial value. */ + if (ulISRTxValue == 0UL) { + ulISRTxValue = queuesetINITIAL_ISR_TX_VALUE; + } + + /* Use a different queue next time. */ + xQueueToWriteTo++; + if (xQueueToWriteTo >= queuesetNUM_QUEUES_IN_SET) { + xQueueToWriteTo = 0; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvTestQueueOverwriteWithQueueSet(void) +{ + uint32_t ulValueToSend = 0, ulValueReceived = 0; + QueueHandle_t xQueueHandle = NULL, xReceivedHandle = NULL; + const UBaseType_t xLengthOfOne = (UBaseType_t)1; + + /* Create a queue that has a length of one - a requirement in order to call + xQueueOverwrite. This will get deleted again when this test completes. */ + xQueueHandle = xQueueCreate(xLengthOfOne, sizeof(uint32_t)); + configASSERT(xQueueHandle); + + if (xQueueHandle != NULL) { + xQueueAddToSet(xQueueHandle, xQueueSet); + + /* Add an item to the queue then ensure the queue set correctly + indicates that one item is available, and that item is indeed the + queue written to. */ + xQueueOverwrite(xQueueHandle, (void *)&ulValueToSend); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)1) { + /* Expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueuePeek(xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle) { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now overwrite the value in the queue and ensure the queue set state + doesn't change as the number of items in the queues within the set have + not changed. */ + ulValueToSend++; + xQueueOverwrite(xQueueHandle, (void *)&ulValueToSend); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)1) { + /* Still expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle) { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Also ensure the value received from the queue is the overwritten + value, not the value originally written. */ + xQueueReceive(xQueueHandle, &ulValueReceived, + queuesetDONT_BLOCK); + if (ulValueReceived != ulValueToSend) { + /* Unexpected value received from the queue. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Should be anything in the queue set now. */ + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)0) { + xQueueSetTasksStatus = pdFAIL; + } + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != NULL) { + xQueueSetTasksStatus = pdFAIL; + } + + /* Clean up. */ + xQueueRemoveFromSet(xQueueHandle, xQueueSet); + vQueueDelete(xQueueHandle); + } +} +/*-----------------------------------------------------------*/ + +static void prvTestQueueOverwriteOnTwoQueusInQueueSet(void) +{ + uint32_t ulValueToSend1 = 1, ulValueToSend2 = 2UL, ulValueReceived = 0; + QueueHandle_t xQueueHandle1 = NULL, xQueueHandle2 = NULL, + xReceivedHandle = NULL; + const UBaseType_t xLengthOfOne = (UBaseType_t)1; + + /* Create two queues that have a length of one - a requirement in order to call + xQueueOverwrite. These will get deleted again when this test completes. */ + xQueueHandle1 = xQueueCreate(xLengthOfOne, sizeof(uint32_t)); + configASSERT(xQueueHandle1); + xQueueHandle2 = xQueueCreate(xLengthOfOne, sizeof(uint32_t)); + configASSERT(xQueueHandle2); + + if ((xQueueHandle1 != NULL) && (xQueueHandle2 != NULL)) { + /* Add both queues to the queue set. */ + xQueueAddToSet(xQueueHandle1, xQueueSet); + xQueueAddToSet(xQueueHandle2, xQueueSet); + + /* Add an item using the first queue. */ + xQueueOverwrite(xQueueHandle1, (void *)&ulValueToSend1); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)1) { + /* Expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueuePeek(xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle1) { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Next add an item to the second queue. */ + xQueueOverwrite(xQueueHandle2, (void *)&ulValueToSend2); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* The head of the queue set should not have changed though. */ + xQueuePeek(xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle1) { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now overwrite the value in the queue and ensure the queue set state + doesn't change as the number of items in the queues within the set have + not changed. NOTE: after this queue 1 should hold ulValueToSend2 and queue + 2 should hold the value ulValueToSend1. */ + xQueueOverwrite(xQueueHandle1, (void *)&ulValueToSend2); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueOverwrite(xQueueHandle2, (void *)&ulValueToSend1); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Repeat the above to ensure the queue set state doesn't change. */ + xQueueOverwrite(xQueueHandle1, (void *)&ulValueToSend2); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueOverwrite(xQueueHandle2, (void *)&ulValueToSend1); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now when reading from the queue set we expect the handle to the first + queue to be received first, and for that queue to hold ulValueToSend2 as the + originally written value was overwritten. Likewise the second handle received + from the set should be that of the second queue, and that queue should hold + ulValueToSend1 as the originally written value was overwritten. */ + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle1) { + /* Wrote to xQueueHandle1 first so expected that handle to be read from + the set first. */ + xQueueSetTasksStatus = pdFAIL; + } + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)1) { + /* One value was read from the set, so now only expect a single value + in the set. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueReceive(xReceivedHandle, &ulValueReceived, + queuesetDONT_BLOCK); + if (ulValueReceived != ulValueToSend2) { + /* Unexpected value received from the queue. ulValueToSend1 was written + first, but then overwritten with ulValueToSend2; */ + xQueueSetTasksStatus = pdFAIL; + } + + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle2) { + /* xQueueHandle1 has already been removed from the set so expect only + xQueueHandle2 to be left. */ + xQueueSetTasksStatus = pdFAIL; + } + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)0) { + /* The last value was read from the set so don't expect any more. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueReceive(xReceivedHandle, &ulValueReceived, + queuesetDONT_BLOCK); + if (ulValueReceived != ulValueToSend1) { + /* Unexpected value received from the queue. ulValueToSend2 was written + first, but then overwritten with ulValueToSend1. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Should be anything in the queue set now. */ + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != NULL) { + xQueueSetTasksStatus = pdFAIL; + } + + /* Clean up. */ + xQueueRemoveFromSet(xQueueHandle1, xQueueSet); + xQueueRemoveFromSet(xQueueHandle2, xQueueSet); + vQueueDelete(xQueueHandle1); + vQueueDelete(xQueueHandle2); + } +} +/*-----------------------------------------------------------*/ + +static void prvTestQueueOverwriteFromISROnTwoQueusInQueueSet(void) +{ + uint32_t ulValueToSend1 = 1, ulValueToSend2 = 2UL, ulValueReceived = 0; + QueueHandle_t xQueueHandle1 = NULL, xQueueHandle2 = NULL, + xReceivedHandle = NULL; + const UBaseType_t xLengthOfOne = (UBaseType_t)1; + + /* Create two queues that have a length of one - a requirement in order to call + xQueueOverwrite. These will get deleted again when this test completes. */ + xQueueHandle1 = xQueueCreate(xLengthOfOne, sizeof(uint32_t)); + configASSERT(xQueueHandle1); + xQueueHandle2 = xQueueCreate(xLengthOfOne, sizeof(uint32_t)); + configASSERT(xQueueHandle2); + + if ((xQueueHandle1 != NULL) && (xQueueHandle2 != NULL)) { + /* Add both queues to the queue set. */ + xQueueAddToSet(xQueueHandle1, xQueueSet); + xQueueAddToSet(xQueueHandle2, xQueueSet); + + /* Add an item using the first queue using the 'FromISR' version of the + overwrite function. */ + xQueueOverwriteFromISR(xQueueHandle1, (void *)&ulValueToSend1, + NULL); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)1) { + /* Expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueuePeek(xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle1) { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Next add an item to the second queue using the 'FromISR' version of the + overwrite function. */ + xQueueOverwriteFromISR(xQueueHandle2, (void *)&ulValueToSend2, + NULL); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* The head of the queue set should not have changed though. */ + xQueuePeek(xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle1) { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now overwrite the value in the queue and ensure the queue set state + doesn't change as the number of items in the queues within the set have + not changed. NOTE: after this queue 1 should hold ulValueToSend2 and queue + 2 should hold the value ulValueToSend1. */ + xQueueOverwriteFromISR(xQueueHandle1, (void *)&ulValueToSend2, + NULL); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueOverwriteFromISR(xQueueHandle2, (void *)&ulValueToSend1, + NULL); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Repeat the above to ensure the queue set state doesn't change. */ + xQueueOverwriteFromISR(xQueueHandle1, (void *)&ulValueToSend2, + NULL); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueOverwriteFromISR(xQueueHandle2, (void *)&ulValueToSend1, + NULL); + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)2) { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now when reading from the queue set we expect the handle to the first + queue to be received first, and for that queue to hold ulValueToSend2 as the + originally written value was overwritten. Likewise the second handle received + from the set should be that of the second queue, and that queue should hold + ulValueToSend1 as the originally written value was overwritten. */ + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle1) { + /* Wrote to xQueueHandle1 first so expected that handle to be read from + the set first. */ + xQueueSetTasksStatus = pdFAIL; + } + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)1) { + /* One value was read from the set, so now only expect a single value + in the set. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueReceive(xReceivedHandle, &ulValueReceived, + queuesetDONT_BLOCK); + if (ulValueReceived != ulValueToSend2) { + /* Unexpected value received from the queue. ulValueToSend1 was written + first, but then overwritten with ulValueToSend2; */ + xQueueSetTasksStatus = pdFAIL; + } + + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != xQueueHandle2) { + /* xQueueHandle1 has already been removed from the set so expect only + xQueueHandle2 to be left. */ + xQueueSetTasksStatus = pdFAIL; + } + if (uxQueueMessagesWaiting(xQueueSet) != (UBaseType_t)0) { + /* The last value was read from the set so don't expect any more. */ + xQueueSetTasksStatus = pdFAIL; + } + xQueueReceive(xReceivedHandle, &ulValueReceived, + queuesetDONT_BLOCK); + if (ulValueReceived != ulValueToSend1) { + /* Unexpected value received from the queue. ulValueToSend2 was written + first, but then overwritten with ulValueToSend1. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Should be anything in the queue set now. */ + xReceivedHandle = + xQueueSelectFromSet(xQueueSet, queuesetDONT_BLOCK); + if (xReceivedHandle != NULL) { + xQueueSetTasksStatus = pdFAIL; + } + + /* Clean up. */ + xQueueRemoveFromSet(xQueueHandle1, xQueueSet); + xQueueRemoveFromSet(xQueueHandle2, xQueueSet); + vQueueDelete(xQueueHandle1); + vQueueDelete(xQueueHandle2); + } +} +/*-----------------------------------------------------------*/ + +static void prvSetupTest(void) +{ + BaseType_t x; + uint32_t ulValueToSend = 0; + + /* Ensure the queues are created and the queue set configured before the + sending task is unsuspended. + + First Create the queue set such that it will be able to hold a message for + every space in every queue in the set. */ + xQueueSet = xQueueCreateSet(queuesetNUM_QUEUES_IN_SET * + queuesetQUEUE_LENGTH); + + for (x = 0; x < queuesetNUM_QUEUES_IN_SET; x++) { + /* Create the queue and add it to the set. The queue is just holding + uint32_t value. */ + xQueues[x] = + xQueueCreate(queuesetQUEUE_LENGTH, sizeof(uint32_t)); + configASSERT(xQueues[x]); + if (xQueueAddToSet(xQueues[x], xQueueSet) != pdPASS) { + xQueueSetTasksStatus = pdFAIL; + } else { + /* The queue has now been added to the queue set and cannot be added to + another. */ + if (xQueueAddToSet(xQueues[x], xQueueSet) != pdFAIL) { + xQueueSetTasksStatus = pdFAIL; + } + } + } + + /* Attempt to remove a queue from a queue set it does not belong + to (NULL being passed as the queue set in this case). */ + if (xQueueRemoveFromSet(xQueues[0], NULL) != pdFAIL) { + /* It is not possible to successfully remove a queue from a queue + set it does not belong to. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Attempt to remove a queue from the queue set it does belong to. */ + if (xQueueRemoveFromSet(xQueues[0], xQueueSet) != pdPASS) { + /* It should be possible to remove the queue from the queue set it + does belong to. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Add an item to the queue before attempting to add it back into the + set. */ + xQueueSend(xQueues[0], (void *)&ulValueToSend, 0); + if (xQueueAddToSet(xQueues[0], xQueueSet) != pdFAIL) { + /* Should not be able to add a non-empty queue to a set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Remove the item from the queue before adding the queue back into the + set so the dynamic tests can begin. */ + xQueueReceive(xQueues[0], &ulValueToSend, 0); + if (xQueueAddToSet(xQueues[0], xQueueSet) != pdPASS) { + /* If the queue was successfully removed from the queue set then it + should be possible to add it back in again. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* The task that sends to the queues is not running yet, so attempting to + read from the queue set should fail. */ + if (xQueueSelectFromSet(xQueueSet, queuesetSHORT_DELAY) != NULL) { + xQueueSetTasksStatus = pdFAIL; + } + + /* Testing the behaviour of queue sets when a queue overwrite operation is + performed on a set member requires a special test as overwrites can only + be performed on queues that have a length of 1. */ + prvTestQueueOverwriteWithQueueSet(); + + /* Test the case where two queues within a set are written to with + xQueueOverwrite(). */ + prvTestQueueOverwriteOnTwoQueusInQueueSet(); + prvTestQueueOverwriteFromISROnTwoQueusInQueueSet(); + + /* In case any of the above have already indicated a failure. */ + configASSERT(xQueueSetTasksStatus != pdFAIL); + + /* Resume the task that writes to the queues. */ + vTaskResume(xQueueSetSendingTask); + + /* Let the ISR access the queues also. */ + xSetupComplete = pdTRUE; +} +/*-----------------------------------------------------------*/ + +static size_t prvRand(void) +{ + uxNextRand = (uxNextRand * (size_t)1103515245) + (size_t)12345; + return (uxNextRand / (size_t)65536) % (size_t)32768; +} +/*-----------------------------------------------------------*/ + +static void prvSRand(size_t uxSeed) +{ + uxNextRand = uxSeed; +} + +#endif /* ( configUSE_QUEUE_SETS == 1 ) */ diff --git a/freertos/cvitek/task/demo/Common/Minimal/QueueSetPolling.c b/freertos/cvitek/task/demo/Common/Minimal/QueueSetPolling.c new file mode 100644 index 000000000..e9579ac47 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/QueueSetPolling.c @@ -0,0 +1,175 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Tests the use of queue sets. + * + * A receive task creates a number of queues and adds them to a queue set before + * blocking on the queue set receive. A transmit task and (optionally) an + * interrupt repeatedly unblocks the receive task by sending messages to the + * queues in a pseudo random order. The receive task removes the messages from + * the queues and flags an error if the received message does not match that + * expected. The task sends values in the range 0 to + * queuesetINITIAL_ISR_TX_VALUE, and the ISR sends value in the range + * queuesetINITIAL_ISR_TX_VALUE to ULONG_MAX. + */ + +/* Standard includes. */ +#include <stdlib.h> +#include <limits.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo includes. */ +#include "QueueSetPolling.h" + +#if (configUSE_QUEUE_SETS == \ + 1) /* Remove tests if queue sets are not defined. */ + +/* The length of each created queue. */ +#define setpollQUEUE_LENGTH 10 + +/* Block times used in this demo. A block time or 0 means "don't block". */ +#define setpollDONT_BLOCK 0 + +/* The ISR sends to the queue every setpollISR_TX_PERIOD ticks. */ +#define queuesetISR_TX_PERIOD (50UL) + +/* + * The task that reads from the queue set. + */ +static void prvQueueSetReceivingTask(void *pvParameters); + +/*-----------------------------------------------------------*/ + +/* The queue that is added to the set. */ +static QueueHandle_t xQueue = NULL; + +/* The handle of the queue set to which the queue is added. */ +static QueueSetHandle_t xQueueSet = NULL; + +/* Set to pdFAIL if an error is detected by any queue set task. +ulCycleCounter will only be incremented if xQueueSetTasksSatus equals pdPASS. */ +static volatile BaseType_t xQueueSetPollStatus = pdPASS; + +/* Counter used to ensure the task is still running. */ +static uint32_t ulCycleCounter = 0; + +/*-----------------------------------------------------------*/ + +void vStartQueueSetPollingTask(void) +{ + /* Create the queue that is added to the set, the set, and add the queue to + the set. */ + xQueue = xQueueCreate(setpollQUEUE_LENGTH, sizeof(uint32_t)); + xQueueSet = xQueueCreateSet(setpollQUEUE_LENGTH); + + if ((xQueue != NULL) && (xQueueSet != NULL)) { + xQueueAddToSet(xQueue, xQueueSet); + + /* Create the task. */ + xTaskCreate(prvQueueSetReceivingTask, "SetPoll", + configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, + NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvQueueSetReceivingTask(void *pvParameters) +{ + uint32_t ulReceived, ulExpected = 0; + QueueHandle_t xActivatedQueue; + + /* Remove compiler warnings. */ + (void)pvParameters; + + for (;;) { + /* Is a message waiting? A block time is not used to ensure the queue + set is polled while it is being written to from an interrupt. */ + xActivatedQueue = + xQueueSelectFromSet(xQueueSet, setpollDONT_BLOCK); + + if (xActivatedQueue != NULL) { + /* Reading from the queue should pass with a zero block time as + this task will only run when something has been posted to a task + in the queue set. */ + if (xQueueReceive(xActivatedQueue, &ulReceived, + setpollDONT_BLOCK) != pdPASS) { + xQueueSetPollStatus = pdFAIL; + } + + if (ulReceived == ulExpected) { + ulExpected++; + } else { + xQueueSetPollStatus = pdFAIL; + } + + if (xQueueSetPollStatus == pdPASS) { + ulCycleCounter++; + } + } + } +} +/*-----------------------------------------------------------*/ + +void vQueueSetPollingInterruptAccess(void) +{ + static uint32_t ulCallCount = 0, ulValueToSend = 0; + + /* It is intended that this function is called from the tick hook + function, so each call is one tick period apart. */ + ulCallCount++; + if (ulCallCount > queuesetISR_TX_PERIOD) { + ulCallCount = 0; + + if (xQueueSendFromISR(xQueue, (void *)&ulValueToSend, NULL) == + pdPASS) { + /* Send the next value next time. */ + ulValueToSend++; + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreQueueSetPollTasksStillRunning(void) +{ + static uint32_t ulLastCycleCounter = 0; + + if (ulLastCycleCounter == ulCycleCounter) { + xQueueSetPollStatus = pdFAIL; + } + + ulLastCycleCounter = ulCycleCounter; + + return xQueueSetPollStatus; +} +/*-----------------------------------------------------------*/ + +#endif /* ( configUSE_QUEUE_SETS == 1 ) */ diff --git a/freertos/cvitek/task/demo/Common/Minimal/StaticAllocation.c b/freertos/cvitek/task/demo/Common/Minimal/StaticAllocation.c new file mode 100644 index 000000000..6d4697dfd --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/StaticAllocation.c @@ -0,0 +1,1074 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Demonstrates how to create FreeRTOS objects using pre-allocated memory, + * rather than the normal dynamically allocated memory, and tests objects being + * created and deleted with both statically allocated memory and dynamically + * allocated memory. + * + * See http://www.FreeRTOS.org/Static_Vs_Dynamic_Memory_Allocation.html + */ + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" +#include "event_groups.h" +#include "timers.h" + +/* Demo program include files. */ +#include "StaticAllocation.h" + +/* Exclude the entire file if configSUPPORT_STATIC_ALLOCATION is 0. */ +#if (configSUPPORT_STATIC_ALLOCATION == 1) + +/* The priority at which the task that performs the tests is created. */ +#define staticTASK_PRIORITY (tskIDLE_PRIORITY + 2) + +/* The length of the queue, in items, not bytes, used in the queue static +allocation tests. */ +#define staticQUEUE_LENGTH_IN_ITEMS (5) + +/* A block time of 0 simply means "don't block". */ +#define staticDONT_BLOCK ((TickType_t)0) + +/* Binary semaphores have a maximum count of 1. */ +#define staticBINARY_SEMAPHORE_MAX_COUNT (1) + +/* The size of the stack used by the task that runs the tests. */ +#define staticCREATOR_TASK_STACK_SIZE (configMINIMAL_STACK_SIZE * 2) + +/* The number of times the software timer will execute before stopping itself. */ +#define staticMAX_TIMER_CALLBACK_EXECUTIONS (5) + +/*-----------------------------------------------------------*/ + +/* + * The task that repeatedly creates and deletes statically allocated tasks, and + * other RTOS objects. + */ +static void prvStaticallyAllocatedCreator(void *pvParameters); + +/* + * The callback function used by the software timer that is repeatedly created + * and deleted using both static and dynamically allocated memory. + */ +static void prvTimerCallback(TimerHandle_t xExpiredTimer); + +/* + * A task that is created and deleted multiple times, using both statically and + * dynamically allocated stack and TCB. + */ +static void prvStaticallyAllocatedTask(void *pvParameters); + +/* + * A function that demonstrates and tests the API functions that create and + * delete tasks using both statically and dynamically allocated TCBs and stacks. + */ +static void prvCreateAndDeleteStaticallyAllocatedTasks(void); + +/* + * A function that demonstrates and tests the API functions that create and + * delete event groups using both statically and dynamically allocated RAM. + */ +static void prvCreateAndDeleteStaticallyAllocatedEventGroups(void); + +/* + * A function that demonstrates and tests the API functions that create and + * delete queues using both statically and dynamically allocated RAM. + */ +static void prvCreateAndDeleteStaticallyAllocatedQueues(void); + +/* + * A function that demonstrates and tests the API functions that create and + * delete binary semaphores using both statically and dynamically allocated RAM. + */ +static void prvCreateAndDeleteStaticallyAllocatedBinarySemaphores(void); + +/* + * A function that demonstrates and tests the API functions that create and + * delete software timers using both statically and dynamically allocated RAM. + */ +static void prvCreateAndDeleteStaticallyAllocatedTimers(void); + +/* + * A function that demonstrates and tests the API functions that create and + * delete mutexes using both statically and dynamically allocated RAM. + */ +static void prvCreateAndDeleteStaticallyAllocatedMutexes(void); + +/* + * A function that demonstrates and tests the API functions that create and + * delete counting semaphores using both statically and dynamically allocated + * RAM. + */ +static void prvCreateAndDeleteStaticallyAllocatedCountingSemaphores(void); + +/* + * A function that demonstrates and tests the API functions that create and + * delete recursive mutexes using both statically and dynamically allocated RAM. + */ +static void prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes(void); + +/* + * Utility function to create pseudo random numbers. + */ +static UBaseType_t prvRand(void); + +/* + * The task that creates and deletes other tasks has to delay occasionally to + * ensure lower priority tasks are not starved of processing time. A pseudo + * random delay time is used just to add a little bit of randomisation into the + * execution pattern. prvGetNextDelayTime() generates the pseudo random delay. + */ +static TickType_t prvGetNextDelayTime(void); + +/* + * Checks the basic operation of a queue after it has been created. + */ +static void prvSanityCheckCreatedQueue(QueueHandle_t xQueue); + +/* + * Checks the basic operation of a recursive mutex after it has been created. + */ +static void prvSanityCheckCreatedRecursiveMutex(SemaphoreHandle_t xSemaphore); + +/* + * Checks the basic operation of a binary semaphore after it has been created. + */ +static void prvSanityCheckCreatedSemaphore(SemaphoreHandle_t xSemaphore, + UBaseType_t uxMaxCount); + +/* + * Checks the basic operation of an event group after it has been created. + */ +static void prvSanityCheckCreatedEventGroup(EventGroupHandle_t xEventGroup); + +/*-----------------------------------------------------------*/ + +/* StaticTask_t is a publicly accessible structure that has the same size and +alignment requirements as the real TCB structure. It is provided as a mechanism +for applications to know the size of the TCB (which is dependent on the +architecture and configuration file settings) without breaking the strict data +hiding policy by exposing the real TCB. This StaticTask_t variable is passed +into the xTaskCreateStatic() function that creates the +prvStaticallyAllocatedCreator() task, and will hold the TCB of the created +tasks. */ +static StaticTask_t xCreatorTaskTCBBuffer; + +/* This is the stack that will be used by the prvStaticallyAllocatedCreator() +task, which is itself created using statically allocated buffers (so without any +dynamic memory allocation). */ +static StackType_t uxCreatorTaskStackBuffer[staticCREATOR_TASK_STACK_SIZE]; + +/* Used by the pseudo random number generating function. */ +static uint32_t ulNextRand = 0; + +/* Used so a check task can ensure this test is still executing, and not +stalled. */ +static volatile UBaseType_t uxCycleCounter = 0; + +/* A variable that gets set to pdTRUE if an error is detected. */ +static volatile BaseType_t xErrorOccurred = pdFALSE; + +/*-----------------------------------------------------------*/ + +void vStartStaticallyAllocatedTasks(void) +{ + /* Create a single task, which then repeatedly creates and deletes the other + RTOS objects using both statically and dynamically allocated RAM. */ + xTaskCreateStatic( + prvStaticallyAllocatedCreator, /* The function that implements the task being created. */ + "StatCreate", /* Text name for the task - not used by the RTOS, its just to assist debugging. */ + staticCREATOR_TASK_STACK_SIZE, /* Size of the buffer passed in as the stack - in words, not bytes! */ + NULL, /* Parameter passed into the task - not used in this case. */ + staticTASK_PRIORITY, /* Priority of the task. */ + &(uxCreatorTaskStackBuffer + [0]), /* The buffer to use as the task's stack. */ + &xCreatorTaskTCBBuffer); /* The variable that will hold the task's TCB. */ +} +/*-----------------------------------------------------------*/ + +static void prvStaticallyAllocatedCreator(void *pvParameters) +{ + /* Avoid compiler warnings. */ + (void)pvParameters; + + for (;;) { + /* Loop, running functions that create and delete the various RTOS + objects that can be optionally created using either static or dynamic + memory allocation. */ + prvCreateAndDeleteStaticallyAllocatedTasks(); + prvCreateAndDeleteStaticallyAllocatedQueues(); + + /* Delay to ensure lower priority tasks get CPU time, and increment the + cycle counter so a 'check' task can determine that this task is still + executing. */ + vTaskDelay(prvGetNextDelayTime()); + uxCycleCounter++; + + prvCreateAndDeleteStaticallyAllocatedBinarySemaphores(); + prvCreateAndDeleteStaticallyAllocatedCountingSemaphores(); + + vTaskDelay(prvGetNextDelayTime()); + uxCycleCounter++; + + prvCreateAndDeleteStaticallyAllocatedMutexes(); + prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes(); + + vTaskDelay(prvGetNextDelayTime()); + uxCycleCounter++; + + prvCreateAndDeleteStaticallyAllocatedEventGroups(); + prvCreateAndDeleteStaticallyAllocatedTimers(); + } +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedCountingSemaphores(void) +{ + SemaphoreHandle_t xSemaphore; + const UBaseType_t uxMaxCount = (UBaseType_t)10; + + /* StaticSemaphore_t is a publicly accessible structure that has the same size +and alignment requirements as the real semaphore structure. It is provided as a +mechanism for applications to know the size of the semaphore (which is dependent +on the architecture and configuration file settings) without breaking the strict +data hiding policy by exposing the real semaphore internals. This +StaticSemaphore_t variable is passed into the xSemaphoreCreateCountingStatic() +function calls within this function. NOTE: In most usage scenarios now it is +faster and more memory efficient to use a direct to task notification instead of +a counting semaphore. http://www.freertos.org/RTOS-task-notifications.html */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateCountingStatic() has one more + parameter than the usual xSemaphoreCreateCounting() function. The parameter + is a pointer to the pre-allocated StaticSemaphore_t structure, which will + hold information on the semaphore in an anonymous way. If the pointer is + passed as NULL then the structure will be allocated dynamically, just as + when xSemaphoreCreateCounting() is called. */ + xSemaphore = xSemaphoreCreateCountingStatic(uxMaxCount, 0, + &xSemaphoreBuffer); + + /* The semaphore handle should equal the static semaphore structure passed + into the xSemaphoreCreateBinaryStatic() function. */ + configASSERT(xSemaphore == (SemaphoreHandle_t)&xSemaphoreBuffer); + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore(xSemaphore, uxMaxCount); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete(xSemaphore); + +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + /* Now do the same but using dynamically allocated buffers to ensure the + delete functions are working correctly in both the static and dynamic + allocation cases. */ + xSemaphore = xSemaphoreCreateCounting(uxMaxCount, 0); + configASSERT(xSemaphore != NULL); + prvSanityCheckCreatedSemaphore(xSemaphore, uxMaxCount); + vSemaphoreDelete(xSemaphore); + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes(void) +{ + SemaphoreHandle_t xSemaphore; + + /* StaticSemaphore_t is a publicly accessible structure that has the same size +and alignment requirements as the real semaphore structure. It is provided as a +mechanism for applications to know the size of the semaphore (which is dependent +on the architecture and configuration file settings) without breaking the strict +data hiding policy by exposing the real semaphore internals. This +StaticSemaphore_t variable is passed into the +xSemaphoreCreateRecursiveMutexStatic() function calls within this function. */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateRecursiveMutexStatic() has one + more parameter than the usual xSemaphoreCreateRecursiveMutex() function. + The parameter is a pointer to the pre-allocated StaticSemaphore_t structure, + which will hold information on the semaphore in an anonymous way. If the + pointer is passed as NULL then the structure will be allocated dynamically, + just as when xSemaphoreCreateRecursiveMutex() is called. */ + xSemaphore = xSemaphoreCreateRecursiveMutexStatic(&xSemaphoreBuffer); + + /* The semaphore handle should equal the static semaphore structure passed + into the xSemaphoreCreateBinaryStatic() function. */ + configASSERT(xSemaphore == (SemaphoreHandle_t)&xSemaphoreBuffer); + + /* Ensure the semaphore passes a few sanity checks as a valid + recursive semaphore. */ + prvSanityCheckCreatedRecursiveMutex(xSemaphore); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete(xSemaphore); + +/* Now do the same using dynamically allocated buffers to ensure the delete + functions are working correctly in both the static and dynamic memory + allocation cases. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + xSemaphore = xSemaphoreCreateRecursiveMutex(); + configASSERT(xSemaphore != NULL); + prvSanityCheckCreatedRecursiveMutex(xSemaphore); + vSemaphoreDelete(xSemaphore); + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedQueues(void) +{ + QueueHandle_t xQueue; + + /* StaticQueue_t is a publicly accessible structure that has the same size and +alignment requirements as the real queue structure. It is provided as a +mechanism for applications to know the size of the queue (which is dependent on +the architecture and configuration file settings) without breaking the strict +data hiding policy by exposing the real queue internals. This StaticQueue_t +variable is passed into the xQueueCreateStatic() function calls within this +function. */ + static StaticQueue_t xStaticQueue; + + /* The queue storage area must be large enough to hold the maximum number of +items it is possible for the queue to hold at any one time, which equals the +queue length (in items, not bytes) multiplied by the size of each item. In this +case the queue will hold staticQUEUE_LENGTH_IN_ITEMS 64-bit items. See +http://www.freertos.org/Embedded-RTOS-Queues.html */ + static uint8_t ucQueueStorageArea[staticQUEUE_LENGTH_IN_ITEMS * + sizeof(uint64_t)]; + + /* Create the queue. xQueueCreateStatic() has two more parameters than the + usual xQueueCreate() function. The first new parameter is a pointer to the + pre-allocated queue storage area. The second new parameter is a pointer to + the StaticQueue_t structure that will hold the queue state information in + an anonymous way. If the two pointers are passed as NULL then the data + will be allocated dynamically as if xQueueCreate() had been called. */ + xQueue = xQueueCreateStatic( + staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */ + sizeof(uint64_t), /* The size of each item. */ + ucQueueStorageArea, /* The buffer used to hold items within the queue. */ + &xStaticQueue); /* The static queue structure that will hold the state of the queue. */ + + /* The queue handle should equal the static queue structure passed into the + xQueueCreateStatic() function. */ + configASSERT(xQueue == (QueueHandle_t)&xStaticQueue); + + /* Ensure the queue passes a few sanity checks as a valid queue. */ + prvSanityCheckCreatedQueue(xQueue); + + /* Delete the queue again so the buffers can be reused. */ + vQueueDelete(xQueue); + +/* Now do the same using a dynamically allocated queue to ensure the delete + function is working correctly in both the static and dynamic memory + allocation cases. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + xQueue = xQueueCreate( + staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */ + sizeof(uint64_t)); /* The size of each item. */ + + /* The queue handle should equal the static queue structure passed into the + xQueueCreateStatic() function. */ + configASSERT(xQueue != NULL); + + /* Ensure the queue passes a few sanity checks as a valid queue. */ + prvSanityCheckCreatedQueue(xQueue); + + /* Delete the queue again so the buffers can be reused. */ + vQueueDelete(xQueue); + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedMutexes(void) +{ + SemaphoreHandle_t xSemaphore; + BaseType_t xReturned; + + /* StaticSemaphore_t is a publicly accessible structure that has the same size +and alignment requirements as the real semaphore structure. It is provided as a +mechanism for applications to know the size of the semaphore (which is dependent +on the architecture and configuration file settings) without breaking the strict +data hiding policy by exposing the real semaphore internals. This +StaticSemaphore_t variable is passed into the xSemaphoreCreateMutexStatic() +function calls within this function. */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateMutexStatic() has one more + parameter than the usual xSemaphoreCreateMutex() function. The parameter + is a pointer to the pre-allocated StaticSemaphore_t structure, which will + hold information on the semaphore in an anonymous way. If the pointer is + passed as NULL then the structure will be allocated dynamically, just as + when xSemaphoreCreateMutex() is called. */ + xSemaphore = xSemaphoreCreateMutexStatic(&xSemaphoreBuffer); + + /* The semaphore handle should equal the static semaphore structure passed + into the xSemaphoreCreateMutexStatic() function. */ + configASSERT(xSemaphore == (SemaphoreHandle_t)&xSemaphoreBuffer); + + /* Take the mutex so the mutex is in the state expected by the + prvSanityCheckCreatedSemaphore() function. */ + xReturned = xSemaphoreTake(xSemaphore, staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore(xSemaphore, + staticBINARY_SEMAPHORE_MAX_COUNT); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete(xSemaphore); + +/* Now do the same using a dynamically allocated mutex to ensure the delete + function is working correctly in both the static and dynamic allocation + cases. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + xSemaphore = xSemaphoreCreateMutex(); + + /* The semaphore handle should equal the static semaphore structure + passed into the xSemaphoreCreateMutexStatic() function. */ + configASSERT(xSemaphore != NULL); + + /* Take the mutex so the mutex is in the state expected by the + prvSanityCheckCreatedSemaphore() function. */ + xReturned = xSemaphoreTake(xSemaphore, staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore( + xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete(xSemaphore); + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedBinarySemaphores(void) +{ + SemaphoreHandle_t xSemaphore; + + /* StaticSemaphore_t is a publicly accessible structure that has the same size +and alignment requirements as the real semaphore structure. It is provided as a +mechanism for applications to know the size of the semaphore (which is dependent +on the architecture and configuration file settings) without breaking the strict +data hiding policy by exposing the real semaphore internals. This +StaticSemaphore_t variable is passed into the xSemaphoreCreateBinaryStatic() +function calls within this function. NOTE: In most usage scenarios now it is +faster and more memory efficient to use a direct to task notification instead of +a binary semaphore. http://www.freertos.org/RTOS-task-notifications.html */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateBinaryStatic() has one more + parameter than the usual xSemaphoreCreateBinary() function. The parameter + is a pointer to the pre-allocated StaticSemaphore_t structure, which will + hold information on the semaphore in an anonymous way. If the pointer is + passed as NULL then the structure will be allocated dynamically, just as + when xSemaphoreCreateBinary() is called. */ + xSemaphore = xSemaphoreCreateBinaryStatic(&xSemaphoreBuffer); + + /* The semaphore handle should equal the static semaphore structure passed + into the xSemaphoreCreateBinaryStatic() function. */ + configASSERT(xSemaphore == (SemaphoreHandle_t)&xSemaphoreBuffer); + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore(xSemaphore, + staticBINARY_SEMAPHORE_MAX_COUNT); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete(xSemaphore); + +/* Now do the same using a dynamically allocated semaphore to check the + delete function is working correctly in both the static and dynamic + allocation cases. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + xSemaphore = xSemaphoreCreateBinary(); + configASSERT(xSemaphore != NULL); + prvSanityCheckCreatedSemaphore( + xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT); + vSemaphoreDelete(xSemaphore); + } +#endif + +/* There isn't a static version of the old and deprecated + vSemaphoreCreateBinary() macro (because its deprecated!), but check it is + still functioning correctly. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + vSemaphoreCreateBinary(xSemaphore); + + /* The macro starts with the binary semaphore available, but the test + function expects it to be unavailable. */ + if (xSemaphoreTake(xSemaphore, staticDONT_BLOCK) == pdFAIL) { + xErrorOccurred = pdTRUE; + } + + prvSanityCheckCreatedSemaphore( + xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT); + vSemaphoreDelete(xSemaphore); + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvTimerCallback(TimerHandle_t xExpiredTimer) +{ + UBaseType_t *puxVariableToIncrement; + BaseType_t xReturned; + + /* The timer callback just demonstrates it is executing by incrementing a + variable - the address of which is passed into the timer as its ID. Obtain + the address of the variable to increment. */ + puxVariableToIncrement = + (UBaseType_t *)pvTimerGetTimerID(xExpiredTimer); + + /* Increment the variable to show the timer callback has executed. */ + (*puxVariableToIncrement)++; + + /* If this callback has executed the required number of times, stop the + timer. */ + if (*puxVariableToIncrement == staticMAX_TIMER_CALLBACK_EXECUTIONS) { + /* This is called from a timer callback so must not block. See + http://www.FreeRTOS.org/FreeRTOS-timers-xTimerStop.html */ + xReturned = xTimerStop(xExpiredTimer, staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedTimers(void) +{ + TimerHandle_t xTimer; + UBaseType_t uxVariableToIncrement; + const TickType_t xTimerPeriod = pdMS_TO_TICKS(20); + BaseType_t xReturned; + + /* StaticTimer_t is a publicly accessible structure that has the same size +and alignment requirements as the real timer structure. It is provided as a +mechanism for applications to know the size of the timer structure (which is +dependent on the architecture and configuration file settings) without breaking +the strict data hiding policy by exposing the real timer internals. This +StaticTimer_t variable is passed into the xTimerCreateStatic() function calls +within this function. */ + StaticTimer_t xTimerBuffer; + + /* Create the software time. xTimerCreateStatic() has an extra parameter + than the normal xTimerCreate() API function. The parameter is a pointer to + the StaticTimer_t structure that will hold the software timer structure. If + the parameter is passed as NULL then the structure will be allocated + dynamically, just as if xTimerCreate() had been called. */ + xTimer = xTimerCreateStatic( + "T1", /* Text name for the task. Helps debugging only. Not used by FreeRTOS. */ + xTimerPeriod, /* The period of the timer in ticks. */ + pdTRUE, /* This is an auto-reload timer. */ + (void *)&uxVariableToIncrement, /* The variable incremented by the test is passed into the timer callback using the timer ID. */ + prvTimerCallback, /* The function to execute when the timer expires. */ + &xTimerBuffer); /* The buffer that will hold the software timer structure. */ + + /* The timer handle should equal the static timer structure passed into the + xTimerCreateStatic() function. */ + configASSERT(xTimer == (TimerHandle_t)&xTimerBuffer); + + /* Set the variable to 0, wait for a few timer periods to expire, then check + the timer callback has incremented the variable to the expected value. */ + uxVariableToIncrement = 0; + + /* This is a low priority so a block time should not be needed. */ + xReturned = xTimerStart(xTimer, staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + + vTaskDelay(xTimerPeriod * staticMAX_TIMER_CALLBACK_EXECUTIONS); + + /* By now the timer should have expired staticMAX_TIMER_CALLBACK_EXECUTIONS + times, and then stopped itself. */ + if (uxVariableToIncrement != staticMAX_TIMER_CALLBACK_EXECUTIONS) { + xErrorOccurred = pdTRUE; + } + + /* Finished with the timer, delete it. */ + xReturned = xTimerDelete(xTimer, staticDONT_BLOCK); + + /* Again, as this is a low priority task it is expected that the timer + command will have been sent even without a block time being used. */ + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Just to show the check task that this task is still executing. */ + uxCycleCounter++; + +/* Now do the same using a dynamically allocated software timer to ensure + the delete function is working correctly in both the static and dynamic + allocation cases. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + xTimer = xTimerCreate( + "T1", /* Text name for the task. Helps debugging only. Not used by FreeRTOS. */ + xTimerPeriod, /* The period of the timer in ticks. */ + pdTRUE, /* This is an auto-reload timer. */ + (void *)&uxVariableToIncrement, /* The variable incremented by the test is passed into the timer callback using the timer ID. */ + prvTimerCallback); /* The function to execute when the timer expires. */ + + configASSERT(xTimer != NULL); + + uxVariableToIncrement = 0; + xReturned = xTimerStart(xTimer, staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + + vTaskDelay(xTimerPeriod * staticMAX_TIMER_CALLBACK_EXECUTIONS); + + if (uxVariableToIncrement != + staticMAX_TIMER_CALLBACK_EXECUTIONS) { + xErrorOccurred = pdTRUE; + } + + xReturned = xTimerDelete(xTimer, staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedEventGroups(void) +{ + EventGroupHandle_t xEventGroup; + + /* StaticEventGroup_t is a publicly accessible structure that has the same size +and alignment requirements as the real event group structure. It is provided as +a mechanism for applications to know the size of the event group (which is +dependent on the architecture and configuration file settings) without breaking +the strict data hiding policy by exposing the real event group internals. This +StaticEventGroup_t variable is passed into the xSemaphoreCreateEventGroupStatic() +function calls within this function. */ + StaticEventGroup_t xEventGroupBuffer; + + /* Create the event group. xEventGroupCreateStatic() has an extra parameter + than the normal xEventGroupCreate() API function. The parameter is a + pointer to the StaticEventGroup_t structure that will hold the event group + structure. */ + xEventGroup = xEventGroupCreateStatic(&xEventGroupBuffer); + + /* The event group handle should equal the static event group structure + passed into the xEventGroupCreateStatic() function. */ + configASSERT(xEventGroup == (EventGroupHandle_t)&xEventGroupBuffer); + + /* Ensure the event group passes a few sanity checks as a valid event + group. */ + prvSanityCheckCreatedEventGroup(xEventGroup); + + /* Delete the event group again so the buffers can be reused. */ + vEventGroupDelete(xEventGroup); + +/* Now do the same using a dynamically allocated event group to ensure the + delete function is working correctly in both the static and dynamic + allocation cases. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + xEventGroup = xEventGroupCreate(); + configASSERT(xEventGroup != NULL); + prvSanityCheckCreatedEventGroup(xEventGroup); + vEventGroupDelete(xEventGroup); + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvCreateAndDeleteStaticallyAllocatedTasks(void) +{ + TaskHandle_t xCreatedTask; + + /* The variable that will hold the TCB of tasks created by this function. See +the comments above the declaration of the xCreatorTaskTCBBuffer variable for +more information. NOTE: This is not static so relies on the tasks that use it +being deleted before this function returns and deallocates its stack. That will +only be the case if configUSE_PREEMPTION is set to 1. */ + StaticTask_t xTCBBuffer; + + /* This buffer that will be used as the stack of tasks created by this function. +See the comments above the declaration of the uxCreatorTaskStackBuffer[] array +above for more information. */ + static StackType_t uxStackBuffer[configMINIMAL_STACK_SIZE]; + + /* Create the task. xTaskCreateStatic() has two more parameters than + the usual xTaskCreate() function. The first new parameter is a pointer to + the pre-allocated stack. The second new parameter is a pointer to the + StaticTask_t structure that will hold the task's TCB. If both pointers are + passed as NULL then the respective object will be allocated dynamically as + if xTaskCreate() had been called. */ + xCreatedTask = xTaskCreateStatic( + prvStaticallyAllocatedTask, /* Function that implements the task. */ + "Static", /* Human readable name for the task. */ + configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */ + NULL, /* Parameter to pass into the task. */ + uxTaskPriorityGet(NULL) + 1, /* The priority of the task. */ + &(uxStackBuffer[0]), /* The buffer to use as the task's stack. */ + &xTCBBuffer); /* The variable that will hold that task's TCB. */ + + /* Check the task was created correctly, then delete the task. */ + if (xCreatedTask == NULL) { + xErrorOccurred = pdTRUE; + } else if (eTaskGetState(xCreatedTask) != eSuspended) { + /* The created task had a higher priority so should have executed and + suspended itself by now. */ + xErrorOccurred = pdTRUE; + } else { + vTaskDelete(xCreatedTask); + } + +/* Now do the same using a dynamically allocated task to ensure the delete + function is working correctly in both the static and dynamic allocation + cases. */ +#if (configSUPPORT_DYNAMIC_ALLOCATION == 1) + { + BaseType_t xReturned; + + xReturned = xTaskCreate( + prvStaticallyAllocatedTask, /* Function that implements the task - the same function is used but is actually dynamically allocated this time. */ + "Static", /* Human readable name for the task. */ + configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */ + NULL, /* Parameter to pass into the task. */ + uxTaskPriorityGet(NULL) + + 1, /* The priority of the task. */ + &xCreatedTask); /* Handle of the task being created. */ + + if (eTaskGetState(xCreatedTask) != eSuspended) { + xErrorOccurred = pdTRUE; + } + + configASSERT(xReturned == pdPASS); + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + vTaskDelete(xCreatedTask); + } +#endif +} +/*-----------------------------------------------------------*/ + +static void prvStaticallyAllocatedTask(void *pvParameters) +{ + (void)pvParameters; + + /* The created task just suspends itself to wait to get deleted. The task + that creates this task checks this task is in the expected Suspended state + before deleting it. */ + vTaskSuspend(NULL); +} +/*-----------------------------------------------------------*/ + +static UBaseType_t prvRand(void) +{ + const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL; + + /* Utility function to generate a pseudo random number. */ + ulNextRand = (ulMultiplier * ulNextRand) + ulIncrement; + return ((ulNextRand >> 16UL) & 0x7fffUL); +} +/*-----------------------------------------------------------*/ + +static TickType_t prvGetNextDelayTime(void) +{ + TickType_t xNextDelay; + const TickType_t xMaxDelay = pdMS_TO_TICKS((TickType_t)150); + const TickType_t xMinDelay = pdMS_TO_TICKS((TickType_t)75); + const TickType_t xTinyDelay = pdMS_TO_TICKS((TickType_t)2); + + /* Generate the next delay time. This is kept within a narrow band so as + not to disturb the timing of other tests - but does add in some pseudo + randomisation into the tests. */ + do { + xNextDelay = prvRand() % xMaxDelay; + + /* Just in case this loop is executed lots of times. */ + vTaskDelay(xTinyDelay); + + } while (xNextDelay < xMinDelay); + + return xNextDelay; +} +/*-----------------------------------------------------------*/ + +static void prvSanityCheckCreatedEventGroup(EventGroupHandle_t xEventGroup) +{ + EventBits_t xEventBits; + const EventBits_t xFirstTestBits = (EventBits_t)0xaa, + xSecondTestBits = (EventBits_t)0x55; + + /* The event group should not have any bits set yet. */ + xEventBits = xEventGroupGetBits(xEventGroup); + + if (xEventBits != (EventBits_t)0) { + xErrorOccurred = pdTRUE; + } + + /* Some some bits, then read them back to check they are as expected. */ + xEventGroupSetBits(xEventGroup, xFirstTestBits); + + xEventBits = xEventGroupGetBits(xEventGroup); + + if (xEventBits != xFirstTestBits) { + xErrorOccurred = pdTRUE; + } + + xEventGroupSetBits(xEventGroup, xSecondTestBits); + + xEventBits = xEventGroupGetBits(xEventGroup); + + if (xEventBits != (xFirstTestBits | xSecondTestBits)) { + xErrorOccurred = pdTRUE; + } + + /* Finally try clearing some bits too and check that operation proceeds as + expected. */ + xEventGroupClearBits(xEventGroup, xFirstTestBits); + + xEventBits = xEventGroupGetBits(xEventGroup); + + if (xEventBits != xSecondTestBits) { + xErrorOccurred = pdTRUE; + } +} +/*-----------------------------------------------------------*/ + +static void prvSanityCheckCreatedSemaphore(SemaphoreHandle_t xSemaphore, + UBaseType_t uxMaxCount) +{ + BaseType_t xReturned; + UBaseType_t x; + const TickType_t xShortBlockTime = pdMS_TO_TICKS(10); + TickType_t xTickCount; + + /* The binary semaphore should start 'empty', so a call to xSemaphoreTake() + should fail. */ + xTickCount = xTaskGetTickCount(); + xReturned = xSemaphoreTake(xSemaphore, xShortBlockTime); + + if (((TickType_t)(xTaskGetTickCount() - xTickCount)) < + xShortBlockTime) { + /* Did not block on the semaphore as long as expected. */ + xErrorOccurred = pdTRUE; + } + + if (xReturned != pdFAIL) { + xErrorOccurred = pdTRUE; + } + + /* Should be possible to 'give' the semaphore up to a maximum of uxMaxCount + times. */ + for (x = 0; x < uxMaxCount; x++) { + xReturned = xSemaphoreGive(xSemaphore); + + if (xReturned == pdFAIL) { + xErrorOccurred = pdTRUE; + } + } + + /* Giving the semaphore again should fail, as it is 'full'. */ + xReturned = xSemaphoreGive(xSemaphore); + + if (xReturned != pdFAIL) { + xErrorOccurred = pdTRUE; + } + + configASSERT(uxSemaphoreGetCount(xSemaphore) == uxMaxCount); + + /* Should now be possible to 'take' the semaphore up to a maximum of + uxMaxCount times without blocking. */ + for (x = 0; x < uxMaxCount; x++) { + xReturned = xSemaphoreTake(xSemaphore, staticDONT_BLOCK); + + if (xReturned == pdFAIL) { + xErrorOccurred = pdTRUE; + } + } + + /* Back to the starting condition, where the semaphore should not be + available. */ + xTickCount = xTaskGetTickCount(); + xReturned = xSemaphoreTake(xSemaphore, xShortBlockTime); + + if (((TickType_t)(xTaskGetTickCount() - xTickCount)) < + xShortBlockTime) { + /* Did not block on the semaphore as long as expected. */ + xErrorOccurred = pdTRUE; + } + + if (xReturned != pdFAIL) { + xErrorOccurred = pdTRUE; + } + + configASSERT(uxSemaphoreGetCount(xSemaphore) == 0); +} +/*-----------------------------------------------------------*/ + +static void prvSanityCheckCreatedQueue(QueueHandle_t xQueue) +{ + uint64_t ull, ullRead; + BaseType_t xReturned, xLoop; + + /* This test is done twice to ensure the queue storage area wraps. */ + for (xLoop = 0; xLoop < 2; xLoop++) { + /* A very basic test that the queue can be written to and read from as + expected. First the queue should be empty. */ + xReturned = xQueueReceive(xQueue, &ull, staticDONT_BLOCK); + if (xReturned != errQUEUE_EMPTY) { + xErrorOccurred = pdTRUE; + } + + /* Now it should be possible to write to the queue staticQUEUE_LENGTH_IN_ITEMS + times. */ + for (ull = 0; ull < staticQUEUE_LENGTH_IN_ITEMS; ull++) { + xReturned = xQueueSend(xQueue, &ull, staticDONT_BLOCK); + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + } + + /* Should not now be possible to write to the queue again. */ + xReturned = xQueueSend(xQueue, &ull, staticDONT_BLOCK); + if (xReturned != errQUEUE_FULL) { + xErrorOccurred = pdTRUE; + } + + /* Now read back from the queue to ensure the data read back matches that + written. */ + for (ull = 0; ull < staticQUEUE_LENGTH_IN_ITEMS; ull++) { + xReturned = xQueueReceive(xQueue, &ullRead, + staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + + if (ullRead != ull) { + xErrorOccurred = pdTRUE; + } + } + + /* The queue should be empty again. */ + xReturned = xQueueReceive(xQueue, &ull, staticDONT_BLOCK); + if (xReturned != errQUEUE_EMPTY) { + xErrorOccurred = pdTRUE; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvSanityCheckCreatedRecursiveMutex(SemaphoreHandle_t xSemaphore) +{ + const BaseType_t xLoops = 5; + BaseType_t x, xReturned; + + /* A very basic test that the recursive semaphore behaved like a recursive + semaphore. First the semaphore should not be able to be given, as it has not + yet been taken. */ + xReturned = xSemaphoreGiveRecursive(xSemaphore); + + if (xReturned != pdFAIL) { + xErrorOccurred = pdTRUE; + } + + /* Now it should be possible to take the mutex a number of times. */ + for (x = 0; x < xLoops; x++) { + xReturned = + xSemaphoreTakeRecursive(xSemaphore, staticDONT_BLOCK); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + } + + /* Should be possible to give the semaphore the same number of times as it + was given in the loop above. */ + for (x = 0; x < xLoops; x++) { + xReturned = xSemaphoreGiveRecursive(xSemaphore); + + if (xReturned != pdPASS) { + xErrorOccurred = pdTRUE; + } + } + + /* No more gives should be possible though. */ + xReturned = xSemaphoreGiveRecursive(xSemaphore); + + if (xReturned != pdFAIL) { + xErrorOccurred = pdTRUE; + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreStaticAllocationTasksStillRunning(void) +{ + static UBaseType_t uxLastCycleCounter = 0; + BaseType_t xReturn; + + if (uxCycleCounter == uxLastCycleCounter) { + xErrorOccurred = pdTRUE; + } else { + uxLastCycleCounter = uxCycleCounter; + } + + if (xErrorOccurred != pdFALSE) { + xReturn = pdFAIL; + } else { + xReturn = pdPASS; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +/* Exclude the entire file if configSUPPORT_STATIC_ALLOCATION is 0. */ +#endif /* configSUPPORT_STATIC_ALLOCATION == 1 */ diff --git a/freertos/cvitek/task/demo/Common/Minimal/StreamBufferDemo.c b/freertos/cvitek/task/demo/Common/Minimal/StreamBufferDemo.c new file mode 100644 index 000000000..4cbbcd2d3 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/StreamBufferDemo.c @@ -0,0 +1,1218 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* Standard includes. */ +#include "stdio.h" +#include "string.h" + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "stream_buffer.h" + +/* Demo app includes. */ +#include "StreamBufferDemo.h" + +/* The number of bytes of storage in the stream buffers used in this test. */ +#define sbSTREAM_BUFFER_LENGTH_BYTES ((size_t)30) + +/* Stream buffer length one. */ +#define sbSTREAM_BUFFER_LENGTH_ONE ((size_t)1) + +/* Start and end ASCII characters used in data sent to the buffers. */ +#define sbASCII_SPACE 32 +#define sbASCII_TILDA 126 + +/* Defines the number of tasks to create in this test and demo. */ +#define sbNUMBER_OF_ECHO_CLIENTS (2) +#define sbNUMBER_OF_SENDER_TASKS (2) + +/* Priority of the test tasks. The send and receive go from low to high +priority tasks, and from high to low priority tasks. */ +#define sbLOWER_PRIORITY (tskIDLE_PRIORITY) +#define sbHIGHER_PRIORITY (tskIDLE_PRIORITY + 1) + +/* Block times used when sending and receiving from the stream buffers. */ +#define sbRX_TX_BLOCK_TIME pdMS_TO_TICKS(125UL) + +/* A block time of 0 means "don't block". */ +#define sbDONT_BLOCK (0) + +/* The trigger level sets the number of bytes that must be present in the +stream buffer before a task that is blocked on the stream buffer is moved out of +the Blocked state so it can read the bytes. */ +#define sbTRIGGER_LEVEL_1 (1) + +/* The size of the stack allocated to the tasks that run as part of this demo/ +test. The stack size is over generous in most cases. */ +#ifndef configSTREAM_BUFFER_SENDER_TASK_STACK_SIZE +#define sbSTACK_SIZE \ + (configMINIMAL_STACK_SIZE + (configMINIMAL_STACK_SIZE >> 1)) +#else +#define sbSTACK_SIZE configSTREAM_BUFFER_SENDER_TASK_STACK_SIZE +#endif + +#ifndef configSTREAM_BUFFER_SMALLER_TASK_STACK_SIZE +#define sbSMALLER_STACK_SIZE sbSTACK_SIZE +#else +#define sbSMALLER_STACK_SIZE configSTREAM_BUFFER_SMALLER_TASK_STACK_SIZE +#endif + +/*-----------------------------------------------------------*/ + +/* + * Performs various tests that do not require multiple tasks to interact. + */ +static void prvSingleTaskTests(StreamBufferHandle_t xStreamBuffer); + +/* + * Tests sending and receiving various lengths of data via a stream buffer. + * The echo client sends the data to the echo server, which then sends the + * data back to the echo client, which checks it receives exactly what it + * sent. + */ +static void prvEchoClient(void *pvParameters); +static void prvEchoServer(void *pvParameters); + +/* + * Tasks that send and receive to a stream buffer at a low priority and without + * blocking, so the send and receive functions interleave in time as the tasks + * are switched in and out. + */ +static void prvNonBlockingReceiverTask(void *pvParameters); +static void prvNonBlockingSenderTask(void *pvParameters); + +/* Performs an assert() like check in a way that won't get removed when +performing a code coverage analysis. */ +static void prvCheckExpectedState(BaseType_t xState); + +/* + * A task that creates a stream buffer with a specific trigger level, then + * receives a string from an interrupt (the RTOS tick hook) byte by byte to + * check it is only unblocked when the specified trigger level is reached. + */ +static void prvInterruptTriggerLevelTest(void *pvParameters); + +#if (configSUPPORT_STATIC_ALLOCATION == 1) +/* This file tests both statically and dynamically allocated stream buffers. + Allocate the structures and buffers to be used by the statically allocated + objects, which get used in the echo tests. */ +static void prvReceiverTask(void *pvParameters); +static void prvSenderTask(void *pvParameters); + +static StaticStreamBuffer_t xStaticStreamBuffers[sbNUMBER_OF_ECHO_CLIENTS]; +static uint8_t ucBufferStorage[sbNUMBER_OF_SENDER_TASKS] + [sbSTREAM_BUFFER_LENGTH_BYTES + 1]; +static uint32_t ulSenderLoopCounters[sbNUMBER_OF_SENDER_TASKS] = { 0 }; +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/*-----------------------------------------------------------*/ + +/* The buffers used by the echo client and server tasks. */ +typedef struct ECHO_STREAM_BUFFERS { + /* Handles to the data structures that describe the stream buffers. */ + StreamBufferHandle_t xEchoClientBuffer; + StreamBufferHandle_t xEchoServerBuffer; +} EchoStreamBuffers_t; +static volatile uint32_t ulEchoLoopCounters[sbNUMBER_OF_ECHO_CLIENTS] = { 0 }; + +/* The non-blocking tasks monitor their operation, and if no errors have been +found, increment ulNonBlockingRxCounter. xAreStreamBufferTasksStillRunning() +then checks ulNonBlockingRxCounter and only returns pdPASS if +ulNonBlockingRxCounter is still incrementing. */ +static volatile uint32_t ulNonBlockingRxCounter = 0; + +/* The task that receives characters from the tick interrupt in order to test +different trigger levels monitors its own behaviour. If it has not detected any +error then it increments ulInterruptTriggerCounter to indicate to the check task +that it is still operating correctly. */ +static volatile uint32_t ulInterruptTriggerCounter = 0UL; + +/* The stream buffer used from the tick interrupt. This sends one byte at a time +to a test task to test the trigger level operation. The variable is set to NULL +in between test runs. */ +static volatile StreamBufferHandle_t xInterruptStreamBuffer = NULL; + +/* The data sent from the tick interrupt to the task that tests the trigger +level functionality. */ +static const char *pcDataSentFromInterrupt = "0123456789"; + +/* Data that is longer than the buffer that is sent to the buffers as a stream +of bytes. Parts of which are written to the stream buffer to test writing +different lengths at different offsets, to many bytes, part streams, streams +that wrap, etc.. Two messages are defined to ensure left over data is not +accidentally read out of the buffer. */ +static const char *pc55ByteString = + "One two three four five six seven eight nine ten eleven"; +static const char *pc54ByteString = + "01234567891abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQ"; + +/* Used to log the status of the tests contained within this file for reporting +to a monitoring task ('check' task). */ +static BaseType_t xErrorStatus = pdPASS; + +/*-----------------------------------------------------------*/ + +void vStartStreamBufferTasks(void) +{ + StreamBufferHandle_t xStreamBuffer; + + /* The echo servers sets up the stream buffers before creating the echo + client tasks. One set of tasks has the server as the higher priority, and + the other has the client as the higher priority. */ + xTaskCreate(prvEchoServer, "1StrEchoServer", sbSMALLER_STACK_SIZE, NULL, + sbHIGHER_PRIORITY, NULL); + xTaskCreate(prvEchoServer, "2StrEchoServer", sbSMALLER_STACK_SIZE, NULL, + sbLOWER_PRIORITY, NULL); + + /* The non blocking tasks run continuously and will interleave with each + other, so must be created at the lowest priority. The stream buffer they + use is created and passed in using the task's parameter. */ + xStreamBuffer = xStreamBufferCreate(sbSTREAM_BUFFER_LENGTH_BYTES, + sbTRIGGER_LEVEL_1); + xTaskCreate(prvNonBlockingReceiverTask, "StrNonBlkRx", + configMINIMAL_STACK_SIZE, (void *)xStreamBuffer, + tskIDLE_PRIORITY, NULL); + xTaskCreate(prvNonBlockingSenderTask, "StrNonBlkTx", + configMINIMAL_STACK_SIZE, (void *)xStreamBuffer, + tskIDLE_PRIORITY, NULL); + + /* The task that receives bytes from an interrupt to test that it unblocks + at a specific trigger level must run at a high priority to minimise the risk + of it receiving more characters before it can execute again after being + unblocked. */ + xTaskCreate(prvInterruptTriggerLevelTest, "StrTrig", + configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, + NULL); + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + /* The sender tasks set up the stream buffers before creating the + receiver tasks. Priorities must be 0 and 1 as the priority is used to + index into the xStaticStreamBuffers and ucBufferStorage arrays. */ + xTaskCreate(prvSenderTask, "Str1Sender", sbSMALLER_STACK_SIZE, + NULL, sbHIGHER_PRIORITY, NULL); + xTaskCreate(prvSenderTask, "Str2Sender", sbSMALLER_STACK_SIZE, + NULL, sbLOWER_PRIORITY, NULL); + } +#endif /* configSUPPORT_STATIC_ALLOCATION */ +} +/*-----------------------------------------------------------*/ + +static void prvCheckExpectedState(BaseType_t xState) +{ + configASSERT(xState); + if (xState == pdFAIL) { + xErrorStatus = pdFAIL; + } +} +/*-----------------------------------------------------------*/ + +static void prvSingleTaskTests(StreamBufferHandle_t xStreamBuffer) +{ + size_t xReturned, xItem, xExpectedSpace; + const size_t xMax6ByteMessages = sbSTREAM_BUFFER_LENGTH_BYTES / 6; + const size_t x6ByteLength = 6, x17ByteLength = 17, + xFullBufferSize = sbSTREAM_BUFFER_LENGTH_BYTES * (size_t)2; + uint8_t *pucFullBuffer, *pucData, *pucReadData; + TickType_t xTimeBeforeCall, xTimeAfterCall; + const TickType_t xBlockTime = pdMS_TO_TICKS(15), + xAllowableMargin = pdMS_TO_TICKS(3), + xMinimalBlockTime = 2; + UBaseType_t uxOriginalPriority; + + /* Remove warning in case configASSERT() is not defined. */ + (void)xAllowableMargin; + + /* To minimise stack and heap usage a full size buffer is allocated from the + heap, then buffers which hold smaller amounts of data are overlayed with the + larger buffer - just make sure not to use both at once! */ + pucFullBuffer = pvPortMalloc(xFullBufferSize); + configASSERT(pucFullBuffer); + + pucData = pucFullBuffer; + pucReadData = pucData + x17ByteLength; + + /* Nothing has been added or removed yet, so expect the free space to be + exactly as created. */ + xExpectedSpace = xStreamBufferSpacesAvailable(xStreamBuffer); + prvCheckExpectedState(xExpectedSpace == sbSTREAM_BUFFER_LENGTH_BYTES); + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == pdTRUE); + + /* The buffer is 30 bytes long. 6 5 byte messages should fit before the + buffer is completely full. */ + for (xItem = 0; xItem < xMax6ByteMessages; xItem++) { + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == + pdFALSE); + + /* Generate recognisable data to write to the buffer. This is just + ascii characters that shows which loop iteration the data was written + in. The 'FromISR' version is used to give it some exercise as a block + time is not used, so the call must be inside a critical section so it + runs with ports that don't support interrupt nesting (and therefore + don't have interrupt safe critical sections). */ + memset((void *)pucData, ((int)'0') + (int)xItem, x6ByteLength); + taskENTER_CRITICAL(); + { + xReturned = + xStreamBufferSendFromISR(xStreamBuffer, + (void *)pucData, + x6ByteLength, NULL); + } + taskEXIT_CRITICAL(); + prvCheckExpectedState(xReturned == x6ByteLength); + + /* The space in the buffer will have reduced by the amount of user data + written into the buffer. */ + xExpectedSpace -= x6ByteLength; + xReturned = xStreamBufferSpacesAvailable(xStreamBuffer); + prvCheckExpectedState(xReturned == xExpectedSpace); + xReturned = xStreamBufferBytesAvailable(xStreamBuffer); + /* +1 as it is zero indexed. */ + prvCheckExpectedState(xReturned == + ((xItem + 1) * x6ByteLength)); + } + + /* Now the buffer should be full, and attempting to add anything will should + fail. */ + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == pdTRUE); + xReturned = xStreamBufferSend(xStreamBuffer, (void *)pucData, + sizeof(pucData[0]), sbDONT_BLOCK); + prvCheckExpectedState(xReturned == 0); + + /* Adding with a timeout should also fail after the appropriate time. The + priority is temporarily boosted in this part of the test to keep the + allowable margin to a minimum. */ + uxOriginalPriority = uxTaskPriorityGet(NULL); + vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xStreamBufferSend(xStreamBuffer, (void *)pucData, + sizeof(pucData[0]), xBlockTime); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet(NULL, uxOriginalPriority); + prvCheckExpectedState( + ((TickType_t)(xTimeAfterCall - xTimeBeforeCall)) >= xBlockTime); + prvCheckExpectedState(((TickType_t)(xTimeAfterCall - xTimeBeforeCall)) < + (xBlockTime + xAllowableMargin)); + prvCheckExpectedState(xReturned == 0); + + /* The buffer is now full of data in the form "000000", "111111", etc. Make + sure the data is read out as expected. */ + for (xItem = 0; xItem < xMax6ByteMessages; xItem++) { + /* Generate the data that is expected to be read out for this loop + iteration. */ + memset((void *)pucData, ((int)'0') + (int)xItem, x6ByteLength); + + /* Read the next 6 bytes out. The 'FromISR' version is used to give it + some exercise as a block time is not used, so a it must be called from + a critical section so this will work on ports that don't support + interrupt nesting (so don't have interrupt safe critical sections). */ + taskENTER_CRITICAL(); + { + xReturned = + xStreamBufferReceiveFromISR(xStreamBuffer, + (void *)pucReadData, + x6ByteLength, NULL); + } + taskEXIT_CRITICAL(); + prvCheckExpectedState(xReturned == x6ByteLength); + + /* Does the data read out match that expected? */ + prvCheckExpectedState(memcmp((void *)pucData, + (void *)pucReadData, + x6ByteLength) == 0); + + /* The space in the buffer will have increased by the amount of user + data removed from the buffer. */ + xExpectedSpace += x6ByteLength; + xReturned = xStreamBufferSpacesAvailable(xStreamBuffer); + prvCheckExpectedState(xReturned == xExpectedSpace); + xReturned = xStreamBufferBytesAvailable(xStreamBuffer); + prvCheckExpectedState( + xReturned == + (sbSTREAM_BUFFER_LENGTH_BYTES - xExpectedSpace)); + } + + /* The buffer should be empty again. */ + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == pdTRUE); + xExpectedSpace = xStreamBufferSpacesAvailable(xStreamBuffer); + prvCheckExpectedState(xExpectedSpace == sbSTREAM_BUFFER_LENGTH_BYTES); + + /* Reading with a timeout should also fail after the appropriate time. The + priority is temporarily boosted in this part of the test to keep the + allowable margin to a minimum. */ + vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xStreamBufferReceive(xStreamBuffer, (void *)pucReadData, + x6ByteLength, xBlockTime); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet(NULL, uxOriginalPriority); + prvCheckExpectedState( + ((TickType_t)(xTimeAfterCall - xTimeBeforeCall)) >= xBlockTime); + prvCheckExpectedState(((TickType_t)(xTimeAfterCall - xTimeBeforeCall)) < + (xBlockTime + xAllowableMargin)); + prvCheckExpectedState(xReturned == 0); + + /* In the next loop 17 bytes are written to then read out on each + iteration. As 30 is not divisible by 17 the data will wrap around. */ + xExpectedSpace = sbSTREAM_BUFFER_LENGTH_BYTES - x17ByteLength; + + for (xItem = 0; xItem < 100; xItem++) { + /* Generate recognisable data to write to the queue. This is just + ascii characters that shows which loop iteration the data was written + in. */ + memset((void *)pucData, ((int)'0') + (int)xItem, x17ByteLength); + xReturned = xStreamBufferSend(xStreamBuffer, (void *)pucData, + x17ByteLength, sbDONT_BLOCK); + prvCheckExpectedState(xReturned == x17ByteLength); + + /* The space in the buffer will have reduced by the amount of user data + written into the buffer. */ + xReturned = xStreamBufferSpacesAvailable(xStreamBuffer); + prvCheckExpectedState(xReturned == xExpectedSpace); + xReturned = xStreamBufferBytesAvailable(xStreamBuffer); + prvCheckExpectedState(xReturned == x17ByteLength); + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == + pdFALSE); + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == + pdFALSE); + + /* Read the 17 bytes out again. */ + xReturned = + xStreamBufferReceive(xStreamBuffer, (void *)pucReadData, + x17ByteLength, sbDONT_BLOCK); + prvCheckExpectedState(xReturned == x17ByteLength); + + /* Does the data read out match that expected? */ + prvCheckExpectedState(memcmp((void *)pucData, + (void *)pucReadData, + x17ByteLength) == 0); + + /* Full buffer space available again. */ + xReturned = xStreamBufferSpacesAvailable(xStreamBuffer); + prvCheckExpectedState(xReturned == + sbSTREAM_BUFFER_LENGTH_BYTES); + xReturned = xStreamBufferBytesAvailable(xStreamBuffer); + prvCheckExpectedState(xReturned == 0); + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == + pdFALSE); + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == + pdTRUE); + } + + /* Fill the buffer with one message, check it is full, then read it back + again and check the correct data is received. */ + xStreamBufferSend(xStreamBuffer, (const void *)pc55ByteString, + sbSTREAM_BUFFER_LENGTH_BYTES, sbDONT_BLOCK); + xStreamBufferReceive(xStreamBuffer, (void *)pucFullBuffer, + sbSTREAM_BUFFER_LENGTH_BYTES, sbDONT_BLOCK); + prvCheckExpectedState(memcmp(pc55ByteString, pucFullBuffer, + sbSTREAM_BUFFER_LENGTH_BYTES) == 0); + + /* Fill the buffer one bytes at a time. */ + for (xItem = 0; xItem < sbSTREAM_BUFFER_LENGTH_BYTES; xItem++) { + /* Block time is only for test coverage, the task should never actually + block here. */ + xStreamBufferSend(xStreamBuffer, + (const void *)&(pc54ByteString[xItem]), + sizeof(char), sbRX_TX_BLOCK_TIME); + } + + /* The buffer should now be full. */ + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == pdTRUE); + + /* Read the message out in one go, even though it was written in individual + bytes. Try reading much more data than is actually available to ensure only + the available bytes are returned (otherwise this read will write outside of + the memory allocated anyway!). */ + xReturned = + xStreamBufferReceive(xStreamBuffer, pucFullBuffer, + sbSTREAM_BUFFER_LENGTH_BYTES * (size_t)2, + sbRX_TX_BLOCK_TIME); + prvCheckExpectedState(xReturned == sbSTREAM_BUFFER_LENGTH_BYTES); + prvCheckExpectedState(memcmp((const void *)pc54ByteString, + (const void *)pucFullBuffer, + sbSTREAM_BUFFER_LENGTH_BYTES) == 0); + + /* Now do the opposite, write in one go and read out in single bytes. */ + xReturned = + xStreamBufferSend(xStreamBuffer, (const void *)pc55ByteString, + sbSTREAM_BUFFER_LENGTH_BYTES, + sbRX_TX_BLOCK_TIME); + prvCheckExpectedState(xReturned == sbSTREAM_BUFFER_LENGTH_BYTES); + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == pdTRUE); + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == pdFALSE); + prvCheckExpectedState(xStreamBufferBytesAvailable(xStreamBuffer) == + sbSTREAM_BUFFER_LENGTH_BYTES); + prvCheckExpectedState(xStreamBufferSpacesAvailable(xStreamBuffer) == 0); + + /* Read from the buffer one byte at a time. */ + for (xItem = 0; xItem < sbSTREAM_BUFFER_LENGTH_BYTES; xItem++) { + /* Block time is only for test coverage, the task should never actually + block here. */ + xStreamBufferReceive(xStreamBuffer, (void *)pucFullBuffer, + sizeof(char), sbRX_TX_BLOCK_TIME); + prvCheckExpectedState(pc55ByteString[xItem] == + pucFullBuffer[0]); + } + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == pdTRUE); + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == pdFALSE); + + /* Try writing more bytes than there is space. */ + vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = + xStreamBufferSend(xStreamBuffer, (const void *)pc54ByteString, + sbSTREAM_BUFFER_LENGTH_BYTES * (size_t)2, + xMinimalBlockTime); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet(NULL, uxOriginalPriority); + prvCheckExpectedState((xTimeAfterCall - xTimeBeforeCall) >= + xMinimalBlockTime); + prvCheckExpectedState((xTimeAfterCall - xTimeBeforeCall) < + (xMinimalBlockTime + xAllowableMargin)); + prvCheckExpectedState(xReturned == sbSTREAM_BUFFER_LENGTH_BYTES); + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == pdTRUE); + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == pdFALSE); + + /* No space now though. */ + xReturned = + xStreamBufferSend(xStreamBuffer, (const void *)pc54ByteString, + sbSTREAM_BUFFER_LENGTH_BYTES * (size_t)2, + xMinimalBlockTime); + prvCheckExpectedState(xReturned == 0); + + /* Ensure data was written as expected even when there was an attempt to + write more than was available. This also tries to read more bytes than are + available. */ + xReturned = xStreamBufferReceive(xStreamBuffer, (void *)pucFullBuffer, + xFullBufferSize, xMinimalBlockTime); + prvCheckExpectedState(memcmp((const void *)pucFullBuffer, + (const void *)pc54ByteString, + sbSTREAM_BUFFER_LENGTH_BYTES) == 0); + prvCheckExpectedState(xStreamBufferIsFull(xStreamBuffer) == pdFALSE); + prvCheckExpectedState(xStreamBufferIsEmpty(xStreamBuffer) == pdTRUE); + + /* Clean up with data in the buffer to ensure the tests that follow don't + see the data (the data should be discarded). */ + (void)xStreamBufferSend(xStreamBuffer, (const void *)pc55ByteString, + sbSTREAM_BUFFER_LENGTH_BYTES / (size_t)2, + sbDONT_BLOCK); + vPortFree(pucFullBuffer); + xStreamBufferReset(xStreamBuffer); +} +/*-----------------------------------------------------------*/ + +static void prvNonBlockingSenderTask(void *pvParameters) +{ + StreamBufferHandle_t xStreamBuffer; + size_t xNextChar = 0, xBytesToSend, xBytesActuallySent; + const size_t xStringLength = strlen(pc54ByteString); + + /* In this case the stream buffer has already been created and is passed + into the task using the task's parameter. */ + xStreamBuffer = (StreamBufferHandle_t)pvParameters; + + /* Keep sending the string to the stream buffer as many bytes as possible in + each go. Doesn't block so calls can interleave with the non-blocking + receives performed by prvNonBlockingReceiverTask(). */ + for (;;) { + /* The whole string cannot be sent at once, so xNextChar is an index to + the position within the string that has been sent so far. How many + bytes are there left to send before the end of the string? */ + xBytesToSend = xStringLength - xNextChar; + + /* Attempt to send right up to the end of the string. */ + xBytesActuallySent = xStreamBufferSend( + xStreamBuffer, + (const void *)&(pc54ByteString[xNextChar]), + xBytesToSend, sbDONT_BLOCK); + prvCheckExpectedState(xBytesActuallySent <= xBytesToSend); + + /* Move the index up the string to the next character to be sent, + wrapping if the end of the string has been reached. */ + xNextChar += xBytesActuallySent; + prvCheckExpectedState(xNextChar <= xStringLength); + + if (xNextChar == xStringLength) { + xNextChar = 0; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvNonBlockingReceiverTask(void *pvParameters) +{ + StreamBufferHandle_t xStreamBuffer; + size_t xNextChar = 0, xReceiveLength, xBytesToTest, xStartIndex; + const size_t xStringLength = strlen(pc54ByteString); + char cRxString[12]; /* Holds received characters. */ + BaseType_t xNonBlockingReceiveError = pdFALSE; + + /* In this case the stream buffer has already been created and is passed + into the task using the task's parameter. */ + xStreamBuffer = (StreamBufferHandle_t)pvParameters; + + /* Expects to receive the pc54ByteString over and over again. Sends and + receives are not blocking so will interleave. */ + for (;;) { + /* Attempt to receive as many bytes as possible, up to the limit of the + Rx buffer size. */ + xReceiveLength = + xStreamBufferReceive(xStreamBuffer, (void *)cRxString, + sizeof(cRxString), sbDONT_BLOCK); + + if (xReceiveLength > 0) { + /* xNextChar is the index into pc54ByteString that has been received + already. If xReceiveLength bytes are added to that, will it go off + the end of the string? If so, then first test up to the end of the + string, then go back to the start of pc54ByteString to test the + remains of the received data. */ + xBytesToTest = xReceiveLength; + if ((xNextChar + xBytesToTest) > xStringLength) { + /* Cap to test the received data to the end of the string. */ + xBytesToTest = xStringLength - xNextChar; + + if (memcmp((const void *)&( + pc54ByteString[xNextChar]), + (const void *)cRxString, + xBytesToTest) != 0) { + xNonBlockingReceiveError = pdTRUE; + } + + /* Then move back to the start of the string to test the + remaining received bytes. */ + xNextChar = 0; + xStartIndex = xBytesToTest; + xBytesToTest = xReceiveLength - xBytesToTest; + } else { + /* The string didn't wrap in the buffer, so start comparing from + the start of the received data. */ + xStartIndex = 0; + } + + /* Test the received bytes are as expected, then move the index + along the string to the next expected char to receive. */ + if (memcmp((const void *)&(pc54ByteString[xNextChar]), + (const void *)&(cRxString[xStartIndex]), + xBytesToTest) != 0) { + xNonBlockingReceiveError = pdTRUE; + } + + if (xNonBlockingReceiveError == pdFALSE) { + /* No errors detected so increment the counter that lets the + check task know this test is still functioning correctly. */ + ulNonBlockingRxCounter++; + } + + xNextChar += xBytesToTest; + if (xNextChar >= xStringLength) { + xNextChar = 0; + } + } + } +} +/*-----------------------------------------------------------*/ + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + +static void prvSenderTask(void *pvParameters) +{ + StreamBufferHandle_t xStreamBuffer, xTempStreamBuffer; + static uint8_t ucTempBuffer + [10]; /* Just used to exercise stream buffer creating and deletion. */ + const TickType_t xTicksToWait = sbRX_TX_BLOCK_TIME, + xShortDelay = pdMS_TO_TICKS(50); + StaticStreamBuffer_t xStaticStreamBuffer; + size_t xNextChar = 0, xBytesToSend, xBytesActuallySent; + const size_t xStringLength = strlen(pc55ByteString); + + /* The task's priority is used as an index into the loop counters used to + indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet(NULL); + + /* Make sure a change in priority does not inadvertently result in an + invalid array index. */ + prvCheckExpectedState(uxIndex < sbNUMBER_OF_ECHO_CLIENTS); + + /* Avoid compiler warnings about unused parameters. */ + (void)pvParameters; + + xStreamBuffer = xStreamBufferCreateStatic( + sizeof(ucBufferStorage) / + sbNUMBER_OF_SENDER_TASKS, /* The number of bytes in each buffer in the array. */ + sbTRIGGER_LEVEL_1, /* The number of bytes to be in the buffer before a task blocked to wait for data is unblocked. */ + &(ucBufferStorage + [uxIndex] + [0]), /* The address of the buffer to use within the array. */ + &(xStaticStreamBuffers + [uxIndex])); /* The static stream buffer structure to use within the array. */ + + /* Now the stream buffer has been created the receiver task can be + created. If this sender task has the higher priority then the receiver + task is created at the lower priority - if this sender task has the + lower priority then the receiver task is created at the higher + priority. */ + if (uxTaskPriorityGet(NULL) == sbLOWER_PRIORITY) { + /* Here prvSingleTaskTests() performs various tests on a stream buffer + that was created statically. */ + prvSingleTaskTests(xStreamBuffer); + xTaskCreate(prvReceiverTask, "StrReceiver", + sbSMALLER_STACK_SIZE, (void *)xStreamBuffer, + sbHIGHER_PRIORITY, NULL); + } else { + xTaskCreate(prvReceiverTask, "StrReceiver", + sbSMALLER_STACK_SIZE, (void *)xStreamBuffer, + sbLOWER_PRIORITY, NULL); + } + + for (;;) { + /* The whole string cannot be sent at once, so xNextChar is an index + to the position within the string that has been sent so far. How + many bytes are there left to send before the end of the string? */ + xBytesToSend = xStringLength - xNextChar; + + /* Attempt to send right up to the end of the string. */ + xBytesActuallySent = xStreamBufferSend( + xStreamBuffer, + (const void *)&(pc55ByteString[xNextChar]), + xBytesToSend, xTicksToWait); + prvCheckExpectedState(xBytesActuallySent <= xBytesToSend); + + /* Move the index up the string to the next character to be sent, + wrapping if the end of the string has been reached. */ + xNextChar += xBytesActuallySent; + prvCheckExpectedState(xNextChar <= xStringLength); + + if (xNextChar == xStringLength) { + xNextChar = 0; + } + + /* Increment a loop counter so a check task can tell this task is + still running as expected. */ + ulSenderLoopCounters[uxIndex]++; + + if (uxTaskPriorityGet(NULL) == sbHIGHER_PRIORITY) { + /* Allow other tasks to run. */ + vTaskDelay(xShortDelay); + } + + /* This stream buffer is just created and deleted to ensure no + issues when attempting to delete a stream buffer that was + created using statically allocated memory. To save stack space + the buffer is set to point to the pc55ByteString, which is a const + string, but no data is written into the buffer so any valid address + will do. */ + xTempStreamBuffer = xStreamBufferCreateStatic( + sizeof(ucTempBuffer), sbTRIGGER_LEVEL_1, ucTempBuffer, + &xStaticStreamBuffer); + xStreamBufferReset(xTempStreamBuffer); + vStreamBufferDelete(xTempStreamBuffer); + } +} + +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + +static void prvReceiverTask(void *pvParameters) +{ + StreamBufferHandle_t const pxStreamBuffer = + (StreamBufferHandle_t)pvParameters; + char cRxString[12]; /* Large enough to hold a 32-bit number in ASCII. */ + const TickType_t xTicksToWait = pdMS_TO_TICKS(5UL); + const size_t xStringLength = strlen(pc55ByteString); + size_t xNextChar = 0, xReceivedLength, xBytesToReceive; + + for (;;) { + /* Attempt to receive the number of bytes to the end of the string, + or the number of byte that can be placed into the rx buffer, + whichever is smallest. */ + xBytesToReceive = configMIN((xStringLength - xNextChar), + sizeof(cRxString)); + + do { + xReceivedLength = xStreamBufferReceive( + pxStreamBuffer, (void *)cRxString, + xBytesToReceive, xTicksToWait); + + } while (xReceivedLength == 0); + + /* Ensure the received string matches the expected string. */ + prvCheckExpectedState( + memcmp((void *)cRxString, + (const void *)&(pc55ByteString[xNextChar]), + xReceivedLength) == 0); + + /* Move the index into the string up to the end of the bytes + received so far - wrapping if the end of the string has been + reached. */ + xNextChar += xReceivedLength; + if (xNextChar >= xStringLength) { + xNextChar = 0; + } + } +} + +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +static void prvEchoClient(void *pvParameters) +{ + size_t xSendLength = 0, ux; + char *pcStringToSend, *pcStringReceived, cNextChar = sbASCII_SPACE; + const TickType_t xTicksToWait = pdMS_TO_TICKS(50); + StreamBufferHandle_t xTempStreamBuffer; + + /* The task's priority is used as an index into the loop counters used to +indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet(NULL); + + /* Pointers to the client and server stream buffers are passed into this task +using the task's parameter. */ + EchoStreamBuffers_t *pxStreamBuffers = + (EchoStreamBuffers_t *)pvParameters; + + /* Prevent compiler warnings. */ + (void)pvParameters; + + /* Create the buffer into which strings to send to the server will be + created, and the buffer into which strings echoed back from the server will + be copied. */ + pcStringToSend = (char *)pvPortMalloc(sbSTREAM_BUFFER_LENGTH_BYTES); + pcStringReceived = (char *)pvPortMalloc(sbSTREAM_BUFFER_LENGTH_BYTES); + + configASSERT(pcStringToSend); + configASSERT(pcStringReceived); + + for (;;) { + /* Generate the length of the next string to send. */ + xSendLength++; + + /* The stream buffer is being used to hold variable length data, so + each data item requires sizeof( size_t ) bytes to hold the data's + length, hence the sizeof() in the if() condition below. */ + if (xSendLength > + (sbSTREAM_BUFFER_LENGTH_BYTES - sizeof(size_t))) { + /* Back to a string length of 1. */ + xSendLength = sizeof(char); + } + + memset(pcStringToSend, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES); + + for (ux = 0; ux < xSendLength; ux++) { + pcStringToSend[ux] = cNextChar; + + cNextChar++; + + if (cNextChar > sbASCII_TILDA) { + cNextChar = sbASCII_SPACE; + } + } + + /* Send the generated string to the buffer. */ + do { + ux = xStreamBufferSend( + pxStreamBuffers->xEchoClientBuffer, + (void *)pcStringToSend, xSendLength, + xTicksToWait); + + } while (ux == 0); + + /* Wait for the string to be echoed back. */ + memset(pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES); + xStreamBufferReceive(pxStreamBuffers->xEchoServerBuffer, + (void *)pcStringReceived, xSendLength, + portMAX_DELAY); + + prvCheckExpectedState( + strcmp(pcStringToSend, pcStringReceived) == 0); + + /* Maintain a count of the number of times this code executes so a + check task can determine if this task is still functioning as + expected or not. As there are two client tasks, and the priorities + used are 0 and 1, the task's priority is used as an index into the + loop count array. */ + ulEchoLoopCounters[uxIndex]++; + + /* This stream buffer is just created and deleted to ensure no memory + leaks. */ + xTempStreamBuffer = xStreamBufferCreate( + sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1); + vStreamBufferDelete(xTempStreamBuffer); + + /* The following are tests for a stream buffer of size one. */ + /* Create a buffer of size one. */ + xTempStreamBuffer = xStreamBufferCreate( + sbSTREAM_BUFFER_LENGTH_ONE, sbTRIGGER_LEVEL_1); + /* Ensure that the buffer was created successfully. */ + configASSERT(xTempStreamBuffer); + + /* Send one byte to the buffer. */ + ux = xStreamBufferSend(xTempStreamBuffer, + (void *)pcStringToSend, (size_t)1, + sbDONT_BLOCK); + /* Ensure that the byte was sent successfully. */ + configASSERT(ux == 1); + /* Try sending another byte to the buffer. */ + ux = xStreamBufferSend(xTempStreamBuffer, + (void *)pcStringToSend, (size_t)1, + sbDONT_BLOCK); + /* Make sure that send failed as the buffer is full. */ + configASSERT(ux == 0); + + /* Receive one byte from the buffer. */ + memset(pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES); + ux = xStreamBufferReceive(xTempStreamBuffer, + (void *)pcStringReceived, (size_t)1, + sbDONT_BLOCK); + /* Ensure that the receive was successful. */ + configASSERT(ux == 1); + /* Ensure that the correct data was received. */ + configASSERT(pcStringToSend[0] == pcStringReceived[0]); + /* Try receiving another byte from the buffer. */ + ux = xStreamBufferReceive(xTempStreamBuffer, + (void *)pcStringReceived, (size_t)1, + sbDONT_BLOCK); + /* Ensure that the receive failed as the buffer is empty. */ + configASSERT(ux == 0); + + /* Try sending two bytes to the buffer. Since the size of the + * buffer is one, we must not be able to send more than one. */ + ux = xStreamBufferSend(xTempStreamBuffer, + (void *)pcStringToSend, (size_t)2, + sbDONT_BLOCK); + /* Ensure that only one byte was sent. */ + configASSERT(ux == 1); + + /* Try receiving two bytes from the buffer. Since the size of the + * buffer is one, we must not be able to get more than one. */ + memset(pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES); + ux = xStreamBufferReceive(xTempStreamBuffer, + (void *)pcStringReceived, (size_t)2, + sbDONT_BLOCK); + /* Ensure that only one byte was received. */ + configASSERT(ux == 1); + /* Ensure that the correct data was received. */ + configASSERT(pcStringToSend[0] == pcStringReceived[0]); + + /* Delete the buffer. */ + vStreamBufferDelete(xTempStreamBuffer); + } +} +/*-----------------------------------------------------------*/ + +static void prvEchoServer(void *pvParameters) +{ + size_t xReceivedLength; + char *pcReceivedString; + EchoStreamBuffers_t xStreamBuffers; + TickType_t xTimeOnEntering; + const TickType_t xTicksToBlock = pdMS_TO_TICKS(350UL); + + /* Prevent compiler warnings about unused parameters. */ + (void)pvParameters; + + /* Create the stream buffer used to send data from the client to the server, + and the stream buffer used to echo the data from the server back to the + client. */ + xStreamBuffers.xEchoClientBuffer = xStreamBufferCreate( + sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1); + xStreamBuffers.xEchoServerBuffer = xStreamBufferCreate( + sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1); + configASSERT(xStreamBuffers.xEchoClientBuffer); + configASSERT(xStreamBuffers.xEchoServerBuffer); + + /* Create the buffer into which received strings will be copied. */ + pcReceivedString = (char *)pvPortMalloc(sbSTREAM_BUFFER_LENGTH_BYTES); + configASSERT(pcReceivedString); + + /* Don't expect to receive anything yet! */ + xTimeOnEntering = xTaskGetTickCount(); + xReceivedLength = xStreamBufferReceive(xStreamBuffers.xEchoClientBuffer, + (void *)pcReceivedString, + sbSTREAM_BUFFER_LENGTH_BYTES, + xTicksToBlock); + prvCheckExpectedState(((TickType_t)(xTaskGetTickCount() - + xTimeOnEntering)) >= xTicksToBlock); + prvCheckExpectedState(xReceivedLength == 0); + + /* Now the stream buffers have been created the echo client task can be + created. If this server task has the higher priority then the client task + is created at the lower priority - if this server task has the lower + priority then the client task is created at the higher priority. */ + if (uxTaskPriorityGet(NULL) == sbLOWER_PRIORITY) { + xTaskCreate(prvEchoClient, "EchoClient", sbSMALLER_STACK_SIZE, + (void *)&xStreamBuffers, sbHIGHER_PRIORITY, NULL); + } else { + /* Here prvSingleTaskTests() performs various tests on a stream buffer + that was created dynamically. */ + prvSingleTaskTests(xStreamBuffers.xEchoClientBuffer); + xTaskCreate(prvEchoClient, "EchoClient", sbSMALLER_STACK_SIZE, + (void *)&xStreamBuffers, sbLOWER_PRIORITY, NULL); + } + + for (;;) { + memset(pcReceivedString, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES); + + /* Has any data been sent by the client? */ + xReceivedLength = + xStreamBufferReceive(xStreamBuffers.xEchoClientBuffer, + (void *)pcReceivedString, + sbSTREAM_BUFFER_LENGTH_BYTES, + portMAX_DELAY); + + /* Should always receive data as max delay was used. */ + prvCheckExpectedState(xReceivedLength > 0); + + /* Echo the received data back to the client. */ + xStreamBufferSend(xStreamBuffers.xEchoServerBuffer, + (void *)pcReceivedString, xReceivedLength, + portMAX_DELAY); + } +} +/*-----------------------------------------------------------*/ + +void vPeriodicStreamBufferProcessing(void) +{ + static size_t xNextChar = 0; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + /* Called from the tick interrupt hook. If the global stream buffer + variable is not NULL then the prvInterruptTriggerTest() task expects a byte + to be sent to the stream buffer on each tick interrupt. */ + if (xInterruptStreamBuffer != NULL) { + /* One character from the pcDataSentFromInterrupt string is sent on each + interrupt. The task blocked on the stream buffer should not be + unblocked until the defined trigger level is hit. */ + xStreamBufferSendFromISR( + xInterruptStreamBuffer, + (const void *)&(pcDataSentFromInterrupt[xNextChar]), + sizeof(char), &xHigherPriorityTaskWoken); + + if (xNextChar < strlen(pcDataSentFromInterrupt)) { + xNextChar++; + } + } else { + /* Start at the beginning of the string being sent again. */ + xNextChar = 0; + } +} +/*-----------------------------------------------------------*/ + +static void prvInterruptTriggerLevelTest(void *pvParameters) +{ + StreamBufferHandle_t xStreamBuffer; + size_t xTriggerLevel = 1, xBytesReceived; + const size_t xStreamBufferSizeBytes = (size_t)9, + xMaxTriggerLevel = (size_t)7, xMinTriggerLevel = (size_t)2; + const TickType_t xReadBlockTime = 5, + xCycleBlockTime = pdMS_TO_TICKS(100); + uint8_t ucRxData[9]; + BaseType_t xErrorDetected = pdFALSE; +#ifndef configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN + const size_t xAllowableMargin = (size_t)0; +#else + const size_t xAllowableMargin = + (size_t)configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN; +#endif + + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + + for (;;) { + for (xTriggerLevel = xMinTriggerLevel; + xTriggerLevel < xMaxTriggerLevel; xTriggerLevel++) { + /* This test is very time sensitive so delay at the beginning to ensure + the rest of the system is up and running before starting. Delay between + each loop to ensure the interrupt that sends to the stream buffer + detects it needs to start sending from the start of the strin again.. */ + vTaskDelay(xCycleBlockTime); + + /* Create the stream buffer that will be used from inside the tick + interrupt. */ + memset(ucRxData, 0x00, sizeof(ucRxData)); + xStreamBuffer = xStreamBufferCreate( + xStreamBufferSizeBytes, xTriggerLevel); + configASSERT(xStreamBuffer); + + /* Now the stream buffer has been created it can be assigned to the + file scope variable, which will allow the tick interrupt to start + using it. */ + taskENTER_CRITICAL(); + { + xInterruptStreamBuffer = xStreamBuffer; + } + taskEXIT_CRITICAL(); + + xBytesReceived = xStreamBufferReceive(xStreamBuffer, + (void *)ucRxData, + sizeof(ucRxData), + xReadBlockTime); + + /* Set the file scope variable back to NULL so the interrupt doesn't + try to use it again. */ + taskENTER_CRITICAL(); + { + xInterruptStreamBuffer = NULL; + } + taskEXIT_CRITICAL(); + + /* Now check the number of bytes received equals the trigger level, + except in the case that the read timed out before the trigger level + was reached. */ + if (xTriggerLevel > xReadBlockTime) { + /* Trigger level was greater than the block time so expect to + time out having received xReadBlockTime bytes. */ + if (xBytesReceived > xReadBlockTime) { + /* Received more bytes than expected. That could happen if + this task unblocked at the right time, but an interrupt + added another byte to the stream buffer before this task was + able to run. */ + if ((xBytesReceived - xReadBlockTime) > + xAllowableMargin) { + xErrorDetected = pdTRUE; + } + } else if (xReadBlockTime != xBytesReceived) { + /* It is possible the interrupt placed an item in the stream + buffer before this task called xStreamBufferReceive(), but + if that is the case then xBytesReceived will only every be + 0 as the interrupt will only have executed once. */ + if (xBytesReceived != 1) { + xErrorDetected = pdTRUE; + } + } + } else if (xTriggerLevel < xReadBlockTime) { + /* Trigger level was less than the block time so we expect to + have received the trigger level number of bytes - could be more + though depending on other activity between the task being + unblocked and the task reading the number of bytes received. It + could also be less if the interrupt already put something in the + stream buffer before this task attempted to read it - in which + case the task would have returned the available bytes immediately + without ever blocking - in that case the bytes received will + only ever be 1 as the interrupt would not have executed more + than one in that time unless this task has too low a priority. */ + if (xBytesReceived < xTriggerLevel) { + if (xBytesReceived != 1) { + xErrorDetected = pdTRUE; + } + } else if ((xBytesReceived - xTriggerLevel) > + xAllowableMargin) { + xErrorDetected = pdTRUE; + } + } else { + /* The trigger level equalled the block time, so expect to + receive no greater than the block time. It could also be less + if the interrupt already put something in the stream buffer + before this task attempted to read it - in which case the task + would have returned the available bytes immediately without ever + blocking - in that case the bytes received would only ever be 1 + because the interrupt is not going to execute twice in that time + unless this task is running a too low a priority. */ + if (xBytesReceived < xReadBlockTime) { + if (xBytesReceived != 1) { + xErrorDetected = pdTRUE; + } + } else if ((xBytesReceived - xReadBlockTime) > + xAllowableMargin) { + xErrorDetected = pdTRUE; + } + } + + if (xBytesReceived > sizeof(ucRxData)) { + xErrorDetected = pdTRUE; + } else if (memcmp((void *)ucRxData, + (const void *)pcDataSentFromInterrupt, + xBytesReceived) != 0) { + /* Received data didn't match that expected. */ + xErrorDetected = pdTRUE; + } + + if (xErrorDetected == pdFALSE) { + /* Increment the cycle counter so the 'check' task knows this test + is still running without error. */ + ulInterruptTriggerCounter++; + } + + /* Tidy up ready for the next loop. */ + vStreamBufferDelete(xStreamBuffer); + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreStreamBufferTasksStillRunning(void) +{ + static uint32_t ulLastEchoLoopCounters[sbNUMBER_OF_ECHO_CLIENTS] = { 0 }; + static uint32_t ulLastNonBlockingRxCounter = 0; + static uint32_t ulLastInterruptTriggerCounter = 0; + BaseType_t x; + + for (x = 0; x < sbNUMBER_OF_ECHO_CLIENTS; x++) { + if (ulLastEchoLoopCounters[x] == ulEchoLoopCounters[x]) { + xErrorStatus = pdFAIL; + } else { + ulLastEchoLoopCounters[x] = ulEchoLoopCounters[x]; + } + } + + if (ulNonBlockingRxCounter == ulLastNonBlockingRxCounter) { + xErrorStatus = pdFAIL; + } else { + ulLastNonBlockingRxCounter = ulNonBlockingRxCounter; + } + + if (ulLastInterruptTriggerCounter == ulInterruptTriggerCounter) { + xErrorStatus = pdFAIL; + } else { + ulLastInterruptTriggerCounter = ulInterruptTriggerCounter; + } + +#if (configSUPPORT_STATIC_ALLOCATION == 1) + { + static uint32_t + ulLastSenderLoopCounters[sbNUMBER_OF_ECHO_CLIENTS] = { + 0 + }; + + for (x = 0; x < sbNUMBER_OF_SENDER_TASKS; x++) { + if (ulLastSenderLoopCounters[x] == + ulSenderLoopCounters[x]) { + xErrorStatus = pdFAIL; + } else { + ulLastSenderLoopCounters[x] = + ulSenderLoopCounters[x]; + } + } + } +#endif /* configSUPPORT_STATIC_ALLOCATION */ + + return xErrorStatus; +} +/*-----------------------------------------------------------*/ diff --git a/freertos/cvitek/task/demo/Common/Minimal/StreamBufferInterrupt.c b/freertos/cvitek/task/demo/Common/Minimal/StreamBufferInterrupt.c new file mode 100644 index 000000000..a38afc5ed --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/StreamBufferInterrupt.c @@ -0,0 +1,216 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * A simple example that shows a stream buffer being used to pass data from an + * interrupt to a task. + * + * There are two strings, pcStringToSend and pcStringToReceive, where + * pcStringToReceive is a substring of pcStringToSend. The interrupt sends + * a few bytes of pcStringToSend to a stream buffer ever few times that it + * executes. A task reads the bytes from the stream buffer, looking for the + * substring, and flagging an error if the received data is invalid. + */ + +/* Standard includes. */ +#include "stdio.h" +#include "string.h" + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "stream_buffer.h" + +/* Demo app includes. */ +#include "StreamBufferInterrupt.h" + +#define sbiSTREAM_BUFFER_LENGTH_BYTES ((size_t)100) +#define sbiSTREAM_BUFFER_TRIGGER_LEVEL_10 ((BaseType_t)10) + +/*-----------------------------------------------------------*/ + +/* Implements the task that receives a stream of bytes from the interrupt. */ +static void prvReceivingTask(void *pvParameters); + +/*-----------------------------------------------------------*/ + +/* The stream buffer that is used to send data from an interrupt to the task. */ +static StreamBufferHandle_t xStreamBuffer = NULL; + +/* The string that is sent from the interrupt to the task four bytes at a +time. Must be multiple of 4 bytes long as the ISR sends 4 bytes at a time*/ +static const char *pcStringToSend = "_____Hello FreeRTOS_____"; + +/* The string to task is looking for, which must be a substring of +pcStringToSend. */ +static const char *pcStringToReceive = "Hello FreeRTOS"; + +/* Set to pdFAIL if anything unexpected happens. */ +static BaseType_t xDemoStatus = pdPASS; + +/* Incremented each time pcStringToReceive is correctly received, provided no +errors have occurred. Used so the check task can check this task is still +running as expected. */ +static uint32_t ulCycleCount = 0; + +/*-----------------------------------------------------------*/ + +void vStartStreamBufferInterruptDemo(void) +{ + /* Create the stream buffer that sends data from the interrupt to the + task, and create the task. */ + xStreamBuffer = + xStreamBufferCreate(/* The buffer length in bytes. */ + sbiSTREAM_BUFFER_LENGTH_BYTES, + /* The stream buffer's trigger level. */ + sbiSTREAM_BUFFER_TRIGGER_LEVEL_10); + + xTaskCreate( + prvReceivingTask, /* The function that implements the task. */ + "StrIntRx", /* Human readable name for the task. */ + configMINIMAL_STACK_SIZE, /* Stack size (in words!). */ + NULL, /* Task parameter is not used. */ + tskIDLE_PRIORITY + + 2, /* The priority at which the task is created. */ + NULL); /* No use for the task handle. */ +} +/*-----------------------------------------------------------*/ + +static void prvReceivingTask(void *pvParameters) +{ + char cRxBuffer[20]; + BaseType_t xNextByte = 0; + + /* Remove warning about unused parameters. */ + (void)pvParameters; + + /* Make sure the string will fit in the Rx buffer, including the NULL + terminator. */ + configASSERT(sizeof(cRxBuffer) > strlen(pcStringToReceive)); + + /* Make sure the stream buffer has been created. */ + configASSERT(xStreamBuffer != NULL); + + /* Start with the Rx buffer in a known state. */ + memset(cRxBuffer, 0x00, sizeof(cRxBuffer)); + + for (;;) { + /* Keep receiving characters until the end of the string is received. + Note: An infinite block time is used to simplify the example. Infinite + block times are not recommended in production code as they do not allow + for error recovery. */ + xStreamBufferReceive(/* The stream buffer data is being received from. */ + xStreamBuffer, + /* Where to place received data. */ + (void *)&(cRxBuffer[xNextByte]), + /* The number of bytes to receive. */ + sizeof(char), + /* The time to wait for the next data if the buffer + is empty. */ + portMAX_DELAY); + + /* If xNextByte is 0 then this task is looking for the start of the + string, which is 'H'. */ + if (xNextByte == 0) { + if (cRxBuffer[xNextByte] == 'H') { + /* The start of the string has been found. Now receive + characters until the end of the string is found. */ + xNextByte++; + } + } else { + /* Receiving characters while looking for the end of the string, + which is an 'S'. */ + if (cRxBuffer[xNextByte] == 'S') { + /* The string has now been received. Check its validity. */ + if (strcmp(cRxBuffer, pcStringToReceive) != 0) { + xDemoStatus = pdFAIL; + } + + /* Return to start looking for the beginning of the string + again. */ + memset(cRxBuffer, 0x00, sizeof(cRxBuffer)); + xNextByte = 0; + + /* Increment the cycle count as an indication to the check task + that this demo is still running. */ + if (xDemoStatus == pdPASS) { + ulCycleCount++; + } + } else { + /* Receive the next character the next time around, while + continuing to look for the end of the string. */ + xNextByte++; + + configASSERT((size_t)xNextByte < + sizeof(cRxBuffer)); + } + } + } +} +/*-----------------------------------------------------------*/ + +void vBasicStreamBufferSendFromISR(void) +{ + static size_t xNextByteToSend = 0; + const BaseType_t xCallsBetweenSends = 100, xBytesToSend = 4; + static BaseType_t xCallCount = 0; + + /* Is it time to write to the stream buffer again? */ + xCallCount++; + if (xCallCount > xCallsBetweenSends) { + xCallCount = 0; + + /* Send the next four bytes to the stream buffer. */ + xStreamBufferSendFromISR( + xStreamBuffer, + (const void *)(pcStringToSend + xNextByteToSend), + xBytesToSend, NULL); + + /* Send the next four bytes the next time around, wrapping to the start + of the string if necessary. */ + xNextByteToSend += xBytesToSend; + + if (xNextByteToSend >= strlen(pcStringToSend)) { + xNextByteToSend = 0; + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xIsInterruptStreamBufferDemoStillRunning(void) +{ + uint32_t ulLastCycleCount = 0; + + /* Check the demo is still running. */ + if (ulLastCycleCount == ulCycleCount) { + xDemoStatus = pdFAIL; + } else { + ulLastCycleCount = ulCycleCount; + } + + return xDemoStatus; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/TaskNotify.c b/freertos/cvitek/task/demo/Common/Minimal/TaskNotify.c new file mode 100644 index 000000000..8006c1e5b --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/TaskNotify.c @@ -0,0 +1,712 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Tests the behaviour of direct task notifications. + */ + +/* Standard includes. */ +#include <limits.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" + +/* Demo program include files. */ +#include "TaskNotify.h" + +/* Allow parameters to be overridden on a demo by demo basis. */ +#ifndef notifyNOTIFIED_TASK_STACK_SIZE +#define notifyNOTIFIED_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif + +#define notifyTASK_PRIORITY (tskIDLE_PRIORITY) + +/* Constants used in tests when setting/clearing bits. */ +#define notifyUINT32_MAX ((uint32_t)0xffffffff) +#define notifyUINT32_HIGH_BYTE ((uint32_t)0xff000000) +#define notifyUINT32_LOW_BYTE ((uint32_t)0x000000ff) + +#define notifySUSPENDED_TEST_TIMER_PERIOD pdMS_TO_TICKS(50) + +/*-----------------------------------------------------------*/ + +/* + * Implementation of the task that gets notified. + */ +static void prvNotifiedTask(void *pvParameters); + +/* + * Performs a few initial tests that can be done prior to creating the second + * task. + */ +static void prvSingleTaskTests(void); + +/* + * Software timer callback function from which xTaskNotify() is called. + */ +static void prvNotifyingTimer(TimerHandle_t xTimer); + +/* + * Utility function to create pseudo random numbers. + */ +static UBaseType_t prvRand(void); + +/* + * Callback for a timer that is used during preliminary testing. The timer + * tests the behaviour when 1: a task waiting for a notification is suspended + * and then resumed without ever receiving a notification, and 2: when a task + * waiting for a notification receives a notification while it is suspended. + */ +static void prvSuspendedTaskTimerTestCallback(TimerHandle_t xExpiredTimer); + +/*-----------------------------------------------------------*/ + +/* Used to latch errors during the test's execution. */ +static BaseType_t xErrorStatus = pdPASS; + +/* Used to ensure the task has not stalled. */ +static volatile uint32_t ulNotifyCycleCount = 0; + +/* The handle of the task that receives the notifications. */ +static TaskHandle_t xTaskToNotify = NULL; + +/* Used to count the notifications sent to the task from a software timer and +the number of notifications received by the task from the software timer. The +two should stay synchronised. */ +static uint32_t ulTimerNotificationsReceived = 0UL, + ulTimerNotificationsSent = 0UL; + +/* The timer used to notify the task. */ +static TimerHandle_t xTimer = NULL; + +/* Used by the pseudo random number generating function. */ +static size_t uxNextRand = 0; + +/*-----------------------------------------------------------*/ + +void vStartTaskNotifyTask(void) +{ + /* Create the task that performs some tests by itself, then loops around + being notified by both a software timer and an interrupt. */ + xTaskCreate( + prvNotifiedTask, /* Function that implements the task. */ + "Notified", /* Text name for the task - for debugging only - not used by the kernel. */ + notifyNOTIFIED_TASK_STACK_SIZE, /* Task's stack size in words, not bytes!. */ + NULL, /* Task parameter, not used in this case. */ + notifyTASK_PRIORITY, /* Task priority, 0 is the lowest. */ + &xTaskToNotify); /* Used to pass a handle to the task out is needed, otherwise set to NULL. */ + + /* Pseudo seed the random number generator. */ + uxNextRand = (size_t)prvRand; +} +/*-----------------------------------------------------------*/ + +static void prvSingleTaskTests(void) +{ + const TickType_t xTicksToWait = pdMS_TO_TICKS(100UL); + BaseType_t xReturned; + uint32_t ulNotifiedValue, ulLoop, ulNotifyingValue, ulPreviousValue, + ulExpectedValue; + TickType_t xTimeOnEntering; + const uint32_t ulFirstNotifiedConst = 100001UL, + ulSecondNotifiedValueConst = 5555UL, ulMaxLoops = 5UL; + const uint32_t ulBit0 = 0x01UL, ulBit1 = 0x02UL; + TimerHandle_t xSingleTaskTimer; + + /* ------------------------------------------------------------------------ + Check blocking when there are no notifications. */ + xTimeOnEntering = xTaskGetTickCount(); + xReturned = xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, + xTicksToWait); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Should have blocked for the entire block time. */ + if ((xTaskGetTickCount() - xTimeOnEntering) < xTicksToWait) { + xErrorStatus = pdFAIL; + } + configASSERT(xReturned == pdFAIL); + configASSERT(ulNotifiedValue == 0UL); + (void)xReturned; /* In case configASSERT() is not defined. */ + (void)ulNotifiedValue; + + /* ------------------------------------------------------------------------ + Check no blocking when notifications are pending. First notify itself - + this would not be a normal thing to do and is done here for test purposes + only. */ + xReturned = xTaskNotifyAndQuery(xTaskToNotify, ulFirstNotifiedConst, + eSetValueWithoutOverwrite, + &ulPreviousValue); + + /* Even through the 'without overwrite' action was used the update should + have been successful. */ + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* No bits should have been pending previously. */ + configASSERT(ulPreviousValue == 0); + (void)ulPreviousValue; + + /* The task should now have a notification pending, and so not time out. */ + xTimeOnEntering = xTaskGetTickCount(); + xReturned = xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, + xTicksToWait); + + if ((xTaskGetTickCount() - xTimeOnEntering) >= xTicksToWait) { + xErrorStatus = pdFAIL; + } + + /* The task should have been notified, and the notified value should + be equal to ulFirstNotifiedConst. */ + configASSERT(xReturned == pdPASS); + configASSERT(ulNotifiedValue == ulFirstNotifiedConst); + (void)xReturned; /* In case configASSERT() is not defined. */ + (void)ulNotifiedValue; + + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + + /*------------------------------------------------------------------------- + Check the non-overwriting functionality. The notification is done twice + using two different notification values. The action says don't overwrite so + only the first notification should pass and the value read back should also + be that used with the first notification. */ + xReturned = xTaskNotify(xTaskToNotify, ulFirstNotifiedConst, + eSetValueWithoutOverwrite); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + + xReturned = xTaskNotify(xTaskToNotify, ulSecondNotifiedValueConst, + eSetValueWithoutOverwrite); + configASSERT(xReturned == pdFAIL); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Waiting for the notification should now return immediately so a block + time of zero is used. */ + xReturned = xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, 0); + + configASSERT(xReturned == pdPASS); + configASSERT(ulNotifiedValue == ulFirstNotifiedConst); + (void)xReturned; /* In case configASSERT() is not defined. */ + (void)ulNotifiedValue; + + /*------------------------------------------------------------------------- + Do the same again, only this time use the overwriting version. This time + both notifications should pass, and the value written the second time should + overwrite the value written the first time, and so be the value that is read + back. */ + xReturned = xTaskNotify(xTaskToNotify, ulFirstNotifiedConst, + eSetValueWithOverwrite); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + xReturned = xTaskNotify(xTaskToNotify, ulSecondNotifiedValueConst, + eSetValueWithOverwrite); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + xReturned = xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, 0); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + configASSERT(ulNotifiedValue == ulSecondNotifiedValueConst); + (void)ulNotifiedValue; + + /*------------------------------------------------------------------------- + Check notifications with no action pass without updating the value. Even + though ulFirstNotifiedConst is used as the value the value read back should + remain at ulSecondNotifiedConst. */ + xReturned = xTaskNotify(xTaskToNotify, ulFirstNotifiedConst, eNoAction); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + xReturned = xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, 0); + configASSERT(ulNotifiedValue == ulSecondNotifiedValueConst); + (void)ulNotifiedValue; /* In case configASSERT() is not defined. */ + + /*------------------------------------------------------------------------- + Check incrementing values. Send ulMaxLoop increment notifications, then + ensure the received value is as expected - which should be + ulSecondNotificationValueConst plus how ever many times to loop iterated. */ + for (ulLoop = 0; ulLoop < ulMaxLoops; ulLoop++) { + xReturned = xTaskNotify(xTaskToNotify, 0, eIncrement); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + } + + xReturned = xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, 0); + configASSERT(xReturned == pdPASS); + configASSERT(ulNotifiedValue == + (ulSecondNotifiedValueConst + ulMaxLoops)); + (void)xReturned; /* In case configASSERT() is not defined. */ + (void)ulNotifiedValue; + + /* Should not be any notifications pending now. */ + xReturned = xTaskNotifyWait(0, 0, &ulNotifiedValue, 0); + configASSERT(xReturned == pdFAIL); + (void)xReturned; /* In case configASSERT() is not defined. */ + (void)ulNotifiedValue; + + /*------------------------------------------------------------------------- + Check all bits can be set by notifying the task with one additional bit set + on each notification, and exiting the loop when all the bits are found to be + set. As there are 32-bits the loop should execute 32 times before all the + bits are found to be set. */ + ulNotifyingValue = 0x01; + ulLoop = 0; + + /* Start with all bits clear. */ + xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, 0); + + do { + /* Set the next bit in the task's notified value. */ + xTaskNotify(xTaskToNotify, ulNotifyingValue, eSetBits); + + /* Wait for the notified value - which of course will already be + available. Don't clear the bits on entry or exit as this loop is exited + when all the bits are set. */ + xReturned = xTaskNotifyWait(0, 0, &ulNotifiedValue, 0); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + + ulLoop++; + + /* Use the next bit on the next iteration around this loop. */ + ulNotifyingValue <<= 1UL; + + } while (ulNotifiedValue != notifyUINT32_MAX); + + /* As a 32-bit value was used the loop should have executed 32 times before + all the bits were set. */ + configASSERT(ulLoop == 32); + + /*------------------------------------------------------------------------- + Check bits are cleared on entry but not on exit when a notification fails + to arrive before timing out - both with and without a timeout value. Wait + for the notification again - but this time it is not given by anything and + should return pdFAIL. The parameters are set to clear bit zero on entry and + bit one on exit. As no notification was received only the bit cleared on + entry should actually get cleared. */ + xReturned = + xTaskNotifyWait(ulBit0, ulBit1, &ulNotifiedValue, xTicksToWait); + configASSERT(xReturned == pdFAIL); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Notify the task with no action so as not to update the bits even though + notifyUINT32_MAX is used as the notification value. */ + xTaskNotify(xTaskToNotify, notifyUINT32_MAX, eNoAction); + + /* Reading back the value should should find bit 0 is clear, as this was + cleared on entry, but bit 1 is not clear as it will not have been cleared on + exit as no notification was received. */ + xReturned = xTaskNotifyWait(0x00UL, 0x00UL, &ulNotifiedValue, 0); + configASSERT(xReturned == pdPASS); + configASSERT(ulNotifiedValue == (notifyUINT32_MAX & ~ulBit0)); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /*------------------------------------------------------------------------- + Now try clearing the bit on exit. For that to happen a notification must be + received, so the task is notified first. */ + xTaskNotify(xTaskToNotify, 0, eNoAction); + xTaskNotifyWait(0x00, ulBit1, &ulNotifiedValue, 0); + + /* However as the bit is cleared on exit, after the returned notification + value is set, the returned notification value should not have the bit + cleared... */ + configASSERT(ulNotifiedValue == (notifyUINT32_MAX & ~ulBit0)); + + /* ...but reading the value back again should find that the bit was indeed + cleared internally. The returned value should be pdFAIL however as nothing + has notified the task in the mean time. */ + xReturned = xTaskNotifyWait(0x00, 0x00, &ulNotifiedValue, 0); + configASSERT(xReturned == pdFAIL); + configASSERT(ulNotifiedValue == + (notifyUINT32_MAX & ~(ulBit0 | ulBit1))); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /*------------------------------------------------------------------------- + Now try querying the previous value while notifying a task. */ + xTaskNotifyAndQuery(xTaskToNotify, 0x00, eSetBits, &ulPreviousValue); + configASSERT(ulNotifiedValue == + (notifyUINT32_MAX & ~(ulBit0 | ulBit1))); + + /* Clear all bits. */ + xTaskNotifyWait(0x00, notifyUINT32_MAX, &ulNotifiedValue, 0); + xTaskNotifyAndQuery(xTaskToNotify, 0x00, eSetBits, &ulPreviousValue); + configASSERT(ulPreviousValue == 0); + + ulExpectedValue = 0; + for (ulLoop = 0x01; ulLoop < 0x80UL; ulLoop <<= 1UL) { + /* Set the next bit up, and expect to receive the last bits set (so + the previous value will not yet have the bit being set this time + around). */ + xTaskNotifyAndQuery(xTaskToNotify, ulLoop, eSetBits, + &ulPreviousValue); + configASSERT(ulExpectedValue == ulPreviousValue); + ulExpectedValue |= ulLoop; + } + + /* ------------------------------------------------------------------------ + Clear the previous notifications. */ + xTaskNotifyWait(notifyUINT32_MAX, 0, &ulNotifiedValue, 0); + + /* The task should not have any notifications pending, so an attempt to clear + the notification state should fail. */ + configASSERT(xTaskNotifyStateClear(NULL) == pdFALSE); + + /* Get the task to notify itself. This is not a normal thing to do, and is + only done here for test purposes. */ + xTaskNotifyAndQuery(xTaskToNotify, ulFirstNotifiedConst, + eSetValueWithoutOverwrite, &ulPreviousValue); + + /* Now the notification state should be eNotified, so it should now be + possible to clear the notification state. */ + configASSERT(xTaskNotifyStateClear(NULL) == pdTRUE); + configASSERT(xTaskNotifyStateClear(NULL) == pdFALSE); + + /* ------------------------------------------------------------------------ + Clear bits in the notification value. */ + + /* Get the task to set all bits its own notification value. This is not a + normal thing to do, and is only done here for test purposes. */ + xTaskNotify(xTaskToNotify, notifyUINT32_MAX, eSetBits); + + /* Now clear the top bytes - the returned value from the first call should + indicate that previously all bits were set. */ + configASSERT( + ulTaskNotifyValueClear(xTaskToNotify, notifyUINT32_HIGH_BYTE) == + notifyUINT32_MAX); + + /* Next clear the bottom bytes - the returned value this time should indicate + that the top byte was clear (before the bottom byte was cleared. */ + configASSERT( + ulTaskNotifyValueClear(xTaskToNotify, notifyUINT32_LOW_BYTE) == + (notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE)); + + /* Next clear all bytes - the returned value should indicate that previously the + high and low bytes were clear. */ + configASSERT(ulTaskNotifyValueClear(xTaskToNotify, notifyUINT32_MAX) == + (notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE & + ~notifyUINT32_LOW_BYTE)); + + /* Now all bits should be clear. */ + configASSERT(ulTaskNotifyValueClear(xTaskToNotify, notifyUINT32_MAX) == + 0); + configASSERT(ulTaskNotifyValueClear(xTaskToNotify, 0UL) == 0); + configASSERT(ulTaskNotifyValueClear(xTaskToNotify, notifyUINT32_MAX) == + 0); + + /* Now the notification state should be eNotified, so it should now be + possible to clear the notification state. */ + configASSERT(xTaskNotifyStateClear(NULL) == pdTRUE); + configASSERT(xTaskNotifyStateClear(NULL) == pdFALSE); + + /* ------------------------------------------------------------------------ + Create a timer that will try notifying this task while it is suspended. */ + xSingleTaskTimer = + xTimerCreate("SingleNotify", notifySUSPENDED_TEST_TIMER_PERIOD, + pdFALSE, NULL, prvSuspendedTaskTimerTestCallback); + configASSERT(xSingleTaskTimer); + + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + + /* Ensure no notifications are pending. */ + xTaskNotifyWait(notifyUINT32_MAX, 0, NULL, 0); + + /* Raise the task's priority so it can suspend itself before the timer + expires. */ + vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1); + + /* Start the timer that will try notifying this task while it is + suspended, then wait for a notification. The first time the callback + executes the timer will suspend the task, then resume the task, without + ever sending a notification to the task. */ + ulNotifiedValue = 0; + xTimerStart(xSingleTaskTimer, portMAX_DELAY); + + /* Check a notification is not received. */ + xReturned = xTaskNotifyWait(0, 0, &ulNotifiedValue, portMAX_DELAY); + configASSERT(xReturned == pdFALSE); + configASSERT(ulNotifiedValue == 0); + (void)xReturned; /* In case configASSERT() is not defined. */ + + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + + /* Start the timer that will try notifying this task while it is + suspended, then wait for a notification. The second time the callback + executes the timer will suspend the task, notify the task, then resume the + task (previously it was suspended and resumed without being notified). */ + xTimerStart(xSingleTaskTimer, portMAX_DELAY); + + /* Check a notification is received. */ + xReturned = xTaskNotifyWait(0, 0, &ulNotifiedValue, portMAX_DELAY); + configASSERT(xReturned == pdPASS); + (void)xReturned; /* In case configASSERT() is not defined. */ + configASSERT(ulNotifiedValue != 0); + + /* Return the task to its proper priority and delete the timer as it is + not used again. */ + vTaskPrioritySet(NULL, notifyTASK_PRIORITY); + xTimerDelete(xSingleTaskTimer, portMAX_DELAY); + + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + + /* Leave all bits cleared. */ + xTaskNotifyWait(notifyUINT32_MAX, 0, NULL, 0); +} +/*-----------------------------------------------------------*/ + +static void prvSuspendedTaskTimerTestCallback(TimerHandle_t xExpiredTimer) +{ + static uint32_t ulCallCount = 0; + + /* Remove compiler warnings about unused parameters. */ + (void)xExpiredTimer; + + /* Callback for a timer that is used during preliminary testing. The timer + tests the behaviour when 1: a task waiting for a notification is suspended + and then resumed without ever receiving a notification, and 2: when a task + waiting for a notification receives a notification while it is suspended. */ + + if (ulCallCount == 0) { + vTaskSuspend(xTaskToNotify); + configASSERT(eTaskGetState(xTaskToNotify) == eSuspended); + vTaskResume(xTaskToNotify); + } else { + vTaskSuspend(xTaskToNotify); + + /* Sending a notification while the task is suspended should pass, but + not cause the task to resume. ulCallCount is just used as a convenient + non-zero value. */ + xTaskNotify(xTaskToNotify, ulCallCount, eSetValueWithOverwrite); + + /* Make sure giving the notification didn't resume the task. */ + configASSERT(eTaskGetState(xTaskToNotify) == eSuspended); + + vTaskResume(xTaskToNotify); + } + + ulCallCount++; +} +/*-----------------------------------------------------------*/ + +static void prvNotifyingTimer(TimerHandle_t xNotUsed) +{ + (void)xNotUsed; + + xTaskNotifyGive(xTaskToNotify); + + /* This value is also incremented from an interrupt. */ + taskENTER_CRITICAL(); + { + ulTimerNotificationsSent++; + } + taskEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ + +static void prvNotifiedTask(void *pvParameters) +{ + const TickType_t xMaxPeriod = pdMS_TO_TICKS(90), + xMinPeriod = pdMS_TO_TICKS(10), xDontBlock = 0; + TickType_t xPeriod; + const uint32_t ulCyclesToRaisePriority = 50UL; + + /* Remove compiler warnings about unused parameters. */ + (void)pvParameters; + + /* Run a few tests that can be done from a single task before entering the + main loop. */ + prvSingleTaskTests(); + + /* Create the software timer that is used to send notifications to this + task. Notifications are also received from an interrupt. */ + xTimer = xTimerCreate("Notifier", xMaxPeriod, pdFALSE, NULL, + prvNotifyingTimer); + + for (;;) { + /* Start the timer again with a different period. Sometimes the period + will be higher than the task's block time, sometimes it will be lower + than the task's block time. */ + xPeriod = prvRand() % xMaxPeriod; + if (xPeriod < xMinPeriod) { + xPeriod = xMinPeriod; + } + + /* Change the timer period and start the timer. */ + xTimerChangePeriod(xTimer, xPeriod, portMAX_DELAY); + + /* Block waiting for the notification again with a different period. + Sometimes the period will be higher than the task's block time, + sometimes it will be lower than the task's block time. */ + xPeriod = prvRand() % xMaxPeriod; + if (xPeriod < xMinPeriod) { + xPeriod = xMinPeriod; + } + + /* Block to wait for a notification but without clearing the + notification count, so only add one to the count of received + notifications as any other notifications will remain pending. */ + if (ulTaskNotifyTake(pdFALSE, xPeriod) != 0) { + ulTimerNotificationsReceived++; + } + + /* Take a notification without clearing again, but this time without a + block time specified. */ + if (ulTaskNotifyTake(pdFALSE, xDontBlock) != 0) { + ulTimerNotificationsReceived++; + } + + /* Wait for the next notification from the timer, clearing all + notifications if one is received, so this time adding the total number + of notifications that were pending as none will be left pending after + the function call. */ + ulTimerNotificationsReceived += + ulTaskNotifyTake(pdTRUE, xPeriod); + + /* Occasionally raise the priority of the task being notified to test + the path where the task is notified from an ISR and becomes the highest + priority ready state task, but the pxHigherPriorityTaskWoken parameter + is NULL (which it is in the tick hook that sends notifications to this + task). */ + if ((ulNotifyCycleCount % ulCyclesToRaisePriority) == 0) { + vTaskPrioritySet(xTaskToNotify, + configMAX_PRIORITIES - 1); + + /* Wait for the next notification again, clearing all notifications + if one is received, but this time blocking indefinitely. */ + ulTimerNotificationsReceived += + ulTaskNotifyTake(pdTRUE, portMAX_DELAY); + + /* Reset the priority. */ + vTaskPrioritySet(xTaskToNotify, notifyTASK_PRIORITY); + } else { + /* Wait for the next notification again, clearing all notifications + if one is received, but this time blocking indefinitely. */ + ulTimerNotificationsReceived += + ulTaskNotifyTake(pdTRUE, portMAX_DELAY); + } + + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + } +} +/*-----------------------------------------------------------*/ + +void xNotifyTaskFromISR(void) +{ + static BaseType_t xCallCount = 0, xAPIToUse = 0; + const BaseType_t xCallInterval = pdMS_TO_TICKS(50); + uint32_t ulPreviousValue; + const uint32_t ulUnexpectedValue = 0xff; + + /* Check the task notification demo tasks were actually created. */ + configASSERT(xTaskToNotify); + + /* The task performs some tests before starting the timer that gives the + notification from this interrupt. If the timer has not been created yet + then the initial tests have not yet completed and the notification should + not be sent. */ + if (xTimer != NULL) { + xCallCount++; + + if (xCallCount >= xCallInterval) { + /* It is time to 'give' the notification again. */ + xCallCount = 0; + + /* Test using both vTaskNotifyGiveFromISR(), xTaskNotifyFromISR() + and xTaskNotifyAndQueryFromISR(). */ + switch (xAPIToUse) { + case 0: + vTaskNotifyGiveFromISR(xTaskToNotify, NULL); + xAPIToUse++; + break; + + case 1: + xTaskNotifyFromISR(xTaskToNotify, 0, eIncrement, + NULL); + xAPIToUse++; + break; + + case 2: + ulPreviousValue = ulUnexpectedValue; + xTaskNotifyAndQueryFromISR(xTaskToNotify, 0, + eIncrement, + &ulPreviousValue, + NULL); + configASSERT(ulPreviousValue != + ulUnexpectedValue); + xAPIToUse = 0; + break; + + default: /* Should never get here!. */ + break; + } + + ulTimerNotificationsSent++; + } + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check the created tasks are still running and have not +detected any errors. */ +BaseType_t xAreTaskNotificationTasksStillRunning(void) +{ + static uint32_t ulLastNotifyCycleCount = 0; + const uint32_t ulMaxSendReceiveDeviation = 5UL; + + /* Check the cycle count is still incrementing to ensure the task is still + actually running. */ + if (ulLastNotifyCycleCount == ulNotifyCycleCount) { + xErrorStatus = pdFAIL; + } else { + ulLastNotifyCycleCount = ulNotifyCycleCount; + } + + /* Check the count of 'takes' from the software timer is keeping track with + the amount of 'gives'. */ + if (ulTimerNotificationsSent > ulTimerNotificationsReceived) { + if ((ulTimerNotificationsSent - ulTimerNotificationsReceived) > + ulMaxSendReceiveDeviation) { + xErrorStatus = pdFAIL; + } + } + + return xErrorStatus; +} +/*-----------------------------------------------------------*/ + +static UBaseType_t prvRand(void) +{ + const size_t uxMultiplier = (size_t)0x015a4e35, uxIncrement = (size_t)1; + + /* Utility function to generate a pseudo random number. */ + uxNextRand = (uxMultiplier * uxNextRand) + uxIncrement; + return ((uxNextRand >> 16) & ((size_t)0x7fff)); +} +/*-----------------------------------------------------------*/ diff --git a/freertos/cvitek/task/demo/Common/Minimal/TimerDemo.c b/freertos/cvitek/task/demo/Common/Minimal/TimerDemo.c new file mode 100644 index 000000000..3e92f8ae5 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/TimerDemo.c @@ -0,0 +1,1012 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Tests the behaviour of timers. Some timers are created before the scheduler + * is started, and some after. + */ + +/* Standard includes. */ +#include <string.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" + +/* Demo program include files. */ +#include "TimerDemo.h" + +#if (configTIMER_TASK_PRIORITY < 1) +#error configTIMER_TASK_PRIORITY must be set to at least 1 for this test/demo to function correctly. +#endif + +#define tmrdemoDONT_BLOCK ((TickType_t)0) +#define tmrdemoONE_SHOT_TIMER_PERIOD (xBasePeriod * (TickType_t)3) +#define tmrdemoNUM_TIMER_RESETS ((uint8_t)10) + +#ifndef tmrTIMER_TEST_TASK_STACK_SIZE +#define tmrTIMER_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif + +/*-----------------------------------------------------------*/ + +/* The callback functions used by the timers. These each increment a counter +to indicate which timer has expired. The auto-reload timers that are used by +the test task (as opposed to being used from an ISR) all share the same +prvAutoReloadTimerCallback() callback function, and use the ID of the +pxExpiredTimer parameter passed into that function to know which counter to +increment. The other timers all have their own unique callback function and +simply increment their counters without using the callback function parameter. */ +static void prvAutoReloadTimerCallback(TimerHandle_t pxExpiredTimer); +static void prvOneShotTimerCallback(TimerHandle_t pxExpiredTimer); +static void prvTimerTestTask(void *pvParameters); +static void prvISRAutoReloadTimerCallback(TimerHandle_t pxExpiredTimer); +static void prvISROneShotTimerCallback(TimerHandle_t pxExpiredTimer); + +/* The test functions used by the timer test task. These manipulate the auto +reload and one-shot timers in various ways, then delay, then inspect the timers +to ensure they have behaved as expected. */ +static void prvTest1_CreateTimersWithoutSchedulerRunning(void); +static void prvTest2_CheckTaskAndTimersInitialState(void); +static void prvTest3_CheckAutoReloadExpireRates(void); +static void prvTest4_CheckAutoReloadTimersCanBeStopped(void); +static void prvTest5_CheckBasicOneShotTimerBehaviour(void); +static void prvTest6_CheckAutoReloadResetBehaviour(void); +static void prvResetStartConditionsForNextIteration(void); + +/*-----------------------------------------------------------*/ + +/* Flag that will be latched to pdFAIL should any unexpected behaviour be +detected in any of the demo tests. */ +static volatile BaseType_t xTestStatus = pdPASS; + +/* Counter that is incremented on each cycle of a test. This is used to +detect a stalled task - a test that is no longer running. */ +static volatile uint32_t ulLoopCounter = 0; + +/* A set of auto-reload timers - each of which use the same callback function. +The callback function uses the timer ID to index into, and then increment, a +counter in the ucAutoReloadTimerCounters[] array. The auto-reload timers +referenced from xAutoReloadTimers[] are used by the prvTimerTestTask task. */ +static TimerHandle_t xAutoReloadTimers[configTIMER_QUEUE_LENGTH + 1] = { 0 }; +static uint8_t ucAutoReloadTimerCounters[configTIMER_QUEUE_LENGTH + 1] = { 0 }; + +/* The one-shot timer is configured to use a callback function that increments +ucOneShotTimerCounter each time it gets called. */ +static TimerHandle_t xOneShotTimer = NULL; +static uint8_t ucOneShotTimerCounter = (uint8_t)0; + +/* The ISR reload timer is controlled from the tick hook to exercise the timer +API functions that can be used from an ISR. It is configured to increment +ucISRReloadTimerCounter each time its callback function is executed. */ +static TimerHandle_t xISRAutoReloadTimer = NULL; +static uint8_t ucISRAutoReloadTimerCounter = (uint8_t)0; + +/* The ISR one-shot timer is controlled from the tick hook to exercise the timer +API functions that can be used from an ISR. It is configured to increment +ucISRReloadTimerCounter each time its callback function is executed. */ +static TimerHandle_t xISROneShotTimer = NULL; +static uint8_t ucISROneShotTimerCounter = (uint8_t)0; + +/* The period of all the timers are a multiple of the base period. The base +period is configured by the parameter to vStartTimerDemoTask(). */ +static TickType_t xBasePeriod = 0; + +/*-----------------------------------------------------------*/ + +void vStartTimerDemoTask(TickType_t xBasePeriodIn) +{ + /* Start with the timer and counter arrays clear - this is only necessary + where the compiler does not clear them automatically on start up. */ + memset(ucAutoReloadTimerCounters, 0x00, + sizeof(ucAutoReloadTimerCounters)); + memset(xAutoReloadTimers, 0x00, sizeof(xAutoReloadTimers)); + + /* Store the period from which all the timer periods will be generated from + (multiples of). */ + xBasePeriod = xBasePeriodIn; + + /* Create a set of timers for use by this demo/test. */ + prvTest1_CreateTimersWithoutSchedulerRunning(); + + /* Create the task that will control and monitor the timers. This is + created at a lower priority than the timer service task to ensure, as + far as it is concerned, commands on timers are actioned immediately + (sending a command to the timer service task will unblock the timer service + task, which will then preempt this task). */ + if (xTestStatus != pdFAIL) { + xTaskCreate(prvTimerTestTask, "Tmr Tst", + tmrTIMER_TEST_TASK_STACK_SIZE, NULL, + configTIMER_TASK_PRIORITY - 1, NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvTimerTestTask(void *pvParameters) +{ + (void)pvParameters; + + /* Create a one-shot timer for use later on in this test. For test purposes it + is created as an auto-reload timer then converted to a one-shot timer. */ + xOneShotTimer = xTimerCreate( + "Oneshot Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ + tmrdemoONE_SHOT_TIMER_PERIOD, /* The period for the timer. */ + pdFALSE, /* Autorealod is false, so created as a one-shot timer. */ + (void *)0, /* The timer identifier. Initialise to 0, then increment each time it is called. */ + prvOneShotTimerCallback); /* The callback to be called when the timer expires. */ + + if (xOneShotTimer == NULL) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Purely for test coverage purposes - change and query the reload mode to + auto-reload then back to one-shot. */ + + /* Change timer to auto-reload. */ + vTimerSetReloadMode(xOneShotTimer, pdTRUE); + + /* Timer should now be auto-reload. */ + configASSERT(uxTimerGetReloadMode(xOneShotTimer) == pdTRUE); + + /* Change timer to one-shot, which is what is needed for this test. */ + vTimerSetReloadMode(xOneShotTimer, pdFALSE); + + /* Check change to one-shot was successful. */ + configASSERT(uxTimerGetReloadMode(xOneShotTimer) == pdFALSE); + + /* Ensure all the timers are in their expected initial state. This + depends on the timer service task having a higher priority than this task. */ + prvTest2_CheckTaskAndTimersInitialState(); + + for (;;) { + /* Check the auto-reload timers expire at the expected/correct rates. */ + prvTest3_CheckAutoReloadExpireRates(); + + /* Check the auto-reload timers can be stopped correctly, and correctly + report their state. */ + prvTest4_CheckAutoReloadTimersCanBeStopped(); + + /* Check the one-shot timer only calls its callback once after it has been + started, and that it reports its state correctly. */ + prvTest5_CheckBasicOneShotTimerBehaviour(); + + /* Check timer reset behaviour. */ + prvTest6_CheckAutoReloadResetBehaviour(); + + /* Start the timers again to restart all the tests over again. */ + prvResetStartConditionsForNextIteration(); + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that the created task is still running and has not +detected any errors. */ +BaseType_t xAreTimerDemoTasksStillRunning(TickType_t xCycleFrequency) +{ + static uint32_t ulLastLoopCounter = 0UL; + TickType_t xMaxBlockTimeUsedByTheseTests, xLoopCounterIncrementTimeMax; + static TickType_t xIterationsWithoutCounterIncrement = (TickType_t)0, + xLastCycleFrequency; + + if (xLastCycleFrequency != xCycleFrequency) { + /* The cycle frequency has probably become much faster due to an error + elsewhere. Start counting Iterations again. */ + xIterationsWithoutCounterIncrement = (TickType_t)0; + xLastCycleFrequency = xCycleFrequency; + } + + /* Calculate the maximum number of times that it is permissible for this + function to be called without ulLoopCounter being incremented. This is + necessary because the tests in this file block for extended periods, and the + block period might be longer than the time between calls to this function. */ + xMaxBlockTimeUsedByTheseTests = + ((TickType_t)configTIMER_QUEUE_LENGTH) * xBasePeriod; + xLoopCounterIncrementTimeMax = + (xMaxBlockTimeUsedByTheseTests / xCycleFrequency) + 1; + + /* If the demo task is still running then the loop counter is expected to + have incremented every xLoopCounterIncrementTimeMax calls. */ + if (ulLastLoopCounter == ulLoopCounter) { + xIterationsWithoutCounterIncrement++; + if (xIterationsWithoutCounterIncrement > + xLoopCounterIncrementTimeMax) { + /* The tests appear to be no longer running (stalled). */ + xTestStatus = pdFAIL; + } + } else { + /* ulLoopCounter changed, so the count of times this function was called + without a change can be reset to zero. */ + xIterationsWithoutCounterIncrement = (TickType_t)0; + } + + ulLastLoopCounter = ulLoopCounter; + + /* Errors detected in the task itself will have latched xTestStatus + to pdFAIL. */ + + return xTestStatus; +} +/*-----------------------------------------------------------*/ + +static void prvTest1_CreateTimersWithoutSchedulerRunning(void) +{ + TickType_t xTimer; + + for (xTimer = 0; xTimer < configTIMER_QUEUE_LENGTH; xTimer++) { + /* As the timer queue is not yet full, it should be possible to both + create and start a timer. These timers are being started before the + scheduler has been started, so their block times should get set to zero + within the timer API itself. */ + xAutoReloadTimers[xTimer] = xTimerCreate( + "FR Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ + ((xTimer + (TickType_t)1) * + xBasePeriod), /* The period for the timer. The plus 1 ensures a period of zero is not specified. */ + pdTRUE, /* Auto-reload is set to true. */ + (void *)xTimer, /* An identifier for the timer as all the auto-reload timers use the same callback. */ + prvAutoReloadTimerCallback); /* The callback to be called when the timer expires. */ + + if (xAutoReloadTimers[xTimer] == NULL) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } else { + configASSERT(strcmp(pcTimerGetName( + xAutoReloadTimers[xTimer]), + "FR Timer") == 0); + + /* The scheduler has not yet started, so the block period of + portMAX_DELAY should just get set to zero in xTimerStart(). Also, + the timer queue is not yet full so xTimerStart() should return + pdPASS. */ + if (xTimerStart(xAutoReloadTimers[xTimer], + portMAX_DELAY) != pdPASS) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } + } + + /* The timers queue should now be full, so it should be possible to create + another timer, but not possible to start it (the timer queue will not get + drained until the scheduler has been started. */ + xAutoReloadTimers[configTIMER_QUEUE_LENGTH] = xTimerCreate( + "FR Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ + (configTIMER_QUEUE_LENGTH * + xBasePeriod), /* The period for the timer. */ + pdTRUE, /* Auto-reload is set to true. */ + (void *)xTimer, /* An identifier for the timer as all the auto-reload timers use the same callback. */ + prvAutoReloadTimerCallback); /* The callback executed when the timer expires. */ + + if (xAutoReloadTimers[configTIMER_QUEUE_LENGTH] == NULL) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } else { + if (xTimerStart(xAutoReloadTimers[xTimer], portMAX_DELAY) == + pdPASS) { + /* This time it would not be expected that the timer could be + started at this point. */ + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } + + /* Create the timers that are used from the tick interrupt to test the timer + API functions that can be called from an ISR. */ + xISRAutoReloadTimer = xTimerCreate( + "ISR AR", /* The text name given to the timer. */ + 0xffff, /* The timer is not given a period yet - this will be done from the tick hook, but a period of 0 is invalid. */ + pdTRUE, /* This is an auto-reload timer. */ + (void *)NULL, /* The identifier is not required. */ + prvISRAutoReloadTimerCallback); /* The callback that is executed when the timer expires. */ + + xISROneShotTimer = xTimerCreate( + "ISR OS", /* The text name given to the timer. */ + 0xffff, /* The timer is not given a period yet - this will be done from the tick hook, but a period of 0 is invalid. */ + pdFALSE, /* This is a one-shot timer. */ + (void *)NULL, /* The identifier is not required. */ + prvISROneShotTimerCallback); /* The callback that is executed when the timer expires. */ + + if ((xISRAutoReloadTimer == NULL) || (xISROneShotTimer == NULL)) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } +} +/*-----------------------------------------------------------*/ + +static void prvTest2_CheckTaskAndTimersInitialState(void) +{ + uint8_t ucTimer; + + /* Ensure all the timers are in their expected initial state. This depends + on the timer service task having a higher priority than this task. + + auto-reload timers 0 to ( configTIMER_QUEUE_LENGTH - 1 ) should now be active, + and auto-reload timer configTIMER_QUEUE_LENGTH should not yet be active (it + could not be started prior to the scheduler being started when it was + created). */ + for (ucTimer = 0; ucTimer < (uint8_t)configTIMER_QUEUE_LENGTH; + ucTimer++) { + if (xTimerIsTimerActive(xAutoReloadTimers[ucTimer]) == + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } + + if (xTimerIsTimerActive(xAutoReloadTimers[configTIMER_QUEUE_LENGTH]) != + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } +} +/*-----------------------------------------------------------*/ + +static void prvTest3_CheckAutoReloadExpireRates(void) +{ + uint8_t ucMaxAllowableValue, ucMinAllowableValue, ucTimer; + TickType_t xBlockPeriod, xTimerPeriod, xExpectedNumber; + UBaseType_t uxOriginalPriority; + + /* Check the auto-reload timers expire at the expected rates. Do this at a + high priority for maximum accuracy. This is ok as most of the time is spent + in the Blocked state. */ + uxOriginalPriority = uxTaskPriorityGet(NULL); + vTaskPrioritySet(NULL, (configMAX_PRIORITIES - 1)); + + /* Delaying for configTIMER_QUEUE_LENGTH * xBasePeriod ticks should allow + all the auto-reload timers to expire at least once. */ + xBlockPeriod = ((TickType_t)configTIMER_QUEUE_LENGTH) * xBasePeriod; + vTaskDelay(xBlockPeriod); + + /* Check that all the auto-reload timers have called their callback + function the expected number of times. */ + for (ucTimer = 0; ucTimer < (uint8_t)configTIMER_QUEUE_LENGTH; + ucTimer++) { + /* The expected number of expiries is equal to the block period divided + by the timer period. */ + xTimerPeriod = + (((TickType_t)ucTimer + (TickType_t)1) * xBasePeriod); + xExpectedNumber = xBlockPeriod / xTimerPeriod; + + ucMaxAllowableValue = ((uint8_t)xExpectedNumber); + ucMinAllowableValue = (uint8_t)( + (uint8_t)xExpectedNumber - + (uint8_t)1); /* Weird casting to try and please all compilers. */ + + if ((ucAutoReloadTimerCounters[ucTimer] < + ucMinAllowableValue) || + (ucAutoReloadTimerCounters[ucTimer] > + ucMaxAllowableValue)) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } + + /* Return to the original priority. */ + vTaskPrioritySet(NULL, uxOriginalPriority); + + if (xTestStatus == pdPASS) { + /* No errors have been reported so increment the loop counter so the + check task knows this task is still running. */ + ulLoopCounter++; + } +} +/*-----------------------------------------------------------*/ + +static void prvTest4_CheckAutoReloadTimersCanBeStopped(void) +{ + uint8_t ucTimer; + + /* Check the auto-reload timers can be stopped correctly, and correctly + report their state. */ + + /* Stop all the active timers. */ + for (ucTimer = 0; ucTimer < (uint8_t)configTIMER_QUEUE_LENGTH; + ucTimer++) { + /* The timer has not been stopped yet! */ + if (xTimerIsTimerActive(xAutoReloadTimers[ucTimer]) == + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Now stop the timer. This will appear to happen immediately to + this task because this task is running at a priority below the + timer service task. */ + xTimerStop(xAutoReloadTimers[ucTimer], tmrdemoDONT_BLOCK); + + /* The timer should now be inactive. */ + if (xTimerIsTimerActive(xAutoReloadTimers[ucTimer]) != + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } + + taskENTER_CRITICAL(); + { + /* The timer in array position configTIMER_QUEUE_LENGTH should not + be active. The critical section is used to ensure the timer does + not call its callback between the next line running and the array + being cleared back to zero, as that would mask an error condition. */ + if (ucAutoReloadTimerCounters[configTIMER_QUEUE_LENGTH] != + (uint8_t)0) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Clear the timer callback count. */ + memset((void *)ucAutoReloadTimerCounters, 0, + sizeof(ucAutoReloadTimerCounters)); + } + taskEXIT_CRITICAL(); + + /* The timers are now all inactive, so this time, after delaying, none + of the callback counters should have incremented. */ + vTaskDelay(((TickType_t)configTIMER_QUEUE_LENGTH) * xBasePeriod); + for (ucTimer = 0; ucTimer < (uint8_t)configTIMER_QUEUE_LENGTH; + ucTimer++) { + if (ucAutoReloadTimerCounters[ucTimer] != (uint8_t)0) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } + + if (xTestStatus == pdPASS) { + /* No errors have been reported so increment the loop counter so + the check task knows this task is still running. */ + ulLoopCounter++; + } +} +/*-----------------------------------------------------------*/ + +static void prvTest5_CheckBasicOneShotTimerBehaviour(void) +{ + /* Check the one-shot timer only calls its callback once after it has been + started, and that it reports its state correctly. */ + + /* The one-shot timer should not be active yet. */ + if (xTimerIsTimerActive(xOneShotTimer) != pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucOneShotTimerCounter != (uint8_t)0) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Start the one-shot timer and check that it reports its state correctly. */ + xTimerStart(xOneShotTimer, tmrdemoDONT_BLOCK); + if (xTimerIsTimerActive(xOneShotTimer) == pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Delay for three times as long as the one-shot timer period, then check + to ensure it has only called its callback once, and is now not in the + active state. */ + vTaskDelay(tmrdemoONE_SHOT_TIMER_PERIOD * (TickType_t)3); + + if (xTimerIsTimerActive(xOneShotTimer) != pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucOneShotTimerCounter != (uint8_t)1) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } else { + /* Reset the one-shot timer callback count. */ + ucOneShotTimerCounter = (uint8_t)0; + } + + if (xTestStatus == pdPASS) { + /* No errors have been reported so increment the loop counter so the + check task knows this task is still running. */ + ulLoopCounter++; + } +} +/*-----------------------------------------------------------*/ + +static void prvTest6_CheckAutoReloadResetBehaviour(void) +{ + uint8_t ucTimer; + + /* Check timer reset behaviour. */ + + /* Restart the one-shot timer and check it reports its status correctly. */ + xTimerStart(xOneShotTimer, tmrdemoDONT_BLOCK); + if (xTimerIsTimerActive(xOneShotTimer) == pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Restart one of the auto-reload timers and check that it reports its + status correctly. */ + xTimerStart(xAutoReloadTimers[configTIMER_QUEUE_LENGTH - 1], + tmrdemoDONT_BLOCK); + if (xTimerIsTimerActive( + xAutoReloadTimers[configTIMER_QUEUE_LENGTH - 1]) == + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + for (ucTimer = 0; ucTimer < tmrdemoNUM_TIMER_RESETS; ucTimer++) { + /* Delay for half as long as the one-shot timer period, then reset it. + It should never expire while this is done, so its callback count should + never increment. */ + vTaskDelay(tmrdemoONE_SHOT_TIMER_PERIOD / 2); + + /* Check both running timers are still active, but have not called their + callback functions. */ + if (xTimerIsTimerActive(xOneShotTimer) == pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucOneShotTimerCounter != (uint8_t)0) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (xTimerIsTimerActive( + xAutoReloadTimers[configTIMER_QUEUE_LENGTH - 1]) == + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucAutoReloadTimerCounters[configTIMER_QUEUE_LENGTH - 1] != + (uint8_t)0) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Reset both running timers. */ + xTimerReset(xOneShotTimer, tmrdemoDONT_BLOCK); + xTimerReset(xAutoReloadTimers[configTIMER_QUEUE_LENGTH - 1], + tmrdemoDONT_BLOCK); + + if (xTestStatus == pdPASS) { + /* No errors have been reported so increment the loop counter so + the check task knows this task is still running. */ + ulLoopCounter++; + } + } + + /* Finally delay long enough for both running timers to expire. */ + vTaskDelay(((TickType_t)configTIMER_QUEUE_LENGTH) * xBasePeriod); + + /* The timers were not reset during the above delay period so should now + both have called their callback functions. */ + if (ucOneShotTimerCounter != (uint8_t)1) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucAutoReloadTimerCounters[configTIMER_QUEUE_LENGTH - 1] == 0) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* The one-shot timer should no longer be active, while the auto-reload + timer should still be active. */ + if (xTimerIsTimerActive( + xAutoReloadTimers[configTIMER_QUEUE_LENGTH - 1]) == + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (xTimerIsTimerActive(xOneShotTimer) == pdTRUE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Stop the auto-reload timer again. */ + xTimerStop(xAutoReloadTimers[configTIMER_QUEUE_LENGTH - 1], + tmrdemoDONT_BLOCK); + + if (xTimerIsTimerActive( + xAutoReloadTimers[configTIMER_QUEUE_LENGTH - 1]) != + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Clear the timer callback counts, ready for another iteration of these + tests. */ + ucAutoReloadTimerCounters[configTIMER_QUEUE_LENGTH - 1] = (uint8_t)0; + ucOneShotTimerCounter = (uint8_t)0; + + if (xTestStatus == pdPASS) { + /* No errors have been reported so increment the loop counter so the check + task knows this task is still running. */ + ulLoopCounter++; + } +} +/*-----------------------------------------------------------*/ + +static void prvResetStartConditionsForNextIteration(void) +{ + uint8_t ucTimer; + + /* Start the timers again to start all the tests over again. */ + + /* Start the timers again. */ + for (ucTimer = 0; ucTimer < (uint8_t)configTIMER_QUEUE_LENGTH; + ucTimer++) { + /* The timer has not been started yet! */ + if (xTimerIsTimerActive(xAutoReloadTimers[ucTimer]) != + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Now start the timer. This will appear to happen immediately to + this task because this task is running at a priority below the timer + service task. */ + xTimerStart(xAutoReloadTimers[ucTimer], tmrdemoDONT_BLOCK); + + /* The timer should now be active. */ + if (xTimerIsTimerActive(xAutoReloadTimers[ucTimer]) == + pdFALSE) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } + + if (xTestStatus == pdPASS) { + /* No errors have been reported so increment the loop counter so the + check task knows this task is still running. */ + ulLoopCounter++; + } +} +/*-----------------------------------------------------------*/ + +void vTimerPeriodicISRTests(void) +{ + static TickType_t uxTick = (TickType_t)-1; + +#if (configTIMER_TASK_PRIORITY != (configMAX_PRIORITIES - 1)) +/* The timer service task is not the highest priority task, so it cannot + be assumed that timings will be exact. Timers should never call their + callback before their expiry time, but a margin is permissible for calling + their callback after their expiry time. If exact timing is required then + configTIMER_TASK_PRIORITY must be set to ensure the timer service task + is the highest priority task in the system. + + This function is called from the tick hook. The tick hook is called + even when the scheduler is suspended. Therefore it is possible that the + uxTick count maintained in this function is temporarily ahead of the tick + count maintained by the kernel. When this is the case a message posted from + this function will assume a time stamp in advance of the real time stamp, + which can result in a timer being processed before this function expects it + to. For example, if the kernel's tick count was 100, and uxTick was 102, + then this function will not expect the timer to have expired until the + kernel's tick count is (102 + xBasePeriod), whereas in reality the timer + will expire when the kernel's tick count is (100 + xBasePeriod). For this + reason xMargin is used as an allowable margin for premature timer expiries + as well as late timer expiries. */ +#ifdef _WINDOWS_ + /* Windows is not real real time. */ + const TickType_t xMargin = 20; +#else + const TickType_t xMargin = 6; +#endif /* _WINDOWS_ */ +#else +#ifdef _WINDOWS_ + /* Windows is not real real time. */ + const TickType_t xMargin = 20; +#else + const TickType_t xMargin = 4; +#endif /* _WINDOWS_ */ +#endif + + uxTick++; + + if (uxTick == 0) { + /* The timers will have been created, but not started. Start them now + by setting their period. */ + ucISRAutoReloadTimerCounter = 0; + ucISROneShotTimerCounter = 0; + + /* It is possible that the timer task has not yet made room in the + timer queue. If the timers cannot be started then reset uxTick so + another attempt is made later. */ + uxTick = (TickType_t)-1; + + /* Try starting first timer. */ + if (xTimerChangePeriodFromISR(xISRAutoReloadTimer, xBasePeriod, + NULL) == pdPASS) { + /* First timer was started, try starting the second timer. */ + if (xTimerChangePeriodFromISR(xISROneShotTimer, + xBasePeriod, + NULL) == pdPASS) { + /* Both timers were started, so set the uxTick back to its + proper value. */ + uxTick = 0; + } else { + /* Second timer could not be started, so stop the first one + again. */ + xTimerStopFromISR(xISRAutoReloadTimer, NULL); + } + } + } else if (uxTick == (xBasePeriod - xMargin)) { + /* Neither timer should have expired yet. */ + if ((ucISRAutoReloadTimerCounter != 0) || + (ucISROneShotTimerCounter != 0)) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == (xBasePeriod + xMargin)) { + /* Both timers should now have expired once. The auto-reload timer will + still be active, but the one-shot timer should now have stopped. */ + if ((ucISRAutoReloadTimerCounter != 1) || + (ucISROneShotTimerCounter != 1)) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == ((2 * xBasePeriod) - xMargin)) { + /* The auto-reload timer will still be active, but the one-shot timer + should now have stopped - however, at this time neither of the timers + should have expired again since the last test. */ + if ((ucISRAutoReloadTimerCounter != 1) || + (ucISROneShotTimerCounter != 1)) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == ((2 * xBasePeriod) + xMargin)) { + /* The auto-reload timer will still be active, but the one-shot timer + should now have stopped. At this time the auto-reload timer should have + expired again, but the one-shot timer count should not have changed. */ + if (ucISRAutoReloadTimerCounter != 2) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 1) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == + ((2 * xBasePeriod) + (xBasePeriod >> (TickType_t)2U))) { + /* The auto-reload timer will still be active, but the one-shot timer + should now have stopped. Again though, at this time, neither timer call + back should have been called since the last test. */ + if (ucISRAutoReloadTimerCounter != 2) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 1) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == (3 * xBasePeriod)) { + /* Start the one-shot timer again. */ + xTimerStartFromISR(xISROneShotTimer, NULL); + } else if (uxTick == ((3 * xBasePeriod) + xMargin)) { + /* The auto-reload timer and one-shot timer will be active. At + this time the auto-reload timer should have expired again, but the one + shot timer count should not have changed yet. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 1) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Now stop the auto-reload timer. The one-shot timer was started + a few ticks ago. */ + xTimerStopFromISR(xISRAutoReloadTimer, NULL); + } else if (uxTick == (4 * (xBasePeriod - xMargin))) { + /* The auto-reload timer is now stopped, and the one-shot timer is + active, but at this time neither timer should have expired since the + last test. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 1) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == ((4 * xBasePeriod) + xMargin)) { + /* The auto-reload timer is now stopped, and the one-shot timer is + active. The one-shot timer should have expired again, but the auto + reload timer should not have executed its callback. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 2) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == (8 * xBasePeriod)) { + /* The auto-reload timer is now stopped, and the one-shot timer has + already expired and then stopped itself. Both callback counters should + not have incremented since the last test. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 2) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + /* Now reset the one-shot timer. */ + xTimerResetFromISR(xISROneShotTimer, NULL); + } else if (uxTick == ((9 * xBasePeriod) - xMargin)) { + /* Only the one-shot timer should be running, but it should not have + expired since the last test. Check the callback counters have not + incremented, then reset the one-shot timer again. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 2) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + xTimerResetFromISR(xISROneShotTimer, NULL); + } else if (uxTick == ((10 * xBasePeriod) - (2 * xMargin))) { + /* Only the one-shot timer should be running, but it should not have + expired since the last test. Check the callback counters have not + incremented, then reset the one-shot timer again. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 2) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + xTimerResetFromISR(xISROneShotTimer, NULL); + } else if (uxTick == ((11 * xBasePeriod) - (3 * xMargin))) { + /* Only the one-shot timer should be running, but it should not have + expired since the last test. Check the callback counters have not + incremented, then reset the one-shot timer once again. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 2) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + xTimerResetFromISR(xISROneShotTimer, NULL); + } else if (uxTick == ((12 * xBasePeriod) - (2 * xMargin))) { + /* Only the one-shot timer should have been running and this time it + should have expired. Check its callback count has been incremented. + The auto-reload timer is still not running so should still have the same + count value. This time the one-shot timer is not reset so should not + restart from its expiry period again. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + } else if (uxTick == (15 * xBasePeriod)) { + /* Neither timer should be running now. Check neither callback count + has incremented, then go back to the start to run these tests all + over again. */ + if (ucISRAutoReloadTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + if (ucISROneShotTimerCounter != 3) { + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } + + uxTick = (TickType_t)-1; + } +} +/*-----------------------------------------------------------*/ + +/*** Timer callback functions are defined below here. ***/ + +static void prvAutoReloadTimerCallback(TimerHandle_t pxExpiredTimer) +{ + size_t uxTimerID; + + uxTimerID = (size_t)pvTimerGetTimerID(pxExpiredTimer); + if (uxTimerID <= (configTIMER_QUEUE_LENGTH + 1)) { + (ucAutoReloadTimerCounters[uxTimerID])++; + } else { + /* The timer ID appears to be unexpected (invalid). */ + xTestStatus = pdFAIL; + configASSERT(xTestStatus); + } +} +/*-----------------------------------------------------------*/ + +static void prvOneShotTimerCallback(TimerHandle_t pxExpiredTimer) +{ + /* A count is kept of the number of times this callback function is executed. +The count is stored as the timer's ID. This is only done to test the +vTimerSetTimerID() function. */ + static size_t uxCallCount = 0; + size_t uxLastCallCount; + + /* Obtain the timer's ID, which should be a count of the number of times + this callback function has been executed. */ + uxLastCallCount = (size_t)pvTimerGetTimerID(pxExpiredTimer); + configASSERT(uxLastCallCount == uxCallCount); + + /* Increment the call count, then save it back as the timer's ID. This is + only done to test the vTimerSetTimerID() API function. */ + uxLastCallCount++; + vTimerSetTimerID(pxExpiredTimer, (void *)uxLastCallCount); + uxCallCount++; + + ucOneShotTimerCounter++; +} +/*-----------------------------------------------------------*/ + +static void prvISRAutoReloadTimerCallback(TimerHandle_t pxExpiredTimer) +{ + /* The parameter is not used in this case as only one timer uses this + callback function. */ + (void)pxExpiredTimer; + + ucISRAutoReloadTimerCounter++; +} +/*-----------------------------------------------------------*/ + +static void prvISROneShotTimerCallback(TimerHandle_t pxExpiredTimer) +{ + /* The parameter is not used in this case as only one timer uses this + callback function. */ + (void)pxExpiredTimer; + + ucISROneShotTimerCounter++; +} +/*-----------------------------------------------------------*/ diff --git a/freertos/cvitek/task/demo/Common/Minimal/blocktim.c b/freertos/cvitek/task/demo/Common/Minimal/blocktim.c new file mode 100644 index 000000000..5f966ab0b --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/blocktim.c @@ -0,0 +1,524 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This file contains some test scenarios that ensure tasks do not exit queue + * send or receive functions prematurely. A description of the tests is + * included within the code. + */ + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo includes. */ +#include "blocktim.h" + +/* Task priorities and stack sizes. Allow these to be overridden. */ +#ifndef bktPRIMARY_PRIORITY +#define bktPRIMARY_PRIORITY (configMAX_PRIORITIES - 3) +#endif + +#ifndef bktSECONDARY_PRIORITY +#define bktSECONDARY_PRIORITY (configMAX_PRIORITIES - 4) +#endif + +#ifndef bktBLOCK_TIME_TASK_STACK_SIZE +#define bktBLOCK_TIME_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif + +/* Task behaviour. */ +#define bktQUEUE_LENGTH (5) +#define bktSHORT_WAIT pdMS_TO_TICKS((TickType_t)20) +#define bktPRIMARY_BLOCK_TIME (10) +#define bktALLOWABLE_MARGIN (15) +#define bktTIME_TO_BLOCK (175) +#define bktDONT_BLOCK ((TickType_t)0) +#define bktRUN_INDICATOR ((UBaseType_t)0x55) + +/* In case the demo does not have software timers enabled, as this file uses +the configTIMER_TASK_PRIORITY setting. */ +#ifndef configTIMER_TASK_PRIORITY +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES - 1) +#endif + +/*-----------------------------------------------------------*/ + +/* + * The two test tasks. Their behaviour is commented within the functions. + */ +static void vPrimaryBlockTimeTestTask(void *pvParameters); +static void vSecondaryBlockTimeTestTask(void *pvParameters); + +/* + * Very basic tests to verify the block times are as expected. + */ +static void prvBasicDelayTests(void); + +/*-----------------------------------------------------------*/ + +/* The queue on which the tasks block. */ +static QueueHandle_t xTestQueue; + +/* Handle to the secondary task is required by the primary task for calls +to vTaskSuspend/Resume(). */ +static TaskHandle_t xSecondary; + +/* Used to ensure that tasks are still executing without error. */ +static volatile BaseType_t xPrimaryCycles = 0, xSecondaryCycles = 0; +static volatile BaseType_t xErrorOccurred = pdFALSE; + +/* Provides a simple mechanism for the primary task to know when the +secondary task has executed. */ +static volatile UBaseType_t xRunIndicator; + +/*-----------------------------------------------------------*/ + +void vCreateBlockTimeTasks(void) +{ + /* Create the queue on which the two tasks block. */ + xTestQueue = xQueueCreate(bktQUEUE_LENGTH, sizeof(BaseType_t)); + + if (xTestQueue != NULL) { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one + is in use. The queue registry is provided as a means for kernel aware + debuggers to locate queues and has no purpose if a kernel aware + debugger is not being used. The call to vQueueAddToRegistry() will be + removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + defined or is defined to be less than 1. */ + vQueueAddToRegistry(xTestQueue, "Block_Time_Queue"); + + /* Create the two test tasks. */ + xTaskCreate(vPrimaryBlockTimeTestTask, "BTest1", + bktBLOCK_TIME_TASK_STACK_SIZE, NULL, + bktPRIMARY_PRIORITY, NULL); + xTaskCreate(vSecondaryBlockTimeTestTask, "BTest2", + bktBLOCK_TIME_TASK_STACK_SIZE, NULL, + bktSECONDARY_PRIORITY, &xSecondary); + } +} +/*-----------------------------------------------------------*/ + +static void vPrimaryBlockTimeTestTask(void *pvParameters) +{ + BaseType_t xItem, xData; + TickType_t xTimeWhenBlocking; + TickType_t xTimeToBlock, xBlockedTime; + + (void)pvParameters; + + for (;;) { + /********************************************************************* + Test 0 + + Basic vTaskDelay() and vTaskDelayUntil() tests. */ + prvBasicDelayTests(); + + /********************************************************************* + Test 1 + + Simple block time wakeup test on queue receives. */ + for (xItem = 0; xItem < bktQUEUE_LENGTH; xItem++) { + /* The queue is empty. Attempt to read from the queue using a block + time. When we wake, ensure the delta in time is as expected. */ + xTimeToBlock = + (TickType_t)(bktPRIMARY_BLOCK_TIME << xItem); + + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after xTimeToBlock having not received + anything on the queue. */ + if (xQueueReceive(xTestQueue, &xData, xTimeToBlock) != + errQUEUE_EMPTY) { + xErrorOccurred = pdTRUE; + } + + /* How long were we blocked for? */ + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + if (xBlockedTime < xTimeToBlock) { + /* Should not have blocked for less than we requested. */ + xErrorOccurred = pdTRUE; + } + + if (xBlockedTime > + (xTimeToBlock + bktALLOWABLE_MARGIN)) { + /* Should not have blocked for longer than we requested, + although we would not necessarily run as soon as we were + unblocked so a margin is allowed. */ + xErrorOccurred = pdTRUE; + } + } + + /********************************************************************* + Test 2 + + Simple block time wakeup test on queue sends. + + First fill the queue. It should be empty so all sends should pass. */ + for (xItem = 0; xItem < bktQUEUE_LENGTH; xItem++) { + if (xQueueSend(xTestQueue, &xItem, bktDONT_BLOCK) != + pdPASS) { + xErrorOccurred = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + } + + for (xItem = 0; xItem < bktQUEUE_LENGTH; xItem++) { + /* The queue is full. Attempt to write to the queue using a block + time. When we wake, ensure the delta in time is as expected. */ + xTimeToBlock = + (TickType_t)(bktPRIMARY_BLOCK_TIME << xItem); + + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after xTimeToBlock having not received + anything on the queue. */ + if (xQueueSend(xTestQueue, &xItem, xTimeToBlock) != + errQUEUE_FULL) { + xErrorOccurred = pdTRUE; + } + + /* How long were we blocked for? */ + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + if (xBlockedTime < xTimeToBlock) { + /* Should not have blocked for less than we requested. */ + xErrorOccurred = pdTRUE; + } + + if (xBlockedTime > + (xTimeToBlock + bktALLOWABLE_MARGIN)) { + /* Should not have blocked for longer than we requested, + although we would not necessarily run as soon as we were + unblocked so a margin is allowed. */ + xErrorOccurred = pdTRUE; + } + } + + /********************************************************************* + Test 3 + + Wake the other task, it will block attempting to post to the queue. + When we read from the queue the other task will wake, but before it + can run we will post to the queue again. When the other task runs it + will find the queue still full, even though it was woken. It should + recognise that its block time has not expired and return to block for + the remains of its block time. + + Wake the other task so it blocks attempting to post to the already + full queue. */ + xRunIndicator = 0; + vTaskResume(xSecondary); + + /* We need to wait a little to ensure the other task executes. */ + while (xRunIndicator != bktRUN_INDICATOR) { + /* The other task has not yet executed. */ + vTaskDelay(bktSHORT_WAIT); + } + /* Make sure the other task is blocked on the queue. */ + vTaskDelay(bktSHORT_WAIT); + xRunIndicator = 0; + + for (xItem = 0; xItem < bktQUEUE_LENGTH; xItem++) { + /* Now when we make space on the queue the other task should wake + but not execute as this task has higher priority. */ + if (xQueueReceive(xTestQueue, &xData, bktDONT_BLOCK) != + pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Now fill the queue again before the other task gets a chance to + execute. If the other task had executed we would find the queue + full ourselves, and the other task have set xRunIndicator. */ + if (xQueueSend(xTestQueue, &xItem, bktDONT_BLOCK) != + pdPASS) { + xErrorOccurred = pdTRUE; + } + + if (xRunIndicator == bktRUN_INDICATOR) { + /* The other task should not have executed. */ + xErrorOccurred = pdTRUE; + } + + /* Raise the priority of the other task so it executes and blocks + on the queue again. */ + vTaskPrioritySet(xSecondary, bktPRIMARY_PRIORITY + 2); + + /* The other task should now have re-blocked without exiting the + queue function. */ + if (xRunIndicator == bktRUN_INDICATOR) { + /* The other task should not have executed outside of the + queue function. */ + xErrorOccurred = pdTRUE; + } + + /* Set the priority back down. */ + vTaskPrioritySet(xSecondary, bktSECONDARY_PRIORITY); + } + + /* Let the other task timeout. When it unblockes it will check that it + unblocked at the correct time, then suspend itself. */ + while (xRunIndicator != bktRUN_INDICATOR) { + vTaskDelay(bktSHORT_WAIT); + } + vTaskDelay(bktSHORT_WAIT); + xRunIndicator = 0; + + /********************************************************************* + Test 4 + + As per test 3 - but with the send and receive the other way around. + The other task blocks attempting to read from the queue. + + Empty the queue. We should find that it is full. */ + for (xItem = 0; xItem < bktQUEUE_LENGTH; xItem++) { + if (xQueueReceive(xTestQueue, &xData, bktDONT_BLOCK) != + pdPASS) { + xErrorOccurred = pdTRUE; + } + } + + /* Wake the other task so it blocks attempting to read from the + already empty queue. */ + vTaskResume(xSecondary); + + /* We need to wait a little to ensure the other task executes. */ + while (xRunIndicator != bktRUN_INDICATOR) { + vTaskDelay(bktSHORT_WAIT); + } + vTaskDelay(bktSHORT_WAIT); + xRunIndicator = 0; + + for (xItem = 0; xItem < bktQUEUE_LENGTH; xItem++) { + /* Now when we place an item on the queue the other task should + wake but not execute as this task has higher priority. */ + if (xQueueSend(xTestQueue, &xItem, bktDONT_BLOCK) != + pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Now empty the queue again before the other task gets a chance to + execute. If the other task had executed we would find the queue + empty ourselves, and the other task would be suspended. */ + if (xQueueReceive(xTestQueue, &xData, bktDONT_BLOCK) != + pdPASS) { + xErrorOccurred = pdTRUE; + } + + if (xRunIndicator == bktRUN_INDICATOR) { + /* The other task should not have executed. */ + xErrorOccurred = pdTRUE; + } + + /* Raise the priority of the other task so it executes and blocks + on the queue again. */ + vTaskPrioritySet(xSecondary, bktPRIMARY_PRIORITY + 2); + + /* The other task should now have re-blocked without exiting the + queue function. */ + if (xRunIndicator == bktRUN_INDICATOR) { + /* The other task should not have executed outside of the + queue function. */ + xErrorOccurred = pdTRUE; + } + vTaskPrioritySet(xSecondary, bktSECONDARY_PRIORITY); + } + + /* Let the other task timeout. When it unblockes it will check that it + unblocked at the correct time, then suspend itself. */ + while (xRunIndicator != bktRUN_INDICATOR) { + vTaskDelay(bktSHORT_WAIT); + } + vTaskDelay(bktSHORT_WAIT); + + xPrimaryCycles++; + } +} +/*-----------------------------------------------------------*/ + +static void vSecondaryBlockTimeTestTask(void *pvParameters) +{ + TickType_t xTimeWhenBlocking, xBlockedTime; + BaseType_t xData; + + (void)pvParameters; + + for (;;) { + /********************************************************************* + Test 0, 1 and 2 + + This task does not participate in these tests. */ + vTaskSuspend(NULL); + + /********************************************************************* + Test 3 + + The first thing we do is attempt to read from the queue. It should be + full so we block. Note the time before we block so we can check the + wake time is as per that expected. */ + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after bktTIME_TO_BLOCK having not sent anything to + the queue. */ + xData = 0; + xRunIndicator = bktRUN_INDICATOR; + if (xQueueSend(xTestQueue, &xData, bktTIME_TO_BLOCK) != + errQUEUE_FULL) { + xErrorOccurred = pdTRUE; + } + + /* How long were we inside the send function? */ + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + /* We should not have blocked for less time than bktTIME_TO_BLOCK. */ + if (xBlockedTime < bktTIME_TO_BLOCK) { + xErrorOccurred = pdTRUE; + } + + /* We should of not blocked for much longer than bktALLOWABLE_MARGIN + either. A margin is permitted as we would not necessarily run as + soon as we unblocked. */ + if (xBlockedTime > (bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN)) { + xErrorOccurred = pdTRUE; + } + + /* Suspend ready for test 3. */ + xRunIndicator = bktRUN_INDICATOR; + vTaskSuspend(NULL); + + /********************************************************************* + Test 4 + + As per test three, but with the send and receive reversed. */ + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after bktTIME_TO_BLOCK having not received + anything on the queue. */ + xRunIndicator = bktRUN_INDICATOR; + if (xQueueReceive(xTestQueue, &xData, bktTIME_TO_BLOCK) != + errQUEUE_EMPTY) { + xErrorOccurred = pdTRUE; + } + + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + /* We should not have blocked for less time than bktTIME_TO_BLOCK. */ + if (xBlockedTime < bktTIME_TO_BLOCK) { + xErrorOccurred = pdTRUE; + } + + /* We should of not blocked for much longer than bktALLOWABLE_MARGIN + either. A margin is permitted as we would not necessarily run as soon + as we unblocked. */ + if (xBlockedTime > (bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN)) { + xErrorOccurred = pdTRUE; + } + + xRunIndicator = bktRUN_INDICATOR; + + xSecondaryCycles++; + } +} +/*-----------------------------------------------------------*/ + +static void prvBasicDelayTests(void) +{ + TickType_t xPreTime, xPostTime, x, xLastUnblockTime, + xExpectedUnblockTime; + const TickType_t xPeriod = 75, xCycles = 5, + xAllowableMargin = (bktALLOWABLE_MARGIN >> 1); + + /* Temporarily increase priority so the timing is more accurate, but not so + high as to disrupt the timer tests. */ + vTaskPrioritySet(NULL, configTIMER_TASK_PRIORITY - 1); + + /* Crude check to too see that vTaskDelay() blocks for the expected + period. */ + xPreTime = xTaskGetTickCount(); + vTaskDelay(bktTIME_TO_BLOCK); + xPostTime = xTaskGetTickCount(); + + /* The priority is higher, so the allowable margin is halved when compared + to the other tests in this file. */ + if ((xPostTime - xPreTime) > (bktTIME_TO_BLOCK + xAllowableMargin)) { + xErrorOccurred = pdTRUE; + } + + /* Now crude tests to check the vTaskDelayUntil() functionality. */ + xPostTime = xTaskGetTickCount(); + xLastUnblockTime = xPostTime; + + for (x = 0; x < xCycles; x++) { + /* Calculate the next expected unblock time from the time taken before + this loop was entered. */ + xExpectedUnblockTime = xPostTime + (x * xPeriod); + + vTaskDelayUntil(&xLastUnblockTime, xPeriod); + + if ((xTaskGetTickCount() - xExpectedUnblockTime) > + (bktTIME_TO_BLOCK + xAllowableMargin)) { + xErrorOccurred = pdTRUE; + } + + xPrimaryCycles++; + } + + /* Reset to the original task priority ready for the other tests. */ + vTaskPrioritySet(NULL, bktPRIMARY_PRIORITY); +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreBlockTimeTestTasksStillRunning(void) +{ + static BaseType_t xLastPrimaryCycleCount = 0, + xLastSecondaryCycleCount = 0; + BaseType_t xReturn = pdPASS; + + /* Have both tasks performed at least one cycle since this function was + last called? */ + if (xPrimaryCycles == xLastPrimaryCycleCount) { + xReturn = pdFAIL; + } + + if (xSecondaryCycles == xLastSecondaryCycleCount) { + xReturn = pdFAIL; + } + + if (xErrorOccurred == pdTRUE) { + xReturn = pdFAIL; + } + + xLastSecondaryCycleCount = xSecondaryCycles; + xLastPrimaryCycleCount = xPrimaryCycles; + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/comtest.c b/freertos/cvitek/task/demo/Common/Minimal/comtest.c new file mode 100644 index 000000000..16123f6e5 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/comtest.c @@ -0,0 +1,255 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This version of comtest. c is for use on systems that have limited stack + * space and no display facilities. The complete version can be found in + * the Demo/Common/Full directory. + * + * Creates two tasks that operate on an interrupt driven serial port. A + * loopback connector should be used so that everything that is transmitted is + * also received. The serial port does not use any flow control. On a + * standard 9way 'D' connector pins two and three should be connected together. + * + * The first task posts a sequence of characters to the Tx queue, toggling an + * LED on each successful post. At the end of the sequence it sleeps for a + * pseudo-random period before resending the same sequence. + * + * The UART Tx end interrupt is enabled whenever data is available in the Tx + * queue. The Tx end ISR removes a single character from the Tx queue and + * passes it to the UART for transmission. + * + * The second task blocks on the Rx queue waiting for a character to become + * available. When the UART Rx end interrupt receives a character it places + * it in the Rx queue, waking the second task. The second task checks that the + * characters removed from the Rx queue form the same sequence as those posted + * to the Tx queue, and toggles an LED for each correct character. + * + * The receiving task is spawned with a higher priority than the transmitting + * task. The receiver will therefore wake every time a character is + * transmitted so neither the Tx or Rx queue should ever hold more than a few + * characters. + * + */ + +/* Scheduler include files. */ +#include <stdlib.h> +#include "FreeRTOS.h" +#include "task.h" + +/* Demo program include files. */ +#include "serial.h" +#include "comtest.h" +#include "partest.h" + +#define comSTACK_SIZE configMINIMAL_STACK_SIZE +#define comTX_LED_OFFSET (0) +#define comRX_LED_OFFSET (1) +#define comTOTAL_PERMISSIBLE_ERRORS (2) + +/* The Tx task will transmit the sequence of characters at a pseudo random +interval. This is the maximum and minimum block time between sends. */ +#define comTX_MAX_BLOCK_TIME ((TickType_t)0x96) +#define comTX_MIN_BLOCK_TIME ((TickType_t)0x32) +#define comOFFSET_TIME ((TickType_t)3) + +/* We should find that each character can be queued for Tx immediately and we +don't have to block to send. */ +#define comNO_BLOCK ((TickType_t)0) + +/* The Rx task will block on the Rx queue for a long period. */ +#define comRX_BLOCK_TIME ((TickType_t)0xffff) + +/* The sequence transmitted is from comFIRST_BYTE to and including comLAST_BYTE. */ +#define comFIRST_BYTE ('A') +#define comLAST_BYTE ('X') + +#define comBUFFER_LEN \ + ((UBaseType_t)(comLAST_BYTE - comFIRST_BYTE) + (UBaseType_t)1) +#define comINITIAL_RX_COUNT_VALUE (0) + +/* Handle to the com port used by both tasks. */ +static xComPortHandle xPort = NULL; + +/* The transmit task as described at the top of the file. */ +static portTASK_FUNCTION_PROTO(vComTxTask, pvParameters); + +/* The receive task as described at the top of the file. */ +static portTASK_FUNCTION_PROTO(vComRxTask, pvParameters); + +/* The LED that should be toggled by the Rx and Tx tasks. The Rx task will +toggle LED ( uxBaseLED + comRX_LED_OFFSET). The Tx task will toggle LED +( uxBaseLED + comTX_LED_OFFSET ). */ +static UBaseType_t uxBaseLED = 0; + +/* Check variable used to ensure no error have occurred. The Rx task will +increment this variable after every successfully received sequence. If at any +time the sequence is incorrect the the variable will stop being incremented. */ +static volatile UBaseType_t uxRxLoops = comINITIAL_RX_COUNT_VALUE; + +/*-----------------------------------------------------------*/ + +void vAltStartComTestTasks(UBaseType_t uxPriority, uint32_t ulBaudRate, + UBaseType_t uxLED) +{ + /* Initialise the com port then spawn the Rx and Tx tasks. */ + uxBaseLED = uxLED; + xSerialPortInitMinimal(ulBaudRate, comBUFFER_LEN); + + /* The Tx task is spawned with a lower priority than the Rx task. */ + xTaskCreate(vComTxTask, "COMTx", comSTACK_SIZE, NULL, uxPriority - 1, + (TaskHandle_t *)NULL); + xTaskCreate(vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority, + (TaskHandle_t *)NULL); +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vComTxTask, pvParameters) +{ + char cByteToSend; + TickType_t xTimeToWait; + + /* Just to stop compiler warnings. */ + (void)pvParameters; + + for (;;) { + /* Simply transmit a sequence of characters from comFIRST_BYTE to + comLAST_BYTE. */ + for (cByteToSend = comFIRST_BYTE; cByteToSend <= comLAST_BYTE; + cByteToSend++) { + if (xSerialPutChar(xPort, cByteToSend, comNO_BLOCK) == + pdPASS) { + vParTestToggleLED(uxBaseLED + comTX_LED_OFFSET); + } + } + + /* Turn the LED off while we are not doing anything. */ + vParTestSetLED(uxBaseLED + comTX_LED_OFFSET, pdFALSE); + + /* We have posted all the characters in the string - wait before + re-sending. Wait a pseudo-random time as this will provide a better + test. */ + xTimeToWait = xTaskGetTickCount() + comOFFSET_TIME; + + /* Make sure we don't wait too long... */ + xTimeToWait %= comTX_MAX_BLOCK_TIME; + + /* ...but we do want to wait. */ + if (xTimeToWait < comTX_MIN_BLOCK_TIME) { + xTimeToWait = comTX_MIN_BLOCK_TIME; + } + + vTaskDelay(xTimeToWait); + } +} /*lint !e715 !e818 pvParameters is required for a task function even if it is not referenced. */ +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vComRxTask, pvParameters) +{ + signed char cExpectedByte, cByteRxed; + BaseType_t xResyncRequired = pdFALSE, xErrorOccurred = pdFALSE; + + /* Just to stop compiler warnings. */ + (void)pvParameters; + + for (;;) { + /* We expect to receive the characters from comFIRST_BYTE to + comLAST_BYTE in an incrementing order. Loop to receive each byte. */ + for (cExpectedByte = comFIRST_BYTE; + cExpectedByte <= comLAST_BYTE; cExpectedByte++) { + /* Block on the queue that contains received bytes until a byte is + available. */ + if (xSerialGetChar(xPort, &cByteRxed, + comRX_BLOCK_TIME)) { + /* Was this the byte we were expecting? If so, toggle the LED, + otherwise we are out on sync and should break out of the loop + until the expected character sequence is about to restart. */ + if (cByteRxed == cExpectedByte) { + vParTestToggleLED(uxBaseLED + + comRX_LED_OFFSET); + } else { + xResyncRequired = pdTRUE; + break; /*lint !e960 Non-switch break allowed. */ + } + } + } + + /* Turn the LED off while we are not doing anything. */ + vParTestSetLED(uxBaseLED + comRX_LED_OFFSET, pdFALSE); + + /* Did we break out of the loop because the characters were received in + an unexpected order? If so wait here until the character sequence is + about to restart. */ + if (xResyncRequired == pdTRUE) { + while (cByteRxed != comLAST_BYTE) { + /* Block until the next char is available. */ + xSerialGetChar(xPort, &cByteRxed, + comRX_BLOCK_TIME); + } + + /* Note that an error occurred which caused us to have to resync. + We use this to stop incrementing the loop counter so + sAreComTestTasksStillRunning() will return false - indicating an + error. */ + xErrorOccurred++; + + /* We have now resynced with the Tx task and can continue. */ + xResyncRequired = pdFALSE; + } else { + if (xErrorOccurred < comTOTAL_PERMISSIBLE_ERRORS) { + /* Increment the count of successful loops. As error + occurring (i.e. an unexpected character being received) will + prevent this counter being incremented for the rest of the + execution. Don't worry about mutual exclusion on this + variable - it doesn't really matter as we just want it + to change. */ + uxRxLoops++; + } + } + } +} /*lint !e715 !e818 pvParameters is required for a task function even if it is not referenced. */ +/*-----------------------------------------------------------*/ + +BaseType_t xAreComTestTasksStillRunning(void) +{ + BaseType_t xReturn; + + /* If the count of successful reception loops has not changed than at + some time an error occurred (i.e. a character was received out of sequence) + and we will return false. */ + if (uxRxLoops == comINITIAL_RX_COUNT_VALUE) { + xReturn = pdFALSE; + } else { + xReturn = pdTRUE; + } + + /* Reset the count of successful Rx loops. When this function is called + again we expect this to have been incremented. */ + uxRxLoops = comINITIAL_RX_COUNT_VALUE; + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/comtest_strings.c b/freertos/cvitek/task/demo/Common/Minimal/comtest_strings.c new file mode 100644 index 000000000..270443ef6 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/comtest_strings.c @@ -0,0 +1,301 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Creates a task and a timer that operate on an interrupt driven serial port. + * This demo assumes that the characters transmitted on a port will also be + * received on the same port. Therefore, the UART must either be connected to + * an echo server, or the uart connector must have a loopback connector fitted. + * See http://www.serialporttool.com/CommEcho.htm for a suitable echo server + * for Windows hosts. + * + * The timer sends a string to the UART, toggles an LED, then resets itself by + * changing its own period. The period is calculated as a pseudo random number + * between comTX_MAX_BLOCK_TIME and comTX_MIN_BLOCK_TIME. + * + * The task blocks on an Rx queue waiting for a character to become available. + * Received characters are checked to ensure they match those transmitted by the + * Tx timer. An error is latched if characters are missing, incorrect, or + * arrive too slowly. + * + * How characters are actually transmitted and received is port specific. Demos + * that include this test/demo file will provide example drivers. The Tx timer + * executes in the context of the timer service (daemon) task, and must + * therefore never attempt to block. + * + */ + +/* Scheduler include files. */ +#include <stdlib.h> +#include <string.h> +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" + +#ifndef configUSE_TIMERS +#error This demo uses timers. configUSE_TIMERS must be set to 1 in FreeRTOSConfig.h. +#endif + +#if configUSE_TIMERS != 1 +#error This demo uses timers. configUSE_TIMERS must be set to 1 in FreeRTOSConfig.h. +#endif + +/* Demo program include files. */ +#include "serial.h" +#include "comtest_strings.h" +#include "partest.h" + +/* The size of the stack given to the Rx task. */ +#define comSTACK_SIZE configMINIMAL_STACK_SIZE + +/* See the comment above the declaraction of the uxBaseLED variable. */ +#define comTX_LED_OFFSET (0) +#define comRX_LED_OFFSET (1) + +/* The Tx timer transmits the sequence of characters at a pseudo random +interval that is capped between comTX_MAX_BLOCK_TIME and +comTX_MIN_BLOCK_TIME. */ +#define comTX_MAX_BLOCK_TIME ((TickType_t)0x96) +#define comTX_MIN_BLOCK_TIME ((TickType_t)0x32) +#define comOFFSET_TIME ((TickType_t)3) + +/* States for the simple state machine implemented in the Rx task. */ +#define comtstWAITING_START_OF_STRING 0 +#define comtstWAITING_END_OF_STRING 1 + +/* A short delay in ticks - this delay is used to allow the Rx queue to fill up +a bit so more than one character can be processed at a time. This is relative +to comTX_MIN_BLOCK_TIME to ensure it is never longer than the shortest gap +between transmissions. It could be worked out more scientifically from the +baud rate being used. */ +#define comSHORT_DELAY (comTX_MIN_BLOCK_TIME >> (TickType_t)2) + +/* The string that is transmitted and received. */ +#define comTRANSACTED_STRING \ + "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890" + +/* A block time of 0 simply means "don't block". */ +#define comtstDONT_BLOCK (TickType_t)0 + +/* Handle to the com port used by both tasks. */ +static xComPortHandle xPort = NULL; + +/* The callback function allocated to the transmit timer, as described in the +comments at the top of this file. */ +static void prvComTxTimerCallback(TimerHandle_t xTimer); + +/* The receive task as described in the comments at the top of this file. */ +static void vComRxTask(void *pvParameters); + +/* The Rx task will toggle LED ( uxBaseLED + comRX_LED_OFFSET). The Tx task +will toggle LED ( uxBaseLED + comTX_LED_OFFSET ). */ +static UBaseType_t uxBaseLED = 0; + +/* The Rx task toggles uxRxLoops on each successful iteration of its defined +function - provided no errors have ever been latched. If this variable stops +incrementing, then an error has occurred. */ +static volatile UBaseType_t uxRxLoops = 0UL; + +/* The timer used to periodically transmit the string. This is the timer that +has prvComTxTimerCallback allocated to it as its callback function. */ +static TimerHandle_t xTxTimer = NULL; + +/* The string length is held at file scope so the Tx timer does not need to +calculate it each time it executes. */ +static size_t xStringLength = 0U; + +/*-----------------------------------------------------------*/ + +void vStartComTestStringsTasks(UBaseType_t uxPriority, uint32_t ulBaudRate, + UBaseType_t uxLED) +{ + /* Store values that are used at run time. */ + uxBaseLED = uxLED; + + /* Calculate the string length here, rather than each time the Tx timer + executes. */ + xStringLength = strlen(comTRANSACTED_STRING); + + /* Include the null terminator in the string length as this is used to + detect the end of the string in the Rx task. */ + xStringLength++; + + /* Initialise the com port, then spawn the Rx task and create the Tx + timer. */ + xSerialPortInitMinimal(ulBaudRate, (xStringLength * 2U)); + + /* Create the Rx task and the Tx timer. The timer is started from the + Rx task. */ + xTaskCreate(vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority, + (TaskHandle_t *)NULL); + xTxTimer = xTimerCreate("TxTimer", comTX_MIN_BLOCK_TIME, pdFALSE, NULL, + prvComTxTimerCallback); + configASSERT(xTxTimer); +} +/*-----------------------------------------------------------*/ + +static void prvComTxTimerCallback(TimerHandle_t xTimer) +{ + TickType_t xTimeToWait; + + /* The parameter is not used in this case. */ + (void)xTimer; + + /* Send the string. How this is actually performed depends on the + sample driver provided with this demo. However - as this is a timer, + it executes in the context of the timer task and therefore must not + block. */ + vSerialPutString(xPort, comTRANSACTED_STRING, xStringLength); + + /* Toggle an LED to give a visible indication that another transmission + has been performed. */ + vParTestToggleLED(uxBaseLED + comTX_LED_OFFSET); + + /* Wait a pseudo random time before sending the string again. */ + xTimeToWait = xTaskGetTickCount() + comOFFSET_TIME; + + /* Ensure the time to wait is not greater than comTX_MAX_BLOCK_TIME. */ + xTimeToWait %= comTX_MAX_BLOCK_TIME; + + /* Ensure the time to wait is not less than comTX_MIN_BLOCK_TIME. */ + if (xTimeToWait < comTX_MIN_BLOCK_TIME) { + xTimeToWait = comTX_MIN_BLOCK_TIME; + } + + /* Reset the timer to run again xTimeToWait ticks from now. This function + is called from the context of the timer task, so the block time must not + be anything other than zero. */ + xTimerChangePeriod(xTxTimer, xTimeToWait, comtstDONT_BLOCK); +} +/*-----------------------------------------------------------*/ + +static void vComRxTask(void *pvParameters) +{ + BaseType_t xState = comtstWAITING_START_OF_STRING, + xErrorOccurred = pdFALSE; + char *pcExpectedByte, cRxedChar; + const xComPortHandle xPort = NULL; + + /* The parameter is not used in this example. */ + (void)pvParameters; + + /* Start the Tx timer. This only needs to be started once, as it will + reset itself thereafter. */ + xTimerStart(xTxTimer, portMAX_DELAY); + + /* The first expected Rx character is the first in the string that is + transmitted. */ + pcExpectedByte = comTRANSACTED_STRING; + + for (;;) { + /* Wait for the next character. */ + if (xSerialGetChar(xPort, &cRxedChar, + (comTX_MAX_BLOCK_TIME * 2)) == pdFALSE) { + /* A character definitely should have been received by now. As a + character was not received an error must have occurred (which might + just be that the loopback connector is not fitted). */ + xErrorOccurred = pdTRUE; + } + + switch (xState) { + case comtstWAITING_START_OF_STRING: + if (cRxedChar == *pcExpectedByte) { + /* The received character was the first character of the + string. Move to the next state to check each character + as it comes in until the entire string has been received. */ + xState = comtstWAITING_END_OF_STRING; + pcExpectedByte++; + + /* Block for a short period. This just allows the Rx queue + to contain more than one character, and therefore prevent + thrashing reads to the queue, and repetitive context + switches as each character is received. */ + vTaskDelay(comSHORT_DELAY); + } + break; + + case comtstWAITING_END_OF_STRING: + if (cRxedChar == *pcExpectedByte) { + /* The received character was the expected character. Was + it the last character in the string - i.e. the null + terminator? */ + if (cRxedChar == 0x00) { + /* The entire string has been received. If no errors + have been latched, then increment the loop counter to + show this task is still healthy. */ + if (xErrorOccurred == pdFALSE) { + uxRxLoops++; + + /* Toggle an LED to give a visible sign that a + complete string has been received. */ + vParTestToggleLED( + uxBaseLED + + comRX_LED_OFFSET); + } + + /* Go back to wait for the start of the next string. */ + pcExpectedByte = comTRANSACTED_STRING; + xState = comtstWAITING_START_OF_STRING; + } else { + /* Wait for the next character in the string. */ + pcExpectedByte++; + } + } else { + /* The character received was not that expected. */ + xErrorOccurred = pdTRUE; + } + break; + + default: + /* Should not get here. Stop the Rx loop counter from + incrementing to latch the error. */ + xErrorOccurred = pdTRUE; + break; + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreComTestTasksStillRunning(void) +{ + BaseType_t xReturn; + + /* If the count of successful reception loops has not changed than at + some time an error occurred (i.e. a character was received out of sequence) + and false is returned. */ + if (uxRxLoops == 0UL) { + xReturn = pdFALSE; + } else { + xReturn = pdTRUE; + } + + /* Reset the count of successful Rx loops. When this function is called + again it should have been incremented again. */ + uxRxLoops = 0UL; + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/countsem.c b/freertos/cvitek/task/demo/Common/Minimal/countsem.c new file mode 100644 index 000000000..1f24fc26b --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/countsem.c @@ -0,0 +1,283 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Simple demonstration of the usage of counting semaphore. + */ + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* Demo program include files. */ +#include "countsem.h" + +/* The maximum count value that the semaphore used for the demo can hold. */ +#define countMAX_COUNT_VALUE (200) + +/* Constants used to indicate whether or not the semaphore should have been +created with its maximum count value, or its minimum count value. These +numbers are used to ensure that the pointers passed in as the task parameters +are valid. */ +#define countSTART_AT_MAX_COUNT (0xaa) +#define countSTART_AT_ZERO (0x55) + +/* Two tasks are created for the test. One uses a semaphore created with its +count value set to the maximum, and one with the count value set to zero. */ +#define countNUM_TEST_TASKS (2) +#define countDONT_BLOCK (0) + +/*-----------------------------------------------------------*/ + +/* Flag that will be latched to pdTRUE should any unexpected behaviour be +detected in any of the tasks. */ +static volatile BaseType_t xErrorDetected = pdFALSE; + +/*-----------------------------------------------------------*/ + +/* + * The demo task. This simply counts the semaphore up to its maximum value, + * the counts it back down again. The result of each semaphore 'give' and + * 'take' is inspected, with an error being flagged if it is found not to be + * the expected result. + */ +static void prvCountingSemaphoreTask(void *pvParameters); + +/* + * Utility function to increment the semaphore count value up from zero to + * countMAX_COUNT_VALUE. + */ +static void prvIncrementSemaphoreCount(SemaphoreHandle_t xSemaphore, + volatile UBaseType_t *puxLoopCounter); + +/* + * Utility function to decrement the semaphore count value up from + * countMAX_COUNT_VALUE to zero. + */ +static void prvDecrementSemaphoreCount(SemaphoreHandle_t xSemaphore, + volatile UBaseType_t *puxLoopCounter); + +/*-----------------------------------------------------------*/ + +/* The structure that is passed into the task as the task parameter. */ +typedef struct COUNT_SEM_STRUCT { + /* The semaphore to be used for the demo. */ + SemaphoreHandle_t xSemaphore; + + /* Set to countSTART_AT_MAX_COUNT if the semaphore should be created with + its count value set to its max count value, or countSTART_AT_ZERO if it + should have been created with its count value set to 0. */ + UBaseType_t uxExpectedStartCount; + + /* Incremented on each cycle of the demo task. Used to detect a stalled + task. */ + volatile UBaseType_t uxLoopCounter; +} xCountSemStruct; + +/* Two structures are defined, one is passed to each test task. */ +static xCountSemStruct xParameters[countNUM_TEST_TASKS]; + +/*-----------------------------------------------------------*/ + +void vStartCountingSemaphoreTasks(void) +{ + /* Create the semaphores that we are going to use for the test/demo. The + first should be created such that it starts at its maximum count value, + the second should be created such that it starts with a count value of zero. */ + xParameters[0].xSemaphore = xSemaphoreCreateCounting( + countMAX_COUNT_VALUE, countMAX_COUNT_VALUE); + xParameters[0].uxExpectedStartCount = countSTART_AT_MAX_COUNT; + xParameters[0].uxLoopCounter = 0; + + xParameters[1].xSemaphore = + xSemaphoreCreateCounting(countMAX_COUNT_VALUE, 0); + xParameters[1].uxExpectedStartCount = 0; + xParameters[1].uxLoopCounter = 0; + + /* Were the semaphores created? */ + if ((xParameters[0].xSemaphore != NULL) || + (xParameters[1].xSemaphore != NULL)) { + /* vQueueAddToRegistry() adds the semaphore to the registry, if one is + in use. The registry is provided as a means for kernel aware + debuggers to locate semaphores and has no purpose if a kernel aware + debugger is not being used. The call to vQueueAddToRegistry() will be + removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + defined or is defined to be less than 1. */ + vQueueAddToRegistry((QueueHandle_t)xParameters[0].xSemaphore, + "Counting_Sem_1"); + vQueueAddToRegistry((QueueHandle_t)xParameters[1].xSemaphore, + "Counting_Sem_2"); + + /* Create the demo tasks, passing in the semaphore to use as the parameter. */ + xTaskCreate(prvCountingSemaphoreTask, "CNT1", + configMINIMAL_STACK_SIZE, (void *)&(xParameters[0]), + tskIDLE_PRIORITY, NULL); + xTaskCreate(prvCountingSemaphoreTask, "CNT2", + configMINIMAL_STACK_SIZE, (void *)&(xParameters[1]), + tskIDLE_PRIORITY, NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvDecrementSemaphoreCount(SemaphoreHandle_t xSemaphore, + volatile UBaseType_t *puxLoopCounter) +{ + UBaseType_t ux; + + /* If the semaphore count is at its maximum then we should not be able to + 'give' the semaphore. */ + if (xSemaphoreGive(xSemaphore) == pdPASS) { + xErrorDetected = pdTRUE; + } + + /* We should be able to 'take' the semaphore countMAX_COUNT_VALUE times. */ + for (ux = 0; ux < countMAX_COUNT_VALUE; ux++) { + configASSERT(uxSemaphoreGetCount(xSemaphore) == + (countMAX_COUNT_VALUE - ux)); + + if (xSemaphoreTake(xSemaphore, countDONT_BLOCK) != pdPASS) { + /* We expected to be able to take the semaphore. */ + xErrorDetected = pdTRUE; + } + + (*puxLoopCounter)++; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* If the semaphore count is zero then we should not be able to 'take' + the semaphore. */ + configASSERT(uxSemaphoreGetCount(xSemaphore) == 0); + if (xSemaphoreTake(xSemaphore, countDONT_BLOCK) == pdPASS) { + xErrorDetected = pdTRUE; + } +} +/*-----------------------------------------------------------*/ + +static void prvIncrementSemaphoreCount(SemaphoreHandle_t xSemaphore, + volatile UBaseType_t *puxLoopCounter) +{ + UBaseType_t ux; + + /* If the semaphore count is zero then we should not be able to 'take' + the semaphore. */ + if (xSemaphoreTake(xSemaphore, countDONT_BLOCK) == pdPASS) { + xErrorDetected = pdTRUE; + } + + /* We should be able to 'give' the semaphore countMAX_COUNT_VALUE times. */ + for (ux = 0; ux < countMAX_COUNT_VALUE; ux++) { + configASSERT(uxSemaphoreGetCount(xSemaphore) == ux); + + if (xSemaphoreGive(xSemaphore) != pdPASS) { + /* We expected to be able to take the semaphore. */ + xErrorDetected = pdTRUE; + } + + (*puxLoopCounter)++; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* If the semaphore count is at its maximum then we should not be able to + 'give' the semaphore. */ + if (xSemaphoreGive(xSemaphore) == pdPASS) { + xErrorDetected = pdTRUE; + } +} +/*-----------------------------------------------------------*/ + +static void prvCountingSemaphoreTask(void *pvParameters) +{ + xCountSemStruct *pxParameter; + +#ifdef USE_STDIO + void vPrintDisplayMessage(const char *const *ppcMessageToSend); + + const char *const pcTaskStartMsg = + "Counting semaphore demo started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage(&pcTaskStartMsg); +#endif + + /* The semaphore to be used was passed as the parameter. */ + pxParameter = (xCountSemStruct *)pvParameters; + + /* Did we expect to find the semaphore already at its max count value, or + at zero? */ + if (pxParameter->uxExpectedStartCount == countSTART_AT_MAX_COUNT) { + prvDecrementSemaphoreCount(pxParameter->xSemaphore, + &(pxParameter->uxLoopCounter)); + } + + /* Now we expect the semaphore count to be 0, so this time there is an + error if we can take the semaphore. */ + if (xSemaphoreTake(pxParameter->xSemaphore, 0) == pdPASS) { + xErrorDetected = pdTRUE; + } + + for (;;) { + prvIncrementSemaphoreCount(pxParameter->xSemaphore, + &(pxParameter->uxLoopCounter)); + prvDecrementSemaphoreCount(pxParameter->xSemaphore, + &(pxParameter->uxLoopCounter)); + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreCountingSemaphoreTasksStillRunning(void) +{ + static UBaseType_t uxLastCount0 = 0, uxLastCount1 = 0; + BaseType_t xReturn = pdPASS; + + /* Return fail if any 'give' or 'take' did not result in the expected + behaviour. */ + if (xErrorDetected != pdFALSE) { + xReturn = pdFAIL; + } + + /* Return fail if either task is not still incrementing its loop counter. */ + if (uxLastCount0 == xParameters[0].uxLoopCounter) { + xReturn = pdFAIL; + } else { + uxLastCount0 = xParameters[0].uxLoopCounter; + } + + if (uxLastCount1 == xParameters[1].uxLoopCounter) { + xReturn = pdFAIL; + } else { + uxLastCount1 = xParameters[1].uxLoopCounter; + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/crflash.c b/freertos/cvitek/task/demo/Common/Minimal/crflash.c new file mode 100644 index 000000000..7814bcb2d --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/crflash.c @@ -0,0 +1,202 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This demo application file demonstrates the use of queues to pass data + * between co-routines. + * + * N represents the number of 'fixed delay' co-routines that are created and + * is set during initialisation. + * + * N 'fixed delay' co-routines are created that just block for a fixed + * period then post the number of an LED onto a queue. Each such co-routine + * uses a different block period. A single 'flash' co-routine is also created + * that blocks on the same queue, waiting for the number of the next LED it + * should flash. Upon receiving a number it simply toggle the instructed LED + * then blocks on the queue once more. In this manner each LED from LED 0 to + * LED N-1 is caused to flash at a different rate. + * + * The 'fixed delay' co-routines are created with co-routine priority 0. The + * flash co-routine is created with co-routine priority 1. This means that + * the queue should never contain more than a single item. This is because + * posting to the queue will unblock the 'flash' co-routine, and as this has + * a priority greater than the tasks posting to the queue it is guaranteed to + * have emptied the queue and blocked once again before the queue can contain + * any more date. An error is indicated if an attempt to post data to the + * queue fails - indicating that the queue is already full. + * + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "croutine.h" +#include "queue.h" + +/* Demo application includes. */ +#include "partest.h" +#include "crflash.h" + +/* The queue should only need to be of length 1. See the description at the +top of the file. */ +#define crfQUEUE_LENGTH 1 + +#define crfFIXED_DELAY_PRIORITY 0 +#define crfFLASH_PRIORITY 1 + +/* Only one flash co-routine is created so the index is not significant. */ +#define crfFLASH_INDEX 0 + +/* Don't allow more than crfMAX_FLASH_TASKS 'fixed delay' co-routines to be +created. */ +#define crfMAX_FLASH_TASKS 8 + +/* We don't want to block when posting to the queue. */ +#define crfPOSTING_BLOCK_TIME 0 + +/* + * The 'fixed delay' co-routine as described at the top of the file. + */ +static void prvFixedDelayCoRoutine(CoRoutineHandle_t xHandle, + UBaseType_t uxIndex); + +/* + * The 'flash' co-routine as described at the top of the file. + */ +static void prvFlashCoRoutine(CoRoutineHandle_t xHandle, UBaseType_t uxIndex); + +/* The queue used to pass data between the 'fixed delay' co-routines and the +'flash' co-routine. */ +static QueueHandle_t xFlashQueue; + +/* This will be set to pdFALSE if we detect an error. */ +static BaseType_t xCoRoutineFlashStatus = pdPASS; + +/*-----------------------------------------------------------*/ + +/* + * See the header file for details. + */ +void vStartFlashCoRoutines(UBaseType_t uxNumberToCreate) +{ + UBaseType_t uxIndex; + + if (uxNumberToCreate > crfMAX_FLASH_TASKS) { + uxNumberToCreate = crfMAX_FLASH_TASKS; + } + + /* Create the queue used to pass data between the co-routines. */ + xFlashQueue = xQueueCreate(crfQUEUE_LENGTH, sizeof(UBaseType_t)); + + if (xFlashQueue) { + /* Create uxNumberToCreate 'fixed delay' co-routines. */ + for (uxIndex = 0; uxIndex < uxNumberToCreate; uxIndex++) { + xCoRoutineCreate(prvFixedDelayCoRoutine, + crfFIXED_DELAY_PRIORITY, uxIndex); + } + + /* Create the 'flash' co-routine. */ + xCoRoutineCreate(prvFlashCoRoutine, crfFLASH_PRIORITY, + crfFLASH_INDEX); + } +} +/*-----------------------------------------------------------*/ + +static void prvFixedDelayCoRoutine(CoRoutineHandle_t xHandle, + UBaseType_t uxIndex) +{ + /* Even though this is a co-routine the xResult variable does not need to be +static as we do not need it to maintain its state between blocks. */ + BaseType_t xResult; + /* The uxIndex parameter of the co-routine function is used as an index into +the xFlashRates array to obtain the delay period to use. */ + static const TickType_t xFlashRates[crfMAX_FLASH_TASKS] = { + 150 / portTICK_PERIOD_MS, 200 / portTICK_PERIOD_MS, + 250 / portTICK_PERIOD_MS, 300 / portTICK_PERIOD_MS, + 350 / portTICK_PERIOD_MS, 400 / portTICK_PERIOD_MS, + 450 / portTICK_PERIOD_MS, 500 / portTICK_PERIOD_MS + }; + + /* Co-routines MUST start with a call to crSTART. */ + crSTART(xHandle); + + for (;;) { + /* Post our uxIndex value onto the queue. This is used as the LED to + flash. */ + crQUEUE_SEND(xHandle, xFlashQueue, (void *)&uxIndex, + crfPOSTING_BLOCK_TIME, &xResult); + + if (xResult != pdPASS) { + /* For the reasons stated at the top of the file we should always + find that we can post to the queue. If we could not then an error + has occurred. */ + xCoRoutineFlashStatus = pdFAIL; + } + + crDELAY(xHandle, xFlashRates[uxIndex]); + } + + /* Co-routines MUST end with a call to crEND. */ + crEND(); +} +/*-----------------------------------------------------------*/ + +static void prvFlashCoRoutine(CoRoutineHandle_t xHandle, UBaseType_t uxIndex) +{ + /* Even though this is a co-routine the variable do not need to be +static as we do not need it to maintain their state between blocks. */ + BaseType_t xResult; + UBaseType_t uxLEDToFlash; + + /* Co-routines MUST start with a call to crSTART. */ + crSTART(xHandle); + (void)uxIndex; + + for (;;) { + /* Block to wait for the number of the LED to flash. */ + crQUEUE_RECEIVE(xHandle, xFlashQueue, &uxLEDToFlash, + portMAX_DELAY, &xResult); + + if (xResult != pdPASS) { + /* We would not expect to wake unless we received something. */ + xCoRoutineFlashStatus = pdFAIL; + } else { + /* We received the number of an LED to flash - flash it! */ + vParTestToggleLED(uxLEDToFlash); + } + } + + /* Co-routines MUST end with a call to crEND. */ + crEND(); +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreFlashCoRoutinesStillRunning(void) +{ + /* Return pdPASS or pdFAIL depending on whether an error has been detected + or not. */ + return xCoRoutineFlashStatus; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/crhook.c b/freertos/cvitek/task/demo/Common/Minimal/crhook.c new file mode 100644 index 000000000..b38440f1c --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/crhook.c @@ -0,0 +1,224 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This demo file demonstrates how to send data between an ISR and a + * co-routine. A tick hook function is used to periodically pass data between + * the RTOS tick and a set of 'hook' co-routines. + * + * hookNUM_HOOK_CO_ROUTINES co-routines are created. Each co-routine blocks + * to wait for a character to be received on a queue from the tick ISR, checks + * to ensure the character received was that expected, then sends the number + * back to the tick ISR on a different queue. + * + * The tick ISR checks the numbers received back from the 'hook' co-routines + * matches the number previously sent. + * + * If at any time a queue function returns unexpectedly, or an incorrect value + * is received either by the tick hook or a co-routine then an error is + * latched. + * + * This demo relies on each 'hook' co-routine to execute between each + * hookTICK_CALLS_BEFORE_POST tick interrupts. This and the heavy use of + * queues from within an interrupt may result in an error being detected on + * slower targets simply due to timing. + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "croutine.h" +#include "queue.h" + +/* Demo application includes. */ +#include "crhook.h" + +/* The number of 'hook' co-routines that are to be created. */ +#define hookNUM_HOOK_CO_ROUTINES (4) + +/* The number of times the tick hook should be called before a character is +posted to the 'hook' co-routines. */ +#define hookTICK_CALLS_BEFORE_POST (500) + +/* There should never be more than one item in any queue at any time. */ +#define hookHOOK_QUEUE_LENGTH (1) + +/* Don't block when initially posting to the queue. */ +#define hookNO_BLOCK_TIME (0) + +/* The priority relative to other co-routines (rather than tasks) that the +'hook' co-routines should take. */ +#define mainHOOK_CR_PRIORITY (1) +/*-----------------------------------------------------------*/ + +/* + * The co-routine function itself. + */ +static void prvHookCoRoutine(CoRoutineHandle_t xHandle, UBaseType_t uxIndex); + +/* + * The tick hook function. This receives a number from each 'hook' co-routine + * then sends a number to each co-routine. An error is flagged if a send or + * receive fails, or an unexpected number is received. + */ +void vApplicationTickHook(void); + +/*-----------------------------------------------------------*/ + +/* Queues used to send data FROM a co-routine TO the tick hook function. +The hook functions received (Rx's) on these queues. One queue per +'hook' co-routine. */ +static QueueHandle_t xHookRxQueues[hookNUM_HOOK_CO_ROUTINES]; + +/* Queues used to send data FROM the tick hook TO a co-routine function. +The hood function transmits (Tx's) on these queues. One queue per +'hook' co-routine. */ +static QueueHandle_t xHookTxQueues[hookNUM_HOOK_CO_ROUTINES]; + +/* Set to true if an error is detected at any time. */ +static BaseType_t xCoRoutineErrorDetected = pdFALSE; + +/*-----------------------------------------------------------*/ + +void vStartHookCoRoutines(void) +{ + UBaseType_t uxIndex, uxValueToPost = 0; + + for (uxIndex = 0; uxIndex < hookNUM_HOOK_CO_ROUTINES; uxIndex++) { + /* Create a queue to transmit to and receive from each 'hook' + co-routine. */ + xHookRxQueues[uxIndex] = xQueueCreate(hookHOOK_QUEUE_LENGTH, + sizeof(UBaseType_t)); + xHookTxQueues[uxIndex] = xQueueCreate(hookHOOK_QUEUE_LENGTH, + sizeof(UBaseType_t)); + + /* To start things off the tick hook function expects the queue it + uses to receive data to contain a value. */ + xQueueSend(xHookRxQueues[uxIndex], &uxValueToPost, + hookNO_BLOCK_TIME); + + /* Create the 'hook' co-routine itself. */ + xCoRoutineCreate(prvHookCoRoutine, mainHOOK_CR_PRIORITY, + uxIndex); + } +} +/*-----------------------------------------------------------*/ + +static UBaseType_t uxCallCounter = 0, uxNumberToPost = 0; +void vApplicationTickHook(void) +{ + UBaseType_t uxReceivedNumber; + BaseType_t xIndex, xCoRoutineWoken; + + /* Is it time to talk to the 'hook' co-routines again? */ + uxCallCounter++; + if (uxCallCounter >= hookTICK_CALLS_BEFORE_POST) { + uxCallCounter = 0; + + for (xIndex = 0; xIndex < hookNUM_HOOK_CO_ROUTINES; xIndex++) { + xCoRoutineWoken = pdFALSE; + if (crQUEUE_RECEIVE_FROM_ISR( + xHookRxQueues[xIndex], &uxReceivedNumber, + &xCoRoutineWoken) != pdPASS) { + /* There is no reason why we would not expect the queue to + contain a value. */ + xCoRoutineErrorDetected = pdTRUE; + } else { + /* Each queue used to receive data from the 'hook' co-routines + should contain the number we last posted to the same co-routine. */ + if (uxReceivedNumber != uxNumberToPost) { + xCoRoutineErrorDetected = pdTRUE; + } + + /* Nothing should be blocked waiting to post to the queue. */ + if (xCoRoutineWoken != pdFALSE) { + xCoRoutineErrorDetected = pdTRUE; + } + } + } + + /* Start the next cycle by posting the next number onto each Tx queue. */ + uxNumberToPost++; + + for (xIndex = 0; xIndex < hookNUM_HOOK_CO_ROUTINES; xIndex++) { + if (crQUEUE_SEND_FROM_ISR(xHookTxQueues[xIndex], + &uxNumberToPost, + pdFALSE) != pdTRUE) { + /* Posting to the queue should have woken the co-routine that + was blocked on the queue. */ + xCoRoutineErrorDetected = pdTRUE; + } + } + } +} +/*-----------------------------------------------------------*/ + +static void prvHookCoRoutine(CoRoutineHandle_t xHandle, UBaseType_t uxIndex) +{ + static UBaseType_t uxReceivedValue[hookNUM_HOOK_CO_ROUTINES]; + BaseType_t xResult; + + /* Each co-routine MUST start with a call to crSTART(); */ + crSTART(xHandle); + + for (;;) { + /* Wait to receive a value from the tick hook. */ + xResult = pdFAIL; + crQUEUE_RECEIVE(xHandle, xHookTxQueues[uxIndex], + &(uxReceivedValue[uxIndex]), portMAX_DELAY, + &xResult); + + /* There is no reason why we should not have received something on + the queue. */ + if (xResult != pdPASS) { + xCoRoutineErrorDetected = pdTRUE; + } + + /* Send the same number back to the idle hook so it can verify it. */ + xResult = pdFAIL; + crQUEUE_SEND(xHandle, xHookRxQueues[uxIndex], + &(uxReceivedValue[uxIndex]), hookNO_BLOCK_TIME, + &xResult); + if (xResult != pdPASS) { + /* There is no reason why we should not have been able to post to + the queue. */ + xCoRoutineErrorDetected = pdTRUE; + } + } + + /* Each co-routine MUST end with a call to crEND(). */ + crEND(); +} +/*-----------------------------------------------------------*/ + +BaseType_t xAreHookCoRoutinesStillRunning(void) +{ + if (xCoRoutineErrorDetected) { + return pdFALSE; + } else { + return pdTRUE; + } +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/death.c b/freertos/cvitek/task/demo/Common/Minimal/death.c new file mode 100644 index 000000000..e94dce817 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/death.c @@ -0,0 +1,190 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/** + * Create a single persistent task which periodically dynamically creates another + * two tasks. The original task is called the creator task, the two tasks it + * creates are called suicidal tasks. + * + * One of the created suicidal tasks kill one other suicidal task before killing + * itself - leaving just the original task remaining. + * + * The creator task must be spawned after all of the other demo application tasks + * as it keeps a check on the number of tasks under the scheduler control. The + * number of tasks it expects to see running should never be greater than the + * number of tasks that were in existence when the creator task was spawned, plus + * one set of four suicidal tasks. If this number is exceeded an error is flagged. + * + * \page DeathC death.c + * \ingroup DemoFiles + * <HR> + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo program include files. */ +#include "death.h" + +#define deathSTACK_SIZE (configMINIMAL_STACK_SIZE + 60) + +/* The task originally created which is responsible for periodically dynamically +creating another four tasks. */ +static portTASK_FUNCTION_PROTO(vCreateTasks, pvParameters); + +/* The task function of the dynamically created tasks. */ +static portTASK_FUNCTION_PROTO(vSuicidalTask, pvParameters); + +/* A variable which is incremented every time the dynamic tasks are created. This +is used to check that the task is still running. */ +static volatile uint16_t usCreationCount = 0; + +/* Used to store the number of tasks that were originally running so the creator +task can tell if any of the suicidal tasks have failed to die. +*/ +static volatile UBaseType_t uxTasksRunningAtStart = 0; + +/* When a task deletes itself, it stack and TCB are cleaned up by the Idle task. +Under heavy load the idle task might not get much processing time, so it would +be legitimate for several tasks to remain undeleted for a short period. There +may also be a few other unexpected tasks if, for example, the tasks that test +static allocation are also being used. */ +static const UBaseType_t uxMaxNumberOfExtraTasksRunning = 3; + +/* Used to store a handle to the task that should be killed by a suicidal task, +before it kills itself. */ +TaskHandle_t xCreatedTask; + +/*-----------------------------------------------------------*/ + +void vCreateSuicidalTasks(UBaseType_t uxPriority) +{ + xTaskCreate(vCreateTasks, "CREATOR", deathSTACK_SIZE, (void *)NULL, + uxPriority, NULL); +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vSuicidalTask, pvParameters) +{ + volatile long l1, l2; + TaskHandle_t xTaskToKill; + const TickType_t xDelay = pdMS_TO_TICKS((TickType_t)200); + + /* Test deletion of a task's secure context, if any. */ + portALLOCATE_SECURE_CONTEXT(configMINIMAL_SECURE_STACK_SIZE); + + if (pvParameters != NULL) { + /* This task is periodically created four times. Two created tasks are + passed a handle to the other task so it can kill it before killing itself. + The other task is passed in null. */ + xTaskToKill = *(TaskHandle_t *)pvParameters; + } else { + xTaskToKill = NULL; + } + + for (;;) { + /* Do something random just to use some stack and registers. */ + l1 = 2; + l2 = 89; + l2 *= l1; + vTaskDelay(xDelay); + + if (xTaskToKill != NULL) { + /* Make sure the other task has a go before we delete it. */ + vTaskDelay((TickType_t)0); + + /* Kill the other task that was created by vCreateTasks(). */ + vTaskDelete(xTaskToKill); + + /* Kill ourselves. */ + vTaskDelete(NULL); + } + } +} /*lint !e818 !e550 Function prototype must be as per standard for task functions. */ +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCreateTasks, pvParameters) +{ + const TickType_t xDelay = pdMS_TO_TICKS((TickType_t)1000); + UBaseType_t uxPriority; + + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + + /* Delay at the start to ensure tasks created by other demos have been + created before storing the current number of tasks. */ + vTaskDelay(xDelay); + uxTasksRunningAtStart = (UBaseType_t)uxTaskGetNumberOfTasks(); + + uxPriority = uxTaskPriorityGet(NULL); + + for (;;) { + /* Just loop round, delaying then creating the four suicidal tasks. */ + vTaskDelay(xDelay); + + xCreatedTask = NULL; + + xTaskCreate(vSuicidalTask, "SUICID1", configMINIMAL_STACK_SIZE, + NULL, uxPriority, &xCreatedTask); + xTaskCreate(vSuicidalTask, "SUICID2", configMINIMAL_STACK_SIZE, + &xCreatedTask, uxPriority, NULL); + + ++usCreationCount; + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that the creator task is still running and that there +are not any more than four extra tasks. */ +BaseType_t xIsCreateTaskStillRunning(void) +{ + static uint16_t usLastCreationCount = 0xfff; + BaseType_t xReturn = pdTRUE; + static UBaseType_t uxTasksRunningNow; + + if (usLastCreationCount == usCreationCount) { + xReturn = pdFALSE; + } else { + usLastCreationCount = usCreationCount; + } + + uxTasksRunningNow = (UBaseType_t)uxTaskGetNumberOfTasks(); + + if (uxTasksRunningNow < uxTasksRunningAtStart) { + xReturn = pdFALSE; + } else if ((uxTasksRunningNow - uxTasksRunningAtStart) > + uxMaxNumberOfExtraTasksRunning) { + xReturn = pdFALSE; + } else { + /* Everything is okay. */ + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/dynamic.c b/freertos/cvitek/task/demo/Common/Minimal/dynamic.c new file mode 100644 index 000000000..d52fc5c41 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/dynamic.c @@ -0,0 +1,484 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * The first test creates three tasks - two counter tasks (one continuous count + * and one limited count) and one controller. A "count" variable is shared + * between all three tasks. The two counter tasks should never be in a "ready" + * state at the same time. The controller task runs at the same priority as + * the continuous count task, and at a lower priority than the limited count + * task. + * + * One counter task loops indefinitely, incrementing the shared count variable + * on each iteration. To ensure it has exclusive access to the variable it + * raises its priority above that of the controller task before each + * increment, lowering it again to its original priority before starting the + * next iteration. + * + * The other counter task increments the shared count variable on each + * iteration of its loop until the count has reached a limit of 0xff - at + * which point it suspends itself. It will not start a new loop until the + * controller task has made it "ready" again by calling vTaskResume(). + * This second counter task operates at a higher priority than controller + * task so does not need to worry about mutual exclusion of the counter + * variable. + * + * The controller task is in two sections. The first section controls and + * monitors the continuous count task. When this section is operational the + * limited count task is suspended. Likewise, the second section controls + * and monitors the limited count task. When this section is operational the + * continuous count task is suspended. + * + * In the first section the controller task first takes a copy of the shared + * count variable. To ensure mutual exclusion on the count variable it + * suspends the continuous count task, resuming it again when the copy has been + * taken. The controller task then sleeps for a fixed period - during which + * the continuous count task will execute and increment the shared variable. + * When the controller task wakes it checks that the continuous count task + * has executed by comparing the copy of the shared variable with its current + * value. This time, to ensure mutual exclusion, the scheduler itself is + * suspended with a call to vTaskSuspendAll (). This is for demonstration + * purposes only and is not a recommended technique due to its inefficiency. + * + * After a fixed number of iterations the controller task suspends the + * continuous count task, and moves on to its second section. + * + * At the start of the second section the shared variable is cleared to zero. + * The limited count task is then woken from its suspension by a call to + * vTaskResume (). As this counter task operates at a higher priority than + * the controller task the controller task should not run again until the + * shared variable has been counted up to the limited value causing the counter + * task to suspend itself. The next line after vTaskResume () is therefore + * a check on the shared variable to ensure everything is as expected. + * + * + * The second test consists of a couple of very simple tasks that post onto a + * queue while the scheduler is suspended. This test was added to test parts + * of the scheduler not exercised by the first test. + * + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* Demo app include files. */ +#include "dynamic.h" + +/* Function that implements the "limited count" task as described above. */ +static portTASK_FUNCTION_PROTO(vLimitedIncrementTask, pvParameters); + +/* Function that implements the "continuous count" task as described above. */ +static portTASK_FUNCTION_PROTO(vContinuousIncrementTask, pvParameters); + +/* Function that implements the controller task as described above. */ +static portTASK_FUNCTION_PROTO(vCounterControlTask, pvParameters); + +static portTASK_FUNCTION_PROTO(vQueueReceiveWhenSuspendedTask, pvParameters); +static portTASK_FUNCTION_PROTO(vQueueSendWhenSuspendedTask, pvParameters); + +/* Demo task specific constants. */ +#ifndef priSUSPENDED_RX_TASK_STACK_SIZE +#define priSUSPENDED_RX_TASK_STACK_SIZE (configMINIMAL_STACK_SIZE) +#endif +#define priSTACK_SIZE (configMINIMAL_STACK_SIZE) +#define priSLEEP_TIME pdMS_TO_TICKS(128) +#define priLOOPS (5) +#define priMAX_COUNT ((uint32_t)0xff) +#define priNO_BLOCK ((TickType_t)0) +#define priSUSPENDED_QUEUE_LENGTH (1) + +/*-----------------------------------------------------------*/ + +/* Handles to the two counter tasks. These could be passed in as parameters +to the controller task to prevent them having to be file scope. */ +static TaskHandle_t xContinuousIncrementHandle, xLimitedIncrementHandle; + +/* The shared counter variable. This is passed in as a parameter to the two +counter variables for demonstration purposes. */ +static uint32_t ulCounter; + +/* Variables used to check that the tasks are still operating without error. +Each complete iteration of the controller task increments this variable +provided no errors have been found. The variable maintaining the same value +is therefore indication of an error. */ +static volatile uint16_t usCheckVariable = (uint16_t)0; +static volatile BaseType_t xSuspendedQueueSendError = pdFALSE; +static volatile BaseType_t xSuspendedQueueReceiveError = pdFALSE; + +/* Queue used by the second test. */ +QueueHandle_t xSuspendedTestQueue; + +/* The value the queue receive task expects to receive next. This is file +scope so xAreDynamicPriorityTasksStillRunning() can ensure it is still +incrementing. */ +static uint32_t ulExpectedValue = (uint32_t)0; + +/*-----------------------------------------------------------*/ +/* + * Start the three tasks as described at the top of the file. + * Note that the limited count task is given a higher priority. + */ +void vStartDynamicPriorityTasks(void) +{ + xSuspendedTestQueue = + xQueueCreate(priSUSPENDED_QUEUE_LENGTH, sizeof(uint32_t)); + + if (xSuspendedTestQueue != NULL) { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + in use. The queue registry is provided as a means for kernel aware + debuggers to locate queues and has no purpose if a kernel aware debugger + is not being used. The call to vQueueAddToRegistry() will be removed + by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + defined to be less than 1. */ + vQueueAddToRegistry(xSuspendedTestQueue, + "Suspended_Test_Queue"); + + xTaskCreate(vContinuousIncrementTask, "CNT_INC", priSTACK_SIZE, + (void *)&ulCounter, tskIDLE_PRIORITY, + &xContinuousIncrementHandle); + xTaskCreate(vLimitedIncrementTask, "LIM_INC", priSTACK_SIZE, + (void *)&ulCounter, tskIDLE_PRIORITY + 1, + &xLimitedIncrementHandle); + xTaskCreate(vCounterControlTask, "C_CTRL", + priSUSPENDED_RX_TASK_STACK_SIZE, NULL, + tskIDLE_PRIORITY, NULL); + xTaskCreate(vQueueSendWhenSuspendedTask, "SUSP_TX", + priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL); + xTaskCreate(vQueueReceiveWhenSuspendedTask, "SUSP_RX", + priSUSPENDED_RX_TASK_STACK_SIZE, NULL, + tskIDLE_PRIORITY, NULL); + } +} +/*-----------------------------------------------------------*/ + +/* + * Just loops around incrementing the shared variable until the limit has been + * reached. Once the limit has been reached it suspends itself. + */ +static portTASK_FUNCTION(vLimitedIncrementTask, pvParameters) +{ + volatile uint32_t *pulCounter; + + /* Take a pointer to the shared variable from the parameters passed into + the task. */ + pulCounter = (volatile uint32_t *)pvParameters; + + /* This will run before the control task, so the first thing it does is + suspend - the control task will resume it when ready. */ + vTaskSuspend(NULL); + + for (;;) { + /* Just count up to a value then suspend. */ + (*pulCounter)++; + + if (*pulCounter >= priMAX_COUNT) { + vTaskSuspend(NULL); + } + } +} +/*-----------------------------------------------------------*/ + +/* + * Just keep counting the shared variable up. The control task will suspend + * this task when it wants. + */ +static portTASK_FUNCTION(vContinuousIncrementTask, pvParameters) +{ + volatile uint32_t *pulCounter; + UBaseType_t uxOurPriority; + + /* Take a pointer to the shared variable from the parameters passed into + the task. */ + pulCounter = (volatile uint32_t *)pvParameters; + + /* Query our priority so we can raise it when exclusive access to the + shared variable is required. */ + uxOurPriority = uxTaskPriorityGet(NULL); + + for (;;) { + /* Raise the priority above the controller task to ensure a context + switch does not occur while the variable is being accessed. */ + vTaskPrioritySet(NULL, uxOurPriority + 1); + { + configASSERT((uxTaskPriorityGet(NULL) == + (uxOurPriority + 1))); + (*pulCounter)++; + } + vTaskPrioritySet(NULL, uxOurPriority); + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + + configASSERT((uxTaskPriorityGet(NULL) == uxOurPriority)); + } +} +/*-----------------------------------------------------------*/ + +/* + * Controller task as described above. + */ +static portTASK_FUNCTION(vCounterControlTask, pvParameters) +{ + uint32_t ulLastCounter; + short sLoops; + short sError = pdFALSE; + + /* Just to stop warning messages. */ + (void)pvParameters; + + for (;;) { + /* Start with the counter at zero. */ + ulCounter = (uint32_t)0; + + /* First section : */ + + /* Check the continuous count task is running. */ + for (sLoops = 0; sLoops < priLOOPS; sLoops++) { + /* Suspend the continuous count task so we can take a mirror of the + shared variable without risk of corruption. This is not really + needed as the other task raises its priority above this task's + priority. */ + vTaskSuspend(xContinuousIncrementHandle); + { +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT( + eTaskGetState( + xContinuousIncrementHandle) == + eSuspended); + } +#endif /* INCLUDE_eTaskGetState */ + + ulLastCounter = ulCounter; + } + vTaskResume(xContinuousIncrementHandle); + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT( + eTaskGetState( + xContinuousIncrementHandle) == + eReady); + } +#endif /* INCLUDE_eTaskGetState */ + + /* Now delay to ensure the other task has processor time. */ + vTaskDelay(priSLEEP_TIME); + + /* Check the shared variable again. This time to ensure mutual + exclusion the whole scheduler will be locked. This is just for + demo purposes! */ + vTaskSuspendAll(); + { + if (ulLastCounter == ulCounter) { + /* The shared variable has not changed. There is a problem + with the continuous count task so flag an error. */ + sError = pdTRUE; + } + } + xTaskResumeAll(); + } + + /* Second section: */ + + /* Suspend the continuous counter task so it stops accessing the shared + variable. */ + vTaskSuspend(xContinuousIncrementHandle); + + /* Reset the variable. */ + ulCounter = (uint32_t)0; + +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xLimitedIncrementHandle) == + eSuspended); + } +#endif /* INCLUDE_eTaskGetState */ + + /* Resume the limited count task which has a higher priority than us. + We should therefore not return from this call until the limited count + task has suspended itself with a known value in the counter variable. */ + vTaskResume(xLimitedIncrementHandle); + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + +/* This task should not run again until xLimitedIncrementHandle has + suspended itself. */ +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT(eTaskGetState(xLimitedIncrementHandle) == + eSuspended); + } +#endif /* INCLUDE_eTaskGetState */ + + /* Does the counter variable have the expected value? */ + if (ulCounter != priMAX_COUNT) { + sError = pdTRUE; + } + + if (sError == pdFALSE) { + /* If no errors have occurred then increment the check variable. */ + portENTER_CRITICAL(); + usCheckVariable++; + portEXIT_CRITICAL(); + } + + /* Resume the continuous count task and do it all again. */ + vTaskResume(xContinuousIncrementHandle); + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vQueueSendWhenSuspendedTask, pvParameters) +{ + static uint32_t ulValueToSend = (uint32_t)0; + + /* Just to stop warning messages. */ + (void)pvParameters; + + for (;;) { + vTaskSuspendAll(); + { + /* We must not block while the scheduler is suspended! */ + if (xQueueSend(xSuspendedTestQueue, + (void *)&ulValueToSend, + priNO_BLOCK) != pdTRUE) { + xSuspendedQueueSendError = pdTRUE; + } + } + xTaskResumeAll(); + + vTaskDelay(priSLEEP_TIME); + + ++ulValueToSend; + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vQueueReceiveWhenSuspendedTask, pvParameters) +{ + uint32_t ulReceivedValue; + BaseType_t xGotValue; + + /* Just to stop warning messages. */ + (void)pvParameters; + + for (;;) { + do { + /* Suspending the scheduler here is fairly pointless and + undesirable for a normal application. It is done here purely + to test the scheduler. The inner xTaskResumeAll() should + never return pdTRUE as the scheduler is still locked by the + outer call. */ + vTaskSuspendAll(); + { + vTaskSuspendAll(); + { + xGotValue = xQueueReceive( + xSuspendedTestQueue, + (void *)&ulReceivedValue, + priNO_BLOCK); + } + if (xTaskResumeAll() != pdFALSE) { + xSuspendedQueueReceiveError = pdTRUE; + } + } + xTaskResumeAll(); + +#if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } +#endif + + } while (xGotValue == pdFALSE); + + if (ulReceivedValue != ulExpectedValue) { + xSuspendedQueueReceiveError = pdTRUE; + } + + if (xSuspendedQueueReceiveError != pdTRUE) { + /* Only increment the variable if an error has not occurred. This + allows xAreDynamicPriorityTasksStillRunning() to check for stalled + tasks as well as explicit errors. */ + ++ulExpectedValue; + } + } +} +/*-----------------------------------------------------------*/ + +/* Called to check that all the created tasks are still running without error. */ +BaseType_t xAreDynamicPriorityTasksStillRunning(void) +{ + /* Keep a history of the check variables so we know if it has been incremented +since the last call. */ + static uint16_t usLastTaskCheck = (uint16_t)0; + static uint32_t ulLastExpectedValue = (uint32_t)0U; + BaseType_t xReturn = pdTRUE; + + /* Check the tasks are still running by ensuring the check variable + is still incrementing. */ + + if (usCheckVariable == usLastTaskCheck) { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + if (ulExpectedValue == ulLastExpectedValue) { + /* The value being received by the queue receive task has not + incremented so an error exists. */ + xReturn = pdFALSE; + } + + if (xSuspendedQueueSendError == pdTRUE) { + xReturn = pdFALSE; + } + + if (xSuspendedQueueReceiveError == pdTRUE) { + xReturn = pdFALSE; + } + + usLastTaskCheck = usCheckVariable; + ulLastExpectedValue = ulExpectedValue; + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/flash.c b/freertos/cvitek/task/demo/Common/Minimal/flash.c new file mode 100644 index 000000000..36856df92 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/flash.c @@ -0,0 +1,117 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/** + * This version of flash .c is for use on systems that have limited stack space + * and no display facilities. The complete version can be found in the + * Demo/Common/Full directory. + * + * Three tasks are created, each of which flash an LED at a different rate. The first + * LED flashes every 200ms, the second every 400ms, the third every 600ms. + * + * The LED flash tasks provide instant visual feedback. They show that the scheduler + * is still operational. + * + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo program include files. */ +#include "partest.h" +#include "flash.h" + +#define ledSTACK_SIZE configMINIMAL_STACK_SIZE +#define ledNUMBER_OF_LEDS (3) +#define ledFLASH_RATE_BASE ((TickType_t)333) + +/* Variable used by the created tasks to calculate the LED number to use, and +the rate at which they should flash the LED. */ +static volatile UBaseType_t uxFlashTaskNumber = 0; + +/* The task that is created three times. */ +static portTASK_FUNCTION_PROTO(vLEDFlashTask, pvParameters); + +/*-----------------------------------------------------------*/ + +void vStartLEDFlashTasks(UBaseType_t uxPriority) +{ + BaseType_t xLEDTask; + + /* Create the three tasks. */ + for (xLEDTask = 0; xLEDTask < ledNUMBER_OF_LEDS; ++xLEDTask) { + /* Spawn the task. */ + xTaskCreate(vLEDFlashTask, "LEDx", ledSTACK_SIZE, NULL, + uxPriority, (TaskHandle_t *)NULL); + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vLEDFlashTask, pvParameters) +{ + TickType_t xFlashRate, xLastFlashTime; + UBaseType_t uxLED; + + /* The parameters are not used. */ + (void)pvParameters; + + /* Calculate the LED and flash rate. */ + portENTER_CRITICAL(); + { + /* See which of the eight LED's we should use. */ + uxLED = uxFlashTaskNumber; + + /* Update so the next task uses the next LED. */ + uxFlashTaskNumber++; + } + portEXIT_CRITICAL(); + + xFlashRate = + ledFLASH_RATE_BASE + (ledFLASH_RATE_BASE * (TickType_t)uxLED); + xFlashRate /= portTICK_PERIOD_MS; + + /* We will turn the LED on and off again in the delay period, so each + delay is only half the total period. */ + xFlashRate /= (TickType_t)2; + + /* We need to initialise xLastFlashTime prior to the first call to + vTaskDelayUntil(). */ + xLastFlashTime = xTaskGetTickCount(); + + for (;;) { + /* Delay for half the flash period then turn the LED on. */ + vTaskDelayUntil(&xLastFlashTime, xFlashRate); + vParTestToggleLED(uxLED); + + /* Delay for half the flash period then turn the LED off. */ + vTaskDelayUntil(&xLastFlashTime, xFlashRate); + vParTestToggleLED(uxLED); + } +} /*lint !e715 !e818 !e830 Function definition must be standard for task creation. */ diff --git a/freertos/cvitek/task/demo/Common/Minimal/flash_timer.c b/freertos/cvitek/task/demo/Common/Minimal/flash_timer.c new file mode 100644 index 000000000..e9731d70b --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/flash_timer.c @@ -0,0 +1,97 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/** + * Repeatedly toggles one or more LEDs using software timers - one timer per + * LED. + */ + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "timers.h" + +/* Demo program include files. */ +#include "partest.h" +#include "flash_timer.h" + +/* The toggle rates are all a multple of ledFLASH_RATE_BASE. */ +#define ledFLASH_RATE_BASE (((TickType_t)333) / portTICK_PERIOD_MS) + +/* A block time of zero simple means "don't block". */ +#define ledDONT_BLOCK ((TickType_t)0) + +/*-----------------------------------------------------------*/ + +/* + * The callback function used by each LED flashing timer. All the timers use + * this function, and the timer ID is used within the function to determine + * which timer has actually expired. + */ +static void prvLEDTimerCallback(TimerHandle_t xTimer); + +/*-----------------------------------------------------------*/ + +void vStartLEDFlashTimers(UBaseType_t uxNumberOfLEDs) +{ + UBaseType_t uxLEDTimer; + TimerHandle_t xTimer; + + /* Create and start the requested number of timers. */ + for (uxLEDTimer = 0; uxLEDTimer < uxNumberOfLEDs; ++uxLEDTimer) { + /* Create the timer. */ + xTimer = xTimerCreate( + "Flasher", /* A text name, purely to help debugging. */ + ledFLASH_RATE_BASE * + (uxLEDTimer + + 1), /* The timer period, which is a multiple of ledFLASH_RATE_BASE. */ + pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */ + (void *)uxLEDTimer, /* The ID is used to identify the timer within the timer callback function, as each timer uses the same callback. */ + prvLEDTimerCallback /* Each timer uses the same callback. */ + ); + + /* If the timer was created successfully, attempt to start it. If the + scheduler has not yet been started then the timer command queue must + be long enough to hold each command sent to it until such time that the + scheduler is started. The timer command queue length is set by + configTIMER_QUEUE_LENGTH in FreeRTOSConfig.h. */ + if (xTimer != NULL) { + xTimerStart(xTimer, ledDONT_BLOCK); + } + } +} +/*-----------------------------------------------------------*/ + +static void prvLEDTimerCallback(TimerHandle_t xTimer) +{ + BaseType_t xTimerID; + + /* The timer ID is used to identify the timer that has actually expired as + each timer uses the same callback. The ID is then also used as the number + of the LED that is to be toggled. */ + xTimerID = (BaseType_t)pvTimerGetTimerID(xTimer); + vParTestToggleLED(xTimerID); +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/flop.c b/freertos/cvitek/task/demo/Common/Minimal/flop.c new file mode 100644 index 000000000..75295c5a5 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/flop.c @@ -0,0 +1,328 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Creates eight tasks, each of which loops continuously performing a floating + * point calculation. + * + * All the tasks run at the idle priority and never block or yield. This causes + * all eight tasks to time slice with the idle task. Running at the idle + * priority means that these tasks will get pre-empted any time another task is + * ready to run or a time slice occurs. More often than not the pre-emption + * will occur mid calculation, creating a good test of the schedulers context + * switch mechanism - a calculation producing an unexpected result could be a + * symptom of a corruption in the context of a task. + */ + +/* Standard includes. */ +#include <stdlib.h> +#include <math.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo program include files. */ +#include "flop.h" + +#ifndef mathSTACK_SIZE +#define mathSTACK_SIZE configMINIMAL_STACK_SIZE +#endif + +#define mathNUMBER_OF_TASKS (4) + +/* Four tasks, each of which performs a different floating point calculation. +Each of the four is created twice. */ +static portTASK_FUNCTION_PROTO(vCompetingMathTask1, pvParameters); +static portTASK_FUNCTION_PROTO(vCompetingMathTask2, pvParameters); +static portTASK_FUNCTION_PROTO(vCompetingMathTask3, pvParameters); +static portTASK_FUNCTION_PROTO(vCompetingMathTask4, pvParameters); + +/* These variables are used to check that all the tasks are still running. If a +task gets a calculation wrong it will stop setting its check variable. */ +static uint16_t usTaskCheck[mathNUMBER_OF_TASKS] = { (uint16_t)0 }; + +/*-----------------------------------------------------------*/ + +void vStartMathTasks(UBaseType_t uxPriority) +{ + xTaskCreate(vCompetingMathTask1, "Math1", mathSTACK_SIZE, + (void *)&(usTaskCheck[0]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask2, "Math2", mathSTACK_SIZE, + (void *)&(usTaskCheck[1]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask3, "Math3", mathSTACK_SIZE, + (void *)&(usTaskCheck[2]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask4, "Math4", mathSTACK_SIZE, + (void *)&(usTaskCheck[3]), uxPriority, NULL); +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask1, pvParameters) +{ + volatile portDOUBLE d1, d2, d3, d4; + volatile uint16_t *pusTaskCheckVariable; + volatile portDOUBLE dAnswer; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + tell the kernel that they require a floating point context before any + floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + d1 = 123.4567; + d2 = 2345.6789; + d3 = -918.222; + + dAnswer = (d1 + d2) * d3; + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (volatile uint16_t *)pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for (;;) { + d1 = 123.4567; + d2 = 2345.6789; + d3 = -918.222; + + d4 = (d1 + d2) * d3; + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* If the calculation does not match the expected constant, stop the + increment of the check variable. */ + if (fabs(d4 - dAnswer) > 0.001) { + sError = pdTRUE; + } + + if (sError == pdFALSE) { + /* If the calculation has always been correct then set set the check + variable. The check variable will get set to pdFALSE each time + xAreMathsTaskStillRunning() is executed. */ + (*pusTaskCheckVariable) = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask2, pvParameters) +{ + volatile portDOUBLE d1, d2, d3, d4; + volatile uint16_t *pusTaskCheckVariable; + volatile portDOUBLE dAnswer; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + tell the kernel that they require a floating point context before any + floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + d1 = -389.38; + d2 = 32498.2; + d3 = -2.0001; + + dAnswer = (d1 / d2) * d3; + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (volatile uint16_t *)pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for (;;) { + d1 = -389.38; + d2 = 32498.2; + d3 = -2.0001; + + d4 = (d1 / d2) * d3; + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* If the calculation does not match the expected constant, stop the + increment of the check variable. */ + if (fabs(d4 - dAnswer) > 0.001) { + sError = pdTRUE; + } + + if (sError == pdFALSE) { + /* If the calculation has always been correct then set set the check + variable. The check variable will get set to pdFALSE each time + xAreMathsTaskStillRunning() is executed. */ + (*pusTaskCheckVariable) = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask3, pvParameters) +{ + volatile portDOUBLE *pdArray, dTotal1, dTotal2, dDifference; + volatile uint16_t *pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + tell the kernel that they require a floating point context before any + floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (volatile uint16_t *)pvParameters; + + pdArray = (portDOUBLE *)pvPortMalloc(xArraySize * sizeof(portDOUBLE)); + + /* Keep filling an array, keeping a running total of the values placed in the + array. Then run through the array adding up all the values. If the two totals + do not match, stop the check variable from incrementing. */ + for (;;) { + dTotal1 = 0.0; + dTotal2 = 0.0; + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + pdArray[xPosition] = (portDOUBLE)xPosition + 5.5; + dTotal1 += (portDOUBLE)xPosition + 5.5; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + dTotal2 += pdArray[xPosition]; + } + + dDifference = dTotal1 - dTotal2; + if (fabs(dDifference) > 0.001) { + sError = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + if (sError == pdFALSE) { + /* If the calculation has always been correct then set set the check + variable. The check variable will get set to pdFALSE each time + xAreMathsTaskStillRunning() is executed. */ + (*pusTaskCheckVariable) = pdTRUE; + } + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask4, pvParameters) +{ + volatile portDOUBLE *pdArray, dTotal1, dTotal2, dDifference; + volatile uint16_t *pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + tell the kernel that they require a floating point context before any + floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (volatile uint16_t *)pvParameters; + + pdArray = (portDOUBLE *)pvPortMalloc(xArraySize * sizeof(portDOUBLE)); + + /* Keep filling an array, keeping a running total of the values placed in the + array. Then run through the array adding up all the values. If the two totals + do not match, stop the check variable from incrementing. */ + for (;;) { + dTotal1 = 0.0; + dTotal2 = 0.0; + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + pdArray[xPosition] = (portDOUBLE)xPosition * 12.123; + dTotal1 += (portDOUBLE)xPosition * 12.123; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + dTotal2 += pdArray[xPosition]; + } + + dDifference = dTotal1 - dTotal2; + if (fabs(dDifference) > 0.001) { + sError = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + if (sError == pdFALSE) { + /* If the calculation has always been correct then set set the check + variable. The check variable will get set to pdFALSE each time + xAreMathsTaskStillRunning() is executed. */ + (*pusTaskCheckVariable) = pdTRUE; + } + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreMathsTaskStillRunning(void) +{ + BaseType_t xReturn = pdPASS, xTask; + + /* Check the maths tasks are still running by ensuring their check variables + have been set to pdPASS. */ + for (xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++) { + if (usTaskCheck[xTask] != pdTRUE) { + /* The check has not been set so the associated task has either + stalled or detected an error. */ + xReturn = pdFAIL; + } else { + /* Reset the variable so it can be checked again the next time this + function is executed. */ + usTaskCheck[xTask] = pdFALSE; + } + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/integer.c b/freertos/cvitek/task/demo/Common/Minimal/integer.c new file mode 100644 index 000000000..aaa1ec25e --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/integer.c @@ -0,0 +1,161 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Creates one or more tasks that repeatedly perform a set of integer + * calculations. The result of each run-time calculation is compared to the + * known expected result - with a mismatch being indicative of an error in the + * context switch mechanism. + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo program include files. */ +#include "integer.h" + +/* The constants used in the calculation. */ +#define intgCONST1 ((long)123) +#define intgCONST2 ((long)234567) +#define intgCONST3 ((long)-3) +#define intgCONST4 ((long)7) +#define intgEXPECTED_ANSWER \ + (((intgCONST1 + intgCONST2) * intgCONST3) / intgCONST4) + +#define intgSTACK_SIZE configMINIMAL_STACK_SIZE + +/* As this is the minimal version, we will only create one task. */ +#define intgNUMBER_OF_TASKS (1) + +/* The task function. Repeatedly performs a 32 bit calculation, checking the +result against the expected result. If the result is incorrect then the +context switch must have caused some corruption. */ +static portTASK_FUNCTION_PROTO(vCompeteingIntMathTask, pvParameters); + +/* Variables that are set to true within the calculation task to indicate +that the task is still executing. The check task sets the variable back to +false, flagging an error if the variable is still false the next time it +is called. */ +static BaseType_t xTaskCheck[intgNUMBER_OF_TASKS] = { (BaseType_t)pdFALSE }; + +/*-----------------------------------------------------------*/ + +void vStartIntegerMathTasks(UBaseType_t uxPriority) +{ + short sTask; + + for (sTask = 0; sTask < intgNUMBER_OF_TASKS; sTask++) { + xTaskCreate(vCompeteingIntMathTask, "IntMath", intgSTACK_SIZE, + (void *)&(xTaskCheck[sTask]), uxPriority, + (TaskHandle_t *)NULL); + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompeteingIntMathTask, pvParameters) +{ + /* These variables are all effectively set to constants so they are volatile to +ensure the compiler does not just get rid of them. */ + volatile long lValue; + short sError = pdFALSE; + volatile BaseType_t *pxTaskHasExecuted; + + /* Set a pointer to the variable we are going to set to true each + iteration. This is also a good test of the parameter passing mechanism + within each port. */ + pxTaskHasExecuted = (volatile BaseType_t *)pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for (;;) { + /* Perform the calculation. This will store partial value in + registers, resulting in a good test of the context switch mechanism. */ + lValue = intgCONST1; + lValue += intgCONST2; + +/* Yield in case cooperative scheduling is being used. */ +#if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } +#endif + + /* Finish off the calculation. */ + lValue *= intgCONST3; + lValue /= intgCONST4; + + /* If the calculation is found to be incorrect we stop setting the + TaskHasExecuted variable so the check task can see an error has + occurred. */ + if (lValue != + intgEXPECTED_ANSWER) /*lint !e774 volatile used to prevent this being optimised out. */ + { + sError = pdTRUE; + } + + if (sError == pdFALSE) { + /* We have not encountered any errors, so set the flag that show + we are still executing. This will be periodically cleared by + the check task. */ + portENTER_CRITICAL(); + *pxTaskHasExecuted = pdTRUE; + portEXIT_CRITICAL(); + } + +/* Yield in case cooperative scheduling is being used. */ +#if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } +#endif + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreIntegerMathsTaskStillRunning(void) +{ + BaseType_t xReturn = pdTRUE; + short sTask; + + /* Check the maths tasks are still running by ensuring their check variables + are still being set to true. */ + for (sTask = 0; sTask < intgNUMBER_OF_TASKS; sTask++) { + if (xTaskCheck[sTask] == pdFALSE) { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + /* Reset the check variable so we can tell if it has been set by + the next time around. */ + xTaskCheck[sTask] = pdFALSE; + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/readme.txt b/freertos/cvitek/task/demo/Common/Minimal/readme.txt new file mode 100644 index 000000000..48668dcba --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/readme.txt @@ -0,0 +1,2 @@ +This directory contains the implementation of the "common demo tasks". These +are test tasks and demo tasks that are used by nearly all the demo applications. \ No newline at end of file diff --git a/freertos/cvitek/task/demo/Common/Minimal/recmutex.c b/freertos/cvitek/task/demo/Common/Minimal/recmutex.c new file mode 100644 index 000000000..b618efd41 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/recmutex.c @@ -0,0 +1,406 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + The tasks defined on this page demonstrate the use of recursive mutexes. + + For recursive mutex functionality the created mutex should be created using + xSemaphoreCreateRecursiveMutex(), then be manipulated + using the xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() API + functions. + + This demo creates three tasks all of which access the same recursive mutex: + + prvRecursiveMutexControllingTask() has the highest priority so executes + first and grabs the mutex. It then performs some recursive accesses - + between each of which it sleeps for a short period to let the lower + priority tasks execute. When it has completed its demo functionality + it gives the mutex back before suspending itself. + + prvRecursiveMutexBlockingTask() attempts to access the mutex by performing + a blocking 'take'. The blocking task has a lower priority than the + controlling task so by the time it executes the mutex has already been + taken by the controlling task, causing the blocking task to block. It + does not unblock until the controlling task has given the mutex back, + and it does not actually run until the controlling task has suspended + itself (due to the relative priorities). When it eventually does obtain + the mutex all it does is give the mutex back prior to also suspending + itself. At this point both the controlling task and the blocking task are + suspended. + + prvRecursiveMutexPollingTask() runs at the idle priority. It spins round + a tight loop attempting to obtain the mutex with a non-blocking call. As + the lowest priority task it will not successfully obtain the mutex until + both the controlling and blocking tasks are suspended. Once it eventually + does obtain the mutex it first unsuspends both the controlling task and + blocking task prior to giving the mutex back - resulting in the polling + task temporarily inheriting the controlling tasks priority. +*/ + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* Demo app include files. */ +#include "recmutex.h" + +/* Priorities assigned to the three tasks. recmuCONTROLLING_TASK_PRIORITY can +be overridden by a definition in FreeRTOSConfig.h. */ +#ifndef recmuCONTROLLING_TASK_PRIORITY +#define recmuCONTROLLING_TASK_PRIORITY (tskIDLE_PRIORITY + 2) +#endif +#define recmuBLOCKING_TASK_PRIORITY (tskIDLE_PRIORITY + 1) +#define recmuPOLLING_TASK_PRIORITY (tskIDLE_PRIORITY + 0) + +/* The recursive call depth. */ +#define recmuMAX_COUNT (10) + +/* Misc. */ +#define recmuSHORT_DELAY (pdMS_TO_TICKS(20)) +#define recmuNO_DELAY ((TickType_t)0) +#define recmu15ms_DELAY (pdMS_TO_TICKS(15)) + +#ifndef recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE +#define recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE +#endif + +/* The three tasks as described at the top of this file. */ +static void prvRecursiveMutexControllingTask(void *pvParameters); +static void prvRecursiveMutexBlockingTask(void *pvParameters); +static void prvRecursiveMutexPollingTask(void *pvParameters); + +/* The mutex used by the demo. */ +static SemaphoreHandle_t xMutex; + +/* Variables used to detect and latch errors. */ +static volatile BaseType_t xErrorOccurred = pdFALSE, + xControllingIsSuspended = pdFALSE, + xBlockingIsSuspended = pdFALSE; +static volatile UBaseType_t uxControllingCycles = 0, uxBlockingCycles = 0, + uxPollingCycles = 0; + +/* Handles of the two higher priority tasks, required so they can be resumed +(unsuspended). */ +static TaskHandle_t xControllingTaskHandle, xBlockingTaskHandle; + +/*-----------------------------------------------------------*/ + +void vStartRecursiveMutexTasks(void) +{ + /* Just creates the mutex and the three tasks. */ + + xMutex = xSemaphoreCreateRecursiveMutex(); + + if (xMutex != NULL) { + /* vQueueAddToRegistry() adds the mutex to the registry, if one is + in use. The registry is provided as a means for kernel aware + debuggers to locate mutex and has no purpose if a kernel aware debugger + is not being used. The call to vQueueAddToRegistry() will be removed + by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + defined to be less than 1. */ + vQueueAddToRegistry((QueueHandle_t)xMutex, "Recursive_Mutex"); + + xTaskCreate(prvRecursiveMutexControllingTask, "Rec1", + recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, + recmuCONTROLLING_TASK_PRIORITY, + &xControllingTaskHandle); + xTaskCreate(prvRecursiveMutexBlockingTask, "Rec2", + recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, + recmuBLOCKING_TASK_PRIORITY, &xBlockingTaskHandle); + xTaskCreate(prvRecursiveMutexPollingTask, "Rec3", + recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, + recmuPOLLING_TASK_PRIORITY, NULL); + } +} +/*-----------------------------------------------------------*/ + +static void prvRecursiveMutexControllingTask(void *pvParameters) +{ + UBaseType_t ux; + + /* Just to remove compiler warning. */ + (void)pvParameters; + + for (;;) { + /* Should not be able to 'give' the mutex, as we have not yet 'taken' + it. The first time through, the mutex will not have been used yet, + subsequent times through, at this point the mutex will be held by the + polling task. */ + if (xSemaphoreGiveRecursive(xMutex) == pdPASS) { + xErrorOccurred = pdTRUE; + } + + for (ux = 0; ux < recmuMAX_COUNT; ux++) { + /* We should now be able to take the mutex as many times as + we like. + + The first time through the mutex will be immediately available, on + subsequent times through the mutex will be held by the polling task + at this point and this Take will cause the polling task to inherit + the priority of this task. In this case the block time must be + long enough to ensure the polling task will execute again before the + block time expires. If the block time does expire then the error + flag will be set here. */ + if (xSemaphoreTakeRecursive(xMutex, recmu15ms_DELAY) != + pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Ensure the other task attempting to access the mutex (and the + other demo tasks) are able to execute to ensure they either block + (where a block time is specified) or return an error (where no + block time is specified) as the mutex is held by this task. */ + vTaskDelay(recmuSHORT_DELAY); + } + + /* For each time we took the mutex, give it back. */ + for (ux = 0; ux < recmuMAX_COUNT; ux++) { + /* Ensure the other task attempting to access the mutex (and the + other demo tasks) are able to execute. */ + vTaskDelay(recmuSHORT_DELAY); + + /* We should now be able to give the mutex as many times as we + took it. When the mutex is available again the Blocking task + should be unblocked but not run because it has a lower priority + than this task. The polling task should also not run at this point + as it too has a lower priority than this task. */ + if (xSemaphoreGiveRecursive(xMutex) != pdPASS) { + xErrorOccurred = pdTRUE; + } + +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + } + + /* Having given it back the same number of times as it was taken, we + should no longer be the mutex owner, so the next give should fail. */ + if (xSemaphoreGiveRecursive(xMutex) == pdPASS) { + xErrorOccurred = pdTRUE; + } + + /* Keep count of the number of cycles this task has performed so a + stall can be detected. */ + uxControllingCycles++; + + /* Suspend ourselves so the blocking task can execute. */ + xControllingIsSuspended = pdTRUE; + vTaskSuspend(NULL); + xControllingIsSuspended = pdFALSE; + } +} +/*-----------------------------------------------------------*/ + +static void prvRecursiveMutexBlockingTask(void *pvParameters) +{ + /* Just to remove compiler warning. */ + (void)pvParameters; + + for (;;) { + /* This task will run while the controlling task is blocked, and the + controlling task will block only once it has the mutex - therefore + this call should block until the controlling task has given up the + mutex, and not actually execute past this call until the controlling + task is suspended. portMAX_DELAY - 1 is used instead of portMAX_DELAY + to ensure the task's state is reported as Blocked and not Suspended in + a later call to configASSERT() (within the polling task). */ + if (xSemaphoreTakeRecursive(xMutex, (portMAX_DELAY - 1)) == + pdPASS) { + if (xControllingIsSuspended != pdTRUE) { + /* Did not expect to execute until the controlling task was + suspended. */ + xErrorOccurred = pdTRUE; + } else { + /* Give the mutex back before suspending ourselves to allow + the polling task to obtain the mutex. */ + if (xSemaphoreGiveRecursive(xMutex) != pdPASS) { + xErrorOccurred = pdTRUE; + } + + xBlockingIsSuspended = pdTRUE; + vTaskSuspend(NULL); + xBlockingIsSuspended = pdFALSE; + } + } else { + /* We should not leave the xSemaphoreTakeRecursive() function + until the mutex was obtained. */ + xErrorOccurred = pdTRUE; + } + + /* The controlling and blocking tasks should be in lock step. */ + if (uxControllingCycles != + (UBaseType_t)(uxBlockingCycles + 1)) { + xErrorOccurred = pdTRUE; + } + + /* Keep count of the number of cycles this task has performed so a + stall can be detected. */ + uxBlockingCycles++; + } +} +/*-----------------------------------------------------------*/ + +static void prvRecursiveMutexPollingTask(void *pvParameters) +{ + /* Just to remove compiler warning. */ + (void)pvParameters; + + for (;;) { + /* Keep attempting to obtain the mutex. It should only be obtained when + the blocking task has suspended itself, which in turn should only + happen when the controlling task is also suspended. */ + if (xSemaphoreTakeRecursive(xMutex, recmuNO_DELAY) == pdPASS) { +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT( + eTaskGetState(xControllingTaskHandle) == + eSuspended); + configASSERT( + eTaskGetState(xBlockingTaskHandle) == + eSuspended); + } +#endif /* INCLUDE_eTaskGetState */ + + /* Is the blocking task suspended? */ + if ((xBlockingIsSuspended != pdTRUE) || + (xControllingIsSuspended != pdTRUE)) { + xErrorOccurred = pdTRUE; + } else { + /* Keep count of the number of cycles this task has performed + so a stall can be detected. */ + uxPollingCycles++; + + /* We can resume the other tasks here even though they have a + higher priority than the polling task. When they execute they + will attempt to obtain the mutex but fail because the polling + task is still the mutex holder. The polling task (this task) + will then inherit the higher priority. The Blocking task will + block indefinitely when it attempts to obtain the mutex, the + Controlling task will only block for a fixed period and an + error will be latched if the polling task has not returned the + mutex by the time this fixed period has expired. */ + vTaskResume(xBlockingTaskHandle); +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + + vTaskResume(xControllingTaskHandle); +#if (configUSE_PREEMPTION == 0) + taskYIELD(); +#endif + + /* The other two tasks should now have executed and no longer + be suspended. */ + if ((xBlockingIsSuspended == pdTRUE) || + (xControllingIsSuspended == pdTRUE)) { + xErrorOccurred = pdTRUE; + } + +#if (INCLUDE_uxTaskPriorityGet == 1) + { + /* Check priority inherited. */ + configASSERT( + uxTaskPriorityGet(NULL) == + recmuCONTROLLING_TASK_PRIORITY); + } +#endif /* INCLUDE_uxTaskPriorityGet */ + +#if (INCLUDE_eTaskGetState == 1) + { + configASSERT( + eTaskGetState( + xControllingTaskHandle) == + eBlocked); + configASSERT( + eTaskGetState( + xBlockingTaskHandle) == + eBlocked); + } +#endif /* INCLUDE_eTaskGetState */ + + /* Release the mutex, disinheriting the higher priority again. */ + if (xSemaphoreGiveRecursive(xMutex) != pdPASS) { + xErrorOccurred = pdTRUE; + } + +#if (INCLUDE_uxTaskPriorityGet == 1) + { + /* Check priority disinherited. */ + configASSERT( + uxTaskPriorityGet(NULL) == + recmuPOLLING_TASK_PRIORITY); + } +#endif /* INCLUDE_uxTaskPriorityGet */ + } + } + +#if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } +#endif + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreRecursiveMutexTasksStillRunning(void) +{ + BaseType_t xReturn; + static UBaseType_t uxLastControllingCycles = 0, + uxLastBlockingCycles = 0, uxLastPollingCycles = 0; + + /* Is the controlling task still cycling? */ + if (uxLastControllingCycles == uxControllingCycles) { + xErrorOccurred = pdTRUE; + } else { + uxLastControllingCycles = uxControllingCycles; + } + + /* Is the blocking task still cycling? */ + if (uxLastBlockingCycles == uxBlockingCycles) { + xErrorOccurred = pdTRUE; + } else { + uxLastBlockingCycles = uxBlockingCycles; + } + + /* Is the polling task still cycling? */ + if (uxLastPollingCycles == uxPollingCycles) { + xErrorOccurred = pdTRUE; + } else { + uxLastPollingCycles = uxPollingCycles; + } + + if (xErrorOccurred == pdTRUE) { + xReturn = pdFAIL; + } else { + xReturn = pdPASS; + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/semtest.c b/freertos/cvitek/task/demo/Common/Minimal/semtest.c new file mode 100644 index 000000000..87aa8e20a --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/semtest.c @@ -0,0 +1,277 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Creates two sets of two tasks. The tasks within a set share a variable, access + * to which is guarded by a semaphore. + * + * Each task starts by attempting to obtain the semaphore. On obtaining a + * semaphore a task checks to ensure that the guarded variable has an expected + * value. It then clears the variable to zero before counting it back up to the + * expected value in increments of 1. After each increment the variable is checked + * to ensure it contains the value to which it was just set. When the starting + * value is again reached the task releases the semaphore giving the other task in + * the set a chance to do exactly the same thing. The starting value is high + * enough to ensure that a tick is likely to occur during the incrementing loop. + * + * An error is flagged if at any time during the process a shared variable is + * found to have a value other than that expected. Such an occurrence would + * suggest an error in the mutual exclusion mechanism by which access to the + * variable is restricted. + * + * The first set of two tasks poll their semaphore. The second set use blocking + * calls. + * + */ + +#include <stdlib.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* Demo app include files. */ +#include "semtest.h" + +/* The value to which the shared variables are counted. */ +#define semtstBLOCKING_EXPECTED_VALUE ((uint32_t)0xfff) +#define semtstNON_BLOCKING_EXPECTED_VALUE ((uint32_t)0xff) + +#define semtstSTACK_SIZE configMINIMAL_STACK_SIZE + +#define semtstNUM_TASKS (4) + +#define semtstDELAY_FACTOR ((TickType_t)10) + +/* The task function as described at the top of the file. */ +static portTASK_FUNCTION_PROTO(prvSemaphoreTest, pvParameters); + +/* Structure used to pass parameters to each task. */ +typedef struct SEMAPHORE_PARAMETERS { + SemaphoreHandle_t xSemaphore; + volatile uint32_t *pulSharedVariable; + TickType_t xBlockTime; +} xSemaphoreParameters; + +/* Variables used to check that all the tasks are still running without errors. */ +static volatile short sCheckVariables[semtstNUM_TASKS] = { 0 }; +static volatile short sNextCheckVariable = 0; + +/*-----------------------------------------------------------*/ + +void vStartSemaphoreTasks(UBaseType_t uxPriority) +{ + xSemaphoreParameters *pxFirstSemaphoreParameters, + *pxSecondSemaphoreParameters; + const TickType_t xBlockTime = (TickType_t)100; + + /* Create the structure used to pass parameters to the first two tasks. */ + pxFirstSemaphoreParameters = (xSemaphoreParameters *)pvPortMalloc( + sizeof(xSemaphoreParameters)); + + if (pxFirstSemaphoreParameters != NULL) { + /* Create the semaphore used by the first two tasks. */ + pxFirstSemaphoreParameters->xSemaphore = + xSemaphoreCreateBinary(); + + if (pxFirstSemaphoreParameters->xSemaphore != NULL) { + xSemaphoreGive(pxFirstSemaphoreParameters->xSemaphore); + + /* Create the variable which is to be shared by the first two tasks. */ + pxFirstSemaphoreParameters->pulSharedVariable = + (uint32_t *)pvPortMalloc(sizeof(uint32_t)); + + /* Initialise the share variable to the value the tasks expect. */ + *(pxFirstSemaphoreParameters->pulSharedVariable) = + semtstNON_BLOCKING_EXPECTED_VALUE; + + /* The first two tasks do not block on semaphore calls. */ + pxFirstSemaphoreParameters->xBlockTime = (TickType_t)0; + + /* Spawn the first two tasks. As they poll they operate at the idle priority. */ + xTaskCreate(prvSemaphoreTest, "PolSEM1", + semtstSTACK_SIZE, + (void *)pxFirstSemaphoreParameters, + tskIDLE_PRIORITY, (TaskHandle_t *)NULL); + xTaskCreate(prvSemaphoreTest, "PolSEM2", + semtstSTACK_SIZE, + (void *)pxFirstSemaphoreParameters, + tskIDLE_PRIORITY, (TaskHandle_t *)NULL); + + /* vQueueAddToRegistry() adds the semaphore to the registry, if one + is in use. The registry is provided as a means for kernel aware + debuggers to locate semaphores and has no purpose if a kernel aware + debugger is not being used. The call to vQueueAddToRegistry() will + be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + defined or is defined to be less than 1. */ + vQueueAddToRegistry( + (QueueHandle_t) + pxFirstSemaphoreParameters->xSemaphore, + "Counting_Sem_1"); + } + } + + /* Do exactly the same to create the second set of tasks, only this time + provide a block time for the semaphore calls. */ + pxSecondSemaphoreParameters = (xSemaphoreParameters *)pvPortMalloc( + sizeof(xSemaphoreParameters)); + if (pxSecondSemaphoreParameters != NULL) { + pxSecondSemaphoreParameters->xSemaphore = + xSemaphoreCreateBinary(); + + if (pxSecondSemaphoreParameters->xSemaphore != NULL) { + xSemaphoreGive(pxSecondSemaphoreParameters->xSemaphore); + + pxSecondSemaphoreParameters->pulSharedVariable = + (uint32_t *)pvPortMalloc(sizeof(uint32_t)); + *(pxSecondSemaphoreParameters->pulSharedVariable) = + semtstBLOCKING_EXPECTED_VALUE; + pxSecondSemaphoreParameters->xBlockTime = + xBlockTime / portTICK_PERIOD_MS; + + xTaskCreate(prvSemaphoreTest, "BlkSEM1", + semtstSTACK_SIZE, + (void *)pxSecondSemaphoreParameters, + uxPriority, (TaskHandle_t *)NULL); + xTaskCreate(prvSemaphoreTest, "BlkSEM2", + semtstSTACK_SIZE, + (void *)pxSecondSemaphoreParameters, + uxPriority, (TaskHandle_t *)NULL); + + /* vQueueAddToRegistry() adds the semaphore to the registry, if one + is in use. The registry is provided as a means for kernel aware + debuggers to locate semaphores and has no purpose if a kernel aware + debugger is not being used. The call to vQueueAddToRegistry() will + be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + defined or is defined to be less than 1. */ + vQueueAddToRegistry( + (QueueHandle_t) + pxSecondSemaphoreParameters->xSemaphore, + "Counting_Sem_2"); + } + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(prvSemaphoreTest, pvParameters) +{ + xSemaphoreParameters *pxParameters; + volatile uint32_t *pulSharedVariable, ulExpectedValue; + uint32_t ulCounter; + short sError = pdFALSE, sCheckVariableToUse; + + /* See which check variable to use. sNextCheckVariable is not semaphore + protected! */ + portENTER_CRITICAL(); + sCheckVariableToUse = sNextCheckVariable; + sNextCheckVariable++; + portEXIT_CRITICAL(); + + /* A structure is passed in as the parameter. This contains the shared + variable being guarded. */ + pxParameters = (xSemaphoreParameters *)pvParameters; + pulSharedVariable = pxParameters->pulSharedVariable; + + /* If we are blocking we use a much higher count to ensure loads of context + switches occur during the count. */ + if (pxParameters->xBlockTime > (TickType_t)0) { + ulExpectedValue = semtstBLOCKING_EXPECTED_VALUE; + } else { + ulExpectedValue = semtstNON_BLOCKING_EXPECTED_VALUE; + } + + for (;;) { + /* Try to obtain the semaphore. */ + if (xSemaphoreTake(pxParameters->xSemaphore, + pxParameters->xBlockTime) == pdPASS) { + /* We have the semaphore and so expect any other tasks using the + shared variable to have left it in the state we expect to find + it. */ + if (*pulSharedVariable != ulExpectedValue) { + sError = pdTRUE; + } + + /* Clear the variable, then count it back up to the expected value + before releasing the semaphore. Would expect a context switch or + two during this time. */ + for (ulCounter = (uint32_t)0; + ulCounter <= ulExpectedValue; ulCounter++) { + *pulSharedVariable = ulCounter; + if (*pulSharedVariable != ulCounter) { + sError = pdTRUE; + } + } + + /* Release the semaphore, and if no errors have occurred increment the check + variable. */ + if (xSemaphoreGive(pxParameters->xSemaphore) == + pdFALSE) { + sError = pdTRUE; + } + + if (sError == pdFALSE) { + if (sCheckVariableToUse < semtstNUM_TASKS) { + (sCheckVariables[sCheckVariableToUse])++; + } + } + + /* If we have a block time then we are running at a priority higher + than the idle priority. This task takes a long time to complete + a cycle (deliberately so to test the guarding) so will be starving + out lower priority tasks. Block for some time to allow give lower + priority tasks some processor time. */ + vTaskDelay(pxParameters->xBlockTime * + semtstDELAY_FACTOR); + } else { + if (pxParameters->xBlockTime == (TickType_t)0) { + /* We have not got the semaphore yet, so no point using the + processor. We are not blocking when attempting to obtain the + semaphore. */ + taskYIELD(); + } + } + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreSemaphoreTasksStillRunning(void) +{ + static short sLastCheckVariables[semtstNUM_TASKS] = { 0 }; + BaseType_t xTask, xReturn = pdTRUE; + + for (xTask = 0; xTask < semtstNUM_TASKS; xTask++) { + if (sLastCheckVariables[xTask] == sCheckVariables[xTask]) { + xReturn = pdFALSE; + } + + sLastCheckVariables[xTask] = sCheckVariables[xTask]; + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/Minimal/sp_flop.c b/freertos/cvitek/task/demo/Common/Minimal/sp_flop.c new file mode 100644 index 000000000..0c4ce5bb0 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/Minimal/sp_flop.c @@ -0,0 +1,312 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Creates eight tasks, each of which loops continuously performing a floating + * point calculation - using single precision variables. + * + * All the tasks run at the idle priority and never block or yield. This causes + * all eight tasks to time slice with the idle task. Running at the idle priority + * means that these tasks will get pre-empted any time another task is ready to run + * or a time slice occurs. More often than not the pre-emption will occur mid + * calculation, creating a good test of the schedulers context switch mechanism - a + * calculation producing an unexpected result could be a symptom of a corruption in + * the context of a task. + */ + +#include <stdlib.h> +#include <math.h> + +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo program include files. */ +#include "flop.h" + +#define mathSTACK_SIZE configMINIMAL_STACK_SIZE +#define mathNUMBER_OF_TASKS (8) + +/* Four tasks, each of which performs a different floating point calculation. +Each of the four is created twice. */ +static portTASK_FUNCTION_PROTO(vCompetingMathTask1, pvParameters); +static portTASK_FUNCTION_PROTO(vCompetingMathTask2, pvParameters); +static portTASK_FUNCTION_PROTO(vCompetingMathTask3, pvParameters); +static portTASK_FUNCTION_PROTO(vCompetingMathTask4, pvParameters); + +/* These variables are used to check that all the tasks are still running. If a +task gets a calculation wrong it will +stop incrementing its check variable. */ +static volatile uint16_t usTaskCheck[mathNUMBER_OF_TASKS] = { (uint16_t)0 }; + +/*-----------------------------------------------------------*/ + +void vStartMathTasks(UBaseType_t uxPriority) +{ + xTaskCreate(vCompetingMathTask1, "Math1", mathSTACK_SIZE, + (void *)&(usTaskCheck[0]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask2, "Math2", mathSTACK_SIZE, + (void *)&(usTaskCheck[1]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask3, "Math3", mathSTACK_SIZE, + (void *)&(usTaskCheck[2]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask4, "Math4", mathSTACK_SIZE, + (void *)&(usTaskCheck[3]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask1, "Math5", mathSTACK_SIZE, + (void *)&(usTaskCheck[4]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask2, "Math6", mathSTACK_SIZE, + (void *)&(usTaskCheck[5]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask3, "Math7", mathSTACK_SIZE, + (void *)&(usTaskCheck[6]), uxPriority, NULL); + xTaskCreate(vCompetingMathTask4, "Math8", mathSTACK_SIZE, + (void *)&(usTaskCheck[7]), uxPriority, NULL); +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask1, pvParameters) +{ + volatile float f1, f2, f3, f4; + volatile uint16_t *pusTaskCheckVariable; + volatile float fAnswer; + short sError = pdFALSE; + + f1 = 123.4567F; + f2 = 2345.6789F; + f3 = -918.222F; + + fAnswer = (f1 + f2) * f3; + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (uint16_t *)pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for (;;) { + f1 = 123.4567F; + f2 = 2345.6789F; + f3 = -918.222F; + + f4 = (f1 + f2) * f3; + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* If the calculation does not match the expected constant, stop the + increment of the check variable. */ + if (fabs(f4 - fAnswer) > 0.001F) { + sError = pdTRUE; + } + + if (sError == pdFALSE) { + /* If the calculation has always been correct, increment the check + variable so we know this task is still running okay. */ + (*pusTaskCheckVariable)++; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask2, pvParameters) +{ + volatile float f1, f2, f3, f4; + volatile uint16_t *pusTaskCheckVariable; + volatile float fAnswer; + short sError = pdFALSE; + + f1 = -389.38F; + f2 = 32498.2F; + f3 = -2.0001F; + + fAnswer = (f1 / f2) * f3; + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (uint16_t *)pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for (;;) { + f1 = -389.38F; + f2 = 32498.2F; + f3 = -2.0001F; + + f4 = (f1 / f2) * f3; + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + /* If the calculation does not match the expected constant, stop the + increment of the check variable. */ + if (fabs(f4 - fAnswer) > 0.001F) { + sError = pdTRUE; + } + + if (sError == pdFALSE) { + /* If the calculation has always been correct, increment the check + variable so we know + this task is still running okay. */ + (*pusTaskCheckVariable)++; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask3, pvParameters) +{ + volatile float *pfArray, fTotal1, fTotal2, fDifference, fPosition; + volatile uint16_t *pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (uint16_t *)pvParameters; + + pfArray = (float *)pvPortMalloc(xArraySize * sizeof(float)); + + /* Keep filling an array, keeping a running total of the values placed in the + array. Then run through the array adding up all the values. If the two totals + do not match, stop the check variable from incrementing. */ + for (;;) { + fTotal1 = 0.0F; + fTotal2 = 0.0F; + fPosition = 0.0F; + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + pfArray[xPosition] = fPosition + 5.5F; + fTotal1 += fPosition + 5.5F; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + fTotal2 += pfArray[xPosition]; + } + + fDifference = fTotal1 - fTotal2; + if (fabs(fDifference) > 0.001F) { + sError = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + if (sError == pdFALSE) { + /* If the calculation has always been correct, increment the check + variable so we know this task is still running okay. */ + (*pusTaskCheckVariable)++; + } + } +} +/*-----------------------------------------------------------*/ + +static portTASK_FUNCTION(vCompetingMathTask4, pvParameters) +{ + volatile float *pfArray, fTotal1, fTotal2, fDifference, fPosition; + volatile uint16_t *pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* The variable this task increments to show it is still running is passed in + as the parameter. */ + pusTaskCheckVariable = (uint16_t *)pvParameters; + + pfArray = (float *)pvPortMalloc(xArraySize * sizeof(float)); + + /* Keep filling an array, keeping a running total of the values placed in the + array. Then run through the array adding up all the values. If the two totals + do not match, stop the check variable from incrementing. */ + for (;;) { + fTotal1 = 0.0F; + fTotal2 = 0.0F; + fPosition = 0.0F; + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + pfArray[xPosition] = fPosition * 12.123F; + fTotal1 += fPosition * 12.123F; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + for (xPosition = 0; xPosition < xArraySize; xPosition++) { + fTotal2 += pfArray[xPosition]; + } + + fDifference = fTotal1 - fTotal2; + if (fabs(fDifference) > 0.001F) { + sError = pdTRUE; + } + +#if configUSE_PREEMPTION == 0 + taskYIELD(); +#endif + + if (sError == pdFALSE) { + /* If the calculation has always been correct, increment the check + variable so we know this task is still running okay. */ + (*pusTaskCheckVariable)++; + } + } +} +/*-----------------------------------------------------------*/ + +/* This is called to check that all the created tasks are still running. */ +BaseType_t xAreMathsTaskStillRunning(void) +{ + /* Keep a history of the check variables so we know if they have been incremented +since the last call. */ + static uint16_t usLastTaskCheck[mathNUMBER_OF_TASKS] = { (uint16_t)0 }; + BaseType_t xReturn = pdTRUE, xTask; + + /* Check the maths tasks are still running by ensuring their check variables + are still incrementing. */ + for (xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++) { + if (usTaskCheck[xTask] == usLastTaskCheck[xTask]) { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + usLastTaskCheck[xTask] = usTaskCheck[xTask]; + } + + return xReturn; +} diff --git a/freertos/cvitek/task/demo/Common/include/AbortDelay.h b/freertos/cvitek/task/demo/Common/include/AbortDelay.h new file mode 100644 index 000000000..33ccaa85d --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/AbortDelay.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef ABORT_DELAY_H +#define ABORT_DELAY_H + +void vCreateAbortDelayTasks(void); +BaseType_t xAreAbortDelayTestTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/BlockQ.h b/freertos/cvitek/task/demo/Common/include/BlockQ.h new file mode 100644 index 000000000..0a419cbfa --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/BlockQ.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef BLOCK_Q_H +#define BLOCK_Q_H + +void vStartBlockingQueueTasks(UBaseType_t uxPriority); +BaseType_t xAreBlockingQueuesStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/EventGroupsDemo.h b/freertos/cvitek/task/demo/Common/include/EventGroupsDemo.h new file mode 100644 index 000000000..0609103b6 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/EventGroupsDemo.h @@ -0,0 +1,41 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This file contains fairly comprehensive checks on the behaviour of event + * groups. It is not intended to be a user friendly demonstration of the event + * groups API. + */ + +#ifndef EVENT_GROUPS_DEMO_H +#define EVENT_GROUPS_DEMO_H + +void vStartEventGroupTasks(void); +BaseType_t xAreEventGroupTasksStillRunning(void); +void vPeriodicEventGroupsProcessing(void); + +#endif /* EVENT_GROUPS_DEMO_H */ diff --git a/freertos/cvitek/task/demo/Common/include/GenQTest.h b/freertos/cvitek/task/demo/Common/include/GenQTest.h new file mode 100644 index 000000000..6ffcd9b5c --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/GenQTest.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef GEN_Q_TEST_H +#define GEN_Q_TEST_H + +void vStartGenericQueueTasks(UBaseType_t uxPriority); +BaseType_t xAreGenericQueueTasksStillRunning(void); +void vMutexISRInteractionTest(void); + +#endif /* GEN_Q_TEST_H */ diff --git a/freertos/cvitek/task/demo/Common/include/IntSemTest.h b/freertos/cvitek/task/demo/Common/include/IntSemTest.h new file mode 100644 index 000000000..b8f988fc8 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/IntSemTest.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef INT_SEM_TEST_H +#define INT_SEM_TEST_H + +void vStartInterruptSemaphoreTasks(void); +BaseType_t xAreInterruptSemaphoreTasksStillRunning(void); +void vInterruptSemaphorePeriodicTest(void); + +#endif /* INT_SEM_TEST_H */ diff --git a/freertos/cvitek/task/demo/Common/include/MessageBufferAMP.h b/freertos/cvitek/task/demo/Common/include/MessageBufferAMP.h new file mode 100644 index 000000000..1cd391468 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/MessageBufferAMP.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef MESSAGE_BUFFER_AMP_H +#define MESSAGE_BUFFER_AMP_H + +void vStartMessageBufferAMPTasks(configSTACK_DEPTH_TYPE xStackSize); +BaseType_t xAreMessageBufferAMPTasksStillRunning(void); +void vGenerateCoreBInterrupt(void *xUpdatedMessageBuffer); + +#endif /* MESSAGE_BUFFER_AMP_H */ diff --git a/freertos/cvitek/task/demo/Common/include/MessageBufferDemo.h b/freertos/cvitek/task/demo/Common/include/MessageBufferDemo.h new file mode 100644 index 000000000..c452d5a95 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/MessageBufferDemo.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef MESSAGE_BUFFER_TEST_H +#define MESSAGE_BUFFER_TEST_H + +void vStartMessageBufferTasks(configSTACK_DEPTH_TYPE xStackSize); +BaseType_t xAreMessageBufferTasksStillRunning(void); + +#endif /* MESSAGE_BUFFER_TEST_H */ diff --git a/freertos/cvitek/task/demo/Common/include/PollQ.h b/freertos/cvitek/task/demo/Common/include/PollQ.h new file mode 100644 index 000000000..81db49ca8 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/PollQ.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef POLLED_Q_H +#define POLLED_Q_H + +void vStartPolledQueueTasks(UBaseType_t uxPriority); +BaseType_t xArePollingQueuesStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/QPeek.h b/freertos/cvitek/task/demo/Common/include/QPeek.h new file mode 100644 index 000000000..93c83f5af --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/QPeek.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef Q_PEEK_TEST_H +#define Q_PEEK_TEST_H + +void vStartQueuePeekTasks(void); +BaseType_t xAreQueuePeekTasksStillRunning(void); + +#endif /* Q_PEEK_TEST_H */ diff --git a/freertos/cvitek/task/demo/Common/include/QueueOverwrite.h b/freertos/cvitek/task/demo/Common/include/QueueOverwrite.h new file mode 100644 index 000000000..1ea2ceb62 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/QueueOverwrite.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef QUEUE_OVERWRITE_H +#define QUEUE_OVERWRITE_H + +void vStartQueueOverwriteTask(UBaseType_t uxPriority); +BaseType_t xIsQueueOverwriteTaskStillRunning(void); +void vQueueOverwritePeriodicISRDemo(void); + +#endif /* QUEUE_OVERWRITE_H */ diff --git a/freertos/cvitek/task/demo/Common/include/QueueSet.h b/freertos/cvitek/task/demo/Common/include/QueueSet.h new file mode 100644 index 000000000..6648038b6 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/QueueSet.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef QUEUE_WAIT_MULTIPLE_H +#define QUEUE_WAIT_MULTIPLE_H + +void vStartQueueSetTasks(void); +BaseType_t xAreQueueSetTasksStillRunning(void); +void vQueueSetAccessQueueSetFromISR(void); + +#endif /* QUEUE_WAIT_MULTIPLE_H */ diff --git a/freertos/cvitek/task/demo/Common/include/QueueSetPolling.h b/freertos/cvitek/task/demo/Common/include/QueueSetPolling.h new file mode 100644 index 000000000..125492857 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/QueueSetPolling.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef QUEUE_SET_POLLING_H +#define QUEUE_SET_POLLING_H + +void vStartQueueSetPollingTask(void); +BaseType_t xAreQueueSetPollTasksStillRunning(void); +void vQueueSetPollingInterruptAccess(void); + +#endif /* QUEUE_SET_POLLING_H */ diff --git a/freertos/cvitek/task/demo/Common/include/StaticAllocation.h b/freertos/cvitek/task/demo/Common/include/StaticAllocation.h new file mode 100644 index 000000000..369254c53 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/StaticAllocation.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef STATIC_ALLOCATION_H +#define STATIC_ALLOCATION_H + +void vStartStaticallyAllocatedTasks(void); +BaseType_t xAreStaticAllocationTasksStillRunning(void); + +#endif /* STATIC_ALLOCATION_H */ diff --git a/freertos/cvitek/task/demo/Common/include/StreamBufferDemo.h b/freertos/cvitek/task/demo/Common/include/StreamBufferDemo.h new file mode 100644 index 000000000..14d655645 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/StreamBufferDemo.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef STREAM_BUFFER_TEST_H +#define STREAM_BUFFER_TEST_H + +void vStartStreamBufferTasks(void); +BaseType_t xAreStreamBufferTasksStillRunning(void); +void vPeriodicStreamBufferProcessing(void); + +#endif /* STREAM_BUFFER_TEST_H */ diff --git a/freertos/cvitek/task/demo/Common/include/StreamBufferInterrupt.h b/freertos/cvitek/task/demo/Common/include/StreamBufferInterrupt.h new file mode 100644 index 000000000..d8c3e8aae --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/StreamBufferInterrupt.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef STREAM_BUFFER_INTERRUPT_H +#define STREAM_BUFFER_INTERRUPT_H + +void vStartStreamBufferInterruptDemo(void); +void vBasicStreamBufferSendFromISR(void); +BaseType_t xIsInterruptStreamBufferDemoStillRunning(void); + +#endif /* STREAM_BUFFER_INTERRUPT_H */ diff --git a/freertos/cvitek/task/demo/Common/include/TaskNotify.h b/freertos/cvitek/task/demo/Common/include/TaskNotify.h new file mode 100644 index 000000000..3e1c1007a --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/TaskNotify.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef TASK_NOTIFY_H +#define TASK_NOTIFY_H + +void vStartTaskNotifyTask(void); +BaseType_t xAreTaskNotificationTasksStillRunning(void); +void xNotifyTaskFromISR(void); + +#endif /* TASK_NOTIFY_H */ diff --git a/freertos/cvitek/task/demo/Common/include/TaskNotifyArray.h b/freertos/cvitek/task/demo/Common/include/TaskNotifyArray.h new file mode 100644 index 000000000..231fcf61c --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/TaskNotifyArray.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef TASK_NOTIFY_ARRAY_H +#define TASK_NOTIFY_ARRAY_H + +void vStartTaskNotifyArrayTask(void); +BaseType_t xAreTaskNotificationArrayTasksStillRunning(void); +void xNotifyArrayTaskFromISR(void); + +#endif /* TASK_NOTIFY_ARRAY_H */ diff --git a/freertos/cvitek/task/demo/Common/include/TimerDemo.h b/freertos/cvitek/task/demo/Common/include/TimerDemo.h new file mode 100644 index 000000000..91c2278bd --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/TimerDemo.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef TIMER_DEMO_H +#define TIMER_DEMO_H + +void vStartTimerDemoTask(TickType_t xBaseFrequencyIn); +BaseType_t xAreTimerDemoTasksStillRunning(TickType_t xCycleFrequency); +void vTimerPeriodicISRTests(void); + +#endif /* TIMER_DEMO_H */ diff --git a/freertos/cvitek/task/demo/Common/include/blocktim.h b/freertos/cvitek/task/demo/Common/include/blocktim.h new file mode 100644 index 000000000..b695fe026 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/blocktim.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef BLOCK_TIME_TEST_H +#define BLOCK_TIME_TEST_H + +void vCreateBlockTimeTasks(void); +BaseType_t xAreBlockTimeTestTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/comtest.h b/freertos/cvitek/task/demo/Common/include/comtest.h new file mode 100644 index 000000000..b0bbe879a --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/comtest.h @@ -0,0 +1,38 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef COMTEST_H +#define COMTEST_H + +void vAltStartComTestTasks(UBaseType_t uxPriority, uint32_t ulBaudRate, + UBaseType_t uxLED); +void vStartComTestTasks(UBaseType_t uxPriority, eCOMPort ePort, + eBaud eBaudRate); +BaseType_t xAreComTestTasksStillRunning(void); +void vComTestUnsuspendTask(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/comtest2.h b/freertos/cvitek/task/demo/Common/include/comtest2.h new file mode 100644 index 000000000..31014b2c5 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/comtest2.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef COMTEST_H +#define COMTEST_H + +void vAltStartComTestTasks(UBaseType_t uxPriority, uint32_t ulBaudRate, + UBaseType_t uxLED); +BaseType_t xAreComTestTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/comtest_strings.h b/freertos/cvitek/task/demo/Common/include/comtest_strings.h new file mode 100644 index 000000000..679031aa1 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/comtest_strings.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef COMTEST_STRINGS_H +#define COMTEST_STRINGS_H + +void vStartComTestStringsTasks(UBaseType_t uxPriority, uint32_t ulBaudRate, + UBaseType_t uxLED); +BaseType_t xAreComTestTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/countsem.h b/freertos/cvitek/task/demo/Common/include/countsem.h new file mode 100644 index 000000000..ba1aed127 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/countsem.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef COUNT_SEMAPHORE_TEST_H +#define COUNT_SEMAPHORE_TEST_H + +void vStartCountingSemaphoreTasks(void); +BaseType_t xAreCountingSemaphoreTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/crflash.h b/freertos/cvitek/task/demo/Common/include/crflash.h new file mode 100644 index 000000000..3e5750e34 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/crflash.h @@ -0,0 +1,46 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef CRFLASH_LED_H +#define CRFLASH_LED_H + +/* + * Create the co-routines used to flash the LED's at different rates. + * + * @param uxPriority The number of 'fixed delay' co-routines to create. This + * also effects the number of LED's that will be utilised. For example, + * passing in 3 will cause LED's 0 to 2 to be utilised. + */ +void vStartFlashCoRoutines(UBaseType_t uxPriority); + +/* + * Return pdPASS or pdFAIL depending on whether an error has been detected + * or not. + */ +BaseType_t xAreFlashCoRoutinesStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/crhook.h b/freertos/cvitek/task/demo/Common/include/crhook.h new file mode 100644 index 000000000..ba5fc14cd --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/crhook.h @@ -0,0 +1,42 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef CRHOOK_H +#define CRHOOK_H + +/* + * Create the co-routines used to communicate wit the tick hook. + */ +void vStartHookCoRoutines(void); + +/* + * Return pdPASS or pdFAIL depending on whether an error has been detected + * or not. + */ +BaseType_t xAreHookCoRoutinesStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/death.h b/freertos/cvitek/task/demo/Common/include/death.h new file mode 100644 index 000000000..44d401daf --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/death.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef SUICIDE_TASK_H +#define SUICIDE_TASK_H + +void vCreateSuicidalTasks(UBaseType_t uxPriority); +BaseType_t xIsCreateTaskStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/dynamic.h b/freertos/cvitek/task/demo/Common/include/dynamic.h new file mode 100644 index 000000000..4f23a6e29 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/dynamic.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef DYNAMIC_MANIPULATION_H +#define DYNAMIC_MANIPULATION_H + +void vStartDynamicPriorityTasks(void); +BaseType_t xAreDynamicPriorityTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/fileIO.h b/freertos/cvitek/task/demo/Common/include/fileIO.h new file mode 100644 index 000000000..79d464cf4 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/fileIO.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef FILE_IO_H +#define FILE_IO_H + +void vDisplayMessage(const char *const pcMessageToPrint); +void vWriteMessageToDisk(const char *const pcMessage); +void vWriteBufferToDisk(const char *const pcBuffer, uint32_t ulBufferLength); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/flash.h b/freertos/cvitek/task/demo/Common/include/flash.h new file mode 100644 index 000000000..a0d81378e --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/flash.h @@ -0,0 +1,33 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef FLASH_LED_H +#define FLASH_LED_H + +void vStartLEDFlashTasks(UBaseType_t uxPriority); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/flash_timer.h b/freertos/cvitek/task/demo/Common/include/flash_timer.h new file mode 100644 index 000000000..fadd36179 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/flash_timer.h @@ -0,0 +1,41 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef FLASH_TIMER_H +#define FLASH_TIMER_H + +/* + * Creates the LED flashing timers. xNumberOfLEDs specifies how many timers to + * create, with each timer toggling a different LED. The first LED to be + * toggled is LED 0, with subsequent LEDs following on in numerical order. Each + * timer uses the exact same callback function, with the timer ID being used + * within the callback function to determine which timer has actually expired + * (and therefore which LED to toggle). + */ +void vStartLEDFlashTimers(UBaseType_t uxNumberOfLEDs); + +#endif /* FLASH_TIMER_H */ diff --git a/freertos/cvitek/task/demo/Common/include/flop.h b/freertos/cvitek/task/demo/Common/include/flop.h new file mode 100644 index 000000000..2856a15f7 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/flop.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef FLOP_TASKS_H +#define FLOP_TASKS_H + +void vStartMathTasks(UBaseType_t uxPriority); +BaseType_t xAreMathsTaskStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/integer.h b/freertos/cvitek/task/demo/Common/include/integer.h new file mode 100644 index 000000000..e01c38d9d --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/integer.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef INTEGER_TASKS_H +#define INTEGER_TASKS_H + +void vStartIntegerMathTasks(UBaseType_t uxPriority); +BaseType_t xAreIntegerMathsTaskStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/mevents.h b/freertos/cvitek/task/demo/Common/include/mevents.h new file mode 100644 index 000000000..fdf27c1fd --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/mevents.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef EVENTS_TEST_H +#define EVENTS_TEST_H + +void vStartMultiEventTasks(void); +BaseType_t xAreMultiEventTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/partest.h b/freertos/cvitek/task/demo/Common/include/partest.h new file mode 100644 index 000000000..2ffdccff7 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/partest.h @@ -0,0 +1,37 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef PARTEST_H +#define PARTEST_H + +#define partstDEFAULT_PORT_ADDRESS ((uint16_t)0x378) + +void vParTestInitialise(void); +void vParTestSetLED(UBaseType_t uxLED, BaseType_t xValue); +void vParTestToggleLED(UBaseType_t uxLED); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/print.h b/freertos/cvitek/task/demo/Common/include/print.h new file mode 100644 index 000000000..0c9f3e8ee --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/print.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef PRINT_H +#define PRINT_H + +void vPrintInitialise(void); +void vPrintDisplayMessage(const char *const *pcMessageToSend); +const char *pcPrintGetNextMessage(TickType_t xPrintRate); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/recmutex.h b/freertos/cvitek/task/demo/Common/include/recmutex.h new file mode 100644 index 000000000..eb76cbacb --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/recmutex.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef RECURSIVE_MUTEX_TEST_H +#define RECURSIVE_MUTEX_TEST_H + +void vStartRecursiveMutexTasks(void); +BaseType_t xAreRecursiveMutexTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/semtest.h b/freertos/cvitek/task/demo/Common/include/semtest.h new file mode 100644 index 000000000..2a703a8ff --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/semtest.h @@ -0,0 +1,34 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef SEMAPHORE_TEST_H +#define SEMAPHORE_TEST_H + +void vStartSemaphoreTasks(UBaseType_t uxPriority); +BaseType_t xAreSemaphoreTasksStillRunning(void); + +#endif diff --git a/freertos/cvitek/task/demo/Common/include/serial.h b/freertos/cvitek/task/demo/Common/include/serial.h new file mode 100644 index 000000000..c3cd2c931 --- /dev/null +++ b/freertos/cvitek/task/demo/Common/include/serial.h @@ -0,0 +1,92 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef SERIAL_COMMS_H +#define SERIAL_COMMS_H + +typedef void *xComPortHandle; + +typedef enum { + serCOM1, + serCOM2, + serCOM3, + serCOM4, + serCOM5, + serCOM6, + serCOM7, + serCOM8 +} eCOMPort; + +typedef enum { + serNO_PARITY, + serODD_PARITY, + serEVEN_PARITY, + serMARK_PARITY, + serSPACE_PARITY +} eParity; + +typedef enum { serSTOP_1, serSTOP_2 } eStopBits; + +typedef enum { serBITS_5, serBITS_6, serBITS_7, serBITS_8 } eDataBits; + +typedef enum { + ser50, + ser75, + ser110, + ser134, + ser150, + ser200, + ser300, + ser600, + ser1200, + ser1800, + ser2400, + ser4800, + ser9600, + ser19200, + ser38400, + ser57600, + ser115200 +} eBaud; + +xComPortHandle xSerialPortInitMinimal(unsigned long ulWantedBaud, + portBASE_TYPE uxQueueLength); +xComPortHandle xSerialPortInit(eCOMPort ePort, eBaud eWantedBaud, + eParity eWantedParity, eDataBits eWantedDataBits, + eStopBits eWantedStopBits, + portBASE_TYPE uxBufferLength); +void vSerialPutString(xComPortHandle pxPort, const signed char *const pcString, + unsigned short usStringLength); +portBASE_TYPE xSerialGetChar(xComPortHandle pxPort, + signed char *pcRxedChar, + TickType_t xBlockTime); +portBASE_TYPE xSerialPutChar(xComPortHandle pxPort, signed char cOutChar, + TickType_t xBlockTime); +portBASE_TYPE xSerialWaitForSemaphore(xComPortHandle xPort); +void vSerialClose(xComPortHandle xPort); + +#endif diff --git a/freertos/cvitek/task/demo/Full_Demo/CMakeLists.txt b/freertos/cvitek/task/demo/Full_Demo/CMakeLists.txt new file mode 100644 index 000000000..32b0ce6e4 --- /dev/null +++ b/freertos/cvitek/task/demo/Full_Demo/CMakeLists.txt @@ -0,0 +1,19 @@ +if (CHIP STREQUAL "cv1835") +file(GLOB _SOURCES "*.c" "*regTest.S" "../Common/Minimal/*.c") +else() +file(GLOB _SOURCES "*.c" "RegTest_riscv.S" "../Common/Minimal/*.c") +endif() + +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__BUILD_RTOS_KERNEL__") + +include_directories(".") +include_directories("../Common/include") +include_directories(src) +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) + +add_library(demo STATIC ${_SOURCES}) +install(TARGETS demo DESTINATION lib) + diff --git a/freertos/cvitek/task/demo/Full_Demo/RegTest_riscv.S b/freertos/cvitek/task/demo/Full_Demo/RegTest_riscv.S new file mode 100644 index 000000000..283452161 --- /dev/null +++ b/freertos/cvitek/task/demo/Full_Demo/RegTest_riscv.S @@ -0,0 +1,276 @@ +/* + * FreeRTOS V202111.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + .extern ullRegTest1LoopCounter + .extern ullRegTest2LoopCounter + + .global vRegTest1Implementation + .global vRegTest2Implementation + +/*-----------------------------------------------------------*/ + +/* + * The register check tasks are described in the comments at the top of + * main_full.c. + */ + +.align( 4 ) +vRegTest1Implementation: + + /* Fill the core registers with known values. */ + li x5, 0x5 + li x6, 0x6 + li x7, 0x7 + li x8, 0x8 + li x9, 0x9 + li x10, 0xa + li x11, 0xb + li x12, 0xc + li x13, 0xd + li x14, 0xe + li x15, 0xf + li x16, 0x10 + li x17, 0x11 + li x18, 0x12 + li x19, 0x13 + li x20, 0x14 + li x21, 0x15 + li x22, 0x16 + li x23, 0x17 + li x24, 0x18 + li x25, 0x19 + li x26, 0x1a + li x27, 0x1b + li x28, 0x1c + li x29, 0x1d + li x30, 0x1e + +reg1_loop: + + /* Check each register still contains the expected known value. + vRegTest1Implementation uses x31 as the temporary, vRegTest2Implementation + uses x5 as the temporary. */ + li x31, 0x5 + bne x31, x5, reg1_error_loop + li x31, 0x6 + bne x31, x6, reg1_error_loop + li x31, 0x7 + bne x31, x7, reg1_error_loop + li x31, 0x8 + bne x31, x8, reg1_error_loop + li x31, 0x9 + bne x31, x9, reg1_error_loop + li x31, 0xa + bne x31, x10, reg1_error_loop + li x31, 0xb + bne x31, x11, reg1_error_loop + li x31, 0xc + bne x31, x12, reg1_error_loop + li x31, 0xd + bne x31, x13, reg1_error_loop + li x31, 0xe + bne x31, x14, reg1_error_loop + li x31, 0xf + bne x31, x15, reg1_error_loop + li x31, 0x10 + bne x31, x16, reg1_error_loop + li x31, 0x11 + bne x31, x17, reg1_error_loop + li x31, 0x12 + bne x31, x18, reg1_error_loop + li x31, 0x13 + bne x31, x19, reg1_error_loop + li x31, 0x14 + bne x31, x20, reg1_error_loop + li x31, 0x15 + bne x31, x21, reg1_error_loop + li x31, 0x16 + bne x31, x22, reg1_error_loop + li x31, 0x17 + bne x31, x23, reg1_error_loop + li x31, 0x18 + bne x31, x24, reg1_error_loop + li x31, 0x19 + bne x31, x25, reg1_error_loop + li x31, 0x1a + bne x31, x26, reg1_error_loop + li x31, 0x1b + bne x31, x27, reg1_error_loop + li x31, 0x1c + bne x31, x28, reg1_error_loop + li x31, 0x1d + bne x31, x29, reg1_error_loop + li x31, 0x1e + bne x31, x30, reg1_error_loop + + /* Everything passed, increment the loop counter. */ +#if 1 + ld x31, ullRegTest1LoopCounterConst + ld x30, 0(x31) + addi x30, x30, 1 + sd x30, 0(x31) +#else + lw x31, ullRegTest1LoopCounterConst + lw x30, 0(x31) + addi x30, x30, 1 + sw x30, 0(x31) +#endif + /* Restore clobbered register reading for next loop. */ + li x30, 0x1e + + /* Yield to increase code coverage. */ + ecall + + /* Start again. */ + jal reg1_loop + +reg1_error_loop: + /* Jump here if a register contains an uxpected value. This stops the loop + counter being incremented so the check task knows an error was found. */ + jal reg1_error_loop + +.align( 8 ) +ullRegTest1LoopCounterConst: .dword ullRegTest1LoopCounter + +/*-----------------------------------------------------------*/ + +.align( 8 ) +vRegTest2Implementation: + + /* Fill the core registers with known values. */ + li x6, 0x61 + li x7, 0x71 + li x8, 0x81 + li x9, 0x91 + li x10, 0xa1 + li x11, 0xb1 + li x12, 0xc1 + li x13, 0xd1 + li x14, 0xe1 + li x15, 0xf1 + li x16, 0x20 + li x17, 0x21 + li x18, 0x22 + li x19, 0x23 + li x20, 0x24 + li x21, 0x25 + li x22, 0x26 + li x23, 0x27 + li x24, 0x28 + li x25, 0x29 + li x26, 0x2a + li x27, 0x2b + li x28, 0x2c + li x29, 0x2d + li x30, 0x2e + li x31, 0x2f + +Reg2_loop: + + /* Check each register still contains the expected known value. + vRegTest2Implementation uses x5 as the temporary, vRegTest1Implementation + uses x31 as the temporary. */ + li x5, 0x61 + bne x5, x6, reg2_error_loop + li x5, 0x71 + bne x5, x7, reg2_error_loop + li x5, 0x81 + bne x5, x8, reg2_error_loop + li x5, 0x91 + bne x5, x9, reg2_error_loop + li x5, 0xa1 + bne x5, x10, reg2_error_loop + li x5, 0xb1 + bne x5, x11, reg2_error_loop + li x5, 0xc1 + bne x5, x12, reg2_error_loop + li x5, 0xd1 + bne x5, x13, reg2_error_loop + li x5, 0xe1 + bne x5, x14, reg2_error_loop + li x5, 0xf1 + bne x5, x15, reg2_error_loop + li x5, 0x20 + bne x5, x16, reg2_error_loop + li x5, 0x21 + bne x5, x17, reg2_error_loop + li x5, 0x22 + bne x5, x18, reg2_error_loop + li x5, 0x23 + bne x5, x19, reg2_error_loop + li x5, 0x24 + bne x5, x20, reg2_error_loop + li x5, 0x25 + bne x5, x21, reg2_error_loop + li x5, 0x26 + bne x5, x22, reg2_error_loop + li x5, 0x27 + bne x5, x23, reg2_error_loop + li x5, 0x28 + bne x5, x24, reg2_error_loop + li x5, 0x29 + bne x5, x25, reg2_error_loop + li x5, 0x2a + bne x5, x26, reg2_error_loop + li x5, 0x2b + bne x5, x27, reg2_error_loop + li x5, 0x2c + bne x5, x28, reg2_error_loop + li x5, 0x2d + bne x5, x29, reg2_error_loop + li x5, 0x2e + bne x5, x30, reg2_error_loop + li x5, 0x2f + bne x5, x31, reg2_error_loop + + /* Everything passed, increment the loop counter. */ +#if 1 + ld x5, ullRegTest2LoopCounterConst + ld x6, 0(x5) + addi x6, x6, 1 + sd x6, 0(x5) +#else + lw x5, ullRegTest2LoopCounterConst + lw x6, 0(x5) + addi x6, x6, 1 + sw x6, 0(x5) +#endif + /* Restore clobbered register reading for next loop. */ + li x6, 0x61 + + /* Start again. */ + jal Reg2_loop + +reg2_error_loop: + /* Jump here if a register contains an uxpected value. This stops the loop + counter being incremented so the check task knows an error was found. */ + jal reg2_error_loop + +.align( 8 ) +ullRegTest2LoopCounterConst: .dword ullRegTest2LoopCounter + + diff --git a/freertos/cvitek/task/demo/Full_Demo/main_full.c b/freertos/cvitek/task/demo/Full_Demo/main_full.c new file mode 100644 index 000000000..e8c1067b2 --- /dev/null +++ b/freertos/cvitek/task/demo/Full_Demo/main_full.c @@ -0,0 +1,447 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/****************************************************************************** + * NOTE 1: This project provides two demo applications. A simple blinky + * style project, and a more comprehensive test and demo application. The + * RUN_TYPE in build.sh setting in main.c is used to select between the two. + * See the notes on using RUN_TYPE in build.sh where it is defined below. + * + * NOTE 2: This file only contains the source code that is not specific to + * either the simply blinky or full demos - this includes initialisation code + * and callback functions. + * + * NOTE 3: This project builds the FreeRTOS source code, so is expecting the + * BSP project to be configured as a 'standalone' bsp project rather than a + * 'FreeRTOS' bsp project. However the BSP project MUST still be build with + * the FREERTOS_BSP symbol defined (-DFREERTOS_BSP must be added to the + * command line in the BSP configuration). + ****************************************************************************** + * + * main_full() creates all the demo application tasks and software timers, then + * starts the scheduler. The web documentation provides more details of the + * standard demo application tasks, which provide no particular functionality, + * but do provide a good example of how to use the FreeRTOS API. + * + * In addition to the standard demo tasks, the following tasks and tests are + * defined and/or created within this file: + * + * "Reg test" tasks - These fill both the core and floating point registers with + * known values, then check that each register maintains its expected value for + * the lifetime of the task. Each task uses a different set of values. The reg + * test tasks execute with a very low priority, so get preempted very + * frequently. A register containing an unexpected value is indicative of an + * error in the context switching mechanism. + * + * "Check" task - The check task period is set to five seconds. Each time it + * executes it checks all the standard demo tasks, and the register check tasks, + * are not only still executing, but are executing without reporting any errors, + * then outputs the system status to the UART. + */ + +/* Standard includes. */ +#include <stdio.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" +#include "semphr.h" + +/* Standard demo application includes. */ +#include "flop.h" +#include "semtest.h" +#include "dynamic.h" +#include "blocktim.h" +#include "countsem.h" +#include "GenQTest.h" +#include "recmutex.h" +#include "EventGroupsDemo.h" +#include "TaskNotify.h" +#include "IntSemTest.h" +#include "StaticAllocation.h" +#include "AbortDelay.h" +#include "QueueOverwrite.h" +#include "TimerDemo.h" + +/* Xilinx includes. */ +#include "printf.h" + +/* Priorities for the demo application tasks. */ +#define mainSEM_TEST_PRIORITY (tskIDLE_PRIORITY + (UBaseType_t)1) +#define mainBLOCK_Q_PRIORITY (tskIDLE_PRIORITY + (UBaseType_t)2) +#define mainCREATOR_TASK_PRIORITY (tskIDLE_PRIORITY + (UBaseType_t)3) +#define mainFLOP_TASK_PRIORITY (tskIDLE_PRIORITY) +#define mainUART_COMMAND_CONSOLE_STACK_SIZE \ + (configMINIMAL_STACK_SIZE * (UBaseType_t)3) +#define mainCOM_TEST_TASK_PRIORITY (tskIDLE_PRIORITY + (UBaseType_t)2) +#define mainCHECK_TASK_PRIORITY (configMAX_PRIORITIES - (UBaseType_t)1) +#define mainQUEUE_OVERWRITE_PRIORITY (tskIDLE_PRIORITY) + +/* A block time of zero simply means "don't block". */ +#define mainDONT_BLOCK ((TickType_t)0) + +/* The period of the check task, in ms. */ +#define mainNO_ERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS((TickType_t)20000) + +/* Parameters that are passed into the register check tasks solely for the +purpose of ensuring parameters are passed into tasks correctly. */ +#define mainREG_TEST_TASK_1_PARAMETER ((void *)0x12345678) +#define mainREG_TEST_TASK_2_PARAMETER ((void *)0x87654321) + +/* The base period used by the timer test tasks. */ +#define mainTIMER_TEST_PERIOD (50) + +/*-----------------------------------------------------------*/ + +/* + * The check task, as described at the top of this file. + */ +static void prvCheckTask(void *pvParameters); + +/* + * Register check tasks, and the tasks used to write over and check the contents + * of the FPU registers, as described at the top of this file. The nature of + * these files necessitates that they are written in an assembly file, but the + * entry points are kept in the C file for the convenience of checking the task + * parameter. + */ +static void prvRegTestTaskEntry1(void *pvParameters); +extern void vRegTest1Implementation(void); +static void prvRegTestTaskEntry2(void *pvParameters); +extern void vRegTest2Implementation(void); + +/* + * Register commands that can be used with FreeRTOS+CLI. The commands are + * defined in CLI-Commands.c and File-Related-CLI-Command.c respectively. + */ +extern void vRegisterSampleCLICommands(void); + +/* + * The task that manages the FreeRTOS+CLI input and output. + */ +extern void vUARTCommandConsoleStart(uint16_t usStackSize, + UBaseType_t uxPriority); + +/* + * A high priority task that does nothing other than execute at a pseudo random + * time to ensure the other test tasks don't just execute in a repeating + * pattern. + */ +static void prvPseudoRandomiser(void *pvParameters); + +/* + * The full demo uses the tick hook function to include test code in the tick + * interrupt. vFullDemoTickHook() is called by vApplicationTickHook(), which + * is defined in main.c. + */ +void vFullDemoTickHook(void); + +/*-----------------------------------------------------------*/ + +/* The following two variables are used to communicate the status of the +register check tasks to the check task. If the variables keep incrementing, +then the register check tasks have not discovered any errors. If a variable +stops incrementing, then an error has been found. */ +volatile uint64_t ullRegTest1LoopCounter = 0ULL, ullRegTest2LoopCounter = 0ULL; + +/*-----------------------------------------------------------*/ + +void main_full(void) +{ +/* Start all the other standard demo/test tasks. They have no particular + functionality, but do demonstrate how to use the FreeRTOS API and test the + kernel port. */ + vStartDynamicPriorityTasks(); + vCreateBlockTimeTasks(); + vStartCountingSemaphoreTasks(); + vStartGenericQueueTasks(tskIDLE_PRIORITY); + vStartRecursiveMutexTasks(); + vStartSemaphoreTasks(mainSEM_TEST_PRIORITY); + vStartMathTasks(mainFLOP_TASK_PRIORITY); + vStartEventGroupTasks(); + vStartTaskNotifyTask(); + vStartInterruptSemaphoreTasks(); + vStartStaticallyAllocatedTasks(); + vCreateAbortDelayTasks(); + vStartQueueOverwriteTask(mainQUEUE_OVERWRITE_PRIORITY); + vStartTimerDemoTask(mainTIMER_TEST_PERIOD); + + /* Create the register check tasks, as described at the top of this file */ + xTaskCreate(prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, + mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL); + xTaskCreate(prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, + mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL); + + /* Create the task that just adds a little random behaviour. */ + xTaskCreate(prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, + configMAX_PRIORITIES - 1, NULL); + + /* Create the task that performs the 'check' functionality, as described at + the top of this file. */ + xTaskCreate(prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, + mainCHECK_TASK_PRIORITY, NULL); + + /* Start the scheduler. */ + vTaskStartScheduler(); + + /* If all is well, the scheduler will now be running, and the following + line will never be reached. If the following line does execute, then + there was either insufficient FreeRTOS heap memory available for the idle + and/or timer tasks to be created, or vTaskStartScheduler() was called from + User mode. See the memory management section on the FreeRTOS web site for + more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The + mode from which main() is called is set in the C start up code and must be + a privileged mode (not user mode). */ + for (;;) + ; +} +/*-----------------------------------------------------------*/ + +static void prvCheckTask(void *pvParameters) +{ + TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD; + TickType_t xLastExecutionTime; + static uint64_t ullLastRegTest1Value = 0, ullLastRegTest2Value = 0; + uint64_t ullErrorFound = pdFALSE; + const char *pcStatusString = "Pass"; + + /* Just to stop compiler warnings. */ + (void)pvParameters; + + /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil() + works correctly. */ + xLastExecutionTime = xTaskGetTickCount(); + + /* Cycle for ever, delaying then checking all the other tasks are still + operating without error. The system status is written to the UART on each + iteration. */ + for (;;) { + /* Delay until it is time to execute again. */ + vTaskDelayUntil(&xLastExecutionTime, xDelayPeriod); + +/* Check all the demo tasks (other than the flash tasks) to ensure + that they are all still running, and that none have detected an error. */ +#if 0 //There are not 3 timers to trigger interrupt + if( xAreIntQueueTasksStillRunning() != pdTRUE ) + { + ullErrorFound |= 1ULL << 0ULL; + pcStatusString = "Error: IntQ"; + } +#endif + + if (xAreMathsTaskStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 1ULL; + pcStatusString = "Error: Math"; + } + + if (xAreDynamicPriorityTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 2ULL; + pcStatusString = "Error: Dynamic"; + } + + if (xAreBlockTimeTestTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 4ULL; + pcStatusString = "Error: Block Time"; + } + + if (xAreGenericQueueTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 5ULL; + pcStatusString = "Error: Generic Queue"; + } + + if (xAreRecursiveMutexTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 6ULL; + pcStatusString = "Error: Recursive Mutex"; + } + + if (xAreSemaphoreTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 8ULL; + pcStatusString = "Error: Semaphore"; + } + + if (xAreCountingSemaphoreTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 10ULL; + pcStatusString = "Error: Counting Semaphore"; + } + + if (xAreEventGroupTasksStillRunning() != pdPASS) { + ullErrorFound |= 1ULL << 12ULL; + pcStatusString = "Error: Event Group"; + } + + if (xAreTaskNotificationTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 13ULL; + pcStatusString = "Error: Task Notifications"; + } + + if (xAreInterruptSemaphoreTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 14ULL; + pcStatusString = "Error: Interrupt Semaphore"; + } + + if (xAreStaticAllocationTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 15ULL; + pcStatusString = "Error: Static Allocation"; + } + + if (xAreAbortDelayTestTasksStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 16ULL; + pcStatusString = "Error: Abort Delay"; + } + + if (xIsQueueOverwriteTaskStillRunning() != pdTRUE) { + ullErrorFound |= 1ULL << 17ULL; + pcStatusString = "Error: Queue Overwrite"; + } + + if (xAreTimerDemoTasksStillRunning(xDelayPeriod) != pdTRUE) { + ullErrorFound |= 1ULL << 18ULL; + pcStatusString = "Error: Timer Demo"; + } + + /* Check that the register test 1 task is still running. */ + if (ullLastRegTest1Value == ullRegTest1LoopCounter) { + ullErrorFound |= 1ULL << 17ULL; + pcStatusString = "Error: Reg Test 1"; + } + ullLastRegTest1Value = ullRegTest1LoopCounter; + + /* Check that the register test 2 task is still running. */ + if (ullLastRegTest2Value == ullRegTest2LoopCounter) { + ullErrorFound |= 1ULL << 18ULL; + pcStatusString = "Error: Reg Test 2"; + } + ullLastRegTest2Value = ullRegTest2LoopCounter; + + /* Output the system status string. */ + printf("%s, status code = %lx, tick count = %ld\r\n", + pcStatusString, ullErrorFound, xTaskGetTickCount()); + + configASSERT(ullErrorFound == pdFALSE); + } +} +/*-----------------------------------------------------------*/ + +static void prvRegTestTaskEntry1(void *pvParameters) +{ + /* Although the regtest task is written in assembler, its entry point is + written in C for convenience of checking the task parameter is being passed + in correctly. */ + if (pvParameters == mainREG_TEST_TASK_1_PARAMETER) { + /* The reg test task also tests the floating point registers. Tasks + that use the floating point unit must call vPortTaskUsesFPU() before + any floating point instructions are executed. */ + /* riscv64 enable fpu in start.S*/ + #if defined(__aarch64__) + vPortTaskUsesFPU(); + #endif + + /* Start the part of the test that is written in assembler. */ + vRegTest1Implementation(); + } + + /* The following line will only execute if the task parameter is found to + be incorrect. The check task will detect that the regtest loop counter is + not being incremented and flag an error. */ + vTaskDelete(NULL); +} +/*-----------------------------------------------------------*/ + +static void prvRegTestTaskEntry2(void *pvParameters) +{ + /* Although the regtest task is written in assembler, its entry point is + written in C for convenience of checking the task parameter is being passed + in correctly. */ + if (pvParameters == mainREG_TEST_TASK_2_PARAMETER) { + /* The reg test task also tests the floating point registers. Tasks + that use the floating point unit must call vPortTaskUsesFPU() before + any floating point instructions are executed. */ + /* riscv64 enable fpu in start.S*/ + #if defined(__aarch64__) + vPortTaskUsesFPU(); + #endif + + /* Start the part of the test that is written in assembler. */ + vRegTest2Implementation(); + } + + /* The following line will only execute if the task parameter is found to + be incorrect. The check task will detect that the regtest loop counter is + not being incremented and flag an error. */ + vTaskDelete(NULL); +} +/*-----------------------------------------------------------*/ + +static void prvPseudoRandomiser(void *pvParameters) +{ + const uint64_t ullMultiplier = 0x015a4e35ULL, ullIncrement = 1ULL, + ullMinDelay = pdMS_TO_TICKS(95); + volatile uint64_t ullNextRand = (uint64_t)&pvParameters, ullValue; + + /* This task does nothing other than ensure there is a little bit of + disruption in the scheduling pattern of the other tasks. Normally this is + done by generating interrupts at pseudo random times. */ + for (;;) { + ullNextRand = (ullMultiplier * ullNextRand) + ullIncrement; + ullValue = (ullNextRand >> 16ULL) & 0xffULL; + + if (ullValue < ullMinDelay) { + ullValue = ullMinDelay; + } + + vTaskDelay(ullValue); + + while (ullValue > 0) { + __asm volatile("NOP"); + __asm volatile("NOP"); + __asm volatile("NOP"); + __asm volatile("NOP"); + ullValue--; + } + } +} +/*-----------------------------------------------------------*/ + +void vFullDemoTickHook(void) +{ + /* The full demo includes a software timer demo/test that requires + prodding periodically from the tick interrupt. */ + vTimerPeriodicISRTests(); + + /* Call the periodic queue overwrite from ISR demo. */ + vQueueOverwritePeriodicISRDemo(); + + /* Call the periodic event group from ISR demo. */ + vPeriodicEventGroupsProcessing(); + + /* Call the ISR component of the interrupt semaphore test. */ + vInterruptSemaphorePeriodicTest(); + + /* Call the code that 'gives' a task notification from an ISR. */ + xNotifyTaskFromISR(); +} diff --git a/freertos/cvitek/task/demo/Full_Demo/reg_test.S b/freertos/cvitek/task/demo/Full_Demo/reg_test.S new file mode 100644 index 000000000..36b64be50 --- /dev/null +++ b/freertos/cvitek/task/demo/Full_Demo/reg_test.S @@ -0,0 +1,565 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + .global vRegTest1Implementation + .global vRegTest2Implementation + .extern ullRegTest1LoopCounter + .extern ullRegTest2LoopCounter + + .text + + /* This function is explained in the comments at the top of main-full.c. */ +.type vRegTest1Implementation, %function +vRegTest1Implementation: + + /* Fill each general purpose register with a known value. */ + mov x0, #0xff + mov x1, #0x01 + mov x2, #0x02 + mov x3, #0x03 + mov x4, #0x04 + mov x5, #0x05 + mov x6, #0x06 + mov x7, #0x07 + mov x8, #0x08 + mov x9, #0x09 + mov x10, #0x10 + mov x11, #0x11 + mov x12, #0x12 + mov x13, #0x13 + mov x14, #0x14 + mov x15, #0x15 + mov x16, #0x16 + mov x17, #0x17 + mov x18, #0x18 + mov x19, #0x19 + mov x20, #0x20 + mov x21, #0x21 + mov x22, #0x22 + mov x23, #0x23 + mov x24, #0x24 + mov x25, #0x25 + mov x26, #0x26 + mov x27, #0x27 + mov x28, #0x28 + mov x29, #0x29 + mov x30, #0x30 + + /* Fill each FPU register with a known value. */ + fmov v0.d[1], x0 + fmov d1, x1 + fmov d2, x2 + fmov d3, x3 + fmov d4, x4 + fmov d5, x5 + fmov d6, x6 + fmov d7, x7 + fmov d8, x8 + fmov d9, x9 + fmov d10, x10 + fmov d11, x11 + fmov d12, x12 + fmov d13, x13 + fmov d14, x14 + fmov d15, x15 + fmov d16, x16 + fmov d17, x17 + fmov d18, x18 + fmov d19, x19 + fmov d20, x20 + fmov d21, x21 + fmov d22, x22 + fmov d23, x23 + fmov d24, x24 + fmov d25, x25 + fmov d26, x26 + fmov d27, x27 + fmov d28, x28 + fmov d29, x29 + fmov v30.d[1], x30 + fmov d31, xzr + + /* Loop, checking each itteration that each register still contains the + expected value. */ +reg1_loop: + /* Yield to increase test coverage */ +#if 0 /* Do not change to EL3. It's no need to jump to EL3 vector. */ + SMC 0 +#endif + + /* Test each general purpose register to check that it still contains the + expected known value, jumping to reg1_error_loop if any register contains + an unexpected value. */ + cmp x0, #0xFF + bne reg1_error_loop + cmp x1, #0x01 + bne reg1_error_loop + cmp x2, #0x02 + bne reg1_error_loop + cmp x3, #0x03 + bne reg1_error_loop + cmp x4, #0x04 + bne reg1_error_loop + cmp x5, #0x05 + bne reg1_error_loop + cmp x6, #0x06 + bne reg1_error_loop + cmp x7, #0x07 + bne reg1_error_loop + cmp x8, #0x08 + bne reg1_error_loop + cmp x9, #0x09 + bne reg1_error_loop + cmp x10, #0x10 + bne reg1_error_loop + cmp x11, #0x11 + bne reg1_error_loop + cmp x12, #0x12 + bne reg1_error_loop + cmp x13, #0x13 + bne reg1_error_loop + cmp x14, #0x14 + bne reg1_error_loop + cmp x15, #0x15 + bne reg1_error_loop + cmp x16, #0x16 + bne reg1_error_loop + cmp x17, #0x17 + bne reg1_error_loop + cmp x18, #0x18 + bne reg1_error_loop + cmp x19, #0x19 + bne reg1_error_loop + cmp x20, #0x20 + bne reg1_error_loop + cmp x21, #0x21 + bne reg1_error_loop + cmp x22, #0x22 + bne reg1_error_loop + cmp x23, #0x23 + bne reg1_error_loop + cmp x24, #0x24 + bne reg1_error_loop + cmp x25, #0x25 + bne reg1_error_loop + cmp x26, #0x26 + bne reg1_error_loop + cmp x27, #0x27 + bne reg1_error_loop + cmp x28, #0x28 + bne reg1_error_loop + cmp x29, #0x29 + bne reg1_error_loop + cmp x30, #0x30 + bne reg1_error_loop + + /* Check every floating point register to ensure it contains the expected + value. First save the registers clobbered by the test. */ + stp x0, x1, [sp,#-0x10]! + + fmov x0, v0.d[1] + cmp x0, 0xff + bne reg1_error_loop + fmov x0, d1 + cmp x0, 0x01 + bne reg1_error_loop + fmov x0, d2 + cmp x0, 0x02 + bne reg1_error_loop + fmov x0, d3 + cmp x0, 0x03 + bne reg1_error_loop + fmov x0, d4 + cmp x0, 0x04 + bne reg1_error_loop + fmov x0, d5 + cmp x0, 0x05 + bne reg1_error_loop + fmov x0, d6 + cmp x0, 0x06 + bne reg1_error_loop + fmov x0, d7 + cmp x0, 0x07 + bne reg1_error_loop + fmov x0, d8 + cmp x0, 0x08 + bne reg1_error_loop + fmov x0, d9 + cmp x0, 0x09 + bne reg1_error_loop + fmov x0, d10 + cmp x0, 0x10 + bne reg1_error_loop + fmov x0, d11 + cmp x0, 0x11 + bne reg1_error_loop + fmov x0, d12 + cmp x0, 0x12 + bne reg1_error_loop + fmov x0, d13 + cmp x0, 0x13 + bne reg1_error_loop + fmov x0, d14 + cmp x0, 0x14 + bne reg1_error_loop + fmov x0, d15 + cmp x0, 0x15 + bne reg1_error_loop + fmov x0, d16 + cmp x0, 0x16 + bne reg1_error_loop + fmov x0, d17 + cmp x0, 0x17 + bne reg1_error_loop + fmov x0, d18 + cmp x0, 0x18 + bne reg1_error_loop + fmov x0, d19 + cmp x0, 0x19 + bne reg1_error_loop + fmov x0, d20 + cmp x0, 0x20 + bne reg1_error_loop + fmov x0, d21 + cmp x0, 0x21 + bne reg1_error_loop + fmov x0, d22 + cmp x0, 0x22 + bne reg1_error_loop + fmov x0, d23 + cmp x0, 0x23 + bne reg1_error_loop + fmov x0, d24 + cmp x0, 0x24 + bne reg1_error_loop + fmov x0, d25 + cmp x0, 0x25 + bne reg1_error_loop + fmov x0, d26 + cmp x0, 0x26 + bne reg1_error_loop + fmov x0, d27 + cmp x0, 0x27 + bne reg1_error_loop + fmov x0, d28 + cmp x0, 0x28 + bne reg1_error_loop + fmov x0, d29 + cmp x0, 0x29 + bne reg1_error_loop + fmov x0, v30.d[1] + cmp x0, 0x30 + bne reg1_error_loop + fmov x0, d31 + cmp x0, 0x00 + bne reg1_error_loop + + /* Restore the registers clobbered by the test. */ + ldp x0, x1, [sp], #0x10 + + /* Everything passed, increment the loop counter. */ + stp x0, x1, [sp,#-0x10]! + ldr x0, =ullRegTest1LoopCounter + ldr x1, [x0] + adds x1, x1, #1 + str x1, [x0] + ldp x0, x1, [sp], #0x10 + + /* Start again. */ + b reg1_loop + +reg1_error_loop: + /* If this line is hit then there was an error in a core register value. + The loop ensures the loop counter stops incrementing. */ + b reg1_error_loop + nop + +/*-----------------------------------------------------------*/ + +.type vRegTest2Implementation, %function +vRegTest2Implementation: + + /* Fill each general purpose register with a known value. */ + mov x0, #0xff0 + mov x1, #0x010 + mov x2, #0x020 + mov x3, #0x030 + mov x4, #0x040 + mov x5, #0x050 + mov x6, #0x060 + mov x7, #0x070 + mov x8, #0x080 + mov x9, #0x090 + mov x10, #0x100 + mov x11, #0x110 + mov x12, #0x120 + mov x13, #0x130 + mov x14, #0x140 + mov x15, #0x150 + mov x16, #0x160 + mov x17, #0x170 + mov x18, #0x180 + mov x19, #0x190 + mov x20, #0x200 + mov x21, #0x210 + mov x22, #0x220 + mov x23, #0x230 + mov x24, #0x240 + mov x25, #0x250 + mov x26, #0x260 + mov x27, #0x270 + mov x28, #0x280 + mov x29, #0x290 + mov x30, #0x300 + + /* Fill each FPU register with a known value. */ + fmov d0, x0 + fmov d1, x1 + fmov d2, x2 + fmov d3, x3 + fmov d4, x4 + fmov d5, x5 + fmov d6, x6 + fmov d7, x7 + fmov d8, x8 + fmov d9, x9 + fmov v10.d[1], x10 + fmov d11, x11 + fmov d12, x12 + fmov d13, x13 + fmov d14, x14 + fmov d15, x15 + fmov d16, x16 + fmov d17, x17 + fmov d18, x18 + fmov d19, x19 + fmov d20, x20 + fmov d21, x21 + fmov d22, x22 + fmov d23, x23 + fmov d24, x24 + fmov d25, x25 + fmov d26, x26 + fmov v27.d[1], x27 + fmov d28, x28 + fmov d29, x29 + fmov d30, x30 + fmov d31, x0 + + /* Loop, checking each itteration that each register still contains the + expected value. */ +reg2_loop: + + /* Test each general purpose register to check that it still contains the + expected known value, jumping to reg2_error_loop if any register contains + an unexpected value. */ + cmp x0, #0xFF0 + bne reg2_error_loop + cmp x1, #0x010 + bne reg2_error_loop + cmp x2, #0x020 + bne reg2_error_loop + cmp x3, #0x030 + bne reg2_error_loop + cmp x4, #0x040 + bne reg2_error_loop + cmp x5, #0x050 + bne reg2_error_loop + cmp x6, #0x060 + bne reg2_error_loop + cmp x7, #0x070 + bne reg2_error_loop + cmp x8, #0x080 + bne reg2_error_loop + cmp x9, #0x090 + bne reg2_error_loop + cmp x10, #0x100 + bne reg2_error_loop + cmp x11, #0x110 + bne reg2_error_loop + cmp x12, #0x120 + bne reg2_error_loop + cmp x13, #0x130 + bne reg2_error_loop + cmp x14, #0x140 + bne reg2_error_loop + cmp x15, #0x150 + bne reg2_error_loop + cmp x16, #0x160 + bne reg2_error_loop + cmp x17, #0x170 + bne reg2_error_loop + cmp x18, #0x180 + bne reg2_error_loop + cmp x19, #0x190 + bne reg2_error_loop + cmp x20, #0x200 + bne reg2_error_loop + cmp x21, #0x210 + bne reg2_error_loop + cmp x22, #0x220 + bne reg2_error_loop + cmp x23, #0x230 + bne reg2_error_loop + cmp x24, #0x240 + bne reg2_error_loop + cmp x25, #0x250 + bne reg2_error_loop + cmp x26, #0x260 + bne reg2_error_loop + cmp x27, #0x270 + bne reg2_error_loop + cmp x28, #0x280 + bne reg2_error_loop + cmp x29, #0x290 + bne reg2_error_loop + cmp x30, #0x300 + bne reg2_error_loop + + /* Check every floating point register to ensure it contains the expected + value. First save the registers clobbered by the test. */ + stp x0, x1, [sp,#-0x10]! + + fmov x0, d0 + cmp x0, 0xff0 + bne reg1_error_loop + fmov x0, d1 + cmp x0, 0x010 + bne reg1_error_loop + fmov x0, d2 + cmp x0, 0x020 + bne reg1_error_loop + fmov x0, d3 + cmp x0, 0x030 + bne reg1_error_loop + fmov x0, d4 + cmp x0, 0x040 + bne reg1_error_loop + fmov x0, d5 + cmp x0, 0x050 + bne reg1_error_loop + fmov x0, d6 + cmp x0, 0x060 + bne reg1_error_loop + fmov x0, d7 + cmp x0, 0x070 + bne reg1_error_loop + fmov x0, d8 + cmp x0, 0x080 + bne reg1_error_loop + fmov x0, d9 + cmp x0, 0x090 + bne reg1_error_loop + fmov x0, v10.d[1] + cmp x0, 0x100 + bne reg1_error_loop + fmov x0, d11 + cmp x0, 0x110 + bne reg1_error_loop + fmov x0, d12 + cmp x0, 0x120 + bne reg1_error_loop + fmov x0, d13 + cmp x0, 0x130 + bne reg1_error_loop + fmov x0, d14 + cmp x0, 0x140 + bne reg1_error_loop + fmov x0, d15 + cmp x0, 0x150 + bne reg1_error_loop + fmov x0, d16 + cmp x0, 0x160 + bne reg1_error_loop + fmov x0, d17 + cmp x0, 0x170 + bne reg1_error_loop + fmov x0, d18 + cmp x0, 0x180 + bne reg1_error_loop + fmov x0, d19 + cmp x0, 0x190 + bne reg1_error_loop + fmov x0, d20 + cmp x0, 0x200 + bne reg1_error_loop + fmov x0, d21 + cmp x0, 0x210 + bne reg1_error_loop + fmov x0, d22 + cmp x0, 0x220 + bne reg1_error_loop + fmov x0, d23 + cmp x0, 0x230 + bne reg1_error_loop + fmov x0, d24 + cmp x0, 0x240 + bne reg1_error_loop + fmov x0, d25 + cmp x0, 0x250 + bne reg1_error_loop + fmov x0, d26 + cmp x0, 0x260 + bne reg1_error_loop + fmov x0, v27.d[1] + cmp x0, 0x270 + bne reg1_error_loop + fmov x0, d28 + cmp x0, 0x280 + bne reg1_error_loop + fmov x0, d29 + cmp x0, 0x290 + bne reg1_error_loop + fmov x0, d30 + cmp x0, 0x300 + bne reg1_error_loop + fmov x0, d31 + cmp x0, 0xff0 + bne reg1_error_loop + + /* Restore the registers clobbered by the test. */ + ldp x0, x1, [sp], #0x10 + + /* Everything passed, increment the loop counter. */ + stp x0, x1, [sp,#-0x10]! + ldr x0, =ullRegTest2LoopCounter + ldr x1, [x0] + adds x1, x1, #1 + str x1, [x0] + ldp x0, x1, [sp], #0x10 + + /* Start again. */ + b reg2_loop + +reg2_error_loop: + /* If this line is hit then there was an error in a core register value. + The loop ensures the loop counter stops incrementing. */ + b reg2_error_loop + nop + + .end + diff --git a/freertos/cvitek/task/demo/POSIX_Demo/CMakeLists.txt b/freertos/cvitek/task/demo/POSIX_Demo/CMakeLists.txt new file mode 100644 index 000000000..4030dcb2b --- /dev/null +++ b/freertos/cvitek/task/demo/POSIX_Demo/CMakeLists.txt @@ -0,0 +1,15 @@ +set(KERNEL_SOURCE ${TOP_DIR}/../Source) + +file(GLOB _SOURCES "*.c") + +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__BUILD_RTOS_KERNEL__") + +include_directories(".") +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel/FreeRTOS_POSIX) + +add_library(demo STATIC ${_SOURCES}) +install(TARGETS demo DESTINATION lib) + diff --git a/freertos/cvitek/task/demo/POSIX_Demo/main_posix.c b/freertos/cvitek/task/demo/POSIX_Demo/main_posix.c new file mode 100644 index 000000000..5b7ce17d6 --- /dev/null +++ b/freertos/cvitek/task/demo/POSIX_Demo/main_posix.c @@ -0,0 +1,121 @@ +/* + * FreeRTOS POSIX Demo V1.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + ****************************************************************************** + * -NOTE- The Win32 port is a simulation (or is that emulation?) only! Do not + * expect to get real time behaviour from the Win32 port or this demo + * application. It is provided as a convenient development and demonstration + * test bed only. This was tested using Windows 10 with Intel Core i7-6700 CPU. + * + * Windows will not be running the FreeRTOS simulator threads continuously, so + * the timing information has no meaningful units. See the documentation page for + * the Windows simulator for an explanation of the slow timing: + * http://www.freertos.org/FreeRTOS-Windows-Simulator-Emulator-for-Visual-Studio-and-Eclipse-MingW.html + * - READ THE WEB DOCUMENTATION FOR THIS PORT FOR MORE INFORMATION ON USING IT - + * + * Documentation for this demo can be found on: + * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_POSIX/demo/posix_demo.html + */ + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* FreeRTOS+POSIX. */ +#include "FreeRTOS_POSIX/unistd.h" + +/* System headers */ +#include <stdio.h> + +/* demo include */ +#include "posix_demo.h" + +/* Demo task priority */ +#define mainPOSIX_DEMO_PRIORITY (tskIDLE_PRIORITY + 4) + +/*-----------------------------------------------------------*/ + +int main_posix(void) +{ + TickType_t xLastExecutionTime; + + configASSERT((mainPOSIX_DEMO_PRIORITY < configMAX_PRIORITIES)); + + const uint32_t ulLongTime_ms = pdMS_TO_TICKS(1000UL); + + printf("FreeRTOS POSIX demo\n"); + + /* Start the task to run POSIX demo */ + xTaskCreate(vStartPOSIXDemo, "posix", configMINIMAL_STACK_SIZE, NULL, + mainPOSIX_DEMO_PRIORITY, NULL); + + vTaskStartScheduler(); + + /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil() + works correctly. */ + xLastExecutionTime = xTaskGetTickCount(); + + /* If all is well, the scheduler will now be running, and the following + * line will never be reached. If the following line does execute, then + * there was insufficient FreeRTOS heap memory available for the idle and/or + * timer tasks to be created. See the memory management section on the + * FreeRTOS web site for more details (this is standard text that is not + * really applicable to the Win32 simulator port). */ + for (;;) { + /* Delay until it is time to execute again. */ + vTaskDelayUntil(&xLastExecutionTime, ulLongTime_ms); + } + + return 0; +} + +/*-----------------------------------------------------------*/ + +void vAssertCalled(const char *pcFile, uint32_t ulLine) +{ + const uint32_t ulLongSleep = 1000UL; + volatile uint32_t ulBlockVariable = 0UL; + volatile char *pcFileName = (volatile char *)pcFile; + volatile uint32_t ulLineNumber = ulLine; + + (void)pcFileName; + (void)ulLineNumber; + + printf("vAssertCalled %s, %ld\n", pcFile, (long)ulLine); + fflush(stdout); + + /* Setting ulBlockVariable to a non-zero value in the debugger will allow + * this function to be exited. */ + taskDISABLE_INTERRUPTS(); + { + while (ulBlockVariable == 0UL) { + sleep(ulLongSleep); + } + } + taskENABLE_INTERRUPTS(); +} diff --git a/freertos/cvitek/task/demo/POSIX_Demo/posix_demo.c b/freertos/cvitek/task/demo/POSIX_Demo/posix_demo.c new file mode 100644 index 000000000..cbde3f291 --- /dev/null +++ b/freertos/cvitek/task/demo/POSIX_Demo/posix_demo.c @@ -0,0 +1,374 @@ +/* + * Amazon FreeRTOS POSIX Demo V1.4.2 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @brief Demo intro: job distribution with actor model. + * + * This demo simulates job distribution with actor model. + * https://en.wikipedia.org/wiki/Actor_model + * + * In this demo, vStartPOSIXDemo() first creates all mailboxes + * which will be used by actors to send and receive messages. + * Then it spins up two types of actors -- Dispatcher and Workers. + * + * Dispatcher -- Distributing sub-tasks to workers. + * Distribution is done by putting messages into each worker's inbox, + * which is essentially an mqueue. Dispatcher keeps distributing tasks + * until all intended tasks are distributed. + * + * Workers -- Take sub-tasks and perform predefined routine for each type of tasks. + * + * Upon finishing distributing all tasks, Dispatcher will send a "terminate" message to + * each worker. vStartPOSIXDemo() will then join all actor threads and clean up mailboxes. + * + * @note A few assumptions are made in this demo, which a user might have to alter + * if to adopt this model in a new application: + * + * - The upper limit for MQUEUE_NUMBER_OF_WORKERS is set to 10. + * This is not due to physical constraint (e.g. memory), rather to make queue + * names end with a single digit number. + * + * - Message enum is cast to char/uint8_t directly, with the assumption that + * the system is not going to have more than 254 messages, which is often true + * in practice. Could extend bits used in a message to either have more messages + * or include additional arguments for a message. Proper typecasting is needed + * in that case. + * + * - The philosophy is "failure is expected". It is shown in both the way dispatcher + * delivers messages (i.e. messages can be dropped by worker(s)), and also the + * way workers process messages (i.e. workers do not inform dispatcher success or + * failure). + * + * - Following the philosophy, dispatcher shall never use blocking calls to distribute + * tasks. The only exception made here is that dispatcher needs to make sure the + * successful delivery of "terminate" messages. So that, main thread could join + * all actor threads and finish the demo. + */ + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* FreeRTOS+POSIX. */ +#include "FreeRTOS_POSIX/pthread.h" +#include "FreeRTOS_POSIX/mqueue.h" +#include "FreeRTOS_POSIX/time.h" +#include "FreeRTOS_POSIX/fcntl.h" +#include "FreeRTOS_POSIX/errno.h" +#include "FreeRTOS_POSIX/unistd.h" + +/* System headers */ +#include <stdbool.h> +#include <string.h> +#include <stdio.h> + +/* Demo includes. */ +#include "posix_demo.h" + +/* Constants */ +#define LINE_BREAK "\r\n" + +/** + * @brief Control messages. + * + * uint8_t is sufficient for this enum, that we are going to cast to char directly. + * If ever needed, implement a function to properly typecast. + */ +/**@{ */ +typedef enum ControlMessage { + eMSG_LOWER_INAVLID = + 0x00, /**< Guard, let's not use 0x00 for messages. */ + eWORKER_CTRL_MSG_CONTINUE = + 0x01, /**< Dispatcher to worker, distributing another job. */ + eWORKER_CTRL_MSG_EXIT = + 0x02, /**< Dispatcher to worker, all jobs are finished and the worker receiving such can exit. */ + + /* define additional messages here */ + + eMSG_UPPER_INVALID = + 0xFF /**< Guard, additional tasks shall be defined above. */ +} eControlMessage; +/**@} */ + +/** + * @defgroup Configuration constants for the dispatcher-worker demo. + */ +/**@{ */ +#define MQUEUE_NUMBER_OF_WORKERS \ + (4) /**< The number of worker threads, each thread has one queue which is used as income box. */ + +#if (MQUEUE_NUMBER_OF_WORKERS > 10) +#error "Please keep MQUEUE_NUMBER_OF_WORKERS < 10." +#endif + +#define MQUEUE_WORKER_QNAME_BASE "/qNode0" /**< Queue name base. */ +#define MQUEUE_WORKER_QNAME_BASE_LEN (6) /** Queue name base length. */ + +#define MQUEUE_TIMEOUT_SECONDS \ + (1) /**< Relative timeout for mqueue functions. */ +#define MQUEUE_MAX_NUMBER_OF_MESSAGES_WORKER \ + (1) /**< Maximum number of messages in a queue. */ + +#define MQUEUE_MSG_WORKER_CTRL_MSG_SIZE \ + sizeof(uint8_t) /**< Control message size. */ +#define DEMO_ERROR (-1) /**< Any non-zero value would work. */ +/**@} */ + +/** + * @brief Structure used by Worker thread. + */ +/**@{ */ +typedef struct WorkerThreadResources { + pthread_t pxID; /**< thread ID. */ + mqd_t xInboxID; /**< mqueue inbox ID. */ +} WorkerThreadResources_t; +/**@} */ + +/** + * @brief Structure used by Dispatcher thread. + */ +/**@{ */ +typedef struct DispatcherThreadResources { + pthread_t pxID; /**< thread ID. */ + mqd_t *pOutboxID; /**< a list of mqueue outbox ID. */ +} DispatcherThreadResources_t; +/**@} */ + +/*-----------------------------------------------------------*/ + +static void *prvWorkerThread(void *pvArgs) +{ + WorkerThreadResources_t pArgList = *(WorkerThreadResources_t *)pvArgs; + + printf("Worker thread #[%d] - start %s", (int)pArgList.pxID, + LINE_BREAK); + + struct timespec xReceiveTimeout = { 0 }; + + ssize_t xMessageSize = 0; + char pcReceiveBuffer[MQUEUE_MSG_WORKER_CTRL_MSG_SIZE] = { 0 }; + + /* This is a worker thread that reacts based on what is sent to its inbox (mqueue). */ + while (true) { + clock_gettime(CLOCK_REALTIME, &xReceiveTimeout); + xReceiveTimeout.tv_sec += MQUEUE_TIMEOUT_SECONDS; + + xMessageSize = mq_receive(pArgList.xInboxID, pcReceiveBuffer, + MQUEUE_MSG_WORKER_CTRL_MSG_SIZE, 0); + + /* Parse messages */ + if (xMessageSize == MQUEUE_MSG_WORKER_CTRL_MSG_SIZE) { + switch ((int)pcReceiveBuffer[0]) { + case eWORKER_CTRL_MSG_CONTINUE: + /* Task branch, currently only prints message to screen. */ + /* Could perform tasks here. Could also notify dispatcher upon completion, if desired. */ + printf("Worker thread #[%d] -- Received eWORKER_CTRL_MSG_CONTINUE %s", + (int)pArgList.pxID, LINE_BREAK); + break; + + case eWORKER_CTRL_MSG_EXIT: + printf("Worker thread #[%d] -- Finished. Exit now. %s", + (int)pArgList.pxID, LINE_BREAK); + + return NULL; + + default: + /* Received a message that we don't care or not defined. */ + break; + } + } else { + /* Invalid message. Error handling can be done here, if desired. */ + } + } + + /* You should never hit here. */ + /* return NULL; */ +} + +/*-----------------------------------------------------------*/ + +static void *prvDispatcherThread(void *pvArgs) +{ + DispatcherThreadResources_t pArgList = + *(DispatcherThreadResources_t *)pvArgs; + + printf("Dispatcher thread - start %s", LINE_BREAK); + + struct timespec xSendTimeout = { 0 }; + + ssize_t xMessageSize = 0; + char pcSendBuffer[MQUEUE_MSG_WORKER_CTRL_MSG_SIZE] = { 0 }; + + /* Just for fun, let threads do a total of 100 independent tasks. */ + int i = 0; + const int totalNumOfJobsPerThread = 100; + + /* Distribute 1000 independent tasks to workers, in round-robin fashion. */ + pcSendBuffer[0] = (char)eWORKER_CTRL_MSG_CONTINUE; + + for (i = 0; i < totalNumOfJobsPerThread; i++) { + clock_gettime(CLOCK_REALTIME, &xSendTimeout); + xSendTimeout.tv_sec += MQUEUE_TIMEOUT_SECONDS; + + printf("Dispatcher iteration #[%d] -- Sending msg to worker thread #[%d]. %s", + i, (int)pArgList.pOutboxID[i % MQUEUE_NUMBER_OF_WORKERS], + LINE_BREAK); + + xMessageSize = mq_timedsend( + pArgList.pOutboxID[i % MQUEUE_NUMBER_OF_WORKERS], + pcSendBuffer, MQUEUE_MSG_WORKER_CTRL_MSG_SIZE, 0, + &xSendTimeout); + + if (xMessageSize != 0) { + /* This error is acceptable in our setup. + * Since inbox for each thread fits only one message. + * In reality, balance inbox size, message arrival rate, and message drop rate. */ + printf("An acceptable failure -- dispatcher failed to send eWORKER_CTRL_MSG_CONTINUE to outbox ID: %x. errno %d %s", + (int)pArgList + .pOutboxID[i % MQUEUE_NUMBER_OF_WORKERS], + errno, LINE_BREAK); + } + } + + /* Control thread is now done with distributing jobs. Tell workers they are done. */ + pcSendBuffer[0] = (char)eWORKER_CTRL_MSG_EXIT; + + for (i = 0; i < MQUEUE_NUMBER_OF_WORKERS; i++) { + printf("Dispatcher [%d] -- Sending eWORKER_CTRL_MSG_EXIT to worker thread #[%d]. %s", + i, (int)pArgList.pOutboxID[i % MQUEUE_NUMBER_OF_WORKERS], + LINE_BREAK); + + /* This is a blocking call, to guarantee worker thread exits. */ + xMessageSize = mq_send( + pArgList.pOutboxID[i % MQUEUE_NUMBER_OF_WORKERS], + pcSendBuffer, MQUEUE_MSG_WORKER_CTRL_MSG_SIZE, 0); + } + + return NULL; +} + +/*-----------------------------------------------------------*/ + +/** + * @brief Job distribution with actor model. + * + * See the top of this file for detailed description. + */ +void vStartPOSIXDemo(void *pvParameters) +{ + int i = 0; + int iStatus = 0; + + printf("Run Task:vStartPOSIXDemo\n"); + /* Remove warnings about unused parameters. */ + (void)pvParameters; + + /* Handles of the threads and related resources. */ + DispatcherThreadResources_t pxDispatcher = { 0 }; + WorkerThreadResources_t pxWorkers[MQUEUE_NUMBER_OF_WORKERS] = { { 0 } }; + mqd_t workerMqueues[MQUEUE_NUMBER_OF_WORKERS] = { 0 }; + + struct mq_attr xQueueAttributesWorker = { + .mq_flags = 0, + .mq_maxmsg = MQUEUE_MAX_NUMBER_OF_MESSAGES_WORKER, + .mq_msgsize = MQUEUE_MSG_WORKER_CTRL_MSG_SIZE, + .mq_curmsgs = 0 + }; + + pxDispatcher.pOutboxID = workerMqueues; + + /* Create message queues for each worker thread. */ + for (i = 0; i < MQUEUE_NUMBER_OF_WORKERS; i++) { + /* Prepare a unique queue name for each worker. */ + char qName[] = MQUEUE_WORKER_QNAME_BASE; + qName[MQUEUE_WORKER_QNAME_BASE_LEN - 1] = + qName[MQUEUE_WORKER_QNAME_BASE_LEN - 1] + i; + + /* Open a queue with -- + * O_CREAT -- create a message queue. + * O_RDWR -- both receiving and sending messages. + */ + pxWorkers[i].xInboxID = + mq_open(qName, O_CREAT | O_RDWR, (mode_t)0, + &xQueueAttributesWorker); + + if (pxWorkers[i].xInboxID == (mqd_t)-1) { + printf("Invalid inbox (mqueue) for worker. %s", + LINE_BREAK); + iStatus = DEMO_ERROR; + break; + } + + /* Outboxes of dispatcher thread is the inboxes of all worker threads. */ + pxDispatcher.pOutboxID[i] = pxWorkers[i].xInboxID; + } + + /* Create and start Worker threads. */ + if (iStatus == 0) { + for (i = 0; i < MQUEUE_NUMBER_OF_WORKERS; i++) { + (void)pthread_create(&(pxWorkers[i].pxID), NULL, + prvWorkerThread, &pxWorkers[i]); + } + + /* Create and start dispatcher thread. */ + (void)pthread_create(&(pxDispatcher.pxID), NULL, + prvDispatcherThread, &pxDispatcher); + + /* Actors will do predefined tasks in threads. Current implementation is that + * dispatcher actor notifies worker actors to terminate upon finishing distributing tasks. */ + + /* Wait for worker threads to join. */ + for (i = 0; i < MQUEUE_NUMBER_OF_WORKERS; i++) { + (void)pthread_join(pxWorkers[i].pxID, NULL); + } + + /* Wait for dispatcher thread to join. */ + (void)pthread_join(pxDispatcher.pxID, NULL); + } + + /* Close and unlink worker message queues. */ + for (i = 0; i < MQUEUE_NUMBER_OF_WORKERS; i++) { + char qName[] = MQUEUE_WORKER_QNAME_BASE; + qName[MQUEUE_WORKER_QNAME_BASE_LEN - 1] = + qName[MQUEUE_WORKER_QNAME_BASE_LEN - 1] + i; + + if (pxWorkers[i].xInboxID != 0) { + (void)mq_close(pxWorkers[i].xInboxID); + (void)mq_unlink(qName); + } + } + + /* Have something on console. */ + if (iStatus == 0) { + printf("All threads finished. %s", LINE_BREAK); + } else { + printf("Queues did not get initialized properly. Did not run demo. %s", + LINE_BREAK); + } + + /* This task was created with the native xTaskCreate() API function, so + must not run off the end of its implementing thread. */ + vTaskDelete(NULL); +} diff --git a/freertos/cvitek/task/demo/POSIX_Demo/posix_demo.h b/freertos/cvitek/task/demo/POSIX_Demo/posix_demo.h new file mode 100644 index 000000000..e2afe18ff --- /dev/null +++ b/freertos/cvitek/task/demo/POSIX_Demo/posix_demo.h @@ -0,0 +1,32 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef _POSIX_DEMO_H_ +#define _POSIX_DEMO_H_ +void vStartPOSIXDemo(void *pvParameters); + +#endif /* _POSIX_DEMO_H_ */ \ No newline at end of file diff --git a/freertos/cvitek/task/isp/CMakeLists.txt b/freertos/cvitek/task/isp/CMakeLists.txt new file mode 100644 index 000000000..8ca059af0 --- /dev/null +++ b/freertos/cvitek/task/isp/CMakeLists.txt @@ -0,0 +1,123 @@ +#file(GLOB _SOURCES "src/${CHIP}/*.c") +file(GLOB _SOURCES "isp/algo/ae/*.c" + "isp/algo/awb/*.c" + #"isp/${CHIP}/isp/src/*.c" + "isp/${CHIP}/isp/src/isp_lut.c" + "isp/${CHIP}/isp/src/isp_sts_ctrl.c" + "isp/${CHIP}/isp/src/isp_mw_compat.c" + "isp/${CHIP}/isp/src/isp_presharpen_ctrl.c" + "isp/${CHIP}/isp/src/isp_drc_ctrl.c" + "isp/${CHIP}/isp/src/isp_ccm_ctrl.c" + #"isp/${CHIP}/isp/src/isp_mailbox.c" + "isp/${CHIP}/isp/src/isp_mlsc_ctrl.c" + "isp/${CHIP}/isp/src/isp_dehaze_ctrl.c" + "isp/${CHIP}/isp/src/isp_blc_ctrl.c" + "isp/${CHIP}/isp/src/isp_rgbcac_ctrl.c" + "isp/${CHIP}/isp/src/isp_interpolate.c" + "isp/${CHIP}/isp/src/isp_feature_ctrl.c" + "isp/${CHIP}/isp/src/isp_3a.c" + "isp/${CHIP}/isp/src/isp_crosstalk_ctrl.c" + "isp/${CHIP}/isp/src/isp_tun_buf_ctrl.c" + #"isp/${CHIP}/isp/src/isp_rlsc_ctrl.c" + #"isp/${CHIP}/isp/src/isp_peri_ctrl.c" + "isp/${CHIP}/isp/src/isp_bnr_ctrl.c" + "isp/${CHIP}/isp/src/cvi_isp.c" + #"isp/${CHIP}/isp/src/isp_param_default.c" + "isp/${CHIP}/isp/src/isp_demosaic_ctrl.c" + "isp/${CHIP}/isp/src/isp_dpc_ctrl.c" + #"isp/${CHIP}/isp/src/isp_proc.c" + "isp/${CHIP}/isp/src/isp_csc_ctrl.c" + "isp/${CHIP}/isp/src/isp_cnr_ctrl.c" + "isp/${CHIP}/isp/src/isp_ca2_ctrl.c" + #"isp/${CHIP}/isp/src/isp_debug.c" + "isp/${CHIP}/isp/src/isp_sensor.c" + "isp/${CHIP}/isp/src/isp_ycontrast_ctrl.c" + "isp/${CHIP}/isp/src/isp_dci_ctrl.c" + "isp/${CHIP}/isp/src/isp_ldci_ctrl.c" + "isp/${CHIP}/isp/src/isp_cac_ctrl.c" + "isp/${CHIP}/isp/src/isp_lcac_ctrl.c" + #"isp/${CHIP}/isp/src/isp_motion_ctrl.c" + "isp/${CHIP}/isp/src/isp_wb_ctrl.c" + "isp/${CHIP}/isp/src/isp_ynr_ctrl.c" + "isp/${CHIP}/isp/src/isp_tnr_ctrl.c" + "isp/${CHIP}/isp/src/isp_ca_ctrl.c" + "isp/${CHIP}/isp/src/isp_mono_ctrl.c" + #"isp/${CHIP}/isp/src/isp_clut_ctrl.c" + "isp/${CHIP}/isp/src/isp_gamma_ctrl.c" + #"isp/${CHIP}/isp/src/isp_dis_ctrl.c" + "isp/${CHIP}/isp/src/isp_flow_ctrl.c" + "isp/${CHIP}/isp/src/isp_fswdr_ctrl.c" + "isp/${CHIP}/isp/src/isp_sharpen_ctrl.c" + + "isp/${CHIP}/isp_algo/src/isp_algo_gamma.c" + "isp/${CHIP}/isp_algo/src/isp_algo_fswdr.c" + "isp/${CHIP}/isp_algo/src/isp_algo_csc.c" + #"isp/${CHIP}/isp_algo/src/isp_algo_clut.c" + "isp/${CHIP}/isp_algo/src/isp_algo_bnr.c" + "isp/${CHIP}/isp_algo/src/isp_algo_blc.c" + "isp/${CHIP}/isp_algo/src/isp_algo_drc.c" + "isp/${CHIP}/isp_algo/src/isp_algo_dci.c" + "isp/${CHIP}/isp_algo/src/isp_algo_ldci.c" + "isp/${CHIP}/isp_algo/src/isp_algo_sharpen.c" + "isp/${CHIP}/isp_algo/src/isp_algo_cnr.c" + "isp/${CHIP}/isp_algo/src/isp_algo_rgbcac.c" + #"isp/${CHIP}/isp_algo/src/isp_algo_dpc.c" + "isp/${CHIP}/isp_algo/src/isp_algo_ycontrast.c" + "isp/${CHIP}/isp_algo/src/isp_algo_demosaic.c" + "isp/${CHIP}/isp_algo/src/isp_algo_wb.c" + "isp/${CHIP}/isp_algo/src/isp_algo_presharpen.c" + "isp/${CHIP}/isp_algo/src/isp_algo_ca.c" + #"isp/${CHIP}/isp_algo/src/pchip.c" + "isp/${CHIP}/isp_algo/src/isp_algo_crosstalk.c" + "isp/${CHIP}/isp_algo/src/isp_algo_dehaze.c" + "isp/${CHIP}/isp_algo/src/isp_algo_mono.c" + "isp/${CHIP}/isp_algo/src/isp_algo_tnr.c" + "isp/${CHIP}/isp_algo/src/isp_algo_ccm.c" + "isp/${CHIP}/isp_algo/src/isp_algo_cac.c" + "isp/${CHIP}/isp_algo/src/isp_algo_lcac.c" + #"isp/${CHIP}/isp_algo/src/isp_algo_motion.c" + "isp/${CHIP}/isp_algo/src/isp_algo_utility.c" + "isp/${CHIP}/isp_algo/src/isp_algo_ynr.c" + "isp/${CHIP}/isp_algo/src/isp_algo_mlsc.c" + #"isp/${CHIP}/isp_algo/src/dpcm_api.c" + "isp/${CHIP}/isp_algo/src/isp_algo_debug.c" + #"isp/${CHIP}/isp_algo/src/isp_algo_dis.c" + "isp/${CHIP}/isp_algo/src/isp_algo_ca2.c" + "isp/${CHIP}/isp_algo/src/pchip.c" + "isp/${CHIP}/isp_algo/src/isp_iir_api.c" + + "src/${RUN_ARCH}/*.c" + "isp/${CHIP}/isp/src/isp_mgr_buf.c" + + "isp/${CHIP}/rtos_isp/rtos_isp_mgr.c" +) + + + +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/cif) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/vi) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/cif) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/config) +include_directories(../comm/include) + +include_directories(isp/include/${CHIP}/) +include_directories(isp/${CHIP}/isp/inc/) +include_directories(isp/${CHIP}/isp/src/) +include_directories(isp/${CHIP}/isp_algo/inc/) +include_directories(isp/${CHIP}/rtos_isp/) + +# include_directories(tmp_inc/) + +if (CONFIG_CHIP_ARCH_cv181x STREQUAL "y" OR CONFIG_CHIP_ARCH_cv180x STREQUAL "y") +add_compile_definitions(ARCH_RTOS_CV181X) +endif() + +add_library(isp STATIC ${_SOURCES}) +install(TARGETS isp DESTINATION lib) diff --git a/freertos/cvitek/task/isp/src/cv1835/cvi_isp.c b/freertos/cvitek/task/isp/src/cv1835/cvi_isp.c new file mode 100644 index 000000000..7f6eff7f5 --- /dev/null +++ b/freertos/cvitek/task/isp/src/cv1835/cvi_isp.c @@ -0,0 +1,4284 @@ +#include "linux/types.h" +//#include <stdio.h> +//#include <stdlib.h> +#include <string.h> +//#include <stdint.h> +#include <stdbool.h> +#include "FreeRTOS_POSIX.h" +#include <FreeRTOS_POSIX/errno.h> +#include "FreeRTOS_POSIX/pthread.h" +//#include <unistd.h> // for usleep +#include "linux/ioctl.h" +#include "linux/fs.h" +//#include <linux/fcntl.h> +//#include <sys/stat.h> + +//#include "cvi_base.h" +//#include "cvi_isp.h" +//#include "isp_main.h" +//#include "isp_debug.h" +//#include "isp_defines.h" +//#include "isp_dpc.h" +//#include "isp_defaults.h" +//#include "isp_buf_ctrl.h" +//#include "isp_mock.h" +//#include "cvi_base.h" +//#include "cvi_sys.h" +//#include "isp_3a.h" +//#include "isp_version.h" +//#include "linux/cvi_vip.h" +//#include "linux/cvi_vip_isp.h" +//#include "linux/cvi_vip_tun_cfg.h" +//#include "ioctl_isp.h" +#include "cvi_sns_ctrl.h" +#include "linux/errno.h" + +//#include "isp_ipc.h" +//#include "cvi_pqbin.h" + +//#define TUNING_FOR_DUAL_SENSOR_READY 0 // TODO@Kidd fix this + +#define PRINT_ATTR_AUTO 0 +#define PRINT_ATTR(attr, reg, min, max) ISP_DEBUG(LOG_DEBUG, "%s(%s) [%d-%d] = %d\n", #attr, #reg, min, max, attr) +#if 0 +ISP_CTX_S g_astIspCtx[VI_MAX_PIPE_NUM] = { { 0 } }; + +ISP_PARAMETER_BUFFER g_param[VI_MAX_PIPE_NUM]; +CVI_BOOL g_isp_debug_print_mpi = 1; +CVI_BOOL g_isp_debug_diff_only = 1; +CVI_BOOL g_isp_thread_run = CVI_FALSE; + +// AE/AWB Debug callback function +ISP_AE_DEBUG_FUNC_S aeAlgoInternalLibReg[VI_MAX_PIPE_NUM] = { + [0 ... VI_MAX_PIPE_NUM - 1].pfn_ae_dumplog = NULL, + [0 ... VI_MAX_PIPE_NUM - 1].pfn_ae_setdumplogpath = NULL +}; + +ISP_AWB_DEBUG_FUNC_S awbAlgoInternalLibReg[VI_MAX_PIPE_NUM] = { + [0 ... VI_MAX_PIPE_NUM - 1].pfn_awb_dumplog = NULL, + [0 ... VI_MAX_PIPE_NUM - 1].pfn_awb_setdumplogpath = NULL +}; + +static CVI_S32 __subscribe_event(CVI_S32 fd, CVI_U32 event) +{ + struct v4l2_event_subscription sub; + CVI_S32 ret = 0; + + memset(&sub, 0, sizeof(sub)); + sub.type = event; + + ret = ioctl(fd, VIDIOC_SUBSCRIBE_EVENT, &sub); + if (ret != 0) { + ISP_DEBUG(LOG_ERR, "IOCTL subscribe event fail, %d %s\n", errno, strerror(errno)); + return ret; + } + + return ret; +} + +static CVI_S32 __unsubscribe_event(CVI_S32 fd, CVI_U32 event) +{ + struct v4l2_event_subscription sub; + CVI_S32 ret; + + memset(&sub, 0, sizeof(sub)); + sub.type = event; + + ret = ioctl(fd, VIDIOC_UNSUBSCRIBE_EVENT, &sub); + if (ret != 0) { + ISP_DEBUG(LOG_ERR, "IOCTL unsubscribe event fail, %d %s\n", errno, strerror(errno)); + return ret; + } + + return ret; +} + +static CVI_S32 check_enable_debug_message_to_stdout(void) +{ +#define ENV_DEBUG_MESSAGE_TO_STDOUT "ISP_ENABLE_STDOUT_DEBUG" + char *pszEnv = getenv(ENV_DEBUG_MESSAGE_TO_STDOUT); + char *pszEnd = NULL; + + if (pszEnv == NULL) + return CVI_FAILURE; + + CVI_U32 u32Level = (CVI_U32)strtol(pszEnv, &pszEnd, 10); + + if (pszEnv == pszEnd) { + ISP_DEBUG(LOG_INFO, "ISP_ENABLE_STDOUT_DEBUG invalid\n"); + return CVI_FAILURE; + } + + gExportToStdout = (u32Level > 0) ? CVI_TRUE : CVI_FALSE; + return CVI_SUCCESS; +} + +static CVI_S32 apply_debug_level_from_environment(void) +{ +#define ENV_DEBUG_LEVEL "ISP_DEBUG_LEVEL" + char *pszEnv = getenv(ENV_DEBUG_LEVEL); + char *pszEnd = NULL; + + if (pszEnv == NULL) + return CVI_FAILURE; + + CVI_UL ulLevel = strtol(pszEnv, &pszEnd, 10); + + if ((ulLevel > LOG_DEBUG) || (pszEnv == pszEnd)) { + ISP_DEBUG(LOG_INFO, "ISP_DEBUG_LEVEL invalid\n"); + return CVI_FAILURE; + } + + CVI_DEBUG_SetDebugLevel((int)ulLevel); + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_Init(VI_PIPE ViPipe) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_DEV(ViPipe); + + apply_debug_level_from_environment(); + check_enable_debug_message_to_stdout(); +#ifndef ISP_VERSION +#define ISP_VERSION "-" +#endif + ISP_DEBUG(LOG_INFO, "ISP VERSION(%s)\n", ISP_VERSION); + isp_global_init(ViPipe); + isp_3aInfo_init(ViPipe); + isp_param_global_init(ViPipe); + + for (CVI_U32 i = 0; i < AAA_TYPE_MAX; i++) + isp_3aLib_init(ViPipe, i); + + /*Move here for check wdr mode.*/ + // BIN file will overwrite AE/AWB settings + isp_iqParam_addr_initDefault(ViPipe); + isp_sns_info_init(ViPipe); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_MemInit(VI_PIPE ViPipe) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_DEV(ViPipe); + + ISP_CTX_S *pstIspCtx = NULL; + struct vdev *d; + + d = get_dev_info(VDEV_TYPE_ISP, ViPipe); + + ISP_GET_CTX(ViPipe, pstIspCtx); + pstIspCtx->ispDevFd = d->fd; + + if (!IS_VDEV_OPEN(d->state)) { + ISP_DEBUG(LOG_ERR, "Pipe(%d) state(%d) incorrect\n", ViPipe, d->state); + return -EBADF; + } + + CVI_S32 fd = d->fd; + + if (fd == -1) + return -EBADF; + + // TODO: get sns info to init + + // TODO: get mem + //v4l2_qbuf(fd, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, &buf); + isp_iqParam_addr_init(ViPipe); + isp_buf_ctrl_tbl_init(ViPipe); + isp_buf_ctrl_algo_buf_init(ViPipe); + isp_tuningBuf_init(ViPipe); + isp_drcHist_buf_init(ViPipe); + + return CVI_SUCCESS; +} + +#ifdef ISP_RECEIVE_IPC_CMD +static CVI_S32 parse_isp_fifo_path_from_environment(char *fifo_path, CVI_U32 path_length) +{ + char *env = getenv(ENV_ISP_FIFO_IPC_NAME); + + if (env == NULL) { + snprintf(fifo_path, path_length, DEFAULT_ISP_FIFO_IPC_FILENAME); + return CVI_FAILURE; + } + + snprintf(fifo_path, path_length, env); + return CVI_SUCCESS; +} + +static CVI_S32 initial_ipc_fifo(int *fifoFd, const char *fifo_path) +{ + if (access(fifo_path, F_OK) != 0) + if (mkfifo(fifo_path, 0777) != 0) { + ISP_DEBUG(LOG_ERR, "Create ISP FIFO file fail\n"); + return CVI_FAILURE; + } + + *fifoFd = open(fifo_path, O_RDWR); + if (*fifoFd == -1) { + ISP_DEBUG(LOG_ERR, "Open ISP FIFO file fail\n"); + return CVI_FAILURE; + } + + return CVI_SUCCESS; +} + +static CVI_S32 release_ipc_fifo(const char *fifo_path) +{ + if (access(fifo_path, F_OK) == 0) + if (unlink(fifo_path) != 0) { + ISP_DEBUG(LOG_ERR, "Remove ISP FIFO file fail\n"); + return CVI_FAILURE; + } + + return CVI_SUCCESS; +} + +static CVI_S32 handle_fifo_command(const char *command) +{ + size_t ae_log_location_len = strlen(SET_AE_LOG_LOCATION_CMD); + size_t awb_log_location_len = strlen(SET_AWB_LOG_LOCATION_CMD); + + if (strcmp(TRIGGER_AE_LOG_CMD, command) == 0) { + for (int pipeId = 0; pipeId < VI_MAX_PIPE_NUM; ++pipeId) { + if (aeAlgoInternalLibReg[pipeId].pfn_ae_dumplog != NULL) { + aeAlgoInternalLibReg[pipeId].pfn_ae_dumplog(); + } + } + } else if (strcmp(TRIGGER_AWB_LOG_CMD, command) == 0) { + for (int pipeId = 0; pipeId < VI_MAX_PIPE_NUM; ++pipeId) { + if (awbAlgoInternalLibReg[pipeId].pfn_awb_dumplog != NULL) { + awbAlgoInternalLibReg[pipeId].pfn_awb_dumplog(); + } + } + } else if (strncmp(SET_AE_LOG_LOCATION_CMD, command, ae_log_location_len) == 0) { + for (int pipeId = 0; pipeId < VI_MAX_PIPE_NUM; ++pipeId) { + if (aeAlgoInternalLibReg[pipeId].pfn_ae_dumplog != NULL) { + aeAlgoInternalLibReg[pipeId].pfn_ae_setdumplogpath(command + ae_log_location_len); + } + } + } else if (strncmp(SET_AWB_LOG_LOCATION_CMD, command, awb_log_location_len) == 0) { + for (int pipeId = 0; pipeId < VI_MAX_PIPE_NUM; ++pipeId) { + if (awbAlgoInternalLibReg[pipeId].pfn_awb_dumplog != NULL) { + awbAlgoInternalLibReg[pipeId].pfn_awb_setdumplogpath(command + awb_log_location_len); + } + } + } +} +#endif // ISP_RECEIVE_IPC_CMD + +CVI_S32 CVI_ISP_AELibRegInternalCallBack(VI_PIPE ViPipe, ISP_AE_DEBUG_FUNC_S *pstRegister) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstRegister); + + aeAlgoInternalLibReg[ViPipe].pfn_ae_dumplog = pstRegister->pfn_ae_dumplog; + aeAlgoInternalLibReg[ViPipe].pfn_ae_setdumplogpath = pstRegister->pfn_ae_setdumplogpath; + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_AELibUnRegInternalCallBack(VI_PIPE ViPipe) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + + aeAlgoInternalLibReg[ViPipe].pfn_ae_dumplog = NULL; + aeAlgoInternalLibReg[ViPipe].pfn_ae_setdumplogpath = NULL; + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_AWBLibRegInternalCallBack(VI_PIPE ViPipe, ISP_AWB_DEBUG_FUNC_S *pstRegister) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstRegister); + + awbAlgoInternalLibReg[ViPipe].pfn_awb_dumplog = pstRegister->pfn_awb_dumplog; + awbAlgoInternalLibReg[ViPipe].pfn_awb_setdumplogpath = pstRegister->pfn_awb_setdumplogpath; + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_AWBLibUnRegInternalCallBack(VI_PIPE ViPipe) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + + awbAlgoInternalLibReg[ViPipe].pfn_awb_dumplog = NULL; + awbAlgoInternalLibReg[ViPipe].pfn_awb_setdumplogpath = NULL; + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_Run(VI_PIPE ViPipe) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_DEV(ViPipe); + + ISP_CTX_S *pstIspCtx = NULL; + + ISP_GET_CTX(ViPipe, pstIspCtx); + CVI_S32 fd = pstIspCtx->ispDevFd; + + if (fd == -1) { + ISP_DEBUG(LOG_EMERG, "ISP%d fd state incorrect\n", fd); + return -EBADF; + } + + pstIspCtx->bIspRun = CVI_TRUE; + __subscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE0_SOF); + __subscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE1_SOF); + __subscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE0_EOF); + __subscribe_event(fd, V4L2_EVENT_CVI_VIP_POST_EOF); + __subscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE1_EOF); + __subscribe_event(fd, V4L2_EVENT_CVI_VIP_POST1_EOF); + //isp_snsSync_cfg_set(ViPipe, 0); + fd_set efds, readfds; + struct timeval tv; + CVI_S32 r, s32Ret = 0; + CVI_S32 initStatus[2] = { 0 }; + int vi_pipe = 0; + +#ifdef ISP_RECEIVE_IPC_CMD + int ipc_fifo_fd = 0; + char fifo_path[128] = {'\0'}; + FILE *fFifo = NULL; + + parse_isp_fifo_path_from_environment(fifo_path, 128); + + if (initial_ipc_fifo(&ipc_fifo_fd, fifo_path) != CVI_SUCCESS) + ISP_DEBUG(LOG_EMERG, "Enable ISP ipc fail\n"); + + if (ipc_fifo_fd) + fFifo = fdopen(ipc_fifo_fd, "r"); +#endif // ISP_RECEIVE_IPC_CMD + + g_isp_thread_run = CVI_TRUE; + /* Timeout. */ + while (g_isp_thread_run) { + int max_fd = fd; + FD_ZERO(&efds); + FD_ZERO(&readfds); + FD_SET(fd, &efds); + +#ifdef ISP_RECEIVE_IPC_CMD + if (ipc_fifo_fd > 0) { + FD_SET(ipc_fifo_fd, &readfds); + max_fd = MAX(max_fd, ipc_fifo_fd); + } +#endif // ISP_RECEIVE_IPC_CMD + + tv.tv_sec = 0; + tv.tv_usec = 500 * 1000; + r = select(max_fd + 1, &readfds, NULL, &efds, &tv); + if (r == -1) { + if (errno == EINTR) + continue; + //errno_exit("select"); + continue; + } + if (r == 0) { + //fprintf(stderr, "%s: select timeout\n", __func__); + continue; + } + + if (FD_ISSET(fd, &efds)) { + struct v4l2_event ev; + + r = ioctl(fd, VIDIOC_DQEVENT, &ev); + switch (ev.type) { + case V4L2_EVENT_CVI_VIP_PRE0_SOF: + case V4L2_EVENT_CVI_VIP_PRE1_SOF: + ISP_DEBUG(LOG_DEBUG, "SOF\n"); + break; + + case V4L2_EVENT_CVI_VIP_PRE0_EOF: + case V4L2_EVENT_CVI_VIP_PRE1_EOF: + if (ev.type == V4L2_EVENT_CVI_VIP_PRE0_EOF) + vi_pipe = 0; + else if (ev.type == V4L2_EVENT_CVI_VIP_PRE1_EOF) + vi_pipe = 1; + if (initStatus[vi_pipe] == 0) { + isp_stsBuf_init(vi_pipe); + isp_mlsc0Buf_init(vi_pipe); + initStatus[vi_pipe] = 1; + } + s32Ret = isp_stsBuf_get(vi_pipe, ISP_EVENT_PRE_EOF); + if (s32Ret != CVI_SUCCESS) + ISP_DEBUG(LOG_ERR, "Get pre stsBuf error\n"); + break; + case V4L2_EVENT_CVI_VIP_POST_EOF: + case V4L2_EVENT_CVI_VIP_POST1_EOF: + if (ev.type == V4L2_EVENT_CVI_VIP_POST_EOF) + vi_pipe = 0; + else if (ev.type == V4L2_EVENT_CVI_VIP_POST1_EOF) + vi_pipe = 1; + isp_run(vi_pipe); + break; + } + } + +#ifdef ISP_RECEIVE_IPC_CMD + if (ipc_fifo_fd > 0) + if (FD_ISSET(ipc_fifo_fd, &readfds)) { + char szCmdCommand[128] = {'\0'}; + + fscanf(fFifo, "%s", szCmdCommand); + // printf("fifo ipc command : %s\n", szCmdCommand); + + handle_fifo_command(szCmdCommand); + } +#endif // ISP_RECEIVE_IPC_CMD + } + + __unsubscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE0_SOF); + __unsubscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE1_SOF); + __unsubscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE0_EOF); + __unsubscribe_event(fd, V4L2_EVENT_CVI_VIP_POST_EOF); + __unsubscribe_event(fd, V4L2_EVENT_CVI_VIP_PRE1_EOF); + __unsubscribe_event(fd, V4L2_EVENT_CVI_VIP_POST1_EOF); + ISP_DEBUG(LOG_INFO, "End\n"); + +#ifdef ISP_RECEIVE_IPC_CMD + if (fFifo) + fclose(fFifo); + + release_ipc_fifo(fifo_path); +#endif // ISP_RECEIVE_IPC_CMD + + pstIspCtx->bIspRun = CVI_FALSE; + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_RunOnce(VI_PIPE ViPipe) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_DEV(ViPipe); + + // TODO: implementation + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_Exit(VI_PIPE ViPipe) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_DEV(ViPipe); + + struct vdev *d; + ISP_CTX_S *pstIspCtx = NULL; + + d = get_dev_info(VDEV_TYPE_ISP, ViPipe); + ISP_GET_CTX(ViPipe, pstIspCtx); + g_isp_thread_run = CVI_FALSE; + int count = 40; + + while (pstIspCtx->bIspRun && (--count > 0)) + usleep(50 * 1000); + + if (pstIspCtx->bIspRun) + ISP_DEBUG(LOG_INFO, "ISP%d state(%d) incorrect\n", ViPipe, d->state); + /* TODO . open after check complete.*/ + isp_stsBuf_exit(ViPipe); + isp_buf_ctrl_tbl_exit(ViPipe); + isp_buf_ctrl_algo_buf_exit(ViPipe); + isp_iqParam_addr_exit(ViPipe); + isp_tuningBuf_exit(ViPipe); + isp_drcHist_buf_exit(ViPipe); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetSnsSize(VI_PIPE ViPipe, SIZE_S *size) +{ + ISP_CTX_S *pstIspCtx = NULL; + struct v4l2_format fmt; + CVI_S32 fd; + + ISP_GET_CTX(ViPipe, pstIspCtx); + fd = pstIspCtx->ispDevFd; + + ISP_CHECK_DEV(ViPipe); + + if (fd == -1) + return -EBADF; + + if (v4l2_getfmt(fd, &fmt) != 0) + return -1; + + size->u32Width = fmt.fmt.pix_mp.width; + size->u32Height = fmt.fmt.pix_mp.height; + + return 0; +} + +CVI_S32 CVI_ISP_SetPubAttr(VI_PIPE ViPipe, const ISP_PUB_ATTR_S *pstPubAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstPubAttr); + + ISP_CTX_S *pstIspCtx = NULL; + + ISP_GET_CTX(ViPipe, pstIspCtx); + + pstIspCtx->enBayer = pstPubAttr->enBayer; + pstIspCtx->u8SnsWDRMode = pstPubAttr->enWDRMode; + pstIspCtx->stSysRect.s32X = pstPubAttr->stWndRect.s32X; + pstIspCtx->stSysRect.s32Y = pstPubAttr->stWndRect.s32Y; + pstIspCtx->stSysRect.u32Width = pstPubAttr->stWndRect.u32Width; + pstIspCtx->stSysRect.u32Height = pstPubAttr->stWndRect.u32Height; + pstIspCtx->stSnsImageMode.f32Fps = pstPubAttr->f32FrameRate; + pstIspCtx->stSnsImageMode.u16Width = pstPubAttr->stSnsSize.u32Width; + pstIspCtx->stSnsImageMode.u16Height = pstPubAttr->stSnsSize.u32Height; + pstIspCtx->stSnsImageMode.u8SnsMode = pstPubAttr->u8SnsMode; + + if (ViPipe == 0) + CVI_PQBIN_SetSnsWDRMode(pstPubAttr->enWDRMode); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetPubAttr(VI_PIPE ViPipe, ISP_PUB_ATTR_S *pstPubAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstPubAttr); + + ISP_CTX_S *pstIspCtx = NULL; + + ISP_GET_CTX(ViPipe, pstIspCtx); + + pstPubAttr->enBayer = pstIspCtx->enBayer; + pstPubAttr->enWDRMode = pstIspCtx->u8SnsWDRMode; + pstPubAttr->stSnsSize.u32Width = pstIspCtx->stSnsImageMode.u16Width; + pstPubAttr->stSnsSize.u32Height = pstIspCtx->stSnsImageMode.u16Height; + pstPubAttr->stWndRect.s32X = pstIspCtx->stSysRect.s32X; + pstPubAttr->stWndRect.s32Y = pstIspCtx->stSysRect.s32Y; + pstPubAttr->stWndRect.u32Width = pstIspCtx->stSysRect.u32Width; + pstPubAttr->stWndRect.u32Height = pstIspCtx->stSysRect.u32Height; + pstPubAttr->f32FrameRate = pstIspCtx->stSnsImageMode.f32Fps; + pstPubAttr->u8SnsMode = pstIspCtx->stSnsImageMode.u8SnsMode; + + return CVI_SUCCESS; +} + +/*TODO. Ctrl Param still need to be implement*/ +CVI_S32 CVI_ISP_SetCtrlParam(VI_PIPE ViPipe, const ISP_CTRL_PARAM_S *pstIspCtrlParam) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstIspCtrlParam); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetCtrlParam(VI_PIPE ViPipe, ISP_CTRL_PARAM_S *pstIspCtrlParam) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstIspCtrlParam); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetFMWState(VI_PIPE ViPipe, const ISP_FMW_STATE_E enState) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + + ISP_CTX_S *pstIspCtx = NULL; + + ISP_GET_CTX(ViPipe, pstIspCtx); + if (enState >= ISP_FMW_STATE_BUTT) + return CVI_FAILURE; + + pstIspCtx->bFreezeFw = enState; + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetFMWState(VI_PIPE ViPipe, ISP_FMW_STATE_E *penState) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(penState); + + ISP_CTX_S *pstIspCtx = NULL; + + ISP_GET_CTX(ViPipe, pstIspCtx); + + *penState = pstIspCtx->bFreezeFw; + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetModuleControl(VI_PIPE ViPipe, const ISP_MODULE_CTRL_U *punModCtrl) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(punModCtrl); + + // CVI_U64 bypassSetting = punModCtrl->u64Key; + + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_BNR, punModCtrl->bitBypassNR); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_DEMOSAIC, punModCtrl->bitBypassDemosaic); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_CCM, punModCtrl->bitBypassColorMatrix); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_DRC, punModCtrl->bitBypassDRC); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_FUSION, punModCtrl->bitBypassFSWDR); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_GAMMA, punModCtrl->bitBypassGamma); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_DEHAZE, punModCtrl->bitBypassDehaze); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_3DNR, punModCtrl->bitBypass3DNR); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_YNR, punModCtrl->bitBypassYnr); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_CNR, punModCtrl->bitBypassCnr); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_YEE, punModCtrl->bitBypassSharpen); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_HSV, punModCtrl->bitBypassHSV); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_3DLUT, punModCtrl->bitBypassCLUT); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_DCI, punModCtrl->bitBypassLdci); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_WBGAIN, punModCtrl->bitBypassWBGain); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_LSC_M, punModCtrl->bitBypassMeshShading); + isp_iq_bypass_set(ViPipe, ISP_IQ_BLOCK_LSC_R, punModCtrl->bitBypassRadialShading); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetModuleControl(VI_PIPE ViPipe, ISP_MODULE_CTRL_U *punModCtrl) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(punModCtrl); + + // CVI_U64 bypassSetting = punModCtrl->u64Key; + + punModCtrl->bitBypassNR = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_BNR); + punModCtrl->bitBypassDemosaic = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_DEMOSAIC); + punModCtrl->bitBypassColorMatrix = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_CCM); + punModCtrl->bitBypassDRC = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_DRC); + punModCtrl->bitBypassFSWDR = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_FUSION); + punModCtrl->bitBypassGamma = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_GAMMA); + punModCtrl->bitBypassDehaze = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_DEHAZE); + punModCtrl->bitBypass3DNR = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_3DNR); + punModCtrl->bitBypassYnr = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_YNR); + punModCtrl->bitBypassCnr = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_CNR); + punModCtrl->bitBypassSharpen = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_YEE); + punModCtrl->bitBypassHSV = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_HSV); + punModCtrl->bitBypassCLUT = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_3DLUT); + punModCtrl->bitBypassLdci = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_DCI); + punModCtrl->bitBypassWBGain = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_WBGAIN); + punModCtrl->bitBypassMeshShading = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_LSC_M); + punModCtrl->bitBypassRadialShading = isp_iq_bypass_get(ViPipe, ISP_IQ_BLOCK_LSC_R); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetBindAttr(VI_PIPE ViPipe, const ISP_BIND_ATTR_S *pstBindAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstBindAttr); + + CVI_S32 *ret; + CVI_S32 i; + ISP_CTX_S *pstIspCtx = NULL; + ALG_LIB_S bindInfo[AAA_TYPE_MAX] = { pstBindAttr->stAeLib, + pstBindAttr->stAwbLib, pstBindAttr->stAfLib}; + + ISP_GET_CTX(ViPipe, pstIspCtx); + for (i = 0; i < AAA_TYPE_MAX; i++) { + ret = &(pstIspCtx->activeLibIdx[i]); + + if (bindInfo[i].s32Id != -1 && bindInfo[i].acLibName != (CVI_U8 *)("\n")) { + *ret = isp_3aLib_find(ViPipe, &(bindInfo[i]), i); + // When can't find 3a register lib. Only show message for remind. + if (*ret == ISP_3ALIB_FIND_FAIL) { + ISP_DEBUG(LOG_INFO, "Find type %d Lib fail. Bind Lib NG %d\n", i, *ret); + } + } + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetBindAttr(VI_PIPE ViPipe, ISP_BIND_ATTR_S *pstBindAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstBindAttr); + + isp_3aLib_get(ViPipe, &(pstBindAttr->stAeLib), AAA_TYPE_AE); + isp_3aLib_get(ViPipe, &(pstBindAttr->stAwbLib), AAA_TYPE_AWB); + isp_3aLib_get(ViPipe, &(pstBindAttr->stAfLib), AAA_TYPE_AF); + + ISP_DEBUG(LOG_DEBUG, "pstBindAttr->stAeLib %s %d\n" + , pstBindAttr->stAeLib.acLibName, pstBindAttr->stAeLib.s32Id); + ISP_DEBUG(LOG_DEBUG, "pstBindAttr->stAwbLib %s %d\n" + , pstBindAttr->stAwbLib.acLibName, pstBindAttr->stAwbLib.s32Id); + ISP_DEBUG(LOG_DEBUG, "pstBindAttr->stAfLib %s %d\n" + , pstBindAttr->stAfLib.acLibName, pstBindAttr->stAfLib.s32Id); + return CVI_SUCCESS; +} +#endif + +static ISP_SENSOR_REGISTER_S tmpSnsRegRunc; + +CVI_S32 CVI_ISP_SensorRegCallBack(VI_PIPE ViPipe, ISP_SNS_ATTR_INFO_S *pstSnsAttrInfo, + ISP_SENSOR_REGISTER_S *pstRegister) +{ +#if 1 + memcpy(&tmpSnsRegRunc, pstRegister, sizeof(ISP_SENSOR_REGISTER_S)); +#else + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstSnsAttrInfo); + + CVI_S32 s32Ret; + ISP_CTX_S *pstIspCtx = CVI_NULL; + +// ISP_CHECK_POINTER(pstRegister); +#if 0 + ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_sensor_init); + ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_sensor_exit); + ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_sensor_global_init); + ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_set_image_mode); + ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_set_wdr_mode); + ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_get_isp_default); + //ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_get_isp_black_level); + ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_get_sns_reg_info); + //ISP_CHECK_POINTER(pstRegister->stSnsExp.pfn_cmos_set_pixel_detect); +#endif + ISP_GET_CTX(ViPipe, pstIspCtx); + ISP_CHECK_POINTER(pstIspCtx); + + if (pstIspCtx->bSnsReg == CVI_TRUE) + return CVI_FAILURE; + + if (pstRegister == CVI_NULL) + s32Ret = sns_sensor_cb_reg(ViPipe, pstSnsAttrInfo); + else + s32Ret = isp_sensor_register(ViPipe, pstSnsAttrInfo, pstRegister); + if (s32Ret != CVI_SUCCESS) + return s32Ret; + + pstIspCtx->stBindAttr.sensorId = pstSnsAttrInfo->eSensorId; + pstIspCtx->bSnsReg = CVI_TRUE; +#endif + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SensorUnRegCallBack(VI_PIPE ViPipe, SENSOR_ID SensorId) +{ +#if 1 + (void)ViPipe; + (void)SensorId; + + memset(&tmpSnsRegRunc, 0, sizeof(ISP_SENSOR_REGISTER_S)); + return CVI_SUCCESS; +#else + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + + SENSOR_ID sensorId = 0; + CVI_S32 s32Ret; + ISP_CTX_S *pstIspCtx = CVI_NULL; + + ISP_GET_CTX(ViPipe, pstIspCtx); + + isp_sensor_getId(ViPipe, &sensorId); + + if (pstIspCtx->stBindAttr.sensorId != sensorId) { + ISP_DEBUG(LOG_ERR, "ViPipe %d current sensor is %d, unregister sensor is %d.\n", + ViPipe, pstIspCtx->stBindAttr.sensorId, sensorId); + return -EINVAL; + } + + s32Ret = isp_sensor_unRegister(ViPipe); + pstIspCtx->bSnsReg = CVI_FALSE; + return s32Ret; +#endif +} + +#if 0 +CVI_S32 CVI_ISP_AELibRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib, ISP_AE_REGISTER_S *pstRegister) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstRegister); + ISP_CHECK_POINTER(pstAeLib); + + CVI_S32 ret = CVI_SUCCESS; + + ret = isp_3aLib_find(ViPipe, pstAeLib, AAA_TYPE_AE); + if (ret != ISP_3ALIB_FIND_FAIL) { + ISP_DEBUG(LOG_ERR, "This AE Lib already be registered\n"); + return -EINVAL; + } + + ret = isp_3aLib_reg(ViPipe, pstAeLib, &(pstRegister->stAeExpFunc), AAA_TYPE_AE); + if (ret != CVI_SUCCESS) { + ISP_DEBUG(LOG_ERR, "This AE Lib register fail\n"); + } + + return ret; +} + +CVI_S32 CVI_ISP_AWBLibRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib, ISP_AWB_REGISTER_S *pstRegister) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstRegister); + ISP_CHECK_POINTER(pstAwbLib); + + CVI_S32 ret = CVI_SUCCESS; + + ret = isp_3aLib_find(ViPipe, pstAwbLib, AAA_TYPE_AWB); + if (ret != ISP_3ALIB_FIND_FAIL) { + ISP_DEBUG(LOG_ERR, "This AWB Lib already be registered\n"); + return -EINVAL; + } + + ret = isp_3aLib_reg(ViPipe, pstAwbLib, &(pstRegister->stAwbExpFunc), AAA_TYPE_AWB); + if (ret != CVI_SUCCESS) { + ISP_DEBUG(LOG_ERR, "This AWB Lib register fail\n"); + isp_reg_lib_dump(); + } + + return ret; +} + +CVI_S32 CVI_ISP_AELibUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAeLib) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstAeLib); + + if (isp_3aLib_unreg(ViPipe, pstAeLib, AAA_TYPE_AE) != CVI_SUCCESS) { + ISP_DEBUG(LOG_ERR, "This 3aLib unregister fail\n"); + isp_reg_lib_dump(); + return -EINVAL; + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_AWBLibUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAwbLib) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstAwbLib); + + if (isp_3aLib_unreg(ViPipe, pstAwbLib, AAA_TYPE_AWB) != CVI_SUCCESS) { + ISP_DEBUG(LOG_ERR, "This 3aLib unregister fail\n"); + isp_reg_lib_dump(); + return -EINVAL; + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_AFLibRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAfLib, ISP_AF_REGISTER_S *pstRegister) +{ + CVI_S32 s32Ret = 0; + + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstRegister); + ISP_CHECK_POINTER(pstAfLib); + s32Ret = isp_3aLib_find(ViPipe, pstAfLib, AAA_TYPE_AF); + if (s32Ret != ISP_3ALIB_FIND_FAIL) { + ISP_DEBUG(LOG_ERR, "This AF Lib already be registered\n"); + return -EINVAL; + } + + s32Ret = isp_3aLib_reg(ViPipe, pstAfLib, &(pstRegister->stAfExpFunc), AAA_TYPE_AF); + if (s32Ret != 0) { + ISP_DEBUG(LOG_ERR, "AF Lib register fail.\n"); + return CVI_FAILURE; + } + // isp_reg_lib_dump(); + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_AFLibUnRegCallBack(VI_PIPE ViPipe, ALG_LIB_S *pstAfLib) +{ + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstAfLib); + + if (isp_3aLib_unreg(ViPipe, pstAfLib, AAA_TYPE_AF) == -1) { + ISP_DEBUG(LOG_ERR, "AF Lib unRegister fail.\n"); + return -EINVAL; + } + return 0; +} + +CVI_S32 CVI_ISP_GetAEStatistics(VI_PIPE ViPipe, ISP_AE_STATISTICS_S *pstAeStat) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstAeStat); + + ISP_AA_STAT_INFO_S *stsInfo; + CVI_U32 i, j, m; + CVI_U32 col, row; + ISP_CTX_S *pstIspCtx = CVI_NULL; + ISP_STATISTICS_CTRL_U unStatKey; + + ISP_GET_CTX(ViPipe, pstIspCtx); + /*TODO@CF. Need lock when get statistic data value.*/ + isp_3aInfo_get(ViPipe, &stsInfo); + ISP_CHECK_POINTER(stsInfo); + + unStatKey = pstIspCtx->stsCfgInfo.unKey; + /*TODO@CF. Need add sts enable check here.*/ + for (i = 0; i < ISP_CHANNEL_MAX_NUM; i++) { + for (j = 0; j < AE_MAX_NUM; j++) { + for (m = 0; m < MAX_HIST_BINS; m++) + pstAeStat->au32FEHist1024Value[i][j][m] = + stsInfo->aeStat1[j].au32HistogramMemArray[i][m]; + // Give global data only when Stat enable. + if (unStatKey.bit1FEAeGloStat) { + pstAeStat->au16FEGlobalAvg[i][j][0] = stsInfo->aeStat2[j].u16GlobalAvgB[i]; + pstAeStat->au16FEGlobalAvg[i][j][1] = stsInfo->aeStat2[j].u16GlobalAvgGr[i]; + pstAeStat->au16FEGlobalAvg[i][j][2] = stsInfo->aeStat2[j].u16GlobalAvgGb[i]; + pstAeStat->au16FEGlobalAvg[i][j][3] = stsInfo->aeStat2[j].u16GlobalAvgR[i]; + } + // Give local data only when Stat enable. + if (unStatKey.bit1FEAeLocStat) { + for (col = 0; col < AE_ZONE_COLUMN; col++) { + for (row = 0; row < AE_ZONE_ROW; row++) { + pstAeStat->au16FEZoneAvg[i][j][row][col][0] = + stsInfo->aeStat3[j].au16ZoneAvg[i][row][col][0]; + pstAeStat->au16FEZoneAvg[i][j][row][col][1] = + stsInfo->aeStat3[j].au16ZoneAvg[i][row][col][1]; + pstAeStat->au16FEZoneAvg[i][j][row][col][2] = + stsInfo->aeStat3[j].au16ZoneAvg[i][row][col][2]; + pstAeStat->au16FEZoneAvg[i][j][row][col][3] = + stsInfo->aeStat3[j].au16ZoneAvg[i][row][col][3]; + } + } + } + } + } +#if 0 + for (i = 0; i < ISP_CHANNEL_MAX_NUM; i++) { + for (j = 0; j < MAX_HIST_BINS; j++) { + printf("pstAeStat->au32FEHist1024Value[%d][%d] %d\n", i, j, + pstAeStat->au32FEHist1024Value[i][j]); + } + for (j = 0; j < AE_MAX_NUM; j++) { + printf("pstAeStat->au16FEGlobalAvg[%d][%d][0] %d %d %d %d\n", i, j, + pstAeStat->au16FEGlobalAvg[i][j][0], pstAeStat->au16FEGlobalAvg[i][j][1], + pstAeStat->au16FEGlobalAvg[i][j][2], pstAeStat->au16FEGlobalAvg[i][j][3]); + for (l = 0; l < AE_ZONE_COL; l++) { + for (k = 0; k < AE_ZONE_ROW; k++) { + printf("pstAeStat->au16FEZoneAvg[%d][%d][%d][0] %d %d %d %d\n", i, k, l, + pstAeStat->au16FEZoneAvg[i][j][k][l][0], + pstAeStat->au16FEZoneAvg[i][j][k][l][1], + pstAeStat->au16FEZoneAvg[i][j][k][l][2], + pstAeStat->au16FEZoneAvg[i][j][k][l][3]); + } + } + } + } +#endif + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetWBStatistics(VI_PIPE ViPipe, ISP_WB_STATISTICS_S *pstAwbStat) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstAwbStat); + + ISP_AA_STAT_INFO_S *stsInfo; + CVI_U32 i; + ISP_CTX_S *pstIspCtx = CVI_NULL; + ISP_STATISTICS_CTRL_U unStatKey; + + ISP_GET_CTX(ViPipe, pstIspCtx); + /*TODO@CF. Need lock when get statistic data value.*/ + isp_3aInfo_get(ViPipe, &stsInfo); + ISP_CHECK_POINTER(stsInfo); + + unStatKey = pstIspCtx->stsCfgInfo.unKey; + // HISI only has long exposure data. So only return LE now. + // Global AWB info enable. + if (unStatKey.bit1AwbStat1) { + pstAwbStat->u16GlobalB = stsInfo->awbStat1[0].u16MeteringAwbAvgB; + pstAwbStat->u16GlobalG = stsInfo->awbStat1[0].u16MeteringAwbAvgG; + pstAwbStat->u16GlobalR = stsInfo->awbStat1[0].u16MeteringAwbAvgR; + pstAwbStat->u16CountAll = stsInfo->awbStat1[0].u16MeteringAwbCountAll; + } + + // Local AWB info enable. + if (unStatKey.bit1AwbStat2) { + for (i = 0; i < AWB_ZONE_NUM; i++) { + pstAwbStat->au16ZoneAvgB[i] = stsInfo->awbZoneAvgB[0][i]; + pstAwbStat->au16ZoneAvgG[i] = stsInfo->awbZoneAvgG[0][i]; + pstAwbStat->au16ZoneAvgR[i] = stsInfo->awbZoneAvgR[0][i]; + pstAwbStat->au16ZoneCountAll[i] = stsInfo->awbZoneCount[0][i]; + } + } + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetFocusStatistics(VI_PIPE ViPipe, ISP_AF_STATISTICS_S *pstAfStat) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstAfStat); + + ISP_AA_STAT_INFO_S *stsInfo; + CVI_U32 row, col; + CVI_U32 afWinXNum = AF_ZONE_COLUMN, afWinYNum = AF_ZONE_ROW; + ISP_CTX_S *pstIspCtx = CVI_NULL; + ISP_STATISTICS_CTRL_U unStatKey; + + /*TODO@CF. Need lock when get statistic data value.*/ + ISP_GET_CTX(ViPipe, pstIspCtx); + isp_3aInfo_get(ViPipe, &stsInfo); + ISP_CHECK_POINTER(stsInfo); + + unStatKey = pstIspCtx->stsCfgInfo.unKey; + + if (unStatKey.bit1FEAfStat) { + for (row = 0; row < afWinYNum; row++) { + for (col = 0; col < afWinXNum; col++) { + pstAfStat->stFEAFStat.stZoneMetrics[row][col].u16HlCnt = + stsInfo->afData.stZoneMetrics[row][col].u16HlCnt; + pstAfStat->stFEAFStat.stZoneMetrics[row][col].u32v0 = + stsInfo->afData.stZoneMetrics[row][col].u32v0; + pstAfStat->stFEAFStat.stZoneMetrics[row][col].u64h0 = + stsInfo->afData.stZoneMetrics[row][col].u64h0; + pstAfStat->stFEAFStat.stZoneMetrics[row][col].u64h1 = + stsInfo->afData.stZoneMetrics[row][col].u64h1; + } + } + } +#if 0 + for (j = 2; j < 4; j++) { + for (i = 2; i < 4; i++) { + ISP_DEBUG(LOG_DEBUG, "pstAfStat->stFEAFStat.stZoneMetrics[%d][%d].u16HlCnt %d %d %ld %ld\n", + i, j, pstAfStat->stFEAFStat.stZoneMetrics[i][j].u16HlCnt, + pstAfStat->stFEAFStat.stZoneMetrics[i][j].u32v0, + pstAfStat->stFEAFStat.stZoneMetrics[i][j].u64h0, + pstAfStat->stFEAFStat.stZoneMetrics[i][j].u64h1); + } + } +#endif + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetMGStatistics(VI_PIPE ViPipe, ISP_MG_STATISTICS_S *pstMgStat) +{ + /*TODO@CF. Need check what is MGstatistics*/ + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetStatisticsConfig(VI_PIPE ViPipe, const ISP_STATISTICS_CFG_S *pstStatCfg) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstStatCfg); + + ISP_CTX_S *pstIspCtx = NULL; + + ISP_GET_CTX(ViPipe, pstIspCtx); + ISP_CHECK_VAL_RANGE(pstStatCfg->stWBCfg.u16ZoneRow, 0, AWB_ZONE_ORIG_ROW); + ISP_CHECK_VAL_RANGE(pstStatCfg->stWBCfg.u16ZoneCol, 0, AWB_ZONE_ORIG_COLUMN); + + memcpy(&pstIspCtx->stsCfgInfo, pstStatCfg, sizeof(ISP_STATISTICS_CFG_S)); + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_3AWIN); + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetStatisticsConfig(VI_PIPE ViPipe, ISP_STATISTICS_CFG_S *pstStatCfg) +{ + ISP_CTX_S *pstIspCtx = NULL; + + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstStatCfg); + ISP_GET_CTX(ViPipe, pstIspCtx); + + memcpy(pstStatCfg, &pstIspCtx->stsCfgInfo, sizeof(ISP_STATISTICS_CFG_S)); + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetModParam(const ISP_MOD_PARAM_S *pstModParam) +{ + ISP_DEBUG(LOG_INFO, "Only support bottom-half.!\n"); + ISP_CHECK_POINTER(pstModParam); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetModParam(ISP_MOD_PARAM_S *pstModParam) +{ + ISP_DEBUG(LOG_DEBUG, "always return bottom-half!\n"); + ISP_CHECK_POINTER(pstModParam); + + // BotHalf = 1 means botoom half. + pstModParam->u32IntBotHalf = 1; + + return CVI_SUCCESS; +} + +// For Tool get some parameter use at calculate IQ. +CVI_S32 CVI_ISP_QueryInnerStateInfo(VI_PIPE ViPipe, ISP_INNER_STATE_INFO_S *pstInnerStateInfo) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstInnerStateInfo); + + isp_internal_param_get(ViPipe, pstInnerStateInfo); + + for (CVI_U32 i = 0; i < pstInnerStateInfo->wdrHistBinNum; i++) { + pstInnerStateInfo->wdrHistogramBefore[i] = pstInnerStateInfo->pWdrHistogram[i]; + pstInnerStateInfo->wdrHistogramAfter[i] = pstInnerStateInfo->pWdrHistogramResult[i]; + } + + return CVI_SUCCESS; +} + +// TODO@Kidd should add ISP API to calculate settings of radio shadding +// and remove CVI_ISP_SetRadioShadingAttr() / CVI_ISP_GetRadioShadingAttr() +CVI_S32 CVI_ISP_SetMeshShadingAttr(VI_PIPE ViPipe, const ISP_MeshShading_ATTR_S *pstMeshShadingAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstMeshShadingAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_MESHSHADING_LSC_ENABLE, pstMeshShadingAttr->Enable); + isp_param_set(ViPipe, ISP_MESHSHADING_ENOPTYPE, pstMeshShadingAttr->enOpType); + + // manual attributes + isp_param_set(ViPipe, ISP_MESHSHADING_MANUAL_LSC_STRENGTH, pstMeshShadingAttr->stManual.MeshStr); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) + isp_param_set(ViPipe, ISP_MESHSHADING_AUTO_LSC_STRENGTH + i, pstMeshShadingAttr->stAuto.MeshStr[i]); + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_LSC_M); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetMeshShadingAttr(VI_PIPE ViPipe, ISP_MeshShading_ATTR_S *pstMeshShadingAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstMeshShadingAttr); + + CLEAR(*pstMeshShadingAttr); + // non-auto parameters + isp_param_get(ViPipe, ISP_MESHSHADING_LSC_ENABLE, (void *)(uintptr_t)&(pstMeshShadingAttr->Enable)); + isp_param_get(ViPipe, ISP_MESHSHADING_ENOPTYPE, (void *)(uintptr_t)&(pstMeshShadingAttr->enOpType)); + + // manual parameters + isp_param_get(ViPipe, ISP_MESHSHADING_MANUAL_LSC_STRENGTH, + (void *)(uintptr_t)&(pstMeshShadingAttr->stManual.MeshStr)); + + // auto parameters + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_MESHSHADING_AUTO_LSC_STRENGTH + i, + (void *)(uintptr_t)&(pstMeshShadingAttr->stAuto.MeshStr[i])); + } + // TODO should add fixed parameters? + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetMeshShadingGainLutAttr(VI_PIPE ViPipe + , const ISP_MeshShadingGainLut_ATTR_S *pstMeshShadingGainLutAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstMeshShadingGainLutAttr); + + memcpy(&g_param[ViPipe].mlscLUT, pstMeshShadingGainLutAttr, sizeof(*pstMeshShadingGainLutAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_LSC_M); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetMeshShadingGainLutAttr(VI_PIPE ViPipe, ISP_MeshShadingGainLut_ATTR_S *pstMeshShadingGainLutAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstMeshShadingGainLutAttr); + + memcpy(pstMeshShadingGainLutAttr, &g_param[ViPipe].mlscLUT, sizeof(*pstMeshShadingGainLutAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetRadialShadingAttr(VI_PIPE ViPipe, const ISP_RadialShading_ATTR_S *pstRadialShadingAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstRadialShadingAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_MESHSHADING_LSCR_ENABLE, pstRadialShadingAttr->Enable); + isp_param_set(ViPipe, ISP_MESHSHADING_LSCR_CENTERX, pstRadialShadingAttr->CenterX); + isp_param_set(ViPipe, ISP_MESHSHADING_LSCR_CENTERY, pstRadialShadingAttr->CenterY); + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_LSC_R); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetRadialShadingAttr(VI_PIPE ViPipe, ISP_RadialShading_ATTR_S *pstRadialShadingAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstRadialShadingAttr); + + // non-auto parameters + isp_param_get(ViPipe, ISP_MESHSHADING_LSCR_ENABLE, (void *)(uintptr_t)&(pstRadialShadingAttr->Enable)); + isp_param_get(ViPipe, ISP_MESHSHADING_LSCR_CENTERX, (void *)(uintptr_t)&(pstRadialShadingAttr->CenterX)); + isp_param_get(ViPipe, ISP_MESHSHADING_LSCR_CENTERY, (void *)(uintptr_t)&(pstRadialShadingAttr->CenterY)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetRadialShadingGainLutAttr(VI_PIPE ViPipe, + const ISP_RadialShadingGainLut_ATTR_S *pstRadialShadingGainLutAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstRadialShadingGainLutAttr); + + // non-auto attributes + // TODO@Kidd interplace by color temperature + for (CVI_U32 i = 0; i < ISP_RLSC_WINDOW_SIZE; i++) { + isp_param_set(ViPipe, ISP_MESHSHADING_LOW_CT_LSCR_GAIN_LUT_0 + i, + pstRadialShadingGainLutAttr->RLscGainLut[ISP_RLSC_COLOR_TEMPERATURE_LOW][i]); + isp_param_set(ViPipe, ISP_MESHSHADING_HIGH_CT_LSCR_GAIN_LUT_0 + i, + pstRadialShadingGainLutAttr->RLscGainLut[ISP_RLSC_COLOR_TEMPERATURE_HIGH][i]); + } + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_LSC_R); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetRadialShadingGainLutAttr(VI_PIPE ViPipe, + ISP_RadialShadingGainLut_ATTR_S *pstRadialShadingGainLutAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstRadialShadingGainLutAttr); + + // non-auto parameters + // TODO interplace by color temperature + for (CVI_S32 i = 0; i < ISP_RLSC_WINDOW_SIZE; i++) { + isp_param_get(ViPipe, ISP_MESHSHADING_LOW_CT_LSCR_GAIN_LUT_0 + i, + (void *)(uintptr_t)&(pstRadialShadingGainLutAttr->RLscGainLut[ISP_RLSC_COLOR_TEMPERATURE_LOW][i])); + isp_param_get(ViPipe, ISP_MESHSHADING_HIGH_CT_LSCR_GAIN_LUT_0 + i, + (void *)(uintptr_t)&(pstRadialShadingGainLutAttr->RLscGainLut[ISP_RLSC_COLOR_TEMPERATURE_HIGH][i])); + } + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintDemosaicAttr(const ISP_Demosaic_ATTR_S *pstDemosaicAttr) +{ + // non-auto attributes + PRINT_ATTR(pstDemosaicAttr->Enable, reg_cfa_enable, 0, 1); + PRINT_ATTR(pstDemosaicAttr->TuningMode, reg_cfa_out_sel, 0, 1); + + // manual attributes + PRINT_ATTR(pstDemosaicAttr->stManual.CoarseEdgeThr, reg_cfa_edgee_thd, 0, 4095); + PRINT_ATTR(pstDemosaicAttr->stManual.CoarseStr, reg_cfa_edge_tol, 0, 4095); + PRINT_ATTR(pstDemosaicAttr->stManual.FineEdgeThr, reg_cfa_sige_thd, 0, 4095); + PRINT_ATTR(pstDemosaicAttr->stManual.FineStr, (reg_cfa_gsig_tol, reg_cfa_rbsig_tol), 0, 4095); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_S32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstDemosaicAttr->stAuto.CoarseEdgeThr[i], reg_cfa_edgee_thd, 0, 4095); + PRINT_ATTR(pstDemosaicAttr->stAuto.CoarseStr[i], reg_cfa_edge_tol, 0, 4095); + PRINT_ATTR(pstDemosaicAttr->stAuto.FineEdgeThr[i], reg_cfa_sige_thd, 0, 4095); + PRINT_ATTR(pstDemosaicAttr->stAuto.FineStr[i], (reg_cfa_gsig_tol, reg_cfa_rbsig_tol), 0, 4095); + } + #endif +} + +CVI_S32 CVI_ISP_SetDemosaicAttr(VI_PIPE ViPipe, const ISP_Demosaic_ATTR_S *pstDemosaicAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDemosaicAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_DEMOSAIC_ENABLE, pstDemosaicAttr->Enable); + isp_param_set(ViPipe, ISP_DEMOSAIC_ENOPTYPE, pstDemosaicAttr->enOpType); + isp_param_set(ViPipe, ISP_DEMOSAIC_OUTSEL, pstDemosaicAttr->TuningMode); + + // manual attributes + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_COARSEEDGETHR, pstDemosaicAttr->stManual.CoarseEdgeThr); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_COARSESTR, pstDemosaicAttr->stManual.CoarseStr); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_FINEEDGETHR, pstDemosaicAttr->stManual.FineEdgeThr); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_FINESTR, pstDemosaicAttr->stManual.FineStr); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_COARSEEDGETHR + i, pstDemosaicAttr->stAuto.CoarseEdgeThr[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_COARSESTR + i, pstDemosaicAttr->stAuto.CoarseStr[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_FINEEDGETHR + i, pstDemosaicAttr->stAuto.FineEdgeThr[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_FINESTR + i, pstDemosaicAttr->stAuto.FineStr[i]); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicAttr(pstDemosaicAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DEMOSAIC); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDemosaicAttr(VI_PIPE ViPipe, ISP_Demosaic_ATTR_S *pstDemosaicAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDemosaicAttr); + + CLEAR(*pstDemosaicAttr); + // non-auto parameters + isp_param_get(ViPipe, ISP_DEMOSAIC_ENABLE, (void *)(uintptr_t)&(pstDemosaicAttr->Enable)); + isp_param_get(ViPipe, ISP_DEMOSAIC_ENOPTYPE, (void *)(uintptr_t)&(pstDemosaicAttr->enOpType)); + isp_param_get(ViPipe, ISP_DEMOSAIC_OUTSEL, (void *)(uintptr_t)&(pstDemosaicAttr->TuningMode)); + + // manual parameters + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_COARSEEDGETHR, + (void *)(uintptr_t)&(pstDemosaicAttr->stManual.CoarseEdgeThr)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_COARSESTR, (void *)(uintptr_t)&(pstDemosaicAttr->stManual.CoarseStr)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_FINEEDGETHR, + (void *)(uintptr_t)&(pstDemosaicAttr->stManual.FineEdgeThr)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_FINESTR, (void *)(uintptr_t)&(pstDemosaicAttr->stManual.FineStr)); + + // auto parameters + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_COARSEEDGETHR + i + , (void *)(uintptr_t)&(pstDemosaicAttr->stAuto.CoarseEdgeThr[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_COARSESTR + i + , (void *)(uintptr_t)&(pstDemosaicAttr->stAuto.CoarseStr[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_FINEEDGETHR + i + , (void *)(uintptr_t)&(pstDemosaicAttr->stAuto.FineEdgeThr[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_FINESTR + i + , (void *)(uintptr_t)&(pstDemosaicAttr->stAuto.FineStr[i])); + } + + // TODO should add fixed parameters? + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicAttr(pstDemosaicAttr); + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintDemosaicDemoireAttr(const ISP_DemosaicDemoire_ATTR_S *pstDemosaicDemoireAttr) +{ + // non-auto attributes + + // manual attributes + PRINT_ATTR(pstDemosaicDemoireAttr->stManual.DetailSmoothEnable, reg_cfa_moire_enable, 0, 1); + PRINT_ATTR(pstDemosaicDemoireAttr->stManual.DetailSmoothStr, reg_cfa_moire_strth, 0, 255); + PRINT_ATTR(pstDemosaicDemoireAttr->stManual.EdgeWgtStr, reg_cfa_moire_wght_gain, 0, 255); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_U8 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstDemosaicDemoireAttr->stAuto.DetailSmoothEnable[i], reg_cfa_moire_enable, 0, 1); + PRINT_ATTR(pstDemosaicDemoireAttr->stAuto.DetailSmoothStr[i], reg_cfa_moire_strth, 0, 255); + PRINT_ATTR(pstDemosaicDemoireAttr->stAuto.EdgeWgtStr[i], reg_cfa_moire_wght_gain, 0, 255); + } + #endif +} + +CVI_S32 CVI_ISP_SetDemosaicDemoireAttr(VI_PIPE ViPipe, const ISP_DemosaicDemoire_ATTR_S *pstDemosaicDemoireAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDemosaicDemoireAttr); + + // non-auto attributes + + // manual attributes + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_DEMOIREENABLE, pstDemosaicDemoireAttr->stManual.DetailSmoothEnable); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_DEMOIRESTR, pstDemosaicDemoireAttr->stManual.DetailSmoothStr); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_EDGEWGTSTR, pstDemosaicDemoireAttr->stManual.EdgeWgtStr); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_DEMOIREENABLE + i + , pstDemosaicDemoireAttr->stAuto.DetailSmoothEnable[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_DEMOIRESTR + i + , pstDemosaicDemoireAttr->stAuto.DetailSmoothStr[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_EDGEWGTSTR + i + , pstDemosaicDemoireAttr->stAuto.EdgeWgtStr[i]); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicDemoireAttr(pstDemosaicDemoireAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DEMOSAIC); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDemosaicDemoireAttr(VI_PIPE ViPipe, ISP_DemosaicDemoire_ATTR_S *pstDemosaicDemoireAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDemosaicDemoireAttr); + + // non-auto parameters + + // manual parameters + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_DEMOIREENABLE + , (void *)(uintptr_t)&(pstDemosaicDemoireAttr->stManual.DetailSmoothEnable)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_DEMOIRESTR + , (void *)(uintptr_t)&(pstDemosaicDemoireAttr->stManual.DetailSmoothStr)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_EDGEWGTSTR + , (void *)(uintptr_t)&(pstDemosaicDemoireAttr->stManual.EdgeWgtStr)); + + // auto parameters + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_DEMOIREENABLE + i + , (void *)(uintptr_t)&(pstDemosaicDemoireAttr->stAuto.DetailSmoothEnable[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_DEMOIRESTR + i + , (void *)(uintptr_t)&(pstDemosaicDemoireAttr->stAuto.DetailSmoothStr[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_EDGEWGTSTR + i + , (void *)(uintptr_t)&(pstDemosaicDemoireAttr->stAuto.EdgeWgtStr[i])); + } + + // TODO should add fixed parameters? + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicDemoireAttr(pstDemosaicDemoireAttr); + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintDemosaicFilterAttr(const ISP_DemosaicFilter_ATTR_S *pstDemosaicFilterAttr) +{ + // non-auto attributes + + // manual attributes + PRINT_ATTR(pstDemosaicFilterAttr->stManual.DetailWgtThr + , (reg_cfa_moire_diffthd_min, reg_cfa_moire_sadthd_min), 0, 4095); + PRINT_ATTR(pstDemosaicFilterAttr->stManual.DetailWgtSlope + , (reg_cfa_moire_diffthd_slope, reg_cfa_moire_sadthd_slope), 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stManual.DetailWgtMin + , (reg_cfa_moire_diffw_low, reg_cfa_moire_sadw_low), 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stManual.DetailWgtMax + , (reg_cfa_moire_diffw_high, reg_cfa_moire_sadw_high), 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stManual.LumaWgtThr, reg_cfa_moire_lumathd_min, 0, 4095); + PRINT_ATTR(pstDemosaicFilterAttr->stManual.LumaWgtSlope, reg_cfa_moire_lumathd_slope, 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stManual.LumaWgtMin, reg_cfa_moire_lumaw_low, 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stManual.LumaWgtMax, reg_cfa_moire_lumaw_high, 0, 255); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.DetailWgtThr[i] + , (reg_cfa_moire_diffthd_min, reg_cfa_moire_sadthd_min), 0, 4095); + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.DetailWgtSlope[i] + , (reg_cfa_moire_diffthd_slope, reg_cfa_moire_sadthd_slope), 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.DetailWgtMin[i] + , (reg_cfa_moire_diffw_low, reg_cfa_moire_sadw_low), 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.DetailWgtMax[i] + , (reg_cfa_moire_diffw_high, reg_cfa_moire_sadw_high), 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.LumaWgtThr[i], reg_cfa_moire_lumathd_min, 0, 4095); + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.LumaWgtSlope[i], reg_cfa_moire_lumathd_slope, 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.LumaWgtMin[i], reg_cfa_moire_lumaw_low, 0, 255); + PRINT_ATTR(pstDemosaicFilterAttr->stAuto.LumaWgtMax[i], reg_cfa_moire_lumaw_high, 0, 255); + } + #endif +} + +CVI_S32 CVI_ISP_SetDemosaicFilterAttr(VI_PIPE ViPipe, const ISP_DemosaicFilter_ATTR_S *pstDemosaicFilterAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDemosaicFilterAttr); + + // non-auto attributes + + // manual attributes + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFTHR, pstDemosaicFilterAttr->stManual.DetailWgtThr); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFSLOPE, pstDemosaicFilterAttr->stManual.DetailWgtSlope); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFLOWOFFSET, pstDemosaicFilterAttr->stManual.DetailWgtMin); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFHIGHOFFSET, pstDemosaicFilterAttr->stManual.DetailWgtMax); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_LUMATHRMIN, pstDemosaicFilterAttr->stManual.LumaWgtThr); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_LUMATHRSLOPE, pstDemosaicFilterAttr->stManual.LumaWgtSlope); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_LUMAWLOW, pstDemosaicFilterAttr->stManual.LumaWgtMin); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_LUMAWHIGH, pstDemosaicFilterAttr->stManual.LumaWgtMax); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_DIFFTHR + i, pstDemosaicFilterAttr->stAuto.DetailWgtThr[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_DIFFSLOPE + i, pstDemosaicFilterAttr->stAuto.DetailWgtSlope[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_DIFFLOWOFFSET + i + , pstDemosaicFilterAttr->stAuto.DetailWgtMin[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_DIFFHIGHOFFSET + i + , pstDemosaicFilterAttr->stAuto.DetailWgtMax[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_LUMATHRMIN + i + , pstDemosaicFilterAttr->stAuto.LumaWgtThr[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_LUMATHRSLOPE + i + , pstDemosaicFilterAttr->stAuto.LumaWgtSlope[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_LUMAWLOW + i, pstDemosaicFilterAttr->stAuto.LumaWgtMin[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_LUMAWHIGH + i, pstDemosaicFilterAttr->stAuto.LumaWgtMax[i]); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicFilterAttr(pstDemosaicFilterAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DEMOSAIC); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDemosaicFilterAttr(VI_PIPE ViPipe, ISP_DemosaicFilter_ATTR_S *pstDemosaicFilterAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDemosaicFilterAttr); + + // non-auto parameters + + // manual parameters + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFTHR, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.DetailWgtThr)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFSLOPE, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.DetailWgtSlope)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFLOWOFFSET, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.DetailWgtMin)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_DIFFHIGHOFFSET, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.DetailWgtMax)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_LUMATHRMIN, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.LumaWgtThr)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_LUMATHRSLOPE, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.LumaWgtSlope)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_LUMAWLOW, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.LumaWgtMin)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_LUMAWHIGH, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stManual.LumaWgtMax)); + + // auto parameters + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_DIFFTHR + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.DetailWgtThr[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_DIFFSLOPE + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.DetailWgtSlope[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_DIFFLOWOFFSET + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.DetailWgtMin[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_DIFFHIGHOFFSET + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.DetailWgtMax[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_LUMATHRMIN + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.LumaWgtThr[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_LUMATHRSLOPE + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.LumaWgtSlope[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_LUMAWLOW + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.LumaWgtMin[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_LUMAWHIGH + i, + (void *)(uintptr_t)&(pstDemosaicFilterAttr->stAuto.LumaWgtMax[i])); + } + + // TODO should add fixed parameters? + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicFilterAttr(pstDemosaicFilterAttr); + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintDemosaicEEAttr(const ISP_DemosaicEE_ATTR_S *pstDemosaicEEAttr) +{ + CVI_S32 j = 0; + + // non-auto attributes + + // manual attributes + PRINT_ATTR(pstDemosaicEEAttr->stManual.EdgeEnhanceEnable, reg_rgbee_enable, 0, 1); + PRINT_ATTR(pstDemosaicEEAttr->stManual.OverShtGain, reg_rgbee_osgain, 0, 1023); + PRINT_ATTR(pstDemosaicEEAttr->stManual.UnderShtGain, reg_rgbee_usgain, 0, 1023); + PRINT_ATTR(pstDemosaicEEAttr->stManual.NoiseSuppressStr + , (reg_rgbee_np_lut00 - reg_rgbee_np_lut32), 0, 255); + for (j = 0; j < 33; j++) + PRINT_ATTR(pstDemosaicEEAttr->stManual.HFGainTable[j] + , (reg_rgbee_ac_lut00 - reg_rgbee_ac_lut32), 0, 255); + for (j = 0; j < 33; j++) + PRINT_ATTR(pstDemosaicEEAttr->stManual.GainTable[j] + , (reg_rgbee_edge_lut00 - reg_rgbee_edge_lut32), 0, 255); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstDemosaicEEAttr->stAuto.EdgeEnhanceEnable[i], reg_rgbee_enable, 0, 1); + PRINT_ATTR(pstDemosaicEEAttr->stAuto.OverShtGain[i], reg_rgbee_osgain, 0, 1023); + PRINT_ATTR(pstDemosaicEEAttr->stAuto.UnderShtGain[i], reg_rgbee_usgain, 0, 1023); + PRINT_ATTR(pstDemosaicEEAttr->stAuto.NoiseSuppressStr[i] + , (reg_rgbee_np_lut00 - reg_rgbee_np_lut32), 0, 255); + for (j = 0; j < 33; j++) + PRINT_ATTR(pstDemosaicEEAttr->stAuto.HFGainTable[j][i] + , (reg_rgbee_ac_lut00 - reg_rgbee_ac_lut32), 0, 255); + for (j = 0; j < 33; j++) + PRINT_ATTR(pstDemosaicEEAttr->stAuto.GainTable[j][i] + , (reg_rgbee_edge_lut00 - reg_rgbee_edge_lut32), 0, 255); + } + #endif +} + +CVI_S32 CVI_ISP_SetDemosaicEEAttr(VI_PIPE ViPipe, const ISP_DemosaicEE_ATTR_S *pstDemosaicEEAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDemosaicEEAttr); + + CVI_S32 i = 0; + CVI_S32 j = 0; + CVI_S32 offset = 0; + + // non-auto attributes + + // manual attributes + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_EDGEENHANCEENABLE, pstDemosaicEEAttr->stManual.EdgeEnhanceEnable); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_OVERSHTGAIN, pstDemosaicEEAttr->stManual.OverShtGain); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_UNDERSHTGAIN, pstDemosaicEEAttr->stManual.UnderShtGain); + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_NOISESUPPRESSSTR + , pstDemosaicEEAttr->stManual.NoiseSuppressStr); + for (j = 0; j < 33; j++) + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_HFGAINTABLE_0 + j, + pstDemosaicEEAttr->stManual.HFGainTable[j]); + for (j = 0; j < 33; j++) + isp_param_set(ViPipe, ISP_DEMOSAIC_MANUAL_GAINTABLE_0 + j, pstDemosaicEEAttr->stManual.GainTable[j]); + + // auto attributes + for (i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_EDGEENHANCEENABLE + i, + pstDemosaicEEAttr->stAuto.EdgeEnhanceEnable[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_OVERSHTGAIN + i, pstDemosaicEEAttr->stAuto.OverShtGain[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_UNDERSHTGAIN + i, pstDemosaicEEAttr->stAuto.UnderShtGain[i]); + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_NOISESUPPRESSSTR + i, + pstDemosaicEEAttr->stAuto.NoiseSuppressStr[i]); + for (j = 0; j < 33; j++) { + offset = ISP_DEMOSAIC_AUTO_HFGAINTABLE_1 - ISP_DEMOSAIC_AUTO_HFGAINTABLE_0; + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_HFGAINTABLE_0 + offset * j + i, + pstDemosaicEEAttr->stAuto.HFGainTable[j][i]); + } + for (j = 0; j < 33; j++) { + offset = ISP_DEMOSAIC_AUTO_GAINTABLE_1 - ISP_DEMOSAIC_AUTO_GAINTABLE_0; + isp_param_set(ViPipe, ISP_DEMOSAIC_AUTO_GAINTABLE_0 + offset * j + i, + pstDemosaicEEAttr->stAuto.GainTable[j][i]); + } + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicEEAttr(pstDemosaicEEAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DEMOSAIC); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDemosaicEEAttr(VI_PIPE ViPipe, ISP_DemosaicEE_ATTR_S *pstDemosaicEEAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDemosaicEEAttr); + + CVI_S32 i = 0; + CVI_S32 j = 0; + CVI_S32 offset = 0; + + // non-auto parameters + + // manual parameters + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_EDGEENHANCEENABLE, + (void *)(uintptr_t)&(pstDemosaicEEAttr->stManual.EdgeEnhanceEnable)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_OVERSHTGAIN, + (void *)(uintptr_t)&(pstDemosaicEEAttr->stManual.OverShtGain)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_UNDERSHTGAIN, + (void *)(uintptr_t)&(pstDemosaicEEAttr->stManual.UnderShtGain)); + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_NOISESUPPRESSSTR, + (void *)(uintptr_t)&(pstDemosaicEEAttr->stManual.NoiseSuppressStr)); + for (j = 0; j < 33; j++) { + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_HFGAINTABLE_0 + j, + (void *)(uintptr_t)&(pstDemosaicEEAttr->stManual.HFGainTable[j])); + } + for (j = 0; j < 33; j++) { + isp_param_get(ViPipe, ISP_DEMOSAIC_MANUAL_GAINTABLE_0 + j, + (void *)(uintptr_t)&(pstDemosaicEEAttr->stManual.GainTable[j])); + } + + // auto parameters + for (i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_EDGEENHANCEENABLE + i + , (void *)(uintptr_t)&(pstDemosaicEEAttr->stAuto.EdgeEnhanceEnable[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_OVERSHTGAIN + i + , (void *)(uintptr_t)&(pstDemosaicEEAttr->stAuto.OverShtGain[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_UNDERSHTGAIN + i + , (void *)(uintptr_t)&(pstDemosaicEEAttr->stAuto.UnderShtGain[i])); + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_NOISESUPPRESSSTR + i + , (void *)(uintptr_t)&(pstDemosaicEEAttr->stAuto.NoiseSuppressStr[i])); + for (j = 0; j < 33; j++) { + offset = ISP_DEMOSAIC_AUTO_HFGAINTABLE_1 - ISP_DEMOSAIC_AUTO_HFGAINTABLE_0; + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_HFGAINTABLE_0 + offset * j + i + , (void *)(uintptr_t)&(pstDemosaicEEAttr->stAuto.HFGainTable[j][i])); + } + for (j = 0; j < 33; j++) { + offset = ISP_DEMOSAIC_AUTO_GAINTABLE_1 - ISP_DEMOSAIC_AUTO_GAINTABLE_0; + isp_param_get(ViPipe, ISP_DEMOSAIC_AUTO_GAINTABLE_0 + offset * j + i + , (void *)(uintptr_t)&(pstDemosaicEEAttr->stAuto.GainTable[j][i])); + } + } + + // TODO should add fixed parameters? + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDemosaicEEAttr(pstDemosaicEEAttr); + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintNRAttr(const ISP_NR_ATTR_S *pstNRAttr) +{ + // non-auto attributes + PRINT_ATTR(pstNRAttr->Enable, reg_bnr_enable, 0, 1); + PRINT_ATTR(pstNRAttr->enOpType, reg_na, 0, 1); + + // manual attributes + PRINT_ATTR(pstNRAttr->stManual.WindowType + , (reg_bnr_weight_intra_0, reg_bnr_weight_intra_1, reg_bnr_weight_intra_2 + , reg_bnr_weight_norm_intra1, reg_bnr_weight_norm_intra2), 0, 11); + PRINT_ATTR(pstNRAttr->stManual.DetailSmoothMode, reg_bnr_flag_neighbor_max_weight, 0, 1); + PRINT_ATTR(pstNRAttr->stManual.NoiseSuppressStr, reg_bnr_ns_gain, 0, 255); + PRINT_ATTR(pstNRAttr->stManual.FilterType, reg_bnr_weight_lut_h, 0, 255); + PRINT_ATTR(pstNRAttr->stManual.NoiseSuppressStrMode, reg_bnr_strength_mode, 0, 255); + + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstNRAttr->stAuto.WindowType[i] + , (reg_bnr_weight_intra_0, reg_bnr_weight_intra_1, reg_bnr_weight_intra_2 + , reg_bnr_weight_norm_intra1, reg_bnr_weight_norm_intra2), 0, 11); + PRINT_ATTR(pstNRAttr->stAuto.DetailSmoothMode[i], reg_bnr_flag_neighbor_max_weight, 0, 1); + PRINT_ATTR(pstNRAttr->stAuto.NoiseSuppressStr[i], reg_bnr_ns_gain, 0, 255); + PRINT_ATTR(pstNRAttr->stAuto.FilterType[i], reg_bnr_weight_lut_h, 0, 255); + PRINT_ATTR(pstNRAttr->stAuto.NoiseSuppressStrMode[i], reg_bnr_strength_mode, 0, 255); + } + #endif +} + +CVI_S32 CVI_ISP_SetNRAttr(VI_PIPE ViPipe, const ISP_NR_ATTR_S *pstNRAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstNRAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_NR_ENABLE, pstNRAttr->Enable); + isp_param_set(ViPipe, ISP_NR_ENOPTYPE, pstNRAttr->enOpType); + + // manual attributes + isp_param_set(ViPipe, ISP_NR_MANUAL_WINDOWTYPE, pstNRAttr->stManual.WindowType); + isp_param_set(ViPipe, ISP_NR_MANUAL_DETAILSMOOTHMODE, pstNRAttr->stManual.DetailSmoothMode); + isp_param_set(ViPipe, ISP_NR_MANUAL_NOISESUPPRESSSTR, pstNRAttr->stManual.NoiseSuppressStr); + isp_param_set(ViPipe, ISP_NR_MANUAL_FILTERTYPE, pstNRAttr->stManual.FilterType); + isp_param_set(ViPipe, ISP_NR_MANUAL_NOISESUPPRESSSTRMODE, pstNRAttr->stManual.NoiseSuppressStrMode); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_NR_AUTO_WINDOWTYPE + i, pstNRAttr->stAuto.WindowType[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_DETAILSMOOTHMODE + i, pstNRAttr->stAuto.DetailSmoothMode[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_NOISESUPPRESSSTR + i, pstNRAttr->stAuto.NoiseSuppressStr[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_FILTERTYPE + i, pstNRAttr->stAuto.FilterType[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_NOISESUPPRESSSTRMODE + i, pstNRAttr->stAuto.NoiseSuppressStrMode[i]); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintNRAttr(pstNRAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_BNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetNRAttr(VI_PIPE ViPipe, ISP_NR_ATTR_S *pstNRAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstNRAttr); + + CLEAR(*pstNRAttr); + // non-auto attributes + isp_param_get(ViPipe, ISP_NR_ENABLE, (void *)(uintptr_t)&(pstNRAttr->Enable)); + isp_param_get(ViPipe, ISP_NR_ENOPTYPE, (void *)(uintptr_t)&(pstNRAttr->enOpType)); + + // manual attributes + isp_param_get(ViPipe, ISP_NR_MANUAL_WINDOWTYPE, (void *)(uintptr_t)&(pstNRAttr->stManual.WindowType)); + isp_param_get(ViPipe, ISP_NR_MANUAL_DETAILSMOOTHMODE, + (void *)(uintptr_t)&(pstNRAttr->stManual.DetailSmoothMode)); + isp_param_get(ViPipe, ISP_NR_MANUAL_NOISESUPPRESSSTR, + (void *)(uintptr_t)&(pstNRAttr->stManual.NoiseSuppressStr)); + isp_param_get(ViPipe, ISP_NR_MANUAL_FILTERTYPE, (void *)(uintptr_t)&(pstNRAttr->stManual.FilterType)); + isp_param_get(ViPipe, ISP_NR_MANUAL_NOISESUPPRESSSTRMODE, + (void *)(uintptr_t)&(pstNRAttr->stManual.NoiseSuppressStrMode)); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_NR_AUTO_WINDOWTYPE + i, + (void *)(uintptr_t)&(pstNRAttr->stAuto.WindowType[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_DETAILSMOOTHMODE + i, + (void *)(uintptr_t)&(pstNRAttr->stAuto.DetailSmoothMode[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_NOISESUPPRESSSTR + i, + (void *)(uintptr_t)&(pstNRAttr->stAuto.NoiseSuppressStr[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_FILTERTYPE + i, + (void *)(uintptr_t)&(pstNRAttr->stAuto.FilterType[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_NOISESUPPRESSSTRMODE + i, + (void *)(uintptr_t)&(pstNRAttr->stAuto.NoiseSuppressStrMode[i])); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintNRAttr(pstNRAttr); + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintNRFilterAttr(const ISP_NRFilter_ATTR_S *pstNRFilterAttr) +{ + // non-auto attributes + PRINT_ATTR(pstNRFilterAttr->TuningMode, reg_bnr_out_sel, 0, 15); + + // manual attributes + PRINT_ATTR(pstNRFilterAttr->stManual.NrLscRatio, reg_bnr_lsc_ratio, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[0], reg_bnr_intensity_sel_0, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[1], reg_bnr_intensity_sel_1, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[2], reg_bnr_intensity_sel_2, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[3], reg_bnr_intensity_sel_3, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[4], reg_bnr_intensity_sel_4, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[5], reg_bnr_intensity_sel_5, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[6], reg_bnr_intensity_sel_6, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.LumaStr[7], reg_bnr_intensity_sel_7, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.VarThr, reg_bnr_var_th, 0, 1023); + PRINT_ATTR(pstNRFilterAttr->stManual.CoringWgtLF, reg_bnr_res_ratio_k_smooth, 0, 256); + PRINT_ATTR(pstNRFilterAttr->stManual.CoringWgtHF, reg_bnr_res_ratio_k_texture, 0, 256); + PRINT_ATTR(pstNRFilterAttr->stManual.NonDirFiltStr, reg_bnr_weight_smooth, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.VhDirFiltStr, (reg_bnr_weight_v, reg_bnr_weight_h), 0, 31); + PRINT_ATTR(pstNRFilterAttr->stManual.AaDirFiltStr + , (reg_bnr_weight_d35, reg_bnr_weight_d135), 0, 31); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_S32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstNRFilterAttr->stAuto.NrLscRatio[i], reg_bnr_lsc_ratio, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[0][i], reg_bnr_intensity_sel_0, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[1][i], reg_bnr_intensity_sel_1, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[2][i], reg_bnr_intensity_sel_2, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[3][i], reg_bnr_intensity_sel_3, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[4][i], reg_bnr_intensity_sel_4, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[5][i], reg_bnr_intensity_sel_5, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[6][i], reg_bnr_intensity_sel_6, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.LumaStr[7][i], reg_bnr_intensity_sel_7, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.VarThr[i], reg_bnr_var_th, 0, 1023); + PRINT_ATTR(pstNRFilterAttr->stAuto.CoringWgtLF[i], reg_bnr_res_ratio_k_smooth, 0, 256); + PRINT_ATTR(pstNRFilterAttr->stAuto.CoringWgtHF[i], reg_bnr_res_ratio_k_texture, 0, 256); + PRINT_ATTR(pstNRFilterAttr->stAuto.NonDirFiltStr[i], reg_bnr_weight_smooth, 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.VhDirFiltStr[i], (reg_bnr_weight_v, reg_bnr_weight_h), 0, 31); + PRINT_ATTR(pstNRFilterAttr->stAuto.AaDirFiltStr[i] + , (reg_bnr_weight_d35, reg_bnr_weight_d135), 0, 31); + } + #endif +} + +CVI_S32 CVI_ISP_SetNRFilterAttr(VI_PIPE ViPipe, const ISP_NRFilter_ATTR_S *pstNRFilterAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstNRFilterAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_NR_TUNINGMODE, pstNRFilterAttr->TuningMode); + + // manual attributes + isp_param_set(ViPipe, ISP_NR_MANUAL_NRLSCRATIO, pstNRFilterAttr->stManual.NrLscRatio); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR0, pstNRFilterAttr->stManual.LumaStr[0]); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR1, pstNRFilterAttr->stManual.LumaStr[1]); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR2, pstNRFilterAttr->stManual.LumaStr[2]); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR3, pstNRFilterAttr->stManual.LumaStr[3]); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR4, pstNRFilterAttr->stManual.LumaStr[4]); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR5, pstNRFilterAttr->stManual.LumaStr[5]); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR6, pstNRFilterAttr->stManual.LumaStr[6]); + isp_param_set(ViPipe, ISP_NR_MANUAL_LUMASTR7, pstNRFilterAttr->stManual.LumaStr[7]); + isp_param_set(ViPipe, ISP_NR_MANUAL_VARTHR, pstNRFilterAttr->stManual.VarThr); + isp_param_set(ViPipe, ISP_NR_MANUAL_CORINGWGTLF, pstNRFilterAttr->stManual.CoringWgtLF); + isp_param_set(ViPipe, ISP_NR_MANUAL_CORINGWGTHF, pstNRFilterAttr->stManual.CoringWgtHF); + isp_param_set(ViPipe, ISP_NR_MANUAL_NONDIRFILTSTR, pstNRFilterAttr->stManual.NonDirFiltStr); + isp_param_set(ViPipe, ISP_NR_MANUAL_VHDIRFILTSTR, pstNRFilterAttr->stManual.VhDirFiltStr); + isp_param_set(ViPipe, ISP_NR_MANUAL_AADIRFILTSTR, pstNRFilterAttr->stManual.AaDirFiltStr); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_NR_AUTO_NRLSCRATIO + i, pstNRFilterAttr->stAuto.NrLscRatio[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR0 + i, pstNRFilterAttr->stAuto.LumaStr[0][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR1 + i, pstNRFilterAttr->stAuto.LumaStr[1][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR2 + i, pstNRFilterAttr->stAuto.LumaStr[2][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR3 + i, pstNRFilterAttr->stAuto.LumaStr[3][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR4 + i, pstNRFilterAttr->stAuto.LumaStr[4][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR5 + i, pstNRFilterAttr->stAuto.LumaStr[5][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR6 + i, pstNRFilterAttr->stAuto.LumaStr[6][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_LUMASTR7 + i, pstNRFilterAttr->stAuto.LumaStr[7][i]); + isp_param_set(ViPipe, ISP_NR_AUTO_VARTHR + i, pstNRFilterAttr->stAuto.VarThr[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_CORINGWGTLF + i, pstNRFilterAttr->stAuto.CoringWgtLF[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_CORINGWGTHF + i, pstNRFilterAttr->stAuto.CoringWgtHF[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_NONDIRFILTSTR + i, pstNRFilterAttr->stAuto.NonDirFiltStr[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_VHDIRFILTSTR + i, pstNRFilterAttr->stAuto.VhDirFiltStr[i]); + isp_param_set(ViPipe, ISP_NR_AUTO_AADIRFILTSTR + i, pstNRFilterAttr->stAuto.AaDirFiltStr[i]); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintNRFilterAttr(pstNRFilterAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_BNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetNRFilterAttr(VI_PIPE ViPipe, ISP_NRFilter_ATTR_S *pstNRFilterAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstNRFilterAttr); + + // non-auto attributes + isp_param_get(ViPipe, ISP_NR_TUNINGMODE, (void *)(uintptr_t)&(pstNRFilterAttr->TuningMode)); + + // manual attributes + isp_param_get(ViPipe, ISP_NR_MANUAL_NRLSCRATIO, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.NrLscRatio)); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR0, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[0])); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR1, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[1])); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR2, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[2])); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR3, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[3])); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR4, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[4])); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR5, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[5])); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR6, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[6])); + isp_param_get(ViPipe, ISP_NR_MANUAL_LUMASTR7, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.LumaStr[7])); + isp_param_get(ViPipe, ISP_NR_MANUAL_VARTHR, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.VarThr)); + isp_param_get(ViPipe, ISP_NR_MANUAL_CORINGWGTLF, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.CoringWgtLF)); + isp_param_get(ViPipe, ISP_NR_MANUAL_CORINGWGTHF, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.CoringWgtHF)); + isp_param_get(ViPipe, ISP_NR_MANUAL_NONDIRFILTSTR, + (void *)(uintptr_t)&(pstNRFilterAttr->stManual.NonDirFiltStr)); + isp_param_get(ViPipe, ISP_NR_MANUAL_VHDIRFILTSTR, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.VhDirFiltStr)); + isp_param_get(ViPipe, ISP_NR_MANUAL_AADIRFILTSTR, (void *)(uintptr_t)&(pstNRFilterAttr->stManual.AaDirFiltStr)); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_NR_AUTO_NRLSCRATIO + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.NrLscRatio[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR0 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[0][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR1 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[1][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR2 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[2][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR3 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[3][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR4 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[4][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR5 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[5][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR6 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[6][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_LUMASTR7 + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.LumaStr[7][i])); + isp_param_get(ViPipe, ISP_NR_AUTO_VARTHR + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.VarThr[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_CORINGWGTLF + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.CoringWgtLF[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_CORINGWGTHF + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.CoringWgtHF[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_NONDIRFILTSTR + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.NonDirFiltStr[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_VHDIRFILTSTR + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.VhDirFiltStr[i])); + isp_param_get(ViPipe, ISP_NR_AUTO_AADIRFILTSTR + i, + (void *)(uintptr_t)&(pstNRFilterAttr->stAuto.AaDirFiltStr[i])); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintNRFilterAttr(pstNRFilterAttr); + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintRLSCAttr(const ISP_RLSC_ATTR_S *pstRLSCAttr) +{ + // non-auto attributes + PRINT_ATTR(pstRLSCAttr->RlscEnable, reg_cbns_enable, 0, 1); + PRINT_ATTR(pstRLSCAttr->RlscCenterX, reg_cbns_centerx, 0, 4095); + PRINT_ATTR(pstRLSCAttr->RlscCenterY, reg_cbns_centery, 0, 2047); + + // manual attributes + PRINT_ATTR(pstRLSCAttr->stManual.RadialStr, reg_cbns_strnth, 0, 4095); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_S32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) + PRINT_ATTR(pstRLSCAttr->stAuto.RadialStr[i], reg_cbns_strnth, 0, 4095); + #endif +} + +CVI_S32 CVI_ISP_SetRLSCAttr(VI_PIPE ViPipe, const ISP_RLSC_ATTR_S *pstRLSCAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstRLSCAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_NR_RLSCENABLE, pstRLSCAttr->RlscEnable); + isp_param_set(ViPipe, ISP_NR_RLSCCENTERX, pstRLSCAttr->RlscCenterX); + isp_param_set(ViPipe, ISP_NR_RLSCCENTERY, pstRLSCAttr->RlscCenterY); + + // manual attributes + isp_param_set(ViPipe, ISP_NR_MANUAL_RADIALSTR, pstRLSCAttr->stManual.RadialStr); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) + isp_param_set(ViPipe, ISP_NR_AUTO_RADIALSTR + i, pstRLSCAttr->stAuto.RadialStr[i]); + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintRLSCAttr(pstRLSCAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_BNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetRLSCAttr(VI_PIPE ViPipe, ISP_RLSC_ATTR_S *pstRLSCAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstRLSCAttr); + + // non-auto attributes + isp_param_get(ViPipe, ISP_NR_RLSCENABLE, (void *)(uintptr_t)&(pstRLSCAttr->RlscEnable)); + isp_param_get(ViPipe, ISP_NR_RLSCCENTERX, (void *)(uintptr_t)&(pstRLSCAttr->RlscCenterX)); + isp_param_get(ViPipe, ISP_NR_RLSCCENTERY, (void *)(uintptr_t)&(pstRLSCAttr->RlscCenterY)); + + // manual attributes + isp_param_get(ViPipe, ISP_NR_MANUAL_RADIALSTR, (void *)(uintptr_t)&(pstRLSCAttr->stManual.RadialStr)); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) + isp_param_get(ViPipe, ISP_NR_AUTO_RADIALSTR + i, + (void *)(uintptr_t)&(pstRLSCAttr->stAuto.RadialStr[i])); + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintRLSCAttr(pstRLSCAttr); + + return CVI_SUCCESS; +} + +//----------------------------------------------------------------------------- +// Dehaze +//----------------------------------------------------------------------------- +static void CVI_ISP_PrintDehazeAttr(const ISP_DEHAZE_ATTR_S *pstDehazeAttr) +{ + // non-auto attributes + PRINT_ATTR(pstDehazeAttr->Enable, reg_dehaze_enable, 0, 2); + PRINT_ATTR(pstDehazeAttr->enOpType, reg_na, 0, 2); + PRINT_ATTR(pstDehazeAttr->CumulativeThr, reg_dehaze_cum_th, 0, 16383); + PRINT_ATTR(pstDehazeAttr->MinTransMapValue, reg_dehaze_tmap_min, 0, 8192); + + // manual attributes + PRINT_ATTR(pstDehazeAttr->stManual.Strength, reg_dehaze_w, 0, 100); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_S32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) + PRINT_ATTR(pstDehazeAttr->stAuto.Strength[i], reg_dehaze_w, 0, 100); + #endif +} + +CVI_S32 CVI_ISP_SetDehazeAttr(VI_PIPE ViPipe, const ISP_DEHAZE_ATTR_S *pstDehazeAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDehazeAttr); + + isp_param_set(ViPipe, ISP_DEHAZE_ENABLE, pstDehazeAttr->Enable); + isp_param_set(ViPipe, ISP_DEHAZE_ENOPTYPE, pstDehazeAttr->enOpType); + isp_param_set(ViPipe, ISP_DEHAZE_MANUAL_CUMULATIVETHR, pstDehazeAttr->CumulativeThr); + isp_param_set(ViPipe, ISP_DEHAZE_MANUAL_MINTRANSMAPVALUE, pstDehazeAttr->MinTransMapValue); + + isp_param_set(ViPipe, ISP_DEHAZE_MANUAL_STRENGTH, pstDehazeAttr->stManual.Strength); + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) + isp_param_set(ViPipe, ISP_DEHAZE_AUTO_STRENGTH + i, pstDehazeAttr->stAuto.Strength[i]); + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDehazeAttr(pstDehazeAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DEHAZE); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDehazeAttr(VI_PIPE ViPipe, ISP_DEHAZE_ATTR_S *pstDehazeAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDehazeAttr); + + CLEAR(*pstDehazeAttr); + isp_param_get(ViPipe, ISP_DEHAZE_ENABLE, (void *)(uintptr_t)&(pstDehazeAttr->Enable)); + isp_param_get(ViPipe, ISP_DEHAZE_ENOPTYPE, (void *)(uintptr_t)&(pstDehazeAttr->enOpType)); + isp_param_get(ViPipe, ISP_DEHAZE_MANUAL_CUMULATIVETHR, (void *)(uintptr_t)&(pstDehazeAttr->CumulativeThr)); + isp_param_get(ViPipe, ISP_DEHAZE_MANUAL_MINTRANSMAPVALUE, + (void *)(uintptr_t)&(pstDehazeAttr->MinTransMapValue)); + + isp_param_get(ViPipe, ISP_DEHAZE_MANUAL_STRENGTH, (void *)(uintptr_t)&(pstDehazeAttr->stManual.Strength)); + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) + isp_param_get(ViPipe, ISP_DEHAZE_AUTO_STRENGTH + i, + (void *)(uintptr_t)&(pstDehazeAttr->stAuto.Strength[i])); + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintDehazeAttr(pstDehazeAttr); + + return CVI_SUCCESS; +} + +//----------------------------------------------------------------------------- +// YNR +//----------------------------------------------------------------------------- +static CVI_BOOL is_value_in_array(CVI_S32 value, CVI_S32 *array, CVI_U32 length) +{ + CVI_U32 i; + + for (i = 0; i < length; i++) + if (array[i] == value) + break; + + return i != length; +} + +CVI_S32 CVI_ISP_SetYNRAttr(VI_PIPE ViPipe, const ISP_YNR_ATTR_S *pstYNRAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstYNRAttr); + + CVI_S32 TuningModeList[] = {8, 11, 12, 13, 14, 15}; +#if 0 + CVI_S32 i = 0; + + // non-auto attributes + isp_param_set(ViPipe, ISP_YNR_ENABLE, pstYNRAttr->Enable); + isp_param_set(ViPipe, ISP_YNR_ENOPTYPE, pstYNRAttr->enOpType); + if (is_value_in_array(pstYNRAttr->TuningMode, TuningModeList, ARRAY_SIZE(TuningModeList))) + isp_param_set(ViPipe, ISP_YNR_MANUAL_TUNINGMODE, pstYNRAttr->TuningMode); + else + ISP_DEBUG(LOG_WARNING, "tuning moode only accept values in 8, 11, 12, 13, 14, 15\n"); + + // manual attributes + isp_param_set(ViPipe, ISP_YNR_MANUAL_WINDOWTYPE, pstYNRAttr->stManual.WindowType); + isp_param_set(ViPipe, ISP_YNR_MANUAL_DETAILSMOOTHMODE, pstYNRAttr->stManual.DetailSmoothMode); + isp_param_set(ViPipe, ISP_YNR_MANUAL_NOISESUPPRESSSTR, pstYNRAttr->stManual.NoiseSuppressStr); + isp_param_set(ViPipe, ISP_YNR_MANUAL_FILTERTYPE, pstYNRAttr->stManual.FilterType); + isp_param_set(ViPipe, ISP_YNR_MANUAL_NOISESUPPRESSSTRMODE, pstYNRAttr->stManual.NoiseSuppressStrMode); + + // auto attributes + for (i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_YNR_AUTO_WINDOWTYPE + i, pstYNRAttr->stAuto.WindowType[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_DETAILSMOOTHMODE + i, pstYNRAttr->stAuto.DetailSmoothMode[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_FILTERTYPE + i, pstYNRAttr->stAuto.NoiseSuppressStr[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_NOISESUPPRESSSTR + i, pstYNRAttr->stAuto.FilterType[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_NOISESUPPRESSSTRMODE + i, + pstYNRAttr->stAuto.NoiseSuppressStrMode[i]); + } + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_YNR); + + return CVI_SUCCESS; +#endif + if (!is_value_in_array(pstYNRAttr->TuningMode, TuningModeList, ARRAY_SIZE(TuningModeList))) + ISP_DEBUG(LOG_WARNING, "tuning moode only accept values in 8, 11, 12, 13, 14, 15\n"); + memcpy(&g_param[ViPipe].YNR, pstYNRAttr, sizeof(*pstYNRAttr)); + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DCI); + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetYNRAttr(VI_PIPE ViPipe, ISP_YNR_ATTR_S *pstYNRAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstYNRAttr); + +#if 0 + CVI_S32 i = 0; + + CLEAR(*pstYNRAttr); + // non-auto attributes + isp_param_get(ViPipe, ISP_YNR_ENABLE, (void *)(uintptr_t)&(pstYNRAttr->Enable)); + isp_param_get(ViPipe, ISP_YNR_ENOPTYPE, (void *)(uintptr_t)&(pstYNRAttr->enOpType)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_TUNINGMODE, (void *)(uintptr_t)&(pstYNRAttr->TuningMode)); + + // manual attributes + isp_param_get(ViPipe, ISP_YNR_MANUAL_WINDOWTYPE, (void *)(uintptr_t)&(pstYNRAttr->stManual.WindowType)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_DETAILSMOOTHMODE, + (void *)(uintptr_t)&(pstYNRAttr->stManual.DetailSmoothMode)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_NOISESUPPRESSSTR, + (void *)(uintptr_t)&(pstYNRAttr->stManual.NoiseSuppressStr)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_FILTERTYPE, (void *)(uintptr_t)&(pstYNRAttr->stManual.FilterType)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_NOISESUPPRESSSTRMODE, + (void *)(uintptr_t)&(pstYNRAttr->stManual.NoiseSuppressStrMode)); + + // auto attributes + for (i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_YNR_AUTO_WINDOWTYPE + i, + (void *)(uintptr_t)&(pstYNRAttr->stAuto.WindowType[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_DETAILSMOOTHMODE + i, + (void *)(uintptr_t)&(pstYNRAttr->stAuto.DetailSmoothMode[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_FILTERTYPE + i, + (void *)(uintptr_t)&(pstYNRAttr->stAuto.NoiseSuppressStr[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_NOISESUPPRESSSTR + i, + (void *)(uintptr_t)&(pstYNRAttr->stAuto.FilterType[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_NOISESUPPRESSSTRMODE + i, + (void *)(uintptr_t)&(pstYNRAttr->stAuto.NoiseSuppressStrMode[i])); + } + + return CVI_SUCCESS; +#endif + memcpy(pstYNRAttr, &g_param[ViPipe].YNR, sizeof(*pstYNRAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetYNRMotionNRAttr(VI_PIPE ViPipe, const ISP_YNRMotionNR_ATTR_S *pstYNRMotionNRAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstYNRMotionNRAttr); + + // non-auto attributes + + // manual attributes + isp_param_set(ViPipe, ISP_YNR_MANUAL_MOTIONTHR, pstYNRMotionNRAttr->stManual.MotionThr); + isp_param_set(ViPipe, ISP_YNR_MANUAL_MOTIONNRPOSGAIN, pstYNRMotionNRAttr->stManual.MotionNrPosGain); + isp_param_set(ViPipe, ISP_YNR_MANUAL_MOTIONNRNEGGAIN, pstYNRMotionNRAttr->stManual.MotionNrNegGain); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_YNR_AUTO_MOTIONTHR + i, pstYNRMotionNRAttr->stAuto.MotionThr[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_MOTIONNRPOSGAIN + i, pstYNRMotionNRAttr->stAuto.MotionNrPosGain[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_MOTIONNRNEGGAIN + i, pstYNRMotionNRAttr->stAuto.MotionNrNegGain[i]); + } + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_YNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetYNRMotionNRAttr(VI_PIPE ViPipe, ISP_YNRMotionNR_ATTR_S *pstYNRMotionNRAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstYNRMotionNRAttr); + + // non-auto attributes + + // manual attributes + isp_param_get(ViPipe, ISP_YNR_MANUAL_MOTIONTHR, (void *)(uintptr_t)&(pstYNRMotionNRAttr->stManual.MotionThr)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_MOTIONNRPOSGAIN, + (void *)(uintptr_t)&(pstYNRMotionNRAttr->stManual.MotionNrPosGain)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_MOTIONNRNEGGAIN, + (void *)(uintptr_t)&(pstYNRMotionNRAttr->stManual.MotionNrNegGain)); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_YNR_AUTO_MOTIONTHR + i, + (void *)(uintptr_t)&(pstYNRMotionNRAttr->stAuto.MotionThr[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_MOTIONNRPOSGAIN + i, + (void *)(uintptr_t)&(pstYNRMotionNRAttr->stAuto.MotionNrPosGain[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_MOTIONNRNEGGAIN + i, + (void *)(uintptr_t)&(pstYNRMotionNRAttr->stAuto.MotionNrNegGain[i])); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetYNRFilterAttr(VI_PIPE ViPipe, const ISP_YNRFilter_ATTR_S *pstYNRFilterAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstYNRFilterAttr); + + // non-auto attributes + + // manual attributes + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR0, pstYNRFilterAttr->stManual.LumaStr[0]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR1, pstYNRFilterAttr->stManual.LumaStr[1]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR2, pstYNRFilterAttr->stManual.LumaStr[2]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR3, pstYNRFilterAttr->stManual.LumaStr[3]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR4, pstYNRFilterAttr->stManual.LumaStr[4]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR5, pstYNRFilterAttr->stManual.LumaStr[5]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR6, pstYNRFilterAttr->stManual.LumaStr[6]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_LUMASTR7, pstYNRFilterAttr->stManual.LumaStr[7]); + isp_param_set(ViPipe, ISP_YNR_MANUAL_VARTHR, pstYNRFilterAttr->stManual.VarThr); + isp_param_set(ViPipe, ISP_YNR_MANUAL_CORINGWGTLF, pstYNRFilterAttr->stManual.CoringWgtLF); + isp_param_set(ViPipe, ISP_YNR_MANUAL_CORINGWGTHF, pstYNRFilterAttr->stManual.CoringWgtHF); + isp_param_set(ViPipe, ISP_YNR_MANUAL_NONDIRFILTSTR, pstYNRFilterAttr->stManual.NonDirFiltStr); + isp_param_set(ViPipe, ISP_YNR_MANUAL_VHDIRFILTSTR, pstYNRFilterAttr->stManual.VhDirFiltStr); + isp_param_set(ViPipe, ISP_YNR_MANUAL_AADIRFILTSTR, pstYNRFilterAttr->stManual.AaDirFiltStr); + isp_param_set(ViPipe, ISP_YNR_MANUAL_FILTERMODE, pstYNRFilterAttr->stManual.FilterMode); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR0 + i, pstYNRFilterAttr->stAuto.LumaStr[0][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR1 + i, pstYNRFilterAttr->stAuto.LumaStr[1][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR2 + i, pstYNRFilterAttr->stAuto.LumaStr[2][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR3 + i, pstYNRFilterAttr->stAuto.LumaStr[3][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR4 + i, pstYNRFilterAttr->stAuto.LumaStr[4][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR5 + i, pstYNRFilterAttr->stAuto.LumaStr[5][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR6 + i, pstYNRFilterAttr->stAuto.LumaStr[6][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_LUMASTR7 + i, pstYNRFilterAttr->stAuto.LumaStr[7][i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_VARTHR + i, pstYNRFilterAttr->stAuto.VarThr[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_CORINGWGTLF + i, pstYNRFilterAttr->stAuto.CoringWgtLF[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_CORINGWGTHF + i, pstYNRFilterAttr->stAuto.CoringWgtHF[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_NONDIRFILTSTR + i, pstYNRFilterAttr->stAuto.NonDirFiltStr[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_VHDIRFILTSTR + i, pstYNRFilterAttr->stAuto.VhDirFiltStr[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_AADIRFILTSTR + i, pstYNRFilterAttr->stAuto.AaDirFiltStr[i]); + isp_param_set(ViPipe, ISP_YNR_AUTO_FILTERMODE + i, pstYNRFilterAttr->stAuto.FilterMode[i]); + } + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_YNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetYNRFilterAttr(VI_PIPE ViPipe, ISP_YNRFilter_ATTR_S *pstYNRFilterAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstYNRFilterAttr); + + // non-auto attributes + + // manual attributes + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR0, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[0])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR1, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[1])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR2, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[2])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR3, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[3])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR4, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[4])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR5, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[5])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR6, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[6])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_LUMASTR7, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.LumaStr[7])); + isp_param_get(ViPipe, ISP_YNR_MANUAL_VARTHR, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.VarThr)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_CORINGWGTLF, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.CoringWgtLF)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_CORINGWGTHF, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.CoringWgtHF)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_NONDIRFILTSTR, + (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.NonDirFiltStr)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_VHDIRFILTSTR, + (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.VhDirFiltStr)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_AADIRFILTSTR, + (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.AaDirFiltStr)); + isp_param_get(ViPipe, ISP_YNR_MANUAL_FILTERMODE, (void *)(uintptr_t)&(pstYNRFilterAttr->stManual.FilterMode)); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR0 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[0][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR1 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[1][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR2 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[2][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR3 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[3][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR4 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[4][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR5 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[5][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR6 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[6][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_LUMASTR7 + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.LumaStr[7][i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_VARTHR + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.VarThr[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_CORINGWGTLF + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.CoringWgtLF[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_CORINGWGTHF + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.CoringWgtHF[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_NONDIRFILTSTR + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.NonDirFiltStr[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_VHDIRFILTSTR + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.VhDirFiltStr[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_AADIRFILTSTR + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.AaDirFiltStr[i])); + isp_param_get(ViPipe, ISP_YNR_AUTO_FILTERMODE + i, + (void *)(uintptr_t)&(pstYNRFilterAttr->stAuto.FilterMode[i])); + } + + return CVI_SUCCESS; +} + +//----------------------------------------------------------------------------- +// CNR +//----------------------------------------------------------------------------- +static void CVI_ISP_PrintCNRAttr(const ISP_CNR_ATTR_S *pstCNRAttr) +{ + // non-auto attributes + PRINT_ATTR(pstCNRAttr->Enable, reg_cnr_enable, 0, 1); + + // manual attributes + PRINT_ATTR(pstCNRAttr->stManual.CnrStr, reg_cnr_strength_mode, 0, 255); + PRINT_ATTR(pstCNRAttr->stManual.NoiseSuppressStr, reg_cnr_diff_shift_val, 0, 255); + PRINT_ATTR(pstCNRAttr->stManual.NoiseSuppressGain, reg_cnr_diff_gain, 0, 7); + PRINT_ATTR(pstCNRAttr->stManual.FilterType, reg_cnr_weight_lut_inter_block, 0, 16); + PRINT_ATTR(pstCNRAttr->stManual.MotionNrStr, reg_cnr_ratio, 0, 255); + PRINT_ATTR(pstCNRAttr->stManual.LumaWgt, reg_cnr_fusion_intensity_weight, 0, 8); + PRINT_ATTR(pstCNRAttr->stManual.DetailSmoothMode, reg_cnr_flag_neighbor_max_weight, 0, 1); + + // auto attributes + #if PRINT_ATTR_AUTO + for (CVI_S32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstCNRAttr->stAuto.CnrStr[i], reg_cnr_strength_mode, 0, 255); + PRINT_ATTR(pstCNRAttr->stAuto.NoiseSuppressStr[i], reg_cnr_diff_shift_val, 0, 255); + PRINT_ATTR(pstCNRAttr->stAuto.NoiseSuppressGain[i], reg_cnr_diff_gain, 0, 7); + PRINT_ATTR(pstCNRAttr->stAuto.FilterType[i], reg_cnr_weight_lut_inter_block, 0, 16); + PRINT_ATTR(pstCNRAttr->stAuto.MotionNrStr[i], reg_cnr_ratio, 0, 255); + PRINT_ATTR(pstCNRAttr->stAuto.LumaWgt[i], reg_cnr_fusion_intensity_weight, 0, 8); + PRINT_ATTR(pstCNRAttr->stAuto.DetailSmoothMode[i], reg_cnr_flag_neighbor_max_weight, 0, 1); + } + #endif +} + +CVI_S32 CVI_ISP_SetCNRAttr(VI_PIPE ViPipe, const ISP_CNR_ATTR_S *pstCNRAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstCNRAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_CNR_ENABLE, pstCNRAttr->Enable); + isp_param_set(ViPipe, ISP_CNR_ENOPTYPE, pstCNRAttr->enOpType); + + // manual attributes + isp_param_set(ViPipe, ISP_CNR_MANUAL_CNRSTR, pstCNRAttr->stManual.CnrStr); + isp_param_set(ViPipe, ISP_CNR_MANUAL_NOISESUPPRESSSTR, pstCNRAttr->stManual.NoiseSuppressStr); + isp_param_set(ViPipe, ISP_CNR_MANUAL_NOISESUPPRESSGAIN, pstCNRAttr->stManual.NoiseSuppressGain); + isp_param_set(ViPipe, ISP_CNR_MANUAL_FILTERTYPE, pstCNRAttr->stManual.FilterType); + isp_param_set(ViPipe, ISP_CNR_MANUAL_MOTIONNRSTR, pstCNRAttr->stManual.MotionNrStr); + isp_param_set(ViPipe, ISP_CNR_MANUAL_LUMAWGT, pstCNRAttr->stManual.LumaWgt); + isp_param_set(ViPipe, ISP_CNR_MANUAL_DETAILSMOOTHMODE, pstCNRAttr->stManual.DetailSmoothMode); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_CNR_AUTO_CNRSTR + i, pstCNRAttr->stAuto.CnrStr[i]); + isp_param_set(ViPipe, ISP_CNR_AUTO_NOISESUPPRESSSTR + i, pstCNRAttr->stAuto.NoiseSuppressStr[i]); + isp_param_set(ViPipe, ISP_CNR_AUTO_NOISESUPPRESSGAIN + i, pstCNRAttr->stAuto.NoiseSuppressGain[i]); + isp_param_set(ViPipe, ISP_CNR_AUTO_FILTERTYPE + i, pstCNRAttr->stAuto.FilterType[i]); + isp_param_set(ViPipe, ISP_CNR_AUTO_MOTIONNRSTR + i, pstCNRAttr->stAuto.MotionNrStr[i]); + isp_param_set(ViPipe, ISP_CNR_AUTO_LUMAWGT + i, pstCNRAttr->stAuto.LumaWgt[i]); + isp_param_set(ViPipe, ISP_CNR_AUTO_DETAILSMOOTHMODE + i, pstCNRAttr->stAuto.DetailSmoothMode[i]); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintCNRAttr(pstCNRAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_CNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetCNRAttr(VI_PIPE ViPipe, ISP_CNR_ATTR_S *pstCNRAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstCNRAttr); + + CLEAR(*pstCNRAttr); + // non-auto parameters + isp_param_get(ViPipe, ISP_CNR_ENABLE, (void *)(uintptr_t)&(pstCNRAttr->Enable)); + isp_param_get(ViPipe, ISP_CNR_ENOPTYPE, (void *)(uintptr_t)&(pstCNRAttr->enOpType)); + + // manual parameters + isp_param_get(ViPipe, ISP_CNR_MANUAL_CNRSTR, (void *)(uintptr_t)&(pstCNRAttr->stManual.CnrStr)); + isp_param_get(ViPipe, ISP_CNR_MANUAL_NOISESUPPRESSSTR, + (void *)(uintptr_t)&(pstCNRAttr->stManual.NoiseSuppressStr)); + isp_param_get(ViPipe, ISP_CNR_MANUAL_NOISESUPPRESSGAIN, + (void *)(uintptr_t)&(pstCNRAttr->stManual.NoiseSuppressGain)); + isp_param_get(ViPipe, ISP_CNR_MANUAL_FILTERTYPE, (void *)(uintptr_t)&(pstCNRAttr->stManual.FilterType)); + isp_param_get(ViPipe, ISP_CNR_MANUAL_MOTIONNRSTR, (void *)(uintptr_t)&(pstCNRAttr->stManual.MotionNrStr)); + isp_param_get(ViPipe, ISP_CNR_MANUAL_LUMAWGT, (void *)(uintptr_t)&(pstCNRAttr->stManual.LumaWgt)); + isp_param_get(ViPipe, ISP_CNR_MANUAL_DETAILSMOOTHMODE, + (void *)(uintptr_t)&(pstCNRAttr->stManual.DetailSmoothMode)); + + // auto parameters + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_CNR_AUTO_CNRSTR + i, (void *)(uintptr_t)&(pstCNRAttr->stAuto.CnrStr[i])); + isp_param_get(ViPipe, ISP_CNR_AUTO_NOISESUPPRESSSTR + i, + (void *)(uintptr_t)&(pstCNRAttr->stAuto.NoiseSuppressStr[i])); + isp_param_get(ViPipe, ISP_CNR_AUTO_NOISESUPPRESSGAIN + i, + (void *)(uintptr_t)&(pstCNRAttr->stAuto.NoiseSuppressGain[i])); + isp_param_get(ViPipe, ISP_CNR_AUTO_FILTERTYPE + i, + (void *)(uintptr_t)&(pstCNRAttr->stAuto.FilterType[i])); + isp_param_get(ViPipe, ISP_CNR_AUTO_MOTIONNRSTR + i, + (void *)(uintptr_t)&(pstCNRAttr->stAuto.MotionNrStr[i])); + isp_param_get(ViPipe, ISP_CNR_AUTO_LUMAWGT + i, (void *)(uintptr_t)&(pstCNRAttr->stAuto.LumaWgt[i])); + isp_param_get(ViPipe, ISP_CNR_AUTO_DETAILSMOOTHMODE + i, + (void *)(uintptr_t)&(pstCNRAttr->stAuto.DetailSmoothMode[i])); + } + + // TODO should add fixed parameters? + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintCNRAttr(pstCNRAttr); + + return CVI_SUCCESS; +} + +//----------------------------------------------------------------------------- +// LocalCac +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_SetCACAttr(VI_PIPE ViPipe, const ISP_CAC_ATTR_S *pstCACAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstCACAttr); + + isp_param_set(ViPipe, ISP_CAC_ENABLE, pstCACAttr->Enable); + isp_param_set(ViPipe, ISP_CAC_ENOPTYPE, pstCACAttr->enOpType); + isp_param_set(ViPipe, ISP_CAC_TUNINGMODE, pstCACAttr->TuningMode); + isp_param_set(ViPipe, ISP_CAC_MANUAL_VARTHR, pstCACAttr->VarThr); + isp_param_set(ViPipe, ISP_CAC_MANUAL_PURPLEDETRANGE, pstCACAttr->PurpleDetRange); + isp_param_set(ViPipe, ISP_CAC_MANUAL_DEPURPLESTR, pstCACAttr->stManual.DePurpleStr); + isp_param_set(ViPipe, ISP_CAC_MANUAL_PURPLECB, pstCACAttr->PurpleCb); + isp_param_set(ViPipe, ISP_CAC_MANUAL_PURPLECR, pstCACAttr->PurpleCr); + isp_param_set(ViPipe, ISP_CAC_MANUAL_GREENCB, pstCACAttr->GreenCb); + isp_param_set(ViPipe, ISP_CAC_MANUAL_GREENCR, pstCACAttr->GreenCr); + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_CAC_AUTO_DEPURPLESTR + i, pstCACAttr->stAuto.DePurpleStr[i]); + } + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_CAC); + isp_iq_auto_set(ViPipe, ISP_IQ_BLOCK_CAC, pstCACAttr->enOpType); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetCACAttr(VI_PIPE ViPipe, ISP_CAC_ATTR_S *pstCACAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstCACAttr); + + CLEAR(*pstCACAttr); + isp_param_get(ViPipe, ISP_CAC_ENABLE, (void *)(uintptr_t)&(pstCACAttr->Enable)); + isp_param_get(ViPipe, ISP_CAC_ENOPTYPE, (void *)(uintptr_t)&(pstCACAttr->enOpType)); + isp_param_get(ViPipe, ISP_CAC_TUNINGMODE, (void *)(uintptr_t)&(pstCACAttr->TuningMode)); + isp_param_get(ViPipe, ISP_CAC_MANUAL_VARTHR, (void *)(uintptr_t)&(pstCACAttr->VarThr)); + isp_param_get(ViPipe, ISP_CAC_MANUAL_PURPLEDETRANGE, (void *)(uintptr_t)&(pstCACAttr->PurpleDetRange)); + isp_param_get(ViPipe, ISP_CAC_MANUAL_DEPURPLESTR, (void *)(uintptr_t)&(pstCACAttr->stManual.DePurpleStr)); + isp_param_get(ViPipe, ISP_CAC_MANUAL_PURPLECB, (void *)(uintptr_t)&(pstCACAttr->PurpleCb)); + isp_param_get(ViPipe, ISP_CAC_MANUAL_PURPLECR, (void *)(uintptr_t)&(pstCACAttr->PurpleCr)); + isp_param_get(ViPipe, ISP_CAC_MANUAL_GREENCB, (void *)(uintptr_t)&(pstCACAttr->GreenCb)); + isp_param_get(ViPipe, ISP_CAC_MANUAL_GREENCR, (void *)(uintptr_t)&(pstCACAttr->GreenCr)); + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_CAC_AUTO_DEPURPLESTR + i, + (void *)(uintptr_t)&(pstCACAttr->stAuto.DePurpleStr[i])); + } + + return CVI_SUCCESS; +} + +const CVI_U16 defaultGamma[GAMMA_NODE_NUM] = { + 0, 21, 55, 101, 154, 212, 271, 334, 406, 483, 560, 634, 702, 765, 830, 895, + 959, 1023, 1084, 1143, 1198, 1248, 1294, 1334, 1369, 1403, 1437, 1469, 1500, 1529, 1558, 1586, + 1613, 1640, 1665, 1690, 1714, 1738, 1761, 1784, 1806, 1828, 1850, 1871, 1892, 1913, 1935, 1955, + 1975, 1995, 2013, 2031, 2049, 2066, 2083, 2100, 2116, 2131, 2147, 2162, 2176, 2191, 2206, 2220, + 2234, 2249, 2263, 2277, 2291, 2306, 2321, 2335, 2349, 2364, 2378, 2392, 2406, 2419, 2433, 2446, + 2459, 2472, 2486, 2498, 2511, 2524, 2537, 2549, 2562, 2574, 2587, 2599, 2611, 2624, 2636, 2648, + 2660, 2672, 2683, 2695, 2707, 2718, 2730, 2741, 2752, 2764, 2775, 2786, 2797, 2808, 2819, 2829, + 2840, 2851, 2861, 2872, 2883, 2893, 2903, 2914, 2924, 2934, 2944, 2954, 2964, 2974, 2983, 2993, + 3003, 3012, 3022, 3032, 3041, 3051, 3060, 3070, 3079, 3088, 3098, 3107, 3117, 3126, 3135, 3144, + 3154, 3163, 3172, 3181, 3190, 3199, 3208, 3217, 3225, 3234, 3243, 3252, 3261, 3270, 3279, 3288, + 3297, 3305, 3314, 3324, 3333, 3342, 3351, 3360, 3369, 3378, 3387, 3397, 3406, 3415, 3424, 3433, + 3442, 3452, 3461, 3470, 3479, 3488, 3497, 3506, 3515, 3524, 3533, 3541, 3550, 3559, 3567, 3576, + 3585, 3593, 3602, 3611, 3619, 3628, 3636, 3645, 3653, 3661, 3670, 3678, 3687, 3695, 3703, 3712, + 3720, 3728, 3737, 3745, 3753, 3761, 3769, 3777, 3786, 3794, 3802, 3810, 3818, 3826, 3834, 3842, + 3850, 3858, 3866, 3874, 3881, 3889, 3897, 3905, 3913, 3921, 3928, 3936, 3945, 3953, 3961, 3970, + 3978, 3987, 3995, 4004, 4012, 4020, 4028, 4036, 4044, 4051, 4058, 4065, 4072, 4078, 4084, 4089 +}; + +const CVI_U16 sRGBGamma[GAMMA_NODE_NUM] = { + 0, 203, 347, 452, 538, 613, 679, 739, 794, 845, 894, 939, 982, 1023, 1062, 1099, + 1136, 1170, 1204, 1237, 1268, 1299, 1329, 1358, 1386, 1414, 1441, 1467, 1493, 1518, 1543, 1567, + 1591, 1615, 1638, 1660, 1683, 1704, 1726, 1747, 1768, 1789, 1809, 1829, 1849, 1868, 1888, 1907, + 1926, 1944, 1962, 1981, 1998, 2016, 2034, 2051, 2068, 2085, 2102, 2119, 2135, 2151, 2168, 2184, + 2199, 2215, 2231, 2246, 2261, 2277, 2292, 2307, 2321, 2336, 2351, 2365, 2379, 2394, 2408, 2422, + 2436, 2449, 2463, 2477, 2490, 2504, 2517, 2530, 2543, 2557, 2570, 2582, 2595, 2608, 2621, 2633, + 2646, 2658, 2670, 2683, 2695, 2707, 2719, 2731, 2743, 2755, 2767, 2778, 2790, 2802, 2813, 2825, + 2836, 2847, 2859, 2870, 2881, 2892, 2903, 2914, 2925, 2936, 2947, 2958, 2969, 2979, 2990, 3001, + 3011, 3022, 3032, 3043, 3053, 3063, 3074, 3084, 3094, 3104, 3114, 3124, 3134, 3144, 3154, 3164, + 3174, 3184, 3194, 3203, 3213, 3223, 3232, 3242, 3252, 3261, 3271, 3280, 3289, 3299, 3308, 3317, + 3327, 3336, 3345, 3354, 3363, 3372, 3382, 3391, 3400, 3409, 3418, 3426, 3435, 3444, 3453, 3462, + 3471, 3479, 3488, 3497, 3505, 3514, 3523, 3531, 3540, 3548, 3557, 3565, 3574, 3582, 3590, 3599, + 3607, 3615, 3624, 3632, 3640, 3648, 3656, 3665, 3673, 3681, 3689, 3697, 3705, 3713, 3721, 3729, + 3737, 3745, 3753, 3761, 3769, 3776, 3784, 3792, 3800, 3807, 3815, 3823, 3831, 3838, 3846, 3854, + 3861, 3869, 3876, 3884, 3891, 3899, 3906, 3914, 3921, 3929, 3936, 3944, 3951, 3958, 3966, 3973, + 3980, 3988, 3995, 4002, 4009, 4017, 4024, 4031, 4038, 4045, 4053, 4060, 4067, 4074, 4081, 4088 +}; + +CVI_S32 CVI_ISP_SetGammaAttr(VI_PIPE ViPipe, const ISP_GAMMA_ATTR_S *pstGammaAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstGammaAttr); + + memcpy(&g_param[ViPipe].gamma, pstGammaAttr, sizeof(*pstGammaAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_GAMMA); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetGammaCurveType(VI_PIPE ViPipe, const ISP_GAMMA_CURVE_TYPE_E curveType) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + + g_param[ViPipe].gamma.enCurveType = curveType; + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_GAMMA); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetGammaAttr(VI_PIPE ViPipe, ISP_GAMMA_ATTR_S *pstGammaAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstGammaAttr); + + const CVI_U16 *gammaCurve; + + pstGammaAttr->Enable = g_param[ViPipe].gamma.Enable; + pstGammaAttr->enCurveType = g_param[ViPipe].gamma.enCurveType; + + switch (pstGammaAttr->enCurveType) { + case ISP_GAMMA_CURVE_DEFAULT: + gammaCurve = defaultGamma; + break; + case ISP_GAMMA_CURVE_SRGB: + gammaCurve = sRGBGamma; + break; + case ISP_GAMMA_CURVE_USER_DEFINE: + gammaCurve = g_param[ViPipe].gamma.Table; + break; + default: + gammaCurve = g_param[ViPipe].gamma.Table; + break; + } + memcpy(pstGammaAttr->Table, gammaCurve, sizeof(CVI_U16) * GAMMA_NODE_NUM); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetAutoGammaAttr(VI_PIPE ViPipe, const ISP_AUTO_GAMMA_ATTR_S *pstGammaAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstGammaAttr); + + memcpy(&g_param[ViPipe].autoGamma, pstGammaAttr, sizeof(*pstGammaAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_GAMMA); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetAutoGammaAttr(VI_PIPE ViPipe, ISP_AUTO_GAMMA_ATTR_S *pstGammaAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstGammaAttr); + + memcpy(pstGammaAttr, &g_param[ViPipe].autoGamma, sizeof(*pstGammaAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetDCIAttr(VI_PIPE ViPipe, const ISP_DCI_ATTR_S *pstDCIAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDCIAttr); + + memcpy(&g_param[ViPipe].dci, pstDCIAttr, sizeof(*pstDCIAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DCI); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDCIAttr(VI_PIPE ViPipe, ISP_DCI_ATTR_S *pstDCIAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDCIAttr); + + memcpy(pstDCIAttr, &g_param[ViPipe].dci, sizeof(*pstDCIAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetDPCAttr(VI_PIPE ViPipe, const ISP_DPC_ATTR_S *pstDPCAttr) +{ + isp_param_set(ViPipe, ISP_DPC_ENOPTYPE, pstDPCAttr->enOpType); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_ENABLE, pstDPCAttr->stManual.dpc_enable); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_STATICDPC_ENABLE, pstDPCAttr->stManual.dpc_staticdpc_enable); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_CLUSTER_SIZE, pstDPCAttr->stManual.dpc_cluster_size); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_R_BRIGHT_PIXEL_RATIO, pstDPCAttr->stManual.dpc_r_bright_pixel_ratio); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_G_BRIGHT_PIXEL_RATIO, pstDPCAttr->stManual.dpc_g_bright_pixel_ratio); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_B_BRIGHT_PIXEL_RATIO, pstDPCAttr->stManual.dpc_b_bright_pixel_ratio); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_R_DARK_PIXEL_RATIO, pstDPCAttr->stManual.dpc_r_dark_pixel_ratio); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_G_DARK_PIXEL_RATIO, pstDPCAttr->stManual.dpc_g_dark_pixel_ratio); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_B_DARK_PIXEL_RATIO, pstDPCAttr->stManual.dpc_b_dark_pixel_ratio); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_R_DARK_PIXEL_MINDIFF, pstDPCAttr->stManual.dpc_r_dark_pixel_mindiff); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_G_DARK_PIXEL_MINDIFF, pstDPCAttr->stManual.dpc_g_dark_pixel_mindiff); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_B_DARK_PIXEL_MINDIFF, pstDPCAttr->stManual.dpc_b_dark_pixel_mindiff); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_R, pstDPCAttr->stManual.dpc_flat_thre_r); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_G, pstDPCAttr->stManual.dpc_flat_thre_g); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_B, pstDPCAttr->stManual.dpc_flat_thre_b); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_MIN_G, pstDPCAttr->stManual.dpc_flat_thre_min_g); + isp_param_set(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_MIN_RB, pstDPCAttr->stManual.dpc_flat_thre_min_rb); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_ENABLE + i, pstDPCAttr->stAuto.dpc_enable[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_STATICDPC_ENABLE + i, + pstDPCAttr->stAuto.dpc_staticdpc_enable[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_CLUSTER_SIZE + i, pstDPCAttr->stAuto.dpc_cluster_size[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_R_BRIGHT_PIXEL_RATIO + i, + pstDPCAttr->stAuto.dpc_r_bright_pixel_ratio[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_G_BRIGHT_PIXEL_RATIO + i, + pstDPCAttr->stAuto.dpc_g_bright_pixel_ratio[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_B_BRIGHT_PIXEL_RATIO + i, + pstDPCAttr->stAuto.dpc_b_bright_pixel_ratio[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_R_DARK_PIXEL_RATIO + i, + pstDPCAttr->stAuto.dpc_r_dark_pixel_ratio[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_G_DARK_PIXEL_RATIO + i, + pstDPCAttr->stAuto.dpc_g_dark_pixel_ratio[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_B_DARK_PIXEL_RATIO + i, + pstDPCAttr->stAuto.dpc_b_dark_pixel_ratio[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_R_DARK_PIXEL_MINDIFF + i, + pstDPCAttr->stAuto.dpc_r_dark_pixel_mindiff[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_G_DARK_PIXEL_MINDIFF + i, + pstDPCAttr->stAuto.dpc_g_dark_pixel_mindiff[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_B_DARK_PIXEL_MINDIFF + i, + pstDPCAttr->stAuto.dpc_b_dark_pixel_mindiff[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_R + i, pstDPCAttr->stAuto.dpc_flat_thre_r[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_G + i, pstDPCAttr->stAuto.dpc_flat_thre_g[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_B + i, pstDPCAttr->stAuto.dpc_flat_thre_b[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_MIN_G + i, pstDPCAttr->stAuto.dpc_flat_thre_min_g[i]); + isp_param_set(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_MIN_RB + i, + pstDPCAttr->stAuto.dpc_flat_thre_min_rb[i]); + } + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDPCAttr(VI_PIPE ViPipe, ISP_DPC_ATTR_S *pstDPCAttr) +{ + CLEAR(*pstDPCAttr); + isp_param_get(ViPipe, ISP_DPC_ENOPTYPE, (void *)(uintptr_t)&(pstDPCAttr->enOpType)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_ENABLE, (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_enable)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_STATICDPC_ENABLE, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_staticdpc_enable)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_CLUSTER_SIZE, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_cluster_size)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_R_BRIGHT_PIXEL_RATIO, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_r_bright_pixel_ratio)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_G_BRIGHT_PIXEL_RATIO, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_g_bright_pixel_ratio)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_B_BRIGHT_PIXEL_RATIO, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_b_bright_pixel_ratio)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_R_DARK_PIXEL_RATIO, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_r_dark_pixel_ratio)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_G_DARK_PIXEL_RATIO, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_g_dark_pixel_ratio)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_B_DARK_PIXEL_RATIO, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_b_dark_pixel_ratio)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_R_DARK_PIXEL_MINDIFF, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_r_dark_pixel_mindiff)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_G_DARK_PIXEL_MINDIFF, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_g_dark_pixel_mindiff)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_B_DARK_PIXEL_MINDIFF, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_b_dark_pixel_mindiff)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_R, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_flat_thre_r)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_G, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_flat_thre_g)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_B, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_flat_thre_b)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_MIN_G, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_flat_thre_min_g)); + isp_param_get(ViPipe, ISP_DPC_MANUAL_DPC_FLAT_THRE_MIN_RB, + (void *)(uintptr_t)&(pstDPCAttr->stManual.dpc_flat_thre_min_rb)); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_ENABLE + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_enable[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_STATICDPC_ENABLE + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_staticdpc_enable[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_CLUSTER_SIZE + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_cluster_size[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_R_BRIGHT_PIXEL_RATIO + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_r_bright_pixel_ratio[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_G_BRIGHT_PIXEL_RATIO + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_g_bright_pixel_ratio[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_B_BRIGHT_PIXEL_RATIO + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_b_bright_pixel_ratio[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_R_DARK_PIXEL_RATIO + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_r_dark_pixel_ratio[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_G_DARK_PIXEL_RATIO + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_g_dark_pixel_ratio[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_B_DARK_PIXEL_RATIO + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_b_dark_pixel_ratio[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_R_DARK_PIXEL_MINDIFF + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_r_dark_pixel_mindiff[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_G_DARK_PIXEL_MINDIFF + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_g_dark_pixel_mindiff[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_B_DARK_PIXEL_MINDIFF + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_b_dark_pixel_mindiff[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_R + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_flat_thre_r[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_G + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_flat_thre_g[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_B + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_flat_thre_b[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_MIN_G + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_flat_thre_min_g[i])); + isp_param_get(ViPipe, ISP_DPC_AUTO_DPC_FLAT_THRE_MIN_RB + i, + (void *)(uintptr_t)&(pstDPCAttr->stAuto.dpc_flat_thre_min_rb[i])); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetSharpenAttr(VI_PIPE ViPipe, const ISP_SHARPEN_ATTR_S *pstSharpenAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstSharpenAttr); + + memcpy(&g_param[ViPipe].Sharpen, pstSharpenAttr, sizeof(*pstSharpenAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_YEE); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetSharpenAttr(VI_PIPE ViPipe, ISP_SHARPEN_ATTR_S *pstSharpenAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstSharpenAttr); + + memcpy(pstSharpenAttr, &g_param[ViPipe].Sharpen, sizeof(*pstSharpenAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetTNRAttr(VI_PIPE ViPipe, const ISP_TNR_ATTR_S *pstTNRAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstTNRAttr); + + memcpy(&g_param[ViPipe].TNR, pstTNRAttr, sizeof(*pstTNRAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_3DNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetTNRAttr(VI_PIPE ViPipe, ISP_TNR_ATTR_S *pstTNRAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstTNRAttr); + + memcpy(pstTNRAttr, &g_param[ViPipe].TNR, sizeof(*pstTNRAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetTNRNoiseModelAttr(VI_PIPE ViPipe, const ISP_TNRNoiseModel_ATTR_S *pstTNRNoiseModelAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstTNRNoiseModelAttr); + + memcpy(&g_param[ViPipe].TnrNoiseModel, pstTNRNoiseModelAttr, sizeof(*pstTNRNoiseModelAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_3DNR); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetTNRNoiseModelAttr(VI_PIPE ViPipe, ISP_TNRNoiseModel_ATTR_S *pstTNRNoiseModelAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstTNRNoiseModelAttr); + + memcpy(pstTNRNoiseModelAttr, &g_param[ViPipe].TnrNoiseModel, sizeof(*pstTNRNoiseModelAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetTNRLumaMotionAttr(VI_PIPE ViPipe, const ISP_TNRLumaMotion_ATTR_S *pstTNRLumaMotionAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstTNRLumaMotionAttr); + + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN0, pstTNRLumaMotionAttr->stManual.L2mIn0[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN1, pstTNRLumaMotionAttr->stManual.L2mIn0[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN2, pstTNRLumaMotionAttr->stManual.L2mIn0[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN3, pstTNRLumaMotionAttr->stManual.L2mIn0[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT0, pstTNRLumaMotionAttr->stManual.L2mOut0[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT1, pstTNRLumaMotionAttr->stManual.L2mOut0[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT2, pstTNRLumaMotionAttr->stManual.L2mOut0[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT3, pstTNRLumaMotionAttr->stManual.L2mOut0[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN0, pstTNRLumaMotionAttr->stManual.L2mIn1[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN1, pstTNRLumaMotionAttr->stManual.L2mIn1[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN2, pstTNRLumaMotionAttr->stManual.L2mIn1[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN3, pstTNRLumaMotionAttr->stManual.L2mIn1[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT0, pstTNRLumaMotionAttr->stManual.L2mOut1[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT1, pstTNRLumaMotionAttr->stManual.L2mOut1[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT2, pstTNRLumaMotionAttr->stManual.L2mOut1[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT3, pstTNRLumaMotionAttr->stManual.L2mOut1[3]); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN0 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn0[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN1 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn0[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN2 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn0[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN3 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn0[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT0 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut0[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT1 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut0[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT2 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut0[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT3 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut0[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN0 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn1[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN1 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn1[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN2 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn1[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN3 + i, + pstTNRLumaMotionAttr->stAuto.L2mIn1[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT0 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut1[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT1 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut1[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT2 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut1[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT3 + i, + pstTNRLumaMotionAttr->stAuto.L2mOut1[3][i]); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetTNRLumaMotionAttr(VI_PIPE ViPipe, ISP_TNRLumaMotion_ATTR_S *pstTNRLumaMotionAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstTNRLumaMotionAttr); + + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN0, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn0[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN1, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn0[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN2, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn0[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_IN3, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn0[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT0, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut0[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT1, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut0[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT2, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut0[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_L2M_OUT3, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut0[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN0, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn1[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN1, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn1[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN2, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn1[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_IN3, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mIn1[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT0, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut1[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT1, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut1[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT2, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut1[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_L2M_OUT3, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stManual.L2mOut1[3])); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN0 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn0[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN1 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn0[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN2 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn0[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_IN3 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn0[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT0 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut0[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT1 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut0[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT2 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut0[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_L2M_OUT3 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut0[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN0 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn1[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN1 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn1[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN2 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn1[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_IN3 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mIn1[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT0 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut1[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT1 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut1[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT2 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut1[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_L2M_OUT3 + i, + (void *)(uintptr_t)&(pstTNRLumaMotionAttr->stAuto.L2mOut1[3][i])); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetTNRGhostAttr(VI_PIPE ViPipe, const ISP_TNRGhost_ATTR_S *pstTNRGhostAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstTNRGhostAttr); + + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN0, pstTNRGhostAttr->stManual.PrtctIn0[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN1, pstTNRGhostAttr->stManual.PrtctIn0[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN2, pstTNRGhostAttr->stManual.PrtctIn0[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN3, pstTNRGhostAttr->stManual.PrtctIn0[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT0, pstTNRGhostAttr->stManual.PrtctOut0[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT1, pstTNRGhostAttr->stManual.PrtctOut0[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT2, pstTNRGhostAttr->stManual.PrtctOut0[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT3, pstTNRGhostAttr->stManual.PrtctOut0[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN0, pstTNRGhostAttr->stManual.PrtctIn1[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN1, pstTNRGhostAttr->stManual.PrtctIn1[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN2, pstTNRGhostAttr->stManual.PrtctIn1[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN3, pstTNRGhostAttr->stManual.PrtctIn1[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_OUT0, pstTNRGhostAttr->stManual.PrtctOut1[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_OUT1, pstTNRGhostAttr->stManual.PrtctOut1[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_CPSE, pstTNRGhostAttr->stManual.PrtctOut1[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_OUT3, pstTNRGhostAttr->stManual.PrtctOut1[3]); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN0 + i, + pstTNRGhostAttr->stAuto.PrtctIn0[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN1 + i, + pstTNRGhostAttr->stAuto.PrtctIn0[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN2 + i, + pstTNRGhostAttr->stAuto.PrtctIn0[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN3 + i, + pstTNRGhostAttr->stAuto.PrtctIn0[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT0 + i, + pstTNRGhostAttr->stAuto.PrtctOut0[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT1 + i, + pstTNRGhostAttr->stAuto.PrtctOut0[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT2 + i, + pstTNRGhostAttr->stAuto.PrtctOut0[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT3 + i, + pstTNRGhostAttr->stAuto.PrtctOut0[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN0 + i, + pstTNRGhostAttr->stAuto.PrtctIn1[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN1 + i, + pstTNRGhostAttr->stAuto.PrtctIn1[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN2 + i, + pstTNRGhostAttr->stAuto.PrtctIn1[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN3 + i, + pstTNRGhostAttr->stAuto.PrtctIn1[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_OUT0 + i, + pstTNRGhostAttr->stAuto.PrtctOut1[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_OUT1 + i, + pstTNRGhostAttr->stAuto.PrtctOut1[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_CPSE + i, pstTNRGhostAttr->stAuto.PrtctOut1[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_OUT3 + i, + pstTNRGhostAttr->stAuto.PrtctOut1[3][i]); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetTNRGhostAttr(VI_PIPE ViPipe, ISP_TNRGhost_ATTR_S *pstTNRGhostAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstTNRGhostAttr); + + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN0, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn0[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN1, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn0[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN2, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn0[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_IN3, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn0[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT0, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut0[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT1, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut0[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT2, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut0[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH0_PRTCT_OUT3, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut0[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN0, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn1[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN1, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn1[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN2, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn1[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_IN3, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctIn1[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_OUT0, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut1[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_OUT1, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut1[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_CPSE, (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut1[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_TNR_PATH1_PRTCT_OUT3, + (void *)(uintptr_t)&(pstTNRGhostAttr->stManual.PrtctOut1[3])); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN0 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn0[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN1 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn0[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN2 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn0[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_IN3 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn0[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT0 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut0[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT1 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut0[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT2 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut0[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH0_PRTCT_OUT3 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut0[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN0 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn1[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN1 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn1[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN2 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn1[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_IN3 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctIn1[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_OUT0 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut1[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_OUT1 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut1[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_CPSE + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut1[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_TNR_PATH1_PRTCT_OUT3 + i, + (void *)(uintptr_t)&(pstTNRGhostAttr->stAuto.PrtctOut1[3][i])); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetTNRMtPrtAttr(VI_PIPE ViPipe, const ISP_TNRMtPrt_ATTR_S *pstTNRMtPrtAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstTNRMtPrtAttr); + + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_EN, pstTNRMtPrtAttr->LowMtPrtEn); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_LEVEL, pstTNRMtPrtAttr->stManual.LowMtPrtLevel); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN0, pstTNRMtPrtAttr->stManual.LowMtPrtIn[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN1, pstTNRMtPrtAttr->stManual.LowMtPrtIn[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN2, pstTNRMtPrtAttr->stManual.LowMtPrtIn[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN3, pstTNRMtPrtAttr->stManual.LowMtPrtIn[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT0, pstTNRMtPrtAttr->stManual.LowMtPrtOut[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT1, pstTNRMtPrtAttr->stManual.LowMtPrtOut[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT2, pstTNRMtPrtAttr->stManual.LowMtPrtOut[2]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT3, pstTNRMtPrtAttr->stManual.LowMtPrtOut[3]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_SLOPE0, pstTNRMtPrtAttr->stManual.LowMtPrtSlope0[0]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_SLOPE1, pstTNRMtPrtAttr->stManual.LowMtPrtSlope0[1]); + isp_param_set(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_SLOPE2, pstTNRMtPrtAttr->stManual.LowMtPrtSlope0[2]); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_LEVEL + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtLevel[i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN0 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtIn[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN1 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtIn[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN2 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtIn[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN3 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtIn[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT0 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtOut[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT1 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtOut[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT2 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtOut[2][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT3 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtOut[3][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_SLOPE0 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtSlope0[0][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_SLOPE1 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtSlope0[1][i]); + isp_param_set(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_SLOPE2 + i, + pstTNRMtPrtAttr->stAuto.LowMtPrtSlope0[2][i]); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetTNRMtPrtAttr(VI_PIPE ViPipe, ISP_TNRMtPrt_ATTR_S *pstTNRMtPrtAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstTNRMtPrtAttr); + + isp_param_get(ViPipe, ISP_CLUT_HSV3DLUT_ENABLE, (void *)(uintptr_t)&(pstTNRMtPrtAttr->LowMtPrtEn)); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_EN, (void *)(uintptr_t)&(pstTNRMtPrtAttr->LowMtPrtEn)); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_LEVEL, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtLevel)); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN0, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtIn[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN1, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtIn[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN2, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtIn[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_IN3, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtIn[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT0, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtOut[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT1, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtOut[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT2, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtOut[2])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_OUT3, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtOut[3])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_SLOPE0, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtSlope0[0])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_SLOPE1, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtSlope0[1])); + isp_param_get(ViPipe, ISP_TNR_MANUAL_LOW_MTPRT_SLOPE2, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stManual.LowMtPrtSlope0[2])); + + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_LEVEL + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtLevel[i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN0 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtIn[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN1 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtIn[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN2 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtIn[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_IN3 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtIn[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT0 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtOut[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT1 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtOut[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT2 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtOut[2][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_OUT3 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtOut[3][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_SLOPE0 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtSlope0[0][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_SLOPE1 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtSlope0[1][i])); + isp_param_get(ViPipe, ISP_TNR_AUTO_LOW_MTPRT_SLOPE2 + i, + (void *)(uintptr_t)&(pstTNRMtPrtAttr->stAuto.LowMtPrtSlope0[2][i])); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetCLutAttr(VI_PIPE ViPipe, const ISP_CLUT_ATTR_S *pstCLutAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstCLutAttr); + + isp_param_set(ViPipe, ISP_CLUT_HSV3DLUT_ENABLE, pstCLutAttr->hsv3dlut_enable); + isp_param_set(ViPipe, ISP_CLUT_HSV3DLUT_H_CLAMP_WRAP_OPT, pstCLutAttr->hsv3dlut_h_clamp_wrap_opt); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetCLutAttr(VI_PIPE ViPipe, ISP_CLUT_ATTR_S *pstCLutAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstCLutAttr); + + isp_param_get(ViPipe, ISP_CLUT_HSV3DLUT_ENABLE, (void *)(uintptr_t)&(pstCLutAttr->hsv3dlut_enable)); + isp_param_get(ViPipe, ISP_CLUT_HSV3DLUT_H_CLAMP_WRAP_OPT, + (void *)(uintptr_t)&(pstCLutAttr->hsv3dlut_h_clamp_wrap_opt)); + + return CVI_SUCCESS; +} + +static CVI_S32 CVI_ISP_PrintBlackLevelAttr(const ISP_BLACKLEVEL_ATTR_S *pstBlackLevelAttr) +{ + ISP_CHECK_POINTER(pstBlackLevelAttr); + + // non-auto attributes + PRINT_ATTR(pstBlackLevelAttr->Enable, reg_blc_enable, 0, 1); + PRINT_ATTR(pstBlackLevelAttr->enOpType, nan, 0, 1); + + // manual attributes + PRINT_ATTR(pstBlackLevelAttr->stManual.OffsetR, reg_blc_offset_r, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stManual.OffsetGr, reg_blc_offset_gr, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stManual.OffsetGb, reg_blc_offset_gb, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stManual.OffsetB, reg_blc_offset_b, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stManual.GainR, reg_blc_gain_r, 0, 65535); + PRINT_ATTR(pstBlackLevelAttr->stManual.GainGr, reg_blc_gain_gr, 0, 65535); + PRINT_ATTR(pstBlackLevelAttr->stManual.GainGb, reg_blc_gain_gb, 0, 65535); + PRINT_ATTR(pstBlackLevelAttr->stManual.GainB, reg_blc_gain_b, 0, 65535); + + // auto attributes + for (CVI_U8 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstBlackLevelAttr->stAuto.OffsetR[i], reg_blc_offset_r, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stAuto.OffsetGr[i], reg_blc_offset_gr, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stAuto.OffsetGb[i], reg_blc_offset_gb, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stAuto.OffsetB[i], reg_blc_offset_b, 0, 1023); + PRINT_ATTR(pstBlackLevelAttr->stAuto.GainR[i], reg_blc_gain_r, 0, 65535); + PRINT_ATTR(pstBlackLevelAttr->stAuto.GainGr[i], reg_blc_gain_gr, 0, 65535); + PRINT_ATTR(pstBlackLevelAttr->stAuto.GainGb[i], reg_blc_gain_gb, 0, 65535); + PRINT_ATTR(pstBlackLevelAttr->stAuto.GainB[i], reg_blc_gain_b, 0, 65535); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetBlackLevelAttr(VI_PIPE ViPipe, const ISP_BLACKLEVEL_ATTR_S *pstBlackLevelAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstBlackLevelAttr); + + // non-auto attributes + isp_param_set(ViPipe, ISP_BLACKLEVEL_BLC_ENABLE, pstBlackLevelAttr->Enable); + isp_param_set(ViPipe, ISP_BLACKLEVEL_BLC_OPTYPE, pstBlackLevelAttr->enOpType); + + // manual attributes + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_R, pstBlackLevelAttr->stManual.OffsetR); + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_GR, pstBlackLevelAttr->stManual.OffsetGr); + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_GB, pstBlackLevelAttr->stManual.OffsetGb); + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_B, pstBlackLevelAttr->stManual.OffsetB); + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_R, pstBlackLevelAttr->stManual.GainR); + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_GR, pstBlackLevelAttr->stManual.GainGr); + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_GB, pstBlackLevelAttr->stManual.GainGb); + isp_param_set(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_B, pstBlackLevelAttr->stManual.GainB); + + // auto attributes + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_R + i, pstBlackLevelAttr->stAuto.OffsetR[i]); + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_GR + i, pstBlackLevelAttr->stAuto.OffsetGr[i]); + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_GB + i, pstBlackLevelAttr->stAuto.OffsetGb[i]); + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_B + i, pstBlackLevelAttr->stAuto.OffsetB[i]); + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_R + i, pstBlackLevelAttr->stAuto.GainR[i]); + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_GR + i, pstBlackLevelAttr->stAuto.GainGr[i]); + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_GB + i, pstBlackLevelAttr->stAuto.GainGb[i]); + isp_param_set(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_B + i, pstBlackLevelAttr->stAuto.GainB[i]); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintBlackLevelAttr(pstBlackLevelAttr); + + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_BLC); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetBlackLevelAttr(VI_PIPE ViPipe, ISP_BLACKLEVEL_ATTR_S *pstBlackLevelAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstBlackLevelAttr); + + // non-auto parameters + CLEAR(*pstBlackLevelAttr); + isp_param_get(ViPipe, ISP_BLACKLEVEL_BLC_ENABLE, (void *)&(pstBlackLevelAttr->Enable)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_BLC_OPTYPE, (void *)&(pstBlackLevelAttr->enOpType)); + + // manual parameters + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_R, (void *)&(pstBlackLevelAttr->stManual.OffsetR)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_GR, (void *)&(pstBlackLevelAttr->stManual.OffsetGr)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_GB, (void *)&(pstBlackLevelAttr->stManual.OffsetGb)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_OFFSET_B, (void *)&(pstBlackLevelAttr->stManual.OffsetB)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_R, (void *)&(pstBlackLevelAttr->stManual.GainR)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_GR, (void *)&(pstBlackLevelAttr->stManual.GainGr)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_GB, (void *)&(pstBlackLevelAttr->stManual.GainGb)); + isp_param_get(ViPipe, ISP_BLACKLEVEL_MANUAL_BLC_GAIN_B, (void *)&(pstBlackLevelAttr->stManual.GainB)); + + // auto parameters + for (CVI_U32 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_R + i + , (void *)&(pstBlackLevelAttr->stAuto.OffsetR[i])); + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_GR + i + , (void *)&(pstBlackLevelAttr->stAuto.OffsetGr[i])); + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_GB + i + , (void *)&(pstBlackLevelAttr->stAuto.OffsetGb[i])); + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_OFFSET_B + i + , (void *)&(pstBlackLevelAttr->stAuto.OffsetB[i])); + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_R + i + , (void *)&(pstBlackLevelAttr->stAuto.GainR[i])); + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_GR + i + , (void *)&(pstBlackLevelAttr->stAuto.GainGr[i])); + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_GB + i + , (void *)&(pstBlackLevelAttr->stAuto.GainGb[i])); + isp_param_get(ViPipe, ISP_BLACKLEVEL_AUTO_BLC_GAIN_B + i + , (void *)&(pstBlackLevelAttr->stAuto.GainB[i])); + } + + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintBlackLevelAttr(pstBlackLevelAttr); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetColorToneAttr(VI_PIPE ViPipe, const ISP_COLORTONE_ATTR_S *pstColorToneAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstColorToneAttr); + + isp_param_set(ViPipe, ISP_COLORTONE_WBG_ENABLE, pstColorToneAttr->wbg_enable); + isp_param_set(ViPipe, ISP_COLORTONE_U16REDCASTGAIN, pstColorToneAttr->u16RedCastGain); + isp_param_set(ViPipe, ISP_COLORTONE_U16GREENCASTGAIN, pstColorToneAttr->u16GreenCastGain); + isp_param_set(ViPipe, ISP_COLORTONE_U16BLUECASTGAIN, pstColorToneAttr->u16BlueCastGain); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_WBGAIN); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetColorToneAttr(VI_PIPE ViPipe, ISP_COLORTONE_ATTR_S *pstColorToneAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstColorToneAttr); + + isp_param_get(ViPipe, ISP_COLORTONE_WBG_ENABLE, (void *)(uintptr_t)&(pstColorToneAttr->wbg_enable)); + isp_param_get(ViPipe, ISP_COLORTONE_U16REDCASTGAIN, (void *)(uintptr_t)&(pstColorToneAttr->u16RedCastGain)); + isp_param_get(ViPipe, ISP_COLORTONE_U16GREENCASTGAIN, (void *)(uintptr_t)&(pstColorToneAttr->u16GreenCastGain)); + isp_param_get(ViPipe, ISP_COLORTONE_U16BLUECASTGAIN, (void *)(uintptr_t)&(pstColorToneAttr->u16BlueCastGain)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetSaturationAttr(VI_PIPE ViPipe, const ISP_Saturation_ATTR_S *pstSaturationAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstSaturationAttr); + + memcpy(&g_param[ViPipe].Saturation, pstSaturationAttr, sizeof(*pstSaturationAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_CCM); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetSaturationAttr(VI_PIPE ViPipe, ISP_Saturation_ATTR_S *pstSaturationAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstSaturationAttr); + + memcpy(pstSaturationAttr, &g_param[ViPipe].Saturation, sizeof(*pstSaturationAttr)); + + return CVI_SUCCESS; +} + +static void CVI_ISP_PrintCCMAttr(const ISP_CCM_ATTR_S *pstCCMAttr) +{ + CVI_U8 table = 0; + + // non-auto attributes + PRINT_ATTR(pstCCMAttr->Enable, reg_ccm_enable, 0, 1); + PRINT_ATTR(pstCCMAttr->enOpType, reg_ccm_enable, 0, 1); + + PRINT_ATTR(pstCCMAttr->stManual.SatEnable, reg_na, 0, 1); + + PRINT_ATTR(pstCCMAttr->stAuto.ISOActEnable, reg_na, 0, 1); + PRINT_ATTR(pstCCMAttr->stAuto.TempActEnable, reg_na, 0, 1); + //high to low, (D50, TL84, A) or (10K, D65, D50, TL84, A) + // INIT_ATTR(pstCCMAttr->stAuto.CCMTabNum, 0, 7); + PRINT_ATTR(pstCCMAttr->stAuto.CCMTabNum, reg_na, 3, 3); + PRINT_ATTR(pstCCMAttr->stAuto.CCMTab[0].ColorTemp, reg_na, 5000, 5000); //D50 + PRINT_ATTR(pstCCMAttr->stAuto.CCMTab[1].ColorTemp, reg_na, 4100, 4100); //TL84 + PRINT_ATTR(pstCCMAttr->stAuto.CCMTab[2].ColorTemp, reg_na, 2800, 2800);; //A + for (table = 0; table < pstCCMAttr->stAuto.CCMTabNum; table++) { + for (CVI_U8 cell = 0; cell < 9; cell++) + PRINT_ATTR(pstCCMAttr->stAuto.CCMTab[table].CCM[cell], reg_na, 0, (rand() % 1025) / 3); + } + + PRINT_ATTR(pstCCMAttr->stManual.SatEnable, reg_na, 0, 1); + for (CVI_U8 cell = 0; cell < 9; cell++) + PRINT_ATTR(pstCCMAttr->stManual.CCM[cell], reg_ccm_xx, 0, 256); + + // manual attributes + + // auto attributes +} + +CVI_S32 CVI_ISP_SetCCMAttr(VI_PIPE ViPipe, const ISP_CCM_ATTR_S *pstCCMAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstCCMAttr); + + memcpy(&g_param[ViPipe].CMM, pstCCMAttr, sizeof(*pstCCMAttr)); + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintCCMAttr(pstCCMAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_CCM); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetCCMAttr(VI_PIPE ViPipe, ISP_CCM_ATTR_S *pstCCMAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstCCMAttr); + + memcpy(pstCCMAttr, &g_param[ViPipe].CMM, sizeof(*pstCCMAttr)); + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintCCMAttr(pstCCMAttr); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetHSVAttr(VI_PIPE ViPipe, const ISP_HSV_ATTR_S *pstHSVAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstHSVAttr); + + memcpy(&g_param[ViPipe].HSV, pstHSVAttr, sizeof(*pstHSVAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_HSV); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetHSVAttr(VI_PIPE ViPipe, ISP_HSV_ATTR_S *pstHSVAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstHSVAttr); + + memcpy(pstHSVAttr, &g_param[ViPipe].HSV, sizeof(*pstHSVAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetDPDynamicAttr(VI_PIPE ViPipe, const ISP_DPDynamic_ATTR_S *pstDPCDynamicAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDPCDynamicAttr); + + memcpy(&g_param[ViPipe].DPDynamic, pstDPCDynamicAttr, sizeof(*pstDPCDynamicAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DPC); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDPDynamicAttr(VI_PIPE ViPipe, ISP_DPDynamic_ATTR_S *pstDPCDynamicAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDPCDynamicAttr); + + memcpy(pstDPCDynamicAttr, &g_param[ViPipe].DPDynamic, sizeof(*pstDPCDynamicAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetDPStaticAttr(VI_PIPE ViPipe, const ISP_DPStatic_ATTR_S *pstDPStaticAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDPStaticAttr); + + memcpy(&g_param[ViPipe].DPStatic, pstDPStaticAttr, sizeof(*pstDPStaticAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDPStaticAttr(VI_PIPE ViPipe, ISP_DPStatic_ATTR_S *pstDPStaticAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDPStaticAttr); + + memcpy(pstDPStaticAttr, &g_param[ViPipe].DPStatic, sizeof(*pstDPStaticAttr)); + + return CVI_SUCCESS; +} + +static CVI_VOID crop_image(VI_PIPE ViPipe, CVI_U8 *src, CVI_U8 *dst) +{ + ISP_SNS_SYNC_INFO_S snsCropInfo; + + if ((src == NULL) || (dst == NULL)) { + ISP_DEBUG(LOG_ERR, "input error src(%p), dst(%p)\n", src, dst); + } + + isp_sensor_get_crop_info(ViPipe, &snsCropInfo); + + // Two pixel packed with three bytes in raw12 format + + // ofs_x = pixel + CVI_U32 ofs_x = ((snsCropInfo.ispCfg.img_size[0].stWndRect.s32X * 3) >> 1); + // ofs_y = line. + CVI_U32 ofs_y = snsCropInfo.ispCfg.img_size[0].stWndRect.s32Y; + CVI_U32 img_w = ((snsCropInfo.ispCfg.img_size[0].stWndRect.u32Width * 3) >> 1); + CVI_U32 img_h = snsCropInfo.ispCfg.img_size[0].stWndRect.u32Height; + CVI_U32 sns_w = ((snsCropInfo.ispCfg.img_size[0].stSnsSize.u32Width * 3) >> 1); + CVI_U32 sns_h = snsCropInfo.ispCfg.img_size[0].stSnsSize.u32Height; + + ISP_DEBUG(LOG_DEBUG, "ofs_x/y(%d, %d), img_w/h(%d, %d), sns_w/h(%d, %d)\n", + ofs_x, ofs_y, img_w, img_h, sns_w, sns_h); + + CVI_U8 *addr_src = src + ofs_y * sns_w + ofs_x; + CVI_U8 *addr_dst = dst; + + for (CVI_U32 i = 0 ; i < img_h ; i++) { + memcpy(addr_dst, addr_src, img_w); + addr_src += sns_w; + addr_dst += img_w; + } +} + +CVI_S32 ISP_GetRawBuffer(VI_PIPE ViPipe, CVI_U8 *bayerBuffer + , BAYER_FORMAT_E *bayerFormat, CVI_BOOL saveFileEn) +{ + VIDEO_FRAME_INFO_S stVideoFrame; + VI_DUMP_ATTR_S attr; + + memset(&stVideoFrame, 0, sizeof(stVideoFrame)); + + stVideoFrame.stVFrame.enPixelFormat = PIXEL_FORMAT_RGB_BAYER_12BPP; + + // Set Attr + attr.bEnable = 1; + attr.u32Depth = 0; + attr.enDumpType = VI_DUMP_TYPE_RAW; + CVI_VI_SetPipeDumpAttr(ViPipe, &attr); + + // Check Attr effective + attr.bEnable = 0; + attr.enDumpType = VI_DUMP_TYPE_IR; + CVI_VI_GetPipeDumpAttr(ViPipe, &attr); + + if ((attr.bEnable != 1) || (attr.enDumpType != VI_DUMP_TYPE_RAW)) { + ISP_DEBUG(LOG_ERR, "Enable(%d), DumpType(%d)\n", attr.bEnable, attr.enDumpType); + } + + CVI_VI_GetPipeFrame(ViPipe, &stVideoFrame, 100); + + size_t image_size = stVideoFrame.stVFrame.u32Length[0]; + + if (attr.enDumpType == VI_DUMP_TYPE_RAW) { + stVideoFrame.stVFrame.pu8VirAddr[0] + = CVI_SYS_Mmap(stVideoFrame.stVFrame.u64PhyAddr[0], image_size); + ISP_DEBUG(LOG_DEBUG, "paddr(0x%llx) vaddr(0x%llx)\n", + stVideoFrame.stVFrame.u64PhyAddr[0], stVideoFrame.stVFrame.pu8VirAddr[0]); + + unsigned char *ptr = malloc(image_size); + + memcpy(ptr, (const void *)stVideoFrame.stVFrame.pu8VirAddr[0], image_size); + crop_image(ViPipe, ptr, bayerBuffer); + + CVI_SYS_Munmap((void *)stVideoFrame.stVFrame.pu8VirAddr[0], image_size); + + if (saveFileEn) { + char img_name[128] = {0,}, order_id[8] = {0,}; + FILE *output; + struct timeval tv1; + + switch (stVideoFrame.stVFrame.enBayerFormat) { + case BAYER_FORMAT_BG: + snprintf(order_id, sizeof(order_id), "BG"); + break; + case BAYER_FORMAT_GB: + snprintf(order_id, sizeof(order_id), "GB"); + break; + case BAYER_FORMAT_GR: + snprintf(order_id, sizeof(order_id), "GR"); + break; + case BAYER_FORMAT_RG: + snprintf(order_id, sizeof(order_id), "RG"); + break; + } + + gettimeofday(&tv1, NULL); + + snprintf(img_name, sizeof(img_name), "./vi_%d_byrid_%s_w_%d_h_%d_tv_%d_%d.raw", + ViPipe, order_id, + stVideoFrame.stVFrame.u32Width, stVideoFrame.stVFrame.u32Height, + tv1.tv_sec, tv1.tv_usec); + + ISP_DEBUG(LOG_DEBUG, "dump image %s\n", img_name); + + output = fopen(img_name, "wb"); + + fwrite(ptr, image_size, 1, output); + fclose(output); + } + free(ptr); + } + + CVI_VI_ReleasePipeFrame(ViPipe, &stVideoFrame); + + return 0; +} + +CVI_S32 ISP_SetDPCalibrate(VI_PIPE ViPipe, const ISP_DPCalib_ATTR_S *pstDPCalibAttr) +{ + ISP_CTX_S *pstIspCtx = NULL; + + ISP_CHECK_PIPE(ViPipe); + ISP_GET_CTX(ViPipe, pstIspCtx); + + ISP_DPCalib_ATTR_S attr = *pstDPCalibAttr; + CVI_U16 width = pstIspCtx->stSnsImageMode.u16Width; + CVI_U16 height = pstIspCtx->stSnsImageMode.u16Height; + CVI_U8 *bayerBuffer = calloc(1, width * height * 3 / 2); //12bit + CVI_U16 *detected = calloc(1, sizeof(CVI_U16) * width * height); + + if ((!bayerBuffer) || (!detected)) { + ISP_DEBUG(LOG_ERR, "Calloc failed, bayerBuffer(%p), detected(%d)\n", + bayerBuffer, detected); + } + + BAYER_FORMAT_E bayerFormat; + CVI_U32 bad_type = NORMAL_PIXEL; + + CVI_U32 reg_image_cnt = 0; + + ISP_DEBUG(LOG_DEBUG, "width(%u), height(%d)\n", width, height); + + if (attr.EnableDetect) { + + // Calibrate by `StaticDPType` + // until `TimeLimit` + time_t endTime = time(0) + attr.TimeLimit; + time_t currTime = time(0); + + // TODO@Kidd get noise level from mpi + // TODO@Kidd move to isp_test.c + if (attr.StaticDPType == ISP_STATIC_DP_BRIGHT) { + attr.StartThresh = (WHITE_LVL - SD_NUM * NOISE_LVL); + bad_type = WHITE_BAD_PIXEL; + } else { + attr.StartThresh = (BLACK_LVL + SD_NUM * NOISE_LVL); + bad_type = BLACK_BAD_PIXEL; + } + + // Detect + do { + // get frame + ISP_GetRawBuffer(ViPipe, bayerBuffer, &bayerFormat, attr.saveFileEn); + + // detect bad pixel + Bad_Pixel_Detection(bayerBuffer, width, height, detected, attr.StartThresh, attr.StaticDPType); + + // update threshold + attr.FinishThresh = attr.StartThresh; + + // next loop + reg_image_cnt++; + currTime = time(0); + } while (currTime < endTime); + + // screening the detection result + // TODO@Kidd sorting by Confidence, select first #STATIC_DP_COUNT_MAX and write to `Table` + attr.Count = 0; + for (CVI_U32 i = 0; i < height; i++) { + for (CVI_U32 j = 0; j < width; j++) { + // 90% are detected as bad, than this pixel is bad + CVI_U16 idx = i * width + j; + + if (detected[idx] > (reg_image_cnt * BAD_RATIO)) { + + detected[idx] = bad_type; + if (attr.Count > attr.CountMax) { + ISP_DEBUG(LOG_ERR, "Bad pixel count overflow\n"); + attr.Status = ISP_STATUS_TIMEOUT; + goto ERROR; + } + attr.Table[attr.Count] = ((i << 16) + j); + attr.Count++; + } else { + detected[idx] = NORMAL_PIXEL; + } + } + } + } // end of detect + +ERROR: + memcpy(&g_param[ViPipe].DPCalib, &attr, sizeof(attr)); + free(detected); + free(bayerBuffer); + + return 0; +} + +#define PARAL_DPC +#ifdef PARAL_DPC +pthread_mutex_t mutex_dpc[VI_MAX_PIPE_NUM]; +pthread_t dpcThread[VI_MAX_PIPE_NUM]; +#endif + +typedef struct { + VI_PIPE ViPipe; + const ISP_DPCalib_ATTR_S pstDPCalibAttr; +} ISP_Calibrate; +ISP_Calibrate calibrate[VI_MAX_PIPE_NUM]; +void *ISP_DPCalibrateThread(void *param) +{ + ISP_Calibrate *calibrate = (ISP_Calibrate *)param; + VI_PIPE ViPipe = calibrate->ViPipe; + const ISP_DPCalib_ATTR_S *pstDPCalibAttr = &(calibrate->pstDPCalibAttr); + +#ifdef PARAL_DPC + pthread_detach(pthread_self()); + pthread_mutex_lock(&mutex_dpc[ViPipe]); +#endif + + ISP_SetDPCalibrate(ViPipe, pstDPCalibAttr); + +#ifdef PARAL_DPC + pthread_mutex_unlock(&mutex_dpc[ViPipe]); + pthread_exit(NULL); +#endif + return 0; +} + +CVI_S32 CVI_ISP_SetDPCalibrate(VI_PIPE ViPipe, const ISP_DPCalib_ATTR_S *pstDPCalibAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDPCalibAttr); + + calibrate[ViPipe].ViPipe = ViPipe; + memcpy(&(calibrate[ViPipe].pstDPCalibAttr), pstDPCalibAttr, sizeof(ISP_DPCalib_ATTR_S)); + +#ifdef PARAL_DPC + struct sched_param param; + pthread_attr_t attr; + + param.sched_priority = 80; + pthread_attr_init(&attr); + pthread_attr_setschedpolicy(&attr, SCHED_RR); + pthread_attr_setschedparam(&attr, ¶m); + pthread_attr_setinheritsched(&attr, PTHREAD_EXPLICIT_SCHED); + pthread_create(&dpcThread[ViPipe], &attr, ISP_DPCalibrateThread, (void *)&calibrate[ViPipe]); +#else + ISP_DPCalibrateThread(&calibrate[ViPipe]); +#endif + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDPCalibrate(VI_PIPE ViPipe, ISP_DPCalib_ATTR_S *pstDPCalibAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstDPCalibAttr); + +#ifdef PARAL_DPC + pthread_mutex_lock(&mutex_dpc[ViPipe]); +#endif + + memcpy(pstDPCalibAttr, &g_param[ViPipe].DPCalib, sizeof(*pstDPCalibAttr)); + +#ifdef PARAL_DPC + pthread_mutex_unlock(&mutex_dpc[ViPipe]); +#endif + + return CVI_SUCCESS; +} + +#define ISP_DIFF_VALUE(ATTR) do {\ + diff = attr1->ATTR != attr2->ATTR;\ + if (!diffOnly || diff) {\ + if (diff)\ + printf("\033[0;32;31m");\ + printf("%s %d, %d\n", #ATTR, attr1->ATTR, attr2->ATTR);\ + if (diff)\ + printf("\033[m");\ + } \ +} while (0) + +#define ISP_DIFF_ARRAY(ATTR, fmt, size) do {\ + for (CVI_U32 i; i < (size); i++) {\ + diff = attr1->ATTR[i] != attr2->ATTR[i];\ + if (!diffOnly || diff) {\ + if (diff)\ + ISP_DEBUG(LOG_DEBUG, "\033[0;32;31m");\ + ISP_DEBUG(LOG_DEBUG, "%s[%u] " fmt ", " fmt "\n", #ATTR, i, attr1->ATTR[i], attr2->ATTR[i]);\ + if (diff)\ + ISP_DEBUG(LOG_DEBUG, "\033[m");\ + } \ + } \ +} while (0) + +#define ISP_DEBUG_PRINT_DIFF(ATTR) do {\ + if (g_isp_debug_print_mpi) {\ + typeof(pst##ATTR) old;\ + CVI_ISP_Print##ATTR(ViPipe, &old, pst##ATTR, g_isp_debug_diff_only);\ + } \ +} while (0) + +CVI_S32 CVI_ISP_PrintCrosstalkAttr(VI_PIPE ViPipe, const ISP_Crosstalk_ATTR_S *attr1, + const ISP_Crosstalk_ATTR_S *attr2, CVI_BOOL diffOnly) +{ + CVI_BOOL diff; + + // non-auto + ISP_DIFF_VALUE(Enable); + ISP_DIFF_ARRAY(GrGbDiffThreSec, "%u", 4); + ISP_DIFF_ARRAY(FlatThre, "%u", 4); + ISP_DIFF_VALUE(enOpType); + + // manual + ISP_DIFF_VALUE(stManual.Strength); + + // auto + ISP_DIFF_ARRAY(stAuto.Strength, "%u", ISP_AUTO_ISO_STRENGTH_NUM); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetCrosstalkAttr(VI_PIPE ViPipe, const ISP_Crosstalk_ATTR_S *pstCrosstalkAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstCrosstalkAttr); + + // ISP_DEBUG_PRINT_DIFF(CrosstalkAttr); + + memcpy(&g_param[ViPipe].Crosstalk, pstCrosstalkAttr, sizeof(*pstCrosstalkAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_CROSSTALK); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetCrosstalkAttr(VI_PIPE ViPipe, ISP_Crosstalk_ATTR_S *pstCrosstalkAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(pstCrosstalkAttr); + + memcpy(pstCrosstalkAttr, &g_param[ViPipe].Crosstalk, sizeof(*pstCrosstalkAttr)); + + return CVI_SUCCESS; +} + +//----------------------------------------------------------------------------- +// FSWDR +//----------------------------------------------------------------------------- +static CVI_S32 CVI_ISP_PrintFSWDRAttr(const ISP_FSWDR_ATTR_S *pstFSWDRAttr) +{ + ISP_CHECK_POINTER(pstFSWDRAttr); + + // non-auto attributes + PRINT_ATTR(pstFSWDRAttr->Enable, reg_fs_enable, 0, 1); + PRINT_ATTR(pstFSWDRAttr->MotionCompEnable, reg_fs_mc_enable, 0, 1); + PRINT_ATTR(pstFSWDRAttr->TuningMode, reg_fs_out_sel, 0, 3); + + // manual attributes + PRINT_ATTR(pstFSWDRAttr->stManual.MergeMode, reg_mmap_mrg_mode, 0, 1); + PRINT_ATTR(pstFSWDRAttr->stManual.MergeModeAlpha, reg_mmap_mrg_alph, 0, 1); + PRINT_ATTR(pstFSWDRAttr->stManual.WDRCombineShortThr, reg_fs_luma_thd_l, 0, 4095); + PRINT_ATTR(pstFSWDRAttr->stManual.WDRCombineLongThr, reg_fs_luma_thd_h, 0, 4095); + PRINT_ATTR(pstFSWDRAttr->stManual.WDRCombineMinWeight, reg_fs_wgt_min, 0, 255); + PRINT_ATTR(pstFSWDRAttr->stManual.WDRCombineMaxWeight, reg_fs_wgt_max, 0, 255); + + // auto attributes + for (CVI_U8 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstFSWDRAttr->stAuto.MergeMode[i], reg_mmap_mrg_mode, 0, 1); + PRINT_ATTR(pstFSWDRAttr->stAuto.MergeModeAlpha[i], reg_mmap_mrg_alph, 0, 1); + PRINT_ATTR(pstFSWDRAttr->stAuto.WDRCombineShortThr[i], reg_fs_luma_thd_l, 0, 4095); + PRINT_ATTR(pstFSWDRAttr->stAuto.WDRCombineLongThr[i], reg_fs_luma_thd_h, 0, 4095); + PRINT_ATTR(pstFSWDRAttr->stAuto.WDRCombineMinWeight[i], reg_fs_wgt_min, 0, 255); + PRINT_ATTR(pstFSWDRAttr->stAuto.WDRCombineMaxWeight[i], reg_fs_wgt_max, 0, 255); + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetFSWDRAttr(VI_PIPE ViPipe, const ISP_FSWDR_ATTR_S *pstFSWDRAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstFSWDRAttr); + + memcpy(&g_param[ViPipe].FSWDR, pstFSWDRAttr, sizeof(*pstFSWDRAttr)); + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintFSWDRAttr(pstFSWDRAttr); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_FUSION); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetFSWDRAttr(VI_PIPE ViPipe, ISP_FSWDR_ATTR_S *pstFSWDRAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstFSWDRAttr); + + memcpy(pstFSWDRAttr, &g_param[ViPipe].FSWDR, sizeof(*pstFSWDRAttr)); + ISP_DEBUG(LOG_DEBUG, "\n"); + CVI_ISP_PrintFSWDRAttr(pstFSWDRAttr); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_PrintWDRExposureAttr(const ISP_WDR_EXPOSURE_ATTR_S *pstWDRExposureAttr) +{ + ISP_CHECK_POINTER(pstWDRExposureAttr); + + // non-auto attributes + PRINT_ATTR(pstWDRExposureAttr->au32ExpRatio[0], reg_fs_ls_gain, 64, 16383); + + // manual attributes + + // auto attributes + //for (CVI_U8 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + //} + + return 0; +} + + +//----------------------------------------------------------------------------- +// DRC +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_PrintDRCAttr(const ISP_DRC_ATTR_S *pstDRCAttr) +{ + ISP_CHECK_POINTER(pstDRCAttr); + + // non-auto attributes + PRINT_ATTR(pstDRCAttr->Enable, reg_ltm_enable, 0, 1); + PRINT_ATTR(pstDRCAttr->NLDetailEnhanceEn, reg_ltm_dark_lce_en, 0, 1); + PRINT_ATTR(pstDRCAttr->TuningMode, reg_ltm_dbg_enable, 0, 4); + PRINT_ATTR(pstDRCAttr->ToneCurveSelect, reg_ltm_deflt_lut[769], 0, 1); + for (CVI_U32 i = 0; i < 769; i++) + PRINT_ATTR(pstDRCAttr->CurveUserDefine[i], reg_na, 0, 4096); + + PRINT_ATTR(pstDRCAttr->DRangeFltScale, (reg_ltm_de_rng, reg_ltm_be_rng), 0, 15); + PRINT_ATTR(pstDRCAttr->DRangeFltCoef, (reg_ltm_de_dist_wgt[11], reg_ltm_be_dist_wgt[11]), 0, 31); + PRINT_ATTR(pstDRCAttr->SpatialFltScale, (reg_ltm_lmap0_lp_rng, reg_ltm_lmap1_lp_rng), 0, 15); + PRINT_ATTR(pstDRCAttr->SpatialFltCoef, (reg_ltm_lmap0_lp_diff_wgt[30], reg_ltm_lmap1_lp_diff_wgt[30]), 0, 31); + + // manual attributes + PRINT_ATTR(pstDRCAttr->stManual.NLDetailDarkGain[4], reg_ltm_dar_lce_gain_0, 0, 4095); + PRINT_ATTR(pstDRCAttr->stManual.NLDetailDarkAmplitude[4], reg_ltm_dar_lce_diff_thd_0, 0, 104875); + PRINT_ATTR(pstDRCAttr->stManual.NLDetailBrightGain[4], reg_ltm_bri_lce_up_gain_0, 0, 4095); + PRINT_ATTR(pstDRCAttr->stManual.NLDetailBrightAmplitude[4], reg_ltm_bri_lce_up_thd_0, 0, 104875); + PRINT_ATTR(pstDRCAttr->stManual.ContrastDarkMinThrd, reg_ltm_dar_in_thd_l, 0, 4095); + PRINT_ATTR(pstDRCAttr->stManual.ContrastDarkMaxThrd, reg_ltm_dar_in_thd_h, 0, 4095); + PRINT_ATTR(pstDRCAttr->stManual.ContrastDarkMinWeight, reg_ltm_dar_out_thd_l, 0, 255); + PRINT_ATTR(pstDRCAttr->stManual.ContrastDarkMaxWeight, reg_ltm_dar_out_thd_h, 0, 255); + PRINT_ATTR(pstDRCAttr->stManual.ContrastBrightMinThrd, reg_ltm_bri_in_thd_l, 0, 4095); + PRINT_ATTR(pstDRCAttr->stManual.ContrastBrightMaxThrd, reg_ltm_bri_in_thd_h, 0, 4095); + PRINT_ATTR(pstDRCAttr->stManual.ContrastBrightMinWeight, reg_ltm_bri_out_thd_l, 0, 255); + PRINT_ATTR(pstDRCAttr->stManual.ContrastBrightMaxWeight, reg_ltm_bri_out_thd_h, 0, 255); + + // auto attributes + for (CVI_U8 i = 0; i < ISP_AUTO_ISO_STRENGTH_NUM; i++) { + PRINT_ATTR(pstDRCAttr->stAuto.NLDetailDarkGain[4][i], reg_ltm_dar_lce_gain_0, 0, 4095); + PRINT_ATTR(pstDRCAttr->stAuto.NLDetailDarkAmplitude[4][i], reg_ltm_dar_lce_diff_thd_0, 0, 104875); + PRINT_ATTR(pstDRCAttr->stAuto.NLDetailBrightGain[4][i], reg_ltm_bri_lce_up_gain_0, 0, 4095); + PRINT_ATTR(pstDRCAttr->stAuto.NLDetailBrightAmplitude[4][i], reg_ltm_bri_lce_up_thd_0, 0, 104875); + } + + for (CVI_U8 i = 0; i < ISP_AUTO_LV_NUM; i++) { + PRINT_ATTR(pstDRCAttr->stAuto.ContrastDarkMinThrd, reg_ltm_dar_in_thd_l, 0, 4095); + PRINT_ATTR(pstDRCAttr->stAuto.ContrastDarkMaxThrd, reg_ltm_dar_in_thd_h, 0, 4095); + PRINT_ATTR(pstDRCAttr->stAuto.ContrastDarkMinWeight, reg_ltm_dar_out_thd_l, 0, 255); + PRINT_ATTR(pstDRCAttr->stAuto.ContrastDarkMaxWeight, reg_ltm_dar_out_thd_h, 0, 255); + PRINT_ATTR(pstDRCAttr->stAuto.ContrastBrightMinThrd, reg_ltm_bri_in_thd_l, 0, 4095); + PRINT_ATTR(pstDRCAttr->stAuto.ContrastBrightMaxThrd, reg_ltm_bri_in_thd_h, 0, 4095); + PRINT_ATTR(pstDRCAttr->stAuto.ContrastBrightMinWeight, reg_ltm_bri_out_thd_l, 0, 255); + PRINT_ATTR(pstDRCAttr->stAuto.ContrastBrightMaxWeight, reg_ltm_bri_out_thd_h, 0, 255); + } + + return 0; +} + +CVI_S32 CVI_ISP_SetDRCAttr(VI_PIPE ViPipe, const ISP_DRC_ATTR_S *pstDRCAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstDRCAttr); + + memcpy(&g_param[ViPipe].DRC, pstDRCAttr, sizeof(*pstDRCAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_DRC); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetDRCAttr(VI_PIPE ViPipe, ISP_DRC_ATTR_S *pstDRCAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstDRCAttr); + + memcpy(pstDRCAttr, &g_param[ViPipe].DRC, sizeof(*pstDRCAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_SetMonoAttr(VI_PIPE ViPipe, const ISP_MONO_ATTR_S *pstMonoAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstMonoAttr); + + memcpy(&g_param[ViPipe].mono, pstMonoAttr, sizeof(*pstMonoAttr)); + isp_iq_invalid_set(ViPipe, ISP_IQ_BLOCK_MONO); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetMonoAttr(VI_PIPE ViPipe, ISP_MONO_ATTR_S *pstMonoAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstMonoAttr); + + memcpy(pstMonoAttr, &g_param[ViPipe].mono, sizeof(*pstMonoAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_PrintNoiseProfileAttr(const ISP_CMOS_NOISE_CALIBRATION_S *pstNoiseProfileAttr) +{ + ISP_CHECK_POINTER(pstNoiseProfileAttr); + + for (CVI_U32 i = 0; i < NOISE_PROFILE_ISO_NUM; i++) { + for (CVI_U32 j = 0; j < NOISE_PROFILE_CHANNEL_NUM; j++) { + for (CVI_U32 k = 0; k < NOISE_PROFILE_LEVEL_NUM; k++) { + PRINT_ATTR(pstNoiseProfileAttr->CalibrationCoef[i][j][k], reg_na, 0, 4096); + } + } + } + + return 0; +} + +CVI_S32 CVI_ISP_SetNoiseProfileAttr(VI_PIPE ViPipe, const ISP_CMOS_NOISE_CALIBRATION_S *pstNoiseProfileAttr) +{ + ISP_DEBUG(LOG_INFO, "+\n"); + ISP_CHECK_POINTER(pstNoiseProfileAttr); + + memcpy(&g_param[ViPipe].np, pstNoiseProfileAttr, sizeof(*pstNoiseProfileAttr)); + + return CVI_SUCCESS; +} + +CVI_S32 CVI_ISP_GetNoiseProfileAttr(VI_PIPE ViPipe, ISP_CMOS_NOISE_CALIBRATION_S *pstNoiseProfileAttr) +{ + ISP_DEBUG(LOG_DEBUG, "+\n"); + ISP_CHECK_POINTER(pstNoiseProfileAttr); + + memcpy(pstNoiseProfileAttr, &g_param[ViPipe].np, sizeof(*pstNoiseProfileAttr)); + + return CVI_SUCCESS; +} + +//----------------------------------------------------------------------------- +// tuning +//----------------------------------------------------------------------------- +CVI_S32 CVI_ISP_GetTuningAttrSize(VI_PIPE ViPipe, CVI_U32 *Size) +{ + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(Size); + + return sizeof(g_param[ViPipe]); +} + +CVI_S32 CVI_ISP_SetTuningAttr(VI_PIPE ViPipe, const CVI_U8 *TuningParamBuffer) +{ + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(TuningParamBuffer); + + memcpy(&g_param[ViPipe], TuningParamBuffer, sizeof(g_param[ViPipe])); + isp_iq_invalid_set_all(ViPipe); + + return 0; +} + +CVI_S32 CVI_ISP_GetTuningAttr(VI_PIPE ViPipe, CVI_U8 *TuningParamBuffer) +{ + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(TuningParamBuffer); + + memcpy(TuningParamBuffer, &g_param[ViPipe], sizeof(g_param[ViPipe])); + return 0; +} +#endif + +#define MIPI_DEV_NODE "cvi-mipi-rx" +#define MIPI_CHECK_OPEN(s32Ret) do {\ + if (fd_mipi < 0) {\ + s32Ret = mipi_open_dev(); \ + if (s32Ret != CVI_SUCCESS) \ + return s32Ret; \ + } \ +} while (0) + +#define VI_MAX_DEV_NUM 2 +#define ISP_CHECK_PIPE(pipe) + +CVI_S32 fd_mipi = -1; + +CVI_S32 mipi_open_dev(CVI_VOID) +{ + fd_mipi = open(MIPI_DEV_NODE, 0); + if (fd_mipi < 0) { + return CVI_FAILURE; + } + + return CVI_SUCCESS; +} + +CVI_S32 CVI_MIPI_SetMipiReset(CVI_S32 devno, CVI_U32 reset) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + CVI_S32 s32Devno = devno; + + MIPI_CHECK_OPEN(s32Ret); +// printf("Func %s %d %d fd_mipi %d\n", __func__, devno, reset, fd_mipi); + if (reset == 0) { + if (ioctl(fd_mipi, CVI_MIPI_UNRESET_MIPI, (uintptr_t)&s32Devno) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_UNRESET_MIPI - %d NG\n", s32Devno); + return errno; + } + } else { + if (ioctl(fd_mipi, CVI_MIPI_RESET_MIPI, (uintptr_t)&s32Devno) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_RESET_MIPI - %d NG\n", s32Devno); + return errno; + } + } + return s32Ret; +} + +CVI_S32 CVI_MIPI_SetSensorClock(CVI_S32 devno, CVI_U32 enable) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + CVI_S32 s32Devno = devno; + + MIPI_CHECK_OPEN(s32Ret); + if (enable == 0) { + if (ioctl(fd_mipi, CVI_MIPI_DISABLE_SENSOR_CLOCK, (uintptr_t)&s32Devno) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_DISABLE_SENSOR_CLOCK - %d NG\n", s32Devno); + return errno; + } + } else { + if (ioctl(fd_mipi, CVI_MIPI_ENABLE_SENSOR_CLOCK, (uintptr_t)&s32Devno) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_ENABLE_SENSOR_CLOCK - %d NG\n", s32Devno); + return errno; + } + } + return s32Ret; +} + +CVI_S32 CVI_MIPI_SetSensorReset(CVI_S32 devno, CVI_U32 reset) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + CVI_S32 s32Devno = devno; + + MIPI_CHECK_OPEN(s32Ret); +// printf("Func %s %d %d fd_mipi %d\n", __func__, devno, reset, fd_mipi); + if (reset == 0) { + if (ioctl(fd_mipi, CVI_MIPI_UNRESET_SENSOR, (uintptr_t)&s32Devno) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_DISABLE_SENSOR_CLOCK - %d NG\n", s32Devno); + return errno; + } + } else { + if (ioctl(fd_mipi, CVI_MIPI_RESET_SENSOR, (uintptr_t)&s32Devno) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_RESET_SENSOR - %d NG\n", s32Devno); + return errno; + } + } + return s32Ret; +} + +CVI_S32 CVI_MIPI_SetMipiAttr(CVI_S32 ViPipe, const CVI_VOID *devAttr) +{ + CVI_S32 s32Ret = 0; + SNS_COMBO_DEV_ATTR_S *comboAttr; + + ISP_CHECK_PIPE(ViPipe); + ISP_CHECK_POINTER(devAttr); + MIPI_CHECK_OPEN(s32Ret); + comboAttr = (SNS_COMBO_DEV_ATTR_S *)devAttr; + if (ioctl(fd_mipi, CVI_MIPI_SET_DEV_ATTR, (uintptr_t)comboAttr) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_SET_DEV_ATTR NG\n"); + return errno; + } + return s32Ret; +} + +CVI_S32 CVI_MIPI_SetClkEdge(CVI_S32 devno, CVI_U32 is_up) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + CVI_S32 s32Devno = devno; + struct clk_edge_s clk; + + MIPI_CHECK_OPEN(s32Ret); + clk.devno = devno; + clk.edge = is_up ? CLK_UP_EDGE : CLK_DOWN_EDGE; +// ISP_DEBUG(LOG_DEBUG, "%d %d fd_mipi %d\n", devno, reset, fd_mipi); + if (ioctl(fd_mipi, CVI_MIPI_SET_OUTPUT_CLK_EDGE, (uintptr_t)&clk) < 0) { + //ISP_DEBUG(LOG_ERR, "CVI_MIPI_SET_OUTPUT_CLK_EDGE, - %d NG\n", s32Devno); + return errno; + } + return s32Ret; +} diff --git a/freertos/cvitek/task/isp/src/cv1835/isp_main.c b/freertos/cvitek/task/isp/src/cv1835/isp_main.c new file mode 100644 index 000000000..351bfaeeb --- /dev/null +++ b/freertos/cvitek/task/isp/src/cv1835/isp_main.c @@ -0,0 +1,38 @@ +/* Kernel includes. */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +#include "FreeRTOS_POSIX/time.h" +#include "task.h" +#include "semphr.h" + +#include "timers.h" +/* Xilinx includes. */ +#include "printf.h" +#include "rtos_queue.h" +//#include "cmdqueue.h" +#include "cvi_vip_cif_uapi.h" + +extern QueueHandle_t xQueueIsp; +extern QueueHandle_t xQueueCmdqu; +extern int sample_snsr_test(void); +extern int cvi_cif_probe(void); +void prvISPRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + cmdqu_t rtos_cmdq; + printf("prvISPRunTask run\n"); + cvi_cif_init(); + cvi_vip_init(); + + sample_snsr_test(); + for (;;) { + xQueueReceive(xQueueIsp, &rtos_cmdq, portMAX_DELAY); + printf("prvISPRunTask id=%d cmd=%d para=%lx\n", rtos_cmdq.ip_id, + rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + if (rtos_cmdq.ip_id == 0) { + xQueueSend(xQueueCmdqu, &rtos_cmdq, 0U); + } + rtos_cmdq.ip_id = -1; + } +} diff --git a/freertos/cvitek/task/isp/src/cv1835/sample_comm.h b/freertos/cvitek/task/isp/src/cv1835/sample_comm.h new file mode 100644 index 000000000..830f311ce --- /dev/null +++ b/freertos/cvitek/task/isp/src/cv1835/sample_comm.h @@ -0,0 +1,778 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: sample_common.h + * Description: + */ + +#ifndef __SAMPLE_COMM_H__ +#define __SAMPLE_COMM_H__ +//#include <pthread.h> +#include "cvi_common.h" +//#include "cvi_buffer.h" +//#include "cvi_comm_sys.h" +//#include "cvi_comm_vb.h" +#include "cvi_comm_isp.h" +//#include "cvi_comm_3a.h" +#include "cvi_comm_sns.h" +//#include "cvi_comm_vi.h" +//#include "cvi_comm_vpss.h" +//#include "cvi_comm_vo.h" +//#include "cvi_comm_venc.h" +//#include "cvi_comm_vdec.h" +//#include "cvi_comm_region.h" +//#include "cvi_comm_adec.h" +//#include "cvi_comm_aenc.h" +//#include "cvi_comm_ai.h" +//#include "cvi_comm_ao.h" +//#include "cvi_comm_aio.h" +//#include "cvi_audio.h" +#include "cvi_defines.h" +#include "cvi_mipi.h" +//#include "cvi_sys.h" +//#include "cvi_vb.h" +//#include "cvi_vi.h" +//#include "cvi_vpss.h" +//#include "cvi_vo.h" +//#include "cvi_isp.h" +//#include "cvi_venc.h" +//#include "cvi_vdec.h" +//#include "cvi_gdc.h" +//#include "cvi_region.h" +//#include "md5sum.h" +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* End of #ifdef __cplusplus */ + +#define FILE_NAME_LEN 128 +#define MAX_NUM_INSTANCE 4 + +#define CHECK_CHN_RET(express, Chn, name) \ + do { \ + CVI_S32 Ret; \ + Ret = express; \ + if (Ret != CVI_SUCCESS) { \ + printf("\033[0;31m%s chn %d failed at %s: LINE: %d with %#x!\033[0;39m\n", name, Chn, \ + __func__, __LINE__, Ret); \ + fflush(stdout); \ + return Ret; \ + } \ + } while (0) + +#define CHECK_RET(express, name) \ + do { \ + CVI_S32 Ret; \ + Ret = express; \ + if (Ret != CVI_SUCCESS) { \ + printf("\033[0;31m%s failed at %s: LINE: %d with %#x!\033[0;39m\n", name, __func__, \ + __LINE__, Ret); \ + return Ret; \ + } \ + } while (0) +#define SAMPLE_PIXEL_FORMAT PIXEL_FORMAT_YUV_PLANAR_420 + +#define COLOR_RGB_RED RGB_8BIT(0xFF, 0, 0) +#define COLOR_RGB_GREEN RGB_8BIT(0, 0xFF, 0) +#define COLOR_RGB_BLUE RGB_8BIT(0, 0, 0xFF) +#define COLOR_RGB_BLACK RGB_8BIT(0, 0, 0) +#define COLOR_RGB_YELLOW RGB_8BIT(0xFF, 0xFF, 0) +#define COLOR_RGB_CYN RGB_8BIT(0, 0xFF, 0xFF) +#define COLOR_RGB_WHITE RGB_8BIT(0xFF, 0xFF, 0xFF) + +#define COLOR_10_RGB_RED RGB(0x3FF, 0, 0) +#define COLOR_10_RGB_GREEN RGB(0, 0x3FF, 0) +#define COLOR_10_RGB_BLUE RGB(0, 0, 0x3FF) +#define COLOR_10_RGB_BLACK RGB(0, 0, 0) +#define COLOR_10_RGB_YELLOW RGB(0x3FF, 0x3FF, 0) +#define COLOR_10_RGB_CYN RGB(0, 0x3FF, 0x3FF) +#define COLOR_10_RGB_WHITE RGB(0x3FF, 0x3FF, 0x3FF) + +#define SAMPLE_VO_DEV_DHD0 0 /* VO's device HD0 */ +#define SAMPLE_VO_DEV_DHD1 1 /* VO's device HD1 */ +#define SAMPLE_VO_DEV_UHD SAMPLE_VO_DEV_DHD0 /* VO's ultra HD device:HD0 */ +#define SAMPLE_VO_DEV_HD SAMPLE_VO_DEV_DHD1 /* VO's HD device:HD1 */ +#define SAMPLE_VO_LAYER_VHD0 0 +#define SAMPLE_VO_LAYER_VHD1 1 +#define SAMPLE_VO_LAYER_VHD2 2 +#define SAMPLE_VO_LAYER_PIP SAMPLE_VO_LAYER_VHD2 + +#define SAMPLE_AUDIO_EXTERN_AI_DEV 0 +#define SAMPLE_AUDIO_EXTERN_AO_DEV 0 +#define SAMPLE_AUDIO_INNER_AI_DEV 0 +#define SAMPLE_AUDIO_INNER_AO_DEV 0 +#define SAMPLE_AUDIO_INNER_HDMI_AO_DEV 1 +#define SAMPLE_AUDIO_PTNUMPERFRM 480 + +#define WDR_MAX_PIPE_NUM 4 //need checking by jammy +#define MAX_SENSOR_NUM 2 +#define ISP_MAX_DEV_NUM 2 + +#define __FILENAM__ (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__) + +#define CVI_TRACE_LOG(level, fmt, ...) \ + CVI_TRACE(level, CVI_ID_LOG, "%s:%d:%s(): " fmt, __FILENAM__, __LINE__, __func__, ##__VA_ARGS__) +#define MAX_STRING_LEN 255 + +#define PAUSE() \ + do { \ + printf("---------------press Enter key to exit!---------------\n"); \ + getchar(); \ + } while (0) + +#define SAMPLE_PRT(fmt...) \ + do { \ + printf("[%s]-%d: ", __func__, __LINE__); \ + printf(fmt); \ + } while (0) + +#define CHECK_NULL_PTR(ptr) \ + do { \ + if (ptr == NULL) { \ + printf("func:%s,line:%d, NULL pointer\n", __func__, __LINE__); \ + return CVI_FAILURE; \ + } \ + } while (0) + +/******************************************************* + * enum define + *******************************************************/ +typedef enum _PIC_SIZE_E { + PIC_CIF, + PIC_D1_PAL, /* 720 * 576 */ + PIC_D1_NTSC, /* 720 * 480 */ + PIC_720P, /* 1280 * 720 */ + PIC_1080P, /* 1920 * 1080 */ + PIC_1088, /* 1920 * 1088 */ + PIC_1440P, /* 2560 * 1440 */ + PIC_2304x1296, + PIC_2592x1520, + PIC_2592x1536, + PIC_2592x1944, + PIC_2716x1524, + PIC_3840x2160, + PIC_4096x2160, + PIC_3000x3000, + PIC_4000x3000, + PIC_3840x8640, + PIC_640x480, + PIC_479P, /* 632 * 479 */ + PIC_288P, /* 384 * 288 */ + PIC_CUSTOMIZE, + PIC_BUTT +} PIC_SIZE_E; + +typedef enum _SAMPLE_SNS_TYPE_E { + /* ------ LINEAR BEGIN ------*/ + SONY_IMX290_MIPI_1M_30FPS_12BIT, + SONY_IMX290_MIPI_2M_60FPS_12BIT, + SONY_IMX327_MIPI_2M_30FPS_12BIT, + SONY_IMX307_MIPI_2M_30FPS_12BIT, + SONY_IMX327_2L_MIPI_2M_30FPS_12BIT, + SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT, + SONY_IMX307_2L_MIPI_2M_30FPS_12BIT, + SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT, + OV_OS08A20_MIPI_8M_30FPS_10BIT, + OV_OS08A20_MIPI_5M_30FPS_10BIT, + SOI_F35_MIPI_2M_30FPS_10BIT, + SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT, + SOI_H65_MIPI_1M_30FPS_10BIT, + PICO640_THERMAL_479P, + PICO384_THERMAL_384X288, + SONY_IMX327_SUBLVDS_2M_30FPS_12BIT, + SONY_IMX307_SUBLVDS_2M_30FPS_12BIT, + VIVO_MCS369Q_4M_30FPS_12BIT, + VIVO_MM308M2_2M_25FPS_8BIT, + NEXTCHIP_N5_2M_25FPS_8BIT, + SMS_SC3335_MIPI_3M_30FPS_10BIT, + SONY_IMX335_MIPI_5M_30FPS_12BIT, + SONY_IMX335_MIPI_4M_30FPS_12BIT, + PIXELPLUS_PR2020_2M_25FPS_8BIT, + SONY_IMX334_MIPI_8M_30FPS_12BIT, + SMS_SC8238_MIPI_8M_30FPS_10BIT, + VIVO_MCS369_2M_30FPS_12BIT, + SMS_SC4210_MIPI_4M_30FPS_12BIT, + /* ------ LINEAR END ------*/ + SAMPLE_SNS_TYPE_LINEAR_BUTT, + + /* ------ WDR 2TO1 BEGIN ------*/ + SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1 = SAMPLE_SNS_TYPE_LINEAR_BUTT, + SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1, + OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1, + OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1, + SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1, + SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1, + SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1, + SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1, + SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1, + SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1, + SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1, + SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1, + /* ------ WDR 2TO1 END ------*/ + SAMPLE_SNS_TYPE_BUTT, +} SAMPLE_SNS_TYPE_E; + +typedef struct _SAMPLE_SENSOR_INFO_S { + SAMPLE_SNS_TYPE_E enSnsType; + CVI_S32 s32SnsId; + CVI_S32 s32BusId; + combo_dev_t MipiDev; + CVI_S16 as16LaneId[5]; + CVI_S8 as8PNSwap[5]; + CVI_U8 u8HwSync; +} SAMPLE_SENSOR_INFO_S; + +#if 0 +typedef enum _SAMPLE_VO_MODE_E { + VO_MODE_1MUX, + VO_MODE_2MUX, + VO_MODE_4MUX, + VO_MODE_8MUX, + VO_MODE_9MUX, + VO_MODE_16MUX, + VO_MODE_25MUX, + VO_MODE_36MUX, + VO_MODE_49MUX, + VO_MODE_64MUX, + VO_MODE_2X4, + VO_MODE_BUTT +} SAMPLE_VO_MODE_E; + +typedef enum _SAMPLE_RC_E { + SAMPLE_RC_CBR = 0, + SAMPLE_RC_VBR, + SAMPLE_RC_AVBR, + SAMPLE_RC_QVBR, + SAMPLE_RC_FIXQP, + SAMPLE_RC_QPMAP, + SAMPLE_RC_MAX +} SAMPLE_RC_E; + +#endif +/******************************************************* + * structure define + *******************************************************/ +#if 0 +typedef struct _SAMPLE_SNAP_INFO_S { + bool bSnap; + bool bDoublePipe; + VI_PIPE VideoPipe; + VI_PIPE SnapPipe; + //VI_VPSS_MODE_E enVideoPipeMode; + //VI_VPSS_MODE_E enSnapPipeMode; +} SAMPLE_SNAP_INFO_S; +#endif +typedef struct _SAMPLE_DEV_INFO_S { + VI_DEV ViDev; + WDR_MODE_E enWDRMode; +} SAMPLE_DEV_INFO_S; + +typedef struct _SAMPLE_PIPE_INFO_S { + VI_PIPE aPipe[WDR_MAX_PIPE_NUM]; + //VI_VPSS_MODE_E enMastPipeMode; + bool bMultiPipe; + bool bVcNumCfged; + bool bIspBypass; + PIXEL_FORMAT_E enPixFmt; + CVI_U32 u32VCNum[WDR_MAX_PIPE_NUM]; +} SAMPLE_PIPE_INFO_S; +#if 0 +typedef struct _SAMPLE_CHN_INFO_S { + VI_CHN ViChn; + PIXEL_FORMAT_E enPixFormat; + DYNAMIC_RANGE_E enDynamicRange; + VIDEO_FORMAT_E enVideoFormat; + COMPRESS_MODE_E enCompressMode; +} SAMPLE_CHN_INFO_S; +#endif +typedef struct _SAMPLE_VI_INFO_S { + SAMPLE_SENSOR_INFO_S stSnsInfo; + SAMPLE_DEV_INFO_S stDevInfo; + SAMPLE_PIPE_INFO_S stPipeInfo; + //SAMPLE_CHN_INFO_S stChnInfo; + //SAMPLE_SNAP_INFO_S stSnapInfo; +} SAMPLE_VI_INFO_S; + +typedef struct _SAMPLE_VI_CONFIG_S { + SAMPLE_VI_INFO_S astViInfo[VI_MAX_DEV_NUM]; + CVI_S32 as32WorkingViId[VI_MAX_DEV_NUM]; + CVI_S32 s32WorkingViNum; + CVI_BOOL bViRotation; +} SAMPLE_VI_CONFIG_S; + +#if 0 +typedef struct _SAMPLE_VI_FRAME_CONFIG_S { + CVI_U32 u32Width; + CVI_U32 u32Height; + CVI_U32 u32ByteAlign; + PIXEL_FORMAT_E enPixelFormat; + VIDEO_FORMAT_E enVideoFormat; + COMPRESS_MODE_E enCompressMode; + DYNAMIC_RANGE_E enDynamicRange; +} SAMPLE_VI_FRAME_CONFIG_S; + +typedef struct _SAMPLE_VI_FRAME_INFO_S { + VB_BLK VbBlk; + CVI_U32 u32Size; + VIDEO_FRAME_INFO_S stVideoFrameInfo; +} SAMPLE_VI_FRAME_INFO_S; + +typedef struct _SAMPLE_VI_FPN_CALIBRATE_INFO_S { + CVI_U32 u32Threshold; + CVI_U32 u32FrameNum; + //ISP_FPN_TYPE_E enFpnType; + PIXEL_FORMAT_E enPixelFormat; + COMPRESS_MODE_E enCompressMode; +} SAMPLE_VI_FPN_CALIBRATE_INFO_S; + +typedef struct _SAMPLE_VI_FPN_CORRECTION_INFO_S { + ISP_OP_TYPE_E enOpType; + //ISP_FPN_TYPE_E enFpnType; + CVI_U32 u32Strength; + PIXEL_FORMAT_E enPixelFormat; + COMPRESS_MODE_E enCompressMode; + SAMPLE_VI_FRAME_INFO_S stViFrameInfo; +} SAMPLE_VI_FPN_CORRECTION_INFO_S; + +typedef struct _SAMPLE_COMM_VO_LAYER_CONFIG_S { + /* for layer */ + VO_LAYER VoLayer; + VO_INTF_SYNC_E enIntfSync; + RECT_S stDispRect; + SIZE_S stImageSize; + PIXEL_FORMAT_E enPixFormat; + + CVI_U32 u32DisBufLen; + + /* for chn */ + SAMPLE_VO_MODE_E enVoMode; +} SAMPLE_COMM_VO_LAYER_CONFIG_S; + +typedef struct _SAMPLE_VO_CONFIG_S { + /* for device */ + VO_DEV VoDev; + VO_INTF_TYPE_E enVoIntfType; + VO_INTF_SYNC_E enIntfSync; + VO_SYNC_INFO_S stSyncInfo; + PIC_SIZE_E enPicSize; + CVI_U32 u32BgColor; + + /* for layer */ + PIXEL_FORMAT_E enPixFormat; + RECT_S stDispRect; + SIZE_S stImageSize; + + CVI_U32 u32DisBufLen; + + /* for channel */ + SAMPLE_VO_MODE_E enVoMode; +} SAMPLE_VO_CONFIG_S; + +typedef enum _THREAD_CONTRL_E { + THREAD_CTRL_START, + THREAD_CTRL_PAUSE, + THREAD_CTRL_STOP, +} THREAD_CONTRL_E; + +typedef struct _VDEC_THREAD_PARAM_S { + CVI_S32 s32ChnId; + PAYLOAD_TYPE_E enType; + CVI_CHAR cFilePath[128]; + CVI_CHAR cFileName[128]; + CVI_S32 s32StreamMode; + CVI_S32 s32MilliSec; + CVI_S32 s32MinBufSize; + CVI_S32 s32IntervalTime; + THREAD_CONTRL_E eThreadCtrl; + CVI_U64 u64PtsInit; + CVI_U64 u64PtsIncrease; + CVI_BOOL bCircleSend; + CVI_BOOL bFileEnd; + CVI_BOOL bDumpYUV; + MD5_CTX tMD5Ctx; +} VDEC_THREAD_PARAM_S; + +typedef struct _SAMPLE_VDEC_BUF { + CVI_U32 u32PicBufSize; + CVI_U32 u32TmvBufSize; + CVI_BOOL bPicBufAlloc; + CVI_BOOL bTmvBufAlloc; +} SAMPLE_VDEC_BUF; + + +typedef struct _SAMPLE_VDEC_VIDEO_ATTR { + VIDEO_DEC_MODE_E enDecMode; + CVI_U32 u32RefFrameNum; + DATA_BITWIDTH_E enBitWidth; +} SAMPLE_VDEC_VIDEO_ATTR; + +typedef struct _SAMPLE_VDEC_PICTURE_ATTR { + PIXEL_FORMAT_E enPixelFormat; + CVI_U32 u32Alpha; +} SAMPLE_VDEC_PICTURE_ATTR; + + +typedef struct _SAMPLE_VDEC_ATTR { + PAYLOAD_TYPE_E enType; + VIDEO_MODE_E enMode; + CVI_U32 u32Width; + CVI_U32 u32Height; + CVI_U32 u32FrameBufCnt; + CVI_U32 u32DisplayFrameNum; + union { + SAMPLE_VDEC_VIDEO_ATTR stSapmleVdecVideo; /* structure with video ( h265/h264) */ + SAMPLE_VDEC_PICTURE_ATTR stSapmleVdecPicture; /* structure with picture (jpeg/mjpeg )*/ + }; +} SAMPLE_VDEC_ATTR; + +typedef struct _vdecChnCtx_ { + VDEC_THREAD_PARAM_S stVdecThreadParamSend; + VDEC_THREAD_PARAM_S stVdecThreadParamGet; + SAMPLE_VDEC_ATTR stSampleVdecAttr; + pthread_t vdecThreadSend; + pthread_t vdecThreadGet; + VDEC_CHN VdecChn; +} vdecChnCtx; +#endif + +extern SAMPLE_SNS_TYPE_E g_enSnsType[MAX_SENSOR_NUM]; + +#if 0 +typedef struct SAMPLE_VENC_GETSTREAM_PARA_S { + CVI_BOOL bThreadStart; + VENC_CHN VeChn[VENC_MAX_CHN_NUM]; + CVI_S32 s32Cnt; +} SAMPLE_VENC_GETSTREAM_PARA_S; + +typedef struct _chnInputCfg_ { + char codec[64]; + unsigned int width; + unsigned int height; + char input_path[MAX_STRING_LEN]; + char output_path[MAX_STRING_LEN]; + char outputFileName[MAX_STRING_LEN]; + CVI_S32 num_frames; + CVI_S32 bsMode; + CVI_S32 rcMode; + CVI_S32 iqp; + CVI_S32 pqp; + CVI_S32 gop; + CVI_S32 bitrate; + CVI_S32 firstFrmstartQp; + CVI_S32 minIqp; + CVI_S32 maxIqp; + CVI_S32 minQp; + CVI_S32 maxQp; + CVI_S32 framerate; + CVI_S32 quality; + CVI_S32 maxbitrate; + CVI_S32 statTime; + CVI_S32 bind_mode; + CVI_S32 pixel_format; + CVI_S32 posX; + CVI_S32 posY; + CVI_S32 inWidth; + CVI_S32 inHeight; + CVI_S32 srcFramerate; + CVI_U32 bitstreamBufSize; + CVI_S32 single_LumaBuf; + CVI_S32 single_core; + CVI_S32 vpssGrp; + CVI_S32 vpssChn; + CVI_S32 forceIdr; + CVI_S32 chgNum; + CVI_S32 chgBitrate; + CVI_S32 chgFramerate; + CVI_S32 tempLayer; + CVI_S32 testRoi; + CVI_S32 bgInterval; + CVI_S32 reserved[11]; +} chnInputCfg; + +typedef enum _CHN_STATE_ { + CHN_STAT_NONE = 0, + CHN_STAT_START, + CHN_STAT_STOP, +} CHN_STATE; + +typedef enum _BS_MODE_ { + BS_MODE_QUERY_STAT = 0, + BS_MODE_PROC, +} BS_MODE; + +typedef struct _vencChnCtx_ { + VENC_CHN VencChn; + PIC_SIZE_E enSize; + SIZE_S stSize; + VIDEO_FRAME_INFO_S *pstFrameInfo; + VIDEO_FRAME_S *pstVFrame; + CVI_U32 u32LumaSize; + CVI_U32 u32ChrmSize; + CVI_U32 u32FrameSize; + CVI_U32 num_frames; + CVI_S32 s32ChnNum; + CVI_U32 s32FbCnt; + CVI_U32 u32Profile; + PAYLOAD_TYPE_E enPayLoad; + VENC_GOP_MODE_E enGopMode; + VENC_GOP_ATTR_S stGopAttr; + SAMPLE_RC_E enRcMode; + FILE *fpSrc; + long file_size; + FILE *pFile; + chnInputCfg chnIc; + PIXEL_FORMAT_E pixel_format; + CHN_STATE chnStat; + CHN_STATE nextChnStat; +} vencChnCtx; + +typedef struct _SAMPLE_INI_CFG_S { + VI_PIPE_FRAME_SOURCE_E enSource; + CVI_U8 devNum; + SAMPLE_SNS_TYPE_E enSnsType; + WDR_MODE_E enWDRMode; + CVI_S32 s32BusId; + combo_dev_t MipiDev; + CVI_S16 as16LaneId[5]; + CVI_S8 as8PNSwap[5]; + CVI_U8 u8HwSync; + SAMPLE_SNS_TYPE_E enSns2Type; + WDR_MODE_E enSns2WDRMode; + CVI_S32 s32Sns2BusId; + combo_dev_t Sns2MipiDev; + CVI_S16 as16Sns2LaneId[5]; + CVI_S8 as8Sns2PNSwap[5]; + CVI_U8 u8Sns2HwSync; + CVI_U8 u8UseDualSns; +} SAMPLE_INI_CFG_S; + +CVI_S32 ae0_register_callback(int ViPipe); +CVI_S32 ae0_unregister_callback(int ViPipe); +CVI_S32 ae1_register_callback(int ViPipe); +CVI_S32 ae1_unregister_callback(int ViPipe); +CVI_S32 ae2_register_callback(int ViPipe); +CVI_S32 ae2_unregister_callback(int ViPipe); + +/******************************************************** + * function announce + ********************************************************/ + +CVI_VOID *SAMPLE_SYS_IOMmap(CVI_U64 u64PhyAddr, CVI_U32 u32Size); +CVI_S32 SAMPLE_SYS_Munmap(CVI_VOID *pVirAddr, CVI_U32 u32Size); +CVI_S32 SAMPLE_SYS_SetReg(CVI_U64 u64Addr, CVI_U32 u32Value); +CVI_S32 SAMPLE_SYS_GetReg(CVI_U64 u64Addr, CVI_U32 *pu32Value); + +CVI_S32 SAMPLE_COMM_SYS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize); +CVI_S32 SAMPLE_COMM_SYS_MemConfig(void); +CVI_VOID SAMPLE_COMM_SYS_Exit(void); +CVI_S32 SAMPLE_COMM_SYS_Init(VB_CONFIG_S *pstVbConfig); +CVI_S32 SAMPLE_COMM_SYS_InitWithVbSupplement(VB_CONFIG_S *pstVbConf, CVI_U32 u32SupplementConfig); + +#endif + +//CVI_S32 SAMPLE_COMM_VI_CreateIsp(SAMPLE_VI_CONFIG_S *pstViConfig); +//CVI_S32 SAMPLE_COMM_VI_Bind_VO(VI_PIPE ViPipe, VI_CHN ViChn, VO_LAYER VoLayer, VO_CHN VoChn); +//CVI_S32 SAMPLE_COMM_VI_UnBind_VO(VI_PIPE ViPipe, VI_CHN ViChn, VO_LAYER VoLayer, VO_CHN VoChn); +//CVI_S32 SAMPLE_COMM_VI_Bind_VPSS(VI_PIPE ViPipe, VI_CHN ViChn, VPSS_GRP VpssGrp); +//CVI_S32 SAMPLE_COMM_VI_UnBind_VPSS(VI_PIPE ViPipe, VI_CHN ViChn, VPSS_GRP VpssGrp); +//CVI_S32 SAMPLE_COMM_VI_Bind_VENC(VI_PIPE ViPipe, VI_CHN ViChn, VENC_CHN VencChn); +//CVI_S32 SAMPLE_COMM_VI_UnBind_VENC(VI_PIPE ViPipe, VI_CHN ViChn, VENC_CHN VencChn); +//CVI_S32 SAMPLE_COMM_VPSS_Bind_VO(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VO_LAYER VoLayer, VO_CHN VoChn); +//CVI_S32 SAMPLE_COMM_VPSS_UnBind_VO(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VO_LAYER VoLayer, VO_CHN VoChn); +//CVI_S32 SAMPLE_COMM_VPSS_Bind_VENC(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VENC_CHN VencChn); +//CVI_S32 SAMPLE_COMM_VPSS_UnBind_VENC(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VENC_CHN VencChn); +//CVI_S32 SAMPLE_COMM_VDEC_Bind_VPSS(VDEC_CHN VdecChn, VPSS_GRP VpssGrp); +//CVI_S32 SAMPLE_COMM_VDEC_UnBind_VPSS(VDEC_CHN VdecChn, VPSS_GRP VpssGrp); +//CVI_S32 SAMPLE_COMM_VPSS_Bind_VPSS(VPSS_GRP VpssGrpSrc, VPSS_CHN VpssChnSrc, VPSS_GRP VpssGrpDst); +//CVI_S32 SAMPLE_COMM_VPSS_UnBind_VPSS(VPSS_GRP VpssGrpSrc, VPSS_CHN VpssChnSrc, VPSS_GRP VpssGrpDst); +//CVI_S32 SAMPLE_COMM_ISP_Run(CVI_U8 IspDev); +//CVI_S32 SAMPLE_COMM_ISP_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr); +//CVI_VOID SAMPLE_COMM_ISP_Stop(CVI_U8 IspDev); +//CVI_VOID SAMPLE_COMM_All_ISP_Stop(void); +//CVI_S32 SAMPLE_COMM_ISP_Aelib_Callback(ISP_DEV IspDev); +//CVI_S32 SAMPLE_COMM_ISP_Aelib_UnCallback(ISP_DEV IspDev); +//CVI_S32 SAMPLE_COMM_ISP_Awblib_Callback(ISP_DEV IspDev); +CVI_S32 SAMPLE_COMM_ISP_Sensor_Regiter_callback(ISP_DEV IspDev, CVI_U32 u32SnsId, CVI_S32 s32BusId); +//CVI_S32 SAMPLE_COMM_ISP_Awblib_UnCallback(ISP_DEV IspDev); +//CVI_S32 SAMPLE_COMM_ISP_Sensor_UnRegiter_callback(ISP_DEV IspDev); +//CVI_S32 SAMPLE_COMM_ISP_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr); +CVI_S32 SAMPLE_COMM_ISP_SetSensorMode(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_ISP_SetSnsObj(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType); +CVI_S32 SAMPLE_COMM_ISP_SetSnsInit(CVI_U32 u32SnsId, CVI_U8 u8HwSync); +CVI_S32 SAMPLE_COMM_ISP_PatchSnsObj(CVI_U32 u32SnsId, SAMPLE_SENSOR_INFO_S *pstSnsInfo); +CVI_VOID *SAMPLE_COMM_ISP_GetSnsObj(CVI_U32 u32SnsId); + +#if 0 +CVI_S32 SAMPLE_AUDIO_DEBUG(void); +CVI_S32 SAMPLE_AUDIO_DEBUG_LEVEL(ST_AudioUnitTestCfg *testCfg); + +CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr); +void SAMPLE_COMM_VI_GetSensorInfo(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize); +CVI_S32 SAMPLE_COMM_VI_GetChnAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_CHN_ATTR_S *pstChnAttr); +CVI_S32 SAMPLE_COMM_VI_StartIsp(SAMPLE_VI_INFO_S *pstViInfo); +CVI_S32 SAMPLE_COMM_VI_StartDev(SAMPLE_VI_INFO_S *pstViInfo); +CVI_S32 SAMPLE_COMM_VI_StopDev(SAMPLE_VI_INFO_S *pstViInfo); +CVI_S32 SAMPLE_COMM_VI_StartViChn(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_VI_StopViChn(SAMPLE_VI_INFO_S *pstViInfo); +CVI_S32 SAMPLE_COMM_VI_StopViPipe(SAMPLE_VI_INFO_S *pstViInfo); +CVI_S32 SAMPLE_COMM_VI_DestroyVi(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_VI_OPEN(void); +CVI_S32 SAMPLE_COMM_VI_CLOSE(void); +CVI_S32 SAMPLE_COMM_VI_StartSensor(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_VI_StartMIPI(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_COMM_VI_ParseIni(SAMPLE_INI_CFG_S *pstIniCfg); + +CVI_S32 SAMPLE_COMM_VPSS_Start(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable, VPSS_GRP_ATTR_S *pstVpssGrpAttr, + VPSS_CHN_ATTR_S *pastVpssChnAttr); +CVI_S32 SAMPLE_COMM_VPSS_Init(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable, VPSS_GRP_ATTR_S *pstVpssGrpAttr, + VPSS_CHN_ATTR_S *pastVpssChnAttr); + +CVI_S32 SAMPLE_COMM_VPSS_Stop(VPSS_GRP VpssGrp, CVI_BOOL *pabChnEnable); +CVI_S32 SAMPLE_COMM_VPSS_SendFrame(VPSS_GRP VpssGrp, SIZE_S *stSize, PIXEL_FORMAT_E enPixelFormat, CVI_CHAR *filename); +CVI_S32 SAMPLE_COMM_VENC_SaveStream(PAYLOAD_TYPE_E enType, + FILE *pFd, VENC_STREAM_S *pstStream); +CVI_S32 SAMPLE_COMM_VENC_Stop(VENC_CHN VencChn); +CVI_S32 SAMPLE_COMM_VENC_GetGopAttr(VENC_GOP_MODE_E enGopMode, VENC_GOP_ATTR_S *pstGopAttr); +CVI_S32 SAMPLE_COMM_VENC_GetFilePostfix(PAYLOAD_TYPE_E enPayload, char *szFilePostfix); +CVI_S32 SAMPLE_COMM_VENC_CloseReEncode(VENC_CHN VencChn); +CVI_S32 SAMPLE_COMM_VENC_SetJpegParam(chnInputCfg *pIc, VENC_CHN VencChn); +CVI_S32 SAMPLE_COMM_VENC_SetRoiAttr(VENC_CHN VencChn, PAYLOAD_TYPE_E enType); +CVI_S32 SAMPLE_COMM_VENC_SetChnParam(chnInputCfg *pIc, VENC_CHN VencChn); +CVI_S32 SAMPLE_COMM_VENC_Start( + chnInputCfg * pIc, + VENC_CHN VencChn, + PAYLOAD_TYPE_E enType, + PIC_SIZE_E enSize, + SAMPLE_RC_E enRcMode, + CVI_U32 u32Profile, + CVI_BOOL bRcnRefShareBuf, + VENC_GOP_ATTR_S *pstGopAttr); +CVI_S32 SAMPLE_COMM_VDEC_InitVBPool(VDEC_CHN VdecChn, SAMPLE_VDEC_ATTR *pastSampleVdec); +CVI_VOID SAMPLE_COMM_VDEC_StartSendStream(VDEC_THREAD_PARAM_S *pstVdecSend, + pthread_t *pVdecThread); +CVI_S32 SAMPLE_COMM_VDEC_Start(vdecChnCtx *pvdchnCtx); +CVI_VOID SAMPLE_COMM_VDEC_CmdCtrl(VDEC_THREAD_PARAM_S *pstVdecSend, pthread_t *pVdecThread); +CVI_VOID SAMPLE_COMM_VDEC_StopSendStream(VDEC_THREAD_PARAM_S *pstVdecSend, pthread_t *pVdecThread); +CVI_S32 SAMPLE_COMM_VDEC_Stop(CVI_S32 s32ChnNum); +CVI_VOID SAMPLE_COMM_VDEC_ExitVBPool(void); +CVI_VOID SAMPLE_COMM_VDEC_StartGetPic(VDEC_THREAD_PARAM_S *pstVdecGet, + pthread_t *pVdecThread); +CVI_VOID SAMPLE_COMM_VDEC_StopGetPic(VDEC_THREAD_PARAM_S *pstVdecGet, pthread_t *pVdecThread); + +CVI_S32 SAMPLE_COMM_VO_GetWH(VO_INTF_SYNC_E enIntfSync, CVI_U32 *pu32W, CVI_U32 *pu32H, CVI_U32 *pu32Frm); +CVI_S32 SAMPLE_COMM_VO_StartDev(VO_DEV VoDev, VO_PUB_ATTR_S *pstPubAttr); +CVI_S32 SAMPLE_COMM_VO_StopDev(VO_DEV VoDev); +CVI_S32 SAMPLE_COMM_VO_StartLayer(VO_LAYER VoLayer, const VO_VIDEO_LAYER_ATTR_S *pstLayerAttr); +CVI_S32 SAMPLE_COMM_VO_StopLayer(VO_LAYER VoLayer); +CVI_S32 SAMPLE_COMM_VO_StartChn(VO_LAYER VoLayer, SAMPLE_VO_MODE_E enMode); +CVI_S32 SAMPLE_COMM_VO_StopChn(VO_LAYER VoLayer, SAMPLE_VO_MODE_E enMode); +CVI_S32 SAMPLE_COMM_VO_BindVpss(VO_LAYER VoLayer, VO_CHN VoChn, VPSS_GRP VpssGrp, VPSS_CHN VpssChn); +CVI_S32 SAMPLE_COMM_VO_UnBindVpss(VO_LAYER VoLayer, VO_CHN VoChn, VPSS_GRP VpssGrp, VPSS_CHN VpssChn); +CVI_S32 SAMPLE_COMM_VO_BindVi(VO_LAYER VoLayer, VO_CHN VoChn, VI_CHN ViChn); +CVI_S32 SAMPLE_COMM_VO_UnBindVi(VO_LAYER VoLayer, VO_CHN VoChn); +CVI_S32 SAMPLE_COMM_VO_GetDefConfig(SAMPLE_VO_CONFIG_S *pstVoConfig); +CVI_S32 SAMPLE_COMM_VO_StopVO(SAMPLE_VO_CONFIG_S *pstVoConfig); +CVI_S32 SAMPLE_COMM_VO_StartVO(SAMPLE_VO_CONFIG_S *pstVoConfig); +CVI_S32 SAMPLE_COMM_VO_StopPIP(SAMPLE_VO_CONFIG_S *pstVoConfig); +CVI_S32 SAMPLE_COMM_VO_StartPIP(SAMPLE_VO_CONFIG_S *pstVoConfig); +CVI_S32 SAMPLE_COMM_VO_GetDefLayerConfig(SAMPLE_COMM_VO_LAYER_CONFIG_S *pstVoLayerConfig); +CVI_S32 SAMPLE_COMM_VO_StartLayerChn(SAMPLE_COMM_VO_LAYER_CONFIG_S *pstVoLayerConfig); +CVI_S32 SAMPLE_COMM_VO_StopLayerChn(SAMPLE_COMM_VO_LAYER_CONFIG_S *pstVoLayerConfig); +CVI_VOID SAMPLE_COMM_VO_Exit(void); + +CVI_S32 SAMPLE_COMM_REGION_Create(CVI_S32 HandleNum, RGN_TYPE_E enType); +CVI_S32 SAMPLE_COMM_REGION_Destroy(CVI_S32 HandleNum, RGN_TYPE_E enType); +CVI_S32 SAMPLE_COMM_REGION_AttachToChn(CVI_S32 HandleNum, RGN_TYPE_E enType, MMF_CHN_S *pstChn); +CVI_S32 SAMPLE_COMM_REGION_DetachFrmChn(CVI_S32 HandleNum, RGN_TYPE_E enType, MMF_CHN_S *pstChn); +CVI_S32 SAMPLE_COMM_REGION_SetBitMap(RGN_HANDLE Handle, const char *filename); +CVI_S32 SAMPLE_COMM_REGION_GetUpCanvas(RGN_HANDLE Handle, const char *filename); +CVI_S32 SAMPLE_COMM_REGION_GetMinHandle(RGN_TYPE_E enType); + +CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAiAo(AUDIO_DEV AiDev, AI_CHN AiChn, AUDIO_DEV AoDev, AO_CHN AoChn); +CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAiAenc(AUDIO_DEV AiDev, AI_CHN AiChn, AENC_CHN AeChn); +CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAencAdec(AENC_CHN AeChn, ADEC_CHN AdChn, FILE *pAecFd); +CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdFileAdec(ADEC_CHN AdChn, FILE *pAdcFd); +CVI_S32 SAMPLE_COMM_AUDIO_CreatTrdAoVolCtrl(AUDIO_DEV AoDev); +CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdAi(AUDIO_DEV AiDev, AI_CHN AiChn); +CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdAencAdec(AENC_CHN AeChn); +CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdFileAdec(ADEC_CHN AdChn); +CVI_S32 SAMPLE_COMM_AUDIO_DestoryTrdAoVolCtrl(AUDIO_DEV AoDev); +CVI_S32 SAMPLE_COMM_AUDIO_DestoryAllTrd(void); +CVI_S32 SAMPLE_COMM_AUDIO_AoBindAdec(AUDIO_DEV AoDev, AO_CHN AoChn, ADEC_CHN AdChn); +CVI_S32 SAMPLE_COMM_AUDIO_AoUnbindAdec(AUDIO_DEV AoDev, AO_CHN AoChn, ADEC_CHN AdChn); +CVI_S32 SAMPLE_COMM_AUDIO_AoBindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AUDIO_DEV AoDev, AO_CHN AoChn); +CVI_S32 SAMPLE_COMM_AUDIO_AoUnbindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AUDIO_DEV AoDev, AO_CHN AoChn); +CVI_S32 SAMPLE_COMM_AUDIO_AencBindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AENC_CHN AeChn); +CVI_S32 SAMPLE_COMM_AUDIO_AencUnbindAi(AUDIO_DEV AiDev, AI_CHN AiChn, AENC_CHN AeChn); +CVI_S32 SAMPLE_COMM_AUDIO_CfgAcodec(AIO_ATTR_S *pstAioAttr); +CVI_S32 SAMPLE_COMM_AUDIO_StartAi(AUDIO_DEV AiDevId, CVI_S32 s32AiChnCnt, AIO_ATTR_S *pstAioAttr, + AUDIO_SAMPLE_RATE_E enOutSampleRate, CVI_BOOL bResampleEn, CVI_VOID *pstAiVqeAttr, + CVI_U32 u32AiVqeType); +CVI_S32 SAMPLE_COMM_AUDIO_StopAi(AUDIO_DEV AiDevId, CVI_S32 s32AiChnCnt, CVI_BOOL bResampleEn, CVI_BOOL bVqeEn); +CVI_S32 SAMPLE_COMM_AUDIO_StartAo(AUDIO_DEV AoDevId, CVI_S32 s32AoChnCnt, AIO_ATTR_S *pstAioAttr, + AUDIO_SAMPLE_RATE_E enInSampleRate, CVI_BOOL bResampleEn); +CVI_S32 SAMPLE_COMM_AUDIO_StopAo(AUDIO_DEV AoDevId, CVI_S32 s32AoChnCnt, CVI_BOOL bResampleEn); +CVI_S32 SAMPLE_COMM_AUDIO_StartAenc(CVI_S32 s32AencChnCnt, AIO_ATTR_S *pstAioAttr, PAYLOAD_TYPE_E enType); +CVI_S32 SAMPLE_COMM_AUDIO_StopAenc(CVI_S32 s32AencChnCnt); +CVI_S32 SAMPLE_COMM_AUDIO_StartAdec(ADEC_CHN AdChn, PAYLOAD_TYPE_E enType); +CVI_S32 SAMPLE_COMM_AUDIO_StopAdec(ADEC_CHN AdChn); + +CVI_S32 SAMPLE_PLAT_SYS_INIT(SIZE_S stSize); +CVI_S32 SAMPLE_PLAT_VI_INIT(SAMPLE_VI_CONFIG_S *pstViConfig); +CVI_S32 SAMPLE_PLAT_VPSS_INIT(VPSS_GRP VpssGrp, SIZE_S stSizeIn, SIZE_S stSizeOut); +CVI_S32 SAMPLE_PLAT_VO_INIT(void); + +/* SAMPLE_COMM_FRAME_SaveToFile: + * Save videoframe to the file + * + * [in]filename: char string of the file to save data. + * [IN]pstVideoFrame: the videoframe whose data will be saved to file. + * return: CVI_SUCCESS if no problem. + */ +CVI_S32 SAMPLE_COMM_FRAME_SaveToFile(const CVI_CHAR *filename, VIDEO_FRAME_INFO_S *pstVideoFrame); + +/* SAMPLE_COMM_PrepareFrame: + * Prepare videoframe per size & format. + * + * [in]stSize: the size of videoframe + * [in]enPixelFormat: pixel format of videoframe + * [Out]pstVideoFrame: the videoframe generated. + * return: CVI_SUCCESS if no problem. + */ +CVI_S32 SAMPLE_COMM_PrepareFrame(SIZE_S stSize, PIXEL_FORMAT_E enPixelFormat, VIDEO_FRAME_INFO_S *pstVideoFrame); + +/* SAMPLE_COMM_FRAME_CompareWithFile: + * Compare data with frame. + * + * [in]filename: file to read. + * [in]pstVideoFrame: the video-frame to store data from file. + * return: True if match; False if mismatch. + */ +CVI_BOOL SAMPLE_COMM_FRAME_CompareWithFile(const CVI_CHAR *filename, VIDEO_FRAME_INFO_S *pstVideoFrame); + +/* SAMPLE_COMM_FRAME_LoadFromFile: + * Load data to frame, whose data loaded from given filename. + * + * [in]filename: file to read. + * [in]pstVideoFrame: the video-frame to store data from file. + * [in]stSize: size of image. + * [in]enPixelFormat: format of image + * return: CVI_SUCCESS if no problem. + */ +CVI_S32 SAMPLE_COMM_FRAME_LoadFromFile(const CVI_CHAR *filename, VIDEO_FRAME_INFO_S *pstVideoFrame, + SIZE_S *stSize, PIXEL_FORMAT_E enPixelFormat); +#endif +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif /* End of #ifdef __cplusplus */ + +#endif diff --git a/freertos/cvitek/task/isp/src/cv1835/sample_common_isp.c b/freertos/cvitek/task/isp/src/cv1835/sample_common_isp.c new file mode 100644 index 000000000..4dc214e7b --- /dev/null +++ b/freertos/cvitek/task/isp/src/cv1835/sample_common_isp.c @@ -0,0 +1,676 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: sample/common/sample_common_isp.c + * Description: + * Common ctrl code for isp. + */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +//#include <stdint.h> +#include <string.h> +//#include <stdio.h> +#include <stdlib.h> +#include <errno.h> +//#include <unistd.h> +//#include <sys/prctl.h> +//#include <sys/time.h> + +#include "sample_comm.h" +#include "cvi_awb_comm.h" +#include "cvi_sns_ctrl.h" +#include "cvi_ae.h" +#include "cvi_isp.h" + +#ifdef SUPPORT_ISP_PQTOOL +#include <dlfcn.h> +static CVI_BOOL g_ISPDaemon = CVI_FALSE; +static void *g_ISPDHandle; +#define ISPD_LIBNAME "libcvi_ispd.so" +#define ISPD_CONNECT_PORT 5566 +#endif // + +//static pthread_t g_IspPid[VI_MAX_DEV_NUM]; +static CVI_U32 g_au32IspSnsId[ISP_MAX_DEV_NUM] = { 0, 1 }; + +SAMPLE_SNS_TYPE_E g_enSnsType[MAX_SENSOR_NUM] = { + SONY_IMX327_MIPI_2M_30FPS_12BIT, + SONY_IMX290_MIPI_1M_30FPS_12BIT, +}; + +static ISP_INIT_ATTR_S gstInitAttr[ISP_MAX_DEV_NUM]; +ISP_PUB_ATTR_S ISP_PUB_ATTR_IMX327_2M_30FPS = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0}; + +ISP_PUB_ATTR_S ISP_PUB_ATTR_IMX335_5M_30FPS = { { 0, 0, 2592, 1944 }, { 2592, 1944 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_IMX335_4M_30FPS = { { 0, 0, 2560, 1440 }, { 2560, 1440 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_IMX334_8M_30FPS = { { 0, 0, 3840, 2160 }, { 3840, 2160 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0}; + +ISP_PUB_ATTR_S ISP_PUB_ATTR_IMX307_2M_30FPS = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0}; + +ISP_PUB_ATTR_S ISP_PUB_ATTR_F35_2M_30FPS = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, 30, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_H65_1M_30FPS = { { 0, 0, 1280, 720 }, { 1280, 720 }, 30, BAYER_BGGR, WDR_MODE_NONE, 0}; + +ISP_PUB_ATTR_S ISP_PUB_ATTR_OS08A20_8M_30FPS = { { 0, 0, 3840, 2160 }, { 3840, 2160 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; + +ISP_PUB_ATTR_S ISP_PUB_ATTR_OS08A20_5M_30FPS = { { 0, 0, 2592, 1944 }, { 2592, 1944 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; + +ISP_PUB_ATTR_S ISP_PUB_ATTR_PICO_640 = { { 0, 0, 632, 479 }, { 632, 479 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; + + +ISP_PUB_ATTR_S ISP_PUB_ATTR_PICO_384 = { { 0, 0, 384, 288 }, { 384, 288 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_VIVO_MCS369Q = { { 0, 0, 2560, 1440 }, { 2560, 1440 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_VIVO_MCS369 = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_VIVO_MM308M2 = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, + 25, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_NEXTCHIP_N5 = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, + 25, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_SC3335_3M_30FPS = { { 0, 0, 2304, 1296 }, { 2304, 1296 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_PIXELPLUS_PR2020 = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, + 25, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_SC8238_8M_30FPS = { { 0, 0, 3840, 2160 }, { 3840, 2160 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; +ISP_PUB_ATTR_S ISP_PUB_ATTR_SC4210_4M_30FPS = { { 0, 0, 2560, 1440 }, { 2560, 1440 }, + 30, BAYER_BGGR, WDR_MODE_NONE, 0}; + +#if 0 +static CVI_VOID *SAMPLE_COMM_ISP_Thread(void *arg) +{ + CVI_S32 s32Ret = 0; + CVI_U8 IspDev = *(CVI_U8 *)arg; + char szThreadName[20]; + + free(arg); + snprintf(szThreadName, sizeof(szThreadName), "ISP%d_RUN", IspDev); + prctl(PR_SET_NAME, szThreadName, 0, 0, 0); + + SAMPLE_PRT("ISP Dev %d running!\n", IspDev); + s32Ret = CVI_ISP_Run(IspDev); + if (s32Ret != 0) + SAMPLE_PRT("CVI_ISP_Run failed with %#x!\n", s32Ret); + + return NULL; +} + +CVI_S32 SAMPLE_COMM_ISP_Run(CVI_U8 IspDev) +{ + CVI_S32 s32Ret = 0; + CVI_U8 *arg = malloc(sizeof(*arg)); + struct sched_param param; + pthread_attr_t attr; + + if (arg == NULL) { + CVI_TRACE_LOG(CVI_DBG_ERR, "malloc failed\n"); + goto out; + } + + *arg = IspDev; + param.sched_priority = 80; + + pthread_attr_init(&attr); + pthread_attr_setschedpolicy(&attr, SCHED_RR); + pthread_attr_setschedparam(&attr, ¶m); + pthread_attr_setinheritsched(&attr, PTHREAD_EXPLICIT_SCHED); + s32Ret = pthread_create(&g_IspPid[IspDev], &attr, SAMPLE_COMM_ISP_Thread, arg); + if (s32Ret != 0) { + CVI_TRACE_LOG(CVI_DBG_ERR, "create isp running thread failed!, error: %d, %s\r\n", + s32Ret, strerror(s32Ret)); + goto out; + } + +#ifdef SUPPORT_ISP_PQTOOL + if (!g_ISPDaemon) { + g_ISPDHandle = dlopen(ISPD_LIBNAME, RTLD_NOW); + + if (g_ISPDHandle) { + char *error = NULL; + void (*daemon_init)(unsigned int port); + + printf("Load dynamic library %s success\n", ISPD_LIBNAME); + + dlerror(); + daemon_init = dlsym(g_ISPDHandle, "isp_daemon_init"); + error = dlerror(); + if (error == NULL) { + (*daemon_init)(ISPD_CONNECT_PORT); + g_ISPDaemon = CVI_TRUE; + } else { + printf("Run daemon initial fail\n"); + dlclose(g_ISPDHandle); + } + } else { + printf("Load dynamic library %s fail\n", ISPD_LIBNAME); + } + } +#endif // + +out: + + return s32Ret; +} +#endif +CVI_S32 SAMPLE_COMM_ISP_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + + switch (enSnsType) { + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX327_2M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX327_2M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX307_2M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX307_2M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX334_8M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX334_8M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX335_5M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX335_5M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX335_4M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_IMX335_4M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + case SOI_F35_MIPI_2M_30FPS_10BIT: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_F35_2M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + + case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_F35_2M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + + case SOI_H65_MIPI_1M_30FPS_10BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_H65_1M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + + case OV_OS08A20_MIPI_8M_30FPS_10BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_OS08A20_8M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_OS08A20_8M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + case OV_OS08A20_MIPI_5M_30FPS_10BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_OS08A20_5M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_OS08A20_5M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + case PICO640_THERMAL_479P: + memcpy(pstPubAttr, &ISP_PUB_ATTR_PICO_640, sizeof(ISP_PUB_ATTR_S)); + break; + case PICO384_THERMAL_384X288: + memcpy(pstPubAttr, &ISP_PUB_ATTR_PICO_384, sizeof(ISP_PUB_ATTR_S)); + break; + case VIVO_MCS369Q_4M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_VIVO_MCS369Q, sizeof(ISP_PUB_ATTR_S)); + break; + case VIVO_MCS369_2M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_VIVO_MCS369, sizeof(ISP_PUB_ATTR_S)); + break; + case VIVO_MM308M2_2M_25FPS_8BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_VIVO_MM308M2, sizeof(ISP_PUB_ATTR_S)); + break; + case NEXTCHIP_N5_2M_25FPS_8BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_NEXTCHIP_N5, sizeof(ISP_PUB_ATTR_S)); + break; + case SMS_SC3335_MIPI_3M_30FPS_10BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_SC3335_3M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_PIXELPLUS_PR2020, sizeof(ISP_PUB_ATTR_S)); + break; + case SMS_SC8238_MIPI_8M_30FPS_10BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_SC8238_8M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_SC8238_8M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + pstPubAttr->f32FrameRate = 15; + break; + case SMS_SC4210_MIPI_4M_30FPS_12BIT: + memcpy(pstPubAttr, &ISP_PUB_ATTR_SC4210_4M_30FPS, sizeof(ISP_PUB_ATTR_S)); + break; + case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1: + memcpy(pstPubAttr, &ISP_PUB_ATTR_SC4210_4M_30FPS, sizeof(ISP_PUB_ATTR_S)); + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + break; + default: + s32Ret = CVI_FAILURE; + break; + } + return s32Ret; +} +#if 0 +/****************************************************************************** + * funciton : stop ISP, and stop isp thread + ******************************************************************************/ +CVI_VOID SAMPLE_COMM_ISP_Stop(CVI_U8 IspDev) +{ +#ifdef SUPPORT_ISP_PQTOOL + if (g_ISPDaemon) { + char *error = NULL; + void (*daemon_uninit)(void); + + daemon_uninit = dlsym(g_ISPDHandle, "isp_daemon_uninit"); + error = dlerror(); + if (error == NULL) + (*daemon_uninit)(); + + dlclose(g_ISPDHandle); + g_ISPDHandle = NULL; + g_ISPDaemon = CVI_FALSE; + } +#endif // + + if (g_IspPid[IspDev]) { + CVI_ISP_Exit(IspDev); + pthread_join(g_IspPid[IspDev], NULL); + g_IspPid[IspDev] = 0; + } + + SAMPLE_COMM_ISP_Sensor_UnRegiter_callback(IspDev); + SAMPLE_COMM_ISP_Aelib_UnCallback(IspDev); + SAMPLE_COMM_ISP_Awblib_UnCallback(IspDev); +} + +CVI_VOID SAMPLE_COMM_All_ISP_Stop(CVI_VOID) +{ + for (ISP_DEV IspDev = 0; IspDev < VI_MAX_DEV_NUM; IspDev++) + SAMPLE_COMM_ISP_Stop(IspDev); +} + +CVI_S32 SAMPLE_COMM_ISP_Awblib_Callback(ISP_DEV IspDev) +{ + ALG_LIB_S stAwbLib; + + stAwbLib.s32Id = IspDev; + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + CVI_AWB_Register(IspDev, &stAwbLib); + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Awblib_UnCallback(ISP_DEV IspDev) +{ + CVI_S32 s32Ret = 0; + ALG_LIB_S stAwbLib; + + stAwbLib.s32Id = IspDev; + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + s32Ret = CVI_AWB_UnRegister(IspDev, &stAwbLib); + if (s32Ret) { + CVI_TRACE_LOG(CVI_DBG_ERR, "AWB Algo unRegister failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Aelib_Callback(ISP_DEV IspDev) +{ + CVI_S32 s32Ret = 0; + ALG_LIB_S stAeLib; + + stAeLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + s32Ret = CVI_AE_Register(IspDev, &stAeLib); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "AE Algo register failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Aelib_UnCallback(ISP_DEV IspDev) +{ + CVI_S32 s32Ret = 0; + ALG_LIB_S stAeLib; + + stAeLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + s32Ret = CVI_AE_UnRegister(IspDev, &stAeLib); + if (s32Ret) { + CVI_TRACE_LOG(CVI_DBG_ERR, "AE Algo unRegister failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} +#endif + +CVI_S32 SAMPLE_COMM_ISP_SetSnsObj(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType) +{ + if (u32SnsId >= ARRAY_SIZE(g_enSnsType)) + return CVI_FAILURE; + + g_enSnsType[u32SnsId] = enSnsType; + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_SetSnsInit(CVI_U32 u32SnsId, CVI_U8 u8HwSync) +{ + if (u32SnsId >= ARRAY_SIZE(g_enSnsType)) + return CVI_FAILURE; + + gstInitAttr[u32SnsId].u16UseHwSync = u8HwSync; + + return CVI_SUCCESS; +} + +CVI_VOID *SAMPLE_COMM_ISP_GetSnsObj(CVI_U32 u32SnsId) +{ + SAMPLE_SNS_TYPE_E enSnsType; + + enSnsType = g_enSnsType[u32SnsId]; + switch (enSnsType) { + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx327_Obj; +#if 0 + case SONY_IMX290_MIPI_1M_30FPS_12BIT: + case SONY_IMX290_MIPI_2M_60FPS_12BIT: + return &stSnsImx290_2l_Obj; + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx327_2l_Obj; + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx327_Slave_Obj; + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx307_Obj; + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx307_2l_Obj; + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx307_Slave_Obj; + case SOI_F35_MIPI_2M_30FPS_10BIT: + case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1: + return &stSnsF35_Obj; + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + return &stSnsF35_Slave_Obj; + case SOI_H65_MIPI_1M_30FPS_10BIT: + return &stSnsH65_Obj; + case OV_OS08A20_MIPI_8M_30FPS_10BIT: + case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1: + case OV_OS08A20_MIPI_5M_30FPS_10BIT: + case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1: + return &stSnsOs08a20_Obj; + case PICO640_THERMAL_479P: + return &stSnsPICO640_Obj; + case PICO384_THERMAL_384X288: + return &stSnsPICO384_Obj; + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx327_Sublvds_Obj; + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + return &stSnsImx307_Sublvds_Obj; + case VIVO_MCS369Q_4M_30FPS_12BIT: + return &stSnsMCS369Q_Obj; + case VIVO_MCS369_2M_30FPS_12BIT: + return &stSnsMCS369_Obj; + case VIVO_MM308M2_2M_25FPS_8BIT: + return &stSnsMM308M2_Obj; + case NEXTCHIP_N5_2M_25FPS_8BIT: + return &stSnsN5_Obj; + case SMS_SC3335_MIPI_3M_30FPS_10BIT: + return &stSnsSC3335_Obj; + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + return &stSnsImx334_Obj; + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + return &stSnsImx335_Obj; + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + return &stSnsPR2020_Obj; + case SMS_SC8238_MIPI_8M_30FPS_10BIT: + case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1: + return &stSnsSC8238_Obj; + case SMS_SC4210_MIPI_4M_30FPS_12BIT: + case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1: + return &stSnsSC4210_Obj; +#endif + default: + return CVI_NULL; + } +} + +CVI_S32 SAMPLE_COMM_ISP_PatchSnsObj(CVI_U32 u32SnsId, SAMPLE_SENSOR_INFO_S *pstSnsInfo) +{ + ISP_SNS_OBJ_S *pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + RX_INIT_ATTR_S stRxInitAttr; + CVI_U32 i; + + if (pstSnsObj == CVI_NULL) { + return CVI_FAILURE; + } + + stRxInitAttr.MipiDev = pstSnsInfo->MipiDev; + for (i = 0; i < sizeof(stRxInitAttr.as16LaneId)/sizeof(CVI_S16); i++) { + stRxInitAttr.as16LaneId[i] = pstSnsInfo->as16LaneId[i]; + } + for (i = 0; i < sizeof(stRxInitAttr.as8PNSwap)/sizeof(CVI_S8); i++) { + stRxInitAttr.as8PNSwap[i] = pstSnsInfo->as8PNSwap[i]; + } + + return (pstSnsObj->pfnPatchRxAttr) ? pstSnsObj->pfnPatchRxAttr(&stRxInitAttr) : CVI_SUCCESS; +} + +#if 0 +CVI_S32 SAMPLE_COMM_ISP_GetRxAttr(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret, i; + ISP_SENSOR_EXP_FUNC_S stSnsrSensorFunc; + SNS_COMBO_DEV_ATTR_S stDevAttr; + const ISP_SNS_OBJ_S *pstSnsObj; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[i]; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + pstSnsObj.pfnGetRxAttr(ViPipe, &stDevAttr); + } +} +#endif + +CVI_S32 SAMPLE_COMM_ISP_SetSensorMode(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = CVI_SUCCESS, i; + CVI_U32 u32SnsId; + VI_PIPE ViPipe; + WDR_MODE_E wdrMode; + ISP_PUB_ATTR_S stPubAttr; + ISP_SENSOR_EXP_FUNC_S stSnsrSensorFunc; + ISP_CMOS_SENSOR_IMAGE_MODE_S stSnsrMode; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + const ISP_SNS_OBJ_S *pstSnsObj; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + wdrMode = pstViInfo->stDevInfo.enWDRMode; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + if (SAMPLE_COMM_ISP_GetIspAttrBySns(pstViInfo->stSnsInfo.enSnsType, &stPubAttr) != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "Can't get sns attr!\n"); + return s32Ret; + } + stSnsrMode.u16Width = stPubAttr.stSnsSize.u32Width; + stSnsrMode.u16Height = stPubAttr.stSnsSize.u32Height; + stSnsrMode.f32Fps = stPubAttr.f32FrameRate; + printf("stSnsrMode.u16Width %d stSnsrMode.u16Height %d %f wdrMode %d pstSnsObj %p\n", + stSnsrMode.u16Width, stSnsrMode.u16Height, stSnsrMode.f32Fps, wdrMode, pstSnsObj); + pstSnsObj->pfnExpSensorCb(&stSnsrSensorFunc); + s32Ret = stSnsrSensorFunc.pfn_cmos_set_image_mode(ViPipe, &stSnsrMode); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor set image mode failed!\n"); + return s32Ret; + } + + s32Ret = stSnsrSensorFunc.pfn_cmos_set_wdr_mode(ViPipe, wdrMode); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor set wdr mode failed!\n"); + return s32Ret; + } + } + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_ISP_Sensor_Regiter_callback(ISP_DEV IspDev, CVI_U32 u32SnsId, CVI_S32 s32BusId) +{ + CVI_S32 s32Ret = -1; + SAMPLE_SNS_TYPE_E enSnsType = g_enSnsType[u32SnsId]; + ALG_LIB_S stAeLib; + ALG_LIB_S stAwbLib; + const ISP_SNS_OBJ_S *pstSnsObj; + ISP_INIT_ATTR_S *pstInitAttr = &gstInitAttr[u32SnsId]; + ISP_SNS_COMMBUS_U unSnsrBusInfo = { + .s8I2cDev = 3, + }; + + #define SNSBUS_VLD(x) (x >= 0) + + if (u32SnsId > MAX_SENSOR_NUM) { + CVI_TRACE_LOG(CVI_DBG_ERR, "invalid sensor id: %d\n", u32SnsId); + return CVI_FAILURE; + } + + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + if (pstSnsObj == CVI_NULL) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d not exist!\n", u32SnsId); + return CVI_FAILURE; + } + + pstInitAttr->enGainMode = SNS_GAIN_MODE_SHARE; + if ((enSnsType == SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1) || + (enSnsType == SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1) || + (enSnsType == OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1) || + (enSnsType == OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1)) { + pstInitAttr->enL2SMode = SNS_L2S_MODE_FIX; + } + s32Ret = pstSnsObj->pfnSetInit(u32SnsId, pstInitAttr); + if (s32Ret < 0) { + CVI_TRACE_LOG(CVI_DBG_ERR, "pfnSetInit error id: %d s32Ret %d\n", IspDev, s32Ret); + return CVI_FAILURE; + } + /* set i2c bus info */ + if (SNSBUS_VLD(s32BusId)) + unSnsrBusInfo.s8I2cDev = (CVI_S8)s32BusId; + s32Ret = pstSnsObj->pfnSetBusInfo(u32SnsId, unSnsrBusInfo); + if (s32Ret < 0) { + CVI_TRACE_LOG(CVI_DBG_ERR, "pfnSetBusInfo error id: %d s32Ret %d\n", IspDev, s32Ret); + return CVI_FAILURE; + } + + stAeLib.s32Id = IspDev; + stAwbLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + // strncpy(stAfLib.acLibName, CVI_AF_LIB_NAME, sizeof(CVI_AF_LIB_NAME)); + + if (pstSnsObj->pfnRegisterCallback != CVI_NULL) { + s32Ret = pstSnsObj->pfnRegisterCallback(IspDev, &stAeLib, &stAwbLib); + + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor_register_callback failed with %#x!\n", s32Ret); + return s32Ret; + } + } else { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor_register_callback failed with CVI_NULL!\n"); + return CVI_FAILURE; + } + + g_au32IspSnsId[IspDev] = u32SnsId; + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Sensor_UnRegiter_callback(ISP_DEV IspDev) +{ + ALG_LIB_S stAeLib; + ALG_LIB_S stAwbLib; + CVI_U32 u32SnsId; + const ISP_SNS_OBJ_S *pstSnsObj; + CVI_S32 s32Ret = -1; + + u32SnsId = g_au32IspSnsId[IspDev]; + + if (u32SnsId > MAX_SENSOR_NUM) { + SAMPLE_PRT("%s: invalid sensor id: %d\n", __func__, u32SnsId); + return CVI_FAILURE; + } + + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + + if (pstSnsObj == CVI_NULL) { + return CVI_FAILURE; + } + + stAeLib.s32Id = IspDev; + stAwbLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + // strncpy(stAfLib.acLibName, CVI_AF_LIB_NAME, sizeof(CVI_AF_LIB_NAME)); + + if (pstSnsObj->pfnUnRegisterCallback != CVI_NULL) { + s32Ret = pstSnsObj->pfnUnRegisterCallback(IspDev, &stAeLib, &stAwbLib); + + if (s32Ret != CVI_SUCCESS) { + SAMPLE_PRT("sensor_unregister_callback failed with %#x!\n", s32Ret); + return s32Ret; + } + } else { + SAMPLE_PRT("sensor_unregister_callback failed with CVI_NULL!\n"); + } + + return CVI_SUCCESS; +} diff --git a/freertos/cvitek/task/isp/src/cv1835/sample_common_vi.c b/freertos/cvitek/task/isp/src/cv1835/sample_common_vi.c new file mode 100644 index 000000000..8e90f02aa --- /dev/null +++ b/freertos/cvitek/task/isp/src/cv1835/sample_common_vi.c @@ -0,0 +1,1942 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: sample/common/sample_common_vi.c + * Description: + * Common sample code for video input. + */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +//#include <stdio.h> +#include <stdlib.h> +#include <string.h> +//#include <unistd.h> +#include "cvi_mipi.h" +#include "cvi_sns_ctrl.h" +#include "cvi_common.h" +//#include "cvi_awb_comm.h" +//#include "cvi_comm_isp.h" +#include "sample_comm.h" +#include "cvi_isp.h" +#include "mmio.h" + +#if 0 +VI_DEV_ATTR_S DEV_ATTR_NEXTCHIP_N5_2M_BASE = { + VI_MODE_BT656, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE,//VI_SCAN_INTERLACED, + {-1, -1, -1, -1}, + VI_DATA_SEQ_UYVY, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_YUV, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_PIXELPLUS_PR2020_2M_BASE = { + VI_MODE_BT656, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE,//VI_SCAN_INTERLACED, + {-1, -1, -1, -1}, + VI_DATA_SEQ_UYVY, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_YUV, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_OS08A20_8M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 3840, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 2160, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {3840, 2160}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_OS08A20_5M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 2592, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1944, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {2592, 1944}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_IMX327_2M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_IMX307_2M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_IMX334_8M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 3840, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 2160, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {3840, 2160}, + { + WDR_MODE_NONE, + 2160 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_IMX335_5M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 2592, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1944, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {2592, 1944}, + { + WDR_MODE_NONE, + 1944 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; +VI_DEV_ATTR_S DEV_ATTR_IMX335_4M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 2560, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1440, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {2560, 1440}, + { + WDR_MODE_NONE, + 1440 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_F35_2M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_H65_1M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1280, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 720, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1280, 720}, + { + WDR_MODE_NONE, + 720 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + + +VI_DEV_ATTR_S DEV_ATTR_IMX297_1M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1280, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 720, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1280, 720}, + { + WDR_MODE_2To1_LINE, + 720 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_IMX297_2M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1280, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 720, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_VIVO_MCS369Q_4M_BASE = { + VI_MODE_BT1120_STANDARD, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 2560, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1440, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_YUV, + {2560, 1440}, + { + WDR_MODE_NONE, + 1440 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_VIVO_MCS369_2M_BASE = { + VI_MODE_BT1120_STANDARD, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_YUV, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_VIVO_MM308M2_2M_BASE = { + VI_MODE_BT1120_STANDARD, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_YUV, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_PICO_640_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 632, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 479, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {632, 479}, + { + WDR_MODE_2To1_LINE, + 479 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_PICO_384_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 384, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 288, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {384, 288}, + { + WDR_MODE_2To1_LINE, + 288 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_IMX327_SUBLVDS_2M_BASE = { + VI_MODE_LVDS, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_IMX307_SUBLVDS_2M_BASE = { + VI_MODE_LVDS, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_RG, +}; + +VI_DEV_ATTR_S DEV_ATTR_SC3335_3M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 2304, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1296, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {2304, 1296}, + { + WDR_MODE_NONE, + 1296 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_SC8238_8M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 3840, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 2160, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {3840, 2160}, + { + WDR_MODE_NONE, + 2160 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_DEV_ATTR_S DEV_ATTR_SC4210_4M_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 2560, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1440, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {2560, 1440}, + { + WDR_MODE_NONE, + 1440 + }, + .enBayerFormat = BAYER_FORMAT_BG, +}; + +VI_PIPE_ATTR_S PIPE_ATTR_1280x720_RAW12_420_3DNR_RFR = { + VI_PIPE_BYPASS_NONE, CVI_FALSE, CVI_FALSE, + 1280, 720, + PIXEL_FORMAT_RGB_BAYER_12BPP, + COMPRESS_MODE_NONE, + DATA_BITWIDTH_12, + CVI_FALSE, + CVI_FALSE, + { -1, -1} +}; + +VI_PIPE_ATTR_S PIPE_ATTR_1920x1080_RAW12_420_3DNR_RFR = { + VI_PIPE_BYPASS_NONE, CVI_FALSE, CVI_FALSE, + 1920, 1080, + PIXEL_FORMAT_RGB_BAYER_12BPP, + COMPRESS_MODE_NONE, + DATA_BITWIDTH_12, + CVI_FALSE, + CVI_FALSE, + { -1, -1} +}; + +VI_PIPE_ATTR_S PIPE_ATTR_3840x2160_RAW10_420_3DNR_RFR = { + VI_PIPE_BYPASS_NONE, CVI_FALSE, CVI_FALSE, + 3840, 2160, + PIXEL_FORMAT_RGB_BAYER_12BPP, + COMPRESS_MODE_NONE, + DATA_BITWIDTH_10, + CVI_FALSE, + CVI_FALSE, + { -1, -1} +}; + +VI_PIPE_ATTR_S PIPE_ATTR_2592x1944_RAW10_420_3DNR_RFR = { + VI_PIPE_BYPASS_NONE, CVI_FALSE, CVI_FALSE, + 2592, 1944, + PIXEL_FORMAT_RGB_BAYER_12BPP, + COMPRESS_MODE_NONE, + DATA_BITWIDTH_10, + CVI_FALSE, + CVI_FALSE, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_384x288_422_SDR8_LINEAR = { + {384, 288}, + PIXEL_FORMAT_YUV_PLANAR_422, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_632x479_422_SDR8_LINEAR = { + {632, 479}, + PIXEL_FORMAT_YUV_PLANAR_422, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_1280x720_420_SDR8_LINEAR = { + {1280, 720}, + PIXEL_FORMAT_YUV_PLANAR_420, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 0, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_1920x1080_420_SDR8_LINEAR = { + {1920, 1080}, + PIXEL_FORMAT_YUV_PLANAR_420, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_1920x1080_422_SDR8_LINEAR = { + {1920, 1080}, + PIXEL_FORMAT_YUV_PLANAR_422, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_2560x1440_422_SDR8_LINEAR = { + {2560, 1440}, + PIXEL_FORMAT_YUV_PLANAR_422, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_2560x1440_420_SDR8_LINEAR = { + {2560, 1440}, + PIXEL_FORMAT_YUV_PLANAR_420, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_2592x1944_420_SDR8_LINEAR = { + {2592, 1944}, + PIXEL_FORMAT_YUV_PLANAR_420, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_3840x2160_420_SDR8_LINEAR = { + {3840, 2160}, + PIXEL_FORMAT_YUV_PLANAR_420, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +VI_CHN_ATTR_S CHN_ATTR_2304x1296_420_SDR8_LINEAR = { + {2304, 1296}, + PIXEL_FORMAT_YUV_PLANAR_420, + DYNAMIC_RANGE_SDR8, + VIDEO_FORMAT_LINEAR, + COMPRESS_MODE_NONE, + 0, 0, + 1, + { -1, -1} +}; + +/* + * Brief: get picture size(w*h), according enPicSize + */ +CVI_S32 SAMPLE_COMM_SYS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize) +{ + switch (enPicSize) { + case PIC_CIF: /* 352 * 288 */ + pstSize->u32Width = 352; + pstSize->u32Height = 288; + break; + + case PIC_D1_PAL: /* 720 * 576 */ + pstSize->u32Width = 720; + pstSize->u32Height = 576; + break; + + case PIC_D1_NTSC: /* 720 * 480 */ + pstSize->u32Width = 720; + pstSize->u32Height = 480; + break; + + case PIC_720P: /* 1280 * 720 */ + pstSize->u32Width = 1280; + pstSize->u32Height = 720; + break; + + case PIC_1080P: /* 1920 * 1080 */ + pstSize->u32Width = 1920; + pstSize->u32Height = 1080; + break; + + case PIC_1088: /* 1920 * 1088*/ + pstSize->u32Width = 1920; + pstSize->u32Height = 1088; + break; + + case PIC_1440P: /* 2560 * 1440 */ + pstSize->u32Width = 2560; + pstSize->u32Height = 1440; + break; + + case PIC_2304x1296: + pstSize->u32Width = 2304; + pstSize->u32Height = 1296; + break; + + case PIC_2592x1520: + pstSize->u32Width = 2592; + pstSize->u32Height = 1520; + break; + + case PIC_2592x1944: + pstSize->u32Width = 2592; + pstSize->u32Height = 1944; + break; + + case PIC_2592x1536: + pstSize->u32Width = 2592; + pstSize->u32Height = 1536; + break; + + case PIC_2716x1524: + pstSize->u32Width = 2716; + pstSize->u32Height = 1524; + break; + + case PIC_3840x2160: + pstSize->u32Width = 3840; + pstSize->u32Height = 2160; + break; + + case PIC_3000x3000: + pstSize->u32Width = 3000; + pstSize->u32Height = 3000; + break; + + case PIC_4000x3000: + pstSize->u32Width = 4000; + pstSize->u32Height = 3000; + break; + + case PIC_4096x2160: + pstSize->u32Width = 4096; + pstSize->u32Height = 2160; + break; + + case PIC_3840x8640: + pstSize->u32Width = 3840; + pstSize->u32Height = 8640; + break; + + case PIC_640x480: + pstSize->u32Width = 640; + pstSize->u32Height = 480; + break; + case PIC_479P: /* 632 * 479 */ + pstSize->u32Width = 632; + pstSize->u32Height = 479; + break; + case PIC_288P: /* 384 * 288 */ + pstSize->u32Width = 384; + pstSize->u32Height = 288; + break; + default: + return CVI_FAILURE; + } + + return CVI_SUCCESS; +} +#endif + +void SAMPLE_COMM_VI_GetSensorInfo(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 i; + + for (i = 0; i < VI_MAX_DEV_NUM; i++) { + pstViConfig->astViInfo[i].stSnsInfo.s32SnsId = i; + pstViConfig->astViInfo[i].stSnsInfo.s32BusId = i; + pstViConfig->astViInfo[i].stSnsInfo.MipiDev = i; + //memset(&pstViConfig->astViInfo[i].stSnapInfo, 0, sizeof(SAMPLE_SNAP_INFO_S)); + pstViConfig->astViInfo[i].stPipeInfo.bMultiPipe = CVI_FALSE; + pstViConfig->astViInfo[i].stPipeInfo.bVcNumCfged = CVI_FALSE; + } + + pstViConfig->astViInfo[0].stSnsInfo.enSnsType = SONY_IMX290_MIPI_2M_60FPS_12BIT; + pstViConfig->astViInfo[1].stSnsInfo.enSnsType = SONY_IMX290_MIPI_2M_60FPS_12BIT; +} + +#if 0 +CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr) +{ + switch (enSnsType) { + default: + case SONY_IMX290_MIPI_1M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_IMX297_1M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_IMX327_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_IMX327_2M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_IMX307_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_IMX307_2M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_IMX334_8M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_IMX334_8M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_IMX335_5M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_IMX335_5M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_IMX335_4M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_IMX335_4M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case OV_OS08A20_MIPI_8M_30FPS_10BIT: + memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_8M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_8M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case OV_OS08A20_MIPI_5M_30FPS_10BIT: + memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_5M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_5M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case SOI_F35_MIPI_2M_30FPS_10BIT: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT: + memcpy(pstViDevAttr, &DEV_ATTR_F35_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_F35_2M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case SOI_H65_MIPI_1M_30FPS_10BIT: + memcpy(pstViDevAttr, &DEV_ATTR_H65_1M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case PICO640_THERMAL_479P: + memcpy(pstViDevAttr, &DEV_ATTR_PICO_640_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case PICO384_THERMAL_384X288: + memcpy(pstViDevAttr, &DEV_ATTR_PICO_384_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_IMX327_SUBLVDS_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_IMX307_SUBLVDS_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case VIVO_MCS369Q_4M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_VIVO_MCS369Q_4M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case VIVO_MCS369_2M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_VIVO_MCS369_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case VIVO_MM308M2_2M_25FPS_8BIT: + memcpy(pstViDevAttr, &DEV_ATTR_VIVO_MM308M2_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case NEXTCHIP_N5_2M_25FPS_8BIT: + memcpy(pstViDevAttr, &DEV_ATTR_NEXTCHIP_N5_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SMS_SC3335_MIPI_3M_30FPS_10BIT: + memcpy(pstViDevAttr, &DEV_ATTR_SC3335_3M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2020_2M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SMS_SC8238_MIPI_8M_30FPS_10BIT: + memcpy(pstViDevAttr, &DEV_ATTR_SC8238_8M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_SC8238_8M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + case SMS_SC4210_MIPI_4M_30FPS_12BIT: + memcpy(pstViDevAttr, &DEV_ATTR_SC4210_4M_BASE, sizeof(VI_DEV_ATTR_S)); + break; + case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1: + memcpy(pstViDevAttr, &DEV_ATTR_SC4210_4M_BASE, sizeof(VI_DEV_ATTR_S)); + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + break; + } + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_GetChnAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_CHN_ATTR_S *pstChnAttr) +{ + switch (enSnsType) { + default: + case SONY_IMX290_MIPI_1M_30FPS_12BIT: + memcpy(pstChnAttr, &CHN_ATTR_1280x720_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_1920x1080_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_1920x1080_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_3840x2160_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_2592x1944_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + memcpy(pstChnAttr, &CHN_ATTR_2560x1440_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case OV_OS08A20_MIPI_8M_30FPS_10BIT: + case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_3840x2160_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case OV_OS08A20_MIPI_5M_30FPS_10BIT: + case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_2592x1944_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SOI_F35_MIPI_2M_30FPS_10BIT: + case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_1920x1080_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SOI_H65_MIPI_1M_30FPS_10BIT: + memcpy(pstChnAttr, &CHN_ATTR_1280x720_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case PICO640_THERMAL_479P: + memcpy(pstChnAttr, &CHN_ATTR_632x479_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case PICO384_THERMAL_384X288: + memcpy(pstChnAttr, &CHN_ATTR_384x288_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case VIVO_MM308M2_2M_25FPS_8BIT: + case NEXTCHIP_N5_2M_25FPS_8BIT: + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + case VIVO_MCS369_2M_30FPS_12BIT: + memcpy(pstChnAttr, &CHN_ATTR_1920x1080_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case VIVO_MCS369Q_4M_30FPS_12BIT: + memcpy(pstChnAttr, &CHN_ATTR_2560x1440_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SMS_SC3335_MIPI_3M_30FPS_10BIT: + memcpy(pstChnAttr, &CHN_ATTR_2304x1296_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SMS_SC8238_MIPI_8M_30FPS_10BIT: + case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_3840x2160_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + case SMS_SC4210_MIPI_4M_30FPS_12BIT: + case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1: + memcpy(pstChnAttr, &CHN_ATTR_2560x1440_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S)); + break; + } + return CVI_SUCCESS; +} +#endif + +CVI_S32 SAMPLE_COMM_VI_ResetSensor(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = 0, i; + CVI_U32 devno = 0; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + devno = pstViInfo->stSnsInfo.MipiDev; + s32Ret = CVI_MIPI_SetSensorReset(devno, 1); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d reset failed!\n", i); + return s32Ret; + } + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_ResetMipi(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = 0, i; + CVI_U32 devno = 0; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + devno = pstViInfo->stSnsInfo.MipiDev; + s32Ret = CVI_MIPI_SetMipiReset(devno, 1); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "mipi %d reset failed!\n", i); + return s32Ret; + } + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_UnresetSensor(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = 0, i; + CVI_U32 devno = 0; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + devno = pstViInfo->stSnsInfo.MipiDev; + s32Ret = CVI_MIPI_SetSensorReset(devno, 0); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d unreset failed!\n", i); + return s32Ret; + } + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_UnresetMipi(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = 0, i; + CVI_U32 devno = 0; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + devno = pstViInfo->stSnsInfo.MipiDev; + s32Ret = CVI_MIPI_SetMipiReset(devno, 0); + if (s32Ret != CVI_SUCCESS) { + SAMPLE_PRT("mipi %d unreset failed!\n", i); + return s32Ret; + } + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_SetMipiAttr(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = 0, i; + VI_PIPE ViPipe; + CVI_U32 u32SnsId; + SNS_COMBO_DEV_ATTR_S stDevAttr; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + SAMPLE_SNS_TYPE_E enSnsType; + + const ISP_SNS_OBJ_S *pstSnsObj; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + enSnsType = g_enSnsType[u32SnsId]; + /* need to invert the clk for timnig issue. */ + if (enSnsType == VIVO_MCS369Q_4M_30FPS_12BIT || + enSnsType == VIVO_MCS369_2M_30FPS_12BIT) + CVI_MIPI_SetClkEdge(ViPipe, 0); + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + pstSnsObj->pfnGetRxAttr(ViPipe, &stDevAttr); + CVI_MIPI_SetMipiAttr(ViPipe, (CVI_VOID *)&stDevAttr); + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_EnableSensorClock(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = 0, i; + CVI_U32 devno = 0; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + devno = pstViInfo->stSnsInfo.MipiDev; + s32Ret = CVI_MIPI_SetSensorClock(devno, 1); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d clock enable failed!\n", i); + return s32Ret; + } + } + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_StartSensor(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_U32 s32Ret; + CVI_S32 i; + CVI_U32 u32SnsId; + VI_PIPE ViPipe; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + s32Ret = SAMPLE_COMM_ISP_SetSnsObj(u32SnsId, pstViInfo->stSnsInfo.enSnsType); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "update sensor obj(%d) failed!\n", u32SnsId); + return s32Ret; + } + s32Ret = SAMPLE_COMM_ISP_SetSnsInit(u32SnsId, pstViInfo->stSnsInfo.u8HwSync); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "update sensor(%d) hwsync failed !\n", u32SnsId); + return s32Ret; + } + s32Ret = SAMPLE_COMM_ISP_PatchSnsObj(u32SnsId, &pstViInfo->stSnsInfo); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "patch rx attr(%d) failed!\n", u32SnsId); + return s32Ret; + } + s32Ret = SAMPLE_COMM_ISP_Sensor_Regiter_callback(ViPipe, u32SnsId, pstViInfo->stSnsInfo.s32BusId); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d register callback failed!\n", i); + return s32Ret; + } + } + s32Ret = SAMPLE_COMM_ISP_SetSensorMode(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d register callback failed!\n", i); + return s32Ret; + } + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_StartMIPI(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = CVI_SUCCESS, i; + VI_PIPE ViPipe; + CVI_U32 u32SnsId; + SNS_COMBO_DEV_ATTR_S stDevAttr; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + const ISP_SNS_OBJ_S *pstSnsObj; + + /*TODO@CF. Need add sample function.*/ + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + pstSnsObj->pfnGetRxAttr(ViPipe, &stDevAttr); + SAMPLE_PRT("sensor %d stDevAttr.devno %d\n", i, stDevAttr.devno); + pstViInfo->stSnsInfo.MipiDev = stDevAttr.devno; + } + //asm volatile ("b ."); + s32Ret = SAMPLE_COMM_VI_ResetSensor(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "ResetSensor failed! with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = SAMPLE_COMM_VI_ResetMipi(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "ResetMipi failed! with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = SAMPLE_COMM_VI_SetMipiAttr(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_VI_SetMipiAttr failed! with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = SAMPLE_COMM_VI_EnableSensorClock(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "EnableSensorClock failed! with %#x!\n", s32Ret); + return s32Ret; + } + + usleep(20); + s32Ret = SAMPLE_COMM_VI_UnresetSensor(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "UnresetSensor failed! with %#x!\n", s32Ret); + return s32Ret; + } + return s32Ret; +} +#if 0 +CVI_S32 SAMPLE_COMM_VI_StartDev(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 s32Ret; + VI_DEV ViDev; + SAMPLE_SNS_TYPE_E enSnsType; + VI_DEV_ATTR_S stViDevAttr; + + ViDev = pstViInfo->stDevInfo.ViDev; + enSnsType = pstViInfo->stSnsInfo.enSnsType; + + SAMPLE_COMM_VI_GetDevAttrBySns(enSnsType, &stViDevAttr); + stViDevAttr.stWDRAttr.enWDRMode = pstViInfo->stDevInfo.enWDRMode; + + s32Ret = CVI_VI_SetDevAttr(ViDev, &stViDevAttr); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_SetDevAttr failed with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = CVI_VI_EnableDev(ViDev); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_EnableDev failed with %#x!\n", s32Ret); + return s32Ret; + } + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_StopDev(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 s32Ret; + VI_DEV ViDev; + + ViDev = pstViInfo->stDevInfo.ViDev; + s32Ret = CVI_VI_DisableDev(ViDev); + + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_DisableDev failed with %#x!\n", s32Ret); + return s32Ret; + } + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_BindPipeDev(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 i; + CVI_S32 s32PipeCnt = 0; + CVI_S32 s32Ret; + VI_DEV_BIND_PIPE_S stDevBindPipe = {0}; + + for (i = 0; i < 4; i++) { + if (pstViInfo->stPipeInfo.aPipe[i] >= 0 && pstViInfo->stPipeInfo.aPipe[i] < VI_MAX_PIPE_NUM) { + stDevBindPipe.PipeId[s32PipeCnt] = pstViInfo->stPipeInfo.aPipe[i]; + s32PipeCnt++; + stDevBindPipe.u32Num = s32PipeCnt; + } + } + + s32Ret = CVI_VI_SetDevBindPipe(pstViInfo->stDevInfo.ViDev, &stDevBindPipe); + if (s32Ret != CVI_SUCCESS) { + SAMPLE_PRT("CVI_VI_SetDevBindPipe failed with %#x!\n", s32Ret); + return CVI_FAILURE; + } + + return s32Ret; +} + +/****************************************************************************** + * funciton : Get enSize by diffrent sensor + ******************************************************************************/ +CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + + if (!penSize) + return CVI_FAILURE; + + switch (enMode) { + case SONY_IMX290_MIPI_1M_30FPS_12BIT: + case SOI_H65_MIPI_1M_30FPS_10BIT: + *penSize = PIC_720P; + break; + case SONY_IMX290_MIPI_2M_60FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SOI_F35_MIPI_2M_30FPS_10BIT: + case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case VIVO_MM308M2_2M_25FPS_8BIT: + case NEXTCHIP_N5_2M_25FPS_8BIT: + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + case VIVO_MCS369_2M_30FPS_12BIT: + *penSize = PIC_1080P; + break; + case OV_OS08A20_MIPI_8M_30FPS_10BIT: + case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1: + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + *penSize = PIC_3840x2160; + break; + case OV_OS08A20_MIPI_5M_30FPS_10BIT: + case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + *penSize = PIC_2592x1944; + break; + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + case SMS_SC4210_MIPI_4M_30FPS_12BIT: + case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1: + *penSize = PIC_1440P; + break; + case PICO640_THERMAL_479P: + *penSize = PIC_479P; + break; + case PICO384_THERMAL_384X288: + *penSize = PIC_288P; + break; + case VIVO_MCS369Q_4M_30FPS_12BIT: + *penSize = PIC_1440P; + break; + case SMS_SC3335_MIPI_3M_30FPS_10BIT: + *penSize = PIC_2304x1296; + break; + case SMS_SC8238_MIPI_8M_30FPS_10BIT: + case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1: + *penSize = PIC_3840x2160; + break; + default: + s32Ret = CVI_FAILURE; + break; + } + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_StartViChn(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 i; + CVI_S32 s32Ret = CVI_SUCCESS; + VI_PIPE ViPipe = 0; + VI_CHN ViChn = 0; + VI_CHN_ATTR_S stChnAttr; + VI_VPSS_MODE_E enMastPipeMode; + VI_DEV_ATTR_S stViDevAttr; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + if (i < VI_MAX_CHN_NUM) { + ViPipe = pstViConfig->astViInfo[i].stPipeInfo.aPipe[0]; + ViChn = pstViConfig->astViInfo[i].stChnInfo.ViChn; + + SAMPLE_COMM_VI_GetDevAttrBySns(pstViConfig->astViInfo[i].stSnsInfo.enSnsType, &stViDevAttr); + SAMPLE_COMM_VI_GetChnAttrBySns(pstViConfig->astViInfo[i].stSnsInfo.enSnsType, &stChnAttr); + stChnAttr.enDynamicRange = pstViConfig->astViInfo[i].stChnInfo.enDynamicRange; + stChnAttr.enVideoFormat = pstViConfig->astViInfo[i].stChnInfo.enVideoFormat; + stChnAttr.enCompressMode = pstViConfig->astViInfo[i].stChnInfo.enCompressMode; + stChnAttr.bLVDSflow = (stViDevAttr.enIntfMode == VI_MODE_LVDS) ? 1 : 0; + stChnAttr.u8TotalChnNum = pstViConfig->s32WorkingViNum; + + s32Ret = CVI_VI_SetChnAttr(ViPipe, ViChn, &stChnAttr); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_SetChnAttr failed with %#x!\n", s32Ret); + return CVI_FAILURE; + } + + enMastPipeMode = pstViConfig->astViInfo[i].stPipeInfo.enMastPipeMode; + + if (enMastPipeMode == VI_OFFLINE_VPSS_OFFLINE + || enMastPipeMode == VI_ONLINE_VPSS_OFFLINE) { + s32Ret = CVI_VI_EnableChn(ViPipe, ViChn); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_EnableChn failed with %#x!\n", + s32Ret); + return CVI_FAILURE; + } + } + } + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_StopViChn(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + VI_PIPE ViPipe = 0; + VI_CHN ViChn; + VI_VPSS_MODE_E enMastPipeMode; + + ViChn = pstViInfo->stChnInfo.ViChn; + + if (ViChn < VI_MAX_CHN_NUM) { + enMastPipeMode = pstViInfo->stPipeInfo.enMastPipeMode; + + if (enMastPipeMode == VI_OFFLINE_VPSS_OFFLINE + || enMastPipeMode == VI_ONLINE_VPSS_OFFLINE) { + s32Ret = CVI_VI_DisableChn(ViPipe, ViChn); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_DisableChn failed with %#x!\n", + s32Ret); + return s32Ret; + } + } + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_CreateIsp(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 i; + CVI_S32 s32ViNum; + CVI_S32 s32Ret = CVI_SUCCESS; + + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + if (!pstViConfig) { + SAMPLE_PRT("%s: null ptr\n", __func__); + return CVI_FAILURE; + } + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + s32ViNum = pstViConfig->as32WorkingViId[i]; + pstViInfo = &pstViConfig->astViInfo[s32ViNum]; + + s32Ret = SAMPLE_COMM_VI_StartIsp(pstViInfo); + + if (s32Ret != CVI_SUCCESS) { + SAMPLE_PRT("SAMPLE_COMM_VI_StartIsp failed !\n"); + return CVI_FAILURE; + } + } + + s32Ret = SAMPLE_COMM_ISP_Run(0); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "ISP_Run failed with %#x!\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_StartIsp(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 s32Ret = 0, i; + VI_PIPE ViPipe = 0; + ISP_PUB_ATTR_S stPubAttr; + ISP_STATISTICS_CFG_S stsCfg; + ISP_BIND_ATTR_S stBindAttr; + + for (i = 0; i < WDR_MAX_PIPE_NUM; i++) { + if (pstViInfo->stPipeInfo.aPipe[i] >= 0 && + pstViInfo->stPipeInfo.aPipe[i] < VI_MAX_PIPE_NUM) { + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; +#if USE_USER_SEN_DRIVER + SAMPLE_COMM_ISP_Aelib_Callback(ViPipe); +#else + ae0_register_callback(ViPipe); +#endif + SAMPLE_COMM_ISP_Awblib_Callback(ViPipe); + + snprintf(stBindAttr.stAeLib.acLibName, sizeof(CVI_AE_LIB_NAME), "%s", CVI_AE_LIB_NAME); + stBindAttr.stAeLib.s32Id = ViPipe; + stBindAttr.sensorId = 0; + snprintf(stBindAttr.stAwbLib.acLibName, sizeof(CVI_AWB_LIB_NAME), "%s", CVI_AWB_LIB_NAME); + stBindAttr.stAwbLib.s32Id = ViPipe; + s32Ret = CVI_ISP_SetBindAttr(ViPipe, &stBindAttr); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "Bind Algo failed with %#x!\n", s32Ret); + } + s32Ret = CVI_ISP_MemInit(ViPipe); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "Init Ext memory failed with %#x!\n", s32Ret); + return s32Ret; + } + SAMPLE_COMM_ISP_GetIspAttrBySns(pstViInfo->stSnsInfo.enSnsType, &stPubAttr); + s32Ret = CVI_ISP_SetPubAttr(ViPipe, &stPubAttr); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "SetPubAttr failed with %#x!\n", s32Ret); + return s32Ret; + } + stsCfg.stAECfg.stCrop[0].bEnable = stsCfg.stAECfg.stCrop[1].bEnable = 1; + stsCfg.stAECfg.stCrop[0].u16X = stsCfg.stAECfg.stCrop[0].u16Y = 0; + stsCfg.stAECfg.stCrop[0].u16W = stPubAttr.stWndRect.u32Width; + stsCfg.stAECfg.stCrop[0].u16H = stPubAttr.stWndRect.u32Height; + stsCfg.stAECfg.stCrop[1].u16X = stsCfg.stAECfg.stCrop[1].u16Y = 0; + stsCfg.stAECfg.stCrop[1].u16W = stPubAttr.stWndRect.u32Width; + stsCfg.stAECfg.stCrop[1].u16H = stPubAttr.stWndRect.u32Height; + stsCfg.stWBCfg.u16ZoneRow = AWB_ZONE_ORIG_ROW; + stsCfg.stWBCfg.u16ZoneCol = AWB_ZONE_ORIG_COLUMN; + stsCfg.stWBCfg.stCrop.u16X = stsCfg.stWBCfg.stCrop.u16Y = 0; + stsCfg.stWBCfg.stCrop.u16W = stPubAttr.stWndRect.u32Width; + stsCfg.stWBCfg.stCrop.u16H = stPubAttr.stWndRect.u32Height; + stsCfg.stWBCfg.u16BlackLevel = 0; + stsCfg.stWBCfg.u16WhiteLevel = 4095; + stsCfg.stFocusCfg.stConfig.bEnable = 1; + stsCfg.stFocusCfg.stConfig.u8HFltShift = 1; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[0] = 1; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[1] = 2; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[2] = 3; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[3] = 5; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[4] = 10; + stsCfg.stFocusCfg.stConfig.stRawCfg.PreGammaEn = 0; + stsCfg.stFocusCfg.stConfig.stPreFltCfg.PreFltEn = 1; + stsCfg.stFocusCfg.stConfig.u16Hwnd = 17; + stsCfg.stFocusCfg.stConfig.u16Vwnd = 15; + stsCfg.stFocusCfg.stConfig.stCrop.bEnable = 1; + // AF offset and size has some limitation. + stsCfg.stFocusCfg.stConfig.stCrop.u16X = AF_XOFFSET_MIN; + stsCfg.stFocusCfg.stConfig.stCrop.u16Y = AF_YOFFSET_MIN; + stsCfg.stFocusCfg.stConfig.stCrop.u16W = stPubAttr.stWndRect.u32Width - AF_XOFFSET_MIN * 2; + stsCfg.stFocusCfg.stConfig.stCrop.u16H = stPubAttr.stWndRect.u32Height - AF_YOFFSET_MIN * 2; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[0] = 1; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[1] = 4; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[2] = 8; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[3] = 16; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[4] = 0; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[0] = 1; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[1] = 2; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[2] = 4; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[3] = 8; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[4] = 0; + stsCfg.stFocusCfg.stVParam_FIR.s8VFltHpCoeff[0] = 1; + stsCfg.stFocusCfg.stVParam_FIR.s8VFltHpCoeff[1] = 16; + stsCfg.stFocusCfg.stVParam_FIR.s8VFltHpCoeff[2] = 0; + stsCfg.unKey.bit1FEAeGloStat = stsCfg.unKey.bit1FEAeLocStat = + stsCfg.unKey.bit1AwbStat1 = stsCfg.unKey.bit1AwbStat2 = stsCfg.unKey.bit1FEAfStat = 1; + s32Ret = CVI_ISP_SetStatisticsConfig(ViPipe, &stsCfg); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "ISP Set Statistic failed with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = CVI_ISP_Init(ViPipe); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "ISP Init failed with %#x!\n", s32Ret); + return s32Ret; + } + } + } + return CVI_SUCCESS; +} + +static CVI_S32 SAMPLE_COMM_VI_StopSingleViPipe(VI_PIPE ViPipe) +{ + CVI_S32 s32Ret; + + s32Ret = CVI_VI_StopPipe(ViPipe); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_StopPipe failed with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = CVI_VI_DestroyPipe(ViPipe); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_DestroyPipe failed with %#x!\n", s32Ret); + return s32Ret; + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_VI_StopViPipe(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 i, ret = CVI_SUCCESS; + VI_PIPE ViPipe; + + for (i = 0; i < WDR_MAX_PIPE_NUM; i++) { + if (pstViInfo->stPipeInfo.aPipe[i] >= 0 && pstViInfo->stPipeInfo.aPipe[i] < VI_MAX_PIPE_NUM) { + ViPipe = pstViInfo->stPipeInfo.aPipe[i]; + ret = SAMPLE_COMM_VI_StopSingleViPipe(ViPipe); + if (ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_VI_StopViPipe is fail\n"); + return ret; + } + } + } + + return CVI_SUCCESS; +} + +static CVI_S32 SAMPLE_COMM_VI_DestroySingleVi(SAMPLE_VI_INFO_S *pstViInfo) +{ + SAMPLE_COMM_VI_StopViChn(pstViInfo); + + SAMPLE_COMM_VI_StopViPipe(pstViInfo); + + SAMPLE_COMM_VI_StopDev(pstViInfo); + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_DestroyVi(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 i; + CVI_S32 s32ViNum; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + if (!pstViConfig) { + CVI_TRACE_LOG(CVI_DBG_ERR, "null ptr\n"); + return CVI_FAILURE; + } + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + s32ViNum = pstViConfig->as32WorkingViId[i]; + pstViInfo = &pstViConfig->astViInfo[s32ViNum]; + + SAMPLE_COMM_VI_DestroySingleVi(pstViInfo); + } + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_OPEN(CVI_VOID) +{ + CVI_S32 s32ret = CVI_SUCCESS; + + s32ret = CVI_SYS_VI_Open(); + if (s32ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "VI reopen err\n"); + } + + return s32ret; +} + +CVI_S32 SAMPLE_COMM_VI_CLOSE(CVI_VOID) +{ + CVI_S32 s32ret = CVI_SUCCESS; + + s32ret = CVI_SYS_VI_Close(); + if (s32ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "VI close err\n"); + } + + return s32ret; +} +#endif + +int sample_snsr_test(void) +{ + SAMPLE_SNS_TYPE_E enSnsType = SONY_IMX327_MIPI_2M_30FPS_12BIT; + WDR_MODE_E enWDRMode = WDR_MODE_NONE; + SAMPLE_VI_CONFIG_S stViConfig; + CVI_S32 s32WorkSnsId = 0; + VI_DEV ViDev = 0; + VI_PIPE ViPipe = 0; + CVI_S32 s32Ret = CVI_SUCCESS; + const ISP_SNS_OBJ_S *pstSnsObj; + ISP_SENSOR_EXP_FUNC_S stSensorExpFunc; + uint64_t bayer_w_addr[3] = {0x121000000, 0x122000000, 0x123000000}; + CVI_U16 snsr_w = 1948, snsr_h = 1097; + + /************************************************ + * step1: Config VI + ************************************************/ + SAMPLE_COMM_VI_GetSensorInfo(&stViConfig); + + stViConfig.astViInfo[s32WorkSnsId].stSnsInfo.enSnsType = enSnsType; + stViConfig.s32WorkingViNum = 1; + stViConfig.as32WorkingViId[0] = 0; + stViConfig.astViInfo[s32WorkSnsId].stSnsInfo.MipiDev = 0xFF; + stViConfig.astViInfo[s32WorkSnsId].stSnsInfo.s32BusId = 3; + stViConfig.astViInfo[s32WorkSnsId].stDevInfo.ViDev = ViDev; + stViConfig.astViInfo[s32WorkSnsId].stDevInfo.enWDRMode = enWDRMode; + //stViConfig.astViInfo[s32WorkSnsId].stPipeInfo.enMastPipeMode = enMastPipeMode; + stViConfig.astViInfo[s32WorkSnsId].stPipeInfo.aPipe[0] = ViPipe; + stViConfig.astViInfo[s32WorkSnsId].stPipeInfo.aPipe[1] = -1; + stViConfig.astViInfo[s32WorkSnsId].stPipeInfo.aPipe[2] = -1; + stViConfig.astViInfo[s32WorkSnsId].stPipeInfo.aPipe[3] = -1; + //stViConfig.astViInfo[s32WorkSnsId].stChnInfo.ViChn = ViChn; + //stViConfig.astViInfo[s32WorkSnsId].stChnInfo.enPixFormat = enPixFormat; + //stViConfig.astViInfo[s32WorkSnsId].stChnInfo.enDynamicRange = enDynamicRange; + //stViConfig.astViInfo[s32WorkSnsId].stChnInfo.enVideoFormat = enVideoFormat; + //stViConfig.astViInfo[s32WorkSnsId].stChnInfo.enCompressMode = enCompressMode; + + /* Skip other flow.....*/ + + /* clock enable */ + vip_clk_en(); + /* VIP reset */ + vip_isp_clk_reset(); + + /************************************************ + * step4: Init VI ISP + ************************************************/ + s32Ret = SAMPLE_COMM_VI_StartSensor(&stViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "system start sensor failed with %#x\n", s32Ret); + printf("start snsr fail\n"); + return s32Ret; + } + //s32Ret = SAMPLE_COMM_VI_StartDev(&stViConfig.astViInfo[ViDev]); + //if (s32Ret != CVI_SUCCESS) { + // CVI_TRACE_LOG(CVI_DBG_ERR, "VI_StartDev failed with %#x!\n", s32Ret); + // return s32Ret; + //} + s32Ret = SAMPLE_COMM_VI_StartMIPI(&stViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "system start MIPI failed with %#x\n", s32Ret); + printf("start mipi fail\n"); + return s32Ret; + } + /************************************************ + * start sensor + ************************************************/ + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(0); + if (!pstSnsObj) { + printf("no sensor obj\n"); + return CVI_FAILURE; + } + pstSnsObj->pfnExpSensorCb(&stSensorExpFunc); + stSensorExpFunc.pfn_cmos_sensor_init(0); + /************************************************ + * [Hack] configure isp, check result by CVD.... + ************************************************/ + + /* configure preraw out mode */ + mmio_clrsetbits_32(0x0a000000, 0x03, 1); + /* configure isptop */ + mmio_write_32(0x0a070000, 0xffffffff); + mmio_setbits_32(0x0a070004, 0x1049); + mmio_setbits_32(0x0a07000C, 0x9); + mmio_clrbits_32(0x0a070010, 0x0c); + mmio_write_32(0x0a070014, (snsr_w - 1) | ((snsr_h - 1) << 16)); + /* configure csibdg */ + mmio_setbits_32(0x0a001000, (1 << 13)); + mmio_clrbits_32(0x0a001000, 0x4); + mmio_clrbits_32(0x0a001000, 0x30); + mmio_setbits_32(0x0a001000, 0x40); + mmio_setbits_32(0x0a001000, 0x40); + mmio_write_32(0x0a001004, (snsr_w - 1) | ((snsr_h - 1) << 16)); + mmio_clrsetbits_32(0x0a001000, 0x3, 1); + /* configure wdma */ + mmio_write_32(0x0a001124, (snsr_w - 1) | ((snsr_h - 1) << 16)); + mmio_write_32(0x0a001108, snsr_w * 3 / 2); + mmio_clrsetbits_32(0x0a001128, 0xFFFF, (snsr_w * 3 / 2 + 0x1F) & ~0x1F); + mmio_clrsetbits_32(0x0a001128, 0x70000, 3 << 16); + mmio_write_32(0x0a001100, bayer_w_addr[0] & 0xFFFFFFFF); + mmio_write_32(0x0a001104, bayer_w_addr[0] >> 32); + /* configure isp enable */ + mmio_setbits_32(0x0a001008, (1 << 0)); + mmio_setbits_32(0x0a070008, 0x28); + mmio_setbits_32(0x0a001000, (1 << 24)); + + return CVI_SUCCESS; +} + diff --git a/freertos/cvitek/task/isp/src/riscv64/isp_main.c b/freertos/cvitek/task/isp/src/riscv64/isp_main.c new file mode 100644 index 000000000..bc74a0e16 --- /dev/null +++ b/freertos/cvitek/task/isp/src/riscv64/isp_main.c @@ -0,0 +1,222 @@ +/* Standard includes. */ +#include <stdio.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" +#include "timers.h" +#include "arch_helpers.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" +#include "fast_image.h" +#include "comm.h" + +#include "rtos_isp_cmd.h" +#include "vi_uapi.h" +#include "vi_tun_cfg.h" +#include "isp_mgr_buf.h" +#include "rtos_isp_mgr.h" + +static QueueHandle_t gISPQueHandle; +static QueueHandle_t gQueueISPCmdqu; +extern struct transfer_config_t transfer_config; + +extern void AE_RtosBufInit(CVI_U8 sID); +extern void AWB_RtosBufInit(CVI_U8 sID); + +#include "sample_comm.h" +//static CVI_VOID isp_init(); + +CVI_VOID *g_pIspShardBuffer; + +static void runIspInitCmd(cmdqu_t *rtos_cmdq) +{ + g_pIspShardBuffer = ISP_PTR_CAST_VOID(rtos_cmdq->param_ptr); + struct rtos_isp_cmd_event *ev = (struct rtos_isp_cmd_event *) + ISP_PTR_CAST_VOID(rtos_cmdq->param_ptr); + + inv_dcache_range(rtos_cmdq->param_ptr, sizeof(struct rtos_isp_cmd_event)); + + isp_mgr_buf_init(ev->ViPipe); + + isp_mgr_buf_invalid_cache(ev->ViPipe); + + isp_tun_buf_ctrl_init(ev->ViPipe); + + isp_feature_ctrl_init(ev->ViPipe); + + AE_RtosBufInit(ev->ViPipe); + AWB_RtosBufInit(ev->ViPipe); + + isp_mgr_buf_flush_cache(ev->ViPipe); +} + +static void runIspEventCmd(cmdqu_t *rtos_cmdq) +{ + struct rtos_isp_cmd_event *ev = (struct rtos_isp_cmd_event *) + ISP_PTR_CAST_VOID(rtos_cmdq->param_ptr); + + isp_mgr_buf_invalid_cache(ev->ViPipe); + + switch (rtos_cmdq->cmd_id) { + case RTOS_ISP_CMD_PRE_SOF: + rtos_isp_mgr_pre_sof(ev->ViPipe, ev->frame_idx); + break; + case RTOS_ISP_CMD_PRE_EOF: + rtos_isp_mgr_pre_eof(ev->ViPipe, ev->frame_idx); + break; + case RTOS_ISP_CMD_POST_EOF: + rtos_isp_mgr_post_eof(ev->ViPipe, ev->frame_idx); + break; + default: + break; + } + + ev->is_slave_done = CVI_TRUE; + + isp_mgr_buf_flush_cache(ev->ViPipe); +} + +static void runIspDeinitCmd(cmdqu_t *rtos_cmdq) +{ + struct rtos_isp_cmd_event *ev = (struct rtos_isp_cmd_event *) + ISP_PTR_CAST_VOID(rtos_cmdq->param_ptr); + + inv_dcache_range(rtos_cmdq->param_ptr, sizeof(struct rtos_isp_cmd_event)); + + isp_feature_ctrl_uninit(ev->ViPipe); + + isp_tun_buf_ctrl_uninit(ev->ViPipe); + + isp_mgr_buf_uninit(ev->ViPipe); +} + +void prvISPRunTask(void *pvParameters) +{ + cmdqu_t rtos_cmdq; + //struct transfer_config_t *p_transfer_config; + + printf("prvISPRunTask run\n"); + gISPQueHandle = main_GetMODHandle(E_QUEUE_ISP); + gQueueISPCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + + /* get isp buffer information */ + printf("isp buffer addr = %x\n", transfer_config.isp_buffer_addr); + printf("isp buffer size = %x\n", transfer_config.isp_buffer_size); + + // isp_init(); + + for (;;) { + xQueueReceive(gISPQueHandle, &rtos_cmdq, portMAX_DELAY); + //TODO: wait cv181x command queue and add action for command + //printf("prvIspRunTask ip=%d cmd=%d para=%lx\n", + // rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + + CVI_BOOL need_ack = CVI_TRUE; + + switch (rtos_cmdq.cmd_id) { +#ifdef FAST_IMAGE_ENABLE + // cmd from isp drv + case ISP_CMDQ_RECV_EV: + { + struct vi_event ev; + + ev = *((struct vi_event *)rtos_cmdq.param_ptr); + printf("dev(%d) fidx(%d) sidx(%d)\n", ev.dev_id, ev.frame_sequence, ev.stt_idx); + + switch(ev.type) { + case VI_EVENT_PRE0_SOF: + rtos_isp_mgr_pre_sof(0, ev.frame_sequence); + rtos_isp_mgr_pre_fe_sof(0, ev.frame_sequence); + rtos_isp_mgr_pre_be_sof(0, ev.frame_sequence); + break; + case VI_EVENT_PRE1_SOF: + rtos_isp_mgr_pre_sof(1, ev.frame_sequence); + rtos_isp_mgr_pre_fe_sof(1, ev.frame_sequence); + rtos_isp_mgr_pre_be_sof(1, ev.frame_sequence); + break; + case VI_EVENT_PRE0_EOF: + rtos_isp_mgr_pre_eof(0, ev.frame_sequence); + rtos_isp_mgr_pre_fe_eof(0, ev.frame_sequence); + rtos_isp_mgr_pre_be_eof(0, ev.frame_sequence); + break; + case VI_EVENT_PRE1_EOF: + rtos_isp_mgr_pre_eof(1, ev.frame_sequence); + rtos_isp_mgr_pre_fe_eof(1, ev.frame_sequence); + rtos_isp_mgr_pre_be_eof(1, ev.frame_sequence); + break; + case VI_EVENT_POST_EOF: + isp_sts_ctrl_set_post_idx(0, ev.stt_idx); + rtos_isp_mgr_post_eof(0, ev.frame_sequence); + break; + case VI_EVENT_POST1_EOF: + isp_sts_ctrl_set_post_idx(1, ev.stt_idx); + rtos_isp_mgr_post_eof(1, ev.frame_sequence); + break; + } + need_ack = CVI_FALSE; + } + break; + case ISP_CMDQ_GET_STS_MEM: + { + //struct cvi_isp_sts_mem *sts_mem; + + //sts_mem = ((struct cvi_isp_sts_mem *)rtos_cmdq.param_ptr); + //isp_sts_ctrl_set_mem(sts_mem->raw_num, sts_mem); + need_ack = CVI_FALSE; + } + break; + case ISP_CMDQ_GET_TUNING_NODE_MEM: + //isp_tun_buf_ctrl_set_buf(0, (struct isp_tuning_cfg *)rtos_cmdq.param_ptr); + //isp_tun_buf_ctrl_set_buf(1, (struct isp_tuning_cfg *)rtos_cmdq.param_ptr); + need_ack = CVI_FALSE; + break; +#endif +/*---------------------------------------------------------------------------------------------------*/ + case RTOS_ISP_CMD_INIT: + runIspInitCmd(&rtos_cmdq); + break; + case RTOS_ISP_CMD_PRE_SOF: + case RTOS_ISP_CMD_PRE_EOF: + case RTOS_ISP_CMD_POST_EOF: + runIspEventCmd(&rtos_cmdq); + break; + case RTOS_ISP_CMD_POST_DONE_SYNC: + break; + case RTOS_ISP_CMD_DEINIT: + runIspDeinitCmd(&rtos_cmdq); + break; + default: + printf("[ERROR] isp unknown cmd %d\n", rtos_cmdq.cmd_id); + break; + } + + if (need_ack == CVI_TRUE) { + xQueueSend(gQueueISPCmdqu, &rtos_cmdq, 0U); + } + + rtos_cmdq.ip_id = -1; + } + + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; +} + +// Test code +//static CVI_VOID isp_init() +//{ +// SAMPLE_VI_CONFIG_S pstViConfig; +// +// pstViConfig.s32WorkingViNum = 1; +// pstViConfig.as32WorkingViId[0] = 0; +// pstViConfig.astViInfo[0].stPipeInfo.aPipe[0] = 0; +// pstViConfig.astViInfo[0].stPipeInfo.aPipe[1] = -1; +// pstViConfig.astViInfo[0].stPipeInfo.aPipe[2] = -1; +// pstViConfig.astViInfo[0].stPipeInfo.aPipe[3] = -1; +// pstViConfig.astViInfo[0].stSnsInfo.enSnsType = SONY_IMX307_MIPI_2M_30FPS_12BIT; +// +// SAMPLE_COMM_VI_CreateIsp(&pstViConfig); +//} diff --git a/freertos/cvitek/task/isp/src/riscv64/sample_common_isp.c b/freertos/cvitek/task/isp/src/riscv64/sample_common_isp.c new file mode 100644 index 000000000..955e7f31a --- /dev/null +++ b/freertos/cvitek/task/isp/src/riscv64/sample_common_isp.c @@ -0,0 +1,693 @@ +/* + * Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved. + * + * File Name: sample/common/sample_common_isp.c + * Description: + * Common ctrl code for isp. + */ + +// #include <stdint.h> +// #include <string.h> +// #include <stdio.h> +// #include <stdlib.h> +// #include <errno.h> +// #include <unistd.h> +// #include <sys/prctl.h> +// #include <sys/time.h> +#include <cvi_type.h> +#include <cvi_defines.h> +#include <cvi_comm_video.h> +#include "sample_comm.h" + +// #include <linux/cvi_defines.h> +#include "sample_comm.h" +#include "cvi_awb.h" +#include "cvi_af.h" + +#include "cvi_sns_ctrl.h" +#include "cvi_ae.h" +// #include "cvi_isp.h" +// #include "cvi_misc.h" + +#include "cvi_defines.h" + +// #ifdef SUPPORT_ISP_PQTOOL +// #include <dlfcn.h> +// static CVI_BOOL g_ISPDaemon = CVI_FALSE; +// static void *g_ISPDHandle; +// #define ISPD_LIBNAME "libcvi_ispd.so" +// #define ISPD_CONNECT_PORT 5566 +// #endif // + +// static pthread_t g_IspPid[VI_MAX_DEV_NUM]; +static CVI_U32 g_au32IspSnsId[ISP_MAX_DEV_NUM] = { 0, 1 }; + +SAMPLE_SNS_TYPE_E g_enSnsType[VI_MAX_DEV_NUM] = { + SONY_IMX327_MIPI_1M_30FPS_10BIT, + SONY_IMX327_MIPI_2M_30FPS_12BIT, + SONY_IMX290_MIPI_1M_30FPS_12BIT, +}; + +static ISP_INIT_ATTR_S gstInitAttr[ISP_MAX_DEV_NUM]; + +ISP_PUB_ATTR_S ISP_PUB_ATTR_SAMPLE = { { 0, 0, 1920, 1080 }, { 1920, 1080 }, 30, BAYER_RGGB, WDR_MODE_NONE, 0}; + +#if 0 +void callback_FPS(int fps) +{ + static CVI_FLOAT uMaxFPS[VI_MAX_DEV_NUM] = {0}; + int i; + + for (i = 0; i < VI_MAX_DEV_NUM && g_IspPid[i]; i++) { + ISP_PUB_ATTR_S pubAttr = {0}; + + CVI_ISP_GetPubAttr(i, &pubAttr); + if (uMaxFPS[i] == 0) { + uMaxFPS[i] = pubAttr.f32FrameRate; + } + if (fps == 0) { + pubAttr.f32FrameRate = uMaxFPS[i]; + } else { + pubAttr.f32FrameRate = (CVI_FLOAT) fps; + } + CVI_ISP_SetPubAttr(i, &pubAttr); + } +} + +static CVI_VOID *SAMPLE_COMM_ISP_Thread(void *arg) +{ + CVI_S32 s32Ret = 0; + CVI_U8 IspDev = *(CVI_U8 *)arg; + // char szThreadName[20]; + + vPortFree(arg); + // snprintf(szThreadName, sizeof(szThreadName), "ISP%d_RUN", IspDev); + // prctl(PR_SET_NAME, szThreadName, 0, 0, 0); + + if (IspDev > 0) { + printf("ISP Dev %d return\n", IspDev); + return CVI_NULL; + } + + // CVI_MISC_RegisterThermalCallback(callback_FPS); + + printf("ISP Dev %d running!\n", IspDev); + s32Ret = CVI_ISP_Run(IspDev); + if (s32Ret != 0) + printf("CVI_ISP_Run failed with %#x!\n", s32Ret); + + return CVI_NULL; +} + +CVI_S32 SAMPLE_COMM_ISP_Run(CVI_U8 IspDev) +{ + #if 0 + printf("%s\n", __func__); + CVI_S32 s32Ret = 0; + CVI_U8 *arg = malloc(sizeof(*arg)); + struct sched_param param; + pthread_attr_t attr; + + if (arg == NULL) { + CVI_TRACE_LOG(CVI_DBG_ERR, "malloc failed\n"); + goto out; + } + + *arg = IspDev; + param.sched_priority = 80; + + pthread_attr_init(&attr); + pthread_attr_setschedpolicy(&attr, SCHED_RR); + pthread_attr_setschedparam(&attr, ¶m); + pthread_attr_setinheritsched(&attr, PTHREAD_EXPLICIT_SCHED); + s32Ret = pthread_create(&g_IspPid[IspDev], &attr, SAMPLE_COMM_ISP_Thread, arg); + if (s32Ret != 0) { + CVI_TRACE_LOG(CVI_DBG_ERR, "create isp running thread failed!, error: %d, %s\r\n", + s32Ret, strerror(s32Ret)); + goto out; + } + +#ifdef SUPPORT_ISP_PQTOOL + if (!g_ISPDaemon) { + g_ISPDHandle = dlopen(ISPD_LIBNAME, RTLD_NOW); + + if (g_ISPDHandle) { + char *error = NULL; + void (*daemon_init)(unsigned int port); + + printf("Load dynamic library %s success\n", ISPD_LIBNAME); + + dlerror(); + daemon_init = dlsym(g_ISPDHandle, "isp_daemon_init"); + error = dlerror(); + if (error == NULL) { + (*daemon_init)(ISPD_CONNECT_PORT); + g_ISPDaemon = CVI_TRUE; + } else { + printf("Run daemon initial fail\n"); + dlclose(g_ISPDHandle); + } + } else { + printf("Load dynamic library %s fail\n", ISPD_LIBNAME); + } + } +#endif // + +out: + + return s32Ret; + #else + printf("%s\n", __func__); + CVI_S32 s32Ret = 0; + CVI_U8 *arg = pvPortMalloc(sizeof(*arg)); + + if (arg == CVI_NULL) { + printf("malloc failed\n"); + goto out; + } + *arg = IspDev; + SAMPLE_COMM_ISP_Thread(arg); + +out: + return s32Ret; + + #endif +} +#endif + +CVI_S32 SAMPLE_COMM_ISP_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + PIC_SIZE_E enPicSize; + SIZE_S stSize; + + memcpy(pstPubAttr, &ISP_PUB_ATTR_SAMPLE, sizeof(ISP_PUB_ATTR_S)); + + SAMPLE_COMM_VI_GetSizeBySensor(enSnsType, &enPicSize); + SAMPLE_COMM_SYS_GetPicSize(enPicSize, &stSize); + + pstPubAttr->stSnsSize.u32Width = stSize.u32Width; + pstPubAttr->stSnsSize.u32Height = stSize.u32Height; + pstPubAttr->stWndRect.u32Width = stSize.u32Width; + pstPubAttr->stWndRect.u32Height = stSize.u32Height; + + // WDR mode + if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT) + pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; + + // FPS + switch (enSnsType) { + case SMS_SC035HGS_MIPI_480P_120FPS_12BIT: + case SMS_SC035GS_MIPI_480P_120FPS_12BIT: + pstPubAttr->f32FrameRate = 120; + break; + case SONY_IMX327_MIPI_2M_60FPS_12BIT: + case SONY_IMX307_MIPI_2M_60FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT: + case SONY_IMX335_MIPI_5M_60FPS_10BIT: + case SONY_IMX335_MIPI_4M_60FPS_10BIT: + case SONY_IMX335_MIPI_2M_60FPS_10BIT: + case SONY_IMX347_MIPI_4M_60FPS_12BIT: + pstPubAttr->f32FrameRate = 60; + break; + case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1: + case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT: + case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT: + pstPubAttr->f32FrameRate = 30; + break; + default: + pstPubAttr->f32FrameRate = 25; + break; + } + + switch (enSnsType) { + // Sony + case SONY_IMX327_MIPI_1M_30FPS_10BIT: + case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1: + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_MIPI_2M_60FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_MIPI_2M_60FPS_12BIT: + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + case SONY_IMX335_MIPI_5M_60FPS_10BIT: + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + case SONY_IMX335_MIPI_4M_60FPS_10BIT: + case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT: + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT: + case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_2M_60FPS_10BIT: + case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SONY_IMX385_MIPI_2M_30FPS_12BIT: + case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX347_MIPI_4M_60FPS_12BIT: + case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1: + // GalaxyCore + case GCORE_GC2053_MIPI_2M_30FPS_10BIT: + case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT: + case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1: + case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + case GCORE_GC1054_MIPI_1M_30FPS_10BIT: + pstPubAttr->enBayer = BAYER_RGGB; + break; + case GCORE_GC4653_MIPI_4M_30FPS_10BIT: + case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT: + case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT: + case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT: + pstPubAttr->enBayer = BAYER_GRBG; + break; +#ifdef ARCH_CV182X + case SOI_F23_MIPI_2M_30FPS_10BIT: + pstPubAttr->enBayer = BAYER_BGRGI; + break; +#endif + default: + pstPubAttr->enBayer = BAYER_BGGR; + break; + }; + + return s32Ret; +} + +/****************************************************************************** + * funciton : stop ISP, and stop isp thread + ******************************************************************************/ +// CVI_VOID SAMPLE_COMM_ISP_Stop(CVI_U8 IspDev) +// { +// CVI_S32 s32Ret = CVI_FAILURE; +// #ifdef SUPPORT_ISP_PQTOOL +// if (g_ISPDaemon) { +// char *error = NULL; +// void (*daemon_uninit)(void); + +// daemon_uninit = dlsym(g_ISPDHandle, "isp_daemon_uninit"); +// error = dlerror(); +// if (error == NULL) +// (*daemon_uninit)(); + +// dlclose(g_ISPDHandle); +// g_ISPDHandle = NULL; +// g_ISPDaemon = CVI_FALSE; +// } +// #endif // + +// if (g_IspPid[IspDev]) { +// s32Ret = CVI_ISP_Exit(IspDev); +// if (s32Ret != CVI_SUCCESS) { +// SAMPLE_PRT("CVI_ISP_Exit fail with %#x!\n", s32Ret); +// return; +// } +// pthread_join(g_IspPid[IspDev], NULL); +// g_IspPid[IspDev] = 0; +// SAMPLE_COMM_ISP_Sensor_UnRegiter_callback(IspDev); +// SAMPLE_COMM_ISP_Aelib_UnCallback(IspDev); +// SAMPLE_COMM_ISP_Awblib_UnCallback(IspDev); +// #if ENABLE_AF_LIB +// SAMPLE_COMM_ISP_Aflib_UnCallback(IspDev); +// #endif +// } +// } + +// CVI_VOID SAMPLE_COMM_All_ISP_Stop(CVI_VOID) +// { +// for (ISP_DEV IspDev = 0; IspDev < VI_MAX_DEV_NUM; IspDev++) +// SAMPLE_COMM_ISP_Stop(IspDev); +// } + +CVI_S32 SAMPLE_COMM_ISP_Awblib_Callback(ISP_DEV IspDev) +{ + ALG_LIB_S stAwbLib; + CVI_S32 s32Ret = 0; + + stAwbLib.s32Id = IspDev; + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + s32Ret = CVI_AWB_Register(IspDev, &stAwbLib); + if (s32Ret != CVI_SUCCESS) { + printf("AWB Algo register failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Awblib_UnCallback(ISP_DEV IspDev) +{ + CVI_S32 s32Ret = 0; + ALG_LIB_S stAwbLib; + + stAwbLib.s32Id = IspDev; + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + s32Ret = CVI_AWB_UnRegister(IspDev, &stAwbLib); + if (s32Ret) { + printf("AWB Algo unRegister failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Aelib_Callback(ISP_DEV IspDev) +{ + CVI_S32 s32Ret = 0; + ALG_LIB_S stAeLib; + + stAeLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + s32Ret = CVI_AE_Register(IspDev, &stAeLib); + if (s32Ret != CVI_SUCCESS) { + printf("AE Algo register failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Aelib_UnCallback(ISP_DEV IspDev) +{ + CVI_S32 s32Ret = 0; + ALG_LIB_S stAeLib; + + stAeLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + s32Ret = CVI_AE_UnRegister(IspDev, &stAeLib); + if (s32Ret) { + printf("AE Algo unRegister failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} +#if 0 +CVI_S32 SAMPLE_COMM_ISP_Aflib_Callback(ISP_DEV IspDev) +{ + ALG_LIB_S stAfLib; + CVI_S32 s32Ret = 0; + + stAfLib.s32Id = IspDev; + strncpy(stAfLib.acLibName, CVI_AF_LIB_NAME, sizeof(CVI_AF_LIB_NAME)); + s32Ret = CVI_AF_Register(IspDev, &stAfLib); + + if (s32Ret != CVI_SUCCESS) { + printf("AF Algo register failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Aflib_UnCallback(ISP_DEV IspDev) +{ + CVI_S32 s32Ret = 0; + ALG_LIB_S stAfLib; + + stAfLib.s32Id = IspDev; + strncpy(stAfLib.acLibName, CVI_AF_LIB_NAME, sizeof(CVI_AF_LIB_NAME)); + s32Ret = CVI_AF_UnRegister(IspDev, &stAfLib); + if (s32Ret) { + printf("AF Algo unRegister failed!, error: %d\n", s32Ret); + return s32Ret; + } + return CVI_SUCCESS; +} +#endif + +CVI_S32 SAMPLE_COMM_ISP_SetSnsObj(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType) +{ + if (u32SnsId >= ARRAY_SIZE(g_enSnsType)) + return CVI_FAILURE; + + g_enSnsType[u32SnsId] = enSnsType; + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_SetSnsInit(CVI_U32 u32SnsId, CVI_U8 u8HwSync) +{ + if (u32SnsId >= ARRAY_SIZE(g_enSnsType)) + return CVI_FAILURE; + + gstInitAttr[u32SnsId].u16UseHwSync = u8HwSync; + + return CVI_SUCCESS; +} + +CVI_VOID *CVI_GetSnsObj(SAMPLE_SNS_TYPE_E enSnsType); + +CVI_VOID *SAMPLE_COMM_ISP_GetSnsObj(uint32_t u32SnsId) +{ + SAMPLE_SNS_TYPE_E enSnsType; + + enSnsType = g_enSnsType[u32SnsId]; + return CVI_GetSnsObj(enSnsType); +} + +CVI_S32 SAMPLE_COMM_ISP_PatchSnsObj(CVI_U32 u32SnsId, SAMPLE_SENSOR_INFO_S *pstSnsInfo) +{ + ISP_SNS_OBJ_S *pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + RX_INIT_ATTR_S stRxInitAttr; + unsigned int i; + + if (pstSnsObj == CVI_NULL) { + return CVI_FAILURE; + } + + memset(&stRxInitAttr, 0, sizeof(RX_INIT_ATTR_S)); + + stRxInitAttr.MipiDev = pstSnsInfo->MipiDev; + if (pstSnsInfo->stMclkAttr.bMclkEn) { + stRxInitAttr.stMclkAttr.bMclkEn = CVI_TRUE; + stRxInitAttr.stMclkAttr.u8Mclk = pstSnsInfo->stMclkAttr.u8Mclk; + } + + for (i = 0; i < sizeof(stRxInitAttr.as16LaneId)/sizeof(CVI_S16); i++) { + stRxInitAttr.as16LaneId[i] = pstSnsInfo->as16LaneId[i]; + } + for (i = 0; i < sizeof(stRxInitAttr.as8PNSwap)/sizeof(CVI_S8); i++) { + stRxInitAttr.as8PNSwap[i] = pstSnsInfo->as8PNSwap[i]; + } + + return (pstSnsObj->pfnPatchRxAttr) ? pstSnsObj->pfnPatchRxAttr(&stRxInitAttr) : CVI_SUCCESS; +} + +// #if 0 +// CVI_S32 SAMPLE_COMM_ISP_GetRxAttr(SAMPLE_VI_CONFIG_S *pstViConfig) +// { +// CVI_S32 s32Ret, i; +// ISP_SENSOR_EXP_FUNC_S stSnsrSensorFunc; +// SNS_COMBO_DEV_ATTR_S stDevAttr; +// const ISP_SNS_OBJ_S *pstSnsObj; + +// for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { +// pstViInfo = &pstViConfig->astViInfo[i]; +// ViPipe = pstViInfo->stPipeInfo.aPipe[i]; +// u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + +// pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); +// pstSnsObj.pfnGetRxAttr(ViPipe, &stDevAttr); +// } +// } +// #endif + +CVI_S32 SAMPLE_COMM_ISP_SetSensorMode(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = CVI_SUCCESS, i; + CVI_U32 u32SnsId; + VI_PIPE ViPipe; + WDR_MODE_E wdrMode; + ISP_PUB_ATTR_S stPubAttr; + ISP_SENSOR_EXP_FUNC_S stSnsrSensorFunc; + ISP_CMOS_SENSOR_IMAGE_MODE_S stSnsrMode; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + const ISP_SNS_OBJ_S *pstSnsObj; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + wdrMode = pstViInfo->stDevInfo.enWDRMode; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + if (SAMPLE_COMM_ISP_GetIspAttrBySns(pstViInfo->stSnsInfo.enSnsType, &stPubAttr) != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "Can't get sns attr!\n"); + return s32Ret; + } + stSnsrMode.u16Width = stPubAttr.stSnsSize.u32Width; + stSnsrMode.u16Height = stPubAttr.stSnsSize.u32Height; + stSnsrMode.f32Fps = stPubAttr.f32FrameRate; + + pstSnsObj->pfnExpSensorCb(&stSnsrSensorFunc); + s32Ret = stSnsrSensorFunc.pfn_cmos_set_image_mode(ViPipe, &stSnsrMode); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor set image mode failed! \ + stSnsrMode.u16Width %d stSnsrMode.u16Height %d %f wdrMode %d pstSnsObj %p\n", + stSnsrMode.u16Width, stSnsrMode.u16Height, stSnsrMode.f32Fps, wdrMode, pstSnsObj); + return s32Ret; + } + + s32Ret = stSnsrSensorFunc.pfn_cmos_set_wdr_mode(ViPipe, wdrMode); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor set wdr mode failed!\n"); + return s32Ret; + } + } + return s32Ret; +} + +static SNS_BDG_MUX_MODE_E SAMPLE_COMM_ISP_GetSnsBdgMode(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType) +{ + VI_DEV_ATTR_S stViDevAttr; + SNS_BDG_MUX_MODE_E MuxMode; + + SAMPLE_COMM_VI_GetDevAttrBySns(u32SnsId, enSnsType, &stViDevAttr); + switch (stViDevAttr.enWorkMode) { + case VI_WORK_MODE_1Multiplex: + MuxMode = SNS_BDG_MUX_NONE; + break; + case VI_WORK_MODE_2Multiplex: + MuxMode = SNS_BDG_MUX_2; + break; + case VI_WORK_MODE_3Multiplex: + MuxMode = SNS_BDG_MUX_3; + break; + case VI_WORK_MODE_4Multiplex: + MuxMode = SNS_BDG_MUX_4; + break; + default: + MuxMode = SNS_BDG_MUX_NONE; + break; + } + + return MuxMode; +} + +CVI_S32 SAMPLE_COMM_ISP_Sensor_Regiter_callback(ISP_DEV IspDev, CVI_U32 u32SnsId, CVI_S32 s32BusId, + CVI_S32 s32I2cAddr) +{ + CVI_S32 s32Ret = -1; + SAMPLE_SNS_TYPE_E enSnsType = g_enSnsType[u32SnsId]; + ALG_LIB_S stAeLib; + ALG_LIB_S stAwbLib; + const ISP_SNS_OBJ_S *pstSnsObj; + ISP_INIT_ATTR_S *pstInitAttr = &gstInitAttr[u32SnsId]; + ISP_SNS_COMMBUS_U unSnsrBusInfo = { + .s8I2cDev = 3, + }; + + #define SNSBUS_VLD(x) (x >= 0) + + if (u32SnsId > VI_MAX_DEV_NUM) { + CVI_TRACE_LOG(CVI_DBG_ERR, "invalid sensor id: %d\n", u32SnsId); + return CVI_FAILURE; + } + + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + if (pstSnsObj == CVI_NULL) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d not exist!\n", u32SnsId); + return CVI_FAILURE; + } + + pstInitAttr->enGainMode = SNS_GAIN_MODE_SHARE;//SNS_GAIN_MODE_WDR_2F + if ((enSnsType == SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1) || + (enSnsType == SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1) || + (enSnsType == OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1) || + (enSnsType == OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1) || + (enSnsType == OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1) || + (enSnsType == OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1)) { + pstInitAttr->enL2SMode = SNS_L2S_MODE_FIX; + } + pstInitAttr->enSnsBdgMuxMode = SAMPLE_COMM_ISP_GetSnsBdgMode(u32SnsId, enSnsType); + s32Ret = pstSnsObj->pfnSetInit(u32SnsId, pstInitAttr); + if (s32Ret < 0) { + CVI_TRACE_LOG(CVI_DBG_ERR, "pfnSetInit error id: %d s32Ret %d\n", IspDev, s32Ret); + return CVI_FAILURE; + } + /* set i2c bus info */ + if (SNSBUS_VLD(s32BusId)) + unSnsrBusInfo.s8I2cDev = (CVI_S8)s32BusId; + s32Ret = pstSnsObj->pfnSetBusInfo(u32SnsId, unSnsrBusInfo); + if (s32Ret < 0) { + CVI_TRACE_LOG(CVI_DBG_ERR, "pfnSetBusInfo error id: %d s32Ret %d\n", IspDev, s32Ret); + return CVI_FAILURE; + } + if (pstSnsObj->pfnPatchI2cAddr) + pstSnsObj->pfnPatchI2cAddr(s32I2cAddr); + + stAeLib.s32Id = IspDev; + stAwbLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + // strncpy(stAfLib.acLibName, CVI_AF_LIB_NAME, sizeof(CVI_AF_LIB_NAME)); + + if (pstSnsObj->pfnRegisterCallback != CVI_NULL) { + s32Ret = pstSnsObj->pfnRegisterCallback(IspDev, &stAeLib, &stAwbLib); + + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor_register_callback failed with %#x!\n", s32Ret); + return s32Ret; + } + } else { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor_register_callback failed with CVI_NULL!\n"); + return CVI_FAILURE; + } + + g_au32IspSnsId[IspDev] = u32SnsId; + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_ISP_Sensor_UnRegiter_callback(ISP_DEV IspDev) +{ + ALG_LIB_S stAeLib; + ALG_LIB_S stAwbLib; + CVI_U32 u32SnsId; + const ISP_SNS_OBJ_S *pstSnsObj; + CVI_S32 s32Ret = -1; + + u32SnsId = g_au32IspSnsId[IspDev]; + + if (u32SnsId > VI_MAX_DEV_NUM) { + SAMPLE_PRT("%s: invalid sensor id: %d\n", __func__, u32SnsId); + return CVI_FAILURE; + } + + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + + if (pstSnsObj == CVI_NULL) { + return CVI_FAILURE; + } + + stAeLib.s32Id = IspDev; + stAwbLib.s32Id = IspDev; + strncpy(stAeLib.acLibName, CVI_AE_LIB_NAME, sizeof(CVI_AE_LIB_NAME)); + strncpy(stAwbLib.acLibName, CVI_AWB_LIB_NAME, sizeof(CVI_AWB_LIB_NAME)); + // strncpy(stAfLib.acLibName, CVI_AF_LIB_NAME, sizeof(CVI_AF_LIB_NAME)); + + if (pstSnsObj->pfnUnRegisterCallback != CVI_NULL) { + s32Ret = pstSnsObj->pfnUnRegisterCallback(IspDev, &stAeLib, &stAwbLib); + + if (s32Ret != CVI_SUCCESS) { + SAMPLE_PRT("sensor_unregister_callback failed with %#x!\n", s32Ret); + return s32Ret; + } + } else { + SAMPLE_PRT("sensor_unregister_callback failed with CVI_NULL!\n"); + } + + return CVI_SUCCESS; +} diff --git a/freertos/cvitek/task/isp/src/riscv64/sample_common_vi.c b/freertos/cvitek/task/isp/src/riscv64/sample_common_vi.c new file mode 100644 index 000000000..c02964ae9 --- /dev/null +++ b/freertos/cvitek/task/isp/src/riscv64/sample_common_vi.c @@ -0,0 +1,1070 @@ +#include <stdio.h> + +#include <cvi_type.h> +#include <cvi_defines.h> +#include "cvi_comm_video.h" + +#include "cvi_awb_comm.h" +#include "cvi_af_comm.h" +#include "cvi_comm_isp.h" +#include "cvi_comm_vi.h" +#include "sample_comm.h" +#include "cvi_sns_ctrl.h" + +#include "cvi_common.h" +#include "cvi_ae_comm.h" + +#include "cvi_mipi.h" + +const char *snsr_type_name[SAMPLE_SNS_TYPE_BUTT] = { + /* ------ LINEAR BEGIN ------*/ + "SONY_IMX290_MIPI_1M_30FPS_12BIT", + "SONY_IMX290_MIPI_2M_60FPS_12BIT", + "SONY_IMX327_MIPI_1M_30FPS_10BIT", + "SONY_IMX327_MIPI_2M_30FPS_12BIT", + "SONY_IMX307_MIPI_2M_30FPS_12BIT", + "SONY_IMX327_2L_MIPI_2M_30FPS_12BIT", + "SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT", + "SONY_IMX307_2L_MIPI_2M_30FPS_12BIT", + "SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT", + "OV_OS08A20_MIPI_8M_30FPS_10BIT", + "OV_OS08A20_MIPI_5M_30FPS_10BIT", + "OV_OS08A20_MIPI_4M_30FPS_10BIT", + "OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT", + "OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT", + "OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT", + "OV_OS04C10_MIPI_4M_30FPS_12BIT", + "OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT", + "SOI_F23_MIPI_2M_30FPS_10BIT", + "SOI_F35_MIPI_2M_30FPS_10BIT", + "SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT", + "SOI_H65_MIPI_2M_30FPS_10BIT", + "PICO640_THERMAL_479P", + "PICO384_THERMAL_384X288", + "SONY_IMX327_SUBLVDS_2M_30FPS_12BIT", + "SONY_IMX307_SUBLVDS_2M_30FPS_12BIT", + "VIVO_MCS369Q_4M_30FPS_12BIT", + "VIVO_MM308M2_2M_25FPS_8BIT", + "NEXTCHIP_N5_2M_25FPS_8BIT", + "SMS_SC3335_MIPI_3M_30FPS_10BIT", + "SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT", + "SONY_IMX335_MIPI_5M_30FPS_12BIT", + "SONY_IMX335_MIPI_4M_30FPS_12BIT", + "SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT", + "SONY_IMX335_2L_MIPI_4M_30FPS_10BIT", + "PIXELPLUS_PR2020_1M_25FPS_8BIT", + "SONY_IMX385_MIPI_2M_30FPS_12BIT", + "PIXELPLUS_PR2020_1M_30FPS_8BIT", + "PIXELPLUS_PR2020_2M_25FPS_8BIT", + "PIXELPLUS_PR2020_2M_30FPS_8BIT", + "PIXELPLUS_PR2100_2M_25FPS_8BIT", + "PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT", + "PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT", + "SONY_IMX334_MIPI_8M_30FPS_12BIT", + "SMS_SC8238_MIPI_8M_30FPS_10BIT", + "VIVO_MCS369_2M_30FPS_12BIT", + "SMS_SC4210_MIPI_4M_30FPS_12BIT", + "SMS_SC200AI_MIPI_2M_30FPS_10BIT", + "SMS_SC850SL_MIPI_8M_30FPS_12BIT", + "NEXTCHIP_N6_2M_4CH_25FPS_8BIT", + "NEXTCHIP_N5_1M_2CH_25FPS_8BIT", + "GCORE_GC2053_MIPI_2M_30FPS_10BIT", + "GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT", + "GCORE_GC2093_MIPI_2M_30FPS_10BIT", + "GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT", + "GCORE_GC4653_MIPI_4M_30FPS_10BIT", + "GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT", + "SONY_IMX335_MIPI_5M_60FPS_10BIT", + "SONY_IMX335_MIPI_4M_60FPS_10BIT", + "GCORE_GC1054_MIPI_1M_30FPS_10BIT", + "SONY_IMX327_MIPI_2M_60FPS_12BIT", + "SONY_IMX347_MIPI_4M_60FPS_12BIT", + "SONY_IMX307_SUBLVDS_2M_60FPS_12BIT", + "SONY_IMX307_MIPI_2M_60FPS_12BIT", + "GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT", + "SONY_IMX335_MIPI_2M_60FPS_10BIT", + "SMS_SC035HGS_MIPI_480P_120FPS_12BIT", + "SMS_SC500AI_MIPI_5M_30FPS_10BIT", + "SMS_SC500AI_MIPI_4M_30FPS_10BIT", + "SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT", + "SMS_SC401AI_MIPI_4M_30FPS_10BIT", + "SMS_SC401AI_MIPI_3M_30FPS_10BIT", + "SMS_SC035GS_MIPI_480P_120FPS_12BIT", + "TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT", + "TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT", + /* ------ LINEAR END ------*/ + + /* ------ WDR 2TO1 BEGIN ------*/ + "SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1", + "SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1", + "SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1", + "SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1", + "SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1", + "SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1", + "SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1", + "OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1", + "OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1", + "OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1", + "OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1", + "OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1", + "OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1", + "OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1", + "OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1", + "SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1", + "SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1", + "SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1", + "SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1", + "SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1", + "SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1", + "SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1", + "SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1", + "SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1", + "SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1", + "SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1", + "SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1", + "SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1", + "SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1", + "GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1", + "GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1", + "SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1", + /* ------ WDR 2TO1 END ------*/ +}; + +// default is MIPI-CSI Bayer format sensor +VI_DEV_ATTR_S DEV_ATTR_SENSOR_BASE = { + VI_MODE_MIPI, + VI_WORK_MODE_1Multiplex, + VI_SCAN_PROGRESSIVE, + {-1, -1, -1, -1}, + VI_DATA_SEQ_YUYV, + + { + /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ + VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, + VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH, + + /*hsync_hfb hsync_act hsync_hhb*/ + {0, 1920, 0, + /*vsync0_vhb vsync0_act vsync0_hhb*/ + 0, 1080, 0, + /*vsync1_vhb vsync1_act vsync1_hhb*/ + 0, 0, 0} + }, + VI_DATA_TYPE_RGB, + {1920, 1080, 0, 0, 1920, 1080}, + { + WDR_MODE_NONE, + 1080 + }, + .enBayerFormat = BAYER_FORMAT_BG, + 1, 30, +}; + +CVI_S32 SAMPLE_COMM_VI_StartIsp(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 s32Ret = 0, i; + VI_PIPE ViPipe = 0; + ISP_PUB_ATTR_S stPubAttr; + ISP_STATISTICS_CFG_S stsCfg = {0}; + ISP_BIND_ATTR_S stBindAttr; + + for (i = 0; i < WDR_MAX_PIPE_NUM; i++) { + if (pstViInfo->stPipeInfo.aPipe[i] >= 0 && + pstViInfo->stPipeInfo.aPipe[i] < VI_MAX_PIPE_NUM) { + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + + SAMPLE_COMM_ISP_Aelib_Callback(ViPipe); + SAMPLE_COMM_ISP_Awblib_Callback(ViPipe); + // #if ENABLE_AF_LIB + // SAMPLE_COMM_ISP_Aflib_Callback(ViPipe); + // #endif + + snprintf(stBindAttr.stAeLib.acLibName, sizeof(CVI_AE_LIB_NAME), "%s", CVI_AE_LIB_NAME); + stBindAttr.stAeLib.s32Id = ViPipe; + stBindAttr.sensorId = 0; + snprintf(stBindAttr.stAwbLib.acLibName, sizeof(CVI_AWB_LIB_NAME), "%s", CVI_AWB_LIB_NAME); + stBindAttr.stAwbLib.s32Id = ViPipe; + #if ENABLE_AF_LIB + snprintf(stBindAttr.stAfLib.acLibName, sizeof(CVI_AF_LIB_NAME), "%s", CVI_AF_LIB_NAME); + stBindAttr.stAfLib.s32Id = ViPipe; + #endif + s32Ret = CVI_ISP_SetBindAttr(ViPipe, &stBindAttr); + if (s32Ret != CVI_SUCCESS) { + printf("Bind Algo failed with %#x!\n", s32Ret); + } + s32Ret = CVI_ISP_MemInit(ViPipe); + if (s32Ret != CVI_SUCCESS) { + printf("Init Ext memory failed with %#x!\n", s32Ret); + return s32Ret; + } + SAMPLE_COMM_ISP_GetIspAttrBySns(pstViInfo->stSnsInfo.enSnsType, &stPubAttr); + s32Ret = CVI_ISP_SetPubAttr(ViPipe, &stPubAttr); + if (s32Ret != CVI_SUCCESS) { + printf("SetPubAttr failed with %#x!\n", s32Ret); + return s32Ret; + } + CVI_ISP_GetStatisticsConfig(0, &stsCfg); + stsCfg.stAECfg.stCrop[0].bEnable = 0; + stsCfg.stAECfg.stCrop[0].u16X = stsCfg.stAECfg.stCrop[0].u16Y = 0; + stsCfg.stAECfg.stCrop[0].u16W = stPubAttr.stWndRect.u32Width; + stsCfg.stAECfg.stCrop[0].u16H = stPubAttr.stWndRect.u32Height; + + #ifdef ARCH_CV183X + stsCfg.stAECfg.stCrop[1].bEnable = 0; + stsCfg.stAECfg.stCrop[1].u16X = stsCfg.stAECfg.stCrop[1].u16Y = 0; + stsCfg.stAECfg.stCrop[1].u16W = stPubAttr.stWndRect.u32Width; + stsCfg.stAECfg.stCrop[1].u16H = stPubAttr.stWndRect.u32Height; + #endif + + stsCfg.stWBCfg.u16ZoneRow = AWB_ZONE_ORIG_ROW; + stsCfg.stWBCfg.u16ZoneCol = AWB_ZONE_ORIG_COLUMN; + stsCfg.stWBCfg.stCrop.bEnable = 0; + stsCfg.stWBCfg.stCrop.u16X = stsCfg.stWBCfg.stCrop.u16Y = 0; + stsCfg.stWBCfg.stCrop.u16W = stPubAttr.stWndRect.u32Width; + stsCfg.stWBCfg.stCrop.u16H = stPubAttr.stWndRect.u32Height; + stsCfg.stWBCfg.u16BlackLevel = 0; + stsCfg.stWBCfg.u16WhiteLevel = 4095; + stsCfg.stFocusCfg.stConfig.bEnable = 1; + stsCfg.stFocusCfg.stConfig.u8HFltShift = 1; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[0] = 1; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[1] = 2; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[2] = 3; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[3] = 5; + stsCfg.stFocusCfg.stConfig.s8HVFltLpCoeff[4] = 10; + stsCfg.stFocusCfg.stConfig.stRawCfg.PreGammaEn = 0; + stsCfg.stFocusCfg.stConfig.stPreFltCfg.PreFltEn = 1; + stsCfg.stFocusCfg.stConfig.u16Hwnd = 17; + stsCfg.stFocusCfg.stConfig.u16Vwnd = 15; + stsCfg.stFocusCfg.stConfig.stCrop.bEnable = 0; + // AF offset and size has some limitation. + stsCfg.stFocusCfg.stConfig.stCrop.u16X = AF_XOFFSET_MIN; + stsCfg.stFocusCfg.stConfig.stCrop.u16Y = AF_YOFFSET_MIN; + stsCfg.stFocusCfg.stConfig.stCrop.u16W = stPubAttr.stWndRect.u32Width - AF_XOFFSET_MIN * 2; + stsCfg.stFocusCfg.stConfig.stCrop.u16H = stPubAttr.stWndRect.u32Height - AF_YOFFSET_MIN * 2; + //Horizontal HP0 + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[0] = 0; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[1] = 0; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[2] = 13; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[3] = 24; + stsCfg.stFocusCfg.stHParam_FIR0.s8HFltHpCoeff[4] = 0; + //Horizontal HP1 + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[0] = 1; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[1] = 2; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[2] = 4; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[3] = 8; + stsCfg.stFocusCfg.stHParam_FIR1.s8HFltHpCoeff[4] = 0; + //Vertical HP + stsCfg.stFocusCfg.stVParam_FIR.s8VFltHpCoeff[0] = 13; + stsCfg.stFocusCfg.stVParam_FIR.s8VFltHpCoeff[1] = 24; + stsCfg.stFocusCfg.stVParam_FIR.s8VFltHpCoeff[2] = 0; + stsCfg.unKey.bit1FEAeGloStat = stsCfg.unKey.bit1FEAeLocStat = + stsCfg.unKey.bit1AwbStat1 = stsCfg.unKey.bit1AwbStat2 = stsCfg.unKey.bit1FEAfStat = 1; + //LDG + stsCfg.stFocusCfg.stConfig.u8ThLow = 0; + stsCfg.stFocusCfg.stConfig.u8ThHigh = 255; + stsCfg.stFocusCfg.stConfig.u8GainLow = 30; + stsCfg.stFocusCfg.stConfig.u8GainHigh = 20; + stsCfg.stFocusCfg.stConfig.u8SlopLow = 8; + stsCfg.stFocusCfg.stConfig.u8SlopHigh = 15; + s32Ret = CVI_ISP_SetStatisticsConfig(ViPipe, &stsCfg); + if (s32Ret != CVI_SUCCESS) { + printf("ISP Set Statistic failed with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = CVI_ISP_Init(ViPipe); + if (s32Ret != CVI_SUCCESS) { + printf("ISP Init failed with %#x!\n", s32Ret); + return s32Ret; + } + } + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_CreateIsp(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 i; + CVI_S32 s32ViNum; + CVI_S32 s32Ret = CVI_SUCCESS; + + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + if (!pstViConfig) { + printf("%s: null ptr\n", __func__); + return CVI_FAILURE; + } + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + s32ViNum = pstViConfig->as32WorkingViId[i]; + pstViInfo = &pstViConfig->astViInfo[s32ViNum]; + + s32Ret = SAMPLE_COMM_VI_StartIsp(pstViInfo); + if (s32Ret != CVI_SUCCESS) { + printf("SAMPLE_COMM_VI_StartIsp failed !\n"); + return CVI_FAILURE; + } + + // s32Ret = SAMPLE_COMM_ISP_Run(s32ViNum); + // if (s32Ret != CVI_SUCCESS) { + // printf("ISP_Run failed with %#x!\n", s32Ret); + // return s32Ret; + // } + } + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_DestroyIsp(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 i; + CVI_S32 s32ViNum; + CVI_S32 s32Ret = CVI_SUCCESS; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + if (!pstViConfig) { + SAMPLE_PRT("%s: null ptr\n", __func__); + return CVI_FAILURE; + } + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + s32ViNum = pstViConfig->as32WorkingViId[i]; + pstViInfo = &pstViConfig->astViInfo[s32ViNum]; + + s32Ret = SAMPLE_COMM_VI_StopIsp(pstViInfo); + + if (s32Ret != CVI_SUCCESS) { + SAMPLE_PRT("SAMPLE_COMM_VI_StopIsp failed !\n"); + return CVI_FAILURE; + } + } + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_StopIsp(SAMPLE_VI_INFO_S *pstViInfo) +{ + CVI_S32 ret = CVI_SUCCESS; + VI_PIPE ViPipe; + + for (CVI_U32 i = 0; i < WDR_MAX_PIPE_NUM; i++) { + if (pstViInfo->stPipeInfo.aPipe[i] >= 0 && pstViInfo->stPipeInfo.aPipe[i] < VI_MAX_PIPE_NUM) { + ViPipe = pstViInfo->stPipeInfo.aPipe[i]; + SAMPLE_COMM_ISP_Stop(ViPipe); + } + } + + return ret; +} + +CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(CVI_U32 u32SnsId, SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr) +{ + PIC_SIZE_E enPicSize; + SIZE_S stSize; + SNS_COMBO_DEV_ATTR_S stDevAttr; + ISP_SNS_OBJ_S *pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + + memcpy(pstViDevAttr, &DEV_ATTR_SENSOR_BASE, sizeof(VI_DEV_ATTR_S)); + + SAMPLE_COMM_VI_GetSizeBySensor(enSnsType, &enPicSize); + SAMPLE_COMM_SYS_GetPicSize(enPicSize, &stSize); + if (pstSnsObj) + pstSnsObj->pfnGetRxAttr(u32SnsId, &stDevAttr); + + pstViDevAttr->stSnrSize.u32Width = stDevAttr.img_size.width; + pstViDevAttr->stSnrSize.u32Height = stDevAttr.img_size.height; + pstViDevAttr->stSnrSize.u32StartX = stDevAttr.img_size.x; + pstViDevAttr->stSnrSize.u32StartY = stDevAttr.img_size.y; + pstViDevAttr->stSnrSize.u32ActiveW = stSize.u32Width; + pstViDevAttr->stSnrSize.u32ActiveH = stSize.u32Height; + pstViDevAttr->stWDRAttr.u32CacheLine = stSize.u32Height; + + // WDR mode + if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT) + pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE; + + // YUV Sensor + switch (enSnsType) { + case PIXELPLUS_PR2020_1M_25FPS_8BIT: + case PIXELPLUS_PR2020_1M_30FPS_8BIT: + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + case PIXELPLUS_PR2020_2M_30FPS_8BIT: + case PIXELPLUS_PR2100_2M_25FPS_8BIT: + case NEXTCHIP_N5_1M_2CH_25FPS_8BIT: + case NEXTCHIP_N5_2M_25FPS_8BIT: + case NEXTCHIP_N6_2M_4CH_25FPS_8BIT: + case PICO640_THERMAL_479P: + case PICO384_THERMAL_384X288: + case VIVO_MM308M2_2M_25FPS_8BIT: + case VIVO_MCS369_2M_30FPS_12BIT: + case VIVO_MCS369Q_4M_30FPS_12BIT: + case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT: + case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT: + pstViDevAttr->enDataSeq = VI_DATA_SEQ_UYVY; + pstViDevAttr->enInputDataType = VI_DATA_TYPE_YUV; + pstViDevAttr->enIntfMode = VI_MODE_MIPI_YUV422; + break; + default: + break; + }; + + // BT656 + switch (enSnsType) { + case PIXELPLUS_PR2020_1M_25FPS_8BIT: + case PIXELPLUS_PR2020_1M_30FPS_8BIT: + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + case PIXELPLUS_PR2020_2M_30FPS_8BIT: + case NEXTCHIP_N5_1M_2CH_25FPS_8BIT: + case NEXTCHIP_N5_2M_25FPS_8BIT: + pstViDevAttr->enIntfMode = VI_MODE_BT656; + break; + default: + break; + }; + + // BT1120 + switch (enSnsType) { + case VIVO_MCS369_2M_30FPS_12BIT: + case VIVO_MCS369Q_4M_30FPS_12BIT: + case VIVO_MM308M2_2M_25FPS_8BIT: + pstViDevAttr->enIntfMode = VI_MODE_BT1120_STANDARD; + break; + default: + break; + }; + + // subLVDS + switch (enSnsType) { + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT: + pstViDevAttr->enIntfMode = VI_MODE_LVDS; + break; + default: + break; + }; + + switch (enSnsType) { + // Sony + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_MIPI_2M_60FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_MIPI_2M_60FPS_12BIT: + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + case SONY_IMX335_MIPI_5M_60FPS_10BIT: + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + case SONY_IMX335_MIPI_4M_60FPS_10BIT: + case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT: + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT: + case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_2M_60FPS_10BIT: + case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SONY_IMX385_MIPI_2M_30FPS_12BIT: + case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX347_MIPI_4M_60FPS_12BIT: + case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1: + // GalaxyCore + case GCORE_GC2053_MIPI_2M_30FPS_10BIT: + case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT: + case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1: + case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + case GCORE_GC1054_MIPI_1M_30FPS_10BIT: + pstViDevAttr->enBayerFormat = BAYER_FORMAT_RG; + break; + case GCORE_GC4653_MIPI_4M_30FPS_10BIT: + case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT: + case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT: + case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT: + pstViDevAttr->enBayerFormat = BAYER_FORMAT_GR; + break; + default: + pstViDevAttr->enBayerFormat = BAYER_FORMAT_BG; + break; + }; + + // virtual channel for multi-ch +#ifndef ARCH_CV183X + switch (enSnsType) { + case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT: + pstViDevAttr->enWorkMode = VI_WORK_MODE_2Multiplex; + break; + case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT: + pstViDevAttr->enWorkMode = VI_WORK_MODE_4Multiplex; + break; + default: + pstViDevAttr->enWorkMode = VI_WORK_MODE_1Multiplex; + break; + } +#endif + + return CVI_SUCCESS; +} + +void SAMPLE_COMM_VI_GetSensorInfo(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 i; + + memset(pstViConfig, 0, sizeof(*pstViConfig)); + + for (i = 0; i < VI_MAX_DEV_NUM; i++) { + pstViConfig->astViInfo[i].stSnsInfo.s32SnsId = i; + pstViConfig->astViInfo[i].stSnsInfo.s32BusId = i; + pstViConfig->astViInfo[i].stSnsInfo.MipiDev = i; + // memset(&pstViConfig->astViInfo[i].stSnapInfo, 0, sizeof(SAMPLE_SNAP_INFO_S)); + pstViConfig->astViInfo[i].stPipeInfo.bMultiPipe = CVI_FALSE; + pstViConfig->astViInfo[i].stPipeInfo.bVcNumCfged = CVI_FALSE; + } + + pstViConfig->astViInfo[0].stSnsInfo.enSnsType = SONY_IMX290_MIPI_2M_60FPS_12BIT; + pstViConfig->astViInfo[1].stSnsInfo.enSnsType = SONY_IMX290_MIPI_2M_60FPS_12BIT; +} + +/****************************************************************************** + * funciton : Get enSize by diffrent sensor + ******************************************************************************/ +CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize) +{ + CVI_S32 s32Ret = CVI_SUCCESS; + + if (!penSize) + return CVI_FAILURE; + + switch (enMode) { + case SONY_IMX290_MIPI_1M_30FPS_12BIT: + case SOI_H65_MIPI_1M_30FPS_10BIT: + case PIXELPLUS_PR2020_1M_25FPS_8BIT: + case PIXELPLUS_PR2020_1M_30FPS_8BIT: + case NEXTCHIP_N5_1M_2CH_25FPS_8BIT: + case GCORE_GC1054_MIPI_1M_30FPS_10BIT: + case SONY_IMX327_MIPI_1M_30FPS_10BIT: + case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1: + *penSize = PIC_720P; + break; + case SONY_IMX290_MIPI_2M_60FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT: + case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1: + case SOI_F23_MIPI_2M_30FPS_10BIT: + case SOI_F35_MIPI_2M_30FPS_10BIT: + case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT: + case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1: + case SONY_IMX385_MIPI_2M_30FPS_12BIT: + case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1: + case VIVO_MM308M2_2M_25FPS_8BIT: + case NEXTCHIP_N5_2M_25FPS_8BIT: + case NEXTCHIP_N6_2M_4CH_25FPS_8BIT: + case PIXELPLUS_PR2020_2M_25FPS_8BIT: + case PIXELPLUS_PR2020_2M_30FPS_8BIT: + case PIXELPLUS_PR2100_2M_25FPS_8BIT: + case VIVO_MCS369_2M_30FPS_12BIT: + case SMS_SC200AI_MIPI_2M_30FPS_10BIT: + case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1: + case GCORE_GC2053_MIPI_2M_30FPS_10BIT: + case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT: + case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1: + case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1: + case SONY_IMX327_MIPI_2M_60FPS_12BIT: + case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT: + case SONY_IMX307_MIPI_2M_60FPS_12BIT: + case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT: + case SONY_IMX335_MIPI_2M_60FPS_10BIT: + case TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT: + case SONY_IMX335_MIPI_2M_30FPS_10BIT_WDR2TO1: + *penSize = PIC_1080P; + break; + case OV_OS08A20_MIPI_8M_30FPS_10BIT: + case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1: + case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT: + case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1: + case SONY_IMX334_MIPI_8M_30FPS_12BIT: + case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1: + case SMS_SC8238_MIPI_8M_30FPS_10BIT: + case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1: + case SMS_SC850SL_MIPI_8M_30FPS_12BIT: + case SMS_SC850SL_MIPI_8M_30FPS_10BIT_WDR2TO1: + *penSize = PIC_3840x2160; + break; + case OV_OS08A20_MIPI_5M_30FPS_10BIT: + case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1: + case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT: + case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_5M_30FPS_12BIT: + case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_5M_60FPS_10BIT: + *penSize = PIC_2592x1944; + break; + case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT: + case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1: + *penSize = PIC_2560x1600; + break; + case SONY_IMX335_MIPI_4M_30FPS_12BIT: + case SONY_IMX335_2L_MIPI_4M_30FPS_10BIT: + case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1: + case SONY_IMX335_MIPI_4M_60FPS_10BIT: + case SMS_SC4210_MIPI_4M_30FPS_12BIT: + case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1: + case OV_OS08A20_MIPI_4M_30FPS_10BIT: + case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1: + case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT: + case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1: + case GCORE_GC4653_MIPI_4M_30FPS_10BIT: + case GCORE_GC4653_SLAVE_MIPI_4M_30FPS_10BIT: + case SMS_SC500AI_MIPI_4M_30FPS_10BIT: + case SMS_SC401AI_MIPI_4M_30FPS_10BIT: + case TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT: + case VIVO_MCS369Q_4M_30FPS_12BIT: + *penSize = PIC_1440P; + break; + case PICO640_THERMAL_479P: + *penSize = PIC_479P; + break; + case PICO384_THERMAL_384X288: + *penSize = PIC_288P; + break; + case SMS_SC3335_MIPI_3M_30FPS_10BIT: + case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT: + case SMS_SC401AI_MIPI_3M_30FPS_10BIT: + *penSize = PIC_2304x1296; + break; + case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT: + case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT: + *penSize = PIC_1080P; + break; + case SONY_IMX347_MIPI_4M_60FPS_12BIT: + case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1: + /* fallthrough */ + case OV_OS04C10_MIPI_4M_30FPS_12BIT: + /* fallthrough */ + case OV_OS04C10_MIPI_4M_30FPS_10BIT_WDR2TO1: + /* fallthrough */ + case OV_OS04C10_SLAVE_MIPI_4M_30FPS_12BIT: + /* fallthrough */ + case OV_OS04C10_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1: + *penSize = PIC_2688x1520; + break; + case SMS_SC035HGS_MIPI_480P_120FPS_12BIT: + case SMS_SC035GS_MIPI_480P_120FPS_12BIT: + *penSize = PIC_640x480; + break; + case SMS_SC500AI_MIPI_5M_30FPS_10BIT: + case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT: + *penSize = PIC_2880x1620; + break; + default: + s32Ret = CVI_FAILURE; + break; + } + + return s32Ret; +} + +CVI_S32 SAMPLE_COMM_SYS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize) +{ + switch (enPicSize) { + case PIC_CIF: /* 352 * 288 */ + pstSize->u32Width = 352; + pstSize->u32Height = 288; + break; + + case PIC_D1_PAL: /* 720 * 576 */ + pstSize->u32Width = 720; + pstSize->u32Height = 576; + break; + + case PIC_D1_NTSC: /* 720 * 480 */ + pstSize->u32Width = 720; + pstSize->u32Height = 480; + break; + + case PIC_720P: /* 1280 * 720 */ + pstSize->u32Width = 1280; + pstSize->u32Height = 720; + break; + + case PIC_1080P: /* 1920 * 1080 */ + pstSize->u32Width = 1920; + pstSize->u32Height = 1080; + break; + + case PIC_1088: /* 1920 * 1088*/ + pstSize->u32Width = 1920; + pstSize->u32Height = 1088; + break; + + case PIC_1440P: /* 2560 * 1440 */ + pstSize->u32Width = 2560; + pstSize->u32Height = 1440; + break; + + case PIC_2304x1296: + pstSize->u32Width = 2304; + pstSize->u32Height = 1296; + break; + + case PIC_2592x1520: + pstSize->u32Width = 2592; + pstSize->u32Height = 1520; + break; + + case PIC_2560x1600: + pstSize->u32Width = 2560; + pstSize->u32Height = 1600; + break; + + case PIC_2592x1944: + pstSize->u32Width = 2592; + pstSize->u32Height = 1944; + break; + + case PIC_2592x1536: + pstSize->u32Width = 2592; + pstSize->u32Height = 1536; + break; + + case PIC_2688x1520: + pstSize->u32Width = 2688; + pstSize->u32Height = 1520; + break; + + case PIC_2716x1524: + pstSize->u32Width = 2716; + pstSize->u32Height = 1524; + break; + + case PIC_2880x1620: + pstSize->u32Width = 2880; + pstSize->u32Height = 1620; + break; + + case PIC_3844x1124: + pstSize->u32Width = 3844; + pstSize->u32Height = 1124; + break; + + case PIC_3840x2160: + pstSize->u32Width = 3840; + pstSize->u32Height = 2160; + break; + + case PIC_3000x3000: + pstSize->u32Width = 3000; + pstSize->u32Height = 3000; + break; + + case PIC_4000x3000: + pstSize->u32Width = 4000; + pstSize->u32Height = 3000; + break; + + case PIC_4096x2160: + pstSize->u32Width = 4096; + pstSize->u32Height = 2160; + break; + + case PIC_3840x8640: + pstSize->u32Width = 3840; + pstSize->u32Height = 8640; + break; + + case PIC_7688x1124: + pstSize->u32Width = 7688; + pstSize->u32Height = 1124; + break; + + case PIC_640x480: + pstSize->u32Width = 640; + pstSize->u32Height = 480; + break; + case PIC_479P: /* 632 * 479 */ + pstSize->u32Width = 632; + pstSize->u32Height = 479; + break; + case PIC_288P: /* 384 * 288 */ + pstSize->u32Width = 384; + pstSize->u32Height = 288; + break; + default: + return CVI_FAILURE; + } + + return CVI_SUCCESS; +} + +CVI_S32 SAMPLE_COMM_VI_StartSensor(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret, i; + CVI_U32 u32SnsId; + VI_PIPE ViPipe; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + + if (pstViConfig->s32WorkingViNum <= 0) { + printf("Error WorkingViNum = %d\n", pstViConfig->s32WorkingViNum); + return CVI_FAILURE; + } + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + s32Ret = SAMPLE_COMM_ISP_SetSnsObj(u32SnsId, pstViInfo->stSnsInfo.enSnsType); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "update sensor obj(%d) failed!\n", u32SnsId); + return s32Ret; + } + s32Ret = SAMPLE_COMM_ISP_SetSnsInit(u32SnsId, pstViInfo->stSnsInfo.u8HwSync); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "update sensor(%d) hwsync failed !\n", u32SnsId); + return s32Ret; + } + s32Ret = SAMPLE_COMM_ISP_PatchSnsObj(u32SnsId, &pstViInfo->stSnsInfo); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "patch rx attr(%d) failed!\n", u32SnsId); + return s32Ret; + } + s32Ret = SAMPLE_COMM_ISP_Sensor_Regiter_callback(ViPipe, u32SnsId, pstViInfo->stSnsInfo.s32BusId, + pstViInfo->stSnsInfo.s32SnsI2cAddr); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d register callback failed!\n", i); + return s32Ret; + } + } + s32Ret = SAMPLE_COMM_ISP_SetSensorMode(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "sensor %d register callback failed!\n", i); + return s32Ret; + } + return s32Ret; +} + +#if 0 +CVI_S32 SAMPLE_COMM_VI_StartMIPI(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + CVI_S32 s32Ret = CVI_SUCCESS, i; + VI_PIPE ViPipe; + CVI_U32 u32SnsId; + SNS_COMBO_DEV_ATTR_S stDevAttr; + SAMPLE_VI_INFO_S *pstViInfo = CVI_NULL; + const ISP_SNS_OBJ_S *pstSnsObj; + + /*TODO@CF. Need add sample function.*/ + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + pstViInfo = &pstViConfig->astViInfo[i]; + ViPipe = pstViInfo->stPipeInfo.aPipe[0]; + u32SnsId = pstViInfo->stSnsInfo.s32SnsId; + pstSnsObj = (ISP_SNS_OBJ_S *)SAMPLE_COMM_ISP_GetSnsObj(u32SnsId); + pstSnsObj->pfnGetRxAttr(ViPipe, &stDevAttr); + SAMPLE_PRT("sensor %d stDevAttr.devno %d\n", i, stDevAttr.devno); + pstViInfo->stSnsInfo.MipiDev = stDevAttr.devno; + } + s32Ret = SAMPLE_COMM_VI_ResetSensor(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "ResetSensor failed! with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = SAMPLE_COMM_VI_ResetMipi(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "ResetMipi failed! with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = SAMPLE_COMM_VI_SetMipiAttr(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_VI_SetMipiAttr failed! with %#x!\n", s32Ret); + return s32Ret; + } + + s32Ret = SAMPLE_COMM_VI_EnableSensorClock(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "EnableSensorClock failed! with %#x!\n", s32Ret); + return s32Ret; + } + + usleep(20); + s32Ret = SAMPLE_COMM_VI_UnresetSensor(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "UnresetSensor failed! with %#x!\n", s32Ret); + return s32Ret; + } + return s32Ret; +} + +CVI_S32 SAMPLE_PLAT_VI_INIT(SAMPLE_VI_CONFIG_S *pstViConfig) +{ + PIC_SIZE_E enPicSize; + SIZE_S stSize; + + VI_DEV ViDev = 0; + VI_PIPE ViPipe = 0; + VI_PIPE_ATTR_S stPipeAttr; + + CVI_S32 s32Ret = CVI_SUCCESS; + CVI_S32 i = 0, j = 0; + CVI_S32 s32DevNum; + + memcpy((void *)&stViConfigSys, (void *)pstViConfig, sizeof(SAMPLE_VI_CONFIG_S)); + + /************************************************ + * step1: Get input size + ************************************************/ + s32Ret = SAMPLE_COMM_VI_GetSizeBySensor(pstViConfig->astViInfo[ViDev].stSnsInfo.enSnsType, &enPicSize); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_VI_GetSizeBySensor failed with %#x\n", s32Ret); + goto error; + } + + s32Ret = SAMPLE_COMM_SYS_GetPicSize(enPicSize, &stSize); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "SAMPLE_COMM_SYS_GetPicSize failed with %#x\n", s32Ret); + goto error; + } + + + /************************************************ + * step2: Init VI ISP + ************************************************/ + s32Ret = SAMPLE_COMM_VI_StartSensor(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "system start sensor failed with %#x\n", s32Ret); + goto error; + } + + // for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + // ViDev = i; + + // s32Ret = SAMPLE_COMM_VI_StartDev(&pstViConfig->astViInfo[ViDev]); + // if (s32Ret != CVI_SUCCESS) { + // CVI_TRACE_LOG(CVI_DBG_ERR, "VI_StartDev failed with %#x!\n", s32Ret); + // goto error; + // } + // } + + s32Ret = SAMPLE_COMM_VI_StartMIPI(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "system start MIPI failed with %#x\n", s32Ret); + goto error; + } + + s32Ret = SAMPLE_COMM_VI_SensorProbe(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "system sensor probe failed with %#x\n", s32Ret); + goto error; + } + + stPipeAttr.bYuvSkip = CVI_FALSE; + stPipeAttr.u32MaxW = stSize.u32Width; + stPipeAttr.u32MaxH = stSize.u32Height; + stPipeAttr.enPixFmt = PIXEL_FORMAT_RGB_BAYER_12BPP; + stPipeAttr.enBitWidth = DATA_BITWIDTH_12; + stPipeAttr.stFrameRate.s32SrcFrameRate = -1; + stPipeAttr.stFrameRate.s32DstFrameRate = -1; + stPipeAttr.bNrEn = CVI_TRUE; + stPipeAttr.bYuvBypassPath = CVI_FALSE; + stPipeAttr.enCompressMode = pstViConfig->astViInfo[0].stChnInfo.enCompressMode; + + for (i = 0; i < pstViConfig->s32WorkingViNum; i++) { + SAMPLE_VI_INFO_S *pstViInfo = NULL; + + s32DevNum = pstViConfig->as32WorkingViId[i]; + pstViInfo = &pstViConfig->astViInfo[s32DevNum]; + + if ((pstViInfo->stSnsInfo.enSnsType == PICO640_THERMAL_479P) || + (pstViInfo->stSnsInfo.enSnsType == TECHPOINT_TP2850_MIPI_2M_30FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == TECHPOINT_TP2850_MIPI_4M_30FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == VIVO_MCS369Q_4M_30FPS_12BIT) || + (pstViInfo->stSnsInfo.enSnsType == VIVO_MCS369_2M_30FPS_12BIT) || + (pstViInfo->stSnsInfo.enSnsType == VIVO_MM308M2_2M_25FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == NEXTCHIP_N5_2M_25FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_1M_25FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_1M_30FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_2M_25FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2020_2M_30FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2100_2M_25FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT) || + (pstViInfo->stSnsInfo.enSnsType == PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT)) { + stPipeAttr.bYuvBypassPath = CVI_TRUE; + } else { + stPipeAttr.bYuvBypassPath = CVI_FALSE; + } + + for (j = 0; j < WDR_MAX_PIPE_NUM; j++) { + if (pstViInfo->stPipeInfo.aPipe[j] >= 0 && pstViInfo->stPipeInfo.aPipe[j] < VI_MAX_PIPE_NUM) { + ViPipe = pstViInfo->stPipeInfo.aPipe[j]; + s32Ret = CVI_VI_CreatePipe(ViPipe, &stPipeAttr); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_CreatePipe failed with %#x!\n", s32Ret); + goto error; + } + + s32Ret = CVI_VI_StartPipe(ViPipe); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_StartPipe failed with %#x!\n", s32Ret); + goto error; + } + + s32Ret = CVI_VI_GetPipeAttr(ViPipe, &stPipeAttr); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "CVI_VI_GetPipeAttr failed with %#x!\n", s32Ret); + goto error; + } + } + } + } + + s32Ret = SAMPLE_COMM_VI_CreateIsp(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "VI_CreateIsp failed with %#x!\n", s32Ret); + goto error; + } + + s32Ret = SAMPLE_COMM_VI_StartViChn(pstViConfig); + if (s32Ret != CVI_SUCCESS) { + CVI_TRACE_LOG(CVI_DBG_ERR, "VI_StartViChn failed with %#x!\n", s32Ret); + goto error; + } + + return s32Ret; +error: + // _SAMPLE_PLAT_ERR_Exit(); + return s32Ret; +} +#endif diff --git a/freertos/cvitek/task/main/CMakeLists.txt b/freertos/cvitek/task/main/CMakeLists.txt new file mode 100644 index 000000000..2d7113f8f --- /dev/null +++ b/freertos/cvitek/task/main/CMakeLists.txt @@ -0,0 +1,51 @@ +file(GLOB _SOURCES "src/*.c" "*.S") + +# try to find out the include folder recursively under CMAKE_INSTALL_PREFIX folder +MACRO(HEADER_DIRECTORIES return_list) + FILE(GLOB_RECURSE new_list ${CMAKE_INSTALL_PREFIX}/*.h) + SET(dir_list "") + FOREACH(file_path ${new_list}) + GET_FILENAME_COMPONENT(dir_path ${file_path} PATH) + SET(dir_list ${dir_list} ${dir_path}) + ENDFOREACH() + LIST(REMOVE_DUPLICATES dir_list) + SET(${return_list} ${dir_list}) +ENDMACRO() + +HEADER_DIRECTORIES(header_dir_list) +list(LENGTH header_dir_list header_dir_list_count) + +include_directories(include) +include_directories(${header_dir_list}) + +if (RUN_TYPE STREQUAL "CVIRTOS") +if (CHIP STREQUAL "cv1835") + set(CVI_TASK_LIBS common isp vip display vcodec) + set(EXTRA_LIBS ${EXTRA_LIBS} "${TOP_DIR}/driver/venc/vc/vcodec/codebase/vpuapi/coda9/980_roi_rc_lib/libroirc_aarch64.a") +elseif (CHIP STREQUAL "cv181x" OR CHIP STREQUAL "cv180x") +if (CONFIG_FAST_IMAGE_TYPE STRGREATER "0") + set(CVI_TASK_LIBS comm isp vi vcodec rgn audio camera) +else() + set(CVI_TASK_LIBS comm rgn audio) +endif() +endif() +else() + set(CVI_TASK_LIBS demo) +endif() + +# search library from install/lib folder +file(GLOB_RECURSE CVI_LIBS ${CMAKE_INSTALL_PREFIX}/*.a) + +set(LINKER_SCRIPT "${TOP_DIR}/scripts/${CHIP}_lscript.ld") +set(EXTRA_LIBS ${EXTRA_LIBS} "-L${BUILD_ENV_PATH}/output/$ENV{PROJECT_FULLNAME}") +set(EXTRA_LIBS ${EXTRA_LIBS} m c gcc sim) +set(CMAKE_EXE_LINKER_FLAGS -T${LINKER_SCRIPT} ) + +link_directories("${TOP_DIR}/install/lib") + +add_executable(cvirtos.elf ${_SOURCES}) + +target_link_libraries(cvirtos.elf PRIVATE -Wl,--start-group ${CVI_TASK_LIBS} ${CVI_LIBS} ${EXTRA_LIBS} -Wl,--end-group -Wl,-Map=cvirtos.map) + +install(TARGETS cvirtos.elf DESTINATION bin) +install(FILES ${CMAKE_BINARY_DIR}/cvirtos.map DESTINATION bin) diff --git a/freertos/cvitek/task/main/src/FreeRTOS_asm_vectors.S b/freertos/cvitek/task/main/src/FreeRTOS_asm_vectors.S new file mode 100644 index 000000000..597614937 --- /dev/null +++ b/freertos/cvitek/task/main/src/FreeRTOS_asm_vectors.S @@ -0,0 +1,308 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file asm_vectors.s +* +* This file contains the initial vector table for the Cortex A53 processor +* Currently NEON registers are not saved on stack if interrupt is taken. +* It will be implemented. +* +* <pre> +* MODIFICATION HISTORY: +* +* Ver Who Date Changes +* ----- ------- -------- --------------------------------------------------- +* 5.00 pkp 5/21/14 Initial version +* </pre> +* +* @note +* +* None. +* +******************************************************************************/ + + + +.org 0 +.text + +.globl _boot +.globl _vector_table +.globl _freertos_vector_table + +.globl FIQInterrupt +.globl IRQInterrupt +.globl SErrorInterrupt +.globl SynchronousInterrupt + + +.org 0 + +.section .vectors, "a" + +_vector_table: + +.set VBAR, _vector_table + +.org VBAR + b _boot + +.org (VBAR + 0x80) + b . + +.org (VBAR + 0x100) + b . + +.org (VBAR + 0x180) + b . + + +.org (VBAR + 0x200) + b . + +.org (VBAR + 0x280) + b . + +.org (VBAR + 0x300) + b . + +.org (VBAR + 0x380) + b . + + + +.org (VBAR + 0x400) + b . + +.org (VBAR + 0x480) + b . + +.org (VBAR + 0x500) + b . + +.org (VBAR + 0x580) + b . + +.org (VBAR + 0x600) + b . + +.org (VBAR + 0x680) + b . + +.org (VBAR + 0x700) + b . + +.org (VBAR + 0x780) + b . + + + +/****************************************************************************** + * Vector table to use when FreeRTOS is running. + *****************************************************************************/ +.set FREERTOS_VBAR, (VBAR+0x1000) + +.org(FREERTOS_VBAR) +_freertos_vector_table: + b FreeRTOS_SWI_Handler + +.org (FREERTOS_VBAR + 0x80) + b FreeRTOS_IRQ_Handler + +.org (FREERTOS_VBAR + 0x100) + b . + +.org (FREERTOS_VBAR + 0x180) + b . + +.org (FREERTOS_VBAR + 0x200) + b FreeRTOS_SWI_Handler + +.org (FREERTOS_VBAR + 0x280) + b FreeRTOS_IRQ_Handler + +.org (FREERTOS_VBAR + 0x300) + b . + +.org (FREERTOS_VBAR + 0x380) + b . + +.org (FREERTOS_VBAR + 0x400) + b . + +.org (FREERTOS_VBAR + 0x480) + b . + +.org (FREERTOS_VBAR + 0x500) + b . + +.org (FREERTOS_VBAR + 0x580) + b . + +.org (FREERTOS_VBAR + 0x600) + b . + +.org (FREERTOS_VBAR + 0x680) + b . + +.org (FREERTOS_VBAR + 0x700) + b . + +.org (FREERTOS_VBAR + 0x780) + b . + +.org (FREERTOS_VBAR + 0x800) + + + +#if 0 +SynchronousInterruptHandler: + stp X0,X1, [sp,#-0x10]! + stp X2,X3, [sp,#-0x10]! + stp X4,X5, [sp,#-0x10]! + stp X6,X7, [sp,#-0x10]! + stp X8,X9, [sp,#-0x10]! + stp X10,X11, [sp,#-0x10]! + stp X12,X13, [sp,#-0x10]! + stp X14,X15, [sp,#-0x10]! + stp X16,X17, [sp,#-0x10]! + stp X18,X19, [sp,#-0x10]! + stp X29,X30, [sp,#-0x10]! + + bl SynchronousInterrupt + + ldp X29,X30, [sp], #0x10 + ldp X18,X19, [sp], #0x10 + ldp X16,X17, [sp], #0x10 + ldp X14,X15, [sp], #0x10 + ldp X12,X13, [sp], #0x10 + ldp X10,X11, [sp], #0x10 + ldp X8,X9, [sp], #0x10 + ldp X6,X7, [sp], #0x10 + ldp X4,X5, [sp], #0x10 + ldp X2,X3, [sp], #0x10 + ldp X0,X1, [sp], #0x10 + + eret + +IRQInterruptHandler: + stp X0,X1, [sp,#-0x10]! + stp X2,X3, [sp,#-0x10]! + stp X4,X5, [sp,#-0x10]! + stp X6,X7, [sp,#-0x10]! + stp X8,X9, [sp,#-0x10]! + stp X10,X11, [sp,#-0x10]! + stp X12,X13, [sp,#-0x10]! + stp X14,X15, [sp,#-0x10]! + stp X16,X17, [sp,#-0x10]! + stp X18,X19, [sp,#-0x10]! + stp X29,X30, [sp,#-0x10]! + + bl IRQInterrupt + + ldp X29,X30, [sp], #0x10 + ldp X18,X19, [sp], #0x10 + ldp X16,X17, [sp], #0x10 + ldp X14,X15, [sp], #0x10 + ldp X12,X13, [sp], #0x10 + ldp X10,X11, [sp], #0x10 + ldp X8,X9, [sp], #0x10 + ldp X6,X7, [sp], #0x10 + ldp X4,X5, [sp], #0x10 + ldp X2,X3, [sp], #0x10 + ldp X0,X1, [sp], #0x10 + + eret + +FIQInterruptHandler: + + stp X0,X1, [sp,#-0x10]! + stp X2,X3, [sp,#-0x10]! + stp X4,X5, [sp,#-0x10]! + stp X6,X7, [sp,#-0x10]! + stp X8,X9, [sp,#-0x10]! + stp X10,X11, [sp,#-0x10]! + stp X12,X13, [sp,#-0x10]! + stp X14,X15, [sp,#-0x10]! + stp X16,X17, [sp,#-0x10]! + stp X18,X19, [sp,#-0x10]! + stp X29,X30, [sp,#-0x10]! + + bl FIQInterrupt + + ldp X29,X30, [sp], #0x10 + ldp X18,X19, [sp], #0x10 + ldp X16,X17, [sp], #0x10 + ldp X14,X15, [sp], #0x10 + ldp X12,X13, [sp], #0x10 + ldp X10,X11, [sp], #0x10 + ldp X8,X9, [sp], #0x10 + ldp X6,X7, [sp], #0x10 + ldp X4,X5, [sp], #0x10 + ldp X2,X3, [sp], #0x10 + ldp X0,X1, [sp], #0x10 + + eret + +SErrorInterruptHandler: + + stp X0,X1, [sp,#-0x10]! + stp X2,X3, [sp,#-0x10]! + stp X4,X5, [sp,#-0x10]! + stp X6,X7, [sp,#-0x10]! + stp X8,X9, [sp,#-0x10]! + stp X10,X11, [sp,#-0x10]! + stp X12,X13, [sp,#-0x10]! + stp X14,X15, [sp,#-0x10]! + stp X16,X17, [sp,#-0x10]! + stp X18,X19, [sp,#-0x10]! + stp X29,X30, [sp,#-0x10]! + + bl SErrorInterrupt + + ldp X29,X30, [sp], #0x10 + ldp X18,X19, [sp], #0x10 + ldp X16,X17, [sp], #0x10 + ldp X14,X15, [sp], #0x10 + ldp X12,X13, [sp], #0x10 + ldp X10,X11, [sp], #0x10 + ldp X8,X9, [sp], #0x10 + ldp X6,X7, [sp], #0x10 + ldp X4,X5, [sp], #0x10 + ldp X2,X3, [sp], #0x10 + ldp X0,X1, [sp], #0x10 + + eret +#endif + +.end diff --git a/freertos/cvitek/task/main/src/FreeRTOS_tick_config.c b/freertos/cvitek/task/main/src/FreeRTOS_tick_config.c new file mode 100644 index 000000000..3e2d26566 --- /dev/null +++ b/freertos/cvitek/task/main/src/FreeRTOS_tick_config.c @@ -0,0 +1,143 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifdef __riscv + +#else +/* FreeRTOS includes. */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +#include "task.h" + +/* Xilinx includes. */ +//#include "xttcps.h" +#include "xscugic.h" + +/* Timer used to generate the tick interrupt. */ +//static XTtcPs xRTOSTickTimerInstance; + +/*-----------------------------------------------------------*/ + +void vConfigureTickInterrupt(void) +{ + //poshiun ttcp??? + BaseType_t xStatus; + //XTtcPs_Config *pxTimerConfiguration; + //XInterval usInterval; + uint8_t ucPrescale; + const uint8_t ucLevelSensitive = 1; + extern XScuGic xInterruptController; + + // pxTimerConfiguration = XTtcPs_LookupConfig( XPAR_XTTCPS_0_DEVICE_ID ); + // configASSERT( pxTimerConfiguration ); + +#if 0 + /* Initialise the device. */ + xStatus = XTtcPs_CfgInitialize( &xRTOSTickTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress ); + + if( xStatus != XST_SUCCESS ) + { + /* Not sure how to do this before XTtcPs_CfgInitialize is called as + *xRTOSTickTimerInstance is set within XTtcPs_CfgInitialize(). */ + XTtcPs_Stop( &xRTOSTickTimerInstance ); + xStatus = XTtcPs_CfgInitialize( &xRTOSTickTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress ); + configASSERT( xStatus == XST_SUCCESS ); + } + + /* Set the options. */ + XTtcPs_SetOptions( &xRTOSTickTimerInstance, ( XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE ) ); + + /* Derive values from the tick rate. */ + XTtcPs_CalcIntervalFromFreq( &xRTOSTickTimerInstance, configTICK_RATE_HZ, &( usInterval ), &( ucPrescale ) ); + + /* Set the interval and prescale. */ + XTtcPs_SetInterval( &xRTOSTickTimerInstance, usInterval ); + XTtcPs_SetPrescaler( &xRTOSTickTimerInstance, ucPrescale ); +#endif + /* The priority must be the lowest possible. */ + XScuGic_SetPriorityTriggerType( + &xInterruptController, CNTP_TIMER_0_INT_ID, + portLOWEST_USABLE_INTERRUPT_PRIORITY << portPRIORITY_SHIFT, + ucLevelSensitive); + + /* Connect to the interrupt controller. */ + xStatus = XScuGic_Connect(&xInterruptController, CNTP_TIMER_0_INT_ID, + (Xil_ExceptionHandler)FreeRTOS_Tick_Handler, + (void *)NULL); + //xStatus = XScuGic_Connect( &xInterruptController, CNTP_TIMER_0_INT_ID, (Xil_ExceptionHandler) FreeRTOS_Tick_Handler, ( void * ) &xRTOSTickTimerInstance ); + configASSERT(xStatus == XST_SUCCESS); + + /* Enable the interrupt in the GIC. */ + XScuGic_Enable(&xInterruptController, CNTP_TIMER_0_INT_ID); + + /* Enable the interrupts in the timer and sart the timer. */ + XTime_StartTimer(); +} +/*-----------------------------------------------------------*/ + +void vClearTickInterrupt(void) +{ + volatile uint32_t ulInterruptStatus; + + /* Read the interrupt status, then write it back to clear the interrupt. */ + //ulInterruptStatus = XTtcPs_GetInterruptStatus( &xRTOSTickTimerInstance ); + //XTtcPs_ClearInterruptStatus( &xRTOSTickTimerInstance, ulInterruptStatus ); + /* hardcore now, need to implement later*/ + int *gicd_icpend_addr = 0x1F01280; + int *gicc_eoir_addr = 0x1F02010; + *gicc_eoir_addr = 30; + *gicd_icpend_addr = 0x40000000; + + __asm volatile("DSB SY"); + __asm volatile("ISB SY"); + // reset tick + XTime_ResetTimer(); +} +/*-----------------------------------------------------------*/ + +void vApplicationIRQHandler(uint32_t ulICCIAR) +{ + extern const XScuGic_Config XScuGic_ConfigTable[]; + static const XScuGic_VectorTableEntry *pxVectorTable = + XScuGic_ConfigTable[XPAR_SCUGIC_SINGLE_DEVICE_ID].HandlerTable; + uint32_t ulInterruptID; + const XScuGic_VectorTableEntry *pxVectorEntry; + + /* Interrupts cannot be re-enabled until the source of the interrupt is + cleared. The ID of the interrupt is obtained by bitwise ANDing the ICCIAR + value with 0x3FF. */ + ulInterruptID = ulICCIAR & 0x3FFUL; + if (ulInterruptID < XSCUGIC_MAX_NUM_INTR_INPUTS) { + /* Call the function installed in the array of installed handler + functions. */ + pxVectorEntry = &(pxVectorTable[ulInterruptID]); + configASSERT(pxVectorEntry); + pxVectorEntry->Handler(pxVectorEntry->irqn, pxVectorEntry->CallBackRef); + + } +} +#endif diff --git a/freertos/cvitek/task/main/src/main.c b/freertos/cvitek/task/main/src/main.c new file mode 100644 index 000000000..7cbb418aa --- /dev/null +++ b/freertos/cvitek/task/main/src/main.c @@ -0,0 +1,317 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/****************************************************************************** + * + * See http://www.FreeRTOS.org/RTOS-Xilinx-UltraScale_MPSoC_64-bit.html for + * additional information on this demo. + * + * NOTE 1: This project provides two demo applications. A simple blinky + * style project, and a more comprehensive test and demo application. The + * RUN_TYPE in build.sh setting in main.c is used to select between the two. + * See the notes on using RUN_TYPE in build.sh where it is defined below. + * + * NOTE 2: This file only contains the source code that is not specific to + * either the simply blinky or full demos - this includes initialisation code + * and callback functions. + * + * NOTE 3: This project builds the FreeRTOS source code, so is expecting the + * BSP project to be configured as a 'standalone' bsp project rather than a + * 'FreeRTOS' bsp project. However the BSP project MUST still be build with + * the FREERTOS_BSP symbol defined (-DFREERTOS_BSP must be added to the + * command line in the BSP configuration). + */ +#ifdef __riscv +/* Standard includes. */ +#include <stdio.h> +/* Scheduler include files. */ +#include "FreeRTOS.h" +#include "task.h" + +#else +#include "linux/types.h" +/* Scheduler include files. */ +#include "FreeRTOS_POSIX.h" +#include "task.h" + +/* Xilinx includes. */ +#include "xscugic.h" +#if ( configUSE_TRACE_FACILITY == 1 ) +#include "trcRecorder.h" +#endif + +/* The interrupt controller is initialised in this file, and made available to +other modules. */ +XScuGic xInterruptController; + +#endif +// #include "sleep.h" + +/* RUN_TYPE in build.sh is used to select between two demo applications, + * as described at the top of this file. + * + * When RUN_TYPE is set to BLINKY_DEMO the simple blinky example will + * be run. + * + * When RUN_TYPE is set to FULL_DEMO the comprehensive test and demo + * application will be run. + */ + +/*-----------------------------------------------------------*/ + +/* + * Configure the hardware as necessary to run this demo. + */ +static void prvSetupHardware(void); + +/* + * See the comments at the top of this file and above the + * RUN_TYPE in build.sh definition. + */ +#ifdef CVIRTOS +extern void main_cvirtos(void); +#elif defined BLINKY_DEMO +extern void main_blinky(void); +#elif defined FULL_DEMO +extern void main_full(void); +#elif defined POSIX_DEMO +extern void main_posix(void); +#else +#error Invalid RUN_TYPE setting in build.sh. See the comments at the top of this file and above the RUN_TYPE definition. +#endif + +/* Prototypes for the standard FreeRTOS callback/hook functions implemented +within this file. */ +void vApplicationMallocFailedHook(void); +void vApplicationIdleHook(void); +void vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName); +void vApplicationTickHook(void); + +/* configAPPLICATION_ALLOCATED_HEAP is set to 1 in FreeRTOSConfig.h so the +application can define the array used as the FreeRTOS heap. This is done so the +heap can be forced into fast internal RAM - useful because the stacks used by +the tasks come from this space. */ +#ifdef configAPPLICATION_ALLOCATED_HEAP +uint8_t ucHeap[ configTOTAL_HEAP_SIZE ] __attribute__ ( ( section( ".heap" ) ) ); +#endif +/*-----------------------------------------------------------*/ + +int main(void) +{ + pre_system_init(); + printf("CVIRTOS Build Date:%s (Time :%s) \n", __DATE__, __TIME__); +#ifndef __riscv + mmu_enable(); + printf("enable I/D cache & MMU done\n"); +#endif + /* Configure the hardware ready to run the demo. */ + prvSetupHardware(); +#if ( configUSE_TRACE_FACILITY == 1 ) + vTraceEnable(TRC_START); +#endif + post_system_init(); + +#ifdef CVIRTOS + { + main_cvirtos(); + } +#elif defined BLINKY_DEMO + { + main_blinky(); + } +#elif defined FULL_DEMO + { + main_full(); + } +#elif defined POSIX_DEMO + { + main_posix(); + } +#else +#error "Not correct running definition" +#endif + + /* Don't expect to reach here. */ + return 0; +} +/*-----------------------------------------------------------*/ + +static void prvSetupHardware(void) +{ +#ifdef __riscv +#else + BaseType_t xStatus; + XScuGic_Config *pxGICConfig; + + /* Ensure no interrupts execute while the scheduler is in an inconsistent + state. Interrupts are automatically enabled when the scheduler is + started. */ + portDISABLE_INTERRUPTS(); + + /* Obtain the configuration of the GIC. */ + pxGICConfig = XScuGic_LookupConfig(XPAR_SCUGIC_SINGLE_DEVICE_ID); + + /* Sanity check the FreeRTOSConfig.h settings are correct for the + hardware. */ + configASSERT(pxGICConfig); + configASSERT(pxGICConfig->CpuBaseAddress == + (configINTERRUPT_CONTROLLER_BASE_ADDRESS + + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET)); + configASSERT(pxGICConfig->DistBaseAddress == + configINTERRUPT_CONTROLLER_BASE_ADDRESS); + + /* Install a default handler for each GIC interrupt. */ + xStatus = XScuGic_CfgInitialize(&xInterruptController, pxGICConfig, + pxGICConfig->CpuBaseAddress); + configASSERT(xStatus == XST_SUCCESS); + (void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */ +#endif +} +/*-----------------------------------------------------------*/ + +void vApplicationMallocFailedHook(void) +{ + /* Called if a call to pvPortMalloc() fails because there is insufficient + free memory available in the FreeRTOS heap. pvPortMalloc() is called + internally by FreeRTOS API functions that create tasks, queues, software + timers, and semaphores. The size of the FreeRTOS heap is set by the + configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */ + taskDISABLE_INTERRUPTS(); + dump_uart_disable(); + printf("vApplicationMallocFailedHook\n"); + for (;;) + ; +} +/*-----------------------------------------------------------*/ + +void vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName) +{ + (void)pcTaskName; + (void)pxTask; + dump_uart_disable(); + printf("%s %s\n", __func__, pcTaskName); + /* Run time stack overflow checking is performed if + configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + function is called if a stack overflow is detected. */ + taskDISABLE_INTERRUPTS(); + for (;;) + ; +} +/*-----------------------------------------------------------*/ + +void vApplicationIdleHook(void) +{ + volatile size_t xFreeHeapSpace; + + /* This is just a trivial example of an idle hook. It is called on each + cycle of the idle task. It must *NOT* attempt to block. In this case the + idle task just queries the amount of FreeRTOS heap that remains. See the + memory management section on the http://www.FreeRTOS.org web site for memory + management options. If there is a lot of heap memory free then the + configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up + RAM. */ + xFreeHeapSpace = xPortGetFreeHeapSize(); + + /* Remove compiler warning about xFreeHeapSpace being set but never used. */ + (void)xFreeHeapSpace; +} +/*-----------------------------------------------------------*/ + +void vApplicationTickHook(void) +{ +#ifdef FULL_DEMO + { + /* Only the comprehensive demo actually uses the tick hook. */ + extern void vFullDemoTickHook(void); + vFullDemoTickHook(); + } +#endif +} +/*-----------------------------------------------------------*/ + +/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an +implementation of vApplicationGetIdleTaskMemory() to provide the memory that is +used by the Idle task. */ +void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, + StackType_t **ppxIdleTaskStackBuffer, + uint32_t *pulIdleTaskStackSize) +{ + /* If the buffers to be provided to the Idle task are declared inside this +function then they must be declared static - otherwise they will be allocated on +the stack and so not exists after this function exits. */ + static StaticTask_t xIdleTaskTCB; + static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE]; + + /* Pass out a pointer to the StaticTask_t structure in which the Idle task's + state will be stored. */ + *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; + + /* Pass out the array that will be used as the Idle task's stack. */ + *ppxIdleTaskStackBuffer = uxIdleTaskStack; + + /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer. + Note that, as the array is necessarily of type StackType_t, + configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; +} +/*-----------------------------------------------------------*/ + +/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the +application must provide an implementation of vApplicationGetTimerTaskMemory() +to provide the memory that is used by the Timer service task. */ +void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer, + StackType_t **ppxTimerTaskStackBuffer, + uint32_t *pulTimerTaskStackSize) +{ + /* If the buffers to be provided to the Timer task are declared inside this +function then they must be declared static - otherwise they will be allocated on +the stack and so not exists after this function exits. */ + static StaticTask_t xTimerTaskTCB; + static StackType_t uxTimerTaskStack[configTIMER_TASK_STACK_DEPTH]; + + /* Pass out a pointer to the StaticTask_t structure in which the Timer + task's state will be stored. */ + *ppxTimerTaskTCBBuffer = &xTimerTaskTCB; + + /* Pass out the array that will be used as the Timer task's stack. */ + *ppxTimerTaskStackBuffer = uxTimerTaskStack; + + /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer. + Note that, as the array is necessarily of type StackType_t, + configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; +} +/*-----------------------------------------------------------*/ + +void vMainAssertCalled(const char *pcFileName, uint32_t ulLineNumber) +{ + dump_uart_disable(); + printf("ASSERT! Line %d of file %s\r\n", ulLineNumber, pcFileName); + taskENTER_CRITICAL(); + for (;;) + ; +} diff --git a/freertos/cvitek/task/rgn/CMakeLists.txt b/freertos/cvitek/task/rgn/CMakeLists.txt new file mode 100644 index 000000000..28e67ec79 --- /dev/null +++ b/freertos/cvitek/task/rgn/CMakeLists.txt @@ -0,0 +1,14 @@ +file(GLOB _SOURCES "src/${RUN_ARCH}/*.c") + +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rgn) +include_directories(../comm/include) + +add_library(rgn STATIC ${_SOURCES}) +install(TARGETS rgn DESTINATION lib) + diff --git a/freertos/cvitek/task/rgn/include/rgn_main.h b/freertos/cvitek/task/rgn/include/rgn_main.h new file mode 100644 index 000000000..7aa9c62ce --- /dev/null +++ b/freertos/cvitek/task/rgn/include/rgn_main.h @@ -0,0 +1,83 @@ +#ifndef __RGN_MAIN_H__ +#define __RGN_MAIN_H__ + +#include <cvi_comm_video.h> +#include "cvi_comm_osdc.h" + +#ifdef __cplusplus +#if __cplusplus + extern "C" { +#endif +#endif + +#define RGN_CMPR_MAX_OBJ_NUM 10 +#define RGN_CMPR_MIN_SIZE 128000 + +typedef enum _CMDQU_CB_CMD_E { + CMDQU_CB_RGN_COMPRESS, + CMDQU_CB_RGN_GET_COMPRESS_SIZE, + CMDQU_CB_RGN_COMPRESS_DONE, + CMDQU_CB_MAX +} CMDQU_CB_CMD_E; + +typedef enum _RGN_CMPR_FORMAT_E { + CMPR_ARGB8888 = 0, + CMPR_ARGB4444 = 4, + CMPR_ARGB1555 = 5, + CMPR_LUT8 = 8, + CMPR_LUT4 = 10, + NUM_OF_CMPR_FORMAT +} RGN_CMPR_FORMAT_E; + +typedef enum _RGN_CMPR_TYPE_E { + RGN_CMPR_RECT = 0, + RGN_CMPR_BIT_MAP, + RGN_CMPR_LINE, + RGN_CMPR_BUTT +} RGN_CMPR_TYPE_E; + +typedef struct _RGN_LINE_ATTR_S { + POINT_S stPointStart; + POINT_S stPointEnd; + CVI_U32 u32Thick; + CVI_U32 u32Color; +} RGN_LINE_ATTR_S; + +typedef struct _RGN_RECT_ATTR_S { + RECT_S stRect; + CVI_U32 u32Thick; + CVI_U32 u32Color; + CVI_U32 u32IsFill; +} RGN_RECT_ATTR_S; + +typedef struct _RGN_BITMAP_ATTR_S { + RECT_S stRect; + CVI_U32 u32BitmapPAddr; +} RGN_BITMAP_ATTR_S; + +typedef struct _RGN_CMPR_OBJ_ATTR_S { + RGN_CMPR_TYPE_E enObjType; + union { + RGN_LINE_ATTR_S stLine; + RGN_RECT_ATTR_S stRgnRect; + RGN_BITMAP_ATTR_S stBitmap; + }; +} RGN_CMPR_OBJ_ATTR_S; + +typedef struct _RGN_CANVAS_CMPR_ATTR_S { + CVI_U32 u32Width; + CVI_U32 u32Height; + CVI_U32 u32BgColor; + PIXEL_FORMAT_E enPixelFormat; + CVI_U32 u32BsSize; + CVI_U32 u32ObjNum; +} RGN_CANVAS_CMPR_ATTR_S; + + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif + +#endif /* __RGN_MAIN_H__ */ diff --git a/freertos/cvitek/task/rgn/src/cv1835/display_main.c b/freertos/cvitek/task/rgn/src/cv1835/display_main.c new file mode 100644 index 000000000..acbfcc61f --- /dev/null +++ b/freertos/cvitek/task/rgn/src/cv1835/display_main.c @@ -0,0 +1,30 @@ +/* Kernel includes. */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +#include "task.h" +#include "semphr.h" + +/* Xilinx includes. */ +#include "printf.h" +#include "rtos_queue.h" + +#include "display_main.h" + +void prvDisplayRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + cmdqu_t rtos_cmdq; + + printf("prvDisplayRunTask run\n"); + + for (;;) { + xQueueReceive(xQueueDisplay, &rtos_cmdq, portMAX_DELAY); + printf("prvDisplayRunTask id=%d cmd=%d para=%lx\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + if (rtos_cmdq.ip_id == 4) { + xQueueSend(xQueueCmdqu, &rtos_cmdq, 0U); + } + rtos_cmdq.ip_id = -1; + } +} diff --git a/freertos/cvitek/task/rgn/src/riscv64/rgn_main.c b/freertos/cvitek/task/rgn/src/riscv64/rgn_main.c new file mode 100644 index 000000000..bbbb3cd12 --- /dev/null +++ b/freertos/cvitek/task/rgn/src/riscv64/rgn_main.c @@ -0,0 +1,265 @@ +/* Standard includes. */ +#include <stdio.h> +#include <stdlib.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" + +#include "rgn_main.h" +#include "cvi_osdc.h" +#include "comm.h" + +QueueHandle_t xQueueRGN; +QueueHandle_t xQueueRGNCmdqu; + +// #define __RGN_DEBUG__ + +#ifdef __RGN_DEBUG__ +#define rgn_printf printf +#else +#define rgn_printf(...) +#endif + +void prvRGNRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + cmdqu_t rtos_cmdq; + + int i, j, delta_x, delta_y; + void *pvAddr = NULL; + unsigned char obj_num = 0, line_num = 0; + int bs_size, status; + RGN_CANVAS_CMPR_ATTR_S *canvas_cmpr_attr = NULL; + RGN_CMPR_OBJ_ATTR_S *obj_attr = NULL; + OSDC_Canvas_Attr_S canvas; + OSDC_DRAW_OBJ_S *obj_vec = NULL; + RGN_LINE_ATTR_S *line_attr = NULL; + + rgn_printf("%s run\n", __func__); + xQueueRGN = main_GetMODHandle(E_QUEUE_RGN); + xQueueRGNCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + + for (;;) { + xQueueReceive(xQueueRGN, &rtos_cmdq, portMAX_DELAY); + + rgn_printf("%s ip=%d cmd=%d para=%#x\n", + __func__, rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + /* send cmd back to Cmdqu task and send mailbox to linux */ + if (rtos_cmdq.ip_id != IP_RGN) { + //send back the err msg + rgn_printf("RGNRunTask got invalid ip_id[%d]\n", rtos_cmdq.ip_id); + xQueueSend(xQueueRGNCmdqu, &rtos_cmdq, 0U); + goto WRONG_CMD_IP_ID; + } + + rgn_printf("xPortGetFreeHeapSize(%d)\n", xPortGetFreeHeapSize()); + + canvas_cmpr_attr = (RGN_CANVAS_CMPR_ATTR_S *)rtos_cmdq.param_ptr; + rgn_printf("phyAddr(%x) u32Width(%d) u32Height(%d) u32BgColor(%x) enPixelFormat(%d) u32ObjNum(%d)\n", + rtos_cmdq.param_ptr, + canvas_cmpr_attr->u32Width, + canvas_cmpr_attr->u32Height, + canvas_cmpr_attr->u32BgColor, + canvas_cmpr_attr->enPixelFormat, + canvas_cmpr_attr->u32ObjNum); + rgn_printf("u32BsSize(%d)\n", canvas_cmpr_attr->u32BsSize); + + canvas.width = canvas_cmpr_attr->u32Width; + canvas.height = canvas_cmpr_attr->u32Height; + obj_num = canvas_cmpr_attr->u32ObjNum; + line_num = 0; + + obj_vec = (OSDC_DRAW_OBJ_S *)pvPortMalloc((obj_num ? obj_num : 1) * sizeof(OSDC_DRAW_OBJ_S)); + if (obj_vec == NULL) { + rgn_printf("(%s) malloc failed!\n", __func__); + goto WRONG_CMD_IP_ID; + } + + line_attr = (RGN_LINE_ATTR_S *)pvPortMalloc((obj_num ? obj_num : 1) * sizeof(RGN_LINE_ATTR_S)); + if (line_attr == NULL) { + rgn_printf("(%s) malloc failed!\n", __func__); + vPortFree(obj_vec); + goto WRONG_CMD_IP_ID; + } + + obj_attr = (RGN_CMPR_OBJ_ATTR_S *)((CVI_U8 *)rtos_cmdq.param_ptr + sizeof(RGN_CANVAS_CMPR_ATTR_S)); + if (obj_num) { + for (i = 0; i < obj_num; ++i) { + if (obj_attr[i].enObjType == RGN_CMPR_LINE) { + rgn_printf("start(%d %d) end(%d %d) Thick(%d) Color(0x%x)\n", + obj_attr[i].stLine.stPointStart.s32X, + obj_attr[i].stLine.stPointStart.s32Y, + obj_attr[i].stLine.stPointEnd.s32X, + obj_attr[i].stLine.stPointEnd.s32Y, + obj_attr[i].stLine.u32Thick, + obj_attr[i].stLine.u32Color); + line_attr[line_num] = obj_attr[i].stLine; + line_num++; + } else if (obj_attr[i].enObjType == RGN_CMPR_RECT) { + rgn_printf("xywh(%d %d %d %d) Thick(%d) Color(0x%x) is_fill(%d)\n", + obj_attr[i].stRgnRect.stRect.s32X, + obj_attr[i].stRgnRect.stRect.s32Y, + obj_attr[i].stRgnRect.stRect.u32Width, + obj_attr[i].stRgnRect.stRect.u32Height, + obj_attr[i].stRgnRect.u32Thick, + obj_attr[i].stRgnRect.u32Color, + obj_attr[i].stRgnRect.u32IsFill); + } else if (obj_attr[i].enObjType == RGN_CMPR_BIT_MAP) { + rgn_printf("xywh(%d %d %d %d) u32BitmapPAddr(%x)\n", + obj_attr[i].stBitmap.stRect.s32X, + obj_attr[i].stBitmap.stRect.s32Y, + obj_attr[i].stBitmap.stRect.u32Width, + obj_attr[i].stBitmap.stRect.u32Height, + obj_attr[i].stBitmap.u32BitmapPAddr); + } + } + } + + // workaroud to fix draw line issue for now + j = 0; + while (j++ < 5) { + for (i = 0; i < line_num; ++i) { + delta_x = abs(line_attr[i].stPointStart.s32X - line_attr[i].stPointEnd.s32X); + delta_y = abs(line_attr[i].stPointStart.s32Y - line_attr[i].stPointEnd.s32Y); + if (delta_y < line_attr[i].u32Thick) { + if (i < line_num - 1) { + line_attr[i + 1].stPointStart.s32Y = line_attr[i].stPointEnd.s32Y + = line_attr[i].stPointStart.s32Y; + } else { + line_attr[0].stPointStart.s32Y = line_attr[i].stPointEnd.s32Y + = line_attr[i].stPointStart.s32Y; + } + } + if (delta_x < line_attr[i].u32Thick) { + if (i < line_num - 1) { + line_attr[i + 1].stPointStart.s32X = line_attr[i].stPointEnd.s32X + = line_attr[i].stPointStart.s32X; + } else { + line_attr[0].stPointStart.s32X = line_attr[i].stPointEnd.s32X + = line_attr[i].stPointStart.s32X; + } + } + } + delta_x = abs(line_attr[0].stPointStart.s32X - line_attr[0].stPointEnd.s32X); + delta_y = abs(line_attr[0].stPointStart.s32Y - line_attr[0].stPointEnd.s32Y); + if ((delta_x > line_attr[0].u32Thick || delta_x == 0) && + (delta_y > line_attr[0].u32Thick || delta_y == 0)) + break; + } + + if (obj_num) { + for (i = 0, j = 0; i < obj_num; ++i) { + if (obj_attr[i].enObjType == RGN_CMPR_LINE) { + CVI_OSDC_SetLineObjAttr( + &canvas, + &obj_vec[i], + line_attr[j].u32Color, + line_attr[j].stPointStart.s32X, + line_attr[j].stPointStart.s32Y, + line_attr[j].stPointEnd.s32X, + line_attr[j].stPointEnd.s32Y, + line_attr[j].u32Thick); + j++; + } else if (obj_attr[i].enObjType == RGN_CMPR_RECT) { + CVI_OSDC_SetRectObjAttr( + &canvas, + &obj_vec[i], + obj_attr[i].stRgnRect.u32Color, + obj_attr[i].stRgnRect.stRect.s32X, + obj_attr[i].stRgnRect.stRect.s32Y, + obj_attr[i].stRgnRect.stRect.u32Width, + obj_attr[i].stRgnRect.stRect.u32Height, + obj_attr[i].stRgnRect.u32IsFill, + obj_attr[i].stRgnRect.u32Thick); + } else if (obj_attr[i].enObjType == RGN_CMPR_BIT_MAP) { + CVI_OSDC_SetBitmapObjAttr( + &canvas, + &obj_vec[i], + (void *)obj_attr[i].stBitmap.u32BitmapPAddr, + obj_attr[i].stBitmap.stRect.s32X, + obj_attr[i].stBitmap.stRect.s32Y, + obj_attr[i].stBitmap.stRect.u32Width, + obj_attr[i].stBitmap.stRect.u32Height, + false); + } + } + } + + switch (canvas_cmpr_attr->enPixelFormat) { + case PIXEL_FORMAT_ARGB_8888: + canvas.format = OSD_ARGB8888; + break; + + case PIXEL_FORMAT_8BIT_MODE: + canvas.format = OSD_LUT8; + break; + + case PIXEL_FORMAT_ARGB_4444: + canvas.format = OSD_ARGB4444; + break; + + default: + case PIXEL_FORMAT_ARGB_1555: + canvas.format = OSD_ARGB1555; + break; + } + + switch (rtos_cmdq.cmd_id) { + case CMDQU_CB_RGN_GET_COMPRESS_SIZE: + { + pvAddr = (void *)rtos_cmdq.param_ptr; + bs_size = CVI_OSDC_EstCmprCanvasSize(&canvas, &obj_vec[0], obj_num); + canvas_cmpr_attr->u32BsSize = bs_size; + rgn_printf("CVI_OSDC_EstCmprCanvasSize bs_size(%d)!\n", bs_size); + flush_dcache_range((uintptr_t)pvAddr, ALIGN(sizeof(RGN_CANVAS_CMPR_ATTR_S), 64)); + rtos_cmdq.ip_id = IP_RGN; + rtos_cmdq.param_ptr = 0; + xQueueSend(xQueueRGNCmdqu, &rtos_cmdq, 0U); + } + break; + + case CMDQU_CB_RGN_COMPRESS: + { + pvAddr = (void *)rtos_cmdq.param_ptr; + status = CVI_OSDC_DrawCmprCanvas(&canvas, &obj_vec[0], obj_num ? obj_num : 0, pvAddr, + canvas_cmpr_attr->u32BsSize, &bs_size); + + if (status != 1) { + rgn_printf("CVI_OSDC_DrawCmprCanvas failed!\n"); + // return status(0xFFFFFFFF) and bs_size to C906B + *(unsigned int *)pvAddr = 0xffffffff; + *((unsigned int *)pvAddr + 1) = bs_size; + } else { + // save bitstream size in bit[32:63], after C906B gets it, + // it should be restored to image width and height + *((unsigned int *)pvAddr + 1) = bs_size; + rgn_printf("%s bs_size(%d)!\n", __func__, *((unsigned int *)pvAddr + 1)); + } + + flush_dcache_range((uintptr_t)pvAddr, ALIGN(bs_size, 64)); + rtos_cmdq.ip_id = IP_RGN; + rtos_cmdq.param_ptr = 0; + xQueueSend(xQueueRGNCmdqu, &rtos_cmdq, 0U); + } + break; + + default: + rgn_printf("%s rtos_cmdq.cmd_id(%d)!\n", __func__, rtos_cmdq.cmd_id); + break; + } + vPortFree(line_attr); + vPortFree(obj_vec); + +WRONG_CMD_IP_ID: + rtos_cmdq.ip_id = -1; + rtos_cmdq.cmd_id = -1; + rtos_cmdq.param_ptr = 0; + } +} diff --git a/freertos/cvitek/task/vcodec/CMakeLists.txt b/freertos/cvitek/task/vcodec/CMakeLists.txt new file mode 100644 index 000000000..e820cec85 --- /dev/null +++ b/freertos/cvitek/task/vcodec/CMakeLists.txt @@ -0,0 +1,17 @@ +file(GLOB _SOURCES "src/${RUN_ARCH}/*.c") + +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/jenc) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/config) +include_directories(../comm/include) + +add_library(vcodec STATIC ${_SOURCES}) +install(TARGETS vcodec DESTINATION lib) + diff --git a/freertos/cvitek/task/vcodec/include/h26x_enc.h b/freertos/cvitek/task/vcodec/include/h26x_enc.h new file mode 100644 index 000000000..6e32e5bf8 --- /dev/null +++ b/freertos/cvitek/task/vcodec/include/h26x_enc.h @@ -0,0 +1,8 @@ +#ifndef _H26X_ENC_H_ +#define _H26X_ENC_H_ + +enum VCORE_CMD_ID { + VCORE_CMD_ENCODE, +}; +#endif + diff --git a/freertos/cvitek/task/vcodec/src/cv1835/vcodec_main.c b/freertos/cvitek/task/vcodec/src/cv1835/vcodec_main.c new file mode 100644 index 000000000..7c34c1e90 --- /dev/null +++ b/freertos/cvitek/task/vcodec/src/cv1835/vcodec_main.c @@ -0,0 +1,73 @@ +/* Kernel includes. */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +#include "task.h" +#include "semphr.h" + +/* Xilinx includes. */ +#include "printf.h" +#include "rtos_queue.h" +#include "venc/main_enc_cvitest.h" +#include "cvi_venc.h" + +extern QueueHandle_t xQueueVcodec; +extern QueueHandle_t xQueueCmdqu; + +// just to build & compiler venc sdk, do not need run this +__attribute__((optimize("-O0"))) void cvi_venc_test(void) +{ + int venc_test = 0; + + if (venc_test != 0) { + cvitest_venc_main(0, 0); + // venc_main(0, 0); + CVI_VENC_CreateChn(0, 0); + CVI_VENC_SendFrame(0, 0, 0); + CVI_VENC_StartRecvFrame(0, 0); + CVI_VENC_StopRecvFrame(0); + CVI_VENC_QueryStatus(0, 0); + CVI_VENC_GetStream(0, 0, 0); + CVI_VENC_ReleaseStream(0, 0); + CVI_VENC_DestroyChn(0); + CVI_VENC_ResetChn(0); + CVI_VENC_GetFd(0); + CVI_VENC_SetJpegParam(0, 0); + CVI_VENC_GetJpegParam(0, 0); + CVI_VENC_RequestIDR(0, 0); + CVI_VENC_SetChnAttr(0, 0); + CVI_VENC_GetChnAttr(0, 0); + CVI_VENC_GetRcParam(0, 0); + CVI_VENC_SetRcParam(0, 0); + CVI_VENC_GetRefParam(0, 0); + CVI_VENC_SetRefParam(0, 0); + CVI_VENC_GetRoiAttr(0, 0, 0); + CVI_VENC_SetFrameLostStrategy(0, 0); + CVI_VENC_SetRoiAttr(0, 0); + CVI_VENC_GetFrameLostStrategy(0, 0); + CVI_VENC_SetChnParam(0, 0); + CVI_VENC_GetChnParam(0, 0); + } +} + +void prvVcodecRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + cmdqu_t rtos_cmdq; + + printf("prvVcodecRunTask run\n"); + // init + vpu_init(); + printf("init done\n"); + cvi_venc_test(); + + for (;;) { + xQueueReceive(xQueueVcodec, &rtos_cmdq, portMAX_DELAY); + printf("prvVcodecRunTask id=%d cmd=%d para=%lx\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + if (rtos_cmdq.ip_id == 1) { + xQueueSend(xQueueCmdqu, &rtos_cmdq, 0U); + } + rtos_cmdq.ip_id = -1; + } +} diff --git a/freertos/cvitek/task/vcodec/src/riscv64/vcodec_main.c b/freertos/cvitek/task/vcodec/src/riscv64/vcodec_main.c new file mode 100644 index 000000000..388a95cee --- /dev/null +++ b/freertos/cvitek/task/vcodec/src/riscv64/vcodec_main.c @@ -0,0 +1,143 @@ +/* Standard includes. */ +#include <stdio.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" +#include "fast_image.h" +#include "comm.h" +#include "h26x_enc.h" +#include "intr_conf.h" +#include "cvi_comm_video.h" +#include "vi_uapi.h" +#include "jenc.h" + +QueueHandle_t xQueueVcodec; +QueueHandle_t xQueueVCCmdqu; +QueueHandle_t xQueueVICmdqu; +extern struct transfer_config_t transfer_config; + +#define JPEG_ADDR_ALIGN 16 + + +JPEG_PIC encoded_pics[MAX_JPEG_NUM]; +CVI_S32 num_encoded = 0; +CVI_U32 cur_bit_addr = 0x0; + +static void encode_one_jpeg(CVI_U32 width, CVI_U32 height, CVI_U32 phySrcAddr, CVI_U64 pts) +{ + int pic_size = 0; + + if (num_encoded >= MAX_JPEG_NUM) { + printf("[vcodec][error] max number of encoded jpeg pictures reached\n"); + return; + } + + pic_size = jpu_enc(width, height, phySrcAddr, cur_bit_addr, pts); + if (pic_size < 0) { + printf("[vcodec][error] jpeg encode fail\n"); + return; + } + + encoded_pics[num_encoded].width = width; + encoded_pics[num_encoded].height = height; + encoded_pics[num_encoded].addr = cur_bit_addr; + encoded_pics[num_encoded].size = pic_size; + encoded_pics[num_encoded].pts = pts; + + printf("[vcodec] jpeg %d: %dx%d, %d bytes @ 0x%x, pts %lld\n", + num_encoded, + encoded_pics[num_encoded].width, + encoded_pics[num_encoded].height, + encoded_pics[num_encoded].size, + encoded_pics[num_encoded].addr, + encoded_pics[num_encoded].pts); + + cur_bit_addr += encoded_pics[num_encoded].size; + cur_bit_addr = (cur_bit_addr + (JPEG_ADDR_ALIGN - 1)) & ~(JPEG_ADDR_ALIGN - 1); + num_encoded++; +} + +void prvVcodecRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + u8 encode_type; + cmdqu_t rtos_cmdq; + printf("prvVcodecRunTask run\n"); + + xQueueVcodec = main_GetMODHandle(E_QUEUE_VCODEC); + xQueueVCCmdqu = main_GetMODHandle(E_QUEUE_CMDQU); + xQueueVICmdqu = main_GetMODHandle(E_QUEUE_VI); + + /* get enc buffer information */ + printf("trans enc buff addr = %x\n", transfer_config.encode_buf_addr); + printf("trans enc buff size = %x\n", transfer_config.encode_buf_size); + printf("trans enc img addr = %x\n", transfer_config.encode_img_addr); + printf("trans enc img size = %x\n", transfer_config.encode_img_size); + printf("trans enc type = %x\n", transfer_config.image_type); + encode_type = transfer_config.image_type; + cur_bit_addr = transfer_config.encode_img_addr; + + memset(&encoded_pics, 0, sizeof(encoded_pics)); + +#if 0 + encode_one_jpeg(352, 288, transfer_config.encode_buf_addr, 22446688); +#endif + + for (;;) { + xQueueReceive(xQueueVcodec, &rtos_cmdq, portMAX_DELAY); + //TODO: wait cv181x command queue and add action for command + printf("prvVcodecRunTask ip=%d cmd=%d para=%lx\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + + if (rtos_cmdq.ip_id == IP_VCODEC) { + switch (rtos_cmdq.cmd_id) { + case SYS_CMD_INFO_STOP_ISR: + /* do something to stop isr */ + + disable_irq(JPEG_INTERRUPT); + disable_irq(H264_INTERRUPT); + disable_irq(H265_INTERRUPT); + /* info linux, rtos isr is disabled */ + rtos_cmdq.cmd_id = SYS_CMD_INFO_STOP_ISR_DONE; + xQueueSend(xQueueVCCmdqu, &rtos_cmdq, 0U); + break; + case VCORE_CMD_ENCODE: + switch (encode_type) { + case E_FAST_JEPG: + break; + case E_FAST_H264: + break; + case E_FAST_H265: + break; + } + break; + case CODEC_CMDQ_RECV_BUF: + { + VIDEO_FRAME_S buf; + + buf = *((struct _VIDEO_FRAME_S *)rtos_cmdq.param_ptr); + + printf("VC_RECV_BUF w_h=%d_%d, addr=0x%x, PTS=%d\n", + buf.u32Width, buf.u32Height, buf.u64PhyAddr[0], buf.u64PTS); + + encode_one_jpeg(buf.u32Width, buf.u32Height, buf.u64PhyAddr[0], buf.u64PTS); + + rtos_cmdq.ip_id = IP_VI; + rtos_cmdq.cmd_id = VI_CMDQ_INFO_RECV_BUF_ACK; + xQueueSend(xQueueVICmdqu, &rtos_cmdq, 0U); + break; + } + default: + break; + } + } + rtos_cmdq.ip_id = -1; + } +} diff --git a/freertos/cvitek/task/vi/CMakeLists.txt b/freertos/cvitek/task/vi/CMakeLists.txt new file mode 100644 index 000000000..f66ecd578 --- /dev/null +++ b/freertos/cvitek/task/vi/CMakeLists.txt @@ -0,0 +1,18 @@ +file(GLOB _SOURCES "src/${RUN_ARCH}/*.c") + +include_directories(include) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/cif) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/vi) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/cif) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/config) +include_directories(../comm/include) + +add_library(vi STATIC ${_SOURCES}) +install(TARGETS vi DESTINATION lib) + diff --git a/freertos/cvitek/task/vi/include/vi_task_main.h b/freertos/cvitek/task/vi/include/vi_task_main.h new file mode 100644 index 000000000..e69de29bb diff --git a/freertos/cvitek/task/vi/src/riscv64/vi_task_main.c b/freertos/cvitek/task/vi/src/riscv64/vi_task_main.c new file mode 100644 index 000000000..1c611e50c --- /dev/null +++ b/freertos/cvitek/task/vi/src/riscv64/vi_task_main.c @@ -0,0 +1,82 @@ +/* Standard includes. */ +#include <stdio.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" +#include "timers.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" +#include "fast_image.h" +#include "intr_conf.h" +#include "comm.h" +#include "cvi_vi.h" +#include "vi_uapi.h" + +static QueueHandle_t gVIQueHandle; +static QueueHandle_t gCMDQUQueHandle; +extern struct transfer_config_t transfer_config; + +void prvVIRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + struct transfer_config_t *p_transfer_config; + cmdqu_t rtos_cmdq; + + printf("%s:%d run\n", __FUNCTION__, __LINE__); + gVIQueHandle = main_GetMODHandle(E_QUEUE_VI); + gCMDQUQueHandle = main_GetMODHandle(E_QUEUE_CMDQU); + /* get isp buffer information */ + printf("isp buffer addr = %x\n", transfer_config.isp_buffer_addr); + printf("isp buffer size = %x\n", transfer_config.isp_buffer_size); + + CVI_VI_Start(transfer_config.isp_buffer_addr, transfer_config.isp_buffer_size); + + for (;;) { + xQueueReceive(gVIQueHandle, &rtos_cmdq, portMAX_DELAY); + printf("prvVIRunTask ip=%d, cmd=%d, para=0x%x\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + + if (rtos_cmdq.ip_id == IP_VI) { + switch (rtos_cmdq.cmd_id) { + case SYS_CMD_INFO_TRANS: + /* send from linux side */ + p_transfer_config = (struct transfer_config_t *) rtos_cmdq.param_ptr; + printf("trans isp buff addr = %x\n", p_transfer_config->isp_buffer_addr); + printf("trans isp buff size = %x\n", p_transfer_config->isp_buffer_size); + /* update rtos local buffer parameters */ + transfer_config.isp_buffer_addr = p_transfer_config->isp_buffer_addr; + transfer_config.isp_buffer_size = p_transfer_config->isp_buffer_size; + break; + case SYS_CMD_INFO_STOP_ISR: + /* do something to stop isr */ + CVI_VI_Stop(); + + /* info linux that rtos isr is disabled */ + disable_irq(ISP_INT); + rtos_cmdq.cmd_id = SYS_CMD_INFO_STOP_ISR_DONE; + xQueueSend(gCMDQUQueHandle, &rtos_cmdq, 0U); + break; + case VI_CMDQ_INFO_RECV_BUF_ACK: + CVI_VI_QBUF(); + break; + default: + break; + } + } else { + //send back the err msg + printf("VIRunTask got invalid ip_id[%d]\n", rtos_cmdq.ip_id); + xQueueSend(gCMDQUQueHandle, &rtos_cmdq, 0U); + goto WRONG_CMD_IP_ID; + } + +WRONG_CMD_IP_ID: + rtos_cmdq.ip_id = -1; + rtos_cmdq.cmd_id = -1; + rtos_cmdq.param_ptr = NULL; + } +} diff --git a/freertos/cvitek/task/vip/CMakeLists.txt b/freertos/cvitek/task/vip/CMakeLists.txt new file mode 100644 index 000000000..69df3ce42 --- /dev/null +++ b/freertos/cvitek/task/vip/CMakeLists.txt @@ -0,0 +1,27 @@ +file(GLOB _SOURCES "src/${CHIP}/*.c") + +include_directories(${DRIVER_GPIO_DIR}/include) +include_directories(${DRIVER_CIF_DIR}/include) +include_directories(${DRIVER_VI_DIR}/include) +include_directories(${DRIVER_SENSOR_DIR}/include) + +include_directories(include) + +include_directories(${CMAKE_INSTALL_INC_PREFIX}/arch) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/common) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/kernel) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/snsr_i2c) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/config) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/hal/cif) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/rtos_cmdqu) +include_directories(${CMAKE_INSTALL_INC_PREFIX}/driver/fast_image) + +include_directories(../isp/isp/include/${CHIP}/) +include_directories(../isp/isp/${CHIP}/isp/inc/) +include_directories(../isp/isp/${CHIP}/isp/src/) +include_directories(../isp/isp/${CHIP}/isp_algo/inc/) + +include_directories(../isp/tmp_inc/) + +add_library(vip STATIC ${_SOURCES}) +install(TARGETS vip DESTINATION lib) diff --git a/freertos/cvitek/task/vip/include/vip_main.h b/freertos/cvitek/task/vip/include/vip_main.h new file mode 100644 index 000000000..e69de29bb diff --git a/freertos/cvitek/task/vip/src/cv181x/vip_main.c b/freertos/cvitek/task/vip/src/cv181x/vip_main.c new file mode 100644 index 000000000..ab9cb9c3a --- /dev/null +++ b/freertos/cvitek/task/vip/src/cv181x/vip_main.c @@ -0,0 +1,37 @@ +/* Standard includes. */ +#include <stdio.h> + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" + +/* cvitek includes. */ +#include "printf.h" +#include "rtos_cmdqu.h" + +#include "vip_main.h" + +static QueueHandle_t xQueueVip; +static QueueHandle_t xQueueCmdqu; + +void prvVipRunTask(void *pvParameters) +{ + // Remove compiler warning about unused parameter. + (void)pvParameters; + cmdqu_t rtos_cmdq; + + printf("prvVipRunTask run\n"); + + for (;;) { + xQueueReceive(xQueueVip, &rtos_cmdq, portMAX_DELAY); + // wait cv181x command queue and add action for command + printf("prvVipRunTask id=%d cmd=%d para=%lx\n", + rtos_cmdq.ip_id, rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + // send cmd back to Cmdqu task and send mailbox to linux + if (rtos_cmdq.ip_id == IP_VIP) { + xQueueSend(xQueueCmdqu, &rtos_cmdq, 0U); + } + rtos_cmdq.ip_id = -1; + } +} diff --git a/freertos/cvitek/task/vip/src/cv1835/vip_main.c b/freertos/cvitek/task/vip/src/cv1835/vip_main.c new file mode 100644 index 000000000..76841dd09 --- /dev/null +++ b/freertos/cvitek/task/vip/src/cv1835/vip_main.c @@ -0,0 +1,30 @@ +/* Kernel includes. */ +#include "linux/types.h" +#include "FreeRTOS_POSIX.h" +#include "task.h" +#include "semphr.h" + +/* Xilinx includes. */ +#include "printf.h" +#include "rtos_queue.h" + +#include "vip_main.h" + +void prvVipRunTask(void *pvParameters) +{ + /* Remove compiler warning about unused parameter. */ + (void)pvParameters; + cmdqu_t rtos_cmdq; + + printf("prvVipRunTask run\n"); + + for (;;) { + xQueueReceive(xQueueVip, &rtos_cmdq, portMAX_DELAY); + printf("prvVipRunTask id=%d cmd=%d para=%lx\n", rtos_cmdq.ip_id, + rtos_cmdq.cmd_id, rtos_cmdq.param_ptr); + if (rtos_cmdq.ip_id == 3) { + xQueueSend(xQueueCmdqu, &rtos_cmdq, 0U); + } + rtos_cmdq.ip_id = -1; + } +}

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