[freertos] add freertos firmware

Change-Id: I4158d66d9b5fc444e28287f55e79ac24e0a1666f
This commit is contained in:
sam.xiang
2023-02-23 11:39:27 +08:00
parent 1cf39ecdd5
commit cbb030f19f
398 changed files with 151104 additions and 0 deletions

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function(ParseConfiguration DotConfigFile)
if (NOT EXISTS ${DotConfigFile})
message(FATAL_ERROR
"${DotConfigFile} not exist,
please source build/envsetup_soc.sh and defconfig relative board_defconfig")
endif()
file(READ "${DotConfigFile}" DotConfig)
string(REPLACE "\\\n" "" DotConfig ${DotConfig})
string(REPLACE "\n" ";" DotConfLines ${DotConfig})
list(REMOVE_ITEM DotConfLines "")
foreach(configline ${DotConfLines})
string(REPLACE "=" ";" line_split ${configline})
list(LENGTH line_split count)
if (count LESS 2)
continue()
endif()
list(GET line_split -1 value)
string(STRIP ${value} value)
separate_arguments(value)
list(REMOVE_AT line_split -1)
foreach(conf_name ${line_split})
set(${conf_name} ${value} PARENT_SCOPE)
message("${conf_name}=${value}")
# add_definitions(-D${conf_name}=${value} )
endforeach()
endforeach()
endfunction()

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@ -0,0 +1,64 @@
acpi_dock_ops
address_space_operations
backlight_ops
block_device_operations
clk_ops
comedi_lrange
component_ops
dentry_operations
dev_pm_ops
dma_map_ops
driver_info
drm_connector_funcs
drm_encoder_funcs
drm_encoder_helper_funcs
ethtool_ops
extent_io_ops
file_lock_operations
file_operations
hv_ops
ide_dma_ops
ide_port_ops
inode_operations
intel_dvo_dev_ops
irq_domain_ops
item_operations
iwl_cfg
iwl_ops
kgdb_arch
kgdb_io
kset_uevent_ops
lock_manager_operations
machine_desc
microcode_ops
mlxsw_reg_info
mtrr_ops
neigh_ops
net_device_ops
nlmsvc_binding
nvkm_device_chip
of_device_id
pci_raw_ops
pipe_buf_operations
platform_hibernation_ops
platform_suspend_ops
proto_ops
regmap_access_table
rpc_pipe_ops
rtc_class_ops
sd_desc
seq_operations
sirfsoc_padmux
snd_ac97_build_ops
snd_soc_component_driver
soc_pcmcia_socket_ops
stacktrace_ops
sysfs_ops
tty_operations
uart_ops
usb_mon_operations
v4l2_ctrl_ops
v4l2_ioctl_ops
vm_operations_struct
wacom_features
wd_ops

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@ -0,0 +1,204 @@
/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: */
/* */
/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */
/* */
/* Description : Cortex-A53 Linker Script */
/* */
/*******************************************************************/
INCLUDE cvi_board_memmap.ld
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x20000;
/* _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; */
/*_HEAP_SIZE = 0x20000;*/
_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
/* Define Memories in the system */
MEMORY
{
psu_ddr_0_MEM_0 : ORIGIN = CVIMMAP_FREERTOS_ADDR , LENGTH = CVIMMAP_FREERTOS_SIZE
}
/* Specify the default entry point to the program */
/*ENTRY(_vector_table)*/
ENTRY(_start)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
.text : {
KEEP (*(.vectors))
*(.boot)
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
*(.plt)
*(.gnu_warning)
*(.gcc_execpt_table)
*(.glue_7)
*(.glue_7t)
*(.ARM.extab)
*(.gnu.linkonce.armextab.*)
} > psu_ddr_0_MEM_0
.init (ALIGN(64)) : {
KEEP (*(.init))
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.fini (ALIGN(64)) : {
KEEP (*(.fini))
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.interp : {
KEEP (*(.interp))
} > psu_ddr_0_MEM_0
.note-ABI-tag : {
KEEP (*(.note-ABI-tag))
} > psu_ddr_0_MEM_0
.rodata : {
. = ALIGN(64);
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.srodata*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > psu_ddr_0_MEM_0
.rodata1 : {
. = ALIGN(64);
__rodata1_start = .;
*(.rodata1)
*(.rodata1.*)
__rodata1_end = .;
} > psu_ddr_0_MEM_0
.data : {
. = ALIGN(64);
_data = .;
*(.data)
*(.data.*)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.d.*)
*(.jcr)
*(.got)
*(.got.plt)
_edata = .;
} > psu_ddr_0_MEM_0
.data1 : {
. = ALIGN(64);
__data1_start = .;
*(.data1)
*(.data1.*)
__data1_end = .;
} > psu_ddr_0_MEM_0
.got : {
*(.got)
} > psu_ddr_0_MEM_0
.got1 : {
*(.got1)
} > psu_ddr_0_MEM_0
.got2 : {
*(.got2)
} > psu_ddr_0_MEM_0
.ctors : {
. = ALIGN(64);
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > psu_ddr_0_MEM_0
.dtors : {
. = ALIGN(64);
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > psu_ddr_0_MEM_0
.fixup : {
__fixup_start = .;
*(.fixup)
__fixup_end = .;
} > psu_ddr_0_MEM_0
.eh_frame : {
*(.eh_frame)
} > psu_ddr_0_MEM_0
.eh_framehdr : {
__eh_framehdr_start = .;
*(.eh_framehdr)
__eh_framehdr_end = .;
} > psu_ddr_0_MEM_0
.gcc_except_table : {
*(.gcc_except_table)
} > psu_ddr_0_MEM_0
.bss (NOLOAD) : {
. = ALIGN(64);
_bss = .;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(64);
_ebss = .;
} > psu_ddr_0_MEM_0
/*_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );*/
_data_lma = LOADADDR(.data);
/* Generate Stack and Heap definitions */
.heap (NOLOAD) : {
. = ALIGN(64);
_heap = .;
HeapBase = .;
_heap_start = .;
*(.heap*)
/*. += _HEAP_SIZE;*/
/*_heap_size = _HEAP_SIZE; */
_heap_end = .;
HeapLimit = .;
} > psu_ddr_0_MEM_0
.stack (NOLOAD) : {
. = ALIGN(64);
_stack_end_end = .;
. += _STACK_SIZE;
_stack_top = .;
} > psu_ddr_0_MEM_0
_end = .;
}

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@ -0,0 +1,204 @@
/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: */
/* */
/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */
/* */
/* Description : Cortex-A53 Linker Script */
/* */
/*******************************************************************/
INCLUDE cvi_board_memmap.ld
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x20000;
/* _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; */
/*_HEAP_SIZE = 0x20000;*/
_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
/* Define Memories in the system */
MEMORY
{
psu_ddr_0_MEM_0 : ORIGIN = CVIMMAP_FREERTOS_ADDR , LENGTH = CVIMMAP_FREERTOS_SIZE
}
/* Specify the default entry point to the program */
/*ENTRY(_vector_table)*/
ENTRY(_start)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
.text : {
KEEP (*(.vectors))
*(.boot)
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
*(.plt)
*(.gnu_warning)
*(.gcc_execpt_table)
*(.glue_7)
*(.glue_7t)
*(.ARM.extab)
*(.gnu.linkonce.armextab.*)
} > psu_ddr_0_MEM_0
.init (ALIGN(64)) : {
KEEP (*(.init))
} > psu_ddr_0_MEM_0
.fini (ALIGN(64)) : {
KEEP (*(.fini))
} > psu_ddr_0_MEM_0
.interp : {
KEEP (*(.interp))
} > psu_ddr_0_MEM_0
.note-ABI-tag : {
KEEP (*(.note-ABI-tag))
} > psu_ddr_0_MEM_0
.rodata : {
. = ALIGN(64);
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.srodata*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > psu_ddr_0_MEM_0
.rodata1 : {
. = ALIGN(64);
__rodata1_start = .;
*(.rodata1)
*(.rodata1.*)
__rodata1_end = .;
} > psu_ddr_0_MEM_0
.data : {
. = ALIGN(64);
_data = .;
*(.data)
*(.data.*)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.d.*)
*(.jcr)
*(.got)
*(.got.plt)
_edata = .;
} > psu_ddr_0_MEM_0
.data1 : {
. = ALIGN(64);
__data1_start = .;
*(.data1)
*(.data1.*)
__data1_end = .;
} > psu_ddr_0_MEM_0
.got : {
*(.got)
} > psu_ddr_0_MEM_0
.got1 : {
*(.got1)
} > psu_ddr_0_MEM_0
.got2 : {
*(.got2)
} > psu_ddr_0_MEM_0
.ctors : {
. = ALIGN(64);
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > psu_ddr_0_MEM_0
.dtors : {
. = ALIGN(64);
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > psu_ddr_0_MEM_0
.fixup : {
__fixup_start = .;
*(.fixup)
__fixup_end = .;
} > psu_ddr_0_MEM_0
.eh_frame : {
*(.eh_frame)
} > psu_ddr_0_MEM_0
.eh_framehdr : {
__eh_framehdr_start = .;
*(.eh_framehdr)
__eh_framehdr_end = .;
} > psu_ddr_0_MEM_0
.gcc_except_table : {
*(.gcc_except_table)
} > psu_ddr_0_MEM_0
.bss (NOLOAD) : {
. = ALIGN(64);
_bss = .;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(64);
_ebss = .;
} > psu_ddr_0_MEM_0
/*_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );*/
_data_lma = LOADADDR(.data);
/* Generate Stack and Heap definitions */
.heap (NOLOAD) : {
. = ALIGN(64);
_heap = .;
HeapBase = .;
_heap_start = .;
*(.heap*)
/*. += _HEAP_SIZE;*/
/*_heap_size = _HEAP_SIZE; */
_heap_end = .;
HeapLimit = .;
} > psu_ddr_0_MEM_0
.stack (NOLOAD) : {
. = ALIGN(64);
_stack_end_end = .;
. += _STACK_SIZE;
_stack_top = .;
} > psu_ddr_0_MEM_0
_end = .;
}

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@ -0,0 +1,320 @@
/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: */
/* */
/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */
/* */
/* Description : Cortex-A53 Linker Script */
/* */
/*******************************************************************/
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x100000;
_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
/* Define Memories in the system */
MEMORY
{
psu_ddr_0_MEM_0 : ORIGIN = 0x110000000, LENGTH = 0x10000000
psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000
psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000
}
/* Specify the default entry point to the program */
ENTRY(_vector_table)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
.text : {
KEEP (*(.vectors))
*(.boot)
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
*(.plt)
*(.gnu_warning)
*(.gcc_execpt_table)
*(.glue_7)
*(.glue_7t)
*(.ARM.extab)
*(.gnu.linkonce.armextab.*)
} > psu_ddr_0_MEM_0
.init (ALIGN(64)) : {
KEEP (*(.init))
} > psu_ddr_0_MEM_0
.fini (ALIGN(64)) : {
KEEP (*(.fini))
} > psu_ddr_0_MEM_0
.interp : {
KEEP (*(.interp))
} > psu_ddr_0_MEM_0
.note-ABI-tag : {
KEEP (*(.note-ABI-tag))
} > psu_ddr_0_MEM_0
.rodata : {
. = ALIGN(64);
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > psu_ddr_0_MEM_0
.rodata1 : {
. = ALIGN(64);
__rodata1_start = .;
*(.rodata1)
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} > psu_ddr_0_MEM_0
.sdata2 : {
. = ALIGN(64);
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*(.sdata2.*)
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} > psu_ddr_0_MEM_0
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} > psu_ddr_0_MEM_0
.data : {
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__data_start = .;
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*(.data.*)
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*(.got)
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__data_end = .;
} > psu_ddr_0_MEM_0
.data1 : {
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.got : {
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} > psu_ddr_0_MEM_0
.got1 : {
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} > psu_ddr_0_MEM_0
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} > psu_ddr_0_MEM_0
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KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
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KEEP (*(SORT(.dtors.*)))
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} > psu_ddr_0_MEM_0
.eh_frame : {
*(.eh_frame)
} > psu_ddr_0_MEM_0
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} > psu_ddr_0_MEM_0
.gcc_except_table : {
*(.gcc_except_table)
} > psu_ddr_0_MEM_0
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__mmu_tbl0_start = .;
*(.mmu_tbl0)
__mmu_tbl0_end = .;
} > psu_ddr_0_MEM_0
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*(.mmu_tbl1)
__mmu_tbl1_end = .;
} > psu_ddr_0_MEM_0
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*(.mmu_tbl2)
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.ARM.exidx : {
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*(.ARM.exidx*)
*(.gnu.linkonce.armexidix.*.*)
__exidx_end = .;
} > psu_ddr_0_MEM_0
.preinit_array : {
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KEEP (*(.preinit_array))
__preinit_array_end = .;
} > psu_ddr_0_MEM_0
.init_array : {
. = ALIGN(64);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
} > psu_ddr_0_MEM_0
.fini_array : {
. = ALIGN(64);
__fini_array_start = .;
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array))
__fini_array_end = .;
} > psu_ddr_0_MEM_0
.ARM.attributes : {
__ARM.attributes_start = .;
*(.ARM.attributes)
__ARM.attributes_end = .;
} > psu_ddr_0_MEM_0
.sdata : {
. = ALIGN(64);
__sdata_start = .;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > psu_ddr_0_MEM_0
.sbss (NOLOAD) : {
. = ALIGN(64);
__sbss_start = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
. = ALIGN(64);
__sbss_end = .;
} > psu_ddr_0_MEM_0
.tdata : {
. = ALIGN(64);
__tdata_start = .;
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > psu_ddr_0_MEM_0
.tbss : {
. = ALIGN(64);
__tbss_start = .;
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > psu_ddr_0_MEM_0
.bss (NOLOAD) : {
. = ALIGN(64);
__bss_start__ = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(64);
__bss_end__ = .;
} > psu_ddr_0_MEM_0
_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );
_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
/* Generate Stack and Heap definitions */
.heap (NOLOAD) : {
. = ALIGN(64);
_heap = .;
HeapBase = .;
_heap_start = .;
. += _HEAP_SIZE;
_heap_end = .;
HeapLimit = .;
} > psu_ddr_0_MEM_0
.stack (NOLOAD) : {
. = ALIGN(64);
_el3_stack_end = .;
. += _STACK_SIZE;
__el3_stack = .;
_el2_stack_end = .;
. += _EL2_STACK_SIZE;
. = ALIGN(64);
__el2_stack = .;
_el1_stack_end = .;
. += _EL1_STACK_SIZE;
. = ALIGN(64);
__el1_stack = .;
_el0_stack_end = .;
. += _EL0_STACK_SIZE;
. = ALIGN(64);
__el0_stack = .;
} > psu_ddr_0_MEM_0
_end = .;
}

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,52 @@
include(CMakeForceCompiler)
# The Generic system name is used for embedded targets (targets without OS) in
# CMake
SET( CMAKE_SYSTEM_NAME Generic)
set( CMAKE_SYSTEM_PROCESSOR aarch64 )
set( ARCH aarch64 )
#set( CROSS_COMPILE aarch64-linux-gnu-)
set( CROSS_COMPILE aarch64-elf-)
set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++)
set(CMAKE_S_COMPILER ${CROSS_COMPILE}gcc)
message(STATUS "CMAKE_C_COMPILER: ${CMAKE_C_COMPILER}")
message(STATUS "CMAKE_CXX_COMPILER: ${CMAKE_CXX_COMPILER}")
# skip tests
set(CMAKE_C_COMPILER_WORKS 1)
# We must set the OBJCOPY setting into cache so that it's available to the
# whole project. Otherwise, this does not get set into the CACHE and therefore
# the build doesn't know what the OBJCOPY filepath is
set(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy
CACHE FILEPATH "The toolchain objcopy command " FORCE )
# Set the CMAKE C flags (which should also be used by the assembler!
#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O3 -DFREERTOS_BSP" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O2 -std=gnu11" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -ffunction-sections" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fdata-sections" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wl,--gc-sections" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-pointer-to-int-cast" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-missing-field-initializers" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -g -Wall -Wextra" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -nostdlib" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mcmodel=large" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DFREERTOS_BSP -DGUEST" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_SMP" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_64BIT" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_PHYS_ADDR_T_64BIT" )
# need to compatible with linux-kernel structure size, please check with linux-kernl .config
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_DEBUG_SPINLOCK" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DDEVICE_FROM_DTS" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__linux" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
set( CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-missing-field-initializers" )
set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-parentheses" )

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@ -0,0 +1,59 @@
include(CMakeForceCompiler)
# The Generic system name is used for embedded targets (targets without OS) in
# CMake
SET( CMAKE_SYSTEM_NAME Generic)
set( CMAKE_SYSTEM_PROCESSOR riscv64 )
set( ARCH riscv64 )
#set( CROSS_COMPILE aarch64-linux-gnu-)
set( CROSS_COMPILE riscv64-unknown-elf-)
set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++)
set(CMAKE_S_COMPILER ${CROSS_COMPILE}gcc)
message(STATUS "CMAKE_C_COMPILER: ${CMAKE_C_COMPILER}")
message(STATUS "CMAKE_CXX_COMPILER: ${CMAKE_CXX_COMPILER}")
# skip tests
set(CMAKE_C_COMPILER_WORKS 1)
# We must set the OBJCOPY setting into cache so that it's available to the
# whole project. Otherwise, this does not get set into the CACHE and therefore
# the build doesn't know what the OBJCOPY filepath is
set(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy
CACHE FILEPATH "The toolchain objcopy command " FORCE )
# Set the CMAKE C flags (which should also be used by the assembler!
#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O3 -DFREERTOS_BSP" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O2 -std=gnu11" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=rv64imafdc" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mabi=lp64d" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -ffunction-sections" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fdata-sections" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wl,--gc-sections" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-pointer-to-int-cast" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fno-builtin" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wno-missing-field-initializers" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -g -Wall -Wextra" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -nostdlib" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mcmodel=medany" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DFREERTOS_BSP" )
if ($ENV{DDR_64MB_SIZE} STREQUAL "y")
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DLINUX_BSP_64MB" )
else()
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DLINUX_BSP_128MB" )
endif()
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__riscv_xlen=64" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DTHEAD_C906" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DCONFIG_64BIT" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DRISCV_FPU" )
#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DPXP_PLAT" )
#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DFPGA_PLAT" )
#set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DRISCV_QEMU" )
set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
set( CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS}" CACHE STRING "" )
set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-missing-field-initializers" )
set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-parentheses" )