[linux] remove unused files.
Change-Id: Ie8375acfd9c247d5976842c4fede4ae7d3391bbb
This commit is contained in:
committed by
sam.xiang
parent
89f501af2a
commit
d82d7670c7
@ -1,59 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/cvitek,cv180x-clk.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cvitek CV180X SoC Clock Controller
|
||||
|
||||
maintainers:
|
||||
- Fisher Cheng <fisher.cheng@cvitek.com>
|
||||
|
||||
description: |
|
||||
The Cvitek CV180X SoC clock controller generates and supplies clock to
|
||||
various peripherals within the SoC.
|
||||
|
||||
This binding uses common clock bindings
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cvitek,cv180x-clk
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# Clock controller node:
|
||||
- |
|
||||
clk: clock-controller {
|
||||
compatible = "cvitek,cv180x-clk";
|
||||
reg = <0x0 0x03002000 0x0 0x1000>;
|
||||
clocks = <&osc>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
# Example PWM controller node that consumes clock generated by the clock controller:
|
||||
- |
|
||||
pwm0: pwm@3060000 {
|
||||
compatible = "cvitek,cvi-pwm";
|
||||
reg = <0x0 0x3060000 0x0 0x1000>;
|
||||
clocks = <&clk CV180X_CLK_PWM>;
|
||||
#pwm-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,59 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/cvitek,cv181x-clk.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cvitek CV181X SoC Clock Controller
|
||||
|
||||
maintainers:
|
||||
- Fisher Cheng <fisher.cheng@cvitek.com>
|
||||
|
||||
description: |
|
||||
The Cvitek CV181X SoC clock controller generates and supplies clock to
|
||||
various peripherals within the SoC.
|
||||
|
||||
This binding uses common clock bindings
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cvitek,cv181x-clk
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# Clock controller node:
|
||||
- |
|
||||
clk: clock-controller {
|
||||
compatible = "cvitek,cv181x-clk";
|
||||
reg = <0x0 0x03002000 0x0 0x1000>;
|
||||
clocks = <&osc>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
# Example PWM controller node that consumes clock generated by the clock controller:
|
||||
- |
|
||||
pwm0: pwm@3060000 {
|
||||
compatible = "cvitek,cvi-pwm";
|
||||
reg = <0x0 0x3060000 0x0 0x1000>;
|
||||
clocks = <&clk CV181X_CLK_PWM>;
|
||||
#pwm-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,6 +0,0 @@
|
||||
Cvitek base driver
|
||||
|
||||
This document describes the binding for the Cvitek base.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,base"
|
||||
@ -1,5 +0,0 @@
|
||||
Cvitek bluetooth pin driver
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,bt-pin"
|
||||
- power-gpio: bluetooth chip power on gpio
|
||||
@ -1,8 +0,0 @@
|
||||
Cvitek cif driver
|
||||
|
||||
This document describes the binding for the Cvitek cif.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,cif"
|
||||
- reg: cif register regions
|
||||
- interrupts: cif interrupt number
|
||||
@ -1,8 +0,0 @@
|
||||
Cvitek fb driver
|
||||
|
||||
This document describes the binding for the Cvitek fb.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,fb"
|
||||
- reg: fb register regions
|
||||
- interrupts: display interrupt number
|
||||
@ -1,8 +0,0 @@
|
||||
Cvitek JPEG Driver
|
||||
|
||||
This document describes the binding for Cvitek JPEG.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,jpeg"
|
||||
- reg: jpu register regions
|
||||
- interrupts: jpu interrupt number
|
||||
@ -1,7 +0,0 @@
|
||||
Cvitek mipi_tx driver
|
||||
|
||||
This document describes the binding for the Cvitek vip.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,mipi_tx"
|
||||
- reg: mipi_tx register regions
|
||||
@ -1,9 +0,0 @@
|
||||
Cvitek PWM controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "cvitek,cvi-pwm"
|
||||
- reg: physical base address and length of the controller's registers
|
||||
- clocks: lable to the input clock
|
||||
- #pwm-cells: should be 1. See pwm.txt in this directory for a description of
|
||||
|
||||
|
||||
@ -1,8 +0,0 @@
|
||||
Cvitek rtc driver
|
||||
|
||||
This document describes the binding for the Cvitek rtc.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,rtc"
|
||||
- reg: rtc register regions
|
||||
- interrupts: rtc interrupt number
|
||||
@ -1,8 +0,0 @@
|
||||
Cvitek saradc driver
|
||||
|
||||
This document describes the binding for the Cvitek saradc.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,saradc"
|
||||
- reg: saradc register regions
|
||||
- interrupts: saradc interrupt number
|
||||
@ -1,19 +0,0 @@
|
||||
Cvitek sysDMA remap driver
|
||||
|
||||
This document describes the binding for Cvitek sysDMA remap register.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,sysdma_remap"
|
||||
- reg: sysDMA remap register regions
|
||||
- ch-remap: assign device for each sysDMA remap channel.
|
||||
There are maximum 16 channels can be assigned to remap register.
|
||||
But be noted that sysDMA can only support 8 channels at one time.
|
||||
|
||||
|
||||
Example:
|
||||
sysdma_remap {
|
||||
compatible = "cvitek,sysdma_remap";
|
||||
reg = <0x0 0x03000154 0x0 0x10>;
|
||||
ch-remap = <CVI_I2S0_RX CVI_I2S0_TX CVI_I2S1_RX CVI_I2S1_TX
|
||||
CVI_SPI_NAND CVI_SPI_NAND CVI_I2S3_RX CVI_I2S3_TX>;
|
||||
};
|
||||
@ -1,8 +0,0 @@
|
||||
Bitmain TPU driver
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,tpu"
|
||||
- reg: TDMA and TIU engine's register regions
|
||||
- interrupts: TDMA interrupt number
|
||||
- resets: reset handles for TIU and TDMA
|
||||
- reset-names: should be "tiu" and "tdma"
|
||||
@ -1,11 +0,0 @@
|
||||
Cvitek Video Codec Driver
|
||||
|
||||
This document describes the binding for Cvitek Video Codec.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of the following
|
||||
- "cvitek,vcodec"
|
||||
- "cvitek,cv1822-fpga-vcodec"
|
||||
- "cvitek,cv1822-fpga-jpeg"
|
||||
- reg: vcodec register regions
|
||||
- interrupts: vcodec interrupt number
|
||||
@ -1,8 +0,0 @@
|
||||
Cvitek vip driver
|
||||
|
||||
This document describes the binding for the Cvitek vip.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,vip"
|
||||
- reg: vip register regions
|
||||
- interrupts: vip interrupt number
|
||||
@ -1,8 +0,0 @@
|
||||
Cvitek wiegand driver
|
||||
|
||||
This document describes the binding for the Cvitek vip.
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,wiegand"
|
||||
- reg: wiegand register regions
|
||||
- interrupts: wiegand interrupt number
|
||||
@ -1,6 +0,0 @@
|
||||
sCvitek wifi pin driver
|
||||
|
||||
Required properties:
|
||||
- compatible: "cvitek,wifi-pin"
|
||||
- power-gpio: Wifi chip power on gpio
|
||||
- wakeup-gpio: Wifi chip wakeup gpio
|
||||
@ -1,76 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/cvitek,cv182xa.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cvitek CV181X cv182xa codec driver
|
||||
|
||||
maintainers:
|
||||
- Ethan Chen <ethan.chen@cvitek.com>
|
||||
|
||||
description: |
|
||||
The Cvitek CV181X cv182xa internal audio codec driver.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cvitek,cv182xa-adc
|
||||
const: cvitek,cv182xa-dac
|
||||
const: cvitek,cv182xaadc
|
||||
const: cvitek,cv182xadac
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
cvi,model:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- cvi,model
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# adc codec node:
|
||||
- |
|
||||
adc: adc@0300A100 {
|
||||
compatible = "cvitek,cv182xaadc";
|
||||
reg = <0x0 0x0300A100 0x0 0x100>;
|
||||
clocks = <&i2s_mclk 0>;
|
||||
clock-names = "i2sclk";
|
||||
clk_source = <0x04130000>;
|
||||
};
|
||||
|
||||
# dac codec node:
|
||||
- |
|
||||
dac: dac@0300A000 {
|
||||
compatible = "cvitek,cv182xadac";
|
||||
reg = <0x0 0x0300A000 0x0 0x100>;
|
||||
clocks = <&i2s_mclk 0>;
|
||||
clock-names = "i2sclk";
|
||||
};
|
||||
|
||||
# sound_adc node:
|
||||
- |
|
||||
sound_adc {
|
||||
compatible = "cvitek,cv182xa-adc";
|
||||
cvi,model = "CV182XA";
|
||||
cvi,card_name = "cv182xa_adc";
|
||||
};
|
||||
|
||||
# sound_dac node:
|
||||
- |
|
||||
sound_dac {
|
||||
compatible = "cvitek,cv182xa-dac";
|
||||
cvi,model = "CV182XA";
|
||||
cvi,card_name = "cv182xa_dac";
|
||||
};
|
||||
@ -1,9 +0,0 @@
|
||||
* CVITEK CV180X Thermal Driver
|
||||
|
||||
** Required properties:
|
||||
- compatible : "cvitek,cv180x-thermal"
|
||||
- reg : Address range of the thermal registers.
|
||||
- interrupts : Should contain interrupt for thermal system.
|
||||
- clocks : The clocks for thermal(tempsen).
|
||||
- clock-names : Should be "clk_tempsen".
|
||||
- #thermal-sensor-cells : Should be <1>.
|
||||
@ -1,9 +0,0 @@
|
||||
* CVITEK CV181X Thermal Driver
|
||||
|
||||
** Required properties:
|
||||
- compatible : "cvitek,cv181x-thermal"
|
||||
- reg : Address range of the thermal registers.
|
||||
- interrupts : Should contain interrupt for thermal system.
|
||||
- clocks : The clocks for thermal(tempsen).
|
||||
- clock-names : Should be "clk_tempsen".
|
||||
- #thermal-sensor-cells : Should be <1>.
|
||||
Reference in New Issue
Block a user