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diff --git a/fsbl/plat/cv180x/bl2_objs/cv180zb_wevb_0008a_spinor/bl2/xxhash.o b/fsbl/plat/cv180x/bl2_objs/cv180zb_wevb_0008a_spinor/bl2/xxhash.o
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diff --git a/fsbl/plat/cv181x/bl2/bl2_main.c b/fsbl/plat/cv181x/bl2/bl2_main.c
index e5b11f0f9..4c04a5caf 100644
--- a/fsbl/plat/cv181x/bl2/bl2_main.c
+++ b/fsbl/plat/cv181x/bl2/bl2_main.c
@@ -47,6 +47,7 @@ int dec_verify_image(const void *image, size_t size, size_t dec_skip, struct fip
 
 void bl2_main(void)
 {
+	enum CHIP_CLK_MODE mode;
 	ATF_STATE = ATF_STATE_BL2_MAIN;
 	time_records->fsbl_start = read_time_ms();
 
@@ -68,12 +69,17 @@ void bl2_main(void)
 	set_rtc_en_registers();
 
 	load_ddr();
-#ifdef OD_CLK_SEL
-	load_rest_od_sel();
-#else
-	load_rest();
-#endif
 
+#ifdef OD_CLK_SEL
+	mode = CLK_OD;
+#else
+#ifdef VC_CLK_OVERDRIVE
+	mode = CLK_VC_OD;
+#else
+	mode = CLK_ND;
+#endif
+#endif
+	load_rest(mode);
 	NOTICE("BL2 end.\n");
 
 	while (1)
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diff --git a/fsbl/plat/cv181x/include/platform.h b/fsbl/plat/cv181x/include/platform.h
index e610c1807..b899e8878 100644
--- a/fsbl/plat/cv181x/include/platform.h
+++ b/fsbl/plat/cv181x/include/platform.h
@@ -51,6 +51,12 @@ enum CHIP_CONF_CMD {
 	CHIP_CONF_CMD_DELAY_MS = 0xFFFFFFFD
 };
 
+enum CHIP_CLK_MODE {
+	CLK_ND = 0,
+	CLK_OD,
+	CLK_VC_OD
+};
+
 void apply_chip_conf(const struct chip_conf chip_conf[], uint32_t size, enum CHIP_CONF_CMD scan_start,
 		     enum CHIP_CONF_CMD scan_end);
 
@@ -112,14 +118,12 @@ void set_rtc_en_registers(void);
 
 void apply_analog_trimming_data(void);
 
-void sys_pll_init(void);
-void sys_pll_init_od_sel(void);
+void sys_pll_init(enum CHIP_CLK_MODE mode);
 void sys_switch_all_to_pll(void);
 
 void lock_efuse_chipsn(void);
 int load_ddr(void);
-int load_rest(void);
-int load_rest_od_sel(void);
+int load_rest(enum CHIP_CLK_MODE mode);
 
 #endif /* __ASSEMBLY__ */