5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
37 lines
977 B
C
37 lines
977 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Joshua Henderson <joshua.henderson@microchip.com>
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* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
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*/
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#ifndef _ASM_MACH_PIC32_H
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#define _ASM_MACH_PIC32_H
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#include <linux/io.h>
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/*
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* PIC32 register offsets for SET/CLR/INV where supported.
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*/
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#define PIC32_CLR(_reg) ((_reg) + 0x04)
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#define PIC32_SET(_reg) ((_reg) + 0x08)
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#define PIC32_INV(_reg) ((_reg) + 0x0C)
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/*
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* PIC32 Base Register Offsets
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*/
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#define PIC32_BASE_CONFIG 0x1f800000
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#define PIC32_BASE_OSC 0x1f801200
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#define PIC32_BASE_RESET 0x1f801240
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#define PIC32_BASE_PPS 0x1f801400
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#define PIC32_BASE_UART 0x1f822000
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#define PIC32_BASE_PORT 0x1f860000
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#define PIC32_BASE_DEVCFG2 0x1fc4ff44
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/*
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* Register unlock sequence required for some register access.
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*/
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void pic32_syskey_unlock_debug(const char *fn, const ulong ln);
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#define pic32_syskey_unlock() \
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pic32_syskey_unlock_debug(__func__, __LINE__)
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#endif /* _ASM_MACH_PIC32_H */
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