5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
21 lines
605 B
Plaintext
21 lines
605 B
Plaintext
* Device tree bindings for Texas Instruments keystone pll controller
|
|
|
|
The main pll controller used to drive theC66x CorePacs, the switch fabric,
|
|
and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
|
|
the NETCP modules) requires a PLL Controller to manage the various clock
|
|
divisions, gating, and synchronization.
|
|
|
|
Required properties:
|
|
|
|
- compatible: "ti,keystone-pllctrl", "syscon"
|
|
|
|
- reg: contains offset/length value for pll controller
|
|
registers space.
|
|
|
|
Example:
|
|
|
|
pllctrl: pll-controller@02310000 {
|
|
compatible = "ti,keystone-pllctrl", "syscon";
|
|
reg = <0x02310000 0x200>;
|
|
};
|