5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
85 lines
1.1 KiB
Plaintext
85 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* DTS file for AMD/Linaro 96Boards Enterprise Edition Server (Husky) Board
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* Note: Based-on AMD Seattle Rev.B0
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*
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* Copyright (C) 2015 Advanced Micro Devices, Inc.
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*/
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/dts-v1/;
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/include/ "amd-seattle-soc.dtsi"
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/ {
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model = "Linaro 96Boards Enterprise Edition Server (Husky) Board";
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compatible = "amd,seattle-overdrive", "amd,seattle";
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chosen {
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stdout-path = &serial0;
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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};
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&ccp0 {
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status = "ok";
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amd,zlib-support = <1>;
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};
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/**
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* NOTE: In Rev.B, gpio0 is reserved.
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*/
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&gpio1 {
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status = "ok";
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};
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&gpio2 {
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status = "ok";
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};
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&gpio3 {
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status = "ok";
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};
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&gpio4 {
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status = "ok";
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};
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&i2c0 {
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status = "ok";
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};
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&i2c1 {
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status = "ok";
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};
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&pcie0 {
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status = "ok";
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};
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&spi0 {
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status = "ok";
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};
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&spi1 {
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status = "ok";
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sdcard0: sdcard@0 {
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compatible = "mmc-spi-slot";
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reg = <0>;
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spi-max-frequency = <20000000>;
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voltage-ranges = <3200 3400>;
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pl022,hierarchy = <0>;
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pl022,interface = <0>;
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pl022,com-mode = <0x0>;
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pl022,rx-level-trig = <0>;
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pl022,tx-level-trig = <0>;
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};
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};
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&smb0 {
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/include/ "amd-seattle-xgbe-b.dtsi"
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};
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