5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
75 lines
1.4 KiB
ArmAsm
75 lines
1.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* FP/SIMD state saving and restoring
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/fpsimdmacros.h>
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/*
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* Save the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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SYM_FUNC_START(fpsimd_save_state)
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fpsimd_save x0, 8
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ret
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SYM_FUNC_END(fpsimd_save_state)
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/*
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* Load the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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SYM_FUNC_START(fpsimd_load_state)
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fpsimd_restore x0, 8
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ret
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SYM_FUNC_END(fpsimd_load_state)
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#ifdef CONFIG_ARM64_SVE
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SYM_FUNC_START(sve_save_state)
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sve_save 0, x1, 2
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ret
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SYM_FUNC_END(sve_save_state)
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SYM_FUNC_START(sve_load_state)
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sve_load 0, x1, x2, 3, x4
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ret
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SYM_FUNC_END(sve_load_state)
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SYM_FUNC_START(sve_get_vl)
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_sve_rdvl 0, 1
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ret
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SYM_FUNC_END(sve_get_vl)
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/*
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* Load SVE state from FPSIMD state.
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*
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* x0 = pointer to struct fpsimd_state
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* x1 = VQ - 1
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*
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* Each SVE vector will be loaded with the first 128-bits taken from FPSIMD
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* and the rest zeroed. All the other SVE registers will be zeroed.
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*/
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SYM_FUNC_START(sve_load_from_fpsimd_state)
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sve_load_vq x1, x2, x3
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fpsimd_restore x0, 8
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_for n, 0, 15, _sve_pfalse \n
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_sve_wrffr 0
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ret
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SYM_FUNC_END(sve_load_from_fpsimd_state)
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/* Zero all SVE registers but the first 128-bits of each vector */
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SYM_FUNC_START(sve_flush_live)
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sve_flush
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ret
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SYM_FUNC_END(sve_flush_live)
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#endif /* CONFIG_ARM64_SVE */
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