4f810186ab
1. update cv182x/cv183x configuration file 2. update cv181x/cv180x configuration file 3. update clk driver for cvitek 4. update dma driver for cvitek 5. update soc driver for cvitek 6. porting cvitek ion driver from kernel-4.19 7. compatible with riscv Change-Id: Icff9fafe0ebe7d6bab824bbadb952e08bdc66c19
125 lines
2.4 KiB
C
125 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#define XUANTIE
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#ifdef XUANTIE
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#include <asm/mmu_context.h>
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void flush_tlb_all(void)
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{
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#ifdef CONFIG_NO_SFENCE_VMA
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csr_write(CSR_SMCIR, 1 << 26);
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#else
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__asm__ __volatile__ ("sfence.vma" : : : "memory");
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#endif
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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int newpid = cpu_asid(mm);
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#ifdef CONFIG_NO_SFENCE_VMA
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csr_write(CSR_SMCIR, (1 << 27) | newpid);
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#else
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__asm__ __volatile__ ("sfence.vma zero, %0"
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:
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: "r"(newpid)
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: "memory");
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#endif
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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{
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int newpid = cpu_asid(vma->vm_mm);
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#ifdef CONFIG_NO_SFENCE_VMA
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csr_write(CSR_SMCIR, (1 << 27) | newpid);
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#else
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addr &= PAGE_MASK;
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__asm__ __volatile__ ("sfence.vma %0, %1"
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:
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: "r"(addr), "r"(newpid)
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: "memory");
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#endif
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}
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void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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unsigned long newpid = cpu_asid(vma->vm_mm);
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#ifdef CONFIG_NO_SFENCE_VMA
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csr_write(CSR_SMCIR, (1 << 27) | newpid);
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#else
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start &= PAGE_MASK;
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end += PAGE_SIZE - 1;
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end &= PAGE_MASK;
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while (start < end) {
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__asm__ __volatile__ ("sfence.vma %0, %1"
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:
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: "r"(start), "r"(newpid)
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: "memory");
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start += PAGE_SIZE;
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}
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#endif
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}
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#else
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#include <asm/sbi.h>
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void flush_tlb_all(void)
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{
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sbi_remote_sfence_vma(NULL, 0, -1);
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}
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/*
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* This function must not be called with cmask being null.
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* Kernel may panic if cmask is NULL.
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*/
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static void __sbi_tlb_flush_range(struct cpumask *cmask, unsigned long start,
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unsigned long size)
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{
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struct cpumask hmask;
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unsigned int cpuid;
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if (cpumask_empty(cmask))
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return;
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cpuid = get_cpu();
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if (cpumask_any_but(cmask, cpuid) >= nr_cpu_ids) {
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/* local cpu is the only cpu present in cpumask */
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if (size <= PAGE_SIZE)
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local_flush_tlb_page(start);
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else
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local_flush_tlb_all();
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} else {
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riscv_cpuid_to_hartid_mask(cmask, &hmask);
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sbi_remote_sfence_vma(cpumask_bits(&hmask), start, size);
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}
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put_cpu();
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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__sbi_tlb_flush_range(mm_cpumask(mm), 0, -1);
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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{
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__sbi_tlb_flush_range(mm_cpumask(vma->vm_mm), addr, PAGE_SIZE);
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}
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void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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__sbi_tlb_flush_range(mm_cpumask(vma->vm_mm), start, end - start);
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}
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#endif
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