5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
45 lines
1.2 KiB
Plaintext
45 lines
1.2 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config SH_INTC
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bool
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select IRQ_DOMAIN
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if SH_INTC
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comment "Interrupt controller options"
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config INTC_USERIMASK
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bool "Userspace interrupt masking support"
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depends on (SUPERH && CPU_SH4A) || COMPILE_TEST
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help
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This enables support for hardware-assisted userspace hardirq
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masking.
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SH-4A and newer interrupt blocks all support a special shadowed
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page with all non-masking registers obscured when mapped in to
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userspace. This is primarily for use by userspace device
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drivers that are using special priority levels.
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If in doubt, say N.
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config INTC_BALANCING
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bool "Hardware IRQ balancing support"
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depends on SMP && SUPERH && CPU_SHX3
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help
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This enables support for IRQ auto-distribution mode on SH-X3
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SMP parts. All of the balancing and CPU wakeup decisions are
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taken care of automatically by hardware for distributed
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vectors.
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If in doubt, say N.
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config INTC_MAPPING_DEBUG
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bool "Expose IRQ to per-controller id mapping via debugfs"
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depends on DEBUG_FS
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help
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This will create a debugfs entry for showing the relationship
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between system IRQs and the per-controller id tables.
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If in doubt, say N.
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endif
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