5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
67 lines
1.4 KiB
C
67 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2014 NVIDIA Corporation
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*/
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#ifndef __SOC_TEGRA_PM_H__
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#define __SOC_TEGRA_PM_H__
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#include <linux/errno.h>
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enum tegra_suspend_mode {
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TEGRA_SUSPEND_NONE = 0,
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TEGRA_SUSPEND_LP2, /* CPU voltage off */
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TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
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TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
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TEGRA_MAX_SUSPEND_MODE,
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};
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#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM)
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enum tegra_suspend_mode
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tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
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/* low-level resume entry point */
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void tegra_resume(void);
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int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
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void tegra_pm_clear_cpu_in_lp2(void);
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void tegra_pm_set_cpu_in_lp2(void);
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int tegra_pm_enter_lp2(void);
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int tegra_pm_park_secondary_cpu(unsigned long cpu);
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#else
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static inline enum tegra_suspend_mode
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tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
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{
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return TEGRA_SUSPEND_NONE;
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}
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static inline void tegra_resume(void)
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{
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}
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static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
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{
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return -ENOTSUPP;
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}
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static inline void tegra_pm_clear_cpu_in_lp2(void)
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{
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}
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static inline void tegra_pm_set_cpu_in_lp2(void)
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{
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}
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static inline int tegra_pm_enter_lp2(void)
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{
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return -ENOTSUPP;
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}
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static inline int tegra_pm_park_secondary_cpu(unsigned long cpu)
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{
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return -ENOTSUPP;
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}
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#endif /* CONFIG_PM_SLEEP */
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#endif /* __SOC_TEGRA_PM_H__ */
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