5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
25 lines
955 B
Plaintext
25 lines
955 B
Plaintext
What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address
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Date: April 2017
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Contact: Jeremy Kerr <jk@ozlabs.org>
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Description: Configures which IO port the host side of the UART
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will appear on the host <-> BMC LPC bus.
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Users: OpenBMC. Proposed changes should be mailed to
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openbmc@lists.ozlabs.org
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What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq
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Date: April 2017
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Contact: Jeremy Kerr <jk@ozlabs.org>
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Description: Configures which interrupt number the host side of
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the UART will appear on the host <-> BMC LPC bus.
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Users: OpenBMC. Proposed changes should be mailed to
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openbmc@lists.ozlabs.org
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What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity
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Date: July 2019
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Contact: Oskar Senft <osk@google.com>
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Description: Configures the polarity of the serial interrupt to the
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host via the BMC LPC bus.
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Set to 0 for active-low or 1 for active-high.
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Users: OpenBMC. Proposed changes should be mailed to
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openbmc@lists.ozlabs.org
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