5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
30 lines
700 B
Plaintext
30 lines
700 B
Plaintext
* QEMU PVPANIC MMIO Configuration bindings
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QEMU's emulation / virtualization targets provide the following PVPANIC
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MMIO Configuration interface on the "virt" machine.
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type:
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- a read-write, 16-bit wide data register.
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QEMU exposes the data register to guests as memory mapped registers.
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Required properties:
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- compatible: "qemu,pvpanic-mmio".
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- reg: the MMIO region used by the device.
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* Bytes 0x0 Write panic event to the reg when guest OS panics.
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* Bytes 0x1 Reserved.
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Example:
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/ {
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#size-cells = <0x2>;
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#address-cells = <0x2>;
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pvpanic-mmio@9060000 {
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compatible = "qemu,pvpanic-mmio";
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reg = <0x0 0x9060000 0x0 0x2>;
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};
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};
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