5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
50 lines
1.0 KiB
YAML
50 lines
1.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale(NXP) IMX8 DDR performance monitor
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maintainers:
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- Frank Li <frank.li@nxp.com>
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properties:
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compatible:
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oneOf:
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- enum:
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- fsl,imx8-ddr-pmu
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- fsl,imx8m-ddr-pmu
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- fsl,imx8mp-ddr-pmu
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- items:
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- enum:
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- fsl,imx8mm-ddr-pmu
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- fsl,imx8mn-ddr-pmu
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- fsl,imx8mq-ddr-pmu
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- fsl,imx8mp-ddr-pmu
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- const: fsl,imx8m-ddr-pmu
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ddr-pmu@5c020000 {
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compatible = "fsl,imx8-ddr-pmu";
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reg = <0x5c020000 0x10000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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};
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