5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
35 lines
1.3 KiB
Plaintext
35 lines
1.3 KiB
Plaintext
Microchip PIC32 SPI Master controller
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Required properties:
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- compatible: Should be "microchip,pic32mzda-spi".
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- reg: Address and length of register space for the device.
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- interrupts: Should contain all three spi interrupts in sequence
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of <fault-irq>, <receive-irq>, <transmit-irq>.
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- interrupt-names: Should be "fault", "rx", "tx" in order.
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- clocks: Phandle of the clock generating SPI clock on the bus.
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- clock-names: Should be "mck0".
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- cs-gpios: Specifies the gpio pins to be used for chipselects.
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See: Documentation/devicetree/bindings/spi/spi-bus.txt
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Optional properties:
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- dmas: Two or more DMA channel specifiers following the convention outlined
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in Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: Names for the dma channels. There must be at least one channel
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named "spi-tx" for transmit and named "spi-rx" for receive.
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Example:
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spi1: spi@1f821000 {
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compatible = "microchip,pic32mzda-spi";
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reg = <0x1f821000 0x200>;
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interrupts = <109 IRQ_TYPE_LEVEL_HIGH>,
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<110 IRQ_TYPE_LEVEL_HIGH>,
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<111 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "fault", "rx", "tx";
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clocks = <&PBCLK2>;
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clock-names = "mck0";
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cs-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
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dmas = <&dma 134>, <&dma 135>;
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dma-names = "spi-rx", "spi-tx";
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};
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