5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
36 lines
812 B
C
36 lines
812 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 Google LLC.
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*/
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#ifndef __ASM_RWONCE_H
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#define __ASM_RWONCE_H
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#ifdef CONFIG_SMP
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#include <asm/barrier.h>
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/*
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* Alpha is apparently daft enough to reorder address-dependent loads
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* on some CPU implementations. Knock some common sense into it with
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* a memory barrier in READ_ONCE().
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*
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* For the curious, more information about this unusual reordering is
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* available in chapter 15 of the "perfbook":
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*
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* https://kernel.org/pub/linux/kernel/people/paulmck/perfbook/perfbook.html
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*
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*/
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#define __READ_ONCE(x) \
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({ \
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__unqual_scalar_typeof(x) __x = \
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(*(volatile typeof(__x) *)(&(x))); \
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mb(); \
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(typeof(x))__x; \
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})
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#endif /* CONFIG_SMP */
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#include <asm-generic/rwonce.h>
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#endif /* __ASM_RWONCE_H */
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