5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
63 lines
1.2 KiB
Plaintext
63 lines
1.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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//
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// Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
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// Copyright 2014 Freescale Semiconductor, Inc.
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/dts-v1/;
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#include "imx35.dtsi"
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/ {
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model = "Freescale i.MX35 Product Development Kit";
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compatible = "fsl,imx35-pdk", "fsl,imx35";
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x8000000>,
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<0x90000000 0x8000000>;
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};
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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status = "okay";
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};
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&iomuxc {
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imx35-pdk {
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
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MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
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MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
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MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
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MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
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MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5
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MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5
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MX35_PAD_CTS1__UART1_CTS 0x1c5
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MX35_PAD_RTS1__UART1_RTS 0x1c5
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>;
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};
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};
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};
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&nfc {
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nand-bus-width = <16>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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uart-has-rtscts;
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status = "okay";
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};
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