5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
88 lines
1.5 KiB
C
88 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
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* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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*/
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#ifndef __ASM_ARCH_MXC_H__
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#define __ASM_ARCH_MXC_H__
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#include <linux/types.h>
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#include <soc/imx/cpu.h>
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#ifndef __ASM_ARCH_MXC_HARDWARE_H__
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#error "Do not include directly."
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#endif
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#define IMX_DDR_TYPE_LPDDR2 1
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_SOC_IMX6SL
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static inline bool cpu_is_imx6sl(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6SL;
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}
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#else
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static inline bool cpu_is_imx6sl(void)
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{
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return false;
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}
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#endif
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static inline bool cpu_is_imx6dl(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6DL;
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}
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static inline bool cpu_is_imx6sx(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6SX;
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}
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static inline bool cpu_is_imx6ul(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6UL;
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}
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static inline bool cpu_is_imx6ull(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6ULL;
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}
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static inline bool cpu_is_imx6ulz(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6ULZ;
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}
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static inline bool cpu_is_imx6sll(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6SLL;
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}
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static inline bool cpu_is_imx6q(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6Q;
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}
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static inline bool cpu_is_imx7d(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX7D;
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}
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struct cpu_op {
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u32 cpu_rate;
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};
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int tzic_enable_wake(void);
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extern struct cpu_op *(*get_cpu_op)(int *op);
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#endif
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#define imx_readl readl_relaxed
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#define imx_readw readw_relaxed
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#define imx_writel writel_relaxed
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#define imx_writew writew_relaxed
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#endif /* __ASM_ARCH_MXC_H__ */
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