1. update cv182x/cv183x configuration file 2. update cv181x/cv180x configuration file 3. update clk driver for cvitek 4. update dma driver for cvitek 5. update soc driver for cvitek 6. porting cvitek ion driver from kernel-4.19 7. compatible with riscv Change-Id: Icff9fafe0ebe7d6bab824bbadb952e08bdc66c19
33 lines
658 B
C
33 lines
658 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef __ASM_CSKY_REGDEF_H
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#define __ASM_CSKY_REGDEF_H
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#ifdef __ASSEMBLY__
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#define syscallid r7
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#else
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#define syscallid "r7"
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#endif
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#define regs_syscallid(regs) regs->regs[3]
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#define regs_fp(regs) regs->regs[4]
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/*
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* PSR format:
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* | 31 | 30-24 | 23-16 | 15 14 | 13-10 | 9 | 8-0 |
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* S VEC TM MM
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*
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* S: Super Mode
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* VEC: Exception Number
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* TM: Trace Mode
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* MM: Memory unaligned addr access
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*/
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#define DEFAULT_PSR_VALUE 0x80000200
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#define SYSTRACE_SAVENUM 5
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#define TRAP0_SIZE 4
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#endif /* __ASM_CSKY_REGDEF_H */
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