5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
25 lines
556 B
C
25 lines
556 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 MIPS Tech, LLC
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* Author: Matt Redfearn <matt.redfearn@mips.com>
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*/
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#ifndef __MIPS_ASM_ISA_REV_H__
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#define __MIPS_ASM_ISA_REV_H__
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/*
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* The ISA revision level. This is 0 for MIPS I to V and N for
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* MIPS{32,64}rN.
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*/
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/* If the compiler has defined __mips_isa_rev, believe it. */
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#ifdef __mips_isa_rev
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#define MIPS_ISA_REV __mips_isa_rev
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#else
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/* The compiler hasn't defined the isa rev so assume it's MIPS I - V (0) */
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#define MIPS_ISA_REV 0
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#endif
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#endif /* __MIPS_ASM_ISA_REV_H__ */
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