5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
50 lines
1002 B
C
50 lines
1002 B
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* cppc_msr.c: MSR Interface for CPPC
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* Copyright (c) 2016, Intel Corporation.
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*/
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#include <acpi/cppc_acpi.h>
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#include <asm/msr.h>
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/* Refer to drivers/acpi/cppc_acpi.c for the description of functions */
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bool cpc_ffh_supported(void)
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{
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return true;
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}
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int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
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{
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int err;
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err = rdmsrl_safe_on_cpu(cpunum, reg->address, val);
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if (!err) {
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u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
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reg->bit_offset);
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*val &= mask;
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*val >>= reg->bit_offset;
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}
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return err;
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}
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int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
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{
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u64 rd_val;
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int err;
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err = rdmsrl_safe_on_cpu(cpunum, reg->address, &rd_val);
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if (!err) {
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u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
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reg->bit_offset);
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val <<= reg->bit_offset;
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val &= mask;
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rd_val &= ~mask;
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rd_val |= val;
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err = wrmsrl_safe_on_cpu(cpunum, reg->address, rd_val);
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}
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return err;
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}
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