5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
29 lines
747 B
C
29 lines
747 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_UM_BARRIER_H_
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#define _ASM_UM_BARRIER_H_
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#include <asm/alternative.h>
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/*
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* Force strict CPU ordering.
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* And yes, this is required on UP too when we're talking
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* to devices.
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*/
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#ifdef CONFIG_X86_32
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#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
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#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
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#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
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#else /* CONFIG_X86_32 */
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#define mb() asm volatile("mfence" : : : "memory")
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#define rmb() asm volatile("lfence" : : : "memory")
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#define wmb() asm volatile("sfence" : : : "memory")
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#endif /* CONFIG_X86_32 */
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#include <asm-generic/barrier.h>
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#endif
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