5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
43 lines
1.1 KiB
C
43 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Hisilicon HiP04 clock driver
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*
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* Copyright (c) 2013-2014 Hisilicon Limited.
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* Copyright (c) 2013-2014 Linaro Limited.
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*
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* Author: Haojian Zhuang <haojian.zhuang@linaro.org>
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*/
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#include <linux/kernel.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <dt-bindings/clock/hip04-clock.h>
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#include "clk.h"
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/* fixed rate clocks */
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static struct hisi_fixed_rate_clock hip04_fixed_rate_clks[] __initdata = {
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{ HIP04_OSC50M, "osc50m", NULL, 0, 50000000, },
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{ HIP04_CLK_50M, "clk50m", NULL, 0, 50000000, },
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{ HIP04_CLK_168M, "clk168m", NULL, 0, 168750000, },
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};
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static void __init hip04_clk_init(struct device_node *np)
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{
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struct hisi_clock_data *clk_data;
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clk_data = hisi_clk_init(np, HIP04_NR_CLKS);
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if (!clk_data)
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return;
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hisi_clk_register_fixed_rate(hip04_fixed_rate_clks,
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ARRAY_SIZE(hip04_fixed_rate_clks),
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clk_data);
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}
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CLK_OF_DECLARE(hip04_clk, "hisilicon,hip04-clock", hip04_clk_init);
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