311 lines
10 KiB
C
311 lines
10 KiB
C
#ifndef _ISP_REG_H_
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#define _ISP_REG_H_
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#include "vi_reg_fields.h"
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#include "vi_reg_blocks.h"
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#include "vi_vreg_blocks.h"
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#define ISP_TOP_PHY_REG_BASE (0x0A000000)
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#define VREG_SIZE (sizeof(struct VREG_RESV))
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#define ADMA_DESC_SIZE (sizeof(struct ISPCQ_ADMA_DESC_T))
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/* ISP REG FIELD DEFINE */
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/* ISP BLOCK ADDR OFFSET DEFINE */
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#define ISP_BLK_BA_PRE_RAW_FE0 (0x00000000)
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#define ISP_BLK_BA_CSIBDG0 (0x00000800)
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#define ISP_BLK_BA_DMA_CTL6 (0x00000B00)
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#define ISP_BLK_BA_DMA_CTL7 (0x00000C00)
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#define ISP_BLK_BA_DMA_CTL8 (0x00000D00)
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#define ISP_BLK_BA_DMA_CTL9 (0x00000E00)
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#define ISP_BLK_BA_BLC0 (0x00001000)
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#define ISP_BLK_BA_BLC1 (0x00001800)
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#define ISP_BLK_BA_RGBMAP0 (0x00002000)
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#define ISP_BLK_BA_WBG2 (0x00002100)
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#define ISP_BLK_BA_DMA_CTL10 (0x00002200)
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#define ISP_BLK_BA_RGBMAP1 (0x00002300)
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#define ISP_BLK_BA_WBG3 (0x00002400)
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#define ISP_BLK_BA_DMA_CTL11 (0x00002500)
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#define ISP_BLK_BA_PRE_RAW_FE1 (0x00008000)
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#define ISP_BLK_BA_CSIBDG1 (0x00008800)
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#define ISP_BLK_BA_DMA_CTL12 (0x00008B00)
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#define ISP_BLK_BA_DMA_CTL13 (0x00008C00)
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#define ISP_BLK_BA_DMA_CTL14 (0x00008D00)
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#define ISP_BLK_BA_DMA_CTL15 (0x00008E00)
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#define ISP_BLK_BA_BLC2 (0x00009000)
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#define ISP_BLK_BA_BLC3 (0x00009800)
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#define ISP_BLK_BA_RGBMAP2 (0x0000A000)
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#define ISP_BLK_BA_WBG4 (0x0000A100)
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#define ISP_BLK_BA_DMA_CTL16 (0x0000A200)
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#define ISP_BLK_BA_RGBMAP3 (0x0000A300)
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#define ISP_BLK_BA_WBG5 (0x0000A400)
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#define ISP_BLK_BA_DMA_CTL17 (0x0000A500)
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#define ISP_BLK_BA_PRE_RAW_FE2 (0x00010000)
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#define ISP_BLK_BA_CSIBDG2 (0x00010800)
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#define ISP_BLK_BA_DMA_CTL18 (0x00010B00)
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#define ISP_BLK_BA_DMA_CTL19 (0x00010C00)
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#define ISP_BLK_BA_BLC4 (0x00011000)
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#define ISP_BLK_BA_RGBMAP4 (0x00012000)
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#define ISP_BLK_BA_WBG6 (0x00012100)
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#define ISP_BLK_BA_DMA_CTL20 (0x00012200)
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#define ISP_BLK_BA_PRE_RAW_BE (0x00018000)
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#define ISP_BLK_BA_CROP0 (0x00018800)
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#define ISP_BLK_BA_CROP1 (0x00019000)
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#define ISP_BLK_BA_BLC5 (0x00019800)
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#define ISP_BLK_BA_BLC6 (0x0001A000)
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#define ISP_BLK_BA_AF (0x0001A800)
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#define ISP_BLK_BA_DMA_CTL21 (0x0001AA00)
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#define ISP_BLK_BA_DPC0 (0x0001B000)
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#define ISP_BLK_BA_DPC1 (0x0001B100)
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#define ISP_BLK_BA_DMA_CTL22 (0x0001B800)
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#define ISP_BLK_BA_DMA_CTL23 (0x0001B880)
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#define ISP_BLK_BA_PRE_WDMA (0x0001B900)
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#define ISP_BLK_BA_PCHK0 (0x0001C000)
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#define ISP_BLK_BA_PCHK1 (0x0001C800)
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#define ISP_BLK_BA_RAWTOP (0x00030000)
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#define ISP_BLK_BA_CFA (0x00031000)
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#define ISP_BLK_BA_LSC (0x00032000)
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#define ISP_BLK_BA_DMA_CTL24 (0x00032100)
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#define ISP_BLK_BA_GMS (0x00033000)
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#define ISP_BLK_BA_DMA_CTL25 (0x00033100)
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#define ISP_BLK_BA_AEHIST0 (0x00034000)
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#define ISP_BLK_BA_DMA_CTL26 (0x00034400)
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#define ISP_BLK_BA_AEHIST1 (0x00035000)
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#define ISP_BLK_BA_DMA_CTL27 (0x00035400)
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#define ISP_BLK_BA_DMA_CTL28 (0x00036000)
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#define ISP_BLK_BA_DMA_CTL29 (0x00036080)
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#define ISP_BLK_BA_RAW_RDMA (0x00036100)
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#define ISP_BLK_BA_BNR (0x0003C000)
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#define ISP_BLK_BA_CROP2 (0x0003D000)
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#define ISP_BLK_BA_CROP3 (0x0003E000)
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#define ISP_BLK_BA_LMAP0 (0x0003F000)
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#define ISP_BLK_BA_DMA_CTL30 (0x0003F100)
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#define ISP_BLK_BA_LMAP1 (0x0003F200)
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#define ISP_BLK_BA_DMA_CTL31 (0x0003F300)
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#define ISP_BLK_BA_WBG0 (0x00040000)
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#define ISP_BLK_BA_WBG1 (0x00041000)
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#define ISP_BLK_BA_PCHK2 (0x00042000)
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#define ISP_BLK_BA_PCHK3 (0x00043000)
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#define ISP_BLK_BA_LCAC (0x00044000)
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#define ISP_BLK_BA_RGBCAC (0x00045000)
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#define ISP_BLK_BA_RGBTOP (0x00050000)
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#define ISP_BLK_BA_CCM0 (0x00052000)
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#define ISP_BLK_BA_CCM1 (0x00052100)
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#define ISP_BLK_BA_RGBGAMMA (0x00052200)
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#define ISP_BLK_BA_YGAMMA (0x00052300)
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#define ISP_BLK_BA_MMAP (0x00053000)
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#define ISP_BLK_BA_DMA_CTL32 (0x00053200)
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#define ISP_BLK_BA_DMA_CTL33 (0x00053300)
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#define ISP_BLK_BA_DMA_CTL34 (0x00053400)
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#define ISP_BLK_BA_DMA_CTL35 (0x00053500)
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#define ISP_BLK_BA_DMA_CTL36 (0x00053600)
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#define ISP_BLK_BA_DMA_CTL37 (0x00053700)
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#define ISP_BLK_BA_CLUT (0x00054000)
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#define ISP_BLK_BA_DHZ (0x00055000)
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#define ISP_BLK_BA_CSC (0x00056000)
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#define ISP_BLK_BA_RGBDITHER (0x00057000)
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#define ISP_BLK_BA_PCHK4 (0x00059000)
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#define ISP_BLK_BA_PCHK5 (0x0005A000)
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#define ISP_BLK_BA_HIST_V (0x0005C000)
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#define ISP_BLK_BA_DMA_CTL38 (0x0005C100)
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#define ISP_BLK_BA_HDRFUSION (0x0005D000)
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#define ISP_BLK_BA_HDRLTM (0x0005E000)
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#define ISP_BLK_BA_DMA_CTL39 (0x0005E100)
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#define ISP_BLK_BA_DMA_CTL40 (0x0005E200)
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#define ISP_BLK_BA_YUVTOP (0x00060000)
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#define ISP_BLK_BA_TNR (0x00061000)
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#define ISP_BLK_BA_DMA_CTL41 (0x00061800)
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#define ISP_BLK_BA_DMA_CTL42 (0x00061900)
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#define ISP_BLK_BA_FBCE (0x00061A00)
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#define ISP_BLK_BA_DMA_CTL43 (0x00061B00)
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#define ISP_BLK_BA_DMA_CTL44 (0x00061C00)
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#define ISP_BLK_BA_FBCD (0x00061D00)
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#define ISP_BLK_BA_YUVDITHER (0x00061E00)
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#define ISP_BLK_BA_CA (0x00062000)
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#define ISP_BLK_BA_CA_LITE (0x00063000)
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#define ISP_BLK_BA_YNR (0x00064000)
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#define ISP_BLK_BA_CNR (0x00065000)
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#define ISP_BLK_BA_EE (0x00066000)
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#define ISP_BLK_BA_YCURVE (0x00067000)
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#define ISP_BLK_BA_DCI (0x00068000)
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#define ISP_BLK_BA_DMA_CTL45 (0x00068100)
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#define ISP_BLK_BA_DCI_GAMMA (0x00068200)
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#define ISP_BLK_BA_CROP4 (0x00069000)
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#define ISP_BLK_BA_DMA_CTL46 (0x00069100)
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#define ISP_BLK_BA_CROP5 (0x0006A000)
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#define ISP_BLK_BA_DMA_CTL47 (0x0006A100)
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#define ISP_BLK_BA_LDCI (0x0006B000)
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#define ISP_BLK_BA_DMA_CTL48 (0x0006B300)
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#define ISP_BLK_BA_DMA_CTL49 (0x0006B400)
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#define ISP_BLK_BA_PRE_EE (0x0006C000)
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#define ISP_BLK_BA_PCHK6 (0x0006D000)
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#define ISP_BLK_BA_PCHK7 (0x0006E000)
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#define ISP_BLK_BA_ISPTOP (0x00070000)
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#define ISP_BLK_BA_WDMA_CORE0 (0x00072000)
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#define ISP_BLK_BA_RDMA_CORE (0x00074000)
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#define ISP_BLK_BA_CSIBDG_LITE (0x00076000)
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#define ISP_BLK_BA_DMA_CTL0 (0x00076200)
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#define ISP_BLK_BA_DMA_CTL1 (0x00076300)
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#define ISP_BLK_BA_DMA_CTL2 (0x00076400)
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#define ISP_BLK_BA_DMA_CTL3 (0x00076500)
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#define ISP_BLK_BA_WDMA_CORE1 (0x00078000)
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#define ISP_BLK_BA_PRE_RAW_VI_SEL (0x0007F400)
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#define ISP_BLK_BA_DMA_CTL4 (0x0007F500)
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#define ISP_BLK_BA_DMA_CTL5 (0x0007F600)
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#define ISP_BLK_BA_CMDQ (0x0007FC00)
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enum ISP_BLK_ID_T {
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ISP_BLK_ID_PRE_RAW_FE0,
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ISP_BLK_ID_CSIBDG0,
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ISP_BLK_ID_DMA_CTL6,
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ISP_BLK_ID_DMA_CTL7,
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ISP_BLK_ID_DMA_CTL8,
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ISP_BLK_ID_DMA_CTL9,
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ISP_BLK_ID_BLC0,
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ISP_BLK_ID_BLC1,
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ISP_BLK_ID_RGBMAP0,
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ISP_BLK_ID_WBG2,
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ISP_BLK_ID_DMA_CTL10, //10
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ISP_BLK_ID_RGBMAP1,
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ISP_BLK_ID_WBG3,
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ISP_BLK_ID_DMA_CTL11, //13
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ISP_BLK_ID_PRE_RAW_FE1,
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ISP_BLK_ID_CSIBDG1,
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ISP_BLK_ID_DMA_CTL12,
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ISP_BLK_ID_DMA_CTL13,
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ISP_BLK_ID_DMA_CTL14,
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ISP_BLK_ID_DMA_CTL15,
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ISP_BLK_ID_BLC2,
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ISP_BLK_ID_BLC3,
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ISP_BLK_ID_RGBMAP2,
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ISP_BLK_ID_WBG4,
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ISP_BLK_ID_DMA_CTL16,
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ISP_BLK_ID_RGBMAP3,
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ISP_BLK_ID_WBG5,
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ISP_BLK_ID_DMA_CTL17,
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ISP_BLK_ID_PRE_RAW_FE2,
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ISP_BLK_ID_CSIBDG2,
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ISP_BLK_ID_DMA_CTL18,
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ISP_BLK_ID_DMA_CTL19,
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ISP_BLK_ID_BLC4,
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ISP_BLK_ID_RGBMAP4,
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ISP_BLK_ID_WBG6,
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ISP_BLK_ID_DMA_CTL20,
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ISP_BLK_ID_PRE_RAW_BE,
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ISP_BLK_ID_CROP0,
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ISP_BLK_ID_CROP1,
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ISP_BLK_ID_BLC5,
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ISP_BLK_ID_BLC6,
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ISP_BLK_ID_AF,
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ISP_BLK_ID_DMA_CTL21,
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ISP_BLK_ID_DPC0,
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ISP_BLK_ID_DPC1,
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ISP_BLK_ID_DMA_CTL22, //45
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ISP_BLK_ID_DMA_CTL23, //46
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ISP_BLK_ID_PRE_WDMA,
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ISP_BLK_ID_PCHK0,
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ISP_BLK_ID_PCHK1,
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ISP_BLK_ID_RAWTOP,
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ISP_BLK_ID_CFA,
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ISP_BLK_ID_LSC,
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ISP_BLK_ID_DMA_CTL24, //53
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ISP_BLK_ID_GMS,
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ISP_BLK_ID_DMA_CTL25, //55
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ISP_BLK_ID_AEHIST0,
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ISP_BLK_ID_DMA_CTL26, //57
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ISP_BLK_ID_AEHIST1,
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ISP_BLK_ID_DMA_CTL27, //59
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ISP_BLK_ID_DMA_CTL28,
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ISP_BLK_ID_DMA_CTL29,
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ISP_BLK_ID_RAW_RDMA,
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ISP_BLK_ID_BNR,
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ISP_BLK_ID_CROP2,
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ISP_BLK_ID_CROP3,
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ISP_BLK_ID_LMAP0,
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ISP_BLK_ID_DMA_CTL30, //67
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ISP_BLK_ID_LMAP1,
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ISP_BLK_ID_DMA_CTL31,
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ISP_BLK_ID_WBG0,
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ISP_BLK_ID_WBG1,
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ISP_BLK_ID_PCHK2,
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ISP_BLK_ID_PCHK3,
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ISP_BLK_ID_LCAC,
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ISP_BLK_ID_RGBCAC,
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ISP_BLK_ID_RGBTOP,
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ISP_BLK_ID_CCM0,
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ISP_BLK_ID_CCM1,
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ISP_BLK_ID_RGBGAMMA,
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ISP_BLK_ID_YGAMMA,
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ISP_BLK_ID_MMAP,
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ISP_BLK_ID_DMA_CTL32,
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ISP_BLK_ID_DMA_CTL33,
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ISP_BLK_ID_DMA_CTL34,
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ISP_BLK_ID_DMA_CTL35,
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ISP_BLK_ID_DMA_CTL36, //86
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ISP_BLK_ID_DMA_CTL37,
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ISP_BLK_ID_CLUT,
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ISP_BLK_ID_DHZ,
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ISP_BLK_ID_CSC,
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ISP_BLK_ID_RGBDITHER,
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ISP_BLK_ID_PCHK4,
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ISP_BLK_ID_PCHK5,
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ISP_BLK_ID_HIST_V,
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ISP_BLK_ID_DMA_CTL38, //95
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ISP_BLK_ID_HDRFUSION,
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ISP_BLK_ID_HDRLTM,
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ISP_BLK_ID_DMA_CTL39,
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ISP_BLK_ID_DMA_CTL40,
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ISP_BLK_ID_YUVTOP,
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ISP_BLK_ID_TNR,
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ISP_BLK_ID_DMA_CTL41, //102
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ISP_BLK_ID_DMA_CTL42,
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ISP_BLK_ID_FBCE,
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ISP_BLK_ID_DMA_CTL43, //105
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ISP_BLK_ID_DMA_CTL44,
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ISP_BLK_ID_FBCD,
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ISP_BLK_ID_YUVDITHER,
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ISP_BLK_ID_CA,
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ISP_BLK_ID_CA_LITE,
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ISP_BLK_ID_YNR,
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ISP_BLK_ID_CNR,
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ISP_BLK_ID_EE,
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ISP_BLK_ID_YCURVE,
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ISP_BLK_ID_DCI,
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ISP_BLK_ID_DMA_CTL45, //116
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ISP_BLK_ID_DCI_GAMMA,
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ISP_BLK_ID_CROP4,
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ISP_BLK_ID_DMA_CTL46,
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ISP_BLK_ID_CROP5,
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ISP_BLK_ID_DMA_CTL47,
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ISP_BLK_ID_LDCI,
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ISP_BLK_ID_DMA_CTL48,
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ISP_BLK_ID_DMA_CTL49,
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ISP_BLK_ID_PRE_EE,
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ISP_BLK_ID_PCHK6,
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ISP_BLK_ID_PCHK7,
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ISP_BLK_ID_ISPTOP,
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ISP_BLK_ID_WDMA_CORE0,
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ISP_BLK_ID_RDMA_CORE,
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ISP_BLK_ID_CSIBDG_LITE,
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ISP_BLK_ID_DMA_CTL0,
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ISP_BLK_ID_DMA_CTL1,
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ISP_BLK_ID_DMA_CTL2,
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ISP_BLK_ID_DMA_CTL3,
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ISP_BLK_ID_WDMA_CORE1,
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ISP_BLK_ID_PRE_RAW_VI_SEL,
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ISP_BLK_ID_DMA_CTL4,
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ISP_BLK_ID_DMA_CTL5,
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ISP_BLK_ID_CMDQ,
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ISP_BLK_ID_MAX
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};
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#endif //_ISP_REG_H_
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