261 lines
6.5 KiB
C
261 lines
6.5 KiB
C
/*
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***************************************************************************
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* Ralink Tech Inc.
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* 4F, No. 2 Technology 5th Rd.
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* Science-based Industrial Park
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* Hsin-chu, Taiwan, R.O.C.
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*
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* (c) Copyright 2002-2004, Ralink Technology, Inc.
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*
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* All rights reserved. Ralink's source code is an unpublished work and the
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* use of a copyright notice does not imply otherwise. This source code
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* contains confidential trade secret material of Ralink Tech. Any attemp
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* or participation in deciphering, decoding, reverse engineering or in any
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* way altering the source code is stricitly prohibited, unless the prior
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* written consent of Ralink Technology, Inc. is obtained.
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***************************************************************************
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Module Name:
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rtmp_mcu.c
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Abstract:
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Revision History:
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Who When What
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-------- ---------- ----------------------------------------------
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*/
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#include "rt_config.h"
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INT MCUBurstWrite(PRTMP_ADAPTER pAd, UINT32 Offset, UINT32 *Data, UINT32 Cnt)
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{
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#ifdef RTMP_USB_SUPPORT
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RTUSBMultiWrite_nBytes(pAd, (USHORT)Offset, (UCHAR *)Data, (USHORT)(Cnt * 4), 64);
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#endif /* RTMP_USB_SUPPORT */
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return 0;
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}
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INT MCURandomWrite(PRTMP_ADAPTER pAd, RTMP_REG_PAIR *RegPair, UINT32 Num)
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{
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UINT32 Index;
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for (Index = 0; Index < Num; Index++)
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RTMP_IO_WRITE32(pAd, RegPair->Register, RegPair->Value);
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return 0;
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}
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INT32 MCUSysInit(RTMP_ADAPTER *pAd)
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{
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INT32 Ret = 0;
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DBGPRINT(RT_DEBUG_TRACE, ("%s\n", __FUNCTION__));
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MCU_CTRL_INIT(pAd);
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#ifdef MT_MAC
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if (pAd->chipOps.FwInit && (pAd->chipCap.hif_type == HIF_MT))
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pAd->chipOps.FwInit(pAd);
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#ifndef RTMP_SDIO_SUPPORT
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#ifdef MT7636
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if (IS_MT7636(pAd)) {
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if (load_patch(pAd) != NDIS_STATUS_SUCCESS) {
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DBGPRINT_ERR(("load patch failed!\n"));
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return FALSE;
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}
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}
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#endif /* MT7636 */
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#endif /*leonardo temporari skip rom patch download for FPGA*/
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#endif /* MT_MAC */
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Ret = NICLoadFirmware(pAd);
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if (Ret != NDIS_STATUS_SUCCESS)
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{
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DBGPRINT_ERR(("%s: NICLoadFirmware failed, Status[=0x%08x]\n", __FUNCTION__, Ret));
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return -1;
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}
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#ifdef MT_MAC
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if (pAd->chipCap.hif_type == HIF_MT) {
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#if defined(RTMP_PCI_SUPPORT) || defined(RTMP_USB_SUPPORT)
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AsicDMASchedulerInit(pAd, DMA_SCH_LMAC);
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#endif
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}
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#endif /* MT_MAC */
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return Ret;
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}
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INT32 MCUSysExit(RTMP_ADAPTER *pAd)
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{
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INT32 Ret = 0;
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if (pAd->chipOps.FwExit)
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pAd->chipOps.FwExit(pAd);
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MCU_CTRL_EXIT(pAd);
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return Ret;
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}
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VOID ChipOpsMCUHook(PRTMP_ADAPTER pAd, enum MCU_TYPE MCUType)
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{
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RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
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#ifdef CONFIG_SWMCU_SUPPORT
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if (MCUType == SWMCU)
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{
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pChipOps->eraseFirmware = NULL;
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pChipOps->loadFirmware = NULL;
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pChipOps->sendCommandToMcu = RtmpAsicSendCommandToSwMcu;
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return;
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}
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#endif
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#ifdef CONFIG_M8051_SUPPORT
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if (MCUType == M8051)
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{
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#ifdef RTMP_PCI_SUPPORT
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pChipOps->fw_init = m51_pci_fw_init;
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#endif
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#ifdef RTMP_USB_SUPPORT
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pChipOps->fw_init = m51_usb_fw_init;
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#endif
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pChipOps->eraseFirmware = NULL;
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pChipOps->loadFirmware = RtmpAsicLoadFirmware;
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pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
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return;
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}
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#endif
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#ifdef CONFIG_ANDES_SUPPORT
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if (MCUType == ANDES) {
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RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
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#ifdef RLT_MAC
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if (pAd->chipCap.hif_type == HIF_RLT) {
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#ifdef RTMP_PCI_SUPPORT
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if (pChipCap->need_load_rom_patch) {
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pChipOps->load_rom_patch = AndesRltPciLoadRomPatch;
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pChipOps->erase_rom_patch = AndesRltPciEraseRomPatch;
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}
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if (pChipCap->need_load_fw) {
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pChipOps->loadFirmware = AndesRltPciLoadfw;
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pChipOps->eraseFirmware = AndesRltPciErasefw;
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pChipOps->pci_kick_out_cmd_msg = AndesRltPciKickOutCmdMsg;
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}
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pChipOps->FwInit = AndesRltPciFwInit;
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#endif /* RTMP_PCI_SUPPORT */
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#ifdef RTMP_USB_SUPPORT
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if (pChipCap->need_load_rom_patch) {
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pChipOps->load_rom_patch = AndesRltUsbLoadRomPatch;
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pChipOps->erase_rom_patch = AndesRltUsbEraseRomPatch;
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}
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if (pChipCap->need_load_fw) {
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pChipOps->loadFirmware = AndesRltUsbLoadFw;
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pChipOps->eraseFirmware = AndesRltUsbEraseFw;
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pChipOps->usb_kick_out_cmd_msg = AndesRltUsbKickOutCmdMsg;
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}
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pChipOps->FwInit = AndesRltUsbFwInit;
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#endif /* RTMP_USB_SUPPORT */
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if (pChipCap->need_load_fw) {
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//pChipOps->sendCommandToMcu = andes_send_cmd_msg;
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pChipOps->Calibration = AndesRltCalibration;
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pChipOps->BurstWrite = AndesRltBurstWrite;
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pChipOps->BurstRead = AndesRltBurstRead;
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pChipOps->RandomRead = AndesRltRandomRead;
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pChipOps->RFRandomRead = AndesRltRfRandomRead;
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pChipOps->ReadModifyWrite = AndesRltReadModifyWrite;
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pChipOps->RFReadModifyWrite = AndesRltRfReadModifyWrite;
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pChipOps->RandomWrite = AndesRltRandomWrite;
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pChipOps->RFRandomWrite = AndesRltRfRandomWrite;
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#ifdef CONFIG_ANDES_BBP_RANDOM_WRITE_SUPPORT
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pChipOps->BBPRandomWrite = AndesBbpRandomWrite;
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#endif /* CONFIG_ANDES_BBP_RANDOM_WRITE_SUPPORT */
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pChipOps->sc_random_write = AndesRltScRandomWrite;
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pChipOps->sc_rf_random_write = AndesRltScRfRandomWrite;
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pChipOps->PwrSavingOP = AndesRltPwrSaving;
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pChipOps->andes_fill_cmd_header = AndesRltFillCmdHeader;
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}
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}
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#endif /* RLT_MAC */
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#ifdef MT_MAC
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if (pAd->chipCap.hif_type == HIF_MT) {
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#ifdef RTMP_USB_SUPPORT
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pChipOps->FwInit = AndesMTUsbFwInit;
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if (pChipCap->need_load_fw) {
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pChipOps->usb_kick_out_cmd_msg = AndesMTUSBKickOutCmdMsg;
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}
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if (pChipCap->need_load_rom_patch)
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{
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pChipOps->AndesMTChkCrc = AndesMTUsbChkCrc;
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pChipOps->AndesMTGetCrc = AndesMTUsbGetCrc;
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}
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#endif /* RTMP_USB_SUPPORT */
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#ifdef RTMP_PCI_SUPPORT
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pChipOps->FwInit = AndesMTPciFwInit;
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pChipOps->FwExit = AndesMTPciFwExit;
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if (pChipCap->need_load_fw) {
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pChipOps->pci_kick_out_cmd_msg = AndesMTPciKickOutCmdMsg;
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}
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#endif /* RTMP_PCI_SUPPORT */
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#ifdef RTMP_SDIO_SUPPORT
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pChipOps->FwInit = AndesMTSdioFwInit;
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pChipOps->FwExit = AndesMTSdioFwExit;
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if (pChipCap->need_load_fw) {
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pChipOps->sdio_kick_out_cmd_msg = AndesMTSdioKickOutCmdMsg;
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}
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if (pChipCap->need_load_rom_patch)
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{
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pChipOps->AndesMTChkCrc = AndesMTSdioChkCrc;
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pChipOps->AndesMTGetCrc = AndesMTSdioGetCrc;
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}
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#endif
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if (pChipCap->need_load_fw) {
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pChipOps->loadFirmware = AndesMTLoadFw;
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pChipOps->eraseFirmware = AndesMTEraseFw;
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pChipOps->andes_fill_cmd_header = AndesMTFillCmdHeader;
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pChipOps->rx_event_handler = AndesMTRxEventHandler;
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}
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if (pChipCap->need_load_rom_patch) {
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pChipOps->load_rom_patch = AndesMTLoadRomPatch;
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//pChipOps->erase_rom_patch = AndesMTEraseRomPatch;
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}
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}
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#endif /* MT_MAC */
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pChipOps->MCUCtrlInit = AndesCtrlInit;
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pChipOps->MCUCtrlExit = AndesCtrlExit;
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}
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#endif /* CONFIG_ANDES_SUPPORT */
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}
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