5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
23 lines
589 B
Plaintext
23 lines
589 B
Plaintext
* ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)
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Properties:
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- compatible: "snps,archs-intc"
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- interrupt-controller: This is an interrupt controller.
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- #interrupt-cells: Must be <1>.
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Single Cell "interrupts" property of a device specifies the IRQ number
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between 16 to 256
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intc accessed via the special ARC AUX register interface, hence "reg" property
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is not specified.
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Example:
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intc: interrupt-controller {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupts = <16 17 18 19 20 21 22 23 24 25>;
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};
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