5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
24 lines
746 B
Plaintext
24 lines
746 B
Plaintext
Xilinx SPI controller Device Tree Bindings
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Required properties:
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- compatible : Should be "xlnx,xps-spi-2.00.a", "xlnx,xps-spi-2.00.b" or "xlnx,axi-quad-spi-1.00.a"
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- reg : Physical base address and size of SPI registers map.
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- interrupts : Property with a value describing the interrupt
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number.
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Optional properties:
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- xlnx,num-ss-bits : Number of chip selects used.
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- xlnx,num-transfer-bits : Number of bits per transfer. This will be 8 if not specified
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Example:
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axi_quad_spi@41e00000 {
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compatible = "xlnx,xps-spi-2.00.a";
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interrupt-parent = <&intc>;
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interrupts = <0 31 1>;
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reg = <0x41e00000 0x10000>;
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xlnx,num-ss-bits = <0x1>;
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xlnx,num-transfer-bits = <32>;
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};
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