5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
56 lines
1.1 KiB
C
56 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_IRQFLAGS_H
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#define _ASM_RISCV_IRQFLAGS_H
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#include <asm/processor.h>
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#include <asm/csr.h>
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/* read interrupt enabled status */
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static inline unsigned long arch_local_save_flags(void)
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{
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return csr_read(CSR_STATUS);
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}
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/* unconditionally enable interrupts */
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static inline void arch_local_irq_enable(void)
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{
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csr_set(CSR_STATUS, SR_IE);
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}
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/* unconditionally disable interrupts */
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static inline void arch_local_irq_disable(void)
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{
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csr_clear(CSR_STATUS, SR_IE);
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}
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/* get status and disable interrupts */
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static inline unsigned long arch_local_irq_save(void)
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{
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return csr_read_clear(CSR_STATUS, SR_IE);
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}
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/* test flags */
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & SR_IE);
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}
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/* test hardware interrupt enable bit */
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static inline int arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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/* set interrupt enabled status */
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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csr_set(CSR_STATUS, flags & SR_IE);
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}
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#endif /* _ASM_RISCV_IRQFLAGS_H */
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