93f81bd490
repo: https://github.com/T-head-Semi/opensbi commit: 89182b257c8798e15e4c685c1af0c2862d528d2a Change-Id: I7b39d66729e0108661a6f4c9e28acbdb303684ea
48 lines
771 B
ArmAsm
48 lines
771 B
ArmAsm
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <sbi/riscv_asm.h>
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#include "fdt_reset_thead.h"
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/*
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* csrrs rd, csr, rs1
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* |31 20|19 15|14 12|11 7|6 0|
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* csr rs1 010 rd 1110011
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*/
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#define CSR_STUB addi x0, x0, 0
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.option norvc
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.align 3
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.global __fdt_reset_thead_csrr
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__fdt_reset_thead_csrr:
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csrrs a0, 0, x0
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ret
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.align 3
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.global __thead_pre_start_warm
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__thead_pre_start_warm:
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/*
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* Clear L1 cache & BTB & BHT ...
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*/
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li t1, 0x70013
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csrw 0x7c2, t1
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fence rw,rw
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lla t1, custom_csr
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.global __reset_thead_csr_stub
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__reset_thead_csr_stub:
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.rept MAX_CUSTOM_CSR
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REG_L t2, 8(t1)
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CSR_STUB
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addi t1, t1, 16
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.endr
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/*
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* Clear L1 cache & BTB & BHT ...
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*/
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li t1, 0x70013
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csrw 0x7c2, t1
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fence rw,rw
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j _start_warm
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