[feat] add cvi_update_rtos tool [feat](uboot):Support uart download Change-Id: I4027f9ceba4205d2d5c7c5135b888172ac49203a
174 lines
6.6 KiB
C
174 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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*
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* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
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* Copyright (C) 2016 Jagan Teki <jagan@openedev.com>
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#include <common.h>
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#include <spi.h>
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#include <spi_flash.h>
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#include "sf_internal.h"
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#include <command.h>
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/* Exclude chip names for SPL to save space */
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#if !CONFIG_IS_ENABLED(SPI_FLASH_TINY)
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#define INFO_NAME(_name) .name = _name,
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#else
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#define INFO_NAME(_name)
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#endif
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/* Used when the "_ext_id" is two bytes at most */
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#define INFO(_name, _jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
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INFO_NAME(_name) \
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.id = { \
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((_jedec_id) >> 16) & 0xff, \
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((_jedec_id) >> 8) & 0xff, \
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(_jedec_id) & 0xff, \
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((_ext_id) >> 8) & 0xff, \
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(_ext_id) & 0xff, \
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}, \
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.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
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.sector_size = (_sector_size), \
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.n_sectors = (_n_sectors), \
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.page_size = 256, \
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.flags = (_flags),
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#define INFO6(_name, _jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
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INFO_NAME(_name) \
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.id = { \
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((_jedec_id) >> 16) & 0xff, \
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((_jedec_id) >> 8) & 0xff, \
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(_jedec_id) & 0xff, \
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((_ext_id) >> 16) & 0xff, \
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((_ext_id) >> 8) & 0xff, \
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(_ext_id) & 0xff, \
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}, \
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.id_len = 6, \
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.sector_size = (_sector_size), \
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.n_sectors = (_n_sectors), \
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.page_size = 256, \
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.flags = (_flags),
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/* NOTE: double check command sets and memory organization when you add
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* more nor chips. This current list focusses on newer chips, which
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* have been converging on command sets which including JEDEC ID.
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*
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* All newly added entries should describe *hardware* and should use SECT_4K
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* (or SECT_4K_PMC) if hardware supports erasing 4 KiB sectors. For usage
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* scenarios excluding small sectors there is config option that can be
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* disabled: CONFIG_SPI_FLASH_USE_4K_SECTORS.
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* For historical (and compatibility) reasons (before we got above config) some
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* old entries may be missing 4K flag.
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*/
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const struct flash_info spi_nor_ids[] = {
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/* The CVITEK Support List Of Spi Nor Flash */
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{ INFO("JY25VQ128A", 0x1c4018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("JY25VQ64A", 0x4a4017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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/* Juyang 32M Nor Flash(JY25VQ256A) uses the same wafers as MXIC */
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{ INFO("MX25L25645G", 0xc22019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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{ INFO("MX25L12835F", 0xc22018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("EN25QH128A", 0x1c7018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("EN25QX64A", 0x1c7117, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("EN25QX128A", 0x1c7118, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("EN25QH256A", 0x1c7019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
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{ INFO("W25Q256JV-IQ", 0xef4019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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{ INFO("W25Q128JV-IQ", 0xef4018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("W25Q64JV-IQ", 0xef4017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("GD25Q128E", 0xc84018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("GD25Q256E", 0xc84019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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{ INFO("GD25Q64E", 0xc84017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("GD25LQ256D", 0xc86019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("XM25QH64C", 0x204017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("XM25QH128C", 0x204018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("XM25QH256C", 0x204019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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{ INFO("XM25QH256B", 0x206019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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// N25Q256 N25L256
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{ INFO("N25Q256", 0x20ba19, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("IS25LP064D", 0x9D6017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("IS25LP128F", 0x9d6018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("IS25LP256E", 0x9d6019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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{ INFO("KH25L6433FM2I", 0xc22017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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//{ INFO("KH25L12833FM2I", 0xc22018, 0x0, 64 * 1024, 256,
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// SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("ZB25VQ64B", 0x5E4017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("ZB25VQ128A", 0x5E4018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("S25FL128L", 0x016018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("S25FL256L", 0x016019, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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{ INFO("XT25F64F", 0x0B4017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("XT25F128F", 0x0B4018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("FM25Q64", 0xF83217, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("FM25Q128A", 0xA14018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("FM25W128", 0xA12818, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("BY25Q64ES", 0x684017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("BY25Q128AS", 0x684018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("BY25Q256FS", 0x684919, 0x0, 64 * 1024, 512,
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SPI_NOR_QUAD_READ | SECT_4K | SPI_NOR_4B_OPCODES) },
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{ INFO("PY25Q128HA", 0x852018, 0x0, 64 * 1024, 256,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("PY25Q64HA", 0x852017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ INFO("P25Q64SH", 0x856017, 0x0, 64 * 1024, 128,
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SPI_NOR_QUAD_READ | SECT_4K) },
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{ },
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};
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static int do_spinor_show_support_list(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
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{
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char buf[128] = {0};
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const struct flash_info *info = spi_nor_ids;
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uint32_t id, size;
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printf("\t###################### nor flash list #########################\n\n");
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sprintf(buf, "\t%-16s %-12s %-6s\n", "NAME", "JEDEC_ID", "SIZE");
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printf("%s\n", buf);
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for (; info->name; info++) {
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id = 0;
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size = 0;
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id = info->id[0] << 16 | info->id[1] << 8 | info->id[2];
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size = (info->sector_size * info->n_sectors) >> 20;
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sprintf(buf, "\t%-16s 0x%-6x %-2u M\n", info->name, id, size);
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printf("%s\n", buf);
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}
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printf("\t###############################################################\n\n");
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return 0;
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}
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U_BOOT_CMD(norshow, 2, 0, do_spinor_show_support_list, "norshow", "\nshow nor flash list\n");
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