5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
82 lines
1.8 KiB
C
82 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (c) 2012 Linaro Limited.
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*/
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#ifndef VIRT_H
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#define VIRT_H
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#include <asm/ptrace.h>
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/*
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* Flag indicating that the kernel was not entered in the same mode on every
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* CPU. The zImage loader stashes this value in an SPSR, so we need an
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* architecturally defined flag bit here.
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*/
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#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT
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#ifndef __ASSEMBLY__
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#include <asm/cacheflush.h>
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#ifdef CONFIG_ARM_VIRT_EXT
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/*
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* __boot_cpu_mode records what mode the primary CPU was booted in.
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* A correctly-implemented bootloader must start all CPUs in the same mode:
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* if it fails to do this, the flag BOOT_CPU_MODE_MISMATCH is set to indicate
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* that some CPU(s) were booted in a different mode.
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*
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* This allows the kernel to flag an error when the secondaries have come up.
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*/
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extern int __boot_cpu_mode;
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static inline void sync_boot_mode(void)
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{
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/*
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* As secondaries write to __boot_cpu_mode with caches disabled, we
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* must flush the corresponding cache entries to ensure the visibility
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* of their writes.
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*/
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sync_cache_r(&__boot_cpu_mode);
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}
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#else
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#define __boot_cpu_mode (SVC_MODE)
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#define sync_boot_mode()
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#endif
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#ifndef ZIMAGE
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void hyp_mode_check(void);
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/* Reports the availability of HYP mode */
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static inline bool is_hyp_mode_available(void)
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{
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return ((__boot_cpu_mode & MODE_MASK) == HYP_MODE &&
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!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH));
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}
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/* Check if the bootloader has booted CPUs in different modes */
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static inline bool is_hyp_mode_mismatched(void)
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{
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return !!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH);
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}
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static inline bool is_kernel_in_hyp_mode(void)
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{
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return false;
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}
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#endif
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#else
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/* Only assembly code should need those */
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#define HVC_SET_VECTORS 0
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#define HVC_SOFT_RESTART 1
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#endif /* __ASSEMBLY__ */
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#define HVC_STUB_ERR 0xbadca11
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#endif /* ! VIRT_H */
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