5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
26 lines
551 B
YAML
26 lines
551 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/pci/cdns-pcie.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Cadence PCIe Core
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maintainers:
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- Tom Joseph <tjoseph@cadence.com>
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properties:
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phys:
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description:
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One per lane if more than one in the list. If only one PHY listed it must
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manage all lanes.
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minItems: 1
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maxItems: 16
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phy-names:
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items:
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- const: pcie-phy
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# FIXME: names when more than 1
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additionalProperties: true
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