5c7dd7acc3
repo: https://github.com/T-head-Semi/linux commit: b1313fe517ca3703119dcc99ef3bbf75ab42bcfb Change-Id: I6cbb35294024ea3a66140e311f4bb705fd7fd626
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Arch-specific APEI-related functions.
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*/
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#include <acpi/apei.h>
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#include <asm/mce.h>
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#include <asm/tlbflush.h>
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int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
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{
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#ifdef CONFIG_X86_MCE
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int i;
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struct acpi_hest_ia_corrected *cmc;
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struct acpi_hest_ia_error_bank *mc_bank;
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cmc = (struct acpi_hest_ia_corrected *)hest_hdr;
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if (!cmc->enabled)
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return 0;
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/*
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* We expect HEST to provide a list of MC banks that report errors
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* in firmware first mode. Otherwise, return non-zero value to
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* indicate that we are done parsing HEST.
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*/
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if (!(cmc->flags & ACPI_HEST_FIRMWARE_FIRST) ||
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!cmc->num_hardware_banks)
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return 1;
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pr_info("HEST: Enabling Firmware First mode for corrected errors.\n");
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mc_bank = (struct acpi_hest_ia_error_bank *)(cmc + 1);
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for (i = 0; i < cmc->num_hardware_banks; i++, mc_bank++)
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mce_disable_bank(mc_bank->bank_number);
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#endif
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return 1;
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}
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void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
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{
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#ifdef CONFIG_X86_MCE
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apei_mce_report_mem_error(sev, mem_err);
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#endif
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}
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