f8fc109960
repo: https://github.com/u-boot/u-boot commit: d80bb749fab53da72c4a0e09b8c2d2aaa3103c91 Change-Id: Ie6434426e1ec15bc08bb1832798e371f3fd5fb29
48 lines
1.1 KiB
Plaintext
48 lines
1.1 KiB
Plaintext
menu "i.MX8M DDR controllers"
|
|
depends on ARCH_IMX8M
|
|
|
|
config IMX8M_DRAM
|
|
bool "imx8m dram"
|
|
|
|
config IMX8M_LPDDR4
|
|
bool "imx8m lpddr4"
|
|
select IMX8M_DRAM
|
|
help
|
|
Select the i.MX8M LPDDR4 driver support on i.MX8M SOC.
|
|
|
|
config IMX8M_DDR4
|
|
bool "imx8m ddr4"
|
|
select IMX8M_DRAM
|
|
help
|
|
Select the i.MX8M DDR4 driver support on i.MX8M SOC.
|
|
|
|
config IMX8M_DDR3L
|
|
bool "imx8m ddr3l"
|
|
select IMX8M_DRAM
|
|
help
|
|
Select the i.MX8M DDR3L driver support on i.MX8M SOC.
|
|
|
|
config SAVED_DRAM_TIMING_BASE
|
|
hex "Define the base address for saved dram timing"
|
|
help
|
|
after DRAM is trained, need to save the dram related timming
|
|
info into memory for low power use. OCRAM_S is used for this
|
|
purpose on i.MX8MM.
|
|
default 0x180000
|
|
|
|
config IMX8M_DRAM_INLINE_ECC
|
|
bool "imx8mp inline ECC"
|
|
depends on IMX8MP && IMX8M_LPDDR4
|
|
help
|
|
Select this config if you want to use inline ecc feature for
|
|
imx8mp-evk board.
|
|
|
|
config IMX8M_VDD_SOC_850MV
|
|
bool "imx8mp change the vdd_soc voltage to 850mv"
|
|
depends on IMX8MP
|
|
|
|
config IMX8M_LPDDR4_FREQ0_2400MTS
|
|
bool "imx8m PDDR4 freq0 change from 4000MTS to 2400MTS"
|
|
|
|
endmenu
|