1. add cvitek folders to u-boot-2021.10 2. add cv183x/cv182x part 3. add cv181x/cv180x part Change-Id: I6dc2e5ff509dbab16bd60bfb3fd61852da5e01f6
167 lines
5.1 KiB
C
167 lines
5.1 KiB
C
#ifndef __CVSNFC_COMMON_H__
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#define __CVSNFC_COMMON_H__
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#include <linux/mtd/rawnand.h>
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#include <linux/delay.h>
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/*****************************************************************************/
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#define _512B (512)
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#define _1K (1024)
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#define _2K (2048)
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#define _4K (4096)
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#define _8K (8192)
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#define _16K (16384)
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#define _32K (32768)
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#define _64K (0x10000UL)
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#define _128K (0x20000UL)
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#define _256K (0x40000UL)
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#define _512K (0x80000UL)
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#define _1M (0x100000UL)
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#define _2M (0x200000UL)
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#define _4M (0x400000UL)
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#define _8M (0x800000UL)
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#define _16M (0x1000000UL)
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#define _32M (0x2000000UL)
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#define _64M (0x4000000UL)
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#define _128M (0x8000000UL)
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#define _256M (0x10000000UL)
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#define _512M (0x20000000UL)
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#define _1G (0x40000000ULL)
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#define _2G (0x80000000ULL)
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#define _4G (0x100000000ULL)
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#define _8G (0x200000000ULL)
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#define _16G (0x400000000ULL)
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#define _64G (0x1000000000ULL)
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/*****************************************************************************/
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#define NAND_PAGE_512B 0
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#define NAND_PAGE_1K 1
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#define NAND_PAGE_2K 2
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#define NAND_PAGE_4K 3
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#define NAND_PAGE_8K 4
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#define NAND_PAGE_16K 5
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#define NAND_PAGE_32K 6
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/*****************************************************************************/
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#define NAND_ECC_NONE 0
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#define NAND_ECC_0BIT 0
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#define NAND_ECC_1BIT 1
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#define NAND_ECC_1BIT_512 1
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#define NAND_ECC_4BIT 2
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#define NAND_ECC_4BIT_512 2
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#define NAND_ECC_4BYTE 2
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#define NAND_ECC_8BIT 2
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#define NAND_ECC_8BIT_512 3
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#define NAND_ECC_8BYTE 3
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#define NAND_ECC_13BIT 4
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#define NAND_ECC_16BIT 5
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#define NAND_ECC_18BIT 6
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#define NAND_ECC_24BIT 7
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#define NAND_ECC_27BIT 8
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#define NAND_ECC_28BIT 9
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#define NAND_ECC_32BIT 10
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#define NAND_ECC_40BIT 11
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#define NAND_ECC_41BIT 12
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#define NAND_ECC_42BIT 13
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#define NAND_ECC_48BIT 14
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#define NAND_ECC_60BIT 15
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#define NAND_ECC_64BIT 16
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#define NAND_ECC_72BIT 17
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#define NAND_ECC_80BIT 18
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#define ERSTR_HARDWARE "Hardware configuration error."
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#define ERSTR_DRIVER "Driver does not support."
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#define DISABLE 0
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#define ENABLE 1
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#if defined(CONFIG_NAND_FLASH_CVSNFC)
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/*****************************************************************************/
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struct match_reg_type {
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int reg;
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int type;
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};
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struct match_type_str {
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int type;
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const char *str;
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};
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enum ecc_type {
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et_ecc_none = 0x00,
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et_ecc_1bit = 0x01,
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et_ecc_4bit = 0x02,
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et_ecc_8bit = 0x03,
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et_ecc_24bit1k = 0x04,
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et_ecc_40bit1k = 0x05,
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et_ecc_64bit1k = 0x06,
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};
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enum page_type {
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pt_pagesize_512 = 0x00,
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pt_pagesize_2K = 0x01,
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pt_pagesize_4K = 0x02,
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pt_pagesize_8K = 0x03,
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pt_pagesize_16K = 0x04,
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};
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struct nand_config_info {
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unsigned int pagetype;
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unsigned int ecctype;
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unsigned int oobsize;
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struct nand_ecclayout *layout;
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};
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#endif
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/*****************************************************************************/
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struct nand_flash_dev_ex {
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struct nand_flash_dev flash_dev;
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char *start_type;
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unsigned char ids[8];
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int oobsize;
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int ecctype;
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#define NAND_RANDOMIZER 0x01 /* nand chip need randomizer */
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#define NAND_HW_AUTO 0x02 /*controller support hardware auto config*/
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#define NAND_SYNCHRONOUS 0x04 /* nand chip support synchronous */
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#define NAND_ASYNCHRONOUS 0x08 /* nand chip support asynchronous */
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#define NAND_SYNCHRONOUS_BOOT 0x10 /* nand boot from synchronous mode */
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#define NAND_CONFIG_DONE 0x20 /* current controller config finish */
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int flags;
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int is_randomizer;
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#define NAND_RR_NONE 0x00
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#define NAND_RR_HYNIX_BG_BDIE 0x10
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#define NAND_RR_HYNIX_BG_CDIE 0x11
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#define NAND_RR_HYNIX_CG_ADIE 0x12
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#define NAND_RR_MICRON 0x20
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#define NAND_RR_SAMSUNG 0x30
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#define NAND_RR_TOSHIBA_24nm 0x40
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#define NAND_RR_TOSHIBA_19nm 0x41
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#define NAND_RR_MASK 0xF0
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int read_retry_type;
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int hostver; /* host controller version. */
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};
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/*****************************************************************************/
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int nandpage_size2type(int size);
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int nandpage_type2size(int size);
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/*****************************************************************************/
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extern int nand_get_ecctype(void);
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extern struct nand_flash_dev
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*(*nand_get_spl_flash_type)(struct mtd_info *mtd,
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struct nand_chip *chip,
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struct nand_flash_dev_ex *flash_dev_ex);
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extern int (*nand_oob_resize)(struct mtd_info *mtd, struct nand_chip *chip,
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struct nand_flash_dev_ex *flash_dev_ex);
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#endif /* End of __CVSNFC_COMMON_H__ */
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