196 lines
7.0 KiB
C
196 lines
7.0 KiB
C
/*----------------------------------------------------------------------------*/
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/* Copyright 2021-2023 NXP */
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/* */
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/* NXP Confidential. This software is owned or controlled by NXP and may only */
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/* be used strictly in accordance with the applicable license terms. */
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/* By expressly accepting such terms or by downloading, installing, */
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/* activating and/or otherwise using the software, you are agreeing that you */
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/* have read, and that you agree to comply with and are bound by, such */
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/* license terms. If you do not agree to be bound by the applicable license */
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/* terms, then you may not retain, install, activate or otherwise use the */
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/* software. */
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/*----------------------------------------------------------------------------*/
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/** \file
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* Example Source abstracting component data structure and code initialization and code specific to HW used in the examples
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* This file shall be present in all examples. A customer does not need to touch/modify this file. This file
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* purely depends on the phNxpBuild_Lpc.h or phNxpBuild_App.h
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* The phAppInit.h externs the component data structures initialized here that is in turn included by the core examples.
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* The core example shall not use any other variable defined here except the RdLib component data structures(as explained above)
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* The RdLib component initialization requires some user defined data and function pointers.
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* These are defined in the respective examples and externed here.
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*
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* Keystore and Crypto initialization needs to be handled by application.
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*
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* $Author: NXP $
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* $Revision: $ (v07.10.00)
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* $Date: $
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*
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*/
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#include <ph_Status.h>
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#include "phApp_Init.h"
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#ifdef NXPBUILD__PHHAL_HW_PN76XX
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#include "phOsal.h"
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#include "PN76xx.h"
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#include "PN76_Eeprom.h"
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#include "Clif.h"
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/*********************************************************************************************************************/
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/* LOCAL DEFINES */
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/*********************************************************************************************************************/
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/*******************************************************************************
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** Function Declarations
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*******************************************************************************/
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void phApp_CPU_Init(void);
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/*******************************************************************************
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** Global Variable Declaration
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*******************************************************************************/
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phhalHw_Pn76xx_DataParams_t * pHal;
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#ifdef NXPBUILD__PHHAL_HW_TARGET
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/* Parameters for L3 activation during Autocoll */
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extern uint8_t sens_res[2U] ;
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extern uint8_t nfc_id1[3U] ;
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extern uint8_t sel_res ;
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extern uint8_t nfc_id3 ;
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extern uint8_t poll_res[18U] ;
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#endif /* NXPBUILD__PHHAL_HW_TARGET */
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/*******************************************************************************
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** Function Definitions
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*******************************************************************************/
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/**
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* This function will initialize NXP NFC Controller.
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*/
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void phApp_CPU_Init(void)
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{
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#ifdef SEGGER_RTT_ENABLE
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/* SEGGER RTT Init */
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memset((uint8_t *)PN76_SEGGER_RTT_MEMORY_ALLOCATION_ADDRESS, 0, 0x4b8);
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SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
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#endif
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/* To enable NS RF IRQ */
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NVIC_EnableIRQ(CLIF_RF_IRQn);
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/* To enable NS TIMER IRQ */
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NVIC_EnableIRQ(TIMER_IRQn);
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/* Initialize PMU */
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PMU_Init();
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/* Initialize SMU */
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Smu_Init();
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/* Initialize CLKGEN */
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CLKGEN_Init();
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}
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/**
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* This function will initialize Hal Target Config
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*/
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phStatus_t phApp_HALConfigAutoColl(void)
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{
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#ifdef NXPBUILD__PHHAL_HW_TARGET
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phStatus_t wStatus;
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uint8_t baDynamicUidConfig[1U] = { 1U }; /* Enable Dynamic UID feature on PN76XX. */
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uint8_t baReadEepromConfig[24U] = { 0U };
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/* Read Set Listen Parameters data from EEPROM */
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wStatus = (PN76_Status_t)PN76_ReadEeprom(
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baReadEepromConfig,
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PHHAL_HW_PN76XX_SET_LISTEN_EEPROM_ADDR,
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PHHAL_HW_PN76XX_SET_LISTEN_LEN
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#ifdef NXPBUILD__PHHAL_HW_PN7642
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, E_PN76_EEPROM_SECURE_LIB_CONFIG
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#endif /* NXPBUILD__PHHAL_HW_PN7642 */
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);
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CHECK_SUCCESS(wStatus);
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/* Verify EEPROM data and configure Set Listen Parameters if EEPROM data is not correct. */
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if ((memcmp(&baReadEepromConfig[0U], sens_res, 2U) != 0x00) ||
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(memcmp(&baReadEepromConfig[2U], nfc_id1, 3U) != 0x00) ||
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(memcmp(&baReadEepromConfig[5U], &sel_res, 1U) != 0x00) ||
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(memcmp(&baReadEepromConfig[6U], poll_res, 18U) != 0x00))
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{
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/* Configure Set Listen Parameters. */
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wStatus = phhalHw_Pn76xx_SetListenParameters(
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pHal,
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&sens_res[0],
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&nfc_id1[0],
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sel_res,
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&poll_res[0],
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nfc_id3);
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CHECK_SUCCESS(wStatus);
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}
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/* Read Dynamic UID configuration from EEPROM */
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wStatus = (PN76_Status_t)PN76_ReadEeprom(
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baReadEepromConfig,
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PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
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0x01U
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#ifdef NXPBUILD__PHHAL_HW_PN7642
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, E_PN76_EEPROM_SECURE_LIB_CONFIG
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#endif /* NXPBUILD__PHHAL_HW_PN7642 */
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);
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CHECK_SUCCESS(wStatus);
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/* Verify EEPROM data and perform Dynamic UID configuration if EEPROM data is not correct. */
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if (baReadEepromConfig[0] != baDynamicUidConfig[0])
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{
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/* Configure Dynamic UID */
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wStatus = PN76_WriteEeprom(
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baDynamicUidConfig,
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PHHAL_HW_PN76XX_DYNAMIC_UID_CONFG_ADDR,
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0x01
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#ifdef NXPBUILD__PHHAL_HW_PN7642
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, E_PN76_EEPROM_SECURE_LIB_CONFIG
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#endif /* NXPBUILD__PHHAL_HW_PN7642 */
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);
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CHECK_SUCCESS(wStatus);
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}
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#endif /* NXPBUILD__PHHAL_HW_TARGET */
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return PH_ERR_SUCCESS;
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}
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/* Configure LPCD (for PN76XX) */
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phStatus_t phApp_ConfigureLPCD(void)
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{
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#ifdef NXPBUILD__PHHAL_HW_PN7642
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phStatus_t status = PH_ERR_SUCCESS;
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status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 100U);
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CHECK_SUCCESS(status);
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status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_DEFAULT);
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CHECK_SUCCESS(status);
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status = phhalHw_Lpcd(pHal);
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CHECK_SUCCESS(status);
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status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_SET_LPCD_WAKEUPTIME_MS, 330U);
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CHECK_SUCCESS(status);
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status = phhalHw_Pn76xx_LPCD_SetConfig(pHal, PHHAL_HW_CONFIG_LPCD_MODE, PHHAL_HW_PN76XX_LPCD_MODE_POWERDOWN);
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CHECK_SUCCESS(status);
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return status;
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#endif /* NXPBUILD__PHHAL_HW_PN7642 */
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#ifdef NXPBUILD__PHHAL_HW_PN7640
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return PH_ERR_UNSUPPORTED_COMMAND;
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#endif /* NXPBUILD__PHHAL_HW_PN7640 */
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}
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#endif /* NXPBUILD__PHHAL_HW_PN76XX */
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/******************************************************************************
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** End Of File
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******************************************************************************/
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