201 lines
7.3 KiB
Plaintext
201 lines
7.3 KiB
Plaintext
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_sdramc.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.sdramc"
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#endif
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/*! @brief Define macros for SDRAM driver. */
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#define SDRAMC_ONEMILLSEC_NANOSECONDS (1000000U)
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#define SDRAMC_ONESECOND_MILLISECONDS (1000U)
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get instance number for SDRAMC module.
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*
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* @param base SDRAMC peripheral base address
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*/
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static uint32_t SDRAMC_GetInstance(SDRAM_Type *base);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/*! @brief Pointers to SDRAMC clocks for each instance. */
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static const clock_ip_name_t s_sdramClock[FSL_FEATURE_SOC_SDRAM_COUNT] = SDRAM_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/*! @brief Pointers to SDRAMC bases for each instance. */
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static SDRAM_Type *const s_sdramcBases[] = SDRAM_BASE_PTRS;
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t SDRAMC_GetInstance(SDRAM_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_sdramcBases); instance++)
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{
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if (s_sdramcBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_sdramcBases));
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return instance;
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}
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/*!
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* brief Initializes the SDRAM controller.
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* This function ungates the SDRAM controller clock and initializes the SDRAM controller.
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* This function must be called before calling any other SDRAM controller driver functions.
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* Example
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code
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sdramc_refresh_config_t refreshConfig;
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sdramc_blockctl_config_t blockConfig;
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sdramc_config_t config;
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refreshConfig.refreshTime = kSDRAM_RefreshThreeClocks;
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refreshConfig.sdramRefreshRow = 15625;
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refreshConfig.busClock = 60000000;
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blockConfig.block = kSDRAMC_Block0;
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blockConfig.portSize = kSDRAMC_PortSize16Bit;
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blockConfig.location = kSDRAMC_Commandbit19;
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blockConfig.latency = kSDRAMC_RefreshThreeClocks;
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blockConfig.address = SDRAM_START_ADDRESS;
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blockConfig.addressMask = 0x7c0000;
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config.refreshConfig = &refreshConfig,
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config.blockConfig = &blockConfig,
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config.totalBlocks = 1;
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SDRAMC_Init(SDRAM, &config);
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endcode
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*
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* param base SDRAM controller peripheral base address.
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* param configure The SDRAM configuration structure pointer.
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*/
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void SDRAMC_Init(SDRAM_Type *base, sdramc_config_t *configure)
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{
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assert(configure);
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assert(configure->refreshConfig);
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assert(configure->blockConfig);
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assert(configure->refreshConfig->busClock_Hz);
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sdramc_blockctl_config_t *bctlConfig = configure->blockConfig;
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sdramc_refresh_config_t *refreshConfig = configure->refreshConfig;
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uint32_t count;
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uint32_t index;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Un-gate sdram controller clock. */
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CLOCK_EnableClock(s_sdramClock[SDRAMC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/* Initialize sdram Auto refresh timing. */
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count = refreshConfig->sdramRefreshRow * (refreshConfig->busClock_Hz / SDRAMC_ONESECOND_MILLISECONDS);
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count = (count / SDRAMC_ONEMILLSEC_NANOSECONDS) / 16 - 1;
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base->CTRL = SDRAM_CTRL_RC(count) | SDRAM_CTRL_RTIM(refreshConfig->refreshTime);
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for (index = 0; index < configure->numBlockConfig; index++)
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{
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/* Set the sdram block control. */
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base->BLOCK[index].AC = SDRAM_AC_PS(bctlConfig->portSize) | SDRAM_AC_CASL(bctlConfig->latency) |
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SDRAM_AC_CBM(bctlConfig->location) | (bctlConfig->address & SDRAM_AC_BA_MASK);
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base->BLOCK[index].CM = (bctlConfig->addressMask & SDRAM_CM_BAM_MASK) | SDRAM_CM_V_MASK;
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/* Increases to the next sdram block. */
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bctlConfig++;
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}
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}
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/*!
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* brief Deinitializes the SDRAM controller module and gates the clock.
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* This function gates the SDRAM controller clock. As a result, the SDRAM
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* controller module doesn't work after calling this function.
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*
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* param base SDRAM controller peripheral base address.
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*/
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void SDRAMC_Deinit(SDRAM_Type *base)
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{
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/* Set the SDRAMC invalid, do not decode DRAM accesses. */
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SDRAMC_EnableOperateValid(base, kSDRAMC_Block0, false);
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SDRAMC_EnableOperateValid(base, kSDRAMC_Block1, false);
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Disable SDRAM clock. */
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CLOCK_DisableClock(s_sdramClock[SDRAMC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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/*!
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* brief Sends the SDRAM command.
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* This function sends commands to SDRAM. The commands are precharge command, initialization MRS command,
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* auto-refresh enable/disable command, and self-refresh enter/exit commands.
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* Note that the self-refresh enter/exit commands are all blocks setting and "block"
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* is ignored. Ensure to set the correct "block" when send other commands.
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*
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* param base SDRAM controller peripheral base address.
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* param block The block selection.
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* param command The SDRAM command, see "sdramc_command_t".
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* kSDRAMC_ImrsCommand - Initialize MRS command \n
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* kSDRAMC_PrechargeCommand - Initialize precharge command \n
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* kSDRAMC_SelfrefreshEnterCommand - Enter self-refresh command \n
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* kSDRAMC_SelfrefreshExitCommand - Exit self-refresh command \n
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* kSDRAMC_AutoRefreshEnableCommand - Enable auto refresh command \n
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* kSDRAMC_AutoRefreshDisableCommand - Disable auto refresh command
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*/
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void SDRAMC_SendCommand(SDRAM_Type *base, sdramc_block_selection_t block, sdramc_command_t command)
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{
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switch (command)
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{
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/* Initiate mrs command. */
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case kSDRAMC_ImrsCommand:
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base->BLOCK[block].AC |= SDRAM_AC_IMRS_MASK;
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break;
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/* Initiate precharge command. */
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case kSDRAMC_PrechargeCommand:
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base->BLOCK[block].AC |= SDRAM_AC_IP_MASK;
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break;
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/* Enable Auto refresh command. */
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case kSDRAMC_AutoRefreshEnableCommand:
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base->BLOCK[block].AC |= SDRAM_AC_RE_MASK;
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break;
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/* Disable Auto refresh command. */
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case kSDRAMC_AutoRefreshDisableCommand:
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base->BLOCK[block].AC &= ~SDRAM_AC_RE_MASK;
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break;
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/* Enter self-refresh command. */
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case kSDRAMC_SelfrefreshEnterCommand:
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base->CTRL |= SDRAM_CTRL_IS_MASK;
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break;
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/* Exit self-refresh command. */
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case kSDRAMC_SelfrefreshExitCommand:
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base->CTRL &= ~SDRAM_CTRL_IS_MASK;
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break;
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default:
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break;
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}
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}
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