middleware: weekly rls 2024.06.6

-889bd2, add CVI_SYS_IsInit & CVI_VB_IsInit api.
-876c77, comm_pool_cnt = 0 allowed when CVI_VB_SetConfig.
-2a3176, (ldc):Coordinate memory is allocated dynamically.
-e29088, (venc) add sample code for resetGop when request IDR.
-5a3dfa, add gridinfo framework.
-502e95, add sc3336_1l.

Change-Id: Ia4c85f52d57d02409cc893ac492194102c63341e
This commit is contained in:
sophgo-forum-service
2024-06-06 15:25:23 +08:00
committed by carbon
parent 78730ed72b
commit 7ddf29a19c
17 changed files with 603 additions and 160 deletions

View File

@ -167,6 +167,8 @@ static optionExt venc_long_option_ext[] = {
"0: disable, 1: use single core(h264 or h265 only)"},
{{"forceIdr", optional_argument, NULL, 0}, ARG_INT, 0, 1000000000,
"0: disable, > 0: set force idr at number of frame"},
{{"resetGop", optional_argument, NULL, 0}, ARG_UINT, 0, 1,
"0: not reset, 1: reset gop, reset when forceIdr > 0"},
{{"chgNum", optional_argument, NULL, 0}, ARG_INT, 0, 1000000,
"frame num to change attr"},
{{"chgBitrate", optional_argument, NULL, 0}, ARG_INT, 1, 1000000,
@ -927,6 +929,8 @@ CVI_S32 parseEncArgv(sampleVenc *psv, chnInputCfg *pIc, CVI_S32 argc, char **arg
pIc->single_LumaBuf = arg.ival;
} else if (!strcmp(long_options[idx].name, "forceIdr")) {
pIc->forceIdr = arg.ival;
} else if (!strcmp(long_options[idx].name, "resetGop")) {
pIc->u32ResetGop = arg.uval;
} else if (!strcmp(long_options[idx].name, "chgNum")) {
pIc->chgNum = arg.ival;
} else if (!strcmp(long_options[idx].name, "chgBitrate")) {
@ -3106,10 +3110,10 @@ static CVI_S32 _SAMPLE_VENC_SendFrame(vencChnCtx *pvecc, CVI_U32 i)
CVI_VENC_TRACE("[Chn%d] frame %d (%d)\n", VencChn, i, pvecc->num_frames);
if (pIc->forceIdr > 0 && pIc->forceIdr == (CVI_S32)i) {
CVI_BOOL bInstant = CVI_TRUE;
CVI_BOOL bInstant = pIc->u32ResetGop;
CVI_VENC_RequestIDR(VencChn, bInstant);
CVI_VENC_TRACE("CVI_VENC_RequestIDR\n");
CVI_VENC_TRACE("CVI_VENC_RequestIDR, resetGop:%d\n", bInstant);
}
if (enableBinRoi) {
ctbHeight = ((pvecc->stSize.u32Width + 63) & ~63) >> 6;