0545e9dc6d
commit d1edce71135cc6d98c0a4b5729774542b676e769 Author: sophgo-forum-service <forum_service@sophgo.com> Date: Fri Mar 15 16:07:33 2024 +0800 [fix] recommend using ssh method to clone repo. [fix] fix sensor driver repo branch name.
173 lines
4.0 KiB
C
173 lines
4.0 KiB
C
/*
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* Copyright (C) Cvitek Co., Ltd. 2019-2020. All rights reserved.
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*
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* File Name: cvi_template.h
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* Description:
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*/
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#ifndef __DT_BINDINGS_RST_CV181X_H__
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#define __DT_BINDINGS_RST_CV181X_H__
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#define RST_MAINRST_AP 0
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#define RST_SECONDRST_AP 1
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#define RST_DDR 2
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#define RST_H264C 3
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#define RST_JPEG 4
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#define RST_H265C 5
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#define RST_VIPSYS 6
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#define RST_TDMA 7
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#define RST_TPU 8
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#define RST_TPUSYS 9
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#define RST_TSM 10
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#define RST_USB 11
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#define RST_ETH0 12
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#define RST_ETH1 13
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#define RST_NAND 14
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#define RST_EMMC 15
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#define RST_SD0 16
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#define RST_SD1 17
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#define RST_SDMA 18
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#define RST_I2S0 19
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#define RST_I2S1 20
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#define RST_I2S2 21
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#define RST_I2S3 22
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#define RST_UART0 23
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#define RST_UART1 24
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#define RST_UART2 25
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#define RST_UART3 26
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#define RST_I2C0 27
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#define RST_I2C1 28
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#define RST_I2C2 29
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#define RST_I2C3 30
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#define RST_I2C4 31
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#define RST_PWM0 32
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#define RST_PWM1 33
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#define RST_PWM2 34
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#define RST_PWM3 35
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#define RST_PWM4 36
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#define RST_PWM5 37
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#define RST_PWM6 38
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#define RST_PWM7 39
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#define RST_SPI0 40
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#define RST_SPI1 41
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#define RST_SPI2 42
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#define RST_SPI3 43
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#define RST_GPIO0 44
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#define RST_GPIO1 45
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#define RST_GPIO2 46
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#define RST_EFUSE 47
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#define RST_WDT 48
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#define RST_AHBRST_ROM 49
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#define RST_SPIC 50
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#define RST_TEMPSEN 51
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#define RST_SARADC 52
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#define RST_PCIERST_CDMA 53
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#define RST_PCIERST_SMMU 54
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#define RST_PCIERST_PCIE 55
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#define RST_PCIERST_FABS 56
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#define RST_PCIERST_IRQ 57
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#define RST_COMBORST_PHY0 58
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#define RST_COMBORST_PHY1 59
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#define RST_USB1 60
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#define RST_SPIRST_NAND 61
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#define RST_SE 62
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#define RST_RTCRST_SWRST_ONLY 63
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#define RST_CPUCORE0 64
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#define RST_CPUCORE1 65
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#define RST_CPUCORE2 66
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#define RST_CPUCORE3 67
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#define RST_DSIPHY 68
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#define RST_DSIPHYRST_APB 69
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#define RST_CSIPHY0 70
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#define RST_CSIPHY0RST_APB 71
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#define RST_CSIPHY1 72
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#define RST_CSIPHY1RST_APB 73
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#define RST_UART4 74
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#define RST_GPIO3 75
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#define RST_SYSTEM 76
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#define RST_TIMER 77
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#define RST_TIMER0 78
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#define RST_TIMER1 79
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#define RST_TIMER2 80
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#define RST_TIMER3 81
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#define RST_TIMER4 82
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#define RST_TIMER5 83
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#define RST_TIMER6 84
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#define RST_TIMER7 85
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#define RST_WGN0 86
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#define RST_WGN1 87
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#define RST_WGN2 88
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#define RST_KEYSCAN 89
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#define RST_SPIC1 90
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#define RST_AUDDAC 91
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#define RST_AUDDACRST_APB 92
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#define RST_AUDADC 93
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#define RST_AUDADCRST_APB 94
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#define RST_VCSYS 95
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#define RST_ETHPHY 96
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#define RST_ETHPHYRST_APB 97
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#define RST_AUDSRC 98
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#define RST_AUTO_CLEAR_CPUCORE0 99
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#define RST_AUTO_CLEAR_CPUCORE1 100
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#define RST_AUTO_CLEAR_CPUCORE2 101
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#define RST_AUTO_CLEAR_CPUCORE3 102
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#define RST_AUTO_CLEAR_MAINRST_AP 103
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#define RST_AUTO_CLEAR_SECONDRST_AP 104
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#define CLK_RST_A53 0
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#define CLK_RST_50M_A53 1
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#define CLK_RST_AHB_ROM 2
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#define CLK_RST_AXI_SRAM 3
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#define CLK_RST_DDR_AXI 4
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#define CLK_RST_EFUSE 5
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#define CLK_RST_APB_EFUSE 6
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#define CLK_RST_AXI_EMMC 7
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#define CLK_RST_EMMC 8
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#define CLK_RST_100K_EMMC 9
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#define CLK_RST_AXI_SD 10
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#define CLK_RST_SD 11
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#define CLK_RST_100K_SD 12
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#define CLK_RST_500M_ETH0 13
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#define CLK_RST_AXI_ETH0 14
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#define CLK_RST_500M_ETH1 15
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#define CLK_RST_AXI_ETH1 16
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#define CLK_RST_AXI_GDMA 17
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#define CLK_RST_APB_GPIO 18
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#define CLK_RST_APB_GPIO_INTR 19
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#define CLK_RST_GPIO_DB 20
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#define CLK_RST_AXI_MINER 21
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#define CLK_RST_AHB_SF 22
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#define CLK_RST_SDMA_AXI 23
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#define CLK_RST_SDMA_AUD 24
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#define CLK_RST_APB_I2C 25
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#define CLK_RST_APB_WDT 26
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#define CLK_RST_APB_JPEG 27
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#define CLK_RST_JPEG_AXI 28
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#define CLK_RST_AXI_NF 29
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#define CLK_RST_APB_NF 30
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#define CLK_RST_NF 31
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#define CLK_RST_APB_PWM 32
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#define CLK_RST_RV 33
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#define CLK_RST_APB_SPI 34
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#define CLK_RST_TPU_AXI 35
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#define CLK_RST_UART_500M 36
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#define CLK_RST_APB_UART 37
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#define CLK_RST_APB_I2S 38
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#define CLK_RST_AXI_USB 39
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#define CLK_RST_APB_USB 40
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#define CLK_RST_125M_USB 41
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#define CLK_RST_33K_USB 42
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#define CLK_RST_12M_USB 43
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#define CLK_RST_APB_VIDEO 44
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#define CLK_RST_VIDEO_AXI 45
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#define CLK_RST_VPP_AXI 46
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#define CLK_RST_APB_VPP 47
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#define CLK_RST_AXI1 48
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#define CLK_RST_AXI2 49
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#define CLK_RST_AXI3 50
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#define CLK_RST_AXI4 51
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#define CLK_RST_AXI5 52
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#define CLK_RST_AXI6 53
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#endif /* _DT_BINDINGS_RST_CV1835_H_ */
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