50fd0630f7
-142736, Sync spacc driver code. -2303c6, add suspend to ram featrue. -d3bff8, support pdm mic using AEC. -203610, support new spinand flash:HYF1GQ4UDACAE. Change-Id: Iec21bccaee43c4a71213b42b88f41a45527fd8a5
74 lines
2.0 KiB
C
74 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _CVITEK_SPACC_H_
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#define _CVITEK_SPACC_H_
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typedef enum SPACC_ALGO {
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SPACC_ALGO_AES,
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SPACC_ALGO_DES,
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SPACC_ALGO_TDES,
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SPACC_ALGO_SM4,
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SPACC_ALGO_SHA1,
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SPACC_ALGO_SHA256,
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SPACC_ALGO_BASE64,
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} SPACC_ALGO_E;
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typedef enum SPACC_ALGO_MODE {
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SPACC_ALGO_MODE_ECB,
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SPACC_ALGO_MODE_CBC, //cv180x Not Supported
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SPACC_ALGO_MODE_CTR, //cv180x Not Supported
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SPACC_ALGO_MODE_OFB, //cv180x Not Supported
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} SPACC_ALGO_MODE_E;
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typedef enum SPACC_KEY_SIZE {
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SPACC_KEY_SIZE_64BITS,
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SPACC_KEY_SIZE_128BITS,
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SPACC_KEY_SIZE_192BITS,
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SPACC_KEY_SIZE_256BITS,
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} SPACC_KEY_SIZE_E;
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typedef enum SPACC_ACTION {
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SPACC_ACTION_ENCRYPTION,
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SPACC_ACTION_DECRYPT,
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} SPACC_ACTION_E;
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typedef struct spacc_base64_action {
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SPACC_ACTION_E action;
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} spacc_base64_action_s;
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typedef struct spacc_aes_config {
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// data config
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void *src; //src phy address
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size_t len;
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// spacc config
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unsigned char key[32];
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unsigned char iv[16];
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SPACC_ALGO_MODE_E mode;
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SPACC_KEY_SIZE_E size;
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SPACC_ACTION_E action;
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} spacc_aes_config_s;
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typedef struct spacc_des_config {
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unsigned char key[24];
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unsigned char iv[16];
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SPACC_ALGO_MODE_E mode;
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SPACC_ACTION_E action;
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} spacc_des_config_s;
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typedef spacc_aes_config_s spacc_sm4_config_s;
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typedef spacc_des_config_s spacc_tdes_config_s;
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#define IOCTL_SPACC_BASE 'S'
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#define IOCTL_SPACC_CREATE_MEMPOOL _IOW(IOCTL_SPACC_BASE, 1, unsigned int)
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#define IOCTL_SPACC_GET_MEMPOOL_SIZE _IOR(IOCTL_SPACC_BASE, 2, unsigned int)
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#define IOCTL_SPACC_SHA256_ACTION _IO(IOCTL_SPACC_BASE, 5)
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#define IOCTL_SPACC_SHA1_ACTION _IO(IOCTL_SPACC_BASE, 6)
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#define IOCTL_SPACC_BASE64_ACTION _IOW(IOCTL_SPACC_BASE, 7, spacc_base64_action_s)
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#define IOCTL_SPACC_AES_ACTION _IOW(IOCTL_SPACC_BASE, 8, spacc_aes_config_s)
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#define IOCTL_SPACC_SM4_ACTION _IOW(IOCTL_SPACC_BASE, 9, spacc_sm4_config_s)
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#define IOCTL_SPACC_DES_ACTION _IOW(IOCTL_SPACC_BASE, 10, spacc_des_config_s)
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#define IOCTL_SPACC_TDES_ACTION _IOW(IOCTL_SPACC_BASE, 11, spacc_tdes_config_s)
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#endif // _CVITEK_SPACC_H_
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