0545e9dc6d
commit d1edce71135cc6d98c0a4b5729774542b676e769 Author: sophgo-forum-service <forum_service@sophgo.com> Date: Fri Mar 15 16:07:33 2024 +0800 [fix] recommend using ssh method to clone repo. [fix] fix sensor driver repo branch name.
162 lines
3.5 KiB
C
162 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) Cvitek Co., Ltd. 2019-2022. All rights reserved.
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*
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* File Name: cvi_spinlock.c
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* Description:
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*/
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#ifdef FREERTOS_BSP
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#include "cvi_spinlock.h"
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#include "arch_time.h"
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#include "core_rv64.h"
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#include "csi_rv64_gcc.h"
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#include "csr.h"
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#include "delay.h"
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#include "mmio.h"
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#include "stdint.h"
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#include "top_reg.h"
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#include "types.h"
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#else
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/slab.h>
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#include <linux/time.h>
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#include <linux/uaccess.h>
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#include <linux/version.h>
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#include "cvi_spinlock.h"
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#endif
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#ifndef FREERTOS_BSP
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static unsigned long reg_base;
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#else
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static unsigned long reg_base = SPINLOCK_REG_BASE;
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#endif
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spinlock_t reg_write_lock;
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static unsigned char lockCount[SPIN_MAX+1] = {0};
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static void *__iomem c906l_pc_reg;
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void cvi_spinlock_init(void)
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{
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spin_lock_init(®_write_lock);
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c906l_pc_reg = ioremap(0x1901070, 4);
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if (c906l_pc_reg == NULL) {
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pr_err("c906l_pc_reg ioremap failed!\n");
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}
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pr_info("[%s] success\n", __func__);
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}
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void cvi_spinlock_uninit(void)
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{
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iounmap(c906l_pc_reg);
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}
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void spinlock_base(unsigned long mb_base)
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{
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reg_base = mb_base;
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}
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static inline int hw_spin_trylock(hw_raw_spinlock_t *lock)
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{
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#ifndef RISCV_QEMU
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writew(lock->locks, (void *)(reg_base + sizeof(int) * lock->hw_field));
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if (readw((void *)(reg_base + sizeof(int) * lock->hw_field)) == lock->locks)
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return MAILBOX_LOCK_SUCCESS;
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return MAILBOX_LOCK_FAILED;
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#else
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return MAILBOX_LOCK_SUCCESS;
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#endif
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}
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int hw_spin_lock(hw_raw_spinlock_t *lock)
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{
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u64 i;
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u64 loops = 1000000;
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hw_raw_spinlock_t _lock = {.hw_field = lock->hw_field, .locks=lock->locks};
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if (lock->hw_field >= SPIN_LINUX_RTOS) {
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unsigned long flags;
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spin_lock_irqsave(®_write_lock, flags);
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if (lockCount[lock->hw_field] == 0) {
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lockCount[lock->hw_field]++;
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}
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_lock.locks = lockCount[lock->hw_field];
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lockCount[lock->hw_field]++;
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spin_unlock_irqrestore(®_write_lock, flags);
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}
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else {
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//....
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}
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for (i = 0; i < loops; i++) {
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if (hw_spin_trylock(&_lock) == MAILBOX_LOCK_SUCCESS)
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{
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lock->locks = _lock.locks;
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return MAILBOX_LOCK_SUCCESS;
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}
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udelay(1);
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}
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#ifdef FREERTOS_BSP
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uart_puts("__spin_lock_debug fail\n");
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#else
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pr_err("__spin_lock_debug fail! loops = %lld\n", loops);
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#endif
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return MAILBOX_LOCK_FAILED;
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}
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int _hw_raw_spin_lock_irqsave(hw_raw_spinlock_t *lock)
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{
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int flag = MAILBOX_LOCK_SUCCESS;
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#ifdef FREERTOS_BSP
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// save and disable irq
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flag = (__get_MSTATUS() & 8);
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__disable_irq();
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#endif
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// lock
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if (hw_spin_lock(lock) == MAILBOX_LOCK_FAILED) {
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#ifdef FREERTOS_BSP
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// if spinlock fail , restore irq
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if (flag) {
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__enable_irq();
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}
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#endif
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pr_err("spin lock fail! C906L pc = 0x%x,reg_val=0x%x, lock->locks=0x%x\n",
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ioread32(c906l_pc_reg), readw((void *)(reg_base + sizeof(int) * lock->hw_field)), lock->locks);
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return MAILBOX_LOCK_FAILED;
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}
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return flag;
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}
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void _hw_raw_spin_unlock_irqrestore(hw_raw_spinlock_t *lock, int flag)
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{
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#ifndef RISCV_QEMU
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// unlock
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if (readw((void *)(reg_base + sizeof(int) * lock->hw_field)) == lock->locks) {
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writew(lock->locks, (void *)(reg_base + sizeof(int) * lock->hw_field));
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#ifdef FREERTOS_BSP
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// restore irq
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if (flag) {
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__enable_irq();
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}
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#endif
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} else {
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#ifdef FREERTOS_BSP
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uart_puts("spin unlock fail\n");
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#else
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pr_err("spin unlock fail! C906L pc=0x%x,reg_val=0x%x, lock->locks=0x%x\n",
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ioread32(c906l_pc_reg), readw((void *)(reg_base + sizeof(int) * lock->hw_field)), lock->locks);
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#endif
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}
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#else
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if (flag) {
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__enable_irq();
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}
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#endif
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}
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