0545e9dc6d
commit d1edce71135cc6d98c0a4b5729774542b676e769 Author: sophgo-forum-service <forum_service@sophgo.com> Date: Fri Mar 15 16:07:33 2024 +0800 [fix] recommend using ssh method to clone repo. [fix] fix sensor driver repo branch name.
121 lines
2.7 KiB
C
121 lines
2.7 KiB
C
#ifndef __CVI_FIP_H__
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#define __CVI_FIP_H__
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#include <unistd.h>
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include <string.h>
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#define SPI_NAND_BASE_DATA_BACKUP_COPY (2)
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#define MAX_PAGE_SIZE (16 * 1024)
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#define MAX_SPARE_SIZE (256)
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#define SPI_NAND_FIP_DATA_BLOCK_COUNT (8)
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#define SPI_NAND_BASE_RESERVED_ENTRY (4)
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#define MAX_BLOCK_CNT 4096
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#define NUMBER_PATCH_SET 128
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#define HEADER_ADDR 0x10F200000
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typedef unsigned char u8;
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typedef unsigned int u32;
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static inline uint32_t DESC_CONV(char *x)
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{
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return ((((((x[0] << 8) | x[1]) << 8) | x[2]) << 8) | x[3]);
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}
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#define SPI_NAND_VECTOR_SIGNATURE DESC_CONV("SPNV")
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#define PRODUCTION_FW_SIGNATURE DESC_CONV("PTFM")
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#ifdef NANDBOOT_V2
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#define SPI_NAND_VECTOR_VERSION (0x18222001)
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#else
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#define SPI_NAND_VECTOR_VERSION (0x18352101)
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#endif
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struct _spi_nand_info {
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uint16_t id;
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uint16_t page_size;
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uint16_t spare_size;
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uint16_t pages_per_block;
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uint16_t block_cnt; // up to 32k block
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uint8_t pages_per_block_shift;
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uint8_t flags;
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#ifdef NANDBOOT_V2
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uint8_t ecc_en_feature_offset;
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uint8_t ecc_en_mask;
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uint8_t ecc_status_offset;
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uint8_t ecc_status_mask;
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uint8_t ecc_status_shift;
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uint8_t ecc_status_valid_val;
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#endif
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};
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struct _patch_data_t {
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uint32_t reg;
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uint32_t value;
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};
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struct _spi_nand_base_vector_t {
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uint32_t signature;
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uint32_t version;
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uint16_t spi_nand_vector_blks[SPI_NAND_BASE_DATA_BACKUP_COPY];
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uint16_t fip_bin_blk_cnt;
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uint16_t fip_bin_blks[SPI_NAND_BASE_DATA_BACKUP_COPY][SPI_NAND_FIP_DATA_BLOCK_COUNT];
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uint16_t erase_count; // erase count for sys base block
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uint16_t rsvd_block_count; // how many blocks reserved for spi_nand_vect and fip.bin
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uint32_t spi_nand_vector_length; // spi_nand vector struct length, must less than a page
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uint8_t spi_nand_base_block_usage[SPI_NAND_BASE_RESERVED_ENTRY];
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struct _spi_nand_info spi_nand_info;
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uint8_t factory_defect_buf[MAX_BLOCK_CNT / 8]; // factory defect block table, up to 512 bytes
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uint32_t bld_size;
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uintptr_t bld_loading_to_addr;
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uint32_t valid_patch_num;
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struct _patch_data_t patch_data[NUMBER_PATCH_SET];
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#ifdef NANDBOOT_V2
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uint16_t crc;
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#endif
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uint8_t ecc_en_feature_offset;
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uint8_t ecc_en_mask;
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uint8_t ecc_status_offset;
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uint8_t ecc_status_mask;
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uint8_t ecc_status_shift;
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uint8_t ecc_status_valid_val;
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};
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//void bbt_dump_buf(char *s, void *buf, int len);
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void spi_nand_dump_vec(void);
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void get_spi_nand_info(void);
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int spi_nand_scan_vector(int fd);
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void verify_fip_bin(void);
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int spi_nand_flush_fip_bin(int dev_fd, char* path);
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int spi_nand_flush_vec(int fd);
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int spi_nand_check_write_vector(void *buf);
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#ifdef __cplusplus
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#if __cplusplus
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}
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#endif
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#endif /* __cplusplus */
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#endif // __CVI_FLASH_H__
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