50fd0630f7
-142736, Sync spacc driver code. -2303c6, add suspend to ram featrue. -d3bff8, support pdm mic using AEC. -203610, support new spinand flash:HYF1GQ4UDACAE. Change-Id: Iec21bccaee43c4a71213b42b88f41a45527fd8a5
58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _CVITEK_SPACC_REGS_H_
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#define _CVITEK_SPACC_REGS_H_
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// Register offset
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#define CRYPTODMA_DMA_CTRL 0x0
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#define CRYPTODMA_INT_MASK 0x4
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#define CRYPTODMA_DES_BASE_L 0x8
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#define CRYPTODMA_DES_BASE_H 0xC
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#define CRYPTODMA_WR_INT 0x10
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#define CRYPTODMA_DES_KEY 0x100
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#define CRYPTODMA_DES_IV 0x180
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#define CRYPTODMA_SHA_PARA 0x1C0
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// DMA Descriptor
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#define CRYPTODMA_CTRL 0x00
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#define CRYPTODMA_CIPHER 0x01
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#define CRYPTODMA_NEXT_PTR_ADDR_L 0x02
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#define CRYPTODMA_NEXT_PTR_ADDR_H 0x03
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#define CRYPTODMA_SRC_ADDR_L 0x04
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#define CRYPTODMA_SRC_ADDR_H 0x05
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#define CRYPTODMA_DST_ADDR_L 0x06
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#define CRYPTODMA_DST_ADDR_H 0x07
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#define CRYPTODMA_DATA_AMOUNT_L 0x08
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#define CRYPTODMA_SRC_LEN 0x08
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#define CRYPTODMA_DATA_AMOUNT_H 0x09
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#define CRYPTODMA_DST_LEN 0x0A
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#define CRYPTODMA_KEY 0x0A
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#define CRYPTODMA_IV 0x12
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#define DES_USE_BYPASS BIT(8)
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#define DES_USE_AES BIT(9)
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#define DES_USE_DES BIT(10)
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#define DES_USE_SM4 BIT(11)
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#define DES_USE_SHA BIT(12)
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#define DES_USE_BASE64 BIT(13)
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#define DES_USE_KEY0 BIT(16)
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#define DES_USE_KEY1 BIT(17)
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#define DES_USE_KEY2 BIT(18)
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#define DES_USE_DESCRIPTOR_KEY BIT(19)
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#define DES_USE_IV0 BIT(20)
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#define DES_USE_IV1 BIT(21)
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#define DES_USE_IV2 BIT(22)
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#define DES_USE_DESCRIPTOR_IV BIT(23)
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// Cipher control for AES
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#define DECRYPT_ENABLE 0x0
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#define CBC_ENABLE 0x1
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#define AES_KEY_MODE 0x4
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// DMA control
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#define DMA_ENABLE 1
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#define DMA_DESCRIPTOR_MODE 1
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#define DMA_READ_MAX_BURST 16
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#define DMA_WRITE_MAX_BURST 6
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#endif
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