0545e9dc6d
commit d1edce71135cc6d98c0a4b5729774542b676e769 Author: sophgo-forum-service <forum_service@sophgo.com> Date: Fri Mar 15 16:07:33 2024 +0800 [fix] recommend using ssh method to clone repo. [fix] fix sensor driver repo branch name.
147 lines
4.2 KiB
C
147 lines
4.2 KiB
C
/*
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* Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved.
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*
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* File Name: vpuconfig.h
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* Description:
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*/
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#ifndef _VPU_CONFIG_H_
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#define _VPU_CONFIG_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "config.h"
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#define BODA7503_CODE 0x7503
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#define CODA7542_CODE 0x7542
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#define BODA950_CODE 0x9500
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#define CODA960_CODE 0x9600
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#define CODA980_CODE 0x9800
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#define WAVE320_CODE 0x3200
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#define WAVE410_CODE 0x4100 /* Wave410 version 1: Single vcore */
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#define WAVE4102_CODE 0x4102 /* Wave410 version 2: Multi vcore */
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#define WAVE420_CODE 0x4200 /* Wave420 */
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#define WAVE420L_CODE 0x4201 /* Wave420L */
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#define WAVE412_CODE 0x4120
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#define WAVE510_CODE 0x5100
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#define WAVE512_CODE 0x5120
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#define WAVE515_CODE 0x5150
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#define WAVE520_CODE 0x5200
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#define CODA7Q_CODE 0x7101
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#define PRODUCT_CODE_W_SERIES(x) \
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(x == WAVE410_CODE || x == WAVE4102_CODE || x == WAVE420_CODE || \
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x == WAVE412_CODE || x == CODA7Q_CODE || x == WAVE420L_CODE || \
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x == WAVE510_CODE || x == WAVE512_CODE || x == WAVE515_CODE || \
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x == WAVE520_CODE)
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#define PRODUCT_CODE_NOT_W_SERIES(x) \
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(x == BODA7503_CODE || x == CODA7542_CODE || x == BODA950_CODE || \
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x == CODA960_CODE || x == CODA980_CODE || x == WAVE320_CODE)
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#define MAX_INST_HANDLE_SIZE 768
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#define MAX_NUM_INSTANCE 16
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#define MAX_NUM_DEC_INSTANCE 4
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#define MAX_NUM_VPU_CORE 2
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#define MAX_NUM_VCORE 1
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#define MAX_ENC_AVC_PIC_WIDTH 4096
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#define MAX_ENC_AVC_PIC_HEIGHT 2304
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#define MAX_ENC_PIC_WIDTH 4096
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#define MAX_ENC_PIC_HEIGHT 2304
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#define MIN_ENC_PIC_WIDTH 96
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#define MIN_ENC_PIC_HEIGHT 16
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// for WAVE420
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#define W4_MIN_ENC_PIC_WIDTH 256
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#define W4_MIN_ENC_PIC_HEIGHT 128
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#define W4_MAX_ENC_PIC_WIDTH 8192
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#define W4_MAX_ENC_PIC_HEIGHT 8192
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#define MAX_DEC_PIC_WIDTH 4096
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#define MAX_DEC_PIC_HEIGHT 2304
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// Application specific configuration
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#ifdef HAPS_SIM
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#define VPU_ENC_TIMEOUT (30000 * 10000)
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#else
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#define VPU_ENC_TIMEOUT 30000
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#endif
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#define VPU_DEC_TIMEOUT 10000
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#ifdef HAPS_SIM
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#define VPU_BUSY_CHECK_TIMEOUT (5000 * 10000)
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#else
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#define VPU_BUSY_CHECK_TIMEOUT 5000
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#endif
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// codec specific configuration
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#define VPU_REORDER_ENABLE 1
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// it can be set to 1 to handle reordering DPB in host side.
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#define VPU_REORDER_DISABLE 0
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// it can be set to 0 to disable reordering DPB in host side.
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#define CBCR_INTERLEAVE 1
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//[default 1 for BW checking with CnMViedo Conformance] 0 (chroma
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//separate mode), 1 (chroma interleave mode) // if the type of
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//tiledmap uses the kind of MB_RASTER_MAP. must set to enable
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//CBCR_INTERLEAVE
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#define VPU_ENABLE_BWB 1
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#define HOST_ENDIAN VDI_128BIT_LITTLE_ENDIAN
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#define VPU_FRAME_ENDIAN HOST_ENDIAN
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#define VPU_STREAM_ENDIAN HOST_ENDIAN
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#define VPU_USER_DATA_ENDIAN HOST_ENDIAN
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#define VPU_SOURCE_ENDIAN HOST_ENDIAN
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#define DRAM_BUS_WIDTH 16
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/************************************************************************/
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/* VPU COMMON MEMORY */
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/************************************************************************/
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#define COMMAND_QUEUE_DEPTH 4
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#define ONE_TASKBUF_SIZE_FOR_W5DEC_CQ \
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(8 * 1024 * 1024)
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/* upto 8Kx4K, need 8Mbyte per task*/
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#define ONE_TASKBUF_SIZE_FOR_W5ENC_CQ \
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(16 * 1024 * 1024)
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/* upto 8Kx8K, need 16Mbyte per task. (worst case VLC data =: 13M for 8kx8k) */
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#define ONE_TASKBUF_SIZE_FOR_CQ 0x0
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#define SIZE_COMMON (1 * 768 * 1024)
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#define SIZE_COMMON_265 (SIZE_COMMON)
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#define SIZE_COMMON_264 (SIZE_COMMON)
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//=====4. VPU REPORT MEMORY ======================//
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#define SIZE_REPORT_BUF (0x10000)
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#define STREAM_END_SIZE 0
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#define STREAM_END_SET_FLAG 0
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#define STREAM_END_CLEAR_FLAG -1
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#define EXPLICIT_END_SET_FLAG -2
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#define USE_BIT_INTERNAL_BUF 1
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#define USE_IP_INTERNAL_BUF 1
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#define USE_DBKY_INTERNAL_BUF 1
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#define USE_DBKC_INTERNAL_BUF 1
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#define USE_OVL_INTERNAL_BUF 1
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#define USE_BTP_INTERNAL_BUF 1
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#define USE_ME_INTERNAL_BUF 1
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/* WAVE410 only */
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#define USE_BPU_INTERNAL_BUF 1
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#define USE_VCE_IP_INTERNAL_BUF 1
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#define USE_VCE_LF_ROW_INTERNAL_BUF 1
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/* WAVE420 only */
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#define USE_IMD_INTERNAL_BUF 1
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#define USE_RDO_INTERNAL_BUF 1
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#define USE_LF_INTERNAL_BUF 1
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#ifdef __cplusplus
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}
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#endif
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#endif /* _VPU_CONFIG_H_ */
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