commit d1edce71135cc6d98c0a4b5729774542b676e769 Author: sophgo-forum-service <forum_service@sophgo.com> Date: Fri Mar 15 16:07:33 2024 +0800 [fix] recommend using ssh method to clone repo. [fix] fix sensor driver repo branch name.
176 lines
5.5 KiB
C
176 lines
5.5 KiB
C
/*
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* Copyright (C) Cvitek Co., Ltd. 2019-2021. All rights reserved.
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*
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* File Name: cv181x-clock.h
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* Description:
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*/
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#ifndef __DT_BINDINGS_CLK_CV181X_H__
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#define __DT_BINDINGS_CLK_CV181X_H__
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#define CV181X_CLK_MPLL 0
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#define CV181X_CLK_TPLL 1
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#define CV181X_CLK_FPLL 2
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#define CV181X_CLK_MIPIMPLL 3
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#define CV181X_CLK_A0PLL 4
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#define CV181X_CLK_DISPPLL 5
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#define CV181X_CLK_CAM0PLL 6
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#define CV181X_CLK_CAM1PLL 7
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#define CV181X_CLK_MIPIMPLL_D3 8
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#define CV181X_CLK_CAM0PLL_D2 9
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#define CV181X_CLK_CAM0PLL_D3 10
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#define CV181X_CLK_A53 11
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#define CV181X_CLK_CPU_AXI0 12
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#define CV181X_CLK_CPU_GIC 13
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#define CV181X_CLK_XTAL_A53 14
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#define CV181X_CLK_TPU 15
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#define CV181X_CLK_TPU_FAB 16
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#define CV181X_CLK_AHB_ROM 17
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#define CV181X_CLK_DDR_AXI_REG 18
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#define CV181X_CLK_RTC_25M 19
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#define CV181X_CLK_TEMPSEN 20
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#define CV181X_CLK_SARADC 21
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#define CV181X_CLK_EFUSE 22
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#define CV181X_CLK_APB_EFUSE 23
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#define CV181X_CLK_DEBUG 24
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#define CV181X_CLK_XTAL_MISC 25
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#define CV181X_CLK_AXI4_EMMC 26
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#define CV181X_CLK_EMMC 27
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#define CV181X_CLK_100K_EMMC 28
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#define CV181X_CLK_AXI4_SD0 29
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#define CV181X_CLK_SD0 30
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#define CV181X_CLK_100K_SD0 31
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#define CV181X_CLK_AXI4_SD1 32
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#define CV181X_CLK_SD1 33
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#define CV181X_CLK_100K_SD1 34
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#define CV181X_CLK_SPI_NAND 35
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#define CV181X_CLK_500M_ETH0 36
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#define CV181X_CLK_AXI4_ETH0 37
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#define CV181X_CLK_500M_ETH1 38
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#define CV181X_CLK_AXI4_ETH1 39
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#define CV181X_CLK_APB_GPIO 40
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#define CV181X_CLK_APB_GPIO_INTR 41
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#define CV181X_CLK_GPIO_DB 42
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#define CV181X_CLK_AHB_SF 43
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#define CV181X_CLK_SDMA_AXI 44
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#define CV181X_CLK_SDMA_AUD0 45
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#define CV181X_CLK_SDMA_AUD1 46
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#define CV181X_CLK_SDMA_AUD2 47
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#define CV181X_CLK_SDMA_AUD3 48
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#define CV181X_CLK_APB_I2C 49
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#define CV181X_CLK_APB_WDT 50
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#define CV181X_CLK_PWM 51
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#define CV181X_CLK_APB_SPI0 52
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#define CV181X_CLK_APB_SPI1 53
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#define CV181X_CLK_APB_SPI2 54
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#define CV181X_CLK_APB_SPI3 55
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#define CV181X_CLK_CAM0_200 56
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#define CV181X_CLK_UART0 57
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#define CV181X_CLK_APB_UART0 58
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#define CV181X_CLK_UART1 59
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#define CV181X_CLK_APB_UART1 60
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#define CV181X_CLK_UART2 61
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#define CV181X_CLK_APB_UART2 62
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#define CV181X_CLK_UART3 63
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#define CV181X_CLK_APB_UART3 64
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#define CV181X_CLK_UART4 65
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#define CV181X_CLK_APB_UART4 66
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#define CV181X_CLK_APB_I2S0 67
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#define CV181X_CLK_APB_I2S1 68
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#define CV181X_CLK_APB_I2S2 69
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#define CV181X_CLK_APB_I2S3 70
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#define CV181X_CLK_AXI4_USB 71
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#define CV181X_CLK_APB_USB 72
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#define CV181X_CLK_125M_USB 73
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#define CV181X_CLK_33K_USB 74
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#define CV181X_CLK_12M_USB 75
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#define CV181X_CLK_AXI4 76
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#define CV181X_CLK_AXI6 77
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#define CV181X_CLK_DSI_ESC 78
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#define CV181X_CLK_AXI_VIP 79
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#define CV181X_CLK_SRC_VIP_SYS_0 80
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#define CV181X_CLK_SRC_VIP_SYS_1 81
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#define CV181X_CLK_DISP_SRC_VIP 82
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#define CV181X_CLK_AXI_VIDEO_CODEC 83
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#define CV181X_CLK_VC_SRC0 84
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#define CV181X_CLK_H264C 85
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#define CV181X_CLK_H265C 86
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#define CV181X_CLK_JPEG 87
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#define CV181X_CLK_APB_JPEG 88
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#define CV181X_CLK_APB_H264C 89
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#define CV181X_CLK_APB_H265C 90
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#define CV181X_CLK_CAM0 91
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#define CV181X_CLK_CAM1 92
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#define CV181X_CLK_CSI_MAC0_VIP 93
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#define CV181X_CLK_CSI_MAC1_VIP 94
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#define CV181X_CLK_ISP_TOP_VIP 95
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#define CV181X_CLK_IMG_D_VIP 96
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#define CV181X_CLK_IMG_V_VIP 97
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#define CV181X_CLK_SC_TOP_VIP 98
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#define CV181X_CLK_SC_D_VIP 99
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#define CV181X_CLK_SC_V1_VIP 100
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#define CV181X_CLK_SC_V2_VIP 101
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#define CV181X_CLK_SC_V3_VIP 102
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#define CV181X_CLK_DWA_VIP 103
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#define CV181X_CLK_BT_VIP 104
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#define CV181X_CLK_DISP_VIP 105
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#define CV181X_CLK_DSI_MAC_VIP 106
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#define CV181X_CLK_LVDS0_VIP 107
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#define CV181X_CLK_LVDS1_VIP 108
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#define CV181X_CLK_CSI0_RX_VIP 109
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#define CV181X_CLK_CSI1_RX_VIP 110
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#define CV181X_CLK_PAD_VI_VIP 111
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#define CV181X_CLK_1M 112
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#define CV181X_CLK_SPI 113
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#define CV181X_CLK_I2C 114
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#define CV181X_CLK_PM 115
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#define CV181X_CLK_TIMER0 116
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#define CV181X_CLK_TIMER1 117
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#define CV181X_CLK_TIMER2 118
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#define CV181X_CLK_TIMER3 119
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#define CV181X_CLK_TIMER4 120
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#define CV181X_CLK_TIMER5 121
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#define CV181X_CLK_TIMER6 122
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#define CV181X_CLK_TIMER7 123
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#define CV181X_CLK_APB_I2C0 124
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#define CV181X_CLK_APB_I2C1 125
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#define CV181X_CLK_APB_I2C2 126
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#define CV181X_CLK_APB_I2C3 127
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#define CV181X_CLK_APB_I2C4 128
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#define CV181X_CLK_WGN 129
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#define CV181X_CLK_WGN0 130
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#define CV181X_CLK_WGN1 131
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#define CV181X_CLK_WGN2 132
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#define CV181X_CLK_KEYSCAN 133
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#define CV181X_CLK_AHB_SF1 134
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#define CV181X_CLK_VC_SRC1 135
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#define CV181X_CLK_SRC_VIP_SYS_2 136
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#define CV181X_CLK_PAD_VI1_VIP 137
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#define CV181X_CLK_CFG_REG_VIP 138
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#define CV181X_CLK_CFG_REG_VC 139
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#define CV181X_CLK_AUDSRC 140
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#define CV181X_CLK_APB_AUDSRC 141
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#define CV181X_CLK_VC_SRC2 142
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#define CV181X_CLK_PWM_SRC 143
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#define CV181X_CLK_AP_DEBUG 144
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#define CV181X_CLK_SRC_RTC_SYS_0 145
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#define CV181X_CLK_PAD_VI2_VIP 146
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#define CV181X_CLK_CSI_BE_VIP 147
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#define CV181X_CLK_VIP_IP0 148
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#define CV181X_CLK_VIP_IP1 149
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#define CV181X_CLK_VIP_IP2 150
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#define CV181X_CLK_VIP_IP3 151
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#define CV181X_CLK_C906_0 152
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#define CV181X_CLK_C906_1 153
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#define CV181X_CLK_SRC_VIP_SYS_3 154
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#define CV181X_CLK_SRC_VIP_SYS_4 155
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#define CV181X_CLK_IVE_VIP 156
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#define CV181X_CLK_RAW_VIP 157
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#define CV181X_CLK_OSDC_VIP 158
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#define CV181X_CLK_CSI_MAC2_VIP 159
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#define CV181X_CLK_CAM0_VIP 160
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#endif /* __DT_BINDINGS_CLK_CV181X_H__ */
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