From 4a85bb542d68951bc0882258555c705718aa88c7 Mon Sep 17 00:00:00 2001 From: kalous12 <2797795537@qq.com> Date: Mon, 26 Jun 2023 02:58:36 +0000 Subject: [PATCH] =?UTF-8?q?=E6=9B=B4=E6=96=B010.1=E5=AF=B8=E5=B1=8F?= =?UTF-8?q?=E5=B9=95=E7=9A=84=E8=AE=BE=E5=A4=87=E6=A0=91=E5=92=8C=E8=AE=BE?= =?UTF-8?q?=E5=A4=87=E6=A0=91=E6=8F=92=E4=BB=B6?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ...66-lubancat-dsi0-10.1-800x1280-overlay.dts | 372 ++++++++++++++++++ ...-2io-dsi0-in-vp0-10.1-800x1280-overlay.dts | 340 ++++++++++++++++ ...-2io-dsi1-in-vp1-10.1-800x1280-overlay.dts | 340 ++++++++++++++++ ...68-lubancat-dsi0-10.1-800x1280-overlay.dts | 340 ++++++++++++++++ .../rk3566-lubancat-dsi0-10.1-800x1280.dtsi | 31 ++ .../rk3568-lubancat-dsi0-10.1-800x1280.dtsi | 301 ++++++++++++++ 6 files changed, 1724 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-dsi0-10.1-800x1280-overlay.dts create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-10.1-800x1280-overlay.dts create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-10.1-800x1280-overlay.dts create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-dsi0-10.1-800x1280-overlay.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-lubancat-dsi0-10.1-800x1280.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-lubancat-dsi0-10.1-800x1280.dtsi diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-dsi0-10.1-800x1280-overlay.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-dsi0-10.1-800x1280-overlay.dts new file mode 100644 index 000000000000..c02f79efd878 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rk3566-lubancat-dsi0-10.1-800x1280-overlay.dts @@ -0,0 +1,372 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +/ { + fragment@0 { + target = <&route_dsi0>; + + __overlay__ { + status = "okay"; + connect = <&vp0_out_dsi0>; + }; + }; + + fragment@1 { + target = <&video_phy0>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&dsi0_in_vp0>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@3 { + target = <&dsi0_in_vp1>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@4 { + target = <&dsi0>; + + __overlay__ { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; + power-supply = <&mipi_dsi0_power>; + + enable-delay-ms = <35>; + prepare-delay-ms = <6>; + reset-delay-ms = <0>; + init-delay-ms = <20>; + unprepare-delay-ms = <0>; + disable-delay-ms = <20>; + + size,width = <74>; + size,height = <133>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 39 05 04 FF 98 81 03 + 15 05 02 01 00 + 15 05 02 02 00 + 15 05 02 03 53 + 15 05 02 04 D3 + 15 05 02 05 00 + 15 05 02 06 0D + 15 05 02 07 08 + 15 05 02 08 00 + 15 05 02 09 00 + 15 05 02 0a 00 + 15 05 02 0b 00 + 15 05 02 0c 00 + 15 05 02 0d 00 + 15 05 02 0e 00 + 15 05 02 0f 28 + 15 05 02 10 28 + 15 05 02 11 00 + 15 05 02 12 00 + 15 05 02 13 00 + 15 05 02 14 00 + 15 05 02 15 00 + 15 05 02 16 00 + 15 05 02 17 00 + 15 05 02 18 00 + 15 05 02 19 00 + 15 05 02 1a 00 + 15 05 02 1b 00 + 15 05 02 1d 00 + 15 05 02 1e 40 + 15 05 02 1f 80 + 15 05 02 20 06 + 15 05 02 21 01 + 15 05 02 22 00 + 15 05 02 23 00 + 15 05 02 24 00 + 15 05 02 25 00 + 15 05 02 26 00 + 15 05 02 27 00 + 15 05 02 28 33 + 15 05 02 29 33 + 15 05 02 2a 00 + 15 05 02 2b 00 + 15 05 02 2c 00 + 15 05 02 2d 00 + 15 05 02 2e 00 + 15 05 02 2f 00 + 15 05 02 30 00 + 15 05 02 31 00 + 15 05 02 32 00 + 15 05 02 33 00 + 15 05 02 34 03 + 15 05 02 35 00 + 15 05 02 36 00 + 15 05 02 37 00 + 15 05 02 38 96 + 15 05 02 39 00 + 15 05 02 3a 00 + 15 05 02 3b 00 + 15 05 02 3c 00 + 15 05 02 3d 00 + 15 05 02 3e 00 + 15 05 02 3f 00 + 15 05 02 40 00 + 15 05 02 41 00 + 15 05 02 42 00 + 15 05 02 43 00 + 15 05 02 44 00 + 15 05 02 50 00 + 15 05 02 51 23 + 15 05 02 52 45 + 15 05 02 53 67 + 15 05 02 54 89 + 15 05 02 55 AB + 15 05 02 56 01 + 15 05 02 57 23 + 15 05 02 58 45 + 15 05 02 59 67 + 15 05 02 5a 89 + 15 05 02 5b AB + 15 05 02 5c CD + 15 05 02 5d EF + 15 05 02 5e 00 + 15 05 02 5f 08 + 15 05 02 60 08 + 15 05 02 61 06 + 15 05 02 62 06 + 15 05 02 63 01 + 15 05 02 64 01 + 15 05 02 65 00 + 15 05 02 66 00 + 15 05 02 67 02 + 15 05 02 68 15 + 15 05 02 69 15 + 15 05 02 6a 14 + 15 05 02 6b 14 + 15 05 02 6c 0D + 15 05 02 6d 0D + 15 05 02 6e 0C + 15 05 02 6f 0C + 15 05 02 70 0F + 15 05 02 71 0F + 15 05 02 72 0E + 15 05 02 73 0E + 15 05 02 74 02 + 15 05 02 75 08 + 15 05 02 76 08 + 15 05 02 77 06 + 15 05 02 78 06 + 15 05 02 79 01 + 15 05 02 7a 01 + 15 05 02 7b 00 + 15 05 02 7c 00 + 15 05 02 7d 02 + 15 05 02 7e 15 + 15 05 02 7f 15 + 15 05 02 80 14 + 15 05 02 81 14 + 15 05 02 82 0D + 15 05 02 83 0D + 15 05 02 84 0C + 15 05 02 85 0C + 15 05 02 86 0F + 15 05 02 87 0F + 15 05 02 88 0E + 15 05 02 89 0E + 15 05 02 8A 02 + 39 05 04 FF 98 81 04 + 15 05 02 6E 2B + 15 05 02 6F 37 + 15 05 02 3A 24 + 15 05 02 8D 1A + 15 05 02 87 BA + 15 05 02 B2 D1 + 15 05 02 88 0B + 15 05 02 38 01 + 15 05 02 39 00 + 15 05 02 B5 02 + 15 05 02 31 25 + 15 05 02 3B 98 + 39 05 04 FF 98 81 01 + 15 05 02 22 0A + 15 05 02 31 00 + 15 05 02 53 3D + 15 05 02 55 3D + 15 05 02 50 B5 + 15 05 02 51 AD + 15 05 02 60 06 + 15 05 02 62 20 + 15 05 02 A0 00 + 15 05 02 A1 21 + 15 05 02 A2 35 + 15 05 02 A3 19 + 15 05 02 A4 1E + 15 05 02 A5 33 + 15 05 02 A6 27 + 15 05 02 A7 26 + 15 05 02 A8 AF + 15 05 02 A9 1B + 15 05 02 AA 27 + 15 05 02 AB 8D + 15 05 02 AC 1A + 15 05 02 AD 1B + 15 05 02 AE 50 + 15 05 02 AF 26 + 15 05 02 B0 2B + 15 05 02 B1 54 + 15 05 02 B2 5E + 15 05 02 B3 23 + 15 05 02 C0 00 + 15 05 02 C1 21 + 15 05 02 C2 35 + 15 05 02 C3 19 + 15 05 02 C4 1E + 15 05 02 C5 33 + 15 05 02 C6 27 + 15 05 02 C7 26 + 15 05 02 C8 AF + 15 05 02 C9 1B + 15 05 02 CA 27 + 15 05 02 CB 8D + 15 05 02 CC 1A + 15 05 02 CD 1B + 15 05 02 CE 50 + 15 05 02 CF 26 + 15 05 02 D0 2B + 15 05 02 D1 54 + 15 05 02 D2 5E + 15 05 02 D3 23 + 39 05 04 FF 98 81 00 + 15 78 02 11 00 + 15 05 02 29 00 + ]; + + panel-exit-sequence = [ + 05 78 01 28 + 05 00 01 10 + ]; + + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <67000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <24>; + hback-porch = <24>; + hfront-porch = <12>; + vsync-len = <2>; + vback-porch = <9>; + vfront-porch = <7>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; + }; + }; + }; + }; + + fragment@5 { + target = <&i2c1>; + + __overlay__ { + status = "okay"; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + + gt911: gt911@5d { + status = "okay"; + compatible = "goodix,gt928"; + reg = <0x5d>; + interrupt-parent = <&gpio3>; + interrupts = ; + reset-gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + touchscreen-inverted-y; + + }; + + }; + }; + + fragment@6 { + target = <&route_hdmi>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@7 { + target = <&hdmi_in_vp0>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@8 { + target = <&hdmi_in_vp1>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@9 { + target = <&hdmi>; + + __overlay__ { + status = "disabled"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-10.1-800x1280-overlay.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-10.1-800x1280-overlay.dts new file mode 100644 index 000000000000..528d1e3c187e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi0-in-vp0-10.1-800x1280-overlay.dts @@ -0,0 +1,340 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +/ { + + fragment@0 { + target = <&route_dsi1>; + + __overlay__ { + status = "okay"; + connect = <&vp1_out_dsi1>; + }; + }; + + fragment@1 { + target = <&video_phy1>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&dsi1_in_vp0>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@3 { + target = <&dsi1_in_vp1>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@4 { + target = <&dsi1>; + + __overlay__ { + status = "okay"; + power-supply = <&mipi_dsi1_power>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight1>; + reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; + + enable-delay-ms = <35>; + prepare-delay-ms = <6>; + reset-delay-ms = <0>; + init-delay-ms = <20>; + unprepare-delay-ms = <0>; + disable-delay-ms = <20>; + + size,width = <74>; + size,height = <133>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 39 05 04 FF 98 81 03 + 15 05 02 01 00 + 15 05 02 02 00 + 15 05 02 03 53 + 15 05 02 04 D3 + 15 05 02 05 00 + 15 05 02 06 0D + 15 05 02 07 08 + 15 05 02 08 00 + 15 05 02 09 00 + 15 05 02 0a 00 + 15 05 02 0b 00 + 15 05 02 0c 00 + 15 05 02 0d 00 + 15 05 02 0e 00 + 15 05 02 0f 28 + 15 05 02 10 28 + 15 05 02 11 00 + 15 05 02 12 00 + 15 05 02 13 00 + 15 05 02 14 00 + 15 05 02 15 00 + 15 05 02 16 00 + 15 05 02 17 00 + 15 05 02 18 00 + 15 05 02 19 00 + 15 05 02 1a 00 + 15 05 02 1b 00 + 15 05 02 1d 00 + 15 05 02 1e 40 + 15 05 02 1f 80 + 15 05 02 20 06 + 15 05 02 21 01 + 15 05 02 22 00 + 15 05 02 23 00 + 15 05 02 24 00 + 15 05 02 25 00 + 15 05 02 26 00 + 15 05 02 27 00 + 15 05 02 28 33 + 15 05 02 29 33 + 15 05 02 2a 00 + 15 05 02 2b 00 + 15 05 02 2c 00 + 15 05 02 2d 00 + 15 05 02 2e 00 + 15 05 02 2f 00 + 15 05 02 30 00 + 15 05 02 31 00 + 15 05 02 32 00 + 15 05 02 33 00 + 15 05 02 34 03 + 15 05 02 35 00 + 15 05 02 36 00 + 15 05 02 37 00 + 15 05 02 38 96 + 15 05 02 39 00 + 15 05 02 3a 00 + 15 05 02 3b 00 + 15 05 02 3c 00 + 15 05 02 3d 00 + 15 05 02 3e 00 + 15 05 02 3f 00 + 15 05 02 40 00 + 15 05 02 41 00 + 15 05 02 42 00 + 15 05 02 43 00 + 15 05 02 44 00 + 15 05 02 50 00 + 15 05 02 51 23 + 15 05 02 52 45 + 15 05 02 53 67 + 15 05 02 54 89 + 15 05 02 55 AB + 15 05 02 56 01 + 15 05 02 57 23 + 15 05 02 58 45 + 15 05 02 59 67 + 15 05 02 5a 89 + 15 05 02 5b AB + 15 05 02 5c CD + 15 05 02 5d EF + 15 05 02 5e 00 + 15 05 02 5f 08 + 15 05 02 60 08 + 15 05 02 61 06 + 15 05 02 62 06 + 15 05 02 63 01 + 15 05 02 64 01 + 15 05 02 65 00 + 15 05 02 66 00 + 15 05 02 67 02 + 15 05 02 68 15 + 15 05 02 69 15 + 15 05 02 6a 14 + 15 05 02 6b 14 + 15 05 02 6c 0D + 15 05 02 6d 0D + 15 05 02 6e 0C + 15 05 02 6f 0C + 15 05 02 70 0F + 15 05 02 71 0F + 15 05 02 72 0E + 15 05 02 73 0E + 15 05 02 74 02 + 15 05 02 75 08 + 15 05 02 76 08 + 15 05 02 77 06 + 15 05 02 78 06 + 15 05 02 79 01 + 15 05 02 7a 01 + 15 05 02 7b 00 + 15 05 02 7c 00 + 15 05 02 7d 02 + 15 05 02 7e 15 + 15 05 02 7f 15 + 15 05 02 80 14 + 15 05 02 81 14 + 15 05 02 82 0D + 15 05 02 83 0D + 15 05 02 84 0C + 15 05 02 85 0C + 15 05 02 86 0F + 15 05 02 87 0F + 15 05 02 88 0E + 15 05 02 89 0E + 15 05 02 8A 02 + 39 05 04 FF 98 81 04 + 15 05 02 6E 2B + 15 05 02 6F 37 + 15 05 02 3A 24 + 15 05 02 8D 1A + 15 05 02 87 BA + 15 05 02 B2 D1 + 15 05 02 88 0B + 15 05 02 38 01 + 15 05 02 39 00 + 15 05 02 B5 02 + 15 05 02 31 25 + 15 05 02 3B 98 + 39 05 04 FF 98 81 01 + 15 05 02 22 0A + 15 05 02 31 00 + 15 05 02 53 3D + 15 05 02 55 3D + 15 05 02 50 B5 + 15 05 02 51 AD + 15 05 02 60 06 + 15 05 02 62 20 + 15 05 02 A0 00 + 15 05 02 A1 21 + 15 05 02 A2 35 + 15 05 02 A3 19 + 15 05 02 A4 1E + 15 05 02 A5 33 + 15 05 02 A6 27 + 15 05 02 A7 26 + 15 05 02 A8 AF + 15 05 02 A9 1B + 15 05 02 AA 27 + 15 05 02 AB 8D + 15 05 02 AC 1A + 15 05 02 AD 1B + 15 05 02 AE 50 + 15 05 02 AF 26 + 15 05 02 B0 2B + 15 05 02 B1 54 + 15 05 02 B2 5E + 15 05 02 B3 23 + 15 05 02 C0 00 + 15 05 02 C1 21 + 15 05 02 C2 35 + 15 05 02 C3 19 + 15 05 02 C4 1E + 15 05 02 C5 33 + 15 05 02 C6 27 + 15 05 02 C7 26 + 15 05 02 C8 AF + 15 05 02 C9 1B + 15 05 02 CA 27 + 15 05 02 CB 8D + 15 05 02 CC 1A + 15 05 02 CD 1B + 15 05 02 CE 50 + 15 05 02 CF 26 + 15 05 02 D0 2B + 15 05 02 D1 54 + 15 05 02 D2 5E + 15 05 02 D3 23 + 39 05 04 FF 98 81 00 + 15 78 02 11 00 + 15 05 02 29 00 + ]; + + panel-exit-sequence = [ + 05 78 01 28 + 05 00 01 10 + ]; + + disp_timings: display-timings { + native-mode = <&dsi1_timing>; + dsi1_timing: timing { + clock-frequency = <67000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <24>; + hback-porch = <24>; + hfront-porch = <12>; + vsync-len = <2>; + vback-porch = <9>; + vfront-porch = <7>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; + }; + }; + }; + }; + }; + + fragment@5 { + target = <&i2c5>; + + __overlay__ { + status = "okay"; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + + gt911: gt911@5d { + status = "okay"; + compatible = "goodix,gt928"; + reg = <0x5d>; + interrupt-parent = <&gpio3>; + interrupts = ; + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + touchscreen-inverted-y; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-10.1-800x1280-overlay.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-10.1-800x1280-overlay.dts new file mode 100644 index 000000000000..528d1e3c187e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-2io-dsi1-in-vp1-10.1-800x1280-overlay.dts @@ -0,0 +1,340 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +/ { + + fragment@0 { + target = <&route_dsi1>; + + __overlay__ { + status = "okay"; + connect = <&vp1_out_dsi1>; + }; + }; + + fragment@1 { + target = <&video_phy1>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&dsi1_in_vp0>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@3 { + target = <&dsi1_in_vp1>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@4 { + target = <&dsi1>; + + __overlay__ { + status = "okay"; + power-supply = <&mipi_dsi1_power>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight1>; + reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; + + enable-delay-ms = <35>; + prepare-delay-ms = <6>; + reset-delay-ms = <0>; + init-delay-ms = <20>; + unprepare-delay-ms = <0>; + disable-delay-ms = <20>; + + size,width = <74>; + size,height = <133>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 39 05 04 FF 98 81 03 + 15 05 02 01 00 + 15 05 02 02 00 + 15 05 02 03 53 + 15 05 02 04 D3 + 15 05 02 05 00 + 15 05 02 06 0D + 15 05 02 07 08 + 15 05 02 08 00 + 15 05 02 09 00 + 15 05 02 0a 00 + 15 05 02 0b 00 + 15 05 02 0c 00 + 15 05 02 0d 00 + 15 05 02 0e 00 + 15 05 02 0f 28 + 15 05 02 10 28 + 15 05 02 11 00 + 15 05 02 12 00 + 15 05 02 13 00 + 15 05 02 14 00 + 15 05 02 15 00 + 15 05 02 16 00 + 15 05 02 17 00 + 15 05 02 18 00 + 15 05 02 19 00 + 15 05 02 1a 00 + 15 05 02 1b 00 + 15 05 02 1d 00 + 15 05 02 1e 40 + 15 05 02 1f 80 + 15 05 02 20 06 + 15 05 02 21 01 + 15 05 02 22 00 + 15 05 02 23 00 + 15 05 02 24 00 + 15 05 02 25 00 + 15 05 02 26 00 + 15 05 02 27 00 + 15 05 02 28 33 + 15 05 02 29 33 + 15 05 02 2a 00 + 15 05 02 2b 00 + 15 05 02 2c 00 + 15 05 02 2d 00 + 15 05 02 2e 00 + 15 05 02 2f 00 + 15 05 02 30 00 + 15 05 02 31 00 + 15 05 02 32 00 + 15 05 02 33 00 + 15 05 02 34 03 + 15 05 02 35 00 + 15 05 02 36 00 + 15 05 02 37 00 + 15 05 02 38 96 + 15 05 02 39 00 + 15 05 02 3a 00 + 15 05 02 3b 00 + 15 05 02 3c 00 + 15 05 02 3d 00 + 15 05 02 3e 00 + 15 05 02 3f 00 + 15 05 02 40 00 + 15 05 02 41 00 + 15 05 02 42 00 + 15 05 02 43 00 + 15 05 02 44 00 + 15 05 02 50 00 + 15 05 02 51 23 + 15 05 02 52 45 + 15 05 02 53 67 + 15 05 02 54 89 + 15 05 02 55 AB + 15 05 02 56 01 + 15 05 02 57 23 + 15 05 02 58 45 + 15 05 02 59 67 + 15 05 02 5a 89 + 15 05 02 5b AB + 15 05 02 5c CD + 15 05 02 5d EF + 15 05 02 5e 00 + 15 05 02 5f 08 + 15 05 02 60 08 + 15 05 02 61 06 + 15 05 02 62 06 + 15 05 02 63 01 + 15 05 02 64 01 + 15 05 02 65 00 + 15 05 02 66 00 + 15 05 02 67 02 + 15 05 02 68 15 + 15 05 02 69 15 + 15 05 02 6a 14 + 15 05 02 6b 14 + 15 05 02 6c 0D + 15 05 02 6d 0D + 15 05 02 6e 0C + 15 05 02 6f 0C + 15 05 02 70 0F + 15 05 02 71 0F + 15 05 02 72 0E + 15 05 02 73 0E + 15 05 02 74 02 + 15 05 02 75 08 + 15 05 02 76 08 + 15 05 02 77 06 + 15 05 02 78 06 + 15 05 02 79 01 + 15 05 02 7a 01 + 15 05 02 7b 00 + 15 05 02 7c 00 + 15 05 02 7d 02 + 15 05 02 7e 15 + 15 05 02 7f 15 + 15 05 02 80 14 + 15 05 02 81 14 + 15 05 02 82 0D + 15 05 02 83 0D + 15 05 02 84 0C + 15 05 02 85 0C + 15 05 02 86 0F + 15 05 02 87 0F + 15 05 02 88 0E + 15 05 02 89 0E + 15 05 02 8A 02 + 39 05 04 FF 98 81 04 + 15 05 02 6E 2B + 15 05 02 6F 37 + 15 05 02 3A 24 + 15 05 02 8D 1A + 15 05 02 87 BA + 15 05 02 B2 D1 + 15 05 02 88 0B + 15 05 02 38 01 + 15 05 02 39 00 + 15 05 02 B5 02 + 15 05 02 31 25 + 15 05 02 3B 98 + 39 05 04 FF 98 81 01 + 15 05 02 22 0A + 15 05 02 31 00 + 15 05 02 53 3D + 15 05 02 55 3D + 15 05 02 50 B5 + 15 05 02 51 AD + 15 05 02 60 06 + 15 05 02 62 20 + 15 05 02 A0 00 + 15 05 02 A1 21 + 15 05 02 A2 35 + 15 05 02 A3 19 + 15 05 02 A4 1E + 15 05 02 A5 33 + 15 05 02 A6 27 + 15 05 02 A7 26 + 15 05 02 A8 AF + 15 05 02 A9 1B + 15 05 02 AA 27 + 15 05 02 AB 8D + 15 05 02 AC 1A + 15 05 02 AD 1B + 15 05 02 AE 50 + 15 05 02 AF 26 + 15 05 02 B0 2B + 15 05 02 B1 54 + 15 05 02 B2 5E + 15 05 02 B3 23 + 15 05 02 C0 00 + 15 05 02 C1 21 + 15 05 02 C2 35 + 15 05 02 C3 19 + 15 05 02 C4 1E + 15 05 02 C5 33 + 15 05 02 C6 27 + 15 05 02 C7 26 + 15 05 02 C8 AF + 15 05 02 C9 1B + 15 05 02 CA 27 + 15 05 02 CB 8D + 15 05 02 CC 1A + 15 05 02 CD 1B + 15 05 02 CE 50 + 15 05 02 CF 26 + 15 05 02 D0 2B + 15 05 02 D1 54 + 15 05 02 D2 5E + 15 05 02 D3 23 + 39 05 04 FF 98 81 00 + 15 78 02 11 00 + 15 05 02 29 00 + ]; + + panel-exit-sequence = [ + 05 78 01 28 + 05 00 01 10 + ]; + + disp_timings: display-timings { + native-mode = <&dsi1_timing>; + dsi1_timing: timing { + clock-frequency = <67000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <24>; + hback-porch = <24>; + hfront-porch = <12>; + vsync-len = <2>; + vback-porch = <9>; + vfront-porch = <7>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; + }; + }; + }; + }; + }; + + fragment@5 { + target = <&i2c5>; + + __overlay__ { + status = "okay"; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + + gt911: gt911@5d { + status = "okay"; + compatible = "goodix,gt928"; + reg = <0x5d>; + interrupt-parent = <&gpio3>; + interrupts = ; + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + touchscreen-inverted-y; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-dsi0-10.1-800x1280-overlay.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-dsi0-10.1-800x1280-overlay.dts new file mode 100644 index 000000000000..141ec6133ca2 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-lubancat-dsi0-10.1-800x1280-overlay.dts @@ -0,0 +1,340 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +/ { + compatible = "rockchip,rk3568"; + + fragment@0 { + target = <&route_dsi0>; + + __overlay__ { + status = "okay"; + connect = <&vp1_out_dsi0>; + }; + }; + + fragment@1 { + target = <&video_phy0>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&dsi0_in_vp0>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@3 { + target = <&dsi0_in_vp1>; + + __overlay__ { + status = "okay"; + }; + }; + + fragment@4 { + target = <&dsi0>; + + __overlay__ { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; + power-supply = <&mipi_dsi0_power>; + + enable-delay-ms = <35>; + prepare-delay-ms = <6>; + reset-delay-ms = <0>; + init-delay-ms = <20>; + unprepare-delay-ms = <0>; + disable-delay-ms = <20>; + + size,width = <74>; + size,height = <133>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 39 05 04 FF 98 81 03 + 15 05 02 01 00 + 15 05 02 02 00 + 15 05 02 03 53 + 15 05 02 04 D3 + 15 05 02 05 00 + 15 05 02 06 0D + 15 05 02 07 08 + 15 05 02 08 00 + 15 05 02 09 00 + 15 05 02 0a 00 + 15 05 02 0b 00 + 15 05 02 0c 00 + 15 05 02 0d 00 + 15 05 02 0e 00 + 15 05 02 0f 28 + 15 05 02 10 28 + 15 05 02 11 00 + 15 05 02 12 00 + 15 05 02 13 00 + 15 05 02 14 00 + 15 05 02 15 00 + 15 05 02 16 00 + 15 05 02 17 00 + 15 05 02 18 00 + 15 05 02 19 00 + 15 05 02 1a 00 + 15 05 02 1b 00 + 15 05 02 1d 00 + 15 05 02 1e 40 + 15 05 02 1f 80 + 15 05 02 20 06 + 15 05 02 21 01 + 15 05 02 22 00 + 15 05 02 23 00 + 15 05 02 24 00 + 15 05 02 25 00 + 15 05 02 26 00 + 15 05 02 27 00 + 15 05 02 28 33 + 15 05 02 29 33 + 15 05 02 2a 00 + 15 05 02 2b 00 + 15 05 02 2c 00 + 15 05 02 2d 00 + 15 05 02 2e 00 + 15 05 02 2f 00 + 15 05 02 30 00 + 15 05 02 31 00 + 15 05 02 32 00 + 15 05 02 33 00 + 15 05 02 34 03 + 15 05 02 35 00 + 15 05 02 36 00 + 15 05 02 37 00 + 15 05 02 38 96 + 15 05 02 39 00 + 15 05 02 3a 00 + 15 05 02 3b 00 + 15 05 02 3c 00 + 15 05 02 3d 00 + 15 05 02 3e 00 + 15 05 02 3f 00 + 15 05 02 40 00 + 15 05 02 41 00 + 15 05 02 42 00 + 15 05 02 43 00 + 15 05 02 44 00 + 15 05 02 50 00 + 15 05 02 51 23 + 15 05 02 52 45 + 15 05 02 53 67 + 15 05 02 54 89 + 15 05 02 55 AB + 15 05 02 56 01 + 15 05 02 57 23 + 15 05 02 58 45 + 15 05 02 59 67 + 15 05 02 5a 89 + 15 05 02 5b AB + 15 05 02 5c CD + 15 05 02 5d EF + 15 05 02 5e 00 + 15 05 02 5f 08 + 15 05 02 60 08 + 15 05 02 61 06 + 15 05 02 62 06 + 15 05 02 63 01 + 15 05 02 64 01 + 15 05 02 65 00 + 15 05 02 66 00 + 15 05 02 67 02 + 15 05 02 68 15 + 15 05 02 69 15 + 15 05 02 6a 14 + 15 05 02 6b 14 + 15 05 02 6c 0D + 15 05 02 6d 0D + 15 05 02 6e 0C + 15 05 02 6f 0C + 15 05 02 70 0F + 15 05 02 71 0F + 15 05 02 72 0E + 15 05 02 73 0E + 15 05 02 74 02 + 15 05 02 75 08 + 15 05 02 76 08 + 15 05 02 77 06 + 15 05 02 78 06 + 15 05 02 79 01 + 15 05 02 7a 01 + 15 05 02 7b 00 + 15 05 02 7c 00 + 15 05 02 7d 02 + 15 05 02 7e 15 + 15 05 02 7f 15 + 15 05 02 80 14 + 15 05 02 81 14 + 15 05 02 82 0D + 15 05 02 83 0D + 15 05 02 84 0C + 15 05 02 85 0C + 15 05 02 86 0F + 15 05 02 87 0F + 15 05 02 88 0E + 15 05 02 89 0E + 15 05 02 8A 02 + 39 05 04 FF 98 81 04 + 15 05 02 6E 2B + 15 05 02 6F 37 + 15 05 02 3A 24 + 15 05 02 8D 1A + 15 05 02 87 BA + 15 05 02 B2 D1 + 15 05 02 88 0B + 15 05 02 38 01 + 15 05 02 39 00 + 15 05 02 B5 02 + 15 05 02 31 25 + 15 05 02 3B 98 + 39 05 04 FF 98 81 01 + 15 05 02 22 0A + 15 05 02 31 00 + 15 05 02 53 3D + 15 05 02 55 3D + 15 05 02 50 B5 + 15 05 02 51 AD + 15 05 02 60 06 + 15 05 02 62 20 + 15 05 02 A0 00 + 15 05 02 A1 21 + 15 05 02 A2 35 + 15 05 02 A3 19 + 15 05 02 A4 1E + 15 05 02 A5 33 + 15 05 02 A6 27 + 15 05 02 A7 26 + 15 05 02 A8 AF + 15 05 02 A9 1B + 15 05 02 AA 27 + 15 05 02 AB 8D + 15 05 02 AC 1A + 15 05 02 AD 1B + 15 05 02 AE 50 + 15 05 02 AF 26 + 15 05 02 B0 2B + 15 05 02 B1 54 + 15 05 02 B2 5E + 15 05 02 B3 23 + 15 05 02 C0 00 + 15 05 02 C1 21 + 15 05 02 C2 35 + 15 05 02 C3 19 + 15 05 02 C4 1E + 15 05 02 C5 33 + 15 05 02 C6 27 + 15 05 02 C7 26 + 15 05 02 C8 AF + 15 05 02 C9 1B + 15 05 02 CA 27 + 15 05 02 CB 8D + 15 05 02 CC 1A + 15 05 02 CD 1B + 15 05 02 CE 50 + 15 05 02 CF 26 + 15 05 02 D0 2B + 15 05 02 D1 54 + 15 05 02 D2 5E + 15 05 02 D3 23 + 39 05 04 FF 98 81 00 + 15 78 02 11 00 + 15 05 02 29 00 + ]; + + panel-exit-sequence = [ + 05 78 01 28 + 05 00 01 10 + ]; + + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <67000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <24>; + hback-porch = <24>; + hfront-porch = <12>; + vsync-len = <2>; + vback-porch = <9>; + vfront-porch = <7>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; + }; + }; + }; + }; + + fragment@5 { + target = <&i2c1>; + + __overlay__ { + status = "okay"; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + + gt911: gt911@5d { + status = "okay"; + compatible = "goodix,gt928"; + reg = <0x5d>; + interrupt-parent = <&gpio0>; + interrupts = ; + reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + touchscreen-inverted-y; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-dsi0-10.1-800x1280.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-dsi0-10.1-800x1280.dtsi new file mode 100644 index 000000000000..8ff40560944f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-dsi0-10.1-800x1280.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * + */ + +#include "rk3568-lubancat-dsi0-10.1-800x1280.dtsi" + +&route_dsi0 { + status = "okay"; + connect = <&vp0_out_dsi0>; +}; + +&dsi0_in_vp0 { + status = "okay"; +}; + +&dsi0_in_vp1 { + status = "disabled"; +}; + +&dsi0_panel { + reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; +}; + +>911 { + interrupt-parent = <&gpio3>; + interrupts = ; + reset-gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/rockchip/rk3568-lubancat-dsi0-10.1-800x1280.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-dsi0-10.1-800x1280.dtsi new file mode 100644 index 000000000000..bf4869fec1b9 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-dsi0-10.1-800x1280.dtsi @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * + */ + +&video_phy0 { + status = "okay"; +}; + +&dsi0_in_vp1 { + status = "disabled"; +}; + +&dsi0_in_vp0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; + power-supply = <&mipi_dsi0_power>; + + dsi0_panel: panel@0 { + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; + + enable-delay-ms = <35>; + prepare-delay-ms = <6>; + reset-delay-ms = <0>; + init-delay-ms = <20>; + unprepare-delay-ms = <0>; + disable-delay-ms = <20>; + + size,width = <74>; + size,height = <133>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 39 05 04 FF 98 81 03 + 15 05 02 01 00 + 15 05 02 02 00 + 15 05 02 03 53 + 15 05 02 04 D3 + 15 05 02 05 00 + 15 05 02 06 0D + 15 05 02 07 08 + 15 05 02 08 00 + 15 05 02 09 00 + 15 05 02 0a 00 + 15 05 02 0b 00 + 15 05 02 0c 00 + 15 05 02 0d 00 + 15 05 02 0e 00 + 15 05 02 0f 28 + 15 05 02 10 28 + 15 05 02 11 00 + 15 05 02 12 00 + 15 05 02 13 00 + 15 05 02 14 00 + 15 05 02 15 00 + 15 05 02 16 00 + 15 05 02 17 00 + 15 05 02 18 00 + 15 05 02 19 00 + 15 05 02 1a 00 + 15 05 02 1b 00 + 15 05 02 1d 00 + 15 05 02 1e 40 + 15 05 02 1f 80 + 15 05 02 20 06 + 15 05 02 21 01 + 15 05 02 22 00 + 15 05 02 23 00 + 15 05 02 24 00 + 15 05 02 25 00 + 15 05 02 26 00 + 15 05 02 27 00 + 15 05 02 28 33 + 15 05 02 29 33 + 15 05 02 2a 00 + 15 05 02 2b 00 + 15 05 02 2c 00 + 15 05 02 2d 00 + 15 05 02 2e 00 + 15 05 02 2f 00 + 15 05 02 30 00 + 15 05 02 31 00 + 15 05 02 32 00 + 15 05 02 33 00 + 15 05 02 34 03 + 15 05 02 35 00 + 15 05 02 36 00 + 15 05 02 37 00 + 15 05 02 38 96 + 15 05 02 39 00 + 15 05 02 3a 00 + 15 05 02 3b 00 + 15 05 02 3c 00 + 15 05 02 3d 00 + 15 05 02 3e 00 + 15 05 02 3f 00 + 15 05 02 40 00 + 15 05 02 41 00 + 15 05 02 42 00 + 15 05 02 43 00 + 15 05 02 44 00 + 15 05 02 50 00 + 15 05 02 51 23 + 15 05 02 52 45 + 15 05 02 53 67 + 15 05 02 54 89 + 15 05 02 55 AB + 15 05 02 56 01 + 15 05 02 57 23 + 15 05 02 58 45 + 15 05 02 59 67 + 15 05 02 5a 89 + 15 05 02 5b AB + 15 05 02 5c CD + 15 05 02 5d EF + 15 05 02 5e 00 + 15 05 02 5f 08 + 15 05 02 60 08 + 15 05 02 61 06 + 15 05 02 62 06 + 15 05 02 63 01 + 15 05 02 64 01 + 15 05 02 65 00 + 15 05 02 66 00 + 15 05 02 67 02 + 15 05 02 68 15 + 15 05 02 69 15 + 15 05 02 6a 14 + 15 05 02 6b 14 + 15 05 02 6c 0D + 15 05 02 6d 0D + 15 05 02 6e 0C + 15 05 02 6f 0C + 15 05 02 70 0F + 15 05 02 71 0F + 15 05 02 72 0E + 15 05 02 73 0E + 15 05 02 74 02 + 15 05 02 75 08 + 15 05 02 76 08 + 15 05 02 77 06 + 15 05 02 78 06 + 15 05 02 79 01 + 15 05 02 7a 01 + 15 05 02 7b 00 + 15 05 02 7c 00 + 15 05 02 7d 02 + 15 05 02 7e 15 + 15 05 02 7f 15 + 15 05 02 80 14 + 15 05 02 81 14 + 15 05 02 82 0D + 15 05 02 83 0D + 15 05 02 84 0C + 15 05 02 85 0C + 15 05 02 86 0F + 15 05 02 87 0F + 15 05 02 88 0E + 15 05 02 89 0E + 15 05 02 8A 02 + 39 05 04 FF 98 81 04 + 15 05 02 6E 2B + 15 05 02 6F 37 + 15 05 02 3A 24 + 15 05 02 8D 1A + 15 05 02 87 BA + 15 05 02 B2 D1 + 15 05 02 88 0B + 15 05 02 38 01 + 15 05 02 39 00 + 15 05 02 B5 02 + 15 05 02 31 25 + 15 05 02 3B 98 + 39 05 04 FF 98 81 01 + 15 05 02 22 0A + 15 05 02 31 00 + 15 05 02 53 3D + 15 05 02 55 3D + 15 05 02 50 B5 + 15 05 02 51 AD + 15 05 02 60 06 + 15 05 02 62 20 + 15 05 02 A0 00 + 15 05 02 A1 21 + 15 05 02 A2 35 + 15 05 02 A3 19 + 15 05 02 A4 1E + 15 05 02 A5 33 + 15 05 02 A6 27 + 15 05 02 A7 26 + 15 05 02 A8 AF + 15 05 02 A9 1B + 15 05 02 AA 27 + 15 05 02 AB 8D + 15 05 02 AC 1A + 15 05 02 AD 1B + 15 05 02 AE 50 + 15 05 02 AF 26 + 15 05 02 B0 2B + 15 05 02 B1 54 + 15 05 02 B2 5E + 15 05 02 B3 23 + 15 05 02 C0 00 + 15 05 02 C1 21 + 15 05 02 C2 35 + 15 05 02 C3 19 + 15 05 02 C4 1E + 15 05 02 C5 33 + 15 05 02 C6 27 + 15 05 02 C7 26 + 15 05 02 C8 AF + 15 05 02 C9 1B + 15 05 02 CA 27 + 15 05 02 CB 8D + 15 05 02 CC 1A + 15 05 02 CD 1B + 15 05 02 CE 50 + 15 05 02 CF 26 + 15 05 02 D0 2B + 15 05 02 D1 54 + 15 05 02 D2 5E + 15 05 02 D3 23 + 39 05 04 FF 98 81 00 + 15 78 02 11 00 + 15 05 02 29 00 + ]; + + panel-exit-sequence = [ + 05 78 01 28 + 05 00 01 10 + ]; + + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <67000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <24>; + hback-porch = <24>; + hfront-porch = <12>; + vsync-len = <2>; + vback-porch = <9>; + vfront-porch = <7>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <100000>; + + gt911: gt911@5d { + status = "okay"; + compatible = "goodix,gt928"; + reg = <0x5d>; + interrupt-parent = <&gpio0>; + interrupts = ; + reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + irq-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + touchscreen-inverted-y; + }; +};